1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006-2014 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
47 #include "exceptions.h"
51 /* The list of available "set spu " and "show spu " commands. */
52 static struct cmd_list_element
*setspucmdlist
= NULL
;
53 static struct cmd_list_element
*showspucmdlist
= NULL
;
55 /* Whether to stop for new SPE contexts. */
56 static int spu_stop_on_load_p
= 0;
57 /* Whether to automatically flush the SW-managed cache. */
58 static int spu_auto_flush_cache_p
= 1;
61 /* The tdep structure. */
64 /* The spufs ID identifying our address space. */
67 /* SPU-specific vector type. */
68 struct type
*spu_builtin_type_vec128
;
72 /* SPU-specific vector type. */
74 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
76 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
78 if (!tdep
->spu_builtin_type_vec128
)
80 const struct builtin_type
*bt
= builtin_type (gdbarch
);
83 t
= arch_composite_type (gdbarch
,
84 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
85 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
86 append_composite_type_field (t
, "v2_int64",
87 init_vector_type (bt
->builtin_int64
, 2));
88 append_composite_type_field (t
, "v4_int32",
89 init_vector_type (bt
->builtin_int32
, 4));
90 append_composite_type_field (t
, "v8_int16",
91 init_vector_type (bt
->builtin_int16
, 8));
92 append_composite_type_field (t
, "v16_int8",
93 init_vector_type (bt
->builtin_int8
, 16));
94 append_composite_type_field (t
, "v2_double",
95 init_vector_type (bt
->builtin_double
, 2));
96 append_composite_type_field (t
, "v4_float",
97 init_vector_type (bt
->builtin_float
, 4));
100 TYPE_NAME (t
) = "spu_builtin_type_vec128";
102 tdep
->spu_builtin_type_vec128
= t
;
105 return tdep
->spu_builtin_type_vec128
;
109 /* The list of available "info spu " commands. */
110 static struct cmd_list_element
*infospucmdlist
= NULL
;
115 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
117 static char *register_names
[] =
119 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
120 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
121 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
122 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
123 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
124 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
125 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
126 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
127 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
128 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
129 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
130 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
131 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
132 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
133 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
134 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
135 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
140 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
143 return register_names
[reg_nr
];
147 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
149 if (reg_nr
< SPU_NUM_GPRS
)
150 return spu_builtin_type_vec128 (gdbarch
);
155 return builtin_type (gdbarch
)->builtin_uint32
;
158 return builtin_type (gdbarch
)->builtin_func_ptr
;
161 return builtin_type (gdbarch
)->builtin_data_ptr
;
163 case SPU_FPSCR_REGNUM
:
164 return builtin_type (gdbarch
)->builtin_uint128
;
166 case SPU_SRR0_REGNUM
:
167 return builtin_type (gdbarch
)->builtin_uint32
;
169 case SPU_LSLR_REGNUM
:
170 return builtin_type (gdbarch
)->builtin_uint32
;
172 case SPU_DECR_REGNUM
:
173 return builtin_type (gdbarch
)->builtin_uint32
;
175 case SPU_DECR_STATUS_REGNUM
:
176 return builtin_type (gdbarch
)->builtin_uint32
;
179 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
183 /* Pseudo registers for preferred slots - stack pointer. */
185 static enum register_status
186 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
189 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
190 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
191 enum register_status status
;
197 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
198 if (status
!= REG_VALID
)
200 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
201 memset (reg
, 0, sizeof reg
);
202 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
205 ul
= strtoulst ((char *) reg
, NULL
, 16);
206 store_unsigned_integer (buf
, 4, byte_order
, ul
);
210 static enum register_status
211 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
212 int regnum
, gdb_byte
*buf
)
217 enum register_status status
;
222 status
= regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
223 if (status
!= REG_VALID
)
225 memcpy (buf
, reg
, 4);
228 case SPU_FPSCR_REGNUM
:
229 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
230 if (status
!= REG_VALID
)
232 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
233 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
236 case SPU_SRR0_REGNUM
:
237 return spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
239 case SPU_LSLR_REGNUM
:
240 return spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
242 case SPU_DECR_REGNUM
:
243 return spu_pseudo_register_read_spu (regcache
, "decr", buf
);
245 case SPU_DECR_STATUS_REGNUM
:
246 return spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
249 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
254 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
257 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
258 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
263 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
264 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
265 xsnprintf (reg
, sizeof reg
, "0x%s",
266 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
267 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
268 (gdb_byte
*) reg
, 0, strlen (reg
));
272 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
273 int regnum
, const gdb_byte
*buf
)
282 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
283 memcpy (reg
, buf
, 4);
284 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
287 case SPU_FPSCR_REGNUM
:
288 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
289 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
290 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
293 case SPU_SRR0_REGNUM
:
294 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
297 case SPU_LSLR_REGNUM
:
298 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
301 case SPU_DECR_REGNUM
:
302 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
305 case SPU_DECR_STATUS_REGNUM
:
306 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
310 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
314 /* Value conversion -- access scalar values at the preferred slot. */
316 static struct value
*
317 spu_value_from_register (struct type
*type
, int regnum
,
318 struct frame_info
*frame
)
320 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
321 int len
= TYPE_LENGTH (type
);
323 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
325 int preferred_slot
= len
< 4 ? 4 - len
: 0;
326 set_value_offset (value
, preferred_slot
);
332 /* Register groups. */
335 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
336 struct reggroup
*group
)
338 /* Registers displayed via 'info regs'. */
339 if (group
== general_reggroup
)
342 /* Registers displayed via 'info float'. */
343 if (group
== float_reggroup
)
346 /* Registers that need to be saved/restored in order to
347 push or pop frames. */
348 if (group
== save_reggroup
|| group
== restore_reggroup
)
351 return default_register_reggroup_p (gdbarch
, regnum
, group
);
355 /* Address handling. */
358 spu_gdbarch_id (struct gdbarch
*gdbarch
)
360 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
363 /* The objfile architecture of a standalone SPU executable does not
364 provide an SPU ID. Retrieve it from the objfile's relocated
365 address range in this special case. */
367 && symfile_objfile
&& symfile_objfile
->obfd
368 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
369 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
370 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
376 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
378 if (dwarf2_addr_class
== 1)
379 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
385 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
387 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
394 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
395 const char *name
, int *type_flags_ptr
)
397 if (strcmp (name
, "__ea") == 0)
399 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
407 spu_address_to_pointer (struct gdbarch
*gdbarch
,
408 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
410 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
411 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
412 SPUADDR_ADDR (addr
));
416 spu_pointer_to_address (struct gdbarch
*gdbarch
,
417 struct type
*type
, const gdb_byte
*buf
)
419 int id
= spu_gdbarch_id (gdbarch
);
420 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
422 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
424 /* Do not convert __ea pointers. */
425 if (TYPE_ADDRESS_CLASS_1 (type
))
428 return addr
? SPUADDR (id
, addr
) : 0;
432 spu_integer_to_address (struct gdbarch
*gdbarch
,
433 struct type
*type
, const gdb_byte
*buf
)
435 int id
= spu_gdbarch_id (gdbarch
);
436 ULONGEST addr
= unpack_long (type
, buf
);
438 return SPUADDR (id
, addr
);
442 /* Decoding SPU instructions. */
479 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
481 if ((insn
>> 21) == op
)
484 *ra
= (insn
>> 7) & 127;
485 *rb
= (insn
>> 14) & 127;
493 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
495 if ((insn
>> 28) == op
)
497 *rt
= (insn
>> 21) & 127;
498 *ra
= (insn
>> 7) & 127;
499 *rb
= (insn
>> 14) & 127;
508 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
510 if ((insn
>> 21) == op
)
513 *ra
= (insn
>> 7) & 127;
514 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
522 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
524 if ((insn
>> 24) == op
)
527 *ra
= (insn
>> 7) & 127;
528 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
536 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
538 if ((insn
>> 23) == op
)
541 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
549 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
551 if ((insn
>> 25) == op
)
554 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
562 is_branch (unsigned int insn
, int *offset
, int *reg
)
566 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
567 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
568 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
569 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
570 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
571 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
573 *reg
= SPU_PC_REGNUM
;
578 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
579 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
586 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
587 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
588 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
589 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
590 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
591 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
601 /* Prolog parsing. */
603 struct spu_prologue_data
605 /* Stack frame size. -1 if analysis was unsuccessful. */
608 /* How to find the CFA. The CFA is equal to SP at function entry. */
612 /* Offset relative to CFA where a register is saved. -1 if invalid. */
613 int reg_offset
[SPU_NUM_GPRS
];
617 spu_analyze_prologue (struct gdbarch
*gdbarch
,
618 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
619 struct spu_prologue_data
*data
)
621 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
626 int reg_immed
[SPU_NUM_GPRS
];
628 CORE_ADDR prolog_pc
= start_pc
;
633 /* Initialize DATA to default values. */
636 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
637 data
->cfa_offset
= 0;
639 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
640 data
->reg_offset
[i
] = -1;
642 /* Set up REG_IMMED array. This is non-zero for a register if we know its
643 preferred slot currently holds this immediate value. */
644 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
647 /* Scan instructions until the first branch.
649 The following instructions are important prolog components:
651 - The first instruction to set up the stack pointer.
652 - The first instruction to set up the frame pointer.
653 - The first instruction to save the link register.
654 - The first instruction to save the backchain.
656 We return the instruction after the latest of these four,
657 or the incoming PC if none is found. The first instruction
658 to set up the stack pointer also defines the frame size.
660 Note that instructions saving incoming arguments to their stack
661 slots are not counted as important, because they are hard to
662 identify with certainty. This should not matter much, because
663 arguments are relevant only in code compiled with debug data,
664 and in such code the GDB core will advance until the first source
665 line anyway, using SAL data.
667 For purposes of stack unwinding, we analyze the following types
668 of instructions in addition:
670 - Any instruction adding to the current frame pointer.
671 - Any instruction loading an immediate constant into a register.
672 - Any instruction storing a register onto the stack.
674 These are used to compute the CFA and REG_OFFSET output. */
676 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
679 int rt
, ra
, rb
, rc
, immed
;
681 if (target_read_memory (pc
, buf
, 4))
683 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
685 /* AI is the typical instruction to set up a stack frame.
686 It is also used to initialize the frame pointer. */
687 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
689 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
690 data
->cfa_offset
-= immed
;
692 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
700 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
706 data
->cfa_reg
= SPU_FP_REGNUM
;
707 data
->cfa_offset
-= immed
;
711 /* A is used to set up stack frames of size >= 512 bytes.
712 If we have tracked the contents of the addend register,
713 we can handle this as well. */
714 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
716 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
718 if (reg_immed
[rb
] != 0)
719 data
->cfa_offset
-= reg_immed
[rb
];
721 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
724 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
730 if (reg_immed
[rb
] != 0)
731 data
->size
= -reg_immed
[rb
];
735 /* We need to track IL and ILA used to load immediate constants
736 in case they are later used as input to an A instruction. */
737 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
739 reg_immed
[rt
] = immed
;
741 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
745 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
747 reg_immed
[rt
] = immed
& 0x3ffff;
749 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
753 /* STQD is used to save registers to the stack. */
754 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
756 if (ra
== data
->cfa_reg
)
757 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
759 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
766 if (ra
== SPU_RAW_SP_REGNUM
767 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
775 /* _start uses SELB to set up the stack pointer. */
776 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
778 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
782 /* We terminate if we find a branch. */
783 else if (is_branch (insn
, &immed
, &ra
))
788 /* If we successfully parsed until here, and didn't find any instruction
789 modifying SP, we assume we have a frameless function. */
793 /* Return cooked instead of raw SP. */
794 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
795 data
->cfa_reg
= SPU_SP_REGNUM
;
800 /* Return the first instruction after the prologue starting at PC. */
802 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
804 struct spu_prologue_data data
;
805 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
808 /* Return the frame pointer in use at address PC. */
810 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
811 int *reg
, LONGEST
*offset
)
813 struct spu_prologue_data data
;
814 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
816 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
818 /* The 'frame pointer' address is CFA minus frame size. */
820 *offset
= data
.cfa_offset
- data
.size
;
824 /* ??? We don't really know ... */
825 *reg
= SPU_SP_REGNUM
;
830 /* Return true if we are in the function's epilogue, i.e. after the
831 instruction that destroyed the function's stack frame.
833 1) scan forward from the point of execution:
834 a) If you find an instruction that modifies the stack pointer
835 or transfers control (except a return), execution is not in
837 b) Stop scanning if you find a return instruction or reach the
838 end of the function or reach the hard limit for the size of
840 2) scan backward from the point of execution:
841 a) If you find an instruction that modifies the stack pointer,
842 execution *is* in an epilogue, return.
843 b) Stop scanning if you reach an instruction that transfers
844 control or the beginning of the function or reach the hard
845 limit for the size of an epilogue. */
848 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
850 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
851 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
854 int rt
, ra
, rb
, immed
;
856 /* Find the search limits based on function boundaries and hard limit.
857 We assume the epilogue can be up to 64 instructions long. */
859 const int spu_max_epilogue_size
= 64 * 4;
861 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
864 if (pc
- func_start
< spu_max_epilogue_size
)
865 epilogue_start
= func_start
;
867 epilogue_start
= pc
- spu_max_epilogue_size
;
869 if (func_end
- pc
< spu_max_epilogue_size
)
870 epilogue_end
= func_end
;
872 epilogue_end
= pc
+ spu_max_epilogue_size
;
874 /* Scan forward until next 'bi $0'. */
876 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
878 if (target_read_memory (scan_pc
, buf
, 4))
880 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
882 if (is_branch (insn
, &immed
, &ra
))
884 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
890 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
891 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
892 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
894 if (rt
== SPU_RAW_SP_REGNUM
)
899 if (scan_pc
>= epilogue_end
)
902 /* Scan backward until adjustment to stack pointer (R1). */
904 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
906 if (target_read_memory (scan_pc
, buf
, 4))
908 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
910 if (is_branch (insn
, &immed
, &ra
))
913 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
914 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
915 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
917 if (rt
== SPU_RAW_SP_REGNUM
)
926 /* Normal stack frames. */
928 struct spu_unwind_cache
931 CORE_ADDR frame_base
;
932 CORE_ADDR local_base
;
934 struct trad_frame_saved_reg
*saved_regs
;
937 static struct spu_unwind_cache
*
938 spu_frame_unwind_cache (struct frame_info
*this_frame
,
939 void **this_prologue_cache
)
941 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
942 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
943 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
944 struct spu_unwind_cache
*info
;
945 struct spu_prologue_data data
;
946 CORE_ADDR id
= tdep
->id
;
949 if (*this_prologue_cache
)
950 return *this_prologue_cache
;
952 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
953 *this_prologue_cache
= info
;
954 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
955 info
->frame_base
= 0;
956 info
->local_base
= 0;
958 /* Find the start of the current function, and analyze its prologue. */
959 info
->func
= get_frame_func (this_frame
);
962 /* Fall back to using the current PC as frame ID. */
963 info
->func
= get_frame_pc (this_frame
);
967 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
970 /* If successful, use prologue analysis data. */
971 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
976 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
977 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
978 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
979 cfa
= SPUADDR (id
, cfa
);
981 /* Call-saved register slots. */
982 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
983 if (i
== SPU_LR_REGNUM
984 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
985 if (data
.reg_offset
[i
] != -1)
986 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
989 info
->frame_base
= cfa
;
990 info
->local_base
= cfa
- data
.size
;
993 /* Otherwise, fall back to reading the backchain link. */
1001 /* Get local store limit. */
1002 lslr
= get_frame_register_unsigned (this_frame
, SPU_LSLR_REGNUM
);
1004 lslr
= (ULONGEST
) -1;
1006 /* Get the backchain. */
1007 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1008 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1011 /* A zero backchain terminates the frame chain. Also, sanity
1012 check against the local store size limit. */
1013 if (status
&& backchain
> 0 && backchain
<= lslr
)
1015 /* Assume the link register is saved into its slot. */
1016 if (backchain
+ 16 <= lslr
)
1017 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
,
1021 info
->frame_base
= SPUADDR (id
, backchain
);
1022 info
->local_base
= SPUADDR (id
, reg
);
1026 /* If we didn't find a frame, we cannot determine SP / return address. */
1027 if (info
->frame_base
== 0)
1030 /* The previous SP is equal to the CFA. */
1031 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1032 SPUADDR_ADDR (info
->frame_base
));
1034 /* Read full contents of the unwound link register in order to
1035 be able to determine the return address. */
1036 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1037 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1039 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1041 /* Normally, the return address is contained in the slot 0 of the
1042 link register, and slots 1-3 are zero. For an overlay return,
1043 slot 0 contains the address of the overlay manager return stub,
1044 slot 1 contains the partition number of the overlay section to
1045 be returned to, and slot 2 contains the return address within
1046 that section. Return the latter address in that case. */
1047 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1048 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1049 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1051 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1052 extract_unsigned_integer (buf
, 4, byte_order
));
1058 spu_frame_this_id (struct frame_info
*this_frame
,
1059 void **this_prologue_cache
, struct frame_id
*this_id
)
1061 struct spu_unwind_cache
*info
=
1062 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1064 if (info
->frame_base
== 0)
1067 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1070 static struct value
*
1071 spu_frame_prev_register (struct frame_info
*this_frame
,
1072 void **this_prologue_cache
, int regnum
)
1074 struct spu_unwind_cache
*info
1075 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1077 /* Special-case the stack pointer. */
1078 if (regnum
== SPU_RAW_SP_REGNUM
)
1079 regnum
= SPU_SP_REGNUM
;
1081 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1084 static const struct frame_unwind spu_frame_unwind
= {
1086 default_frame_unwind_stop_reason
,
1088 spu_frame_prev_register
,
1090 default_frame_sniffer
1094 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1096 struct spu_unwind_cache
*info
1097 = spu_frame_unwind_cache (this_frame
, this_cache
);
1098 return info
->local_base
;
1101 static const struct frame_base spu_frame_base
= {
1103 spu_frame_base_address
,
1104 spu_frame_base_address
,
1105 spu_frame_base_address
1109 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1111 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1112 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1113 /* Mask off interrupt enable bit. */
1114 return SPUADDR (tdep
->id
, pc
& -4);
1118 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1120 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1121 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1122 return SPUADDR (tdep
->id
, sp
);
1126 spu_read_pc (struct regcache
*regcache
)
1128 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1130 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1131 /* Mask off interrupt enable bit. */
1132 return SPUADDR (tdep
->id
, pc
& -4);
1136 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1138 /* Keep interrupt enabled state unchanged. */
1141 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1142 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1143 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1147 /* Cell/B.E. cross-architecture unwinder support. */
1149 struct spu2ppu_cache
1151 struct frame_id frame_id
;
1152 struct regcache
*regcache
;
1155 static struct gdbarch
*
1156 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1158 struct spu2ppu_cache
*cache
= *this_cache
;
1159 return get_regcache_arch (cache
->regcache
);
1163 spu2ppu_this_id (struct frame_info
*this_frame
,
1164 void **this_cache
, struct frame_id
*this_id
)
1166 struct spu2ppu_cache
*cache
= *this_cache
;
1167 *this_id
= cache
->frame_id
;
1170 static struct value
*
1171 spu2ppu_prev_register (struct frame_info
*this_frame
,
1172 void **this_cache
, int regnum
)
1174 struct spu2ppu_cache
*cache
= *this_cache
;
1175 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1178 buf
= alloca (register_size (gdbarch
, regnum
));
1179 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1180 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1184 spu2ppu_sniffer (const struct frame_unwind
*self
,
1185 struct frame_info
*this_frame
, void **this_prologue_cache
)
1187 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1188 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1189 CORE_ADDR base
, func
, backchain
;
1192 if (gdbarch_bfd_arch_info (target_gdbarch ())->arch
== bfd_arch_spu
)
1195 base
= get_frame_sp (this_frame
);
1196 func
= get_frame_pc (this_frame
);
1197 if (target_read_memory (base
, buf
, 4))
1199 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1203 struct frame_info
*fi
;
1205 struct spu2ppu_cache
*cache
1206 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1208 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1210 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1211 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1216 cache
->regcache
= frame_save_as_regcache (fi
);
1217 *this_prologue_cache
= cache
;
1222 struct regcache
*regcache
;
1223 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch ());
1224 cache
->regcache
= regcache_dup (regcache
);
1225 *this_prologue_cache
= cache
;
1234 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1236 struct spu2ppu_cache
*cache
= this_cache
;
1237 regcache_xfree (cache
->regcache
);
1240 static const struct frame_unwind spu2ppu_unwind
= {
1242 default_frame_unwind_stop_reason
,
1244 spu2ppu_prev_register
,
1247 spu2ppu_dealloc_cache
,
1252 /* Function calling convention. */
1255 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1261 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1262 struct value
**args
, int nargs
, struct type
*value_type
,
1263 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1264 struct regcache
*regcache
)
1266 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1267 sp
= (sp
- 4) & ~15;
1268 /* Store the address of that breakpoint */
1270 /* The call starts at the callee's entry point. */
1277 spu_scalar_value_p (struct type
*type
)
1279 switch (TYPE_CODE (type
))
1282 case TYPE_CODE_ENUM
:
1283 case TYPE_CODE_RANGE
:
1284 case TYPE_CODE_CHAR
:
1285 case TYPE_CODE_BOOL
:
1288 return TYPE_LENGTH (type
) <= 16;
1296 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1297 struct type
*type
, const gdb_byte
*in
)
1299 int len
= TYPE_LENGTH (type
);
1301 if (spu_scalar_value_p (type
))
1303 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1304 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1310 regcache_cooked_write (regcache
, regnum
++, in
);
1316 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1321 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1322 struct type
*type
, gdb_byte
*out
)
1324 int len
= TYPE_LENGTH (type
);
1326 if (spu_scalar_value_p (type
))
1328 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1329 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1335 regcache_cooked_read (regcache
, regnum
++, out
);
1341 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1346 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1347 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1348 int nargs
, struct value
**args
, CORE_ADDR sp
,
1349 int struct_return
, CORE_ADDR struct_addr
)
1351 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1354 int regnum
= SPU_ARG1_REGNUM
;
1358 /* Set the return address. */
1359 memset (buf
, 0, sizeof buf
);
1360 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1361 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1363 /* If STRUCT_RETURN is true, then the struct return address (in
1364 STRUCT_ADDR) will consume the first argument-passing register.
1365 Both adjust the register count and store that value. */
1368 memset (buf
, 0, sizeof buf
);
1369 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1370 regcache_cooked_write (regcache
, regnum
++, buf
);
1373 /* Fill in argument registers. */
1374 for (i
= 0; i
< nargs
; i
++)
1376 struct value
*arg
= args
[i
];
1377 struct type
*type
= check_typedef (value_type (arg
));
1378 const gdb_byte
*contents
= value_contents (arg
);
1379 int n_regs
= align_up (TYPE_LENGTH (type
), 16) / 16;
1381 /* If the argument doesn't wholly fit into registers, it and
1382 all subsequent arguments go to the stack. */
1383 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1389 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1393 /* Overflow arguments go to the stack. */
1394 if (stack_arg
!= -1)
1398 /* Allocate all required stack size. */
1399 for (i
= stack_arg
; i
< nargs
; i
++)
1401 struct type
*type
= check_typedef (value_type (args
[i
]));
1402 sp
-= align_up (TYPE_LENGTH (type
), 16);
1405 /* Fill in stack arguments. */
1407 for (i
= stack_arg
; i
< nargs
; i
++)
1409 struct value
*arg
= args
[i
];
1410 struct type
*type
= check_typedef (value_type (arg
));
1411 int len
= TYPE_LENGTH (type
);
1414 if (spu_scalar_value_p (type
))
1415 preferred_slot
= len
< 4 ? 4 - len
: 0;
1419 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1420 ap
+= align_up (TYPE_LENGTH (type
), 16);
1424 /* Allocate stack frame header. */
1427 /* Store stack back chain. */
1428 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1429 target_write_memory (sp
, buf
, 16);
1431 /* Finally, update all slots of the SP register. */
1432 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1433 for (i
= 0; i
< 4; i
++)
1435 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1436 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1438 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1443 static struct frame_id
1444 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1446 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1447 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1448 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1449 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1452 /* Function return value access. */
1454 static enum return_value_convention
1455 spu_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1456 struct type
*type
, struct regcache
*regcache
,
1457 gdb_byte
*out
, const gdb_byte
*in
)
1459 struct type
*func_type
= function
? value_type (function
) : NULL
;
1460 enum return_value_convention rvc
;
1461 int opencl_vector
= 0;
1465 func_type
= check_typedef (func_type
);
1467 if (TYPE_CODE (func_type
) == TYPE_CODE_PTR
)
1468 func_type
= check_typedef (TYPE_TARGET_TYPE (func_type
));
1470 if (TYPE_CODE (func_type
) == TYPE_CODE_FUNC
1471 && TYPE_CALLING_CONVENTION (func_type
) == DW_CC_GDB_IBM_OpenCL
1472 && TYPE_CODE (type
) == TYPE_CODE_ARRAY
1473 && TYPE_VECTOR (type
))
1477 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1478 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1480 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1486 case RETURN_VALUE_REGISTER_CONVENTION
:
1487 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1488 regcache_cooked_write_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, in
);
1490 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1493 case RETURN_VALUE_STRUCT_CONVENTION
:
1494 error (_("Cannot set function return value."));
1502 case RETURN_VALUE_REGISTER_CONVENTION
:
1503 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1504 regcache_cooked_read_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, out
);
1506 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1509 case RETURN_VALUE_STRUCT_CONVENTION
:
1510 error (_("Function return value unknown."));
1521 static const gdb_byte
*
1522 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
,
1523 CORE_ADDR
* pcptr
, int *lenptr
)
1525 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1527 *lenptr
= sizeof breakpoint
;
1532 spu_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
1533 struct bp_target_info
*bp_tgt
)
1535 /* We work around a problem in combined Cell/B.E. debugging here. Consider
1536 that in a combined application, we have some breakpoints inserted in SPU
1537 code, and now the application forks (on the PPU side). GDB common code
1538 will assume that the fork system call copied all breakpoints into the new
1539 process' address space, and that all those copies now need to be removed
1540 (see breakpoint.c:detach_breakpoints).
1542 While this is certainly true for PPU side breakpoints, it is not true
1543 for SPU side breakpoints. fork will clone the SPU context file
1544 descriptors, so that all the existing SPU contexts are in accessible
1545 in the new process. However, the contents of the SPU contexts themselves
1546 are *not* cloned. Therefore the effect of detach_breakpoints is to
1547 remove SPU breakpoints from the *original* SPU context's local store
1548 -- this is not the correct behaviour.
1550 The workaround is to check whether the PID we are asked to remove this
1551 breakpoint from (i.e. ptid_get_pid (inferior_ptid)) is different from the
1552 PID of the current inferior (i.e. current_inferior ()->pid). This is only
1553 true in the context of detach_breakpoints. If so, we simply do nothing.
1554 [ Note that for the fork child process, it does not matter if breakpoints
1555 remain inserted, because those SPU contexts are not runnable anyway --
1556 the Linux kernel allows only the original process to invoke spu_run. */
1558 if (ptid_get_pid (inferior_ptid
) != current_inferior ()->pid
)
1561 return default_memory_remove_breakpoint (gdbarch
, bp_tgt
);
1565 /* Software single-stepping support. */
1568 spu_software_single_step (struct frame_info
*frame
)
1570 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1571 struct address_space
*aspace
= get_frame_address_space (frame
);
1572 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1573 CORE_ADDR pc
, next_pc
;
1579 pc
= get_frame_pc (frame
);
1581 if (target_read_memory (pc
, buf
, 4))
1583 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1585 /* Get local store limit. */
1586 lslr
= get_frame_register_unsigned (frame
, SPU_LSLR_REGNUM
);
1588 lslr
= (ULONGEST
) -1;
1590 /* Next sequential instruction is at PC + 4, except if the current
1591 instruction is a PPE-assisted call, in which case it is at PC + 8.
1592 Wrap around LS limit to be on the safe side. */
1593 if ((insn
& 0xffffff00) == 0x00002100)
1594 next_pc
= (SPUADDR_ADDR (pc
) + 8) & lslr
;
1596 next_pc
= (SPUADDR_ADDR (pc
) + 4) & lslr
;
1598 insert_single_step_breakpoint (gdbarch
,
1599 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1601 if (is_branch (insn
, &offset
, ®
))
1603 CORE_ADDR target
= offset
;
1605 if (reg
== SPU_PC_REGNUM
)
1606 target
+= SPUADDR_ADDR (pc
);
1611 if (get_frame_register_bytes (frame
, reg
, 0, 4, buf
,
1613 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1617 throw_error (OPTIMIZED_OUT_ERROR
,
1618 _("Could not determine address of "
1619 "single-step breakpoint."));
1621 throw_error (NOT_AVAILABLE_ERROR
,
1622 _("Could not determine address of "
1623 "single-step breakpoint."));
1627 target
= target
& lslr
;
1628 if (target
!= next_pc
)
1629 insert_single_step_breakpoint (gdbarch
, aspace
,
1630 SPUADDR (SPUADDR_SPU (pc
), target
));
1637 /* Longjmp support. */
1640 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1642 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1643 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1644 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1649 /* Jump buffer is pointed to by the argument register $r3. */
1650 if (!get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
,
1654 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1655 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1658 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1659 *pc
= SPUADDR (tdep
->id
, *pc
);
1666 struct spu_dis_asm_data
1668 struct gdbarch
*gdbarch
;
1673 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1675 struct spu_dis_asm_data
*data
= info
->application_data
;
1676 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1680 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1682 /* The opcodes disassembler does 18-bit address arithmetic. Make
1683 sure the SPU ID encoded in the high bits is added back when we
1684 call print_address. */
1685 struct disassemble_info spu_info
= *info
;
1686 struct spu_dis_asm_data data
;
1687 data
.gdbarch
= info
->application_data
;
1688 data
.id
= SPUADDR_SPU (memaddr
);
1690 spu_info
.application_data
= &data
;
1691 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1692 return print_insn_spu (memaddr
, &spu_info
);
1696 /* Target overlays for the SPU overlay manager.
1698 See the documentation of simple_overlay_update for how the
1699 interface is supposed to work.
1701 Data structures used by the overlay manager:
1709 } _ovly_table[]; -- one entry per overlay section
1711 struct ovly_buf_table
1714 } _ovly_buf_table[]; -- one entry per overlay buffer
1716 _ovly_table should never change.
1718 Both tables are aligned to a 16-byte boundary, the symbols
1719 _ovly_table and _ovly_buf_table are of type STT_OBJECT and their
1720 size set to the size of the respective array. buf in _ovly_table is
1721 an index into _ovly_buf_table.
1723 mapped is an index into _ovly_table. Both the mapped and buf indices start
1724 from one to reference the first entry in their respective tables. */
1726 /* Using the per-objfile private data mechanism, we store for each
1727 objfile an array of "struct spu_overlay_table" structures, one
1728 for each obj_section of the objfile. This structure holds two
1729 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1730 is *not* an overlay section. If it is non-zero, it represents
1731 a target address. The overlay section is mapped iff the target
1732 integer at this location equals MAPPED_VAL. */
1734 static const struct objfile_data
*spu_overlay_data
;
1736 struct spu_overlay_table
1738 CORE_ADDR mapped_ptr
;
1739 CORE_ADDR mapped_val
;
1742 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1743 the _ovly_table data structure from the target and initialize the
1744 spu_overlay_table data structure from it. */
1745 static struct spu_overlay_table
*
1746 spu_get_overlay_table (struct objfile
*objfile
)
1748 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1749 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1750 struct bound_minimal_symbol ovly_table_msym
, ovly_buf_table_msym
;
1751 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1752 unsigned ovly_table_size
, ovly_buf_table_size
;
1753 struct spu_overlay_table
*tbl
;
1754 struct obj_section
*osect
;
1755 gdb_byte
*ovly_table
;
1758 tbl
= objfile_data (objfile
, spu_overlay_data
);
1762 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1763 if (!ovly_table_msym
.minsym
)
1766 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table",
1768 if (!ovly_buf_table_msym
.minsym
)
1771 ovly_table_base
= BMSYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1772 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
.minsym
);
1774 ovly_buf_table_base
= BMSYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1775 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
.minsym
);
1777 ovly_table
= xmalloc (ovly_table_size
);
1778 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1780 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1781 objfile
->sections_end
- objfile
->sections
,
1782 struct spu_overlay_table
);
1784 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1786 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1788 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1790 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1792 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1795 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1798 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1799 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1800 && pos
== osect
->the_bfd_section
->filepos
)
1802 int ndx
= osect
- objfile
->sections
;
1803 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1804 tbl
[ndx
].mapped_val
= i
+ 1;
1810 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1814 /* Read _ovly_buf_table entry from the target to dermine whether
1815 OSECT is currently mapped, and update the mapped state. */
1817 spu_overlay_update_osect (struct obj_section
*osect
)
1819 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1820 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1821 struct spu_overlay_table
*ovly_table
;
1824 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1828 ovly_table
+= osect
- osect
->objfile
->sections
;
1829 if (ovly_table
->mapped_ptr
== 0)
1832 id
= SPUADDR_SPU (obj_section_addr (osect
));
1833 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1835 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1838 /* If OSECT is NULL, then update all sections' mapped state.
1839 If OSECT is non-NULL, then update only OSECT's mapped state. */
1841 spu_overlay_update (struct obj_section
*osect
)
1843 /* Just one section. */
1845 spu_overlay_update_osect (osect
);
1850 struct objfile
*objfile
;
1852 ALL_OBJSECTIONS (objfile
, osect
)
1853 if (section_is_overlay (osect
))
1854 spu_overlay_update_osect (osect
);
1858 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1859 If there is one, go through all sections and make sure for non-
1860 overlay sections LMA equals VMA, while for overlay sections LMA
1861 is larger than SPU_OVERLAY_LMA. */
1863 spu_overlay_new_objfile (struct objfile
*objfile
)
1865 struct spu_overlay_table
*ovly_table
;
1866 struct obj_section
*osect
;
1868 /* If we've already touched this file, do nothing. */
1869 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1872 /* Consider only SPU objfiles. */
1873 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1876 /* Check if this objfile has overlays. */
1877 ovly_table
= spu_get_overlay_table (objfile
);
1881 /* Now go and fiddle with all the LMAs. */
1882 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1884 bfd
*obfd
= objfile
->obfd
;
1885 asection
*bsect
= osect
->the_bfd_section
;
1886 int ndx
= osect
- objfile
->sections
;
1888 if (ovly_table
[ndx
].mapped_ptr
== 0)
1889 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1891 bfd_section_lma (obfd
, bsect
) = SPU_OVERLAY_LMA
+ bsect
->filepos
;
1896 /* Insert temporary breakpoint on "main" function of newly loaded
1897 SPE context OBJFILE. */
1899 spu_catch_start (struct objfile
*objfile
)
1901 struct bound_minimal_symbol minsym
;
1902 struct symtab
*symtab
;
1906 /* Do this only if requested by "set spu stop-on-load on". */
1907 if (!spu_stop_on_load_p
)
1910 /* Consider only SPU objfiles. */
1911 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1914 /* The main objfile is handled differently. */
1915 if (objfile
== symfile_objfile
)
1918 /* There can be multiple symbols named "main". Search for the
1919 "main" in *this* objfile. */
1920 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1924 /* If we have debugging information, try to use it -- this
1925 will allow us to properly skip the prologue. */
1926 pc
= BMSYMBOL_VALUE_ADDRESS (minsym
);
1927 symtab
= find_pc_sect_symtab (pc
, MSYMBOL_OBJ_SECTION (minsym
.objfile
,
1931 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1932 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1934 struct symtab_and_line sal
;
1936 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1939 fixup_symbol_section (sym
, objfile
);
1940 sal
= find_function_start_sal (sym
, 1);
1945 /* Use a numerical address for the set_breakpoint command to avoid having
1946 the breakpoint re-set incorrectly. */
1947 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1948 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1949 NULL
/* cond_string */, -1 /* thread */,
1950 NULL
/* extra_string */,
1951 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1952 bp_breakpoint
/* type_wanted */,
1953 0 /* ignore_count */,
1954 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1955 &bkpt_breakpoint_ops
/* ops */, 0 /* from_tty */,
1956 1 /* enabled */, 0 /* internal */, 0);
1960 /* Look up OBJFILE loaded into FRAME's SPU context. */
1961 static struct objfile
*
1962 spu_objfile_from_frame (struct frame_info
*frame
)
1964 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1965 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1966 struct objfile
*obj
;
1968 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1973 if (obj
->sections
!= obj
->sections_end
1974 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1981 /* Flush cache for ea pointer access if available. */
1983 flush_ea_cache (void)
1985 struct bound_minimal_symbol msymbol
;
1986 struct objfile
*obj
;
1988 if (!has_stack_frames ())
1991 obj
= spu_objfile_from_frame (get_current_frame ());
1995 /* Lookup inferior function __cache_flush. */
1996 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1997 if (msymbol
.minsym
!= NULL
)
2002 type
= objfile_type (obj
)->builtin_void
;
2003 type
= lookup_function_type (type
);
2004 type
= lookup_pointer_type (type
);
2005 addr
= BMSYMBOL_VALUE_ADDRESS (msymbol
);
2007 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
2011 /* This handler is called when the inferior has stopped. If it is stopped in
2012 SPU architecture then flush the ea cache if used. */
2014 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
2016 if (!spu_auto_flush_cache_p
)
2019 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
2020 re-entering this function when __cache_flush stops. */
2021 spu_auto_flush_cache_p
= 0;
2023 spu_auto_flush_cache_p
= 1;
2027 /* "info spu" commands. */
2030 info_spu_event_command (char *args
, int from_tty
)
2032 struct frame_info
*frame
= get_selected_frame (NULL
);
2033 ULONGEST event_status
= 0;
2034 ULONGEST event_mask
= 0;
2035 struct cleanup
*chain
;
2041 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2042 error (_("\"info spu\" is only supported on the SPU architecture."));
2044 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2046 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
2047 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2048 buf
, 0, (sizeof (buf
) - 1));
2050 error (_("Could not read event_status."));
2052 event_status
= strtoulst ((char *) buf
, NULL
, 16);
2054 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
2055 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2056 buf
, 0, (sizeof (buf
) - 1));
2058 error (_("Could not read event_mask."));
2060 event_mask
= strtoulst ((char *) buf
, NULL
, 16);
2062 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoEvent");
2064 if (ui_out_is_mi_like_p (current_uiout
))
2066 ui_out_field_fmt (current_uiout
, "event_status",
2067 "0x%s", phex_nz (event_status
, 4));
2068 ui_out_field_fmt (current_uiout
, "event_mask",
2069 "0x%s", phex_nz (event_mask
, 4));
2073 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
2074 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
2077 do_cleanups (chain
);
2081 info_spu_signal_command (char *args
, int from_tty
)
2083 struct frame_info
*frame
= get_selected_frame (NULL
);
2084 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2085 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2086 ULONGEST signal1
= 0;
2087 ULONGEST signal1_type
= 0;
2088 int signal1_pending
= 0;
2089 ULONGEST signal2
= 0;
2090 ULONGEST signal2_type
= 0;
2091 int signal2_pending
= 0;
2092 struct cleanup
*chain
;
2098 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2099 error (_("\"info spu\" is only supported on the SPU architecture."));
2101 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2103 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2104 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2106 error (_("Could not read signal1."));
2109 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2110 signal1_pending
= 1;
2113 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2114 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2115 buf
, 0, (sizeof (buf
) - 1));
2117 error (_("Could not read signal1_type."));
2119 signal1_type
= strtoulst ((char *) buf
, NULL
, 16);
2121 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2122 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2124 error (_("Could not read signal2."));
2127 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2128 signal2_pending
= 1;
2131 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2132 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2133 buf
, 0, (sizeof (buf
) - 1));
2135 error (_("Could not read signal2_type."));
2137 signal2_type
= strtoulst ((char *) buf
, NULL
, 16);
2139 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoSignal");
2141 if (ui_out_is_mi_like_p (current_uiout
))
2143 ui_out_field_int (current_uiout
, "signal1_pending", signal1_pending
);
2144 ui_out_field_fmt (current_uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2145 ui_out_field_int (current_uiout
, "signal1_type", signal1_type
);
2146 ui_out_field_int (current_uiout
, "signal2_pending", signal2_pending
);
2147 ui_out_field_fmt (current_uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2148 ui_out_field_int (current_uiout
, "signal2_type", signal2_type
);
2152 if (signal1_pending
)
2153 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2155 printf_filtered (_("Signal 1 not pending "));
2158 printf_filtered (_("(Type Or)\n"));
2160 printf_filtered (_("(Type Overwrite)\n"));
2162 if (signal2_pending
)
2163 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2165 printf_filtered (_("Signal 2 not pending "));
2168 printf_filtered (_("(Type Or)\n"));
2170 printf_filtered (_("(Type Overwrite)\n"));
2173 do_cleanups (chain
);
2177 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2178 const char *field
, const char *msg
)
2180 struct cleanup
*chain
;
2186 chain
= make_cleanup_ui_out_table_begin_end (current_uiout
, 1, nr
, "mbox");
2188 ui_out_table_header (current_uiout
, 32, ui_left
, field
, msg
);
2189 ui_out_table_body (current_uiout
);
2191 for (i
= 0; i
< nr
; i
++)
2193 struct cleanup
*val_chain
;
2195 val_chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "mbox");
2196 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2197 ui_out_field_fmt (current_uiout
, field
, "0x%s", phex (val
, 4));
2198 do_cleanups (val_chain
);
2200 if (!ui_out_is_mi_like_p (current_uiout
))
2201 printf_filtered ("\n");
2204 do_cleanups (chain
);
2208 info_spu_mailbox_command (char *args
, int from_tty
)
2210 struct frame_info
*frame
= get_selected_frame (NULL
);
2211 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2212 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2213 struct cleanup
*chain
;
2219 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2220 error (_("\"info spu\" is only supported on the SPU architecture."));
2222 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2224 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoMailbox");
2226 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2227 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2228 buf
, 0, sizeof buf
);
2230 error (_("Could not read mbox_info."));
2232 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2233 "mbox", "SPU Outbound Mailbox");
2235 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2236 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2237 buf
, 0, sizeof buf
);
2239 error (_("Could not read ibox_info."));
2241 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2242 "ibox", "SPU Outbound Interrupt Mailbox");
2244 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2245 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2246 buf
, 0, sizeof buf
);
2248 error (_("Could not read wbox_info."));
2250 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2251 "wbox", "SPU Inbound Mailbox");
2253 do_cleanups (chain
);
2257 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2259 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2260 return (word
>> (63 - last
)) & mask
;
2264 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2266 static char *spu_mfc_opcode
[256] =
2268 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2269 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2270 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2271 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2272 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2273 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2274 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2275 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2276 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2277 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2278 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2279 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2280 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2281 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2282 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2283 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2284 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2285 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2286 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2287 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2288 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2289 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2290 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2291 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2292 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2293 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2294 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2295 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2296 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2297 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2298 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2299 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2302 int *seq
= alloca (nr
* sizeof (int));
2304 struct cleanup
*chain
;
2308 /* Determine sequence in which to display (valid) entries. */
2309 for (i
= 0; i
< nr
; i
++)
2311 /* Search for the first valid entry all of whose
2312 dependencies are met. */
2313 for (j
= 0; j
< nr
; j
++)
2315 ULONGEST mfc_cq_dw3
;
2316 ULONGEST dependencies
;
2318 if (done
& (1 << (nr
- 1 - j
)))
2322 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2323 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2326 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2327 if ((dependencies
& done
) != dependencies
)
2331 done
|= 1 << (nr
- 1 - j
);
2342 chain
= make_cleanup_ui_out_table_begin_end (current_uiout
, 10, nr
,
2345 ui_out_table_header (current_uiout
, 7, ui_left
, "opcode", "Opcode");
2346 ui_out_table_header (current_uiout
, 3, ui_left
, "tag", "Tag");
2347 ui_out_table_header (current_uiout
, 3, ui_left
, "tid", "TId");
2348 ui_out_table_header (current_uiout
, 3, ui_left
, "rid", "RId");
2349 ui_out_table_header (current_uiout
, 18, ui_left
, "ea", "EA");
2350 ui_out_table_header (current_uiout
, 7, ui_left
, "lsa", "LSA");
2351 ui_out_table_header (current_uiout
, 7, ui_left
, "size", "Size");
2352 ui_out_table_header (current_uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2353 ui_out_table_header (current_uiout
, 7, ui_left
, "lstsize", "LstSize");
2354 ui_out_table_header (current_uiout
, 1, ui_left
, "error_p", "E");
2356 ui_out_table_body (current_uiout
);
2358 for (i
= 0; i
< nr
; i
++)
2360 struct cleanup
*cmd_chain
;
2361 ULONGEST mfc_cq_dw0
;
2362 ULONGEST mfc_cq_dw1
;
2363 ULONGEST mfc_cq_dw2
;
2364 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2365 int list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2367 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2369 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2370 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2373 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2375 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2377 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2379 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2380 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2381 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2382 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2383 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2384 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2385 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2387 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2388 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2390 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2391 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2392 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2393 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2394 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2395 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2397 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "cmd");
2399 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2400 ui_out_field_string (current_uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2402 ui_out_field_int (current_uiout
, "opcode", mfc_cmd_opcode
);
2404 ui_out_field_int (current_uiout
, "tag", mfc_cmd_tag
);
2405 ui_out_field_int (current_uiout
, "tid", tclass_id
);
2406 ui_out_field_int (current_uiout
, "rid", rclass_id
);
2409 ui_out_field_fmt (current_uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2411 ui_out_field_skip (current_uiout
, "ea");
2413 ui_out_field_fmt (current_uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2415 ui_out_field_fmt (current_uiout
, "size", "0x%05x", mfc_size
<< 4);
2417 ui_out_field_fmt (current_uiout
, "size", "0x%05x", mfc_size
);
2421 ui_out_field_fmt (current_uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2422 ui_out_field_fmt (current_uiout
, "lstsize", "0x%05x", list_size
<< 3);
2426 ui_out_field_skip (current_uiout
, "lstaddr");
2427 ui_out_field_skip (current_uiout
, "lstsize");
2431 ui_out_field_string (current_uiout
, "error_p", "*");
2433 ui_out_field_skip (current_uiout
, "error_p");
2435 do_cleanups (cmd_chain
);
2437 if (!ui_out_is_mi_like_p (current_uiout
))
2438 printf_filtered ("\n");
2441 do_cleanups (chain
);
2445 info_spu_dma_command (char *args
, int from_tty
)
2447 struct frame_info
*frame
= get_selected_frame (NULL
);
2448 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2449 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2450 ULONGEST dma_info_type
;
2451 ULONGEST dma_info_mask
;
2452 ULONGEST dma_info_status
;
2453 ULONGEST dma_info_stall_and_notify
;
2454 ULONGEST dma_info_atomic_command_status
;
2455 struct cleanup
*chain
;
2461 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2462 error (_("\"info spu\" is only supported on the SPU architecture."));
2464 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2466 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2467 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2468 buf
, 0, 40 + 16 * 32);
2470 error (_("Could not read dma_info."));
2473 = extract_unsigned_integer (buf
, 8, byte_order
);
2475 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2477 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2478 dma_info_stall_and_notify
2479 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2480 dma_info_atomic_command_status
2481 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2483 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoDMA");
2485 if (ui_out_is_mi_like_p (current_uiout
))
2487 ui_out_field_fmt (current_uiout
, "dma_info_type", "0x%s",
2488 phex_nz (dma_info_type
, 4));
2489 ui_out_field_fmt (current_uiout
, "dma_info_mask", "0x%s",
2490 phex_nz (dma_info_mask
, 4));
2491 ui_out_field_fmt (current_uiout
, "dma_info_status", "0x%s",
2492 phex_nz (dma_info_status
, 4));
2493 ui_out_field_fmt (current_uiout
, "dma_info_stall_and_notify", "0x%s",
2494 phex_nz (dma_info_stall_and_notify
, 4));
2495 ui_out_field_fmt (current_uiout
, "dma_info_atomic_command_status", "0x%s",
2496 phex_nz (dma_info_atomic_command_status
, 4));
2500 const char *query_msg
= _("no query pending");
2502 if (dma_info_type
& 4)
2503 switch (dma_info_type
& 3)
2505 case 1: query_msg
= _("'any' query pending"); break;
2506 case 2: query_msg
= _("'all' query pending"); break;
2507 default: query_msg
= _("undefined query type"); break;
2510 printf_filtered (_("Tag-Group Status 0x%s\n"),
2511 phex (dma_info_status
, 4));
2512 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2513 phex (dma_info_mask
, 4), query_msg
);
2514 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2515 phex (dma_info_stall_and_notify
, 4));
2516 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2517 phex (dma_info_atomic_command_status
, 4));
2518 printf_filtered ("\n");
2521 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2522 do_cleanups (chain
);
2526 info_spu_proxydma_command (char *args
, int from_tty
)
2528 struct frame_info
*frame
= get_selected_frame (NULL
);
2529 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2530 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2531 ULONGEST dma_info_type
;
2532 ULONGEST dma_info_mask
;
2533 ULONGEST dma_info_status
;
2534 struct cleanup
*chain
;
2540 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2541 error (_("\"info spu\" is only supported on the SPU architecture."));
2543 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2545 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2546 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2547 buf
, 0, 24 + 8 * 32);
2549 error (_("Could not read proxydma_info."));
2551 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2552 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2553 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2555 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
,
2558 if (ui_out_is_mi_like_p (current_uiout
))
2560 ui_out_field_fmt (current_uiout
, "proxydma_info_type", "0x%s",
2561 phex_nz (dma_info_type
, 4));
2562 ui_out_field_fmt (current_uiout
, "proxydma_info_mask", "0x%s",
2563 phex_nz (dma_info_mask
, 4));
2564 ui_out_field_fmt (current_uiout
, "proxydma_info_status", "0x%s",
2565 phex_nz (dma_info_status
, 4));
2569 const char *query_msg
;
2571 switch (dma_info_type
& 3)
2573 case 0: query_msg
= _("no query pending"); break;
2574 case 1: query_msg
= _("'any' query pending"); break;
2575 case 2: query_msg
= _("'all' query pending"); break;
2576 default: query_msg
= _("undefined query type"); break;
2579 printf_filtered (_("Tag-Group Status 0x%s\n"),
2580 phex (dma_info_status
, 4));
2581 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2582 phex (dma_info_mask
, 4), query_msg
);
2583 printf_filtered ("\n");
2586 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2587 do_cleanups (chain
);
2591 info_spu_command (char *args
, int from_tty
)
2593 printf_unfiltered (_("\"info spu\" must be followed by "
2594 "the name of an SPU facility.\n"));
2595 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2599 /* Root of all "set spu "/"show spu " commands. */
2602 show_spu_command (char *args
, int from_tty
)
2604 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2608 set_spu_command (char *args
, int from_tty
)
2610 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2614 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2615 struct cmd_list_element
*c
, const char *value
)
2617 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2622 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2623 struct cmd_list_element
*c
, const char *value
)
2625 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2630 /* Set up gdbarch struct. */
2632 static struct gdbarch
*
2633 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2635 struct gdbarch
*gdbarch
;
2636 struct gdbarch_tdep
*tdep
;
2639 /* Which spufs ID was requested as address space? */
2641 id
= *(int *)info
.tdep_info
;
2642 /* For objfile architectures of SPU solibs, decode the ID from the name.
2643 This assumes the filename convention employed by solib-spu.c. */
2646 char *name
= strrchr (info
.abfd
->filename
, '@');
2648 sscanf (name
, "@0x%*x <%d>", &id
);
2651 /* Find a candidate among extant architectures. */
2652 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2654 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2656 tdep
= gdbarch_tdep (arches
->gdbarch
);
2657 if (tdep
&& tdep
->id
== id
)
2658 return arches
->gdbarch
;
2661 /* None found, so create a new architecture. */
2662 tdep
= XCNEW (struct gdbarch_tdep
);
2664 gdbarch
= gdbarch_alloc (&info
, tdep
);
2667 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2670 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2671 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2672 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2673 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2674 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2675 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2676 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2677 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2678 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2679 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2680 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2681 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2684 set_gdbarch_char_signed (gdbarch
, 0);
2685 set_gdbarch_ptr_bit (gdbarch
, 32);
2686 set_gdbarch_addr_bit (gdbarch
, 32);
2687 set_gdbarch_short_bit (gdbarch
, 16);
2688 set_gdbarch_int_bit (gdbarch
, 32);
2689 set_gdbarch_long_bit (gdbarch
, 32);
2690 set_gdbarch_long_long_bit (gdbarch
, 64);
2691 set_gdbarch_float_bit (gdbarch
, 32);
2692 set_gdbarch_double_bit (gdbarch
, 64);
2693 set_gdbarch_long_double_bit (gdbarch
, 64);
2694 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2695 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2696 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2698 /* Address handling. */
2699 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2700 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2701 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2702 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2703 set_gdbarch_address_class_type_flags_to_name
2704 (gdbarch
, spu_address_class_type_flags_to_name
);
2705 set_gdbarch_address_class_name_to_type_flags
2706 (gdbarch
, spu_address_class_name_to_type_flags
);
2709 /* Inferior function calls. */
2710 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2711 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2712 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2713 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2714 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2715 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2716 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2718 /* Frame handling. */
2719 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2720 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2721 frame_base_set_default (gdbarch
, &spu_frame_base
);
2722 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2723 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2724 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2725 set_gdbarch_frame_args_skip (gdbarch
, 0);
2726 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2727 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2729 /* Cell/B.E. cross-architecture unwinder support. */
2730 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2733 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2734 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2735 set_gdbarch_memory_remove_breakpoint (gdbarch
, spu_memory_remove_breakpoint
);
2736 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2737 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2738 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2741 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2746 /* Provide a prototype to silence -Wmissing-prototypes. */
2747 extern initialize_file_ftype _initialize_spu_tdep
;
2750 _initialize_spu_tdep (void)
2752 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2754 /* Add ourselves to objfile event chain. */
2755 observer_attach_new_objfile (spu_overlay_new_objfile
);
2756 spu_overlay_data
= register_objfile_data ();
2758 /* Install spu stop-on-load handler. */
2759 observer_attach_new_objfile (spu_catch_start
);
2761 /* Add ourselves to normal_stop event chain. */
2762 observer_attach_normal_stop (spu_attach_normal_stop
);
2764 /* Add root prefix command for all "set spu"/"show spu" commands. */
2765 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2766 _("Various SPU specific commands."),
2767 &setspucmdlist
, "set spu ", 0, &setlist
);
2768 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2769 _("Various SPU specific commands."),
2770 &showspucmdlist
, "show spu ", 0, &showlist
);
2772 /* Toggle whether or not to add a temporary breakpoint at the "main"
2773 function of new SPE contexts. */
2774 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2775 &spu_stop_on_load_p
, _("\
2776 Set whether to stop for new SPE threads."),
2778 Show whether to stop for new SPE threads."),
2780 Use \"on\" to give control to the user when a new SPE thread\n\
2781 enters its \"main\" function.\n\
2782 Use \"off\" to disable stopping for new SPE threads."),
2784 show_spu_stop_on_load
,
2785 &setspucmdlist
, &showspucmdlist
);
2787 /* Toggle whether or not to automatically flush the software-managed
2788 cache whenever SPE execution stops. */
2789 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2790 &spu_auto_flush_cache_p
, _("\
2791 Set whether to automatically flush the software-managed cache."),
2793 Show whether to automatically flush the software-managed cache."),
2795 Use \"on\" to automatically flush the software-managed cache\n\
2796 whenever SPE execution stops.\n\
2797 Use \"off\" to never automatically flush the software-managed cache."),
2799 show_spu_auto_flush_cache
,
2800 &setspucmdlist
, &showspucmdlist
);
2802 /* Add root prefix command for all "info spu" commands. */
2803 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2804 _("Various SPU specific commands."),
2805 &infospucmdlist
, "info spu ", 0, &infolist
);
2807 /* Add various "info spu" commands. */
2808 add_cmd ("event", class_info
, info_spu_event_command
,
2809 _("Display SPU event facility status.\n"),
2811 add_cmd ("signal", class_info
, info_spu_signal_command
,
2812 _("Display SPU signal notification facility status.\n"),
2814 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2815 _("Display SPU mailbox facility status.\n"),
2817 add_cmd ("dma", class_info
, info_spu_dma_command
,
2818 _("Display MFC DMA status.\n"),
2820 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2821 _("Display MFC Proxy-DMA status.\n"),