1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006-2012 Free Software Foundation, Inc.
4 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
5 Based on a port by Sid Manning <sid@us.ibm.com>.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
30 #include "frame-unwind.h"
31 #include "frame-base.h"
32 #include "trad-frame.h"
41 #include "reggroups.h"
42 #include "floatformat.h"
47 #include "exceptions.h"
51 /* The list of available "set spu " and "show spu " commands. */
52 static struct cmd_list_element
*setspucmdlist
= NULL
;
53 static struct cmd_list_element
*showspucmdlist
= NULL
;
55 /* Whether to stop for new SPE contexts. */
56 static int spu_stop_on_load_p
= 0;
57 /* Whether to automatically flush the SW-managed cache. */
58 static int spu_auto_flush_cache_p
= 1;
61 /* The tdep structure. */
64 /* The spufs ID identifying our address space. */
67 /* SPU-specific vector type. */
68 struct type
*spu_builtin_type_vec128
;
72 /* SPU-specific vector type. */
74 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
76 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
78 if (!tdep
->spu_builtin_type_vec128
)
80 const struct builtin_type
*bt
= builtin_type (gdbarch
);
83 t
= arch_composite_type (gdbarch
,
84 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
85 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
86 append_composite_type_field (t
, "v2_int64",
87 init_vector_type (bt
->builtin_int64
, 2));
88 append_composite_type_field (t
, "v4_int32",
89 init_vector_type (bt
->builtin_int32
, 4));
90 append_composite_type_field (t
, "v8_int16",
91 init_vector_type (bt
->builtin_int16
, 8));
92 append_composite_type_field (t
, "v16_int8",
93 init_vector_type (bt
->builtin_int8
, 16));
94 append_composite_type_field (t
, "v2_double",
95 init_vector_type (bt
->builtin_double
, 2));
96 append_composite_type_field (t
, "v4_float",
97 init_vector_type (bt
->builtin_float
, 4));
100 TYPE_NAME (t
) = "spu_builtin_type_vec128";
102 tdep
->spu_builtin_type_vec128
= t
;
105 return tdep
->spu_builtin_type_vec128
;
109 /* The list of available "info spu " commands. */
110 static struct cmd_list_element
*infospucmdlist
= NULL
;
115 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
117 static char *register_names
[] =
119 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
120 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
121 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
122 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
123 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
124 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
125 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
126 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
127 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
128 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
129 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
130 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
131 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
132 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
133 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
134 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
135 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
140 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
143 return register_names
[reg_nr
];
147 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
149 if (reg_nr
< SPU_NUM_GPRS
)
150 return spu_builtin_type_vec128 (gdbarch
);
155 return builtin_type (gdbarch
)->builtin_uint32
;
158 return builtin_type (gdbarch
)->builtin_func_ptr
;
161 return builtin_type (gdbarch
)->builtin_data_ptr
;
163 case SPU_FPSCR_REGNUM
:
164 return builtin_type (gdbarch
)->builtin_uint128
;
166 case SPU_SRR0_REGNUM
:
167 return builtin_type (gdbarch
)->builtin_uint32
;
169 case SPU_LSLR_REGNUM
:
170 return builtin_type (gdbarch
)->builtin_uint32
;
172 case SPU_DECR_REGNUM
:
173 return builtin_type (gdbarch
)->builtin_uint32
;
175 case SPU_DECR_STATUS_REGNUM
:
176 return builtin_type (gdbarch
)->builtin_uint32
;
179 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
183 /* Pseudo registers for preferred slots - stack pointer. */
185 static enum register_status
186 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
189 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
190 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
191 enum register_status status
;
196 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
197 if (status
!= REG_VALID
)
199 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
200 memset (reg
, 0, sizeof reg
);
201 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
204 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
208 static enum register_status
209 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
210 int regnum
, gdb_byte
*buf
)
215 enum register_status status
;
220 status
= regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
221 if (status
!= REG_VALID
)
223 memcpy (buf
, reg
, 4);
226 case SPU_FPSCR_REGNUM
:
227 status
= regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
228 if (status
!= REG_VALID
)
230 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
231 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
234 case SPU_SRR0_REGNUM
:
235 return spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
237 case SPU_LSLR_REGNUM
:
238 return spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
240 case SPU_DECR_REGNUM
:
241 return spu_pseudo_register_read_spu (regcache
, "decr", buf
);
243 case SPU_DECR_STATUS_REGNUM
:
244 return spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
247 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
252 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
255 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
256 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
261 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
262 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
263 xsnprintf (reg
, sizeof reg
, "0x%s",
264 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
265 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
266 reg
, 0, strlen (reg
));
270 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
271 int regnum
, const gdb_byte
*buf
)
280 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
281 memcpy (reg
, buf
, 4);
282 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
285 case SPU_FPSCR_REGNUM
:
286 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
287 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
288 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
291 case SPU_SRR0_REGNUM
:
292 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
295 case SPU_LSLR_REGNUM
:
296 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
299 case SPU_DECR_REGNUM
:
300 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
303 case SPU_DECR_STATUS_REGNUM
:
304 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
308 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
312 /* Value conversion -- access scalar values at the preferred slot. */
314 static struct value
*
315 spu_value_from_register (struct type
*type
, int regnum
,
316 struct frame_info
*frame
)
318 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
320 if (regnum
< SPU_NUM_GPRS
&& TYPE_LENGTH (type
) < 16)
322 int preferred_slot
= TYPE_LENGTH (type
) < 4 ? 4 - TYPE_LENGTH (type
) : 0;
323 set_value_offset (value
, preferred_slot
);
329 /* Register groups. */
332 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
333 struct reggroup
*group
)
335 /* Registers displayed via 'info regs'. */
336 if (group
== general_reggroup
)
339 /* Registers displayed via 'info float'. */
340 if (group
== float_reggroup
)
343 /* Registers that need to be saved/restored in order to
344 push or pop frames. */
345 if (group
== save_reggroup
|| group
== restore_reggroup
)
348 return default_register_reggroup_p (gdbarch
, regnum
, group
);
352 /* Address handling. */
355 spu_gdbarch_id (struct gdbarch
*gdbarch
)
357 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
360 /* The objfile architecture of a standalone SPU executable does not
361 provide an SPU ID. Retrieve it from the objfile's relocated
362 address range in this special case. */
364 && symfile_objfile
&& symfile_objfile
->obfd
365 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
366 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
367 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
373 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
375 if (dwarf2_addr_class
== 1)
376 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
382 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
384 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
391 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
392 const char *name
, int *type_flags_ptr
)
394 if (strcmp (name
, "__ea") == 0)
396 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
404 spu_address_to_pointer (struct gdbarch
*gdbarch
,
405 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
407 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
408 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
409 SPUADDR_ADDR (addr
));
413 spu_pointer_to_address (struct gdbarch
*gdbarch
,
414 struct type
*type
, const gdb_byte
*buf
)
416 int id
= spu_gdbarch_id (gdbarch
);
417 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
419 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
421 /* Do not convert __ea pointers. */
422 if (TYPE_ADDRESS_CLASS_1 (type
))
425 return addr
? SPUADDR (id
, addr
) : 0;
429 spu_integer_to_address (struct gdbarch
*gdbarch
,
430 struct type
*type
, const gdb_byte
*buf
)
432 int id
= spu_gdbarch_id (gdbarch
);
433 ULONGEST addr
= unpack_long (type
, buf
);
435 return SPUADDR (id
, addr
);
439 /* Decoding SPU instructions. */
476 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
478 if ((insn
>> 21) == op
)
481 *ra
= (insn
>> 7) & 127;
482 *rb
= (insn
>> 14) & 127;
490 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
492 if ((insn
>> 28) == op
)
494 *rt
= (insn
>> 21) & 127;
495 *ra
= (insn
>> 7) & 127;
496 *rb
= (insn
>> 14) & 127;
505 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
507 if ((insn
>> 21) == op
)
510 *ra
= (insn
>> 7) & 127;
511 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
519 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
521 if ((insn
>> 24) == op
)
524 *ra
= (insn
>> 7) & 127;
525 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
533 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
535 if ((insn
>> 23) == op
)
538 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
546 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
548 if ((insn
>> 25) == op
)
551 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
559 is_branch (unsigned int insn
, int *offset
, int *reg
)
563 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
564 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
565 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
566 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
567 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
568 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
570 *reg
= SPU_PC_REGNUM
;
575 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
576 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
583 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
584 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
585 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
586 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
587 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
588 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
598 /* Prolog parsing. */
600 struct spu_prologue_data
602 /* Stack frame size. -1 if analysis was unsuccessful. */
605 /* How to find the CFA. The CFA is equal to SP at function entry. */
609 /* Offset relative to CFA where a register is saved. -1 if invalid. */
610 int reg_offset
[SPU_NUM_GPRS
];
614 spu_analyze_prologue (struct gdbarch
*gdbarch
,
615 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
616 struct spu_prologue_data
*data
)
618 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
623 int reg_immed
[SPU_NUM_GPRS
];
625 CORE_ADDR prolog_pc
= start_pc
;
630 /* Initialize DATA to default values. */
633 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
634 data
->cfa_offset
= 0;
636 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
637 data
->reg_offset
[i
] = -1;
639 /* Set up REG_IMMED array. This is non-zero for a register if we know its
640 preferred slot currently holds this immediate value. */
641 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
644 /* Scan instructions until the first branch.
646 The following instructions are important prolog components:
648 - The first instruction to set up the stack pointer.
649 - The first instruction to set up the frame pointer.
650 - The first instruction to save the link register.
651 - The first instruction to save the backchain.
653 We return the instruction after the latest of these four,
654 or the incoming PC if none is found. The first instruction
655 to set up the stack pointer also defines the frame size.
657 Note that instructions saving incoming arguments to their stack
658 slots are not counted as important, because they are hard to
659 identify with certainty. This should not matter much, because
660 arguments are relevant only in code compiled with debug data,
661 and in such code the GDB core will advance until the first source
662 line anyway, using SAL data.
664 For purposes of stack unwinding, we analyze the following types
665 of instructions in addition:
667 - Any instruction adding to the current frame pointer.
668 - Any instruction loading an immediate constant into a register.
669 - Any instruction storing a register onto the stack.
671 These are used to compute the CFA and REG_OFFSET output. */
673 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
676 int rt
, ra
, rb
, rc
, immed
;
678 if (target_read_memory (pc
, buf
, 4))
680 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
682 /* AI is the typical instruction to set up a stack frame.
683 It is also used to initialize the frame pointer. */
684 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
686 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
687 data
->cfa_offset
-= immed
;
689 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
697 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
703 data
->cfa_reg
= SPU_FP_REGNUM
;
704 data
->cfa_offset
-= immed
;
708 /* A is used to set up stack frames of size >= 512 bytes.
709 If we have tracked the contents of the addend register,
710 we can handle this as well. */
711 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
713 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
715 if (reg_immed
[rb
] != 0)
716 data
->cfa_offset
-= reg_immed
[rb
];
718 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
721 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
727 if (reg_immed
[rb
] != 0)
728 data
->size
= -reg_immed
[rb
];
732 /* We need to track IL and ILA used to load immediate constants
733 in case they are later used as input to an A instruction. */
734 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
736 reg_immed
[rt
] = immed
;
738 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
742 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
744 reg_immed
[rt
] = immed
& 0x3ffff;
746 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
750 /* STQD is used to save registers to the stack. */
751 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
753 if (ra
== data
->cfa_reg
)
754 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
756 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
763 if (ra
== SPU_RAW_SP_REGNUM
764 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
772 /* _start uses SELB to set up the stack pointer. */
773 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
775 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
779 /* We terminate if we find a branch. */
780 else if (is_branch (insn
, &immed
, &ra
))
785 /* If we successfully parsed until here, and didn't find any instruction
786 modifying SP, we assume we have a frameless function. */
790 /* Return cooked instead of raw SP. */
791 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
792 data
->cfa_reg
= SPU_SP_REGNUM
;
797 /* Return the first instruction after the prologue starting at PC. */
799 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
801 struct spu_prologue_data data
;
802 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
805 /* Return the frame pointer in use at address PC. */
807 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
808 int *reg
, LONGEST
*offset
)
810 struct spu_prologue_data data
;
811 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
813 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
815 /* The 'frame pointer' address is CFA minus frame size. */
817 *offset
= data
.cfa_offset
- data
.size
;
821 /* ??? We don't really know ... */
822 *reg
= SPU_SP_REGNUM
;
827 /* Return true if we are in the function's epilogue, i.e. after the
828 instruction that destroyed the function's stack frame.
830 1) scan forward from the point of execution:
831 a) If you find an instruction that modifies the stack pointer
832 or transfers control (except a return), execution is not in
834 b) Stop scanning if you find a return instruction or reach the
835 end of the function or reach the hard limit for the size of
837 2) scan backward from the point of execution:
838 a) If you find an instruction that modifies the stack pointer,
839 execution *is* in an epilogue, return.
840 b) Stop scanning if you reach an instruction that transfers
841 control or the beginning of the function or reach the hard
842 limit for the size of an epilogue. */
845 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
847 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
848 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
851 int rt
, ra
, rb
, immed
;
853 /* Find the search limits based on function boundaries and hard limit.
854 We assume the epilogue can be up to 64 instructions long. */
856 const int spu_max_epilogue_size
= 64 * 4;
858 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
861 if (pc
- func_start
< spu_max_epilogue_size
)
862 epilogue_start
= func_start
;
864 epilogue_start
= pc
- spu_max_epilogue_size
;
866 if (func_end
- pc
< spu_max_epilogue_size
)
867 epilogue_end
= func_end
;
869 epilogue_end
= pc
+ spu_max_epilogue_size
;
871 /* Scan forward until next 'bi $0'. */
873 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
875 if (target_read_memory (scan_pc
, buf
, 4))
877 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
879 if (is_branch (insn
, &immed
, &ra
))
881 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
887 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
888 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
889 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
891 if (rt
== SPU_RAW_SP_REGNUM
)
896 if (scan_pc
>= epilogue_end
)
899 /* Scan backward until adjustment to stack pointer (R1). */
901 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
903 if (target_read_memory (scan_pc
, buf
, 4))
905 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
907 if (is_branch (insn
, &immed
, &ra
))
910 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
911 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
912 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
914 if (rt
== SPU_RAW_SP_REGNUM
)
923 /* Normal stack frames. */
925 struct spu_unwind_cache
928 CORE_ADDR frame_base
;
929 CORE_ADDR local_base
;
931 struct trad_frame_saved_reg
*saved_regs
;
934 static struct spu_unwind_cache
*
935 spu_frame_unwind_cache (struct frame_info
*this_frame
,
936 void **this_prologue_cache
)
938 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
939 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
940 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
941 struct spu_unwind_cache
*info
;
942 struct spu_prologue_data data
;
943 CORE_ADDR id
= tdep
->id
;
946 if (*this_prologue_cache
)
947 return *this_prologue_cache
;
949 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
950 *this_prologue_cache
= info
;
951 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
952 info
->frame_base
= 0;
953 info
->local_base
= 0;
955 /* Find the start of the current function, and analyze its prologue. */
956 info
->func
= get_frame_func (this_frame
);
959 /* Fall back to using the current PC as frame ID. */
960 info
->func
= get_frame_pc (this_frame
);
964 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
967 /* If successful, use prologue analysis data. */
968 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
973 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
974 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
975 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
976 cfa
= SPUADDR (id
, cfa
);
978 /* Call-saved register slots. */
979 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
980 if (i
== SPU_LR_REGNUM
981 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
982 if (data
.reg_offset
[i
] != -1)
983 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
986 info
->frame_base
= cfa
;
987 info
->local_base
= cfa
- data
.size
;
990 /* Otherwise, fall back to reading the backchain link. */
998 /* Get local store limit. */
999 lslr
= get_frame_register_unsigned (this_frame
, SPU_LSLR_REGNUM
);
1001 lslr
= (ULONGEST
) -1;
1003 /* Get the backchain. */
1004 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1005 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1008 /* A zero backchain terminates the frame chain. Also, sanity
1009 check against the local store size limit. */
1010 if (status
&& backchain
> 0 && backchain
<= lslr
)
1012 /* Assume the link register is saved into its slot. */
1013 if (backchain
+ 16 <= lslr
)
1014 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
,
1018 info
->frame_base
= SPUADDR (id
, backchain
);
1019 info
->local_base
= SPUADDR (id
, reg
);
1023 /* If we didn't find a frame, we cannot determine SP / return address. */
1024 if (info
->frame_base
== 0)
1027 /* The previous SP is equal to the CFA. */
1028 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1029 SPUADDR_ADDR (info
->frame_base
));
1031 /* Read full contents of the unwound link register in order to
1032 be able to determine the return address. */
1033 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1034 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1036 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1038 /* Normally, the return address is contained in the slot 0 of the
1039 link register, and slots 1-3 are zero. For an overlay return,
1040 slot 0 contains the address of the overlay manager return stub,
1041 slot 1 contains the partition number of the overlay section to
1042 be returned to, and slot 2 contains the return address within
1043 that section. Return the latter address in that case. */
1044 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1045 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1046 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1048 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1049 extract_unsigned_integer (buf
, 4, byte_order
));
1055 spu_frame_this_id (struct frame_info
*this_frame
,
1056 void **this_prologue_cache
, struct frame_id
*this_id
)
1058 struct spu_unwind_cache
*info
=
1059 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1061 if (info
->frame_base
== 0)
1064 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1067 static struct value
*
1068 spu_frame_prev_register (struct frame_info
*this_frame
,
1069 void **this_prologue_cache
, int regnum
)
1071 struct spu_unwind_cache
*info
1072 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1074 /* Special-case the stack pointer. */
1075 if (regnum
== SPU_RAW_SP_REGNUM
)
1076 regnum
= SPU_SP_REGNUM
;
1078 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1081 static const struct frame_unwind spu_frame_unwind
= {
1083 default_frame_unwind_stop_reason
,
1085 spu_frame_prev_register
,
1087 default_frame_sniffer
1091 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1093 struct spu_unwind_cache
*info
1094 = spu_frame_unwind_cache (this_frame
, this_cache
);
1095 return info
->local_base
;
1098 static const struct frame_base spu_frame_base
= {
1100 spu_frame_base_address
,
1101 spu_frame_base_address
,
1102 spu_frame_base_address
1106 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1108 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1109 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1110 /* Mask off interrupt enable bit. */
1111 return SPUADDR (tdep
->id
, pc
& -4);
1115 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1117 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1118 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1119 return SPUADDR (tdep
->id
, sp
);
1123 spu_read_pc (struct regcache
*regcache
)
1125 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1127 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1128 /* Mask off interrupt enable bit. */
1129 return SPUADDR (tdep
->id
, pc
& -4);
1133 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1135 /* Keep interrupt enabled state unchanged. */
1137 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1138 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1139 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1143 /* Cell/B.E. cross-architecture unwinder support. */
1145 struct spu2ppu_cache
1147 struct frame_id frame_id
;
1148 struct regcache
*regcache
;
1151 static struct gdbarch
*
1152 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1154 struct spu2ppu_cache
*cache
= *this_cache
;
1155 return get_regcache_arch (cache
->regcache
);
1159 spu2ppu_this_id (struct frame_info
*this_frame
,
1160 void **this_cache
, struct frame_id
*this_id
)
1162 struct spu2ppu_cache
*cache
= *this_cache
;
1163 *this_id
= cache
->frame_id
;
1166 static struct value
*
1167 spu2ppu_prev_register (struct frame_info
*this_frame
,
1168 void **this_cache
, int regnum
)
1170 struct spu2ppu_cache
*cache
= *this_cache
;
1171 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1174 buf
= alloca (register_size (gdbarch
, regnum
));
1175 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1176 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1180 spu2ppu_sniffer (const struct frame_unwind
*self
,
1181 struct frame_info
*this_frame
, void **this_prologue_cache
)
1183 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1184 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1185 CORE_ADDR base
, func
, backchain
;
1188 if (gdbarch_bfd_arch_info (target_gdbarch
)->arch
== bfd_arch_spu
)
1191 base
= get_frame_sp (this_frame
);
1192 func
= get_frame_pc (this_frame
);
1193 if (target_read_memory (base
, buf
, 4))
1195 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1199 struct frame_info
*fi
;
1201 struct spu2ppu_cache
*cache
1202 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1204 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1206 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1207 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1212 cache
->regcache
= frame_save_as_regcache (fi
);
1213 *this_prologue_cache
= cache
;
1218 struct regcache
*regcache
;
1219 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch
);
1220 cache
->regcache
= regcache_dup (regcache
);
1221 *this_prologue_cache
= cache
;
1230 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1232 struct spu2ppu_cache
*cache
= this_cache
;
1233 regcache_xfree (cache
->regcache
);
1236 static const struct frame_unwind spu2ppu_unwind
= {
1238 default_frame_unwind_stop_reason
,
1240 spu2ppu_prev_register
,
1243 spu2ppu_dealloc_cache
,
1248 /* Function calling convention. */
1251 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1257 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1258 struct value
**args
, int nargs
, struct type
*value_type
,
1259 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1260 struct regcache
*regcache
)
1262 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1263 sp
= (sp
- 4) & ~15;
1264 /* Store the address of that breakpoint */
1266 /* The call starts at the callee's entry point. */
1273 spu_scalar_value_p (struct type
*type
)
1275 switch (TYPE_CODE (type
))
1278 case TYPE_CODE_ENUM
:
1279 case TYPE_CODE_RANGE
:
1280 case TYPE_CODE_CHAR
:
1281 case TYPE_CODE_BOOL
:
1284 return TYPE_LENGTH (type
) <= 16;
1292 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1293 struct type
*type
, const gdb_byte
*in
)
1295 int len
= TYPE_LENGTH (type
);
1297 if (spu_scalar_value_p (type
))
1299 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1300 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1306 regcache_cooked_write (regcache
, regnum
++, in
);
1312 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1317 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1318 struct type
*type
, gdb_byte
*out
)
1320 int len
= TYPE_LENGTH (type
);
1322 if (spu_scalar_value_p (type
))
1324 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1325 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1331 regcache_cooked_read (regcache
, regnum
++, out
);
1337 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1342 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1343 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1344 int nargs
, struct value
**args
, CORE_ADDR sp
,
1345 int struct_return
, CORE_ADDR struct_addr
)
1347 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1350 int regnum
= SPU_ARG1_REGNUM
;
1354 /* Set the return address. */
1355 memset (buf
, 0, sizeof buf
);
1356 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1357 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1359 /* If STRUCT_RETURN is true, then the struct return address (in
1360 STRUCT_ADDR) will consume the first argument-passing register.
1361 Both adjust the register count and store that value. */
1364 memset (buf
, 0, sizeof buf
);
1365 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1366 regcache_cooked_write (regcache
, regnum
++, buf
);
1369 /* Fill in argument registers. */
1370 for (i
= 0; i
< nargs
; i
++)
1372 struct value
*arg
= args
[i
];
1373 struct type
*type
= check_typedef (value_type (arg
));
1374 const gdb_byte
*contents
= value_contents (arg
);
1375 int n_regs
= align_up (TYPE_LENGTH (type
), 16) / 16;
1377 /* If the argument doesn't wholly fit into registers, it and
1378 all subsequent arguments go to the stack. */
1379 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1385 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1389 /* Overflow arguments go to the stack. */
1390 if (stack_arg
!= -1)
1394 /* Allocate all required stack size. */
1395 for (i
= stack_arg
; i
< nargs
; i
++)
1397 struct type
*type
= check_typedef (value_type (args
[i
]));
1398 sp
-= align_up (TYPE_LENGTH (type
), 16);
1401 /* Fill in stack arguments. */
1403 for (i
= stack_arg
; i
< nargs
; i
++)
1405 struct value
*arg
= args
[i
];
1406 struct type
*type
= check_typedef (value_type (arg
));
1407 int len
= TYPE_LENGTH (type
);
1410 if (spu_scalar_value_p (type
))
1411 preferred_slot
= len
< 4 ? 4 - len
: 0;
1415 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1416 ap
+= align_up (TYPE_LENGTH (type
), 16);
1420 /* Allocate stack frame header. */
1423 /* Store stack back chain. */
1424 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1425 target_write_memory (sp
, buf
, 16);
1427 /* Finally, update all slots of the SP register. */
1428 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1429 for (i
= 0; i
< 4; i
++)
1431 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1432 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1434 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1439 static struct frame_id
1440 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1442 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1443 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1444 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1445 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1448 /* Function return value access. */
1450 static enum return_value_convention
1451 spu_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1452 struct type
*type
, struct regcache
*regcache
,
1453 gdb_byte
*out
, const gdb_byte
*in
)
1455 struct type
*func_type
= function
? value_type (function
) : NULL
;
1456 enum return_value_convention rvc
;
1457 int opencl_vector
= 0;
1461 func_type
= check_typedef (func_type
);
1463 if (TYPE_CODE (func_type
) == TYPE_CODE_PTR
)
1464 func_type
= check_typedef (TYPE_TARGET_TYPE (func_type
));
1466 if (TYPE_CODE (func_type
) == TYPE_CODE_FUNC
1467 && TYPE_CALLING_CONVENTION (func_type
) == DW_CC_GDB_IBM_OpenCL
1468 && TYPE_CODE (type
) == TYPE_CODE_ARRAY
1469 && TYPE_VECTOR (type
))
1473 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1474 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1476 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1482 case RETURN_VALUE_REGISTER_CONVENTION
:
1483 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1484 regcache_cooked_write_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, in
);
1486 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1489 case RETURN_VALUE_STRUCT_CONVENTION
:
1490 error (_("Cannot set function return value."));
1498 case RETURN_VALUE_REGISTER_CONVENTION
:
1499 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1500 regcache_cooked_read_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, out
);
1502 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1505 case RETURN_VALUE_STRUCT_CONVENTION
:
1506 error (_("Function return value unknown."));
1517 static const gdb_byte
*
1518 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
,
1519 CORE_ADDR
* pcptr
, int *lenptr
)
1521 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1523 *lenptr
= sizeof breakpoint
;
1528 spu_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
1529 struct bp_target_info
*bp_tgt
)
1531 /* We work around a problem in combined Cell/B.E. debugging here. Consider
1532 that in a combined application, we have some breakpoints inserted in SPU
1533 code, and now the application forks (on the PPU side). GDB common code
1534 will assume that the fork system call copied all breakpoints into the new
1535 process' address space, and that all those copies now need to be removed
1536 (see breakpoint.c:detach_breakpoints).
1538 While this is certainly true for PPU side breakpoints, it is not true
1539 for SPU side breakpoints. fork will clone the SPU context file
1540 descriptors, so that all the existing SPU contexts are in accessible
1541 in the new process. However, the contents of the SPU contexts themselves
1542 are *not* cloned. Therefore the effect of detach_breakpoints is to
1543 remove SPU breakpoints from the *original* SPU context's local store
1544 -- this is not the correct behaviour.
1546 The workaround is to check whether the PID we are asked to remove this
1547 breakpoint from (i.e. ptid_get_pid (inferior_ptid)) is different from the
1548 PID of the current inferior (i.e. current_inferior ()->pid). This is only
1549 true in the context of detach_breakpoints. If so, we simply do nothing.
1550 [ Note that for the fork child process, it does not matter if breakpoints
1551 remain inserted, because those SPU contexts are not runnable anyway --
1552 the Linux kernel allows only the original process to invoke spu_run. */
1554 if (ptid_get_pid (inferior_ptid
) != current_inferior ()->pid
)
1557 return default_memory_remove_breakpoint (gdbarch
, bp_tgt
);
1561 /* Software single-stepping support. */
1564 spu_software_single_step (struct frame_info
*frame
)
1566 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1567 struct address_space
*aspace
= get_frame_address_space (frame
);
1568 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1569 CORE_ADDR pc
, next_pc
;
1575 pc
= get_frame_pc (frame
);
1577 if (target_read_memory (pc
, buf
, 4))
1579 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1581 /* Get local store limit. */
1582 lslr
= get_frame_register_unsigned (frame
, SPU_LSLR_REGNUM
);
1584 lslr
= (ULONGEST
) -1;
1586 /* Next sequential instruction is at PC + 4, except if the current
1587 instruction is a PPE-assisted call, in which case it is at PC + 8.
1588 Wrap around LS limit to be on the safe side. */
1589 if ((insn
& 0xffffff00) == 0x00002100)
1590 next_pc
= (SPUADDR_ADDR (pc
) + 8) & lslr
;
1592 next_pc
= (SPUADDR_ADDR (pc
) + 4) & lslr
;
1594 insert_single_step_breakpoint (gdbarch
,
1595 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1597 if (is_branch (insn
, &offset
, ®
))
1599 CORE_ADDR target
= offset
;
1601 if (reg
== SPU_PC_REGNUM
)
1602 target
+= SPUADDR_ADDR (pc
);
1607 if (get_frame_register_bytes (frame
, reg
, 0, 4, buf
,
1609 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1613 error (_("Could not determine address of "
1614 "single-step breakpoint."));
1616 throw_error (NOT_AVAILABLE_ERROR
,
1617 _("Could not determine address of "
1618 "single-step breakpoint."));
1622 target
= target
& lslr
;
1623 if (target
!= next_pc
)
1624 insert_single_step_breakpoint (gdbarch
, aspace
,
1625 SPUADDR (SPUADDR_SPU (pc
), target
));
1632 /* Longjmp support. */
1635 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1637 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1638 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1639 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1644 /* Jump buffer is pointed to by the argument register $r3. */
1645 if (!get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
,
1649 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1650 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1653 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1654 *pc
= SPUADDR (tdep
->id
, *pc
);
1661 struct spu_dis_asm_data
1663 struct gdbarch
*gdbarch
;
1668 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1670 struct spu_dis_asm_data
*data
= info
->application_data
;
1671 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1675 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1677 /* The opcodes disassembler does 18-bit address arithmetic. Make
1678 sure the SPU ID encoded in the high bits is added back when we
1679 call print_address. */
1680 struct disassemble_info spu_info
= *info
;
1681 struct spu_dis_asm_data data
;
1682 data
.gdbarch
= info
->application_data
;
1683 data
.id
= SPUADDR_SPU (memaddr
);
1685 spu_info
.application_data
= &data
;
1686 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1687 return print_insn_spu (memaddr
, &spu_info
);
1691 /* Target overlays for the SPU overlay manager.
1693 See the documentation of simple_overlay_update for how the
1694 interface is supposed to work.
1696 Data structures used by the overlay manager:
1704 } _ovly_table[]; -- one entry per overlay section
1706 struct ovly_buf_table
1709 } _ovly_buf_table[]; -- one entry per overlay buffer
1711 _ovly_table should never change.
1713 Both tables are aligned to a 16-byte boundary, the symbols
1714 _ovly_table and _ovly_buf_table are of type STT_OBJECT and their
1715 size set to the size of the respective array. buf in _ovly_table is
1716 an index into _ovly_buf_table.
1718 mapped is an index into _ovly_table. Both the mapped and buf indices start
1719 from one to reference the first entry in their respective tables. */
1721 /* Using the per-objfile private data mechanism, we store for each
1722 objfile an array of "struct spu_overlay_table" structures, one
1723 for each obj_section of the objfile. This structure holds two
1724 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1725 is *not* an overlay section. If it is non-zero, it represents
1726 a target address. The overlay section is mapped iff the target
1727 integer at this location equals MAPPED_VAL. */
1729 static const struct objfile_data
*spu_overlay_data
;
1731 struct spu_overlay_table
1733 CORE_ADDR mapped_ptr
;
1734 CORE_ADDR mapped_val
;
1737 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1738 the _ovly_table data structure from the target and initialize the
1739 spu_overlay_table data structure from it. */
1740 static struct spu_overlay_table
*
1741 spu_get_overlay_table (struct objfile
*objfile
)
1743 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1744 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1745 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1746 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1747 unsigned ovly_table_size
, ovly_buf_table_size
;
1748 struct spu_overlay_table
*tbl
;
1749 struct obj_section
*osect
;
1753 tbl
= objfile_data (objfile
, spu_overlay_data
);
1757 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1758 if (!ovly_table_msym
)
1761 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table",
1763 if (!ovly_buf_table_msym
)
1766 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1767 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1769 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1770 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1772 ovly_table
= xmalloc (ovly_table_size
);
1773 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1775 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1776 objfile
->sections_end
- objfile
->sections
,
1777 struct spu_overlay_table
);
1779 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1781 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1783 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1785 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1787 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1790 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1793 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1794 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1795 && pos
== osect
->the_bfd_section
->filepos
)
1797 int ndx
= osect
- objfile
->sections
;
1798 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1799 tbl
[ndx
].mapped_val
= i
+ 1;
1805 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1809 /* Read _ovly_buf_table entry from the target to dermine whether
1810 OSECT is currently mapped, and update the mapped state. */
1812 spu_overlay_update_osect (struct obj_section
*osect
)
1814 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1815 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1816 struct spu_overlay_table
*ovly_table
;
1819 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1823 ovly_table
+= osect
- osect
->objfile
->sections
;
1824 if (ovly_table
->mapped_ptr
== 0)
1827 id
= SPUADDR_SPU (obj_section_addr (osect
));
1828 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1830 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1833 /* If OSECT is NULL, then update all sections' mapped state.
1834 If OSECT is non-NULL, then update only OSECT's mapped state. */
1836 spu_overlay_update (struct obj_section
*osect
)
1838 /* Just one section. */
1840 spu_overlay_update_osect (osect
);
1845 struct objfile
*objfile
;
1847 ALL_OBJSECTIONS (objfile
, osect
)
1848 if (section_is_overlay (osect
))
1849 spu_overlay_update_osect (osect
);
1853 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1854 If there is one, go through all sections and make sure for non-
1855 overlay sections LMA equals VMA, while for overlay sections LMA
1856 is larger than SPU_OVERLAY_LMA. */
1858 spu_overlay_new_objfile (struct objfile
*objfile
)
1860 struct spu_overlay_table
*ovly_table
;
1861 struct obj_section
*osect
;
1863 /* If we've already touched this file, do nothing. */
1864 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1867 /* Consider only SPU objfiles. */
1868 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1871 /* Check if this objfile has overlays. */
1872 ovly_table
= spu_get_overlay_table (objfile
);
1876 /* Now go and fiddle with all the LMAs. */
1877 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1879 bfd
*obfd
= objfile
->obfd
;
1880 asection
*bsect
= osect
->the_bfd_section
;
1881 int ndx
= osect
- objfile
->sections
;
1883 if (ovly_table
[ndx
].mapped_ptr
== 0)
1884 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1886 bfd_section_lma (obfd
, bsect
) = SPU_OVERLAY_LMA
+ bsect
->filepos
;
1891 /* Insert temporary breakpoint on "main" function of newly loaded
1892 SPE context OBJFILE. */
1894 spu_catch_start (struct objfile
*objfile
)
1896 struct minimal_symbol
*minsym
;
1897 struct symtab
*symtab
;
1901 /* Do this only if requested by "set spu stop-on-load on". */
1902 if (!spu_stop_on_load_p
)
1905 /* Consider only SPU objfiles. */
1906 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1909 /* The main objfile is handled differently. */
1910 if (objfile
== symfile_objfile
)
1913 /* There can be multiple symbols named "main". Search for the
1914 "main" in *this* objfile. */
1915 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1919 /* If we have debugging information, try to use it -- this
1920 will allow us to properly skip the prologue. */
1921 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1922 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1925 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1926 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1928 struct symtab_and_line sal
;
1930 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1933 fixup_symbol_section (sym
, objfile
);
1934 sal
= find_function_start_sal (sym
, 1);
1939 /* Use a numerical address for the set_breakpoint command to avoid having
1940 the breakpoint re-set incorrectly. */
1941 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1942 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1943 NULL
/* cond_string */, -1 /* thread */,
1944 NULL
/* extra_string */,
1945 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1946 bp_breakpoint
/* type_wanted */,
1947 0 /* ignore_count */,
1948 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1949 &bkpt_breakpoint_ops
/* ops */, 0 /* from_tty */,
1950 1 /* enabled */, 0 /* internal */, 0);
1954 /* Look up OBJFILE loaded into FRAME's SPU context. */
1955 static struct objfile
*
1956 spu_objfile_from_frame (struct frame_info
*frame
)
1958 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1959 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1960 struct objfile
*obj
;
1962 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1967 if (obj
->sections
!= obj
->sections_end
1968 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1975 /* Flush cache for ea pointer access if available. */
1977 flush_ea_cache (void)
1979 struct minimal_symbol
*msymbol
;
1980 struct objfile
*obj
;
1982 if (!has_stack_frames ())
1985 obj
= spu_objfile_from_frame (get_current_frame ());
1989 /* Lookup inferior function __cache_flush. */
1990 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1991 if (msymbol
!= NULL
)
1996 type
= objfile_type (obj
)->builtin_void
;
1997 type
= lookup_function_type (type
);
1998 type
= lookup_pointer_type (type
);
1999 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
2001 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
2005 /* This handler is called when the inferior has stopped. If it is stopped in
2006 SPU architecture then flush the ea cache if used. */
2008 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
2010 if (!spu_auto_flush_cache_p
)
2013 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
2014 re-entering this function when __cache_flush stops. */
2015 spu_auto_flush_cache_p
= 0;
2017 spu_auto_flush_cache_p
= 1;
2021 /* "info spu" commands. */
2024 info_spu_event_command (char *args
, int from_tty
)
2026 struct frame_info
*frame
= get_selected_frame (NULL
);
2027 ULONGEST event_status
= 0;
2028 ULONGEST event_mask
= 0;
2029 struct cleanup
*chain
;
2035 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2036 error (_("\"info spu\" is only supported on the SPU architecture."));
2038 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2040 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
2041 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2042 buf
, 0, (sizeof (buf
) - 1));
2044 error (_("Could not read event_status."));
2046 event_status
= strtoulst (buf
, NULL
, 16);
2048 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
2049 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2050 buf
, 0, (sizeof (buf
) - 1));
2052 error (_("Could not read event_mask."));
2054 event_mask
= strtoulst (buf
, NULL
, 16);
2056 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoEvent");
2058 if (ui_out_is_mi_like_p (current_uiout
))
2060 ui_out_field_fmt (current_uiout
, "event_status",
2061 "0x%s", phex_nz (event_status
, 4));
2062 ui_out_field_fmt (current_uiout
, "event_mask",
2063 "0x%s", phex_nz (event_mask
, 4));
2067 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
2068 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
2071 do_cleanups (chain
);
2075 info_spu_signal_command (char *args
, int from_tty
)
2077 struct frame_info
*frame
= get_selected_frame (NULL
);
2078 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2079 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2080 ULONGEST signal1
= 0;
2081 ULONGEST signal1_type
= 0;
2082 int signal1_pending
= 0;
2083 ULONGEST signal2
= 0;
2084 ULONGEST signal2_type
= 0;
2085 int signal2_pending
= 0;
2086 struct cleanup
*chain
;
2092 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2093 error (_("\"info spu\" is only supported on the SPU architecture."));
2095 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2097 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2098 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2100 error (_("Could not read signal1."));
2103 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2104 signal1_pending
= 1;
2107 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2108 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2109 buf
, 0, (sizeof (buf
) - 1));
2111 error (_("Could not read signal1_type."));
2113 signal1_type
= strtoulst (buf
, NULL
, 16);
2115 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2116 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2118 error (_("Could not read signal2."));
2121 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2122 signal2_pending
= 1;
2125 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2126 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2127 buf
, 0, (sizeof (buf
) - 1));
2129 error (_("Could not read signal2_type."));
2131 signal2_type
= strtoulst (buf
, NULL
, 16);
2133 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoSignal");
2135 if (ui_out_is_mi_like_p (current_uiout
))
2137 ui_out_field_int (current_uiout
, "signal1_pending", signal1_pending
);
2138 ui_out_field_fmt (current_uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2139 ui_out_field_int (current_uiout
, "signal1_type", signal1_type
);
2140 ui_out_field_int (current_uiout
, "signal2_pending", signal2_pending
);
2141 ui_out_field_fmt (current_uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2142 ui_out_field_int (current_uiout
, "signal2_type", signal2_type
);
2146 if (signal1_pending
)
2147 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2149 printf_filtered (_("Signal 1 not pending "));
2152 printf_filtered (_("(Type Or)\n"));
2154 printf_filtered (_("(Type Overwrite)\n"));
2156 if (signal2_pending
)
2157 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2159 printf_filtered (_("Signal 2 not pending "));
2162 printf_filtered (_("(Type Or)\n"));
2164 printf_filtered (_("(Type Overwrite)\n"));
2167 do_cleanups (chain
);
2171 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2172 const char *field
, const char *msg
)
2174 struct cleanup
*chain
;
2180 chain
= make_cleanup_ui_out_table_begin_end (current_uiout
, 1, nr
, "mbox");
2182 ui_out_table_header (current_uiout
, 32, ui_left
, field
, msg
);
2183 ui_out_table_body (current_uiout
);
2185 for (i
= 0; i
< nr
; i
++)
2187 struct cleanup
*val_chain
;
2189 val_chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "mbox");
2190 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2191 ui_out_field_fmt (current_uiout
, field
, "0x%s", phex (val
, 4));
2192 do_cleanups (val_chain
);
2194 if (!ui_out_is_mi_like_p (current_uiout
))
2195 printf_filtered ("\n");
2198 do_cleanups (chain
);
2202 info_spu_mailbox_command (char *args
, int from_tty
)
2204 struct frame_info
*frame
= get_selected_frame (NULL
);
2205 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2206 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2207 struct cleanup
*chain
;
2213 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2214 error (_("\"info spu\" is only supported on the SPU architecture."));
2216 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2218 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoMailbox");
2220 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2221 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2222 buf
, 0, sizeof buf
);
2224 error (_("Could not read mbox_info."));
2226 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2227 "mbox", "SPU Outbound Mailbox");
2229 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2230 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2231 buf
, 0, sizeof buf
);
2233 error (_("Could not read ibox_info."));
2235 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2236 "ibox", "SPU Outbound Interrupt Mailbox");
2238 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2239 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2240 buf
, 0, sizeof buf
);
2242 error (_("Could not read wbox_info."));
2244 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2245 "wbox", "SPU Inbound Mailbox");
2247 do_cleanups (chain
);
2251 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2253 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2254 return (word
>> (63 - last
)) & mask
;
2258 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2260 static char *spu_mfc_opcode
[256] =
2262 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2263 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2264 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2265 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2266 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2267 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2268 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2269 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2270 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2271 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2272 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2273 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2274 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2275 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2276 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2277 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2278 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2279 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2280 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2281 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2282 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2283 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2284 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2285 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2286 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2287 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2288 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2289 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2290 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2291 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2292 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2293 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2296 int *seq
= alloca (nr
* sizeof (int));
2298 struct cleanup
*chain
;
2302 /* Determine sequence in which to display (valid) entries. */
2303 for (i
= 0; i
< nr
; i
++)
2305 /* Search for the first valid entry all of whose
2306 dependencies are met. */
2307 for (j
= 0; j
< nr
; j
++)
2309 ULONGEST mfc_cq_dw3
;
2310 ULONGEST dependencies
;
2312 if (done
& (1 << (nr
- 1 - j
)))
2316 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2317 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2320 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2321 if ((dependencies
& done
) != dependencies
)
2325 done
|= 1 << (nr
- 1 - j
);
2336 chain
= make_cleanup_ui_out_table_begin_end (current_uiout
, 10, nr
,
2339 ui_out_table_header (current_uiout
, 7, ui_left
, "opcode", "Opcode");
2340 ui_out_table_header (current_uiout
, 3, ui_left
, "tag", "Tag");
2341 ui_out_table_header (current_uiout
, 3, ui_left
, "tid", "TId");
2342 ui_out_table_header (current_uiout
, 3, ui_left
, "rid", "RId");
2343 ui_out_table_header (current_uiout
, 18, ui_left
, "ea", "EA");
2344 ui_out_table_header (current_uiout
, 7, ui_left
, "lsa", "LSA");
2345 ui_out_table_header (current_uiout
, 7, ui_left
, "size", "Size");
2346 ui_out_table_header (current_uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2347 ui_out_table_header (current_uiout
, 7, ui_left
, "lstsize", "LstSize");
2348 ui_out_table_header (current_uiout
, 1, ui_left
, "error_p", "E");
2350 ui_out_table_body (current_uiout
);
2352 for (i
= 0; i
< nr
; i
++)
2354 struct cleanup
*cmd_chain
;
2355 ULONGEST mfc_cq_dw0
;
2356 ULONGEST mfc_cq_dw1
;
2357 ULONGEST mfc_cq_dw2
;
2358 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2359 int list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2361 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2363 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2364 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2367 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2369 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2371 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2373 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2374 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2375 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2376 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2377 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2378 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2379 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2381 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2382 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2384 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2385 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2386 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2387 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2388 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2389 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2391 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "cmd");
2393 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2394 ui_out_field_string (current_uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2396 ui_out_field_int (current_uiout
, "opcode", mfc_cmd_opcode
);
2398 ui_out_field_int (current_uiout
, "tag", mfc_cmd_tag
);
2399 ui_out_field_int (current_uiout
, "tid", tclass_id
);
2400 ui_out_field_int (current_uiout
, "rid", rclass_id
);
2403 ui_out_field_fmt (current_uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2405 ui_out_field_skip (current_uiout
, "ea");
2407 ui_out_field_fmt (current_uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2409 ui_out_field_fmt (current_uiout
, "size", "0x%05x", mfc_size
<< 4);
2411 ui_out_field_fmt (current_uiout
, "size", "0x%05x", mfc_size
);
2415 ui_out_field_fmt (current_uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2416 ui_out_field_fmt (current_uiout
, "lstsize", "0x%05x", list_size
<< 3);
2420 ui_out_field_skip (current_uiout
, "lstaddr");
2421 ui_out_field_skip (current_uiout
, "lstsize");
2425 ui_out_field_string (current_uiout
, "error_p", "*");
2427 ui_out_field_skip (current_uiout
, "error_p");
2429 do_cleanups (cmd_chain
);
2431 if (!ui_out_is_mi_like_p (current_uiout
))
2432 printf_filtered ("\n");
2435 do_cleanups (chain
);
2439 info_spu_dma_command (char *args
, int from_tty
)
2441 struct frame_info
*frame
= get_selected_frame (NULL
);
2442 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2443 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2444 ULONGEST dma_info_type
;
2445 ULONGEST dma_info_mask
;
2446 ULONGEST dma_info_status
;
2447 ULONGEST dma_info_stall_and_notify
;
2448 ULONGEST dma_info_atomic_command_status
;
2449 struct cleanup
*chain
;
2455 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2456 error (_("\"info spu\" is only supported on the SPU architecture."));
2458 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2460 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2461 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2462 buf
, 0, 40 + 16 * 32);
2464 error (_("Could not read dma_info."));
2467 = extract_unsigned_integer (buf
, 8, byte_order
);
2469 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2471 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2472 dma_info_stall_and_notify
2473 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2474 dma_info_atomic_command_status
2475 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2477 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
, "SPUInfoDMA");
2479 if (ui_out_is_mi_like_p (current_uiout
))
2481 ui_out_field_fmt (current_uiout
, "dma_info_type", "0x%s",
2482 phex_nz (dma_info_type
, 4));
2483 ui_out_field_fmt (current_uiout
, "dma_info_mask", "0x%s",
2484 phex_nz (dma_info_mask
, 4));
2485 ui_out_field_fmt (current_uiout
, "dma_info_status", "0x%s",
2486 phex_nz (dma_info_status
, 4));
2487 ui_out_field_fmt (current_uiout
, "dma_info_stall_and_notify", "0x%s",
2488 phex_nz (dma_info_stall_and_notify
, 4));
2489 ui_out_field_fmt (current_uiout
, "dma_info_atomic_command_status", "0x%s",
2490 phex_nz (dma_info_atomic_command_status
, 4));
2494 const char *query_msg
= _("no query pending");
2496 if (dma_info_type
& 4)
2497 switch (dma_info_type
& 3)
2499 case 1: query_msg
= _("'any' query pending"); break;
2500 case 2: query_msg
= _("'all' query pending"); break;
2501 default: query_msg
= _("undefined query type"); break;
2504 printf_filtered (_("Tag-Group Status 0x%s\n"),
2505 phex (dma_info_status
, 4));
2506 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2507 phex (dma_info_mask
, 4), query_msg
);
2508 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2509 phex (dma_info_stall_and_notify
, 4));
2510 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2511 phex (dma_info_atomic_command_status
, 4));
2512 printf_filtered ("\n");
2515 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2516 do_cleanups (chain
);
2520 info_spu_proxydma_command (char *args
, int from_tty
)
2522 struct frame_info
*frame
= get_selected_frame (NULL
);
2523 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2524 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2525 ULONGEST dma_info_type
;
2526 ULONGEST dma_info_mask
;
2527 ULONGEST dma_info_status
;
2528 struct cleanup
*chain
;
2534 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2535 error (_("\"info spu\" is only supported on the SPU architecture."));
2537 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2539 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2540 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2541 buf
, 0, 24 + 8 * 32);
2543 error (_("Could not read proxydma_info."));
2545 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2546 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2547 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2549 chain
= make_cleanup_ui_out_tuple_begin_end (current_uiout
,
2552 if (ui_out_is_mi_like_p (current_uiout
))
2554 ui_out_field_fmt (current_uiout
, "proxydma_info_type", "0x%s",
2555 phex_nz (dma_info_type
, 4));
2556 ui_out_field_fmt (current_uiout
, "proxydma_info_mask", "0x%s",
2557 phex_nz (dma_info_mask
, 4));
2558 ui_out_field_fmt (current_uiout
, "proxydma_info_status", "0x%s",
2559 phex_nz (dma_info_status
, 4));
2563 const char *query_msg
;
2565 switch (dma_info_type
& 3)
2567 case 0: query_msg
= _("no query pending"); break;
2568 case 1: query_msg
= _("'any' query pending"); break;
2569 case 2: query_msg
= _("'all' query pending"); break;
2570 default: query_msg
= _("undefined query type"); break;
2573 printf_filtered (_("Tag-Group Status 0x%s\n"),
2574 phex (dma_info_status
, 4));
2575 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2576 phex (dma_info_mask
, 4), query_msg
);
2577 printf_filtered ("\n");
2580 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2581 do_cleanups (chain
);
2585 info_spu_command (char *args
, int from_tty
)
2587 printf_unfiltered (_("\"info spu\" must be followed by "
2588 "the name of an SPU facility.\n"));
2589 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2593 /* Root of all "set spu "/"show spu " commands. */
2596 show_spu_command (char *args
, int from_tty
)
2598 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2602 set_spu_command (char *args
, int from_tty
)
2604 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2608 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2609 struct cmd_list_element
*c
, const char *value
)
2611 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2616 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2617 struct cmd_list_element
*c
, const char *value
)
2619 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2624 /* Set up gdbarch struct. */
2626 static struct gdbarch
*
2627 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2629 struct gdbarch
*gdbarch
;
2630 struct gdbarch_tdep
*tdep
;
2633 /* Which spufs ID was requested as address space? */
2635 id
= *(int *)info
.tdep_info
;
2636 /* For objfile architectures of SPU solibs, decode the ID from the name.
2637 This assumes the filename convention employed by solib-spu.c. */
2640 char *name
= strrchr (info
.abfd
->filename
, '@');
2642 sscanf (name
, "@0x%*x <%d>", &id
);
2645 /* Find a candidate among extant architectures. */
2646 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2648 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2650 tdep
= gdbarch_tdep (arches
->gdbarch
);
2651 if (tdep
&& tdep
->id
== id
)
2652 return arches
->gdbarch
;
2655 /* None found, so create a new architecture. */
2656 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2658 gdbarch
= gdbarch_alloc (&info
, tdep
);
2661 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2664 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2665 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2666 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2667 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2668 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2669 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2670 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2671 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2672 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2673 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2674 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2675 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2678 set_gdbarch_char_signed (gdbarch
, 0);
2679 set_gdbarch_ptr_bit (gdbarch
, 32);
2680 set_gdbarch_addr_bit (gdbarch
, 32);
2681 set_gdbarch_short_bit (gdbarch
, 16);
2682 set_gdbarch_int_bit (gdbarch
, 32);
2683 set_gdbarch_long_bit (gdbarch
, 32);
2684 set_gdbarch_long_long_bit (gdbarch
, 64);
2685 set_gdbarch_float_bit (gdbarch
, 32);
2686 set_gdbarch_double_bit (gdbarch
, 64);
2687 set_gdbarch_long_double_bit (gdbarch
, 64);
2688 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2689 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2690 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2692 /* Address handling. */
2693 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2694 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2695 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2696 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2697 set_gdbarch_address_class_type_flags_to_name
2698 (gdbarch
, spu_address_class_type_flags_to_name
);
2699 set_gdbarch_address_class_name_to_type_flags
2700 (gdbarch
, spu_address_class_name_to_type_flags
);
2703 /* Inferior function calls. */
2704 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2705 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2706 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2707 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2708 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2709 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2710 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2712 /* Frame handling. */
2713 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2714 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2715 frame_base_set_default (gdbarch
, &spu_frame_base
);
2716 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2717 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2718 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2719 set_gdbarch_frame_args_skip (gdbarch
, 0);
2720 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2721 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2723 /* Cell/B.E. cross-architecture unwinder support. */
2724 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2727 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2728 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2729 set_gdbarch_memory_remove_breakpoint (gdbarch
, spu_memory_remove_breakpoint
);
2730 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2731 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2732 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2735 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2740 /* Provide a prototype to silence -Wmissing-prototypes. */
2741 extern initialize_file_ftype _initialize_spu_tdep
;
2744 _initialize_spu_tdep (void)
2746 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2748 /* Add ourselves to objfile event chain. */
2749 observer_attach_new_objfile (spu_overlay_new_objfile
);
2750 spu_overlay_data
= register_objfile_data ();
2752 /* Install spu stop-on-load handler. */
2753 observer_attach_new_objfile (spu_catch_start
);
2755 /* Add ourselves to normal_stop event chain. */
2756 observer_attach_normal_stop (spu_attach_normal_stop
);
2758 /* Add root prefix command for all "set spu"/"show spu" commands. */
2759 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2760 _("Various SPU specific commands."),
2761 &setspucmdlist
, "set spu ", 0, &setlist
);
2762 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2763 _("Various SPU specific commands."),
2764 &showspucmdlist
, "show spu ", 0, &showlist
);
2766 /* Toggle whether or not to add a temporary breakpoint at the "main"
2767 function of new SPE contexts. */
2768 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2769 &spu_stop_on_load_p
, _("\
2770 Set whether to stop for new SPE threads."),
2772 Show whether to stop for new SPE threads."),
2774 Use \"on\" to give control to the user when a new SPE thread\n\
2775 enters its \"main\" function.\n\
2776 Use \"off\" to disable stopping for new SPE threads."),
2778 show_spu_stop_on_load
,
2779 &setspucmdlist
, &showspucmdlist
);
2781 /* Toggle whether or not to automatically flush the software-managed
2782 cache whenever SPE execution stops. */
2783 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2784 &spu_auto_flush_cache_p
, _("\
2785 Set whether to automatically flush the software-managed cache."),
2787 Show whether to automatically flush the software-managed cache."),
2789 Use \"on\" to automatically flush the software-managed cache\n\
2790 whenever SPE execution stops.\n\
2791 Use \"off\" to never automatically flush the software-managed cache."),
2793 show_spu_auto_flush_cache
,
2794 &setspucmdlist
, &showspucmdlist
);
2796 /* Add root prefix command for all "info spu" commands. */
2797 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2798 _("Various SPU specific commands."),
2799 &infospucmdlist
, "info spu ", 0, &infolist
);
2801 /* Add various "info spu" commands. */
2802 add_cmd ("event", class_info
, info_spu_event_command
,
2803 _("Display SPU event facility status.\n"),
2805 add_cmd ("signal", class_info
, info_spu_signal_command
,
2806 _("Display SPU signal notification facility status.\n"),
2808 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2809 _("Display SPU mailbox facility status.\n"),
2811 add_cmd ("dma", class_info
, info_spu_dma_command
,
2812 _("Display MFC DMA status.\n"),
2814 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2815 _("Display MFC Proxy-DMA status.\n"),