1 /* SPU target-dependent code for GDB, the GNU debugger.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
3 Free Software Foundation, Inc.
5 Contributed by Ulrich Weigand <uweigand@de.ibm.com>.
6 Based on a port by Sid Manning <sid@us.ibm.com>.
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
28 #include "gdb_string.h"
29 #include "gdb_assert.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "trad-frame.h"
42 #include "reggroups.h"
43 #include "floatformat.h"
52 /* The list of available "set spu " and "show spu " commands. */
53 static struct cmd_list_element
*setspucmdlist
= NULL
;
54 static struct cmd_list_element
*showspucmdlist
= NULL
;
56 /* Whether to stop for new SPE contexts. */
57 static int spu_stop_on_load_p
= 0;
58 /* Whether to automatically flush the SW-managed cache. */
59 static int spu_auto_flush_cache_p
= 1;
62 /* The tdep structure. */
65 /* The spufs ID identifying our address space. */
68 /* SPU-specific vector type. */
69 struct type
*spu_builtin_type_vec128
;
73 /* SPU-specific vector type. */
75 spu_builtin_type_vec128 (struct gdbarch
*gdbarch
)
77 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
79 if (!tdep
->spu_builtin_type_vec128
)
81 const struct builtin_type
*bt
= builtin_type (gdbarch
);
84 t
= arch_composite_type (gdbarch
,
85 "__spu_builtin_type_vec128", TYPE_CODE_UNION
);
86 append_composite_type_field (t
, "uint128", bt
->builtin_int128
);
87 append_composite_type_field (t
, "v2_int64",
88 init_vector_type (bt
->builtin_int64
, 2));
89 append_composite_type_field (t
, "v4_int32",
90 init_vector_type (bt
->builtin_int32
, 4));
91 append_composite_type_field (t
, "v8_int16",
92 init_vector_type (bt
->builtin_int16
, 8));
93 append_composite_type_field (t
, "v16_int8",
94 init_vector_type (bt
->builtin_int8
, 16));
95 append_composite_type_field (t
, "v2_double",
96 init_vector_type (bt
->builtin_double
, 2));
97 append_composite_type_field (t
, "v4_float",
98 init_vector_type (bt
->builtin_float
, 4));
101 TYPE_NAME (t
) = "spu_builtin_type_vec128";
103 tdep
->spu_builtin_type_vec128
= t
;
106 return tdep
->spu_builtin_type_vec128
;
110 /* The list of available "info spu " commands. */
111 static struct cmd_list_element
*infospucmdlist
= NULL
;
116 spu_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
118 static char *register_names
[] =
120 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
121 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
122 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
123 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
124 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
125 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
126 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
127 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
128 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
129 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
130 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
131 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
132 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
133 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
134 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
135 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
136 "id", "pc", "sp", "fpscr", "srr0", "lslr", "decr", "decr_status"
141 if (reg_nr
>= sizeof register_names
/ sizeof *register_names
)
144 return register_names
[reg_nr
];
148 spu_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
150 if (reg_nr
< SPU_NUM_GPRS
)
151 return spu_builtin_type_vec128 (gdbarch
);
156 return builtin_type (gdbarch
)->builtin_uint32
;
159 return builtin_type (gdbarch
)->builtin_func_ptr
;
162 return builtin_type (gdbarch
)->builtin_data_ptr
;
164 case SPU_FPSCR_REGNUM
:
165 return builtin_type (gdbarch
)->builtin_uint128
;
167 case SPU_SRR0_REGNUM
:
168 return builtin_type (gdbarch
)->builtin_uint32
;
170 case SPU_LSLR_REGNUM
:
171 return builtin_type (gdbarch
)->builtin_uint32
;
173 case SPU_DECR_REGNUM
:
174 return builtin_type (gdbarch
)->builtin_uint32
;
176 case SPU_DECR_STATUS_REGNUM
:
177 return builtin_type (gdbarch
)->builtin_uint32
;
180 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
184 /* Pseudo registers for preferred slots - stack pointer. */
187 spu_pseudo_register_read_spu (struct regcache
*regcache
, const char *regname
,
190 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
191 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
196 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
197 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
198 memset (reg
, 0, sizeof reg
);
199 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
202 store_unsigned_integer (buf
, 4, byte_order
, strtoulst (reg
, NULL
, 16));
206 spu_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
207 int regnum
, gdb_byte
*buf
)
216 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
217 memcpy (buf
, reg
, 4);
220 case SPU_FPSCR_REGNUM
:
221 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
222 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
223 target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
226 case SPU_SRR0_REGNUM
:
227 spu_pseudo_register_read_spu (regcache
, "srr0", buf
);
230 case SPU_LSLR_REGNUM
:
231 spu_pseudo_register_read_spu (regcache
, "lslr", buf
);
234 case SPU_DECR_REGNUM
:
235 spu_pseudo_register_read_spu (regcache
, "decr", buf
);
238 case SPU_DECR_STATUS_REGNUM
:
239 spu_pseudo_register_read_spu (regcache
, "decr_status", buf
);
243 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
248 spu_pseudo_register_write_spu (struct regcache
*regcache
, const char *regname
,
251 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
252 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
257 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
258 xsnprintf (annex
, sizeof annex
, "%d/%s", (int) id
, regname
);
259 xsnprintf (reg
, sizeof reg
, "0x%s",
260 phex_nz (extract_unsigned_integer (buf
, 4, byte_order
), 4));
261 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
,
262 reg
, 0, strlen (reg
));
266 spu_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
267 int regnum
, const gdb_byte
*buf
)
276 regcache_raw_read (regcache
, SPU_RAW_SP_REGNUM
, reg
);
277 memcpy (reg
, buf
, 4);
278 regcache_raw_write (regcache
, SPU_RAW_SP_REGNUM
, reg
);
281 case SPU_FPSCR_REGNUM
:
282 regcache_raw_read_unsigned (regcache
, SPU_ID_REGNUM
, &id
);
283 xsnprintf (annex
, sizeof annex
, "%d/fpcr", (int) id
);
284 target_write (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 16);
287 case SPU_SRR0_REGNUM
:
288 spu_pseudo_register_write_spu (regcache
, "srr0", buf
);
291 case SPU_LSLR_REGNUM
:
292 spu_pseudo_register_write_spu (regcache
, "lslr", buf
);
295 case SPU_DECR_REGNUM
:
296 spu_pseudo_register_write_spu (regcache
, "decr", buf
);
299 case SPU_DECR_STATUS_REGNUM
:
300 spu_pseudo_register_write_spu (regcache
, "decr_status", buf
);
304 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
308 /* Value conversion -- access scalar values at the preferred slot. */
310 static struct value
*
311 spu_value_from_register (struct type
*type
, int regnum
,
312 struct frame_info
*frame
)
314 struct value
*value
= default_value_from_register (type
, regnum
, frame
);
315 int len
= TYPE_LENGTH (type
);
317 if (regnum
< SPU_NUM_GPRS
&& len
< 16)
319 int preferred_slot
= len
< 4 ? 4 - len
: 0;
320 set_value_offset (value
, preferred_slot
);
326 /* Register groups. */
329 spu_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
330 struct reggroup
*group
)
332 /* Registers displayed via 'info regs'. */
333 if (group
== general_reggroup
)
336 /* Registers displayed via 'info float'. */
337 if (group
== float_reggroup
)
340 /* Registers that need to be saved/restored in order to
341 push or pop frames. */
342 if (group
== save_reggroup
|| group
== restore_reggroup
)
345 return default_register_reggroup_p (gdbarch
, regnum
, group
);
349 /* Address handling. */
352 spu_gdbarch_id (struct gdbarch
*gdbarch
)
354 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
357 /* The objfile architecture of a standalone SPU executable does not
358 provide an SPU ID. Retrieve it from the objfile's relocated
359 address range in this special case. */
361 && symfile_objfile
&& symfile_objfile
->obfd
362 && bfd_get_arch (symfile_objfile
->obfd
) == bfd_arch_spu
363 && symfile_objfile
->sections
!= symfile_objfile
->sections_end
)
364 id
= SPUADDR_SPU (obj_section_addr (symfile_objfile
->sections
));
370 spu_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
372 if (dwarf2_addr_class
== 1)
373 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
379 spu_address_class_type_flags_to_name (struct gdbarch
*gdbarch
, int type_flags
)
381 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
388 spu_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
389 const char *name
, int *type_flags_ptr
)
391 if (strcmp (name
, "__ea") == 0)
393 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
401 spu_address_to_pointer (struct gdbarch
*gdbarch
,
402 struct type
*type
, gdb_byte
*buf
, CORE_ADDR addr
)
404 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
405 store_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
,
406 SPUADDR_ADDR (addr
));
410 spu_pointer_to_address (struct gdbarch
*gdbarch
,
411 struct type
*type
, const gdb_byte
*buf
)
413 int id
= spu_gdbarch_id (gdbarch
);
414 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
416 = extract_unsigned_integer (buf
, TYPE_LENGTH (type
), byte_order
);
418 /* Do not convert __ea pointers. */
419 if (TYPE_ADDRESS_CLASS_1 (type
))
422 return addr
? SPUADDR (id
, addr
) : 0;
426 spu_integer_to_address (struct gdbarch
*gdbarch
,
427 struct type
*type
, const gdb_byte
*buf
)
429 int id
= spu_gdbarch_id (gdbarch
);
430 ULONGEST addr
= unpack_long (type
, buf
);
432 return SPUADDR (id
, addr
);
436 /* Decoding SPU instructions. */
473 is_rr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
)
475 if ((insn
>> 21) == op
)
478 *ra
= (insn
>> 7) & 127;
479 *rb
= (insn
>> 14) & 127;
487 is_rrr (unsigned int insn
, int op
, int *rt
, int *ra
, int *rb
, int *rc
)
489 if ((insn
>> 28) == op
)
491 *rt
= (insn
>> 21) & 127;
492 *ra
= (insn
>> 7) & 127;
493 *rb
= (insn
>> 14) & 127;
502 is_ri7 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i7
)
504 if ((insn
>> 21) == op
)
507 *ra
= (insn
>> 7) & 127;
508 *i7
= (((insn
>> 14) & 127) ^ 0x40) - 0x40;
516 is_ri10 (unsigned int insn
, int op
, int *rt
, int *ra
, int *i10
)
518 if ((insn
>> 24) == op
)
521 *ra
= (insn
>> 7) & 127;
522 *i10
= (((insn
>> 14) & 0x3ff) ^ 0x200) - 0x200;
530 is_ri16 (unsigned int insn
, int op
, int *rt
, int *i16
)
532 if ((insn
>> 23) == op
)
535 *i16
= (((insn
>> 7) & 0xffff) ^ 0x8000) - 0x8000;
543 is_ri18 (unsigned int insn
, int op
, int *rt
, int *i18
)
545 if ((insn
>> 25) == op
)
548 *i18
= (((insn
>> 7) & 0x3ffff) ^ 0x20000) - 0x20000;
556 is_branch (unsigned int insn
, int *offset
, int *reg
)
560 if (is_ri16 (insn
, op_br
, &rt
, &i16
)
561 || is_ri16 (insn
, op_brsl
, &rt
, &i16
)
562 || is_ri16 (insn
, op_brnz
, &rt
, &i16
)
563 || is_ri16 (insn
, op_brz
, &rt
, &i16
)
564 || is_ri16 (insn
, op_brhnz
, &rt
, &i16
)
565 || is_ri16 (insn
, op_brhz
, &rt
, &i16
))
567 *reg
= SPU_PC_REGNUM
;
572 if (is_ri16 (insn
, op_bra
, &rt
, &i16
)
573 || is_ri16 (insn
, op_brasl
, &rt
, &i16
))
580 if (is_ri7 (insn
, op_bi
, &rt
, reg
, &i7
)
581 || is_ri7 (insn
, op_bisl
, &rt
, reg
, &i7
)
582 || is_ri7 (insn
, op_biz
, &rt
, reg
, &i7
)
583 || is_ri7 (insn
, op_binz
, &rt
, reg
, &i7
)
584 || is_ri7 (insn
, op_bihz
, &rt
, reg
, &i7
)
585 || is_ri7 (insn
, op_bihnz
, &rt
, reg
, &i7
))
595 /* Prolog parsing. */
597 struct spu_prologue_data
599 /* Stack frame size. -1 if analysis was unsuccessful. */
602 /* How to find the CFA. The CFA is equal to SP at function entry. */
606 /* Offset relative to CFA where a register is saved. -1 if invalid. */
607 int reg_offset
[SPU_NUM_GPRS
];
611 spu_analyze_prologue (struct gdbarch
*gdbarch
,
612 CORE_ADDR start_pc
, CORE_ADDR end_pc
,
613 struct spu_prologue_data
*data
)
615 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
620 int reg_immed
[SPU_NUM_GPRS
];
622 CORE_ADDR prolog_pc
= start_pc
;
627 /* Initialize DATA to default values. */
630 data
->cfa_reg
= SPU_RAW_SP_REGNUM
;
631 data
->cfa_offset
= 0;
633 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
634 data
->reg_offset
[i
] = -1;
636 /* Set up REG_IMMED array. This is non-zero for a register if we know its
637 preferred slot currently holds this immediate value. */
638 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
641 /* Scan instructions until the first branch.
643 The following instructions are important prolog components:
645 - The first instruction to set up the stack pointer.
646 - The first instruction to set up the frame pointer.
647 - The first instruction to save the link register.
648 - The first instruction to save the backchain.
650 We return the instruction after the latest of these four,
651 or the incoming PC if none is found. The first instruction
652 to set up the stack pointer also defines the frame size.
654 Note that instructions saving incoming arguments to their stack
655 slots are not counted as important, because they are hard to
656 identify with certainty. This should not matter much, because
657 arguments are relevant only in code compiled with debug data,
658 and in such code the GDB core will advance until the first source
659 line anyway, using SAL data.
661 For purposes of stack unwinding, we analyze the following types
662 of instructions in addition:
664 - Any instruction adding to the current frame pointer.
665 - Any instruction loading an immediate constant into a register.
666 - Any instruction storing a register onto the stack.
668 These are used to compute the CFA and REG_OFFSET output. */
670 for (pc
= start_pc
; pc
< end_pc
; pc
+= 4)
673 int rt
, ra
, rb
, rc
, immed
;
675 if (target_read_memory (pc
, buf
, 4))
677 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
679 /* AI is the typical instruction to set up a stack frame.
680 It is also used to initialize the frame pointer. */
681 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
))
683 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
684 data
->cfa_offset
-= immed
;
686 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
694 else if (rt
== SPU_FP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
700 data
->cfa_reg
= SPU_FP_REGNUM
;
701 data
->cfa_offset
-= immed
;
705 /* A is used to set up stack frames of size >= 512 bytes.
706 If we have tracked the contents of the addend register,
707 we can handle this as well. */
708 else if (is_rr (insn
, op_a
, &rt
, &ra
, &rb
))
710 if (rt
== data
->cfa_reg
&& ra
== data
->cfa_reg
)
712 if (reg_immed
[rb
] != 0)
713 data
->cfa_offset
-= reg_immed
[rb
];
715 data
->cfa_reg
= -1; /* We don't know the CFA any more. */
718 if (rt
== SPU_RAW_SP_REGNUM
&& ra
== SPU_RAW_SP_REGNUM
724 if (reg_immed
[rb
] != 0)
725 data
->size
= -reg_immed
[rb
];
729 /* We need to track IL and ILA used to load immediate constants
730 in case they are later used as input to an A instruction. */
731 else if (is_ri16 (insn
, op_il
, &rt
, &immed
))
733 reg_immed
[rt
] = immed
;
735 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
739 else if (is_ri18 (insn
, op_ila
, &rt
, &immed
))
741 reg_immed
[rt
] = immed
& 0x3ffff;
743 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
747 /* STQD is used to save registers to the stack. */
748 else if (is_ri10 (insn
, op_stqd
, &rt
, &ra
, &immed
))
750 if (ra
== data
->cfa_reg
)
751 data
->reg_offset
[rt
] = data
->cfa_offset
- (immed
<< 4);
753 if (ra
== data
->cfa_reg
&& rt
== SPU_LR_REGNUM
760 if (ra
== SPU_RAW_SP_REGNUM
761 && (found_sp
? immed
== 0 : rt
== SPU_RAW_SP_REGNUM
)
769 /* _start uses SELB to set up the stack pointer. */
770 else if (is_rrr (insn
, op_selb
, &rt
, &ra
, &rb
, &rc
))
772 if (rt
== SPU_RAW_SP_REGNUM
&& !found_sp
)
776 /* We terminate if we find a branch. */
777 else if (is_branch (insn
, &immed
, &ra
))
782 /* If we successfully parsed until here, and didn't find any instruction
783 modifying SP, we assume we have a frameless function. */
787 /* Return cooked instead of raw SP. */
788 if (data
->cfa_reg
== SPU_RAW_SP_REGNUM
)
789 data
->cfa_reg
= SPU_SP_REGNUM
;
794 /* Return the first instruction after the prologue starting at PC. */
796 spu_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
798 struct spu_prologue_data data
;
799 return spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
802 /* Return the frame pointer in use at address PC. */
804 spu_virtual_frame_pointer (struct gdbarch
*gdbarch
, CORE_ADDR pc
,
805 int *reg
, LONGEST
*offset
)
807 struct spu_prologue_data data
;
808 spu_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
810 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
812 /* The 'frame pointer' address is CFA minus frame size. */
814 *offset
= data
.cfa_offset
- data
.size
;
818 /* ??? We don't really know ... */
819 *reg
= SPU_SP_REGNUM
;
824 /* Return true if we are in the function's epilogue, i.e. after the
825 instruction that destroyed the function's stack frame.
827 1) scan forward from the point of execution:
828 a) If you find an instruction that modifies the stack pointer
829 or transfers control (except a return), execution is not in
831 b) Stop scanning if you find a return instruction or reach the
832 end of the function or reach the hard limit for the size of
834 2) scan backward from the point of execution:
835 a) If you find an instruction that modifies the stack pointer,
836 execution *is* in an epilogue, return.
837 b) Stop scanning if you reach an instruction that transfers
838 control or the beginning of the function or reach the hard
839 limit for the size of an epilogue. */
842 spu_in_function_epilogue_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
844 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
845 CORE_ADDR scan_pc
, func_start
, func_end
, epilogue_start
, epilogue_end
;
848 int rt
, ra
, rb
, rc
, immed
;
850 /* Find the search limits based on function boundaries and hard limit.
851 We assume the epilogue can be up to 64 instructions long. */
853 const int spu_max_epilogue_size
= 64 * 4;
855 if (!find_pc_partial_function (pc
, NULL
, &func_start
, &func_end
))
858 if (pc
- func_start
< spu_max_epilogue_size
)
859 epilogue_start
= func_start
;
861 epilogue_start
= pc
- spu_max_epilogue_size
;
863 if (func_end
- pc
< spu_max_epilogue_size
)
864 epilogue_end
= func_end
;
866 epilogue_end
= pc
+ spu_max_epilogue_size
;
868 /* Scan forward until next 'bi $0'. */
870 for (scan_pc
= pc
; scan_pc
< epilogue_end
; scan_pc
+= 4)
872 if (target_read_memory (scan_pc
, buf
, 4))
874 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
876 if (is_branch (insn
, &immed
, &ra
))
878 if (immed
== 0 && ra
== SPU_LR_REGNUM
)
884 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
885 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
886 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
888 if (rt
== SPU_RAW_SP_REGNUM
)
893 if (scan_pc
>= epilogue_end
)
896 /* Scan backward until adjustment to stack pointer (R1). */
898 for (scan_pc
= pc
- 4; scan_pc
>= epilogue_start
; scan_pc
-= 4)
900 if (target_read_memory (scan_pc
, buf
, 4))
902 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
904 if (is_branch (insn
, &immed
, &ra
))
907 if (is_ri10 (insn
, op_ai
, &rt
, &ra
, &immed
)
908 || is_rr (insn
, op_a
, &rt
, &ra
, &rb
)
909 || is_ri10 (insn
, op_lqd
, &rt
, &ra
, &immed
))
911 if (rt
== SPU_RAW_SP_REGNUM
)
920 /* Normal stack frames. */
922 struct spu_unwind_cache
925 CORE_ADDR frame_base
;
926 CORE_ADDR local_base
;
928 struct trad_frame_saved_reg
*saved_regs
;
931 static struct spu_unwind_cache
*
932 spu_frame_unwind_cache (struct frame_info
*this_frame
,
933 void **this_prologue_cache
)
935 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
936 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
937 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
938 struct spu_unwind_cache
*info
;
939 struct spu_prologue_data data
;
940 CORE_ADDR id
= tdep
->id
;
943 if (*this_prologue_cache
)
944 return *this_prologue_cache
;
946 info
= FRAME_OBSTACK_ZALLOC (struct spu_unwind_cache
);
947 *this_prologue_cache
= info
;
948 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
949 info
->frame_base
= 0;
950 info
->local_base
= 0;
952 /* Find the start of the current function, and analyze its prologue. */
953 info
->func
= get_frame_func (this_frame
);
956 /* Fall back to using the current PC as frame ID. */
957 info
->func
= get_frame_pc (this_frame
);
961 spu_analyze_prologue (gdbarch
, info
->func
, get_frame_pc (this_frame
),
964 /* If successful, use prologue analysis data. */
965 if (data
.size
!= -1 && data
.cfa_reg
!= -1)
970 /* Determine CFA via unwound CFA_REG plus CFA_OFFSET. */
971 get_frame_register (this_frame
, data
.cfa_reg
, buf
);
972 cfa
= extract_unsigned_integer (buf
, 4, byte_order
) + data
.cfa_offset
;
973 cfa
= SPUADDR (id
, cfa
);
975 /* Call-saved register slots. */
976 for (i
= 0; i
< SPU_NUM_GPRS
; i
++)
977 if (i
== SPU_LR_REGNUM
978 || (i
>= SPU_SAVED1_REGNUM
&& i
<= SPU_SAVEDN_REGNUM
))
979 if (data
.reg_offset
[i
] != -1)
980 info
->saved_regs
[i
].addr
= cfa
- data
.reg_offset
[i
];
983 info
->frame_base
= cfa
;
984 info
->local_base
= cfa
- data
.size
;
987 /* Otherwise, fall back to reading the backchain link. */
995 /* Get local store limit. */
996 lslr
= get_frame_register_unsigned (this_frame
, SPU_LSLR_REGNUM
);
998 lslr
= (ULONGEST
) -1;
1000 /* Get the backchain. */
1001 reg
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1002 status
= safe_read_memory_integer (SPUADDR (id
, reg
), 4, byte_order
,
1005 /* A zero backchain terminates the frame chain. Also, sanity
1006 check against the local store size limit. */
1007 if (status
&& backchain
> 0 && backchain
<= lslr
)
1009 /* Assume the link register is saved into its slot. */
1010 if (backchain
+ 16 <= lslr
)
1011 info
->saved_regs
[SPU_LR_REGNUM
].addr
= SPUADDR (id
,
1015 info
->frame_base
= SPUADDR (id
, backchain
);
1016 info
->local_base
= SPUADDR (id
, reg
);
1020 /* If we didn't find a frame, we cannot determine SP / return address. */
1021 if (info
->frame_base
== 0)
1024 /* The previous SP is equal to the CFA. */
1025 trad_frame_set_value (info
->saved_regs
, SPU_SP_REGNUM
,
1026 SPUADDR_ADDR (info
->frame_base
));
1028 /* Read full contents of the unwound link register in order to
1029 be able to determine the return address. */
1030 if (trad_frame_addr_p (info
->saved_regs
, SPU_LR_REGNUM
))
1031 target_read_memory (info
->saved_regs
[SPU_LR_REGNUM
].addr
, buf
, 16);
1033 get_frame_register (this_frame
, SPU_LR_REGNUM
, buf
);
1035 /* Normally, the return address is contained in the slot 0 of the
1036 link register, and slots 1-3 are zero. For an overlay return,
1037 slot 0 contains the address of the overlay manager return stub,
1038 slot 1 contains the partition number of the overlay section to
1039 be returned to, and slot 2 contains the return address within
1040 that section. Return the latter address in that case. */
1041 if (extract_unsigned_integer (buf
+ 8, 4, byte_order
) != 0)
1042 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1043 extract_unsigned_integer (buf
+ 8, 4, byte_order
));
1045 trad_frame_set_value (info
->saved_regs
, SPU_PC_REGNUM
,
1046 extract_unsigned_integer (buf
, 4, byte_order
));
1052 spu_frame_this_id (struct frame_info
*this_frame
,
1053 void **this_prologue_cache
, struct frame_id
*this_id
)
1055 struct spu_unwind_cache
*info
=
1056 spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1058 if (info
->frame_base
== 0)
1061 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
1064 static struct value
*
1065 spu_frame_prev_register (struct frame_info
*this_frame
,
1066 void **this_prologue_cache
, int regnum
)
1068 struct spu_unwind_cache
*info
1069 = spu_frame_unwind_cache (this_frame
, this_prologue_cache
);
1071 /* Special-case the stack pointer. */
1072 if (regnum
== SPU_RAW_SP_REGNUM
)
1073 regnum
= SPU_SP_REGNUM
;
1075 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1078 static const struct frame_unwind spu_frame_unwind
= {
1081 spu_frame_prev_register
,
1083 default_frame_sniffer
1087 spu_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
1089 struct spu_unwind_cache
*info
1090 = spu_frame_unwind_cache (this_frame
, this_cache
);
1091 return info
->local_base
;
1094 static const struct frame_base spu_frame_base
= {
1096 spu_frame_base_address
,
1097 spu_frame_base_address
,
1098 spu_frame_base_address
1102 spu_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1104 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1105 CORE_ADDR pc
= frame_unwind_register_unsigned (next_frame
, SPU_PC_REGNUM
);
1106 /* Mask off interrupt enable bit. */
1107 return SPUADDR (tdep
->id
, pc
& -4);
1111 spu_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1113 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1114 CORE_ADDR sp
= frame_unwind_register_unsigned (next_frame
, SPU_SP_REGNUM
);
1115 return SPUADDR (tdep
->id
, sp
);
1119 spu_read_pc (struct regcache
*regcache
)
1121 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1123 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &pc
);
1124 /* Mask off interrupt enable bit. */
1125 return SPUADDR (tdep
->id
, pc
& -4);
1129 spu_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1131 /* Keep interrupt enabled state unchanged. */
1133 regcache_cooked_read_unsigned (regcache
, SPU_PC_REGNUM
, &old_pc
);
1134 regcache_cooked_write_unsigned (regcache
, SPU_PC_REGNUM
,
1135 (SPUADDR_ADDR (pc
) & -4) | (old_pc
& 3));
1139 /* Cell/B.E. cross-architecture unwinder support. */
1141 struct spu2ppu_cache
1143 struct frame_id frame_id
;
1144 struct regcache
*regcache
;
1147 static struct gdbarch
*
1148 spu2ppu_prev_arch (struct frame_info
*this_frame
, void **this_cache
)
1150 struct spu2ppu_cache
*cache
= *this_cache
;
1151 return get_regcache_arch (cache
->regcache
);
1155 spu2ppu_this_id (struct frame_info
*this_frame
,
1156 void **this_cache
, struct frame_id
*this_id
)
1158 struct spu2ppu_cache
*cache
= *this_cache
;
1159 *this_id
= cache
->frame_id
;
1162 static struct value
*
1163 spu2ppu_prev_register (struct frame_info
*this_frame
,
1164 void **this_cache
, int regnum
)
1166 struct spu2ppu_cache
*cache
= *this_cache
;
1167 struct gdbarch
*gdbarch
= get_regcache_arch (cache
->regcache
);
1170 buf
= alloca (register_size (gdbarch
, regnum
));
1171 regcache_cooked_read (cache
->regcache
, regnum
, buf
);
1172 return frame_unwind_got_bytes (this_frame
, regnum
, buf
);
1176 spu2ppu_sniffer (const struct frame_unwind
*self
,
1177 struct frame_info
*this_frame
, void **this_prologue_cache
)
1179 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1180 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1181 CORE_ADDR base
, func
, backchain
;
1184 if (gdbarch_bfd_arch_info (target_gdbarch
)->arch
== bfd_arch_spu
)
1187 base
= get_frame_sp (this_frame
);
1188 func
= get_frame_pc (this_frame
);
1189 if (target_read_memory (base
, buf
, 4))
1191 backchain
= extract_unsigned_integer (buf
, 4, byte_order
);
1195 struct frame_info
*fi
;
1197 struct spu2ppu_cache
*cache
1198 = FRAME_OBSTACK_CALLOC (1, struct spu2ppu_cache
);
1200 cache
->frame_id
= frame_id_build (base
+ 16, func
);
1202 for (fi
= get_next_frame (this_frame
); fi
; fi
= get_next_frame (fi
))
1203 if (gdbarch_bfd_arch_info (get_frame_arch (fi
))->arch
!= bfd_arch_spu
)
1208 cache
->regcache
= frame_save_as_regcache (fi
);
1209 *this_prologue_cache
= cache
;
1214 struct regcache
*regcache
;
1215 regcache
= get_thread_arch_regcache (inferior_ptid
, target_gdbarch
);
1216 cache
->regcache
= regcache_dup (regcache
);
1217 *this_prologue_cache
= cache
;
1226 spu2ppu_dealloc_cache (struct frame_info
*self
, void *this_cache
)
1228 struct spu2ppu_cache
*cache
= this_cache
;
1229 regcache_xfree (cache
->regcache
);
1232 static const struct frame_unwind spu2ppu_unwind
= {
1235 spu2ppu_prev_register
,
1238 spu2ppu_dealloc_cache
,
1243 /* Function calling convention. */
1246 spu_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1252 spu_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
1253 struct value
**args
, int nargs
, struct type
*value_type
,
1254 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
1255 struct regcache
*regcache
)
1257 /* Allocate space sufficient for a breakpoint, keeping the stack aligned. */
1258 sp
= (sp
- 4) & ~15;
1259 /* Store the address of that breakpoint */
1261 /* The call starts at the callee's entry point. */
1268 spu_scalar_value_p (struct type
*type
)
1270 switch (TYPE_CODE (type
))
1273 case TYPE_CODE_ENUM
:
1274 case TYPE_CODE_RANGE
:
1275 case TYPE_CODE_CHAR
:
1276 case TYPE_CODE_BOOL
:
1279 return TYPE_LENGTH (type
) <= 16;
1287 spu_value_to_regcache (struct regcache
*regcache
, int regnum
,
1288 struct type
*type
, const gdb_byte
*in
)
1290 int len
= TYPE_LENGTH (type
);
1292 if (spu_scalar_value_p (type
))
1294 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1295 regcache_cooked_write_part (regcache
, regnum
, preferred_slot
, len
, in
);
1301 regcache_cooked_write (regcache
, regnum
++, in
);
1307 regcache_cooked_write_part (regcache
, regnum
, 0, len
, in
);
1312 spu_regcache_to_value (struct regcache
*regcache
, int regnum
,
1313 struct type
*type
, gdb_byte
*out
)
1315 int len
= TYPE_LENGTH (type
);
1317 if (spu_scalar_value_p (type
))
1319 int preferred_slot
= len
< 4 ? 4 - len
: 0;
1320 regcache_cooked_read_part (regcache
, regnum
, preferred_slot
, len
, out
);
1326 regcache_cooked_read (regcache
, regnum
++, out
);
1332 regcache_cooked_read_part (regcache
, regnum
, 0, len
, out
);
1337 spu_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1338 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1339 int nargs
, struct value
**args
, CORE_ADDR sp
,
1340 int struct_return
, CORE_ADDR struct_addr
)
1342 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1345 int regnum
= SPU_ARG1_REGNUM
;
1349 /* Set the return address. */
1350 memset (buf
, 0, sizeof buf
);
1351 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (bp_addr
));
1352 regcache_cooked_write (regcache
, SPU_LR_REGNUM
, buf
);
1354 /* If STRUCT_RETURN is true, then the struct return address (in
1355 STRUCT_ADDR) will consume the first argument-passing register.
1356 Both adjust the register count and store that value. */
1359 memset (buf
, 0, sizeof buf
);
1360 store_unsigned_integer (buf
, 4, byte_order
, SPUADDR_ADDR (struct_addr
));
1361 regcache_cooked_write (regcache
, regnum
++, buf
);
1364 /* Fill in argument registers. */
1365 for (i
= 0; i
< nargs
; i
++)
1367 struct value
*arg
= args
[i
];
1368 struct type
*type
= check_typedef (value_type (arg
));
1369 const gdb_byte
*contents
= value_contents (arg
);
1370 int len
= TYPE_LENGTH (type
);
1371 int n_regs
= align_up (len
, 16) / 16;
1373 /* If the argument doesn't wholly fit into registers, it and
1374 all subsequent arguments go to the stack. */
1375 if (regnum
+ n_regs
- 1 > SPU_ARGN_REGNUM
)
1381 spu_value_to_regcache (regcache
, regnum
, type
, contents
);
1385 /* Overflow arguments go to the stack. */
1386 if (stack_arg
!= -1)
1390 /* Allocate all required stack size. */
1391 for (i
= stack_arg
; i
< nargs
; i
++)
1393 struct type
*type
= check_typedef (value_type (args
[i
]));
1394 sp
-= align_up (TYPE_LENGTH (type
), 16);
1397 /* Fill in stack arguments. */
1399 for (i
= stack_arg
; i
< nargs
; i
++)
1401 struct value
*arg
= args
[i
];
1402 struct type
*type
= check_typedef (value_type (arg
));
1403 int len
= TYPE_LENGTH (type
);
1406 if (spu_scalar_value_p (type
))
1407 preferred_slot
= len
< 4 ? 4 - len
: 0;
1411 target_write_memory (ap
+ preferred_slot
, value_contents (arg
), len
);
1412 ap
+= align_up (TYPE_LENGTH (type
), 16);
1416 /* Allocate stack frame header. */
1419 /* Store stack back chain. */
1420 regcache_cooked_read (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1421 target_write_memory (sp
, buf
, 16);
1423 /* Finally, update all slots of the SP register. */
1424 sp_delta
= sp
- extract_unsigned_integer (buf
, 4, byte_order
);
1425 for (i
= 0; i
< 4; i
++)
1427 CORE_ADDR sp_slot
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
1428 store_unsigned_integer (buf
+ 4*i
, 4, byte_order
, sp_slot
+ sp_delta
);
1430 regcache_cooked_write (regcache
, SPU_RAW_SP_REGNUM
, buf
);
1435 static struct frame_id
1436 spu_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1438 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1439 CORE_ADDR pc
= get_frame_register_unsigned (this_frame
, SPU_PC_REGNUM
);
1440 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, SPU_SP_REGNUM
);
1441 return frame_id_build (SPUADDR (tdep
->id
, sp
), SPUADDR (tdep
->id
, pc
& -4));
1444 /* Function return value access. */
1446 static enum return_value_convention
1447 spu_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
1448 struct type
*type
, struct regcache
*regcache
,
1449 gdb_byte
*out
, const gdb_byte
*in
)
1451 enum return_value_convention rvc
;
1452 int opencl_vector
= 0;
1455 && TYPE_CALLING_CONVENTION (func_type
) == DW_CC_GDB_IBM_OpenCL
1456 && TYPE_CODE (type
) == TYPE_CODE_ARRAY
1457 && TYPE_VECTOR (type
))
1460 if (TYPE_LENGTH (type
) <= (SPU_ARGN_REGNUM
- SPU_ARG1_REGNUM
+ 1) * 16)
1461 rvc
= RETURN_VALUE_REGISTER_CONVENTION
;
1463 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
1469 case RETURN_VALUE_REGISTER_CONVENTION
:
1470 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1471 regcache_cooked_write_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, in
);
1473 spu_value_to_regcache (regcache
, SPU_ARG1_REGNUM
, type
, in
);
1476 case RETURN_VALUE_STRUCT_CONVENTION
:
1477 error (_("Cannot set function return value."));
1485 case RETURN_VALUE_REGISTER_CONVENTION
:
1486 if (opencl_vector
&& TYPE_LENGTH (type
) == 2)
1487 regcache_cooked_read_part (regcache
, SPU_ARG1_REGNUM
, 2, 2, out
);
1489 spu_regcache_to_value (regcache
, SPU_ARG1_REGNUM
, type
, out
);
1492 case RETURN_VALUE_STRUCT_CONVENTION
:
1493 error (_("Function return value unknown."));
1504 static const gdb_byte
*
1505 spu_breakpoint_from_pc (struct gdbarch
*gdbarch
,
1506 CORE_ADDR
* pcptr
, int *lenptr
)
1508 static const gdb_byte breakpoint
[] = { 0x00, 0x00, 0x3f, 0xff };
1510 *lenptr
= sizeof breakpoint
;
1515 spu_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
1516 struct bp_target_info
*bp_tgt
)
1518 /* We work around a problem in combined Cell/B.E. debugging here. Consider
1519 that in a combined application, we have some breakpoints inserted in SPU
1520 code, and now the application forks (on the PPU side). GDB common code
1521 will assume that the fork system call copied all breakpoints into the new
1522 process' address space, and that all those copies now need to be removed
1523 (see breakpoint.c:detach_breakpoints).
1525 While this is certainly true for PPU side breakpoints, it is not true
1526 for SPU side breakpoints. fork will clone the SPU context file
1527 descriptors, so that all the existing SPU contexts are in accessible
1528 in the new process. However, the contents of the SPU contexts themselves
1529 are *not* cloned. Therefore the effect of detach_breakpoints is to
1530 remove SPU breakpoints from the *original* SPU context's local store
1531 -- this is not the correct behaviour.
1533 The workaround is to check whether the PID we are asked to remove this
1534 breakpoint from (i.e. ptid_get_pid (inferior_ptid)) is different from the
1535 PID of the current inferior (i.e. current_inferior ()->pid). This is only
1536 true in the context of detach_breakpoints. If so, we simply do nothing.
1537 [ Note that for the fork child process, it does not matter if breakpoints
1538 remain inserted, because those SPU contexts are not runnable anyway --
1539 the Linux kernel allows only the original process to invoke spu_run. */
1541 if (ptid_get_pid (inferior_ptid
) != current_inferior ()->pid
)
1544 return default_memory_remove_breakpoint (gdbarch
, bp_tgt
);
1548 /* Software single-stepping support. */
1551 spu_software_single_step (struct frame_info
*frame
)
1553 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1554 struct address_space
*aspace
= get_frame_address_space (frame
);
1555 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1556 CORE_ADDR pc
, next_pc
;
1562 pc
= get_frame_pc (frame
);
1564 if (target_read_memory (pc
, buf
, 4))
1566 insn
= extract_unsigned_integer (buf
, 4, byte_order
);
1568 /* Get local store limit. */
1569 lslr
= get_frame_register_unsigned (frame
, SPU_LSLR_REGNUM
);
1571 lslr
= (ULONGEST
) -1;
1573 /* Next sequential instruction is at PC + 4, except if the current
1574 instruction is a PPE-assisted call, in which case it is at PC + 8.
1575 Wrap around LS limit to be on the safe side. */
1576 if ((insn
& 0xffffff00) == 0x00002100)
1577 next_pc
= (SPUADDR_ADDR (pc
) + 8) & lslr
;
1579 next_pc
= (SPUADDR_ADDR (pc
) + 4) & lslr
;
1581 insert_single_step_breakpoint (gdbarch
,
1582 aspace
, SPUADDR (SPUADDR_SPU (pc
), next_pc
));
1584 if (is_branch (insn
, &offset
, ®
))
1586 CORE_ADDR target
= offset
;
1588 if (reg
== SPU_PC_REGNUM
)
1589 target
+= SPUADDR_ADDR (pc
);
1592 get_frame_register_bytes (frame
, reg
, 0, 4, buf
);
1593 target
+= extract_unsigned_integer (buf
, 4, byte_order
) & -4;
1596 target
= target
& lslr
;
1597 if (target
!= next_pc
)
1598 insert_single_step_breakpoint (gdbarch
, aspace
,
1599 SPUADDR (SPUADDR_SPU (pc
), target
));
1606 /* Longjmp support. */
1609 spu_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
1611 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1612 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1613 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1617 /* Jump buffer is pointed to by the argument register $r3. */
1618 get_frame_register_bytes (frame
, SPU_ARG1_REGNUM
, 0, 4, buf
);
1619 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
1620 if (target_read_memory (SPUADDR (tdep
->id
, jb_addr
), buf
, 4))
1623 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
1624 *pc
= SPUADDR (tdep
->id
, *pc
);
1631 struct spu_dis_asm_data
1633 struct gdbarch
*gdbarch
;
1638 spu_dis_asm_print_address (bfd_vma addr
, struct disassemble_info
*info
)
1640 struct spu_dis_asm_data
*data
= info
->application_data
;
1641 print_address (data
->gdbarch
, SPUADDR (data
->id
, addr
), info
->stream
);
1645 gdb_print_insn_spu (bfd_vma memaddr
, struct disassemble_info
*info
)
1647 /* The opcodes disassembler does 18-bit address arithmetic. Make
1648 sure the SPU ID encoded in the high bits is added back when we
1649 call print_address. */
1650 struct disassemble_info spu_info
= *info
;
1651 struct spu_dis_asm_data data
;
1652 data
.gdbarch
= info
->application_data
;
1653 data
.id
= SPUADDR_SPU (memaddr
);
1655 spu_info
.application_data
= &data
;
1656 spu_info
.print_address_func
= spu_dis_asm_print_address
;
1657 return print_insn_spu (memaddr
, &spu_info
);
1661 /* Target overlays for the SPU overlay manager.
1663 See the documentation of simple_overlay_update for how the
1664 interface is supposed to work.
1666 Data structures used by the overlay manager:
1674 } _ovly_table[]; -- one entry per overlay section
1676 struct ovly_buf_table
1679 } _ovly_buf_table[]; -- one entry per overlay buffer
1681 _ovly_table should never change.
1683 Both tables are aligned to a 16-byte boundary, the symbols
1684 _ovly_table and _ovly_buf_table are of type STT_OBJECT and their
1685 size set to the size of the respective array. buf in _ovly_table is
1686 an index into _ovly_buf_table.
1688 mapped is an index into _ovly_table. Both the mapped and buf indices start
1689 from one to reference the first entry in their respective tables. */
1691 /* Using the per-objfile private data mechanism, we store for each
1692 objfile an array of "struct spu_overlay_table" structures, one
1693 for each obj_section of the objfile. This structure holds two
1694 fields, MAPPED_PTR and MAPPED_VAL. If MAPPED_PTR is zero, this
1695 is *not* an overlay section. If it is non-zero, it represents
1696 a target address. The overlay section is mapped iff the target
1697 integer at this location equals MAPPED_VAL. */
1699 static const struct objfile_data
*spu_overlay_data
;
1701 struct spu_overlay_table
1703 CORE_ADDR mapped_ptr
;
1704 CORE_ADDR mapped_val
;
1707 /* Retrieve the overlay table for OBJFILE. If not already cached, read
1708 the _ovly_table data structure from the target and initialize the
1709 spu_overlay_table data structure from it. */
1710 static struct spu_overlay_table
*
1711 spu_get_overlay_table (struct objfile
*objfile
)
1713 enum bfd_endian byte_order
= bfd_big_endian (objfile
->obfd
)?
1714 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1715 struct minimal_symbol
*ovly_table_msym
, *ovly_buf_table_msym
;
1716 CORE_ADDR ovly_table_base
, ovly_buf_table_base
;
1717 unsigned ovly_table_size
, ovly_buf_table_size
;
1718 struct spu_overlay_table
*tbl
;
1719 struct obj_section
*osect
;
1723 tbl
= objfile_data (objfile
, spu_overlay_data
);
1727 ovly_table_msym
= lookup_minimal_symbol ("_ovly_table", NULL
, objfile
);
1728 if (!ovly_table_msym
)
1731 ovly_buf_table_msym
= lookup_minimal_symbol ("_ovly_buf_table",
1733 if (!ovly_buf_table_msym
)
1736 ovly_table_base
= SYMBOL_VALUE_ADDRESS (ovly_table_msym
);
1737 ovly_table_size
= MSYMBOL_SIZE (ovly_table_msym
);
1739 ovly_buf_table_base
= SYMBOL_VALUE_ADDRESS (ovly_buf_table_msym
);
1740 ovly_buf_table_size
= MSYMBOL_SIZE (ovly_buf_table_msym
);
1742 ovly_table
= xmalloc (ovly_table_size
);
1743 read_memory (ovly_table_base
, ovly_table
, ovly_table_size
);
1745 tbl
= OBSTACK_CALLOC (&objfile
->objfile_obstack
,
1746 objfile
->sections_end
- objfile
->sections
,
1747 struct spu_overlay_table
);
1749 for (i
= 0; i
< ovly_table_size
/ 16; i
++)
1751 CORE_ADDR vma
= extract_unsigned_integer (ovly_table
+ 16*i
+ 0,
1753 CORE_ADDR size
= extract_unsigned_integer (ovly_table
+ 16*i
+ 4,
1755 CORE_ADDR pos
= extract_unsigned_integer (ovly_table
+ 16*i
+ 8,
1757 CORE_ADDR buf
= extract_unsigned_integer (ovly_table
+ 16*i
+ 12,
1760 if (buf
== 0 || (buf
- 1) * 4 >= ovly_buf_table_size
)
1763 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1764 if (vma
== bfd_section_vma (objfile
->obfd
, osect
->the_bfd_section
)
1765 && pos
== osect
->the_bfd_section
->filepos
)
1767 int ndx
= osect
- objfile
->sections
;
1768 tbl
[ndx
].mapped_ptr
= ovly_buf_table_base
+ (buf
- 1) * 4;
1769 tbl
[ndx
].mapped_val
= i
+ 1;
1775 set_objfile_data (objfile
, spu_overlay_data
, tbl
);
1779 /* Read _ovly_buf_table entry from the target to dermine whether
1780 OSECT is currently mapped, and update the mapped state. */
1782 spu_overlay_update_osect (struct obj_section
*osect
)
1784 enum bfd_endian byte_order
= bfd_big_endian (osect
->objfile
->obfd
)?
1785 BFD_ENDIAN_BIG
: BFD_ENDIAN_LITTLE
;
1786 struct spu_overlay_table
*ovly_table
;
1789 ovly_table
= spu_get_overlay_table (osect
->objfile
);
1793 ovly_table
+= osect
- osect
->objfile
->sections
;
1794 if (ovly_table
->mapped_ptr
== 0)
1797 id
= SPUADDR_SPU (obj_section_addr (osect
));
1798 val
= read_memory_unsigned_integer (SPUADDR (id
, ovly_table
->mapped_ptr
),
1800 osect
->ovly_mapped
= (val
== ovly_table
->mapped_val
);
1803 /* If OSECT is NULL, then update all sections' mapped state.
1804 If OSECT is non-NULL, then update only OSECT's mapped state. */
1806 spu_overlay_update (struct obj_section
*osect
)
1808 /* Just one section. */
1810 spu_overlay_update_osect (osect
);
1815 struct objfile
*objfile
;
1817 ALL_OBJSECTIONS (objfile
, osect
)
1818 if (section_is_overlay (osect
))
1819 spu_overlay_update_osect (osect
);
1823 /* Whenever a new objfile is loaded, read the target's _ovly_table.
1824 If there is one, go through all sections and make sure for non-
1825 overlay sections LMA equals VMA, while for overlay sections LMA
1826 is larger than SPU_OVERLAY_LMA. */
1828 spu_overlay_new_objfile (struct objfile
*objfile
)
1830 struct spu_overlay_table
*ovly_table
;
1831 struct obj_section
*osect
;
1833 /* If we've already touched this file, do nothing. */
1834 if (!objfile
|| objfile_data (objfile
, spu_overlay_data
) != NULL
)
1837 /* Consider only SPU objfiles. */
1838 if (bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1841 /* Check if this objfile has overlays. */
1842 ovly_table
= spu_get_overlay_table (objfile
);
1846 /* Now go and fiddle with all the LMAs. */
1847 ALL_OBJFILE_OSECTIONS (objfile
, osect
)
1849 bfd
*obfd
= objfile
->obfd
;
1850 asection
*bsect
= osect
->the_bfd_section
;
1851 int ndx
= osect
- objfile
->sections
;
1853 if (ovly_table
[ndx
].mapped_ptr
== 0)
1854 bfd_section_lma (obfd
, bsect
) = bfd_section_vma (obfd
, bsect
);
1856 bfd_section_lma (obfd
, bsect
) = SPU_OVERLAY_LMA
+ bsect
->filepos
;
1861 /* Insert temporary breakpoint on "main" function of newly loaded
1862 SPE context OBJFILE. */
1864 spu_catch_start (struct objfile
*objfile
)
1866 struct minimal_symbol
*minsym
;
1867 struct symtab
*symtab
;
1871 /* Do this only if requested by "set spu stop-on-load on". */
1872 if (!spu_stop_on_load_p
)
1875 /* Consider only SPU objfiles. */
1876 if (!objfile
|| bfd_get_arch (objfile
->obfd
) != bfd_arch_spu
)
1879 /* The main objfile is handled differently. */
1880 if (objfile
== symfile_objfile
)
1883 /* There can be multiple symbols named "main". Search for the
1884 "main" in *this* objfile. */
1885 minsym
= lookup_minimal_symbol ("main", NULL
, objfile
);
1889 /* If we have debugging information, try to use it -- this
1890 will allow us to properly skip the prologue. */
1891 pc
= SYMBOL_VALUE_ADDRESS (minsym
);
1892 symtab
= find_pc_sect_symtab (pc
, SYMBOL_OBJ_SECTION (minsym
));
1895 struct blockvector
*bv
= BLOCKVECTOR (symtab
);
1896 struct block
*block
= BLOCKVECTOR_BLOCK (bv
, GLOBAL_BLOCK
);
1898 struct symtab_and_line sal
;
1900 sym
= lookup_block_symbol (block
, "main", VAR_DOMAIN
);
1903 fixup_symbol_section (sym
, objfile
);
1904 sal
= find_function_start_sal (sym
, 1);
1909 /* Use a numerical address for the set_breakpoint command to avoid having
1910 the breakpoint re-set incorrectly. */
1911 xsnprintf (buf
, sizeof buf
, "*%s", core_addr_to_string (pc
));
1912 create_breakpoint (get_objfile_arch (objfile
), buf
/* arg */,
1913 NULL
/* cond_string */, -1 /* thread */,
1914 0 /* parse_condition_and_thread */, 1 /* tempflag */,
1915 bp_breakpoint
/* type_wanted */,
1916 0 /* ignore_count */,
1917 AUTO_BOOLEAN_FALSE
/* pending_break_support */,
1918 NULL
/* ops */, 0 /* from_tty */, 1 /* enabled */,
1923 /* Look up OBJFILE loaded into FRAME's SPU context. */
1924 static struct objfile
*
1925 spu_objfile_from_frame (struct frame_info
*frame
)
1927 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1928 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1929 struct objfile
*obj
;
1931 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
1936 if (obj
->sections
!= obj
->sections_end
1937 && SPUADDR_SPU (obj_section_addr (obj
->sections
)) == tdep
->id
)
1944 /* Flush cache for ea pointer access if available. */
1946 flush_ea_cache (void)
1948 struct minimal_symbol
*msymbol
;
1949 struct objfile
*obj
;
1951 if (!has_stack_frames ())
1954 obj
= spu_objfile_from_frame (get_current_frame ());
1958 /* Lookup inferior function __cache_flush. */
1959 msymbol
= lookup_minimal_symbol ("__cache_flush", NULL
, obj
);
1960 if (msymbol
!= NULL
)
1965 type
= objfile_type (obj
)->builtin_void
;
1966 type
= lookup_function_type (type
);
1967 type
= lookup_pointer_type (type
);
1968 addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
1970 call_function_by_hand (value_from_pointer (type
, addr
), 0, NULL
);
1974 /* This handler is called when the inferior has stopped. If it is stopped in
1975 SPU architecture then flush the ea cache if used. */
1977 spu_attach_normal_stop (struct bpstats
*bs
, int print_frame
)
1979 if (!spu_auto_flush_cache_p
)
1982 /* Temporarily reset spu_auto_flush_cache_p to avoid recursively
1983 re-entering this function when __cache_flush stops. */
1984 spu_auto_flush_cache_p
= 0;
1986 spu_auto_flush_cache_p
= 1;
1990 /* "info spu" commands. */
1993 info_spu_event_command (char *args
, int from_tty
)
1995 struct frame_info
*frame
= get_selected_frame (NULL
);
1996 ULONGEST event_status
= 0;
1997 ULONGEST event_mask
= 0;
1998 struct cleanup
*chain
;
2004 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2005 error (_("\"info spu\" is only supported on the SPU architecture."));
2007 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2009 xsnprintf (annex
, sizeof annex
, "%d/event_status", id
);
2010 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2011 buf
, 0, (sizeof (buf
) - 1));
2013 error (_("Could not read event_status."));
2015 event_status
= strtoulst (buf
, NULL
, 16);
2017 xsnprintf (annex
, sizeof annex
, "%d/event_mask", id
);
2018 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2019 buf
, 0, (sizeof (buf
) - 1));
2021 error (_("Could not read event_mask."));
2023 event_mask
= strtoulst (buf
, NULL
, 16);
2025 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoEvent");
2027 if (ui_out_is_mi_like_p (uiout
))
2029 ui_out_field_fmt (uiout
, "event_status",
2030 "0x%s", phex_nz (event_status
, 4));
2031 ui_out_field_fmt (uiout
, "event_mask",
2032 "0x%s", phex_nz (event_mask
, 4));
2036 printf_filtered (_("Event Status 0x%s\n"), phex (event_status
, 4));
2037 printf_filtered (_("Event Mask 0x%s\n"), phex (event_mask
, 4));
2040 do_cleanups (chain
);
2044 info_spu_signal_command (char *args
, int from_tty
)
2046 struct frame_info
*frame
= get_selected_frame (NULL
);
2047 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2048 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2049 ULONGEST signal1
= 0;
2050 ULONGEST signal1_type
= 0;
2051 int signal1_pending
= 0;
2052 ULONGEST signal2
= 0;
2053 ULONGEST signal2_type
= 0;
2054 int signal2_pending
= 0;
2055 struct cleanup
*chain
;
2061 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2062 error (_("\"info spu\" is only supported on the SPU architecture."));
2064 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2066 xsnprintf (annex
, sizeof annex
, "%d/signal1", id
);
2067 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2069 error (_("Could not read signal1."));
2072 signal1
= extract_unsigned_integer (buf
, 4, byte_order
);
2073 signal1_pending
= 1;
2076 xsnprintf (annex
, sizeof annex
, "%d/signal1_type", id
);
2077 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2078 buf
, 0, (sizeof (buf
) - 1));
2080 error (_("Could not read signal1_type."));
2082 signal1_type
= strtoulst (buf
, NULL
, 16);
2084 xsnprintf (annex
, sizeof annex
, "%d/signal2", id
);
2085 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
, buf
, 0, 4);
2087 error (_("Could not read signal2."));
2090 signal2
= extract_unsigned_integer (buf
, 4, byte_order
);
2091 signal2_pending
= 1;
2094 xsnprintf (annex
, sizeof annex
, "%d/signal2_type", id
);
2095 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2096 buf
, 0, (sizeof (buf
) - 1));
2098 error (_("Could not read signal2_type."));
2100 signal2_type
= strtoulst (buf
, NULL
, 16);
2102 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoSignal");
2104 if (ui_out_is_mi_like_p (uiout
))
2106 ui_out_field_int (uiout
, "signal1_pending", signal1_pending
);
2107 ui_out_field_fmt (uiout
, "signal1", "0x%s", phex_nz (signal1
, 4));
2108 ui_out_field_int (uiout
, "signal1_type", signal1_type
);
2109 ui_out_field_int (uiout
, "signal2_pending", signal2_pending
);
2110 ui_out_field_fmt (uiout
, "signal2", "0x%s", phex_nz (signal2
, 4));
2111 ui_out_field_int (uiout
, "signal2_type", signal2_type
);
2115 if (signal1_pending
)
2116 printf_filtered (_("Signal 1 control word 0x%s "), phex (signal1
, 4));
2118 printf_filtered (_("Signal 1 not pending "));
2121 printf_filtered (_("(Type Or)\n"));
2123 printf_filtered (_("(Type Overwrite)\n"));
2125 if (signal2_pending
)
2126 printf_filtered (_("Signal 2 control word 0x%s "), phex (signal2
, 4));
2128 printf_filtered (_("Signal 2 not pending "));
2131 printf_filtered (_("(Type Or)\n"));
2133 printf_filtered (_("(Type Overwrite)\n"));
2136 do_cleanups (chain
);
2140 info_spu_mailbox_list (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
,
2141 const char *field
, const char *msg
)
2143 struct cleanup
*chain
;
2149 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 1, nr
, "mbox");
2151 ui_out_table_header (uiout
, 32, ui_left
, field
, msg
);
2152 ui_out_table_body (uiout
);
2154 for (i
= 0; i
< nr
; i
++)
2156 struct cleanup
*val_chain
;
2158 val_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "mbox");
2159 val
= extract_unsigned_integer (buf
+ 4*i
, 4, byte_order
);
2160 ui_out_field_fmt (uiout
, field
, "0x%s", phex (val
, 4));
2161 do_cleanups (val_chain
);
2163 if (!ui_out_is_mi_like_p (uiout
))
2164 printf_filtered ("\n");
2167 do_cleanups (chain
);
2171 info_spu_mailbox_command (char *args
, int from_tty
)
2173 struct frame_info
*frame
= get_selected_frame (NULL
);
2174 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2175 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2176 struct cleanup
*chain
;
2182 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2183 error (_("\"info spu\" is only supported on the SPU architecture."));
2185 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2187 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoMailbox");
2189 xsnprintf (annex
, sizeof annex
, "%d/mbox_info", id
);
2190 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2191 buf
, 0, sizeof buf
);
2193 error (_("Could not read mbox_info."));
2195 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2196 "mbox", "SPU Outbound Mailbox");
2198 xsnprintf (annex
, sizeof annex
, "%d/ibox_info", id
);
2199 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2200 buf
, 0, sizeof buf
);
2202 error (_("Could not read ibox_info."));
2204 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2205 "ibox", "SPU Outbound Interrupt Mailbox");
2207 xsnprintf (annex
, sizeof annex
, "%d/wbox_info", id
);
2208 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2209 buf
, 0, sizeof buf
);
2211 error (_("Could not read wbox_info."));
2213 info_spu_mailbox_list (buf
, len
/ 4, byte_order
,
2214 "wbox", "SPU Inbound Mailbox");
2216 do_cleanups (chain
);
2220 spu_mfc_get_bitfield (ULONGEST word
, int first
, int last
)
2222 ULONGEST mask
= ~(~(ULONGEST
)0 << (last
- first
+ 1));
2223 return (word
>> (63 - last
)) & mask
;
2227 info_spu_dma_cmdlist (gdb_byte
*buf
, int nr
, enum bfd_endian byte_order
)
2229 static char *spu_mfc_opcode
[256] =
2231 /* 00 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2232 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2233 /* 10 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2234 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2235 /* 20 */ "put", "putb", "putf", NULL
, "putl", "putlb", "putlf", NULL
,
2236 "puts", "putbs", "putfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2237 /* 30 */ "putr", "putrb", "putrf", NULL
, "putrl", "putrlb", "putrlf", NULL
,
2238 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2239 /* 40 */ "get", "getb", "getf", NULL
, "getl", "getlb", "getlf", NULL
,
2240 "gets", "getbs", "getfs", NULL
, NULL
, NULL
, NULL
, NULL
,
2241 /* 50 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2242 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2243 /* 60 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2244 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2245 /* 70 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2246 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2247 /* 80 */ "sdcrt", "sdcrtst", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2248 NULL
, "sdcrz", NULL
, NULL
, NULL
, "sdcrst", NULL
, "sdcrf",
2249 /* 90 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2250 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2251 /* a0 */ "sndsig", "sndsigb", "sndsigf", NULL
, NULL
, NULL
, NULL
, NULL
,
2252 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2253 /* b0 */ "putlluc", NULL
, NULL
, NULL
, "putllc", NULL
, NULL
, NULL
,
2254 "putqlluc", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2255 /* c0 */ "barrier", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2256 "mfceieio", NULL
, NULL
, NULL
, "mfcsync", NULL
, NULL
, NULL
,
2257 /* d0 */ "getllar", NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2258 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2259 /* e0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2260 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2261 /* f0 */ NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2262 NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
, NULL
,
2265 int *seq
= alloca (nr
* sizeof (int));
2267 struct cleanup
*chain
;
2271 /* Determine sequence in which to display (valid) entries. */
2272 for (i
= 0; i
< nr
; i
++)
2274 /* Search for the first valid entry all of whose
2275 dependencies are met. */
2276 for (j
= 0; j
< nr
; j
++)
2278 ULONGEST mfc_cq_dw3
;
2279 ULONGEST dependencies
;
2281 if (done
& (1 << (nr
- 1 - j
)))
2285 = extract_unsigned_integer (buf
+ 32*j
+ 24,8, byte_order
);
2286 if (!spu_mfc_get_bitfield (mfc_cq_dw3
, 16, 16))
2289 dependencies
= spu_mfc_get_bitfield (mfc_cq_dw3
, 0, nr
- 1);
2290 if ((dependencies
& done
) != dependencies
)
2294 done
|= 1 << (nr
- 1 - j
);
2305 chain
= make_cleanup_ui_out_table_begin_end (uiout
, 10, nr
, "dma_cmd");
2307 ui_out_table_header (uiout
, 7, ui_left
, "opcode", "Opcode");
2308 ui_out_table_header (uiout
, 3, ui_left
, "tag", "Tag");
2309 ui_out_table_header (uiout
, 3, ui_left
, "tid", "TId");
2310 ui_out_table_header (uiout
, 3, ui_left
, "rid", "RId");
2311 ui_out_table_header (uiout
, 18, ui_left
, "ea", "EA");
2312 ui_out_table_header (uiout
, 7, ui_left
, "lsa", "LSA");
2313 ui_out_table_header (uiout
, 7, ui_left
, "size", "Size");
2314 ui_out_table_header (uiout
, 7, ui_left
, "lstaddr", "LstAddr");
2315 ui_out_table_header (uiout
, 7, ui_left
, "lstsize", "LstSize");
2316 ui_out_table_header (uiout
, 1, ui_left
, "error_p", "E");
2318 ui_out_table_body (uiout
);
2320 for (i
= 0; i
< nr
; i
++)
2322 struct cleanup
*cmd_chain
;
2323 ULONGEST mfc_cq_dw0
;
2324 ULONGEST mfc_cq_dw1
;
2325 ULONGEST mfc_cq_dw2
;
2326 int mfc_cmd_opcode
, mfc_cmd_tag
, rclass_id
, tclass_id
;
2327 int lsa
, size
, list_lsa
, list_size
, mfc_lsa
, mfc_size
;
2329 int list_valid_p
, noop_valid_p
, qw_valid_p
, ea_valid_p
, cmd_error_p
;
2331 /* Decode contents of MFC Command Queue Context Save/Restore Registers.
2332 See "Cell Broadband Engine Registers V1.3", section 3.3.2.1. */
2335 = extract_unsigned_integer (buf
+ 32*seq
[i
], 8, byte_order
);
2337 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 8, 8, byte_order
);
2339 = extract_unsigned_integer (buf
+ 32*seq
[i
] + 16, 8, byte_order
);
2341 list_lsa
= spu_mfc_get_bitfield (mfc_cq_dw0
, 0, 14);
2342 list_size
= spu_mfc_get_bitfield (mfc_cq_dw0
, 15, 26);
2343 mfc_cmd_opcode
= spu_mfc_get_bitfield (mfc_cq_dw0
, 27, 34);
2344 mfc_cmd_tag
= spu_mfc_get_bitfield (mfc_cq_dw0
, 35, 39);
2345 list_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw0
, 40, 40);
2346 rclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 41, 43);
2347 tclass_id
= spu_mfc_get_bitfield (mfc_cq_dw0
, 44, 46);
2349 mfc_ea
= spu_mfc_get_bitfield (mfc_cq_dw1
, 0, 51) << 12
2350 | spu_mfc_get_bitfield (mfc_cq_dw2
, 25, 36);
2352 mfc_lsa
= spu_mfc_get_bitfield (mfc_cq_dw2
, 0, 13);
2353 mfc_size
= spu_mfc_get_bitfield (mfc_cq_dw2
, 14, 24);
2354 noop_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 37, 37);
2355 qw_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 38, 38);
2356 ea_valid_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 39, 39);
2357 cmd_error_p
= spu_mfc_get_bitfield (mfc_cq_dw2
, 40, 40);
2359 cmd_chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "cmd");
2361 if (spu_mfc_opcode
[mfc_cmd_opcode
])
2362 ui_out_field_string (uiout
, "opcode", spu_mfc_opcode
[mfc_cmd_opcode
]);
2364 ui_out_field_int (uiout
, "opcode", mfc_cmd_opcode
);
2366 ui_out_field_int (uiout
, "tag", mfc_cmd_tag
);
2367 ui_out_field_int (uiout
, "tid", tclass_id
);
2368 ui_out_field_int (uiout
, "rid", rclass_id
);
2371 ui_out_field_fmt (uiout
, "ea", "0x%s", phex (mfc_ea
, 8));
2373 ui_out_field_skip (uiout
, "ea");
2375 ui_out_field_fmt (uiout
, "lsa", "0x%05x", mfc_lsa
<< 4);
2377 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
<< 4);
2379 ui_out_field_fmt (uiout
, "size", "0x%05x", mfc_size
);
2383 ui_out_field_fmt (uiout
, "lstaddr", "0x%05x", list_lsa
<< 3);
2384 ui_out_field_fmt (uiout
, "lstsize", "0x%05x", list_size
<< 3);
2388 ui_out_field_skip (uiout
, "lstaddr");
2389 ui_out_field_skip (uiout
, "lstsize");
2393 ui_out_field_string (uiout
, "error_p", "*");
2395 ui_out_field_skip (uiout
, "error_p");
2397 do_cleanups (cmd_chain
);
2399 if (!ui_out_is_mi_like_p (uiout
))
2400 printf_filtered ("\n");
2403 do_cleanups (chain
);
2407 info_spu_dma_command (char *args
, int from_tty
)
2409 struct frame_info
*frame
= get_selected_frame (NULL
);
2410 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2411 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2412 ULONGEST dma_info_type
;
2413 ULONGEST dma_info_mask
;
2414 ULONGEST dma_info_status
;
2415 ULONGEST dma_info_stall_and_notify
;
2416 ULONGEST dma_info_atomic_command_status
;
2417 struct cleanup
*chain
;
2423 if (gdbarch_bfd_arch_info (get_frame_arch (frame
))->arch
!= bfd_arch_spu
)
2424 error (_("\"info spu\" is only supported on the SPU architecture."));
2426 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2428 xsnprintf (annex
, sizeof annex
, "%d/dma_info", id
);
2429 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2430 buf
, 0, 40 + 16 * 32);
2432 error (_("Could not read dma_info."));
2435 = extract_unsigned_integer (buf
, 8, byte_order
);
2437 = extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2439 = extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2440 dma_info_stall_and_notify
2441 = extract_unsigned_integer (buf
+ 24, 8, byte_order
);
2442 dma_info_atomic_command_status
2443 = extract_unsigned_integer (buf
+ 32, 8, byte_order
);
2445 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoDMA");
2447 if (ui_out_is_mi_like_p (uiout
))
2449 ui_out_field_fmt (uiout
, "dma_info_type", "0x%s",
2450 phex_nz (dma_info_type
, 4));
2451 ui_out_field_fmt (uiout
, "dma_info_mask", "0x%s",
2452 phex_nz (dma_info_mask
, 4));
2453 ui_out_field_fmt (uiout
, "dma_info_status", "0x%s",
2454 phex_nz (dma_info_status
, 4));
2455 ui_out_field_fmt (uiout
, "dma_info_stall_and_notify", "0x%s",
2456 phex_nz (dma_info_stall_and_notify
, 4));
2457 ui_out_field_fmt (uiout
, "dma_info_atomic_command_status", "0x%s",
2458 phex_nz (dma_info_atomic_command_status
, 4));
2462 const char *query_msg
= _("no query pending");
2464 if (dma_info_type
& 4)
2465 switch (dma_info_type
& 3)
2467 case 1: query_msg
= _("'any' query pending"); break;
2468 case 2: query_msg
= _("'all' query pending"); break;
2469 default: query_msg
= _("undefined query type"); break;
2472 printf_filtered (_("Tag-Group Status 0x%s\n"),
2473 phex (dma_info_status
, 4));
2474 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2475 phex (dma_info_mask
, 4), query_msg
);
2476 printf_filtered (_("Stall-and-Notify 0x%s\n"),
2477 phex (dma_info_stall_and_notify
, 4));
2478 printf_filtered (_("Atomic Cmd Status 0x%s\n"),
2479 phex (dma_info_atomic_command_status
, 4));
2480 printf_filtered ("\n");
2483 info_spu_dma_cmdlist (buf
+ 40, 16, byte_order
);
2484 do_cleanups (chain
);
2488 info_spu_proxydma_command (char *args
, int from_tty
)
2490 struct frame_info
*frame
= get_selected_frame (NULL
);
2491 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2492 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2493 ULONGEST dma_info_type
;
2494 ULONGEST dma_info_mask
;
2495 ULONGEST dma_info_status
;
2496 struct cleanup
*chain
;
2502 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_spu
)
2503 error (_("\"info spu\" is only supported on the SPU architecture."));
2505 id
= get_frame_register_unsigned (frame
, SPU_ID_REGNUM
);
2507 xsnprintf (annex
, sizeof annex
, "%d/proxydma_info", id
);
2508 len
= target_read (¤t_target
, TARGET_OBJECT_SPU
, annex
,
2509 buf
, 0, 24 + 8 * 32);
2511 error (_("Could not read proxydma_info."));
2513 dma_info_type
= extract_unsigned_integer (buf
, 8, byte_order
);
2514 dma_info_mask
= extract_unsigned_integer (buf
+ 8, 8, byte_order
);
2515 dma_info_status
= extract_unsigned_integer (buf
+ 16, 8, byte_order
);
2517 chain
= make_cleanup_ui_out_tuple_begin_end (uiout
, "SPUInfoProxyDMA");
2519 if (ui_out_is_mi_like_p (uiout
))
2521 ui_out_field_fmt (uiout
, "proxydma_info_type", "0x%s",
2522 phex_nz (dma_info_type
, 4));
2523 ui_out_field_fmt (uiout
, "proxydma_info_mask", "0x%s",
2524 phex_nz (dma_info_mask
, 4));
2525 ui_out_field_fmt (uiout
, "proxydma_info_status", "0x%s",
2526 phex_nz (dma_info_status
, 4));
2530 const char *query_msg
;
2532 switch (dma_info_type
& 3)
2534 case 0: query_msg
= _("no query pending"); break;
2535 case 1: query_msg
= _("'any' query pending"); break;
2536 case 2: query_msg
= _("'all' query pending"); break;
2537 default: query_msg
= _("undefined query type"); break;
2540 printf_filtered (_("Tag-Group Status 0x%s\n"),
2541 phex (dma_info_status
, 4));
2542 printf_filtered (_("Tag-Group Mask 0x%s (%s)\n"),
2543 phex (dma_info_mask
, 4), query_msg
);
2544 printf_filtered ("\n");
2547 info_spu_dma_cmdlist (buf
+ 24, 8, byte_order
);
2548 do_cleanups (chain
);
2552 info_spu_command (char *args
, int from_tty
)
2554 printf_unfiltered (_("\"info spu\" must be followed by "
2555 "the name of an SPU facility.\n"));
2556 help_list (infospucmdlist
, "info spu ", -1, gdb_stdout
);
2560 /* Root of all "set spu "/"show spu " commands. */
2563 show_spu_command (char *args
, int from_tty
)
2565 help_list (showspucmdlist
, "show spu ", all_commands
, gdb_stdout
);
2569 set_spu_command (char *args
, int from_tty
)
2571 help_list (setspucmdlist
, "set spu ", all_commands
, gdb_stdout
);
2575 show_spu_stop_on_load (struct ui_file
*file
, int from_tty
,
2576 struct cmd_list_element
*c
, const char *value
)
2578 fprintf_filtered (file
, _("Stopping for new SPE threads is %s.\n"),
2583 show_spu_auto_flush_cache (struct ui_file
*file
, int from_tty
,
2584 struct cmd_list_element
*c
, const char *value
)
2586 fprintf_filtered (file
, _("Automatic software-cache flush is %s.\n"),
2591 /* Set up gdbarch struct. */
2593 static struct gdbarch
*
2594 spu_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2596 struct gdbarch
*gdbarch
;
2597 struct gdbarch_tdep
*tdep
;
2600 /* Which spufs ID was requested as address space? */
2602 id
= *(int *)info
.tdep_info
;
2603 /* For objfile architectures of SPU solibs, decode the ID from the name.
2604 This assumes the filename convention employed by solib-spu.c. */
2607 char *name
= strrchr (info
.abfd
->filename
, '@');
2609 sscanf (name
, "@0x%*x <%d>", &id
);
2612 /* Find a candidate among extant architectures. */
2613 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2615 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2617 tdep
= gdbarch_tdep (arches
->gdbarch
);
2618 if (tdep
&& tdep
->id
== id
)
2619 return arches
->gdbarch
;
2622 /* None found, so create a new architecture. */
2623 tdep
= XCALLOC (1, struct gdbarch_tdep
);
2625 gdbarch
= gdbarch_alloc (&info
, tdep
);
2628 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_spu
);
2631 set_gdbarch_num_regs (gdbarch
, SPU_NUM_REGS
);
2632 set_gdbarch_num_pseudo_regs (gdbarch
, SPU_NUM_PSEUDO_REGS
);
2633 set_gdbarch_sp_regnum (gdbarch
, SPU_SP_REGNUM
);
2634 set_gdbarch_pc_regnum (gdbarch
, SPU_PC_REGNUM
);
2635 set_gdbarch_read_pc (gdbarch
, spu_read_pc
);
2636 set_gdbarch_write_pc (gdbarch
, spu_write_pc
);
2637 set_gdbarch_register_name (gdbarch
, spu_register_name
);
2638 set_gdbarch_register_type (gdbarch
, spu_register_type
);
2639 set_gdbarch_pseudo_register_read (gdbarch
, spu_pseudo_register_read
);
2640 set_gdbarch_pseudo_register_write (gdbarch
, spu_pseudo_register_write
);
2641 set_gdbarch_value_from_register (gdbarch
, spu_value_from_register
);
2642 set_gdbarch_register_reggroup_p (gdbarch
, spu_register_reggroup_p
);
2645 set_gdbarch_char_signed (gdbarch
, 0);
2646 set_gdbarch_ptr_bit (gdbarch
, 32);
2647 set_gdbarch_addr_bit (gdbarch
, 32);
2648 set_gdbarch_short_bit (gdbarch
, 16);
2649 set_gdbarch_int_bit (gdbarch
, 32);
2650 set_gdbarch_long_bit (gdbarch
, 32);
2651 set_gdbarch_long_long_bit (gdbarch
, 64);
2652 set_gdbarch_float_bit (gdbarch
, 32);
2653 set_gdbarch_double_bit (gdbarch
, 64);
2654 set_gdbarch_long_double_bit (gdbarch
, 64);
2655 set_gdbarch_float_format (gdbarch
, floatformats_ieee_single
);
2656 set_gdbarch_double_format (gdbarch
, floatformats_ieee_double
);
2657 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_double
);
2659 /* Address handling. */
2660 set_gdbarch_address_to_pointer (gdbarch
, spu_address_to_pointer
);
2661 set_gdbarch_pointer_to_address (gdbarch
, spu_pointer_to_address
);
2662 set_gdbarch_integer_to_address (gdbarch
, spu_integer_to_address
);
2663 set_gdbarch_address_class_type_flags (gdbarch
, spu_address_class_type_flags
);
2664 set_gdbarch_address_class_type_flags_to_name
2665 (gdbarch
, spu_address_class_type_flags_to_name
);
2666 set_gdbarch_address_class_name_to_type_flags
2667 (gdbarch
, spu_address_class_name_to_type_flags
);
2670 /* Inferior function calls. */
2671 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
2672 set_gdbarch_frame_align (gdbarch
, spu_frame_align
);
2673 set_gdbarch_frame_red_zone_size (gdbarch
, 2000);
2674 set_gdbarch_push_dummy_code (gdbarch
, spu_push_dummy_code
);
2675 set_gdbarch_push_dummy_call (gdbarch
, spu_push_dummy_call
);
2676 set_gdbarch_dummy_id (gdbarch
, spu_dummy_id
);
2677 set_gdbarch_return_value (gdbarch
, spu_return_value
);
2679 /* Frame handling. */
2680 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2681 frame_unwind_append_unwinder (gdbarch
, &spu_frame_unwind
);
2682 frame_base_set_default (gdbarch
, &spu_frame_base
);
2683 set_gdbarch_unwind_pc (gdbarch
, spu_unwind_pc
);
2684 set_gdbarch_unwind_sp (gdbarch
, spu_unwind_sp
);
2685 set_gdbarch_virtual_frame_pointer (gdbarch
, spu_virtual_frame_pointer
);
2686 set_gdbarch_frame_args_skip (gdbarch
, 0);
2687 set_gdbarch_skip_prologue (gdbarch
, spu_skip_prologue
);
2688 set_gdbarch_in_function_epilogue_p (gdbarch
, spu_in_function_epilogue_p
);
2690 /* Cell/B.E. cross-architecture unwinder support. */
2691 frame_unwind_prepend_unwinder (gdbarch
, &spu2ppu_unwind
);
2694 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
2695 set_gdbarch_breakpoint_from_pc (gdbarch
, spu_breakpoint_from_pc
);
2696 set_gdbarch_memory_remove_breakpoint (gdbarch
, spu_memory_remove_breakpoint
);
2697 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
2698 set_gdbarch_software_single_step (gdbarch
, spu_software_single_step
);
2699 set_gdbarch_get_longjmp_target (gdbarch
, spu_get_longjmp_target
);
2702 set_gdbarch_overlay_update (gdbarch
, spu_overlay_update
);
2707 /* Provide a prototype to silence -Wmissing-prototypes. */
2708 extern initialize_file_ftype _initialize_spu_tdep
;
2711 _initialize_spu_tdep (void)
2713 register_gdbarch_init (bfd_arch_spu
, spu_gdbarch_init
);
2715 /* Add ourselves to objfile event chain. */
2716 observer_attach_new_objfile (spu_overlay_new_objfile
);
2717 spu_overlay_data
= register_objfile_data ();
2719 /* Install spu stop-on-load handler. */
2720 observer_attach_new_objfile (spu_catch_start
);
2722 /* Add ourselves to normal_stop event chain. */
2723 observer_attach_normal_stop (spu_attach_normal_stop
);
2725 /* Add root prefix command for all "set spu"/"show spu" commands. */
2726 add_prefix_cmd ("spu", no_class
, set_spu_command
,
2727 _("Various SPU specific commands."),
2728 &setspucmdlist
, "set spu ", 0, &setlist
);
2729 add_prefix_cmd ("spu", no_class
, show_spu_command
,
2730 _("Various SPU specific commands."),
2731 &showspucmdlist
, "show spu ", 0, &showlist
);
2733 /* Toggle whether or not to add a temporary breakpoint at the "main"
2734 function of new SPE contexts. */
2735 add_setshow_boolean_cmd ("stop-on-load", class_support
,
2736 &spu_stop_on_load_p
, _("\
2737 Set whether to stop for new SPE threads."),
2739 Show whether to stop for new SPE threads."),
2741 Use \"on\" to give control to the user when a new SPE thread\n\
2742 enters its \"main\" function.\n\
2743 Use \"off\" to disable stopping for new SPE threads."),
2745 show_spu_stop_on_load
,
2746 &setspucmdlist
, &showspucmdlist
);
2748 /* Toggle whether or not to automatically flush the software-managed
2749 cache whenever SPE execution stops. */
2750 add_setshow_boolean_cmd ("auto-flush-cache", class_support
,
2751 &spu_auto_flush_cache_p
, _("\
2752 Set whether to automatically flush the software-managed cache."),
2754 Show whether to automatically flush the software-managed cache."),
2756 Use \"on\" to automatically flush the software-managed cache\n\
2757 whenever SPE execution stops.\n\
2758 Use \"off\" to never automatically flush the software-managed cache."),
2760 show_spu_auto_flush_cache
,
2761 &setspucmdlist
, &showspucmdlist
);
2763 /* Add root prefix command for all "info spu" commands. */
2764 add_prefix_cmd ("spu", class_info
, info_spu_command
,
2765 _("Various SPU specific commands."),
2766 &infospucmdlist
, "info spu ", 0, &infolist
);
2768 /* Add various "info spu" commands. */
2769 add_cmd ("event", class_info
, info_spu_event_command
,
2770 _("Display SPU event facility status.\n"),
2772 add_cmd ("signal", class_info
, info_spu_signal_command
,
2773 _("Display SPU signal notification facility status.\n"),
2775 add_cmd ("mailbox", class_info
, info_spu_mailbox_command
,
2776 _("Display SPU mailbox facility status.\n"),
2778 add_cmd ("dma", class_info
, info_spu_dma_command
,
2779 _("Display MFC DMA status.\n"),
2781 add_cmd ("proxydma", class_info
, info_spu_proxydma_command
,
2782 _("Display MFC Proxy-DMA status.\n"),