2003-01-20 Elena Zannoni <ezannoni@redhat.com>
[deliverable/binutils-gdb.git] / gdb / testsuite / gdb.arch / altivec-regs.exp
1 # Copyright (C) 2002, 2003 Free Software Foundation, Inc.
2 #
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 2 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with this program; if not, write to the Free Software
15 # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
16 #
17 # Please email any bugs, comments, and/or additions to this file to:
18 # bug-gdb@prep.ai.mit.edu
19 #
20
21 # Tests for Powerpc AltiVec register setting and fetching
22
23 if $tracelevel then {
24 strace $tracelevel
25 }
26
27 #
28 # Test the use of registers, especially AltiVec registers, for Powerpc.
29 # This file uses altivec-regs.c for input.
30 #
31
32 set prms_id 0
33 set bug_id 0
34
35 if ![istarget "powerpc-*altivec"] then {
36 verbose "Skipping altivec register tests."
37 return
38 }
39
40 set testfile "altivec-regs"
41 set binfile ${objdir}/${subdir}/${testfile}
42 set srcfile ${testfile}.c
43
44 if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable {debug additional_flags=-w}] != "" } {
45 gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail."
46 }
47
48 gdb_start
49 gdb_reinitialize_dir $srcdir/$subdir
50 gdb_load ${binfile}
51
52 #
53 # Run to `main' where we begin our tests.
54 #
55
56 if ![runto_main] then {
57 gdb_suppress_tests
58 }
59
60 # set all the registers integer portions to 1
61 for {set i 0} {$i < 32} {incr i 1} {
62 for {set j 0} {$j < 4} {incr j 1} {
63 gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "set reg vr$i.v4si.f\[$j\]"
64 }
65 }
66
67 gdb_test "set \$vscr = 1" "" ""
68 gdb_test "set \$vrsave = 1" "" ""
69
70 # Now execute some target code, so that GDB's register cache is flushed.
71
72 gdb_test "next" "" ""
73
74 send_gdb "show endian\n"
75 gdb_expect {
76 -re "(The target endianness is set automatically .currently )(big|little)( endian.*)$gdb_prompt $" {
77 pass "endianness"
78 set endianness $expect_out(2,string)
79 }
80 -re ".*$gdb_prompt $" {
81 fail "couldn't get endianness"
82 }
83 timeout { fail "(timeout) endianness" }
84 }
85
86 # And then read the AltiVec registers back, to see that
87 # a) the register write above worked, and
88 # b) the register read (below) also works.
89
90 if {$endianness == "big"} {
91 set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
92 } else {
93 set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
94 }
95
96 for {set i 0} {$i < 32} {incr i 1} {
97 gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i"
98 }
99
100 gdb_test "info reg vrsave" "vrsave.*0x1" "info reg vrsave"
101 gdb_test "info reg vscr" "vscr.*0x1" "info reg vscr"
102
103 # Now redo the same tests, but using the print command.
104 # Note: in LE case, the char array is printed WITHOUT the last character.
105 # Gdb treats the terminating null char in the array like the terminating
106 # null char in a string and doesn't print it. This is not a failure, but
107 # the way gdb works.
108
109 if {$endianness == "big"} {
110 set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = ..0.0.0.001.0.0.0.001.0.0.0.001.0.0.0.001.."
111 } else {
112 set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = ..001.0.0.0.001.0.0.0.001.0.0.0.001.0.0.."
113 }
114
115 for {set i 0} {$i < 32} {incr i 1} {
116 gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i"
117 }
118
119 gdb_test "print \$vrsave" ".* = 1" "print vrsave"
120 gdb_test "print \$vscr" ".* = 1" "print vscr"
121
122 for {set i 0} {$i < 32} {incr i 1} {
123 set pattern$i ".*vr$i.*"
124 append pattern$i $vector_register
125 }
126
127 send_gdb "info powerpc altivec\n"
128 gdb_expect_list "info powerpc altivec" ".*$gdb_prompt $" {
129 [$pattern0]
130 [$pattern1]
131 [$pattern2]
132 [$pattern3]
133 [$pattern4]
134 [$pattern5]
135 [$pattern6]
136 [$pattern7]
137 [$pattern8]
138 [$pattern9]
139 [$pattern10]
140 [$pattern11]
141 [$pattern12]
142 [$pattern13]
143 [$pattern14]
144 [$pattern15]
145 [$pattern16]
146 [$pattern17]
147 [$pattern18]
148 [$pattern19]
149 [$pattern20]
150 [$pattern21]
151 [$pattern22]
152 [$pattern23]
153 [$pattern24]
154 [$pattern25]
155 [$pattern26]
156 [$pattern27]
157 [$pattern28]
158 [$pattern29]
159 [$pattern30]
160 [$pattern31]
161 "\[ \t\n\r\]+vscr\[ \t\]+0x1"
162 "\[ \t\n\r\]+vrsave\[ \t\]+0x1"
163 }
164
165 gdb_test "break vector_fun" \
166 "Breakpoint 2 at.*altivec-regs.c, line \[0-9\]+\\." \
167 "Set breakpoint at vector_fun"
168
169 # Actually it is nuch easier to see these results printed in hex.
170 gdb_test "set output-radix 16" \
171 "Output radix now set to decimal 16, hex 10, octal 20." \
172 "Set output radix to hex"
173
174 gdb_test "continue" \
175 "Breakpoint 2, vector_fun .a=.0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe., b=.0x1010101, 0x1010101, 0x1010101, 0x1010101.*altivec-regs.c.*vec_splat_u8.2..;" \
176 "continue to vector_fun"
177
178 # Do a next over the assignment to vector 'a'.
179 gdb_test "next" ".*b = \\(\\(vector unsigned int\\) vec_splat_u8\\(3\\)\\);" \
180 "next (1)"
181
182 # Do a next over the assignment to vector 'b'.
183 gdb_test "next" "c = vec_add \\(a, b\\);" \
184 "next (2)"
185
186 # Now 'a' should be '0x02020202...' and 'b' should be '0x03030303...'
187 gdb_test "print/x a" \
188 ".*= .0x2020202, 0x2020202, 0x2020202, 0x2020202." \
189 "print vector parameter a"
190
191 gdb_test "print/x b" \
192 ".*= .0x3030303, 0x3030303, 0x3030303, 0x3030303." \
193 "print vector parameter b"
194
195 # If we do an 'up' now, and print 'x' and 'y' we should see the values they
196 # have in main, not the values they have in vector_fun.
197 gdb_test "up" ".1.*main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);" \
198 "up to main"
199
200 gdb_test "print/x x" \
201 ".*= .0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe." \
202 "print vector x"
203
204 gdb_test "print/x y" \
205 ".*= .0x1010101, 0x1010101, 0x1010101, 0x1010101." \
206 "print vector y"
207
208 # now go back to vector_func and do a finish, to see if we can print the return
209 # value correctly.
210
211 gdb_test "down" \
212 ".0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*c = vec_add \\(a, b\\);" \
213 "down to vector_fun"
214
215 gdb_test "finish" \
216 "Run till exit from .0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*in main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);.*Value returned is.*= .0x5050505, 0x5050505, 0x5050505, 0x5050505." \
217 "finish returned correct value"
218
219
220
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