1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
3 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
28 #include "frame-base.h"
29 #include "frame-unwind.h"
37 #include "gdb_assert.h"
39 #include "x86-64-tdep.h"
40 #include "i387-tdep.h"
42 /* Register numbers of various important registers. */
44 #define X86_64_RAX_REGNUM 0 /* %rax */
45 #define X86_64_RDX_REGNUM 3 /* %rdx */
46 #define X86_64_RDI_REGNUM 5 /* %rdi */
47 #define X86_64_RBP_REGNUM 6 /* %rbp */
48 #define X86_64_RSP_REGNUM 7 /* %rsp */
49 #define X86_64_RIP_REGNUM 16 /* %rip */
50 #define X86_64_EFLAGS_REGNUM 17 /* %eflags */
51 #define X86_64_ST0_REGNUM 22 /* %st0 */
52 #define X86_64_XMM0_REGNUM 38 /* %xmm0 */
53 #define X86_64_XMM1_REGNUM 39 /* %xmm1 */
55 struct x86_64_register_info
61 static struct x86_64_register_info x86_64_register_info
[] =
63 { "rax", &builtin_type_int64
},
64 { "rbx", &builtin_type_int64
},
65 { "rcx", &builtin_type_int64
},
66 { "rdx", &builtin_type_int64
},
67 { "rsi", &builtin_type_int64
},
68 { "rdi", &builtin_type_int64
},
69 { "rbp", &builtin_type_void_data_ptr
},
70 { "rsp", &builtin_type_void_data_ptr
},
72 /* %r8 is indeed register number 8. */
73 { "r8", &builtin_type_int64
},
74 { "r9", &builtin_type_int64
},
75 { "r10", &builtin_type_int64
},
76 { "r11", &builtin_type_int64
},
77 { "r12", &builtin_type_int64
},
78 { "r13", &builtin_type_int64
},
79 { "r14", &builtin_type_int64
},
80 { "r15", &builtin_type_int64
},
81 { "rip", &builtin_type_void_func_ptr
},
82 { "eflags", &builtin_type_int32
},
83 { "ds", &builtin_type_int32
},
84 { "es", &builtin_type_int32
},
85 { "fs", &builtin_type_int32
},
86 { "gs", &builtin_type_int32
},
88 /* %st0 is register number 22. */
89 { "st0", &builtin_type_i387_ext
},
90 { "st1", &builtin_type_i387_ext
},
91 { "st2", &builtin_type_i387_ext
},
92 { "st3", &builtin_type_i387_ext
},
93 { "st4", &builtin_type_i387_ext
},
94 { "st5", &builtin_type_i387_ext
},
95 { "st6", &builtin_type_i387_ext
},
96 { "st7", &builtin_type_i387_ext
},
97 { "fctrl", &builtin_type_int32
},
98 { "fstat", &builtin_type_int32
},
99 { "ftag", &builtin_type_int32
},
100 { "fiseg", &builtin_type_int32
},
101 { "fioff", &builtin_type_int32
},
102 { "foseg", &builtin_type_int32
},
103 { "fooff", &builtin_type_int32
},
104 { "fop", &builtin_type_int32
},
106 /* %xmm0 is register number 38. */
107 { "xmm0", &builtin_type_v4sf
},
108 { "xmm1", &builtin_type_v4sf
},
109 { "xmm2", &builtin_type_v4sf
},
110 { "xmm3", &builtin_type_v4sf
},
111 { "xmm4", &builtin_type_v4sf
},
112 { "xmm5", &builtin_type_v4sf
},
113 { "xmm6", &builtin_type_v4sf
},
114 { "xmm7", &builtin_type_v4sf
},
115 { "xmm8", &builtin_type_v4sf
},
116 { "xmm9", &builtin_type_v4sf
},
117 { "xmm10", &builtin_type_v4sf
},
118 { "xmm11", &builtin_type_v4sf
},
119 { "xmm12", &builtin_type_v4sf
},
120 { "xmm13", &builtin_type_v4sf
},
121 { "xmm14", &builtin_type_v4sf
},
122 { "xmm15", &builtin_type_v4sf
},
123 { "mxcsr", &builtin_type_int32
}
126 /* Total number of registers. */
127 #define X86_64_NUM_REGS \
128 (sizeof (x86_64_register_info) / sizeof (x86_64_register_info[0]))
130 /* Return the name of register REGNUM. */
133 x86_64_register_name (int regnum
)
135 if (regnum
>= 0 && regnum
< X86_64_NUM_REGS
)
136 return x86_64_register_info
[regnum
].name
;
141 /* Return the GDB type object for the "standard" data type of data in
145 x86_64_register_type (struct gdbarch
*gdbarch
, int regnum
)
147 gdb_assert (regnum
>= 0 && regnum
< X86_64_NUM_REGS
);
149 return *x86_64_register_info
[regnum
].type
;
152 /* DWARF Register Number Mapping as defined in the System V psABI,
155 static int x86_64_dwarf_regmap
[] =
157 /* General Purpose Registers RAX, RDX, RCX, RBX, RSI, RDI. */
158 X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
, 3, 2,
159 4, X86_64_RDI_REGNUM
,
161 /* Frame Pointer Register RBP. */
164 /* Stack Pointer Register RSP. */
167 /* Extended Integer Registers 8 - 15. */
168 8, 9, 10, 11, 12, 13, 14, 15,
170 /* Return Address RA. Not mapped. */
173 /* SSE Registers 0 - 7. */
174 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
175 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
176 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
177 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
179 /* Extended SSE Registers 8 - 15. */
180 X86_64_XMM0_REGNUM
+ 8, X86_64_XMM0_REGNUM
+ 9,
181 X86_64_XMM0_REGNUM
+ 10, X86_64_XMM0_REGNUM
+ 11,
182 X86_64_XMM0_REGNUM
+ 12, X86_64_XMM0_REGNUM
+ 13,
183 X86_64_XMM0_REGNUM
+ 14, X86_64_XMM0_REGNUM
+ 15,
185 /* Floating Point Registers 0-7. */
186 X86_64_ST0_REGNUM
+ 0, X86_64_ST0_REGNUM
+ 1,
187 X86_64_ST0_REGNUM
+ 2, X86_64_ST0_REGNUM
+ 3,
188 X86_64_ST0_REGNUM
+ 4, X86_64_ST0_REGNUM
+ 5,
189 X86_64_ST0_REGNUM
+ 6, X86_64_ST0_REGNUM
+ 7
192 static const int x86_64_dwarf_regmap_len
=
193 (sizeof (x86_64_dwarf_regmap
) / sizeof (x86_64_dwarf_regmap
[0]));
195 /* Convert DWARF register number REG to the appropriate register
196 number used by GDB. */
199 x86_64_dwarf_reg_to_regnum (int reg
)
203 if (reg
>= 0 || reg
< x86_64_dwarf_regmap_len
)
204 regnum
= x86_64_dwarf_regmap
[reg
];
207 warning ("Unmapped DWARF Register #%d encountered\n", reg
);
212 /* Return nonzero if a value of type TYPE stored in register REGNUM
213 needs any special handling. */
216 x86_64_convert_register_p (int regnum
, struct type
*type
)
218 return i386_fp_regnum_p (regnum
);
222 /* The returning of values is done according to the special algorithm.
223 Some types are returned in registers an some (big structures) in
224 memory. See the System V psABI for details. */
226 #define MAX_CLASSES 4
228 enum x86_64_reg_class
231 X86_64_INTEGER_CLASS
,
232 X86_64_INTEGERSI_CLASS
,
242 /* Return the union class of CLASS1 and CLASS2.
243 See the System V psABI for details. */
245 static enum x86_64_reg_class
246 merge_classes (enum x86_64_reg_class class1
, enum x86_64_reg_class class2
)
248 /* Rule (a): If both classes are equal, this is the resulting class. */
249 if (class1
== class2
)
252 /* Rule (b): If one of the classes is NO_CLASS, the resulting class
253 is the other class. */
254 if (class1
== X86_64_NO_CLASS
)
256 if (class2
== X86_64_NO_CLASS
)
259 /* Rule (c): If one of the classes is MEMORY, the result is MEMORY. */
260 if (class1
== X86_64_MEMORY_CLASS
|| class2
== X86_64_MEMORY_CLASS
)
261 return X86_64_MEMORY_CLASS
;
263 /* Rule (d): If one of the classes is INTEGER, the result is INTEGER. */
264 if ((class1
== X86_64_INTEGERSI_CLASS
&& class2
== X86_64_SSESF_CLASS
)
265 || (class2
== X86_64_INTEGERSI_CLASS
&& class1
== X86_64_SSESF_CLASS
))
266 return X86_64_INTEGERSI_CLASS
;
267 if (class1
== X86_64_INTEGER_CLASS
|| class1
== X86_64_INTEGERSI_CLASS
268 || class2
== X86_64_INTEGER_CLASS
|| class2
== X86_64_INTEGERSI_CLASS
)
269 return X86_64_INTEGER_CLASS
;
271 /* Rule (e): If one of the classes is X87 or X87UP class, MEMORY is
273 if (class1
== X86_64_X87_CLASS
|| class1
== X86_64_X87UP_CLASS
274 || class2
== X86_64_X87_CLASS
|| class2
== X86_64_X87UP_CLASS
)
275 return X86_64_MEMORY_CLASS
;
277 /* Rule (f): Otherwise class SSE is used. */
278 return X86_64_SSE_CLASS
;
281 /* Classify the argument type. CLASSES will be filled by the register
282 class used to pass each word of the operand. The number of words
283 is returned. In case the parameter should be passed in memory, 0
284 is returned. As a special case for zero sized containers,
285 classes[0] will be NO_CLASS and 1 is returned.
287 See the System V psABI for details. */
290 classify_argument (struct type
*type
,
291 enum x86_64_reg_class classes
[MAX_CLASSES
], int bit_offset
)
293 int bytes
= TYPE_LENGTH (type
);
294 int words
= (bytes
+ 8 - 1) / 8;
296 switch (TYPE_CODE (type
))
298 case TYPE_CODE_ARRAY
:
299 case TYPE_CODE_STRUCT
:
300 case TYPE_CODE_UNION
:
303 enum x86_64_reg_class subclasses
[MAX_CLASSES
];
305 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
309 for (i
= 0; i
< words
; i
++)
310 classes
[i
] = X86_64_NO_CLASS
;
312 /* Zero sized arrays or structures are NO_CLASS. We return 0
313 to signalize memory class, so handle it as special case. */
316 classes
[0] = X86_64_NO_CLASS
;
319 switch (TYPE_CODE (type
))
321 case TYPE_CODE_STRUCT
:
324 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
326 int num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
328 (TYPE_FIELDS (type
)[j
].loc
.
329 bitpos
+ bit_offset
) % 256);
332 for (i
= 0; i
< num
; i
++)
335 (TYPE_FIELDS (type
)[j
].loc
.bitpos
+
338 merge_classes (subclasses
[i
], classes
[i
+ pos
]);
343 case TYPE_CODE_ARRAY
:
347 num
= classify_argument (TYPE_TARGET_TYPE (type
),
348 subclasses
, bit_offset
);
352 /* The partial classes are now full classes. */
353 if (subclasses
[0] == X86_64_SSESF_CLASS
&& bytes
!= 4)
354 subclasses
[0] = X86_64_SSE_CLASS
;
355 if (subclasses
[0] == X86_64_INTEGERSI_CLASS
&& bytes
!= 4)
356 subclasses
[0] = X86_64_INTEGER_CLASS
;
358 for (i
= 0; i
< words
; i
++)
359 classes
[i
] = subclasses
[i
% num
];
362 case TYPE_CODE_UNION
:
366 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
369 num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
370 subclasses
, bit_offset
);
373 for (i
= 0; i
< num
; i
++)
374 classes
[i
] = merge_classes (subclasses
[i
], classes
[i
]);
382 /* Final merger cleanup. */
383 for (i
= 0; i
< words
; i
++)
385 /* If one class is MEMORY, everything should be passed in
387 if (classes
[i
] == X86_64_MEMORY_CLASS
)
390 /* The X86_64_SSEUP_CLASS should be always preceeded by
392 if (classes
[i
] == X86_64_SSEUP_CLASS
393 && (i
== 0 || classes
[i
- 1] != X86_64_SSE_CLASS
))
394 classes
[i
] = X86_64_SSE_CLASS
;
396 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
397 if (classes
[i
] == X86_64_X87UP_CLASS
398 && (i
== 0 || classes
[i
- 1] != X86_64_X87_CLASS
))
399 classes
[i
] = X86_64_SSE_CLASS
;
408 if (!(bit_offset
% 64))
409 classes
[0] = X86_64_SSESF_CLASS
;
411 classes
[0] = X86_64_SSE_CLASS
;
414 classes
[0] = X86_64_SSEDF_CLASS
;
417 classes
[0] = X86_64_X87_CLASS
;
418 classes
[1] = X86_64_X87UP_CLASS
;
432 if (bytes
* 8 + bit_offset
<= 32)
433 classes
[0] = X86_64_INTEGERSI_CLASS
;
435 classes
[0] = X86_64_INTEGER_CLASS
;
438 classes
[0] = classes
[1] = X86_64_INTEGER_CLASS
;
445 default: /* Avoid warning. */
448 internal_error (__FILE__
, __LINE__
,
449 "classify_argument: unknown argument type");
452 /* Examine the argument and set *INT_NREGS and *SSE_NREGS to the
453 number of registers required based on the information passed in
454 CLASSES. Return 0 if parameter should be passed in memory. */
457 examine_argument (enum x86_64_reg_class classes
[MAX_CLASSES
],
458 int n
, int *int_nregs
, int *sse_nregs
)
464 for (n
--; n
>= 0; n
--)
467 case X86_64_INTEGER_CLASS
:
468 case X86_64_INTEGERSI_CLASS
:
471 case X86_64_SSE_CLASS
:
472 case X86_64_SSESF_CLASS
:
473 case X86_64_SSEDF_CLASS
:
476 case X86_64_NO_CLASS
:
477 case X86_64_SSEUP_CLASS
:
478 case X86_64_X87_CLASS
:
479 case X86_64_X87UP_CLASS
:
481 case X86_64_MEMORY_CLASS
:
482 internal_error (__FILE__
, __LINE__
,
483 "examine_argument: unexpected memory class");
488 #define RET_INT_REGS 2
489 #define RET_SSE_REGS 2
491 /* Check if the structure in value_type is returned in registers or in
492 memory. If this function returns 1, GDB will call
493 STORE_STRUCT_RETURN and EXTRACT_STRUCT_VALUE_ADDRESS else
494 STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE will be used. */
497 x86_64_use_struct_convention (int gcc_p
, struct type
*value_type
)
499 enum x86_64_reg_class
class[MAX_CLASSES
];
500 int n
= classify_argument (value_type
, class, 0);
505 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
506 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
);
509 /* Extract from an array REGBUF containing the (raw) register state, a
510 function return value of TYPE, and copy that, in virtual format,
514 x86_64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
517 enum x86_64_reg_class
class[MAX_CLASSES
];
518 int n
= classify_argument (type
, class, 0);
524 int ret_int_r
[RET_INT_REGS
] = { X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
};
525 int ret_sse_r
[RET_SSE_REGS
] = { X86_64_XMM0_REGNUM
, X86_64_XMM1_REGNUM
};
528 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
529 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
)
532 regcache_cooked_read (regcache
, X86_64_RAX_REGNUM
, &addr
);
533 read_memory (addr
, valbuf
, TYPE_LENGTH (type
));
539 for (i
= 0; i
< n
; i
++)
543 case X86_64_NO_CLASS
:
545 case X86_64_INTEGER_CLASS
:
546 regcache_cooked_read (regcache
, ret_int_r
[(intreg
+ 1) / 2],
547 (char *) valbuf
+ offset
);
551 case X86_64_INTEGERSI_CLASS
:
552 regcache_cooked_read_part (regcache
, ret_int_r
[intreg
/ 2],
553 0, 4, (char *) valbuf
+ offset
);
557 case X86_64_SSEDF_CLASS
:
558 case X86_64_SSESF_CLASS
:
559 case X86_64_SSE_CLASS
:
560 regcache_cooked_read_part (regcache
,
561 ret_sse_r
[(ssereg
+ 1) / 2], 0, 8,
562 (char *) valbuf
+ offset
);
566 case X86_64_SSEUP_CLASS
:
567 regcache_cooked_read_part (regcache
, ret_sse_r
[ssereg
/ 2],
568 0, 8, (char *) valbuf
+ offset
);
572 case X86_64_X87_CLASS
:
573 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
574 0, 8, (char *) valbuf
+ offset
);
577 case X86_64_X87UP_CLASS
:
578 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
579 8, 2, (char *) valbuf
+ offset
);
582 case X86_64_MEMORY_CLASS
:
584 internal_error (__FILE__
, __LINE__
,
585 "Unexpected argument class");
595 x86_64_push_arguments (struct regcache
*regcache
, int nargs
,
596 struct value
**args
, CORE_ADDR sp
)
600 /* For varargs functions we have to pass the total number of SSE arguments
601 in %rax. So, let's count this number. */
602 int total_sse_args
= 0;
603 /* Once an SSE/int argument is passed on the stack, all subsequent
604 arguments are passed there. */
609 static int int_parameter_registers
[INT_REGS
] =
611 X86_64_RDI_REGNUM
, 4, /* %rdi, %rsi */
612 X86_64_RDX_REGNUM
, 2, /* %rdx, %rcx */
616 static int sse_parameter_registers
[SSE_REGS
] =
618 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
619 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
620 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
621 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
623 int stack_values_count
= 0;
625 stack_values
= alloca (nargs
* sizeof (int));
626 for (i
= 0; i
< nargs
; i
++)
628 enum x86_64_reg_class
class[MAX_CLASSES
];
629 int n
= classify_argument (args
[i
]->type
, class, 0);
634 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
))
636 stack_values
[stack_values_count
++] = i
;
643 if (intreg
/ 2 + needed_intregs
> INT_REGS
)
645 if (ssereg
/ 2 + needed_sseregs
> SSE_REGS
)
647 total_sse_args
+= needed_sseregs
;
649 for (j
= 0; j
< n
; j
++)
653 case X86_64_NO_CLASS
:
655 case X86_64_INTEGER_CLASS
:
657 stack_values
[stack_values_count
++] = i
;
660 regcache_cooked_write
661 (regcache
, int_parameter_registers
[(intreg
+ 1) / 2],
662 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
667 case X86_64_INTEGERSI_CLASS
:
669 stack_values
[stack_values_count
++] = i
;
672 LONGEST val
= extract_signed_integer
673 (VALUE_CONTENTS_ALL (args
[i
]) + offset
, 4);
674 regcache_cooked_write_signed
675 (regcache
, int_parameter_registers
[intreg
/ 2], val
);
681 case X86_64_SSEDF_CLASS
:
682 case X86_64_SSESF_CLASS
:
683 case X86_64_SSE_CLASS
:
685 stack_values
[stack_values_count
++] = i
;
688 regcache_cooked_write
689 (regcache
, sse_parameter_registers
[(ssereg
+ 1) / 2],
690 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
695 case X86_64_SSEUP_CLASS
:
697 stack_values
[stack_values_count
++] = i
;
700 regcache_cooked_write
701 (regcache
, sse_parameter_registers
[ssereg
/ 2],
702 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
707 case X86_64_X87_CLASS
:
708 case X86_64_MEMORY_CLASS
:
709 stack_values
[stack_values_count
++] = i
;
711 case X86_64_X87UP_CLASS
:
714 internal_error (__FILE__
, __LINE__
,
715 "Unexpected argument class");
717 intreg
+= intreg
% 2;
718 ssereg
+= ssereg
% 2;
723 /* Push any remaining arguments onto the stack. */
724 while (--stack_values_count
>= 0)
726 struct value
*arg
= args
[stack_values
[stack_values_count
]];
727 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg
));
729 /* Make sure the stack stays eightbyte-aligned. */
730 sp
-= (len
+ 7) & ~7;
731 write_memory (sp
, VALUE_CONTENTS_ALL (arg
), len
);
734 /* Write number of SSE type arguments to RAX to take care of varargs
736 store_unsigned_integer (buf
, 8, total_sse_args
);
737 regcache_cooked_write (regcache
, X86_64_RAX_REGNUM
, buf
);
742 /* Write into the appropriate registers a function return value stored
743 in VALBUF of type TYPE, given in virtual format. */
746 x86_64_store_return_value (struct type
*type
, struct regcache
*regcache
,
749 int len
= TYPE_LENGTH (type
);
751 /* First handle long doubles. */
752 if (TYPE_CODE_FLT
== TYPE_CODE (type
) && len
== 16)
755 char buf
[FPU_REG_RAW_SIZE
];
757 /* Returning floating-point values is a bit tricky. Apart from
758 storing the return value in %st(0), we have to simulate the
759 state of the FPU at function return point. */
761 /* Convert the value found in VALBUF to the extended
762 floating-point format used by the FPU. This is probably
763 not exactly how it would happen on the target itself, but
764 it is the best we can do. */
765 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
766 regcache_raw_write (regcache
, X86_64_ST0_REGNUM
, buf
);
768 /* Set the top of the floating-point register stack to 7. The
769 actual value doesn't really matter, but 7 is what a normal
770 function return would end up with if the program started out
771 with a freshly initialized FPU. */
772 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
774 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
776 /* Mark %st(1) through %st(7) as empty. Since we set the top of
777 the floating-point register stack to 7, the appropriate value
778 for the tag word is 0x3fff. */
779 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
781 else if (TYPE_CODE_FLT
== TYPE_CODE (type
))
783 /* Handle double and float variables. */
784 regcache_cooked_write (regcache
, X86_64_XMM0_REGNUM
, valbuf
);
786 /* XXX: What about complex floating point types? */
789 int low_size
= REGISTER_RAW_SIZE (0);
790 int high_size
= REGISTER_RAW_SIZE (1);
793 regcache_cooked_write_part (regcache
, 0, 0, len
, valbuf
);
794 else if (len
<= (low_size
+ high_size
))
796 regcache_cooked_write_part (regcache
, 0, 0, low_size
, valbuf
);
797 regcache_cooked_write_part (regcache
, 1, 0,
799 (const char *) valbuf
+ low_size
);
802 internal_error (__FILE__
, __LINE__
,
803 "Cannot store return value of %d bytes long.", len
);
809 x86_64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
810 struct regcache
*regcache
, CORE_ADDR bp_addr
,
811 int nargs
, struct value
**args
, CORE_ADDR sp
,
812 int struct_return
, CORE_ADDR struct_addr
)
816 /* Pass arguments. */
817 sp
= x86_64_push_arguments (regcache
, nargs
, args
, sp
);
819 /* Pass "hidden" argument". */
822 store_unsigned_integer (buf
, 8, struct_addr
);
823 regcache_cooked_write (regcache
, X86_64_RDI_REGNUM
, buf
);
826 /* Store return address. */
828 store_unsigned_integer (buf
, 8, bp_addr
);
829 write_memory (sp
, buf
, 8);
831 /* Finally, update the stack pointer... */
832 store_unsigned_integer (buf
, 8, sp
);
833 regcache_cooked_write (regcache
, X86_64_RSP_REGNUM
, buf
);
835 /* ...and fake a frame pointer. */
836 regcache_cooked_write (regcache
, X86_64_RBP_REGNUM
, buf
);
842 /* The maximum number of saved registers. This should include %rip. */
843 #define X86_64_NUM_SAVED_REGS X86_64_NUM_GREGS
845 struct x86_64_frame_cache
852 /* Saved registers. */
853 CORE_ADDR saved_regs
[X86_64_NUM_SAVED_REGS
];
856 /* Do we have a frame? */
860 /* Allocate and initialize a frame cache. */
862 static struct x86_64_frame_cache
*
863 x86_64_alloc_frame_cache (void)
865 struct x86_64_frame_cache
*cache
;
868 cache
= FRAME_OBSTACK_ZALLOC (struct x86_64_frame_cache
);
872 cache
->sp_offset
= -8;
875 /* Saved registers. We initialize these to -1 since zero is a valid
876 offset (that's where %rbp is supposed to be stored). */
877 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
878 cache
->saved_regs
[i
] = -1;
881 /* Frameless until proven otherwise. */
882 cache
->frameless_p
= 1;
887 /* Do a limited analysis of the prologue at PC and update CACHE
888 accordingly. Bail out early if CURRENT_PC is reached. Return the
889 address where the analysis stopped.
891 We will handle only functions beginning with:
894 movq %rsp, %rbp 0x48 0x89 0xe5
896 Any function that doesn't start with this sequence will be assumed
897 to have no prologue and thus no valid frame pointer in %rbp. */
900 x86_64_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
901 struct x86_64_frame_cache
*cache
)
903 static unsigned char proto
[3] = { 0x48, 0x89, 0xe5 };
904 unsigned char buf
[3];
907 if (current_pc
<= pc
)
910 op
= read_memory_unsigned_integer (pc
, 1);
912 if (op
== 0x55) /* pushq %rbp */
914 /* Take into account that we've executed the `pushq %rbp' that
915 starts this instruction sequence. */
916 cache
->saved_regs
[X86_64_RBP_REGNUM
] = 0;
917 cache
->sp_offset
+= 8;
919 /* If that's all, return now. */
920 if (current_pc
<= pc
+ 1)
923 /* Check for `movq %rsp, %rbp'. */
924 read_memory (pc
+ 1, buf
, 3);
925 if (memcmp (buf
, proto
, 3) != 0)
928 /* OK, we actually have a frame. */
929 cache
->frameless_p
= 0;
936 /* Return PC of first real instruction. */
939 x86_64_skip_prologue (CORE_ADDR start_pc
)
941 struct x86_64_frame_cache cache
;
944 pc
= x86_64_analyze_prologue (start_pc
, 0xffffffffffffffff, &cache
);
945 if (cache
.frameless_p
)
954 static struct x86_64_frame_cache
*
955 x86_64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
957 struct x86_64_frame_cache
*cache
;
964 cache
= x86_64_alloc_frame_cache ();
967 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
968 cache
->base
= extract_unsigned_integer (buf
, 8);
969 if (cache
->base
== 0)
972 /* For normal frames, %rip is stored at 8(%rbp). */
973 cache
->saved_regs
[X86_64_RIP_REGNUM
] = 8;
975 cache
->pc
= frame_func_unwind (next_frame
);
977 x86_64_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
979 if (cache
->frameless_p
)
981 /* We didn't find a valid frame, which means that CACHE->base
982 currently holds the frame pointer for our calling frame. If
983 we're at the start of a function, or somewhere half-way its
984 prologue, the function's frame probably hasn't been fully
985 setup yet. Try to reconstruct the base address for the stack
986 frame by looking at the stack pointer. For truly "frameless"
987 functions this might work too. */
989 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
990 cache
->base
= extract_unsigned_integer (buf
, 8) + cache
->sp_offset
;
993 /* Now that we have the base address for the stack frame we can
994 calculate the value of %rsp in the calling frame. */
995 cache
->saved_sp
= cache
->base
+ 16;
997 /* Adjust all the saved registers such that they contain addresses
998 instead of offsets. */
999 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
1000 if (cache
->saved_regs
[i
] != -1)
1001 cache
->saved_regs
[i
] += cache
->base
;
1007 x86_64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1008 struct frame_id
*this_id
)
1010 struct x86_64_frame_cache
*cache
=
1011 x86_64_frame_cache (next_frame
, this_cache
);
1013 /* This marks the outermost frame. */
1014 if (cache
->base
== 0)
1017 (*this_id
) = frame_id_build (cache
->base
+ 16, cache
->pc
);
1021 x86_64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1022 int regnum
, int *optimizedp
,
1023 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1024 int *realnump
, void *valuep
)
1026 struct x86_64_frame_cache
*cache
=
1027 x86_64_frame_cache (next_frame
, this_cache
);
1029 gdb_assert (regnum
>= 0);
1031 if (regnum
== SP_REGNUM
&& cache
->saved_sp
)
1039 /* Store the value. */
1040 store_unsigned_integer (valuep
, 8, cache
->saved_sp
);
1045 if (regnum
< X86_64_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1048 *lvalp
= lval_memory
;
1049 *addrp
= cache
->saved_regs
[regnum
];
1053 /* Read the value in from memory. */
1054 read_memory (*addrp
, valuep
,
1055 register_size (current_gdbarch
, regnum
));
1060 frame_register_unwind (next_frame
, regnum
,
1061 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1064 static const struct frame_unwind x86_64_frame_unwind
=
1067 x86_64_frame_this_id
,
1068 x86_64_frame_prev_register
1071 static const struct frame_unwind
*
1072 x86_64_frame_p (CORE_ADDR pc
)
1074 return &x86_64_frame_unwind
;
1078 /* Signal trampolines. */
1080 /* FIXME: kettenis/20030419: Perhaps, we can unify the 32-bit and
1081 64-bit variants. This would require using identical frame caches
1082 on both platforms. */
1084 static struct x86_64_frame_cache
*
1085 x86_64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1087 struct x86_64_frame_cache
*cache
;
1088 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1096 cache
= x86_64_alloc_frame_cache ();
1098 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
1099 cache
->base
= extract_unsigned_integer (buf
, 8) - 8;
1101 addr
= tdep
->sigcontext_addr (next_frame
);
1102 gdb_assert (tdep
->sc_reg_offset
);
1103 gdb_assert (tdep
->sc_num_regs
<= X86_64_NUM_SAVED_REGS
);
1104 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1105 if (tdep
->sc_reg_offset
[i
] != -1)
1106 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1108 *this_cache
= cache
;
1113 x86_64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1114 void **this_cache
, struct frame_id
*this_id
)
1116 struct x86_64_frame_cache
*cache
=
1117 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1119 (*this_id
) = frame_id_build (cache
->base
+ 16, frame_pc_unwind (next_frame
));
1123 x86_64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1125 int regnum
, int *optimizedp
,
1126 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1127 int *realnump
, void *valuep
)
1129 /* Make sure we've initialized the cache. */
1130 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1132 x86_64_frame_prev_register (next_frame
, this_cache
, regnum
,
1133 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1136 static const struct frame_unwind x86_64_sigtramp_frame_unwind
=
1139 x86_64_sigtramp_frame_this_id
,
1140 x86_64_sigtramp_frame_prev_register
1143 static const struct frame_unwind
*
1144 x86_64_sigtramp_frame_p (CORE_ADDR pc
)
1148 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1149 if (PC_IN_SIGTRAMP (pc
, name
))
1151 gdb_assert (gdbarch_tdep (current_gdbarch
)->sigcontext_addr
);
1153 return &x86_64_sigtramp_frame_unwind
;
1161 x86_64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1163 struct x86_64_frame_cache
*cache
=
1164 x86_64_frame_cache (next_frame
, this_cache
);
1169 static const struct frame_base x86_64_frame_base
=
1171 &x86_64_frame_unwind
,
1172 x86_64_frame_base_address
,
1173 x86_64_frame_base_address
,
1174 x86_64_frame_base_address
1177 static struct frame_id
1178 x86_64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1183 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
1184 fp
= extract_unsigned_integer (buf
, 8);
1186 return frame_id_build (fp
+ 16, frame_pc_unwind (next_frame
));
1190 x86_64_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1192 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1194 /* The x86-64 has 16 SSE registers. */
1195 tdep
->num_xmm_regs
= 16;
1197 /* This is what all the fuss is about. */
1198 set_gdbarch_long_bit (gdbarch
, 64);
1199 set_gdbarch_long_long_bit (gdbarch
, 64);
1200 set_gdbarch_ptr_bit (gdbarch
, 64);
1202 /* In contrast to the i386, on the x86-64 a `long double' actually
1203 takes up 128 bits, even though it's still based on the i387
1204 extended floating-point format which has only 80 significant bits. */
1205 set_gdbarch_long_double_bit (gdbarch
, 128);
1207 set_gdbarch_num_regs (gdbarch
, X86_64_NUM_REGS
);
1208 set_gdbarch_register_name (gdbarch
, x86_64_register_name
);
1209 set_gdbarch_register_type (gdbarch
, x86_64_register_type
);
1211 /* Register numbers of various important registers. */
1212 set_gdbarch_sp_regnum (gdbarch
, X86_64_RSP_REGNUM
); /* %rsp */
1213 set_gdbarch_pc_regnum (gdbarch
, X86_64_RIP_REGNUM
); /* %rip */
1214 set_gdbarch_ps_regnum (gdbarch
, X86_64_EFLAGS_REGNUM
); /* %eflags */
1215 set_gdbarch_fp0_regnum (gdbarch
, X86_64_ST0_REGNUM
); /* %st(0) */
1217 /* The "default" register numbering scheme for the x86-64 is
1218 referred to as the "DWARF Register Number Mapping" in the System
1219 V psABI. The preferred debugging format for all known x86-64
1220 targets is actually DWARF2, and GCC doesn't seem to support DWARF
1221 (that is DWARF-1), but we provide the same mapping just in case.
1222 This mapping is also used for stabs, which GCC does support. */
1223 set_gdbarch_stab_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1224 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1225 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1227 /* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
1228 be in use on any of the supported x86-64 targets. */
1230 /* Call dummy code. */
1231 set_gdbarch_push_dummy_call (gdbarch
, x86_64_push_dummy_call
);
1233 set_gdbarch_convert_register_p (gdbarch
, x86_64_convert_register_p
);
1234 set_gdbarch_register_to_value (gdbarch
, i387_register_to_value
);
1235 set_gdbarch_value_to_register (gdbarch
, i387_value_to_register
);
1237 set_gdbarch_extract_return_value (gdbarch
, x86_64_extract_return_value
);
1238 set_gdbarch_store_return_value (gdbarch
, x86_64_store_return_value
);
1239 /* Override, since this is handled by x86_64_extract_return_value. */
1240 set_gdbarch_extract_struct_value_address (gdbarch
, NULL
);
1241 set_gdbarch_use_struct_convention (gdbarch
, x86_64_use_struct_convention
);
1243 set_gdbarch_skip_prologue (gdbarch
, x86_64_skip_prologue
);
1245 /* Avoid wiring in the MMX registers for now. */
1246 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1248 set_gdbarch_unwind_dummy_id (gdbarch
, x86_64_unwind_dummy_id
);
1250 /* FIXME: kettenis/20021026: This is ELF-specific. Fine for now,
1251 since all supported x86-64 targets are ELF, but that might change
1253 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1255 frame_unwind_append_predicate (gdbarch
, x86_64_sigtramp_frame_p
);
1256 frame_unwind_append_predicate (gdbarch
, x86_64_frame_p
);
1257 frame_base_set_default (gdbarch
, &x86_64_frame_base
);
1261 #define I387_FISEG_REGNUM FISEG_REGNUM
1262 #define I387_FOSEG_REGNUM FOSEG_REGNUM
1264 /* The 64-bit FXSAVE format differs from the 32-bit format in the
1265 sense that the instruction pointer and data pointer are simply
1266 64-bit offsets into the code segment and the data segment instead
1267 of a selector offset pair. The functions below store the upper 32
1268 bits of these pointers (instead of just the 16-bits of the segment
1271 /* Fill GDB's register array with the floating-point and SSE register
1272 values in *FXSAVE. This function masks off any of the reserved
1276 x86_64_supply_fxsave (char *fxsave
)
1278 i387_supply_fxsave (fxsave
);
1282 supply_register (I387_FISEG_REGNUM
, fxsave
+ 12);
1283 supply_register (I387_FOSEG_REGNUM
, fxsave
+ 20);
1287 /* Fill register REGNUM (if it is a floating-point or SSE register) in
1288 *FXSAVE with the value in GDB's register array. If REGNUM is -1, do
1289 this for all registers. This function doesn't touch any of the
1290 reserved bits in *FXSAVE. */
1293 x86_64_fill_fxsave (char *fxsave
, int regnum
)
1295 i387_fill_fxsave (fxsave
, regnum
);
1297 if (regnum
== -1 || regnum
== I387_FISEG_REGNUM
)
1298 regcache_collect (I387_FISEG_REGNUM
, fxsave
+ 12);
1299 if (regnum
== -1 || regnum
== I387_FOSEG_REGNUM
)
1300 regcache_collect (I387_FOSEG_REGNUM
, fxsave
+ 20);