(Releasing GDB, Coding): Fix typos.
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
2
3 Copyright 2001, 2002 Free Software Foundation, Inc.
4
5 Contributed by Jiri Smid, SuSE Labs.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "inferior.h"
26 #include "gdbcore.h"
27 #include "gdbcmd.h"
28 #include "arch-utils.h"
29 #include "regcache.h"
30 #include "symfile.h"
31 #include "x86-64-tdep.h"
32 #include "dwarf2cfi.h"
33 #include "gdb_assert.h"
34
35 /* Register numbers of various important registers. */
36 #define RAX_REGNUM 0
37 #define RDX_REGNUM 3
38 #define RDI_REGNUM 5
39 #define EFLAGS_REGNUM 17
40 #define XMM1_REGNUM 39
41
42 struct register_info
43 {
44 int size;
45 char *name;
46 struct type **type;
47 };
48
49 /* x86_64_register_raw_size_table[i] is the number of bytes of storage in
50 GDB's register array occupied by register i. */
51 static struct register_info x86_64_register_info_table[] = {
52 {8, "rax", &builtin_type_int64},
53 {8, "rbx", &builtin_type_int64},
54 {8, "rcx", &builtin_type_int64},
55 {8, "rdx", &builtin_type_int64},
56 {8, "rsi", &builtin_type_int64},
57 {8, "rdi", &builtin_type_int64},
58 {8, "rbp", &builtin_type_void_func_ptr},
59 {8, "rsp", &builtin_type_void_func_ptr},
60 {8, "r8", &builtin_type_int64},
61 {8, "r9", &builtin_type_int64},
62 {8, "r10", &builtin_type_int64},
63 {8, "r11", &builtin_type_int64},
64 {8, "r12", &builtin_type_int64},
65 {8, "r13", &builtin_type_int64},
66 {8, "r14", &builtin_type_int64},
67 {8, "r15", &builtin_type_int64},
68 {8, "rip", &builtin_type_void_func_ptr},
69 {4, "eflags", &builtin_type_int32},
70 {4, "ds", &builtin_type_int32},
71 {4, "es", &builtin_type_int32},
72 {4, "fs", &builtin_type_int32},
73 {4, "gs", &builtin_type_int32},
74 {10, "st0", &builtin_type_i387_ext},
75 {10, "st1", &builtin_type_i387_ext},
76 {10, "st2", &builtin_type_i387_ext},
77 {10, "st3", &builtin_type_i387_ext},
78 {10, "st4", &builtin_type_i387_ext},
79 {10, "st5", &builtin_type_i387_ext},
80 {10, "st6", &builtin_type_i387_ext},
81 {10, "st7", &builtin_type_i387_ext},
82 {4, "fctrl", &builtin_type_int32},
83 {4, "fstat", &builtin_type_int32},
84 {4, "ftag", &builtin_type_int32},
85 {4, "fiseg", &builtin_type_int32},
86 {4, "fioff", &builtin_type_int32},
87 {4, "foseg", &builtin_type_int32},
88 {4, "fooff", &builtin_type_int32},
89 {4, "fop", &builtin_type_int32},
90 {16, "xmm0", &builtin_type_v4sf},
91 {16, "xmm1", &builtin_type_v4sf},
92 {16, "xmm2", &builtin_type_v4sf},
93 {16, "xmm3", &builtin_type_v4sf},
94 {16, "xmm4", &builtin_type_v4sf},
95 {16, "xmm5", &builtin_type_v4sf},
96 {16, "xmm6", &builtin_type_v4sf},
97 {16, "xmm7", &builtin_type_v4sf},
98 {16, "xmm8", &builtin_type_v4sf},
99 {16, "xmm9", &builtin_type_v4sf},
100 {16, "xmm10", &builtin_type_v4sf},
101 {16, "xmm11", &builtin_type_v4sf},
102 {16, "xmm12", &builtin_type_v4sf},
103 {16, "xmm13", &builtin_type_v4sf},
104 {16, "xmm14", &builtin_type_v4sf},
105 {16, "xmm15", &builtin_type_v4sf},
106 {4, "mxcsr", &builtin_type_int32}
107 };
108
109 /* Number of all registers */
110 #define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
111 sizeof (x86_64_register_info_table[0]))
112
113 /* Number of general registers. */
114 #define X86_64_NUM_GREGS (22)
115
116 int x86_64_num_regs = X86_64_NUM_REGS;
117 int x86_64_num_gregs = X86_64_NUM_GREGS;
118
119 /* Number of bytes of storage in the actual machine representation for
120 register REGNO. */
121 int
122 x86_64_register_raw_size (int regno)
123 {
124 return x86_64_register_info_table[regno].size;
125 }
126
127 /* x86_64_register_byte_table[i] is the offset into the register file of the
128 start of register number i. We initialize this from
129 x86_64_register_info_table. */
130 int x86_64_register_byte_table[X86_64_NUM_REGS];
131
132 /* Index within `registers' of the first byte of the space for register REGNO. */
133 int
134 x86_64_register_byte (int regno)
135 {
136 return x86_64_register_byte_table[regno];
137 }
138
139 /* Return the GDB type object for the "standard" data type of data in
140 register N. */
141 static struct type *
142 x86_64_register_virtual_type (int regno)
143 {
144 return *x86_64_register_info_table[regno].type;
145 }
146
147 /* x86_64_register_convertible is true if register N's virtual format is
148 different from its raw format. Note that this definition assumes
149 that the host supports IEEE 32-bit floats, since it doesn't say
150 that SSE registers need conversion. Even if we can't find a
151 counterexample, this is still sloppy. */
152 int
153 x86_64_register_convertible (int regno)
154 {
155 return IS_FP_REGNUM (regno);
156 }
157
158 /* Convert data from raw format for register REGNUM in buffer FROM to
159 virtual format with type TYPE in buffer TO. In principle both
160 formats are identical except that the virtual format has two extra
161 bytes appended that aren't used. We set these to zero. */
162 void
163 x86_64_register_convert_to_virtual (int regnum, struct type *type,
164 char *from, char *to)
165 {
166 char buf[12];
167 DOUBLEST d;
168 /* We only support floating-point values. */
169 if (TYPE_CODE (type) != TYPE_CODE_FLT)
170 {
171 warning ("Cannot convert floating-point register value "
172 "to non-floating-point type.");
173 memset (to, 0, TYPE_LENGTH (type));
174 return;
175 }
176 /* First add the necessary padding. */
177 memcpy (buf, from, FPU_REG_RAW_SIZE);
178 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
179 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
180 to the extended floating-point format used by the FPU. */
181 convert_typed_floating (to, type, buf,
182 x86_64_register_virtual_type (regnum));
183 }
184
185 /* Convert data from virtual format with type TYPE in buffer FROM to
186 raw format for register REGNUM in buffer TO. Simply omit the two
187 unused bytes. */
188
189 void
190 x86_64_register_convert_to_raw (struct type *type, int regnum,
191 char *from, char *to)
192 {
193 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
194 /* Simply omit the two unused bytes. */
195 memcpy (to, from, FPU_REG_RAW_SIZE);
196 }
197
198 /* This is the variable that is set with "set disassembly-flavour", and
199 its legitimate values. */
200 static const char att_flavour[] = "att";
201 static const char intel_flavour[] = "intel";
202 static const char *valid_flavours[] = {
203 att_flavour,
204 intel_flavour,
205 NULL
206 };
207 static const char *disassembly_flavour = att_flavour;
208
209 static CORE_ADDR
210 x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
211 {
212 char buf[8];
213
214 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
215
216 write_memory (sp - 8, buf, 8);
217 return sp - 8;
218 }
219
220 void
221 x86_64_pop_frame (void)
222 {
223 generic_pop_current_frame (cfi_pop_frame);
224 }
225 \f
226
227 /* The returning of values is done according to the special algorithm.
228 Some types are returned in registers an some (big structures) in memory.
229 See ABI for details.
230 */
231
232 #define MAX_CLASSES 4
233
234 enum x86_64_reg_class
235 {
236 X86_64_NO_CLASS,
237 X86_64_INTEGER_CLASS,
238 X86_64_INTEGERSI_CLASS,
239 X86_64_SSE_CLASS,
240 X86_64_SSESF_CLASS,
241 X86_64_SSEDF_CLASS,
242 X86_64_SSEUP_CLASS,
243 X86_64_X87_CLASS,
244 X86_64_X87UP_CLASS,
245 X86_64_MEMORY_CLASS
246 };
247
248 /* Return the union class of CLASS1 and CLASS2.
249 See the x86-64 ABI for details. */
250
251 static enum x86_64_reg_class
252 merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
253 {
254 /* Rule #1: If both classes are equal, this is the resulting class. */
255 if (class1 == class2)
256 return class1;
257
258 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
259 the other class. */
260 if (class1 == X86_64_NO_CLASS)
261 return class2;
262 if (class2 == X86_64_NO_CLASS)
263 return class1;
264
265 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
266 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
267 return X86_64_MEMORY_CLASS;
268
269 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
270 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
271 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
272 return X86_64_INTEGERSI_CLASS;
273 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
274 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
275 return X86_64_INTEGER_CLASS;
276
277 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
278 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
279 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
280 return X86_64_MEMORY_CLASS;
281
282 /* Rule #6: Otherwise class SSE is used. */
283 return X86_64_SSE_CLASS;
284 }
285
286
287 /* Classify the argument type.
288 CLASSES will be filled by the register class used to pass each word
289 of the operand. The number of words is returned. In case the parameter
290 should be passed in memory, 0 is returned. As a special case for zero
291 sized containers, classes[0] will be NO_CLASS and 1 is returned.
292
293 See the x86-64 PS ABI for details.
294 */
295
296 static int
297 classify_argument (struct type *type,
298 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
299 {
300 int bytes = TYPE_LENGTH (type);
301 int words = (bytes + 8 - 1) / 8;
302
303 switch (TYPE_CODE (type))
304 {
305 case TYPE_CODE_ARRAY:
306 case TYPE_CODE_STRUCT:
307 case TYPE_CODE_UNION:
308 {
309 int i;
310 enum x86_64_reg_class subclasses[MAX_CLASSES];
311
312 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
313 if (bytes > 16)
314 return 0;
315
316 for (i = 0; i < words; i++)
317 classes[i] = X86_64_NO_CLASS;
318
319 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
320 signalize memory class, so handle it as special case. */
321 if (!words)
322 {
323 classes[0] = X86_64_NO_CLASS;
324 return 1;
325 }
326 switch (TYPE_CODE (type))
327 {
328 case TYPE_CODE_STRUCT:
329 {
330 int j;
331 for (j = 0; j < type->nfields; ++j)
332 {
333 int num = classify_argument (type->fields[j].type,
334 subclasses,
335 (type->fields[j].loc.bitpos
336 + bit_offset) % 256);
337 if (!num)
338 return 0;
339 for (i = 0; i < num; i++)
340 {
341 int pos =
342 (type->fields[j].loc.bitpos + bit_offset) / 8 / 8;
343 classes[i + pos] =
344 merge_classes (subclasses[i], classes[i + pos]);
345 }
346 }
347 }
348 break;
349 case TYPE_CODE_ARRAY:
350 {
351 int num;
352
353 num = classify_argument (type->target_type,
354 subclasses, bit_offset);
355 if (!num)
356 return 0;
357
358 /* The partial classes are now full classes. */
359 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
360 subclasses[0] = X86_64_SSE_CLASS;
361 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
362 subclasses[0] = X86_64_INTEGER_CLASS;
363
364 for (i = 0; i < words; i++)
365 classes[i] = subclasses[i % num];
366 }
367 break;
368 case TYPE_CODE_UNION:
369 {
370 int j;
371 {
372 for (j = 0; j < type->nfields; ++j)
373 {
374 int num;
375 num = classify_argument (type->fields[j].type,
376 subclasses, bit_offset);
377 if (!num)
378 return 0;
379 for (i = 0; i < num; i++)
380 classes[i] = merge_classes (subclasses[i], classes[i]);
381 }
382 }
383 }
384 break;
385 }
386 /* Final merger cleanup. */
387 for (i = 0; i < words; i++)
388 {
389 /* If one class is MEMORY, everything should be passed in
390 memory. */
391 if (classes[i] == X86_64_MEMORY_CLASS)
392 return 0;
393
394 /* The X86_64_SSEUP_CLASS should be always preceeded by
395 X86_64_SSE_CLASS. */
396 if (classes[i] == X86_64_SSEUP_CLASS
397 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
398 classes[i] = X86_64_SSE_CLASS;
399
400 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
401 if (classes[i] == X86_64_X87UP_CLASS
402 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
403 classes[i] = X86_64_SSE_CLASS;
404 }
405 return words;
406 }
407 break;
408 case TYPE_CODE_FLT:
409 switch (bytes)
410 {
411 case 4:
412 if (!(bit_offset % 64))
413 classes[0] = X86_64_SSESF_CLASS;
414 else
415 classes[0] = X86_64_SSE_CLASS;
416 return 1;
417 case 8:
418 classes[0] = X86_64_SSEDF_CLASS;
419 return 1;
420 case 16:
421 classes[0] = X86_64_X87_CLASS;
422 classes[1] = X86_64_X87UP_CLASS;
423 return 2;
424 }
425 break;
426 case TYPE_CODE_INT:
427 case TYPE_CODE_PTR:
428 switch (bytes)
429 {
430 case 1:
431 case 2:
432 case 4:
433 case 8:
434 if (bytes * 8 + bit_offset <= 32)
435 classes[0] = X86_64_INTEGERSI_CLASS;
436 else
437 classes[0] = X86_64_INTEGER_CLASS;
438 return 1;
439 case 16:
440 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
441 return 2;
442 default:
443 break;
444 }
445 case TYPE_CODE_VOID:
446 return 0;
447 }
448 internal_error (__FILE__, __LINE__,
449 "classify_argument: unknown argument type");
450 }
451
452 /* Examine the argument and return set number of register required in each
453 class. Return 0 ifif parameter should be passed in memory. */
454
455 static int
456 examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
457 int n, int *int_nregs, int *sse_nregs)
458 {
459 *int_nregs = 0;
460 *sse_nregs = 0;
461 if (!n)
462 return 0;
463 for (n--; n >= 0; n--)
464 switch (classes[n])
465 {
466 case X86_64_INTEGER_CLASS:
467 case X86_64_INTEGERSI_CLASS:
468 (*int_nregs)++;
469 break;
470 case X86_64_SSE_CLASS:
471 case X86_64_SSESF_CLASS:
472 case X86_64_SSEDF_CLASS:
473 (*sse_nregs)++;
474 break;
475 case X86_64_NO_CLASS:
476 case X86_64_SSEUP_CLASS:
477 case X86_64_X87_CLASS:
478 case X86_64_X87UP_CLASS:
479 break;
480 case X86_64_MEMORY_CLASS:
481 internal_error (__FILE__, __LINE__,
482 "examine_argument: unexpected memory class");
483 }
484 return 1;
485 }
486
487 #define RET_INT_REGS 2
488 #define RET_SSE_REGS 2
489
490 /* Check if the structure in value_type is returned in registers or in
491 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
492 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
493 will be used. */
494 int
495 x86_64_use_struct_convention (int gcc_p, struct type *value_type)
496 {
497 enum x86_64_reg_class class[MAX_CLASSES];
498 int n = classify_argument (value_type, class, 0);
499 int needed_intregs;
500 int needed_sseregs;
501
502 return (!n ||
503 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
504 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
505 }
506
507
508 /* Extract from an array REGBUF containing the (raw) register state, a
509 function return value of TYPE, and copy that, in virtual format,
510 into VALBUF. */
511
512 void
513 x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
514 {
515 enum x86_64_reg_class class[MAX_CLASSES];
516 int n = classify_argument (type, class, 0);
517 int needed_intregs;
518 int needed_sseregs;
519 int intreg = 0;
520 int ssereg = 0;
521 int offset = 0;
522 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
523 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
524
525 if (!n ||
526 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
527 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
528 { /* memory class */
529 CORE_ADDR addr;
530 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
531 read_memory (addr, valbuf, TYPE_LENGTH (type));
532 return;
533 }
534 else
535 {
536 int i;
537 for (i = 0; i < n; i++)
538 {
539 switch (class[i])
540 {
541 case X86_64_NO_CLASS:
542 break;
543 case X86_64_INTEGER_CLASS:
544 memcpy (valbuf + offset,
545 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
546 8);
547 offset += 8;
548 intreg += 2;
549 break;
550 case X86_64_INTEGERSI_CLASS:
551 memcpy (valbuf + offset,
552 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
553 offset += 8;
554 intreg++;
555 break;
556 case X86_64_SSEDF_CLASS:
557 case X86_64_SSESF_CLASS:
558 case X86_64_SSE_CLASS:
559 memcpy (valbuf + offset,
560 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
561 8);
562 offset += 8;
563 ssereg += 2;
564 break;
565 case X86_64_SSEUP_CLASS:
566 memcpy (valbuf + offset + 8,
567 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
568 offset += 8;
569 ssereg++;
570 break;
571 case X86_64_X87_CLASS:
572 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
573 8);
574 offset += 8;
575 break;
576 case X86_64_X87UP_CLASS:
577 memcpy (valbuf + offset,
578 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
579 offset += 8;
580 break;
581 case X86_64_MEMORY_CLASS:
582 default:
583 internal_error (__FILE__, __LINE__,
584 "Unexpected argument class");
585 }
586 }
587 }
588 }
589
590 /* Handled by unwind informations. */
591 static void
592 x86_64_frame_init_saved_regs (struct frame_info *fi)
593 {
594 }
595
596 #define INT_REGS 6
597 #define SSE_REGS 16
598
599 CORE_ADDR
600 x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
601 int struct_return, CORE_ADDR struct_addr)
602 {
603 int intreg = 0;
604 int ssereg = 0;
605 int i;
606 static int int_parameter_registers[INT_REGS] = {
607 5 /* RDI */ , 4 /* RSI */ ,
608 3 /* RDX */ , 2 /* RCX */ ,
609 8 /* R8 */ , 9 /* R9 */
610 };
611 /* XMM0 - XMM15 */
612 static int sse_parameter_registers[SSE_REGS] = {
613 XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
614 XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
615 XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
616 XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
617 };
618 int stack_values_count = 0;
619 int *stack_values;
620 stack_values = alloca (nargs * sizeof (int));
621 for (i = 0; i < nargs; i++)
622 {
623 enum x86_64_reg_class class[MAX_CLASSES];
624 int n = classify_argument (args[i]->type, class, 0);
625 int needed_intregs;
626 int needed_sseregs;
627
628 if (!n ||
629 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
630 || intreg / 2 + needed_intregs > INT_REGS
631 || ssereg / 2 + needed_sseregs > SSE_REGS)
632 { /* memory class */
633 stack_values[stack_values_count++] = i;
634 }
635 else
636 {
637 int j;
638 for (j = 0; j < n; j++)
639 {
640 int offset = 0;
641 switch (class[j])
642 {
643 case X86_64_NO_CLASS:
644 break;
645 case X86_64_INTEGER_CLASS:
646 write_register_gen (int_parameter_registers
647 [(intreg + 1) / 2],
648 VALUE_CONTENTS_ALL (args[i]) + offset);
649 offset += 8;
650 intreg += 2;
651 break;
652 case X86_64_INTEGERSI_CLASS:
653 write_register_gen (int_parameter_registers[intreg / 2],
654 VALUE_CONTENTS_ALL (args[i]) + offset);
655 offset += 8;
656 intreg++;
657 break;
658 case X86_64_SSEDF_CLASS:
659 case X86_64_SSESF_CLASS:
660 case X86_64_SSE_CLASS:
661 write_register_gen (sse_parameter_registers
662 [(ssereg + 1) / 2],
663 VALUE_CONTENTS_ALL (args[i]) + offset);
664 offset += 8;
665 ssereg += 2;
666 break;
667 case X86_64_SSEUP_CLASS:
668 write_register_gen (sse_parameter_registers[ssereg / 2],
669 VALUE_CONTENTS_ALL (args[i]) + offset);
670 offset += 8;
671 ssereg++;
672 break;
673 case X86_64_X87_CLASS:
674 case X86_64_MEMORY_CLASS:
675 stack_values[stack_values_count++] = i;
676 break;
677 case X86_64_X87UP_CLASS:
678 break;
679 default:
680 internal_error (__FILE__, __LINE__,
681 "Unexpected argument class");
682 }
683 intreg += intreg % 2;
684 ssereg += ssereg % 2;
685 }
686 }
687 }
688 while (--stack_values_count >= 0)
689 {
690 struct value *arg = args[stack_values[stack_values_count]];
691 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
692 len += 7;
693 len -= len % 8;
694 sp -= len;
695 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
696 }
697 return sp;
698 }
699
700 /* Write into the appropriate registers a function return value stored
701 in VALBUF of type TYPE, given in virtual format. */
702 void
703 x86_64_store_return_value (struct type *type, char *valbuf)
704 {
705 int len = TYPE_LENGTH (type);
706
707 if (TYPE_CODE_FLT == TYPE_CODE (type))
708 {
709 /* Floating-point return values can be found in %st(0). */
710 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
711 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
712 {
713 /* Copy straight over. */
714 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
715 FPU_REG_RAW_SIZE);
716 }
717 else
718 {
719 char buf[FPU_REG_RAW_SIZE];
720 DOUBLEST val;
721
722 /* Convert the value found in VALBUF to the extended
723 floating point format used by the FPU. This is probably
724 not exactly how it would happen on the target itself, but
725 it is the best we can do. */
726 val = extract_floating (valbuf, TYPE_LENGTH (type));
727 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
728 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
729 FPU_REG_RAW_SIZE);
730 }
731 }
732 else
733 {
734 int low_size = REGISTER_RAW_SIZE (0);
735 int high_size = REGISTER_RAW_SIZE (1);
736
737 if (len <= low_size)
738 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
739 else if (len <= (low_size + high_size))
740 {
741 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
742 write_register_bytes (REGISTER_BYTE (1),
743 valbuf + low_size, len - low_size);
744 }
745 else
746 internal_error (__FILE__, __LINE__,
747 "Cannot store return value of %d bytes long.", len);
748 }
749 }
750 \f
751
752 static char *
753 x86_64_register_name (int reg_nr)
754 {
755 if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
756 return NULL;
757 return x86_64_register_info_table[reg_nr].name;
758 }
759 \f
760
761
762 /* We have two flavours of disassembly. The machinery on this page
763 deals with switching between those. */
764
765 static int
766 gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
767 {
768 if (disassembly_flavour == att_flavour)
769 return print_insn_i386_att (memaddr, info);
770 else if (disassembly_flavour == intel_flavour)
771 return print_insn_i386_intel (memaddr, info);
772 /* Never reached -- disassembly_flavour is always either att_flavour
773 or intel_flavour. */
774 internal_error (__FILE__, __LINE__, "failed internal consistency check");
775 }
776 \f
777
778 /* Store the address of the place in which to copy the structure the
779 subroutine will return. This is called from call_function. */
780 void
781 x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
782 {
783 write_register (RDI_REGNUM, addr);
784 }
785
786 int
787 x86_64_frameless_function_invocation (struct frame_info *frame)
788 {
789 return 0;
790 }
791
792 /* If a function with debugging information and known beginning
793 is detected, we will return pc of the next line in the source
794 code. With this approach we effectively skip the prolog. */
795
796 #define PROLOG_BUFSIZE 4
797 CORE_ADDR
798 x86_64_skip_prologue (CORE_ADDR pc)
799 {
800 int i, firstline, currline;
801 struct symtab_and_line v_sal;
802 struct symbol *v_function;
803 CORE_ADDR salendaddr = 0, endaddr = 0;
804
805 /* We will handle only functions beginning with:
806 55 pushq %rbp
807 48 89 e5 movq %rsp,%rbp
808 */
809 unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
810 prolog_buf[PROLOG_BUFSIZE];
811
812 read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
813
814 /* First check, whether pc points to pushq %rbp, movq %rsp,%rbp. */
815 for (i = 0; i < PROLOG_BUFSIZE; i++)
816 if (prolog_expect[i] != prolog_buf[i])
817 return pc;
818
819 v_function = find_pc_function (pc);
820 v_sal = find_pc_line (pc, 0);
821
822 /* If pc doesn't point to a function with debuginfo,
823 some of the following may be NULL. */
824 if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
825 return pc;
826
827 firstline = v_sal.line;
828 currline = firstline;
829 salendaddr = v_sal.end;
830 endaddr = v_function->ginfo.value.block->endaddr;
831
832 for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
833 if (v_sal.symtab->linetable->item[i].line > firstline
834 && v_sal.symtab->linetable->item[i].pc >= salendaddr
835 && v_sal.symtab->linetable->item[i].pc < endaddr)
836 {
837 pc = v_sal.symtab->linetable->item[i].pc;
838 currline = v_sal.symtab->linetable->item[i].line;
839 break;
840 }
841
842 return pc;
843 }
844
845 /* Sequence of bytes for breakpoint instruction. */
846 static unsigned char *
847 x86_64_breakpoint_from_pc (CORE_ADDR * pc, int *lenptr)
848 {
849 static unsigned char breakpoint[] = { 0xcc };
850 *lenptr = 1;
851 return breakpoint;
852 }
853
854 static struct gdbarch *
855 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
856 {
857 struct gdbarch *gdbarch;
858 struct gdbarch_tdep *tdep;
859 int i, sum;
860
861 /* Find a candidate among the list of pre-declared architectures. */
862 for (arches = gdbarch_list_lookup_by_info (arches, &info);
863 arches != NULL;
864 arches = gdbarch_list_lookup_by_info (arches->next, &info))
865 {
866 switch (info.bfd_arch_info->mach)
867 {
868 case bfd_mach_x86_64:
869 case bfd_mach_x86_64_intel_syntax:
870 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
871 {
872 case bfd_mach_x86_64:
873 case bfd_mach_x86_64_intel_syntax:
874 return arches->gdbarch;
875 case bfd_mach_i386_i386:
876 case bfd_mach_i386_i8086:
877 case bfd_mach_i386_i386_intel_syntax:
878 break;
879 default:
880 internal_error (__FILE__, __LINE__,
881 "i386_gdbarch_init: unknown machine type");
882 }
883 break;
884 case bfd_mach_i386_i386:
885 case bfd_mach_i386_i8086:
886 case bfd_mach_i386_i386_intel_syntax:
887 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
888 {
889 case bfd_mach_x86_64:
890 case bfd_mach_x86_64_intel_syntax:
891 break;
892 case bfd_mach_i386_i386:
893 case bfd_mach_i386_i8086:
894 case bfd_mach_i386_i386_intel_syntax:
895 return arches->gdbarch;
896 default:
897 internal_error (__FILE__, __LINE__,
898 "i386_gdbarch_init: unknown machine type");
899 }
900 break;
901 default:
902 internal_error (__FILE__, __LINE__,
903 "i386_gdbarch_init: unknown machine type");
904 }
905 }
906
907 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
908 gdbarch = gdbarch_alloc (&info, tdep);
909
910 switch (info.bfd_arch_info->mach)
911 {
912 case bfd_mach_x86_64:
913 case bfd_mach_x86_64_intel_syntax:
914 tdep->num_xmm_regs = 16;
915 break;
916 case bfd_mach_i386_i386:
917 case bfd_mach_i386_i8086:
918 case bfd_mach_i386_i386_intel_syntax:
919 /* This is place for definition of i386 target vector. */
920 break;
921 default:
922 internal_error (__FILE__, __LINE__,
923 "i386_gdbarch_init: unknown machine type");
924 }
925
926 set_gdbarch_long_bit (gdbarch, 64);
927 set_gdbarch_long_long_bit (gdbarch, 64);
928 set_gdbarch_ptr_bit (gdbarch, 64);
929
930 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
931
932 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
933 set_gdbarch_register_name (gdbarch, x86_64_register_name);
934 set_gdbarch_register_size (gdbarch, 8);
935 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
936 set_gdbarch_max_register_raw_size (gdbarch, 16);
937 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
938
939 /* Total amount of space needed to store our copies of the machine's register
940 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
941 for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
942 sum += x86_64_register_info_table[i].size;
943 set_gdbarch_register_bytes (gdbarch, sum);
944 set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size);
945 set_gdbarch_max_register_virtual_size (gdbarch, 16);
946
947 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
948
949 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
950 set_gdbarch_register_convert_to_virtual (gdbarch,
951 x86_64_register_convert_to_virtual);
952 set_gdbarch_register_convert_to_raw (gdbarch,
953 x86_64_register_convert_to_raw);
954
955 /* Register numbers of various important registers. */
956 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
957 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
958 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
959
960 set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */
961
962 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
963
964 /* Discard from the stack the innermost frame, restoring all registers. */
965 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
966
967 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
968 chain-pointer. */
969 set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
970
971 set_gdbarch_frameless_function_invocation (gdbarch,
972 x86_64_frameless_function_invocation);
973 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
974
975 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
976 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
977
978 /* Return number of bytes at start of arglist that are not really args. */
979 set_gdbarch_frame_args_skip (gdbarch, 8);
980
981 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
982
983 /* Frame pc initialization is handled by unwind informations. */
984 set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
985
986 /* Initialization of unwind informations. */
987 set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
988
989 /* Getting saved registers is handled by unwind informations. */
990 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
991
992 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
993
994 /* Cons up virtual frame pointer for trace */
995 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
996
997
998 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
999
1000 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1001 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1002 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1003 set_gdbarch_call_dummy_length (gdbarch, 0);
1004 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1005 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1006 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
1007 set_gdbarch_call_dummy_words (gdbarch, 0);
1008 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1009 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1010 set_gdbarch_call_dummy_p (gdbarch, 1);
1011 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1012 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1013 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1014 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
1015 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
1016
1017 /* Return number of args passed to a frame, no way to tell. */
1018 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1019 /* Don't use default structure extract routine */
1020 set_gdbarch_extract_struct_value_address (gdbarch, 0);
1021
1022 /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
1023 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
1024 the case when structure is returned in registers. */
1025 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
1026
1027 /* Store the address of the place in which to copy the structure the
1028 subroutine will return. This is called from call_function. */
1029 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
1030
1031 /* Extract from an array REGBUF containing the (raw) register state
1032 a function return value of type TYPE, and copy that, in virtual format,
1033 into VALBUF. */
1034 set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
1035
1036
1037 /* Write into the appropriate registers a function return value stored
1038 in VALBUF of type TYPE, given in virtual format. */
1039 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
1040 \f
1041
1042 /* Offset from address of function to start of its code. */
1043 set_gdbarch_function_start_offset (gdbarch, 0);
1044
1045 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
1046
1047 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
1048
1049 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1050
1051 set_gdbarch_breakpoint_from_pc (gdbarch, x86_64_breakpoint_from_pc);
1052
1053
1054 /* Amount PC must be decremented by after a breakpoint. This is often the
1055 number of bytes in BREAKPOINT but not always. */
1056 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1057
1058 /* Use dwarf2 debug frame informations. */
1059 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
1060 return gdbarch;
1061 }
1062
1063 void
1064 _initialize_x86_64_tdep (void)
1065 {
1066 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
1067
1068 /* Initialize the table saying where each register starts in the
1069 register file. */
1070 {
1071 int i, offset;
1072
1073 offset = 0;
1074 for (i = 0; i < X86_64_NUM_REGS; i++)
1075 {
1076 x86_64_register_byte_table[i] = offset;
1077 offset += x86_64_register_info_table[i].size;
1078 }
1079 }
1080
1081 tm_print_insn = gdb_print_insn_x86_64;
1082 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
1083
1084 /* Add the variable that controls the disassembly flavour. */
1085 {
1086 struct cmd_list_element *new_cmd;
1087
1088 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1089 valid_flavours, &disassembly_flavour, "\
1090 Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1091 and the default value is \"att\".", &setlist);
1092 add_show_from_set (new_cmd, &showlist);
1093 }
1094 }
This page took 0.053157 seconds and 4 git commands to generate.