1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
3 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
28 #include "frame-base.h"
29 #include "frame-unwind.h"
37 #include "gdb_assert.h"
39 #include "x86-64-tdep.h"
40 #include "i387-tdep.h"
42 /* Register information. */
44 struct x86_64_register_info
50 static struct x86_64_register_info x86_64_register_info
[] =
52 { "rax", &builtin_type_int64
},
53 { "rbx", &builtin_type_int64
},
54 { "rcx", &builtin_type_int64
},
55 { "rdx", &builtin_type_int64
},
56 { "rsi", &builtin_type_int64
},
57 { "rdi", &builtin_type_int64
},
58 { "rbp", &builtin_type_void_data_ptr
},
59 { "rsp", &builtin_type_void_data_ptr
},
61 /* %r8 is indeed register number 8. */
62 { "r8", &builtin_type_int64
},
63 { "r9", &builtin_type_int64
},
64 { "r10", &builtin_type_int64
},
65 { "r11", &builtin_type_int64
},
66 { "r12", &builtin_type_int64
},
67 { "r13", &builtin_type_int64
},
68 { "r14", &builtin_type_int64
},
69 { "r15", &builtin_type_int64
},
70 { "rip", &builtin_type_void_func_ptr
},
71 { "eflags", &builtin_type_int32
},
72 { "ds", &builtin_type_int32
},
73 { "es", &builtin_type_int32
},
74 { "fs", &builtin_type_int32
},
75 { "gs", &builtin_type_int32
},
77 /* %st0 is register number 22. */
78 { "st0", &builtin_type_i387_ext
},
79 { "st1", &builtin_type_i387_ext
},
80 { "st2", &builtin_type_i387_ext
},
81 { "st3", &builtin_type_i387_ext
},
82 { "st4", &builtin_type_i387_ext
},
83 { "st5", &builtin_type_i387_ext
},
84 { "st6", &builtin_type_i387_ext
},
85 { "st7", &builtin_type_i387_ext
},
86 { "fctrl", &builtin_type_int32
},
87 { "fstat", &builtin_type_int32
},
88 { "ftag", &builtin_type_int32
},
89 { "fiseg", &builtin_type_int32
},
90 { "fioff", &builtin_type_int32
},
91 { "foseg", &builtin_type_int32
},
92 { "fooff", &builtin_type_int32
},
93 { "fop", &builtin_type_int32
},
95 /* %xmm0 is register number 38. */
96 { "xmm0", &builtin_type_v4sf
},
97 { "xmm1", &builtin_type_v4sf
},
98 { "xmm2", &builtin_type_v4sf
},
99 { "xmm3", &builtin_type_v4sf
},
100 { "xmm4", &builtin_type_v4sf
},
101 { "xmm5", &builtin_type_v4sf
},
102 { "xmm6", &builtin_type_v4sf
},
103 { "xmm7", &builtin_type_v4sf
},
104 { "xmm8", &builtin_type_v4sf
},
105 { "xmm9", &builtin_type_v4sf
},
106 { "xmm10", &builtin_type_v4sf
},
107 { "xmm11", &builtin_type_v4sf
},
108 { "xmm12", &builtin_type_v4sf
},
109 { "xmm13", &builtin_type_v4sf
},
110 { "xmm14", &builtin_type_v4sf
},
111 { "xmm15", &builtin_type_v4sf
},
112 { "mxcsr", &builtin_type_int32
}
115 /* Total number of registers. */
116 #define X86_64_NUM_REGS \
117 (sizeof (x86_64_register_info) / sizeof (x86_64_register_info[0]))
119 /* Return the name of register REGNUM. */
122 x86_64_register_name (int regnum
)
124 if (regnum
>= 0 && regnum
< X86_64_NUM_REGS
)
125 return x86_64_register_info
[regnum
].name
;
130 /* Return the GDB type object for the "standard" data type of data in
134 x86_64_register_type (struct gdbarch
*gdbarch
, int regnum
)
136 gdb_assert (regnum
>= 0 && regnum
< X86_64_NUM_REGS
);
138 return *x86_64_register_info
[regnum
].type
;
141 /* DWARF Register Number Mapping as defined in the System V psABI,
144 static int x86_64_dwarf_regmap
[] =
146 /* General Purpose Registers RAX, RDX, RCX, RBX, RSI, RDI. */
147 X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
, 2, 1,
148 4, X86_64_RDI_REGNUM
,
150 /* Frame Pointer Register RBP. */
153 /* Stack Pointer Register RSP. */
156 /* Extended Integer Registers 8 - 15. */
157 8, 9, 10, 11, 12, 13, 14, 15,
159 /* Return Address RA. Not mapped. */
162 /* SSE Registers 0 - 7. */
163 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
164 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
165 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
166 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
168 /* Extended SSE Registers 8 - 15. */
169 X86_64_XMM0_REGNUM
+ 8, X86_64_XMM0_REGNUM
+ 9,
170 X86_64_XMM0_REGNUM
+ 10, X86_64_XMM0_REGNUM
+ 11,
171 X86_64_XMM0_REGNUM
+ 12, X86_64_XMM0_REGNUM
+ 13,
172 X86_64_XMM0_REGNUM
+ 14, X86_64_XMM0_REGNUM
+ 15,
174 /* Floating Point Registers 0-7. */
175 X86_64_ST0_REGNUM
+ 0, X86_64_ST0_REGNUM
+ 1,
176 X86_64_ST0_REGNUM
+ 2, X86_64_ST0_REGNUM
+ 3,
177 X86_64_ST0_REGNUM
+ 4, X86_64_ST0_REGNUM
+ 5,
178 X86_64_ST0_REGNUM
+ 6, X86_64_ST0_REGNUM
+ 7
181 static const int x86_64_dwarf_regmap_len
=
182 (sizeof (x86_64_dwarf_regmap
) / sizeof (x86_64_dwarf_regmap
[0]));
184 /* Convert DWARF register number REG to the appropriate register
185 number used by GDB. */
188 x86_64_dwarf_reg_to_regnum (int reg
)
192 if (reg
>= 0 || reg
< x86_64_dwarf_regmap_len
)
193 regnum
= x86_64_dwarf_regmap
[reg
];
196 warning ("Unmapped DWARF Register #%d encountered\n", reg
);
201 /* Return nonzero if a value of type TYPE stored in register REGNUM
202 needs any special handling. */
205 x86_64_convert_register_p (int regnum
, struct type
*type
)
207 return i386_fp_regnum_p (regnum
);
211 /* The returning of values is done according to the special algorithm.
212 Some types are returned in registers an some (big structures) in
213 memory. See the System V psABI for details. */
215 #define MAX_CLASSES 4
217 enum x86_64_reg_class
220 X86_64_INTEGER_CLASS
,
221 X86_64_INTEGERSI_CLASS
,
231 /* Return the union class of CLASS1 and CLASS2.
232 See the System V psABI for details. */
234 static enum x86_64_reg_class
235 merge_classes (enum x86_64_reg_class class1
, enum x86_64_reg_class class2
)
237 /* Rule (a): If both classes are equal, this is the resulting class. */
238 if (class1
== class2
)
241 /* Rule (b): If one of the classes is NO_CLASS, the resulting class
242 is the other class. */
243 if (class1
== X86_64_NO_CLASS
)
245 if (class2
== X86_64_NO_CLASS
)
248 /* Rule (c): If one of the classes is MEMORY, the result is MEMORY. */
249 if (class1
== X86_64_MEMORY_CLASS
|| class2
== X86_64_MEMORY_CLASS
)
250 return X86_64_MEMORY_CLASS
;
252 /* Rule (d): If one of the classes is INTEGER, the result is INTEGER. */
253 if ((class1
== X86_64_INTEGERSI_CLASS
&& class2
== X86_64_SSESF_CLASS
)
254 || (class2
== X86_64_INTEGERSI_CLASS
&& class1
== X86_64_SSESF_CLASS
))
255 return X86_64_INTEGERSI_CLASS
;
256 if (class1
== X86_64_INTEGER_CLASS
|| class1
== X86_64_INTEGERSI_CLASS
257 || class2
== X86_64_INTEGER_CLASS
|| class2
== X86_64_INTEGERSI_CLASS
)
258 return X86_64_INTEGER_CLASS
;
260 /* Rule (e): If one of the classes is X87 or X87UP class, MEMORY is
262 if (class1
== X86_64_X87_CLASS
|| class1
== X86_64_X87UP_CLASS
263 || class2
== X86_64_X87_CLASS
|| class2
== X86_64_X87UP_CLASS
)
264 return X86_64_MEMORY_CLASS
;
266 /* Rule (f): Otherwise class SSE is used. */
267 return X86_64_SSE_CLASS
;
270 /* Classify the argument type. CLASSES will be filled by the register
271 class used to pass each word of the operand. The number of words
272 is returned. In case the parameter should be passed in memory, 0
273 is returned. As a special case for zero sized containers,
274 classes[0] will be NO_CLASS and 1 is returned.
276 See the System V psABI for details. */
279 classify_argument (struct type
*type
,
280 enum x86_64_reg_class classes
[MAX_CLASSES
], int bit_offset
)
282 int bytes
= TYPE_LENGTH (type
);
283 int words
= (bytes
+ 8 - 1) / 8;
285 switch (TYPE_CODE (type
))
287 case TYPE_CODE_ARRAY
:
288 case TYPE_CODE_STRUCT
:
289 case TYPE_CODE_UNION
:
292 enum x86_64_reg_class subclasses
[MAX_CLASSES
];
294 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
298 for (i
= 0; i
< words
; i
++)
299 classes
[i
] = X86_64_NO_CLASS
;
301 /* Zero sized arrays or structures are NO_CLASS. We return 0
302 to signalize memory class, so handle it as special case. */
305 classes
[0] = X86_64_NO_CLASS
;
308 switch (TYPE_CODE (type
))
310 case TYPE_CODE_STRUCT
:
313 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
315 int num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
317 (TYPE_FIELDS (type
)[j
].loc
.
318 bitpos
+ bit_offset
) % 256);
321 for (i
= 0; i
< num
; i
++)
324 (TYPE_FIELDS (type
)[j
].loc
.bitpos
+
327 merge_classes (subclasses
[i
], classes
[i
+ pos
]);
332 case TYPE_CODE_ARRAY
:
336 num
= classify_argument (TYPE_TARGET_TYPE (type
),
337 subclasses
, bit_offset
);
341 /* The partial classes are now full classes. */
342 if (subclasses
[0] == X86_64_SSESF_CLASS
&& bytes
!= 4)
343 subclasses
[0] = X86_64_SSE_CLASS
;
344 if (subclasses
[0] == X86_64_INTEGERSI_CLASS
&& bytes
!= 4)
345 subclasses
[0] = X86_64_INTEGER_CLASS
;
347 for (i
= 0; i
< words
; i
++)
348 classes
[i
] = subclasses
[i
% num
];
351 case TYPE_CODE_UNION
:
355 for (j
= 0; j
< TYPE_NFIELDS (type
); ++j
)
358 num
= classify_argument (TYPE_FIELDS (type
)[j
].type
,
359 subclasses
, bit_offset
);
362 for (i
= 0; i
< num
; i
++)
363 classes
[i
] = merge_classes (subclasses
[i
], classes
[i
]);
371 /* Final merger cleanup. */
372 for (i
= 0; i
< words
; i
++)
374 /* If one class is MEMORY, everything should be passed in
376 if (classes
[i
] == X86_64_MEMORY_CLASS
)
379 /* The X86_64_SSEUP_CLASS should be always preceeded by
381 if (classes
[i
] == X86_64_SSEUP_CLASS
382 && (i
== 0 || classes
[i
- 1] != X86_64_SSE_CLASS
))
383 classes
[i
] = X86_64_SSE_CLASS
;
385 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
386 if (classes
[i
] == X86_64_X87UP_CLASS
387 && (i
== 0 || classes
[i
- 1] != X86_64_X87_CLASS
))
388 classes
[i
] = X86_64_SSE_CLASS
;
397 if (!(bit_offset
% 64))
398 classes
[0] = X86_64_SSESF_CLASS
;
400 classes
[0] = X86_64_SSE_CLASS
;
403 classes
[0] = X86_64_SSEDF_CLASS
;
406 classes
[0] = X86_64_X87_CLASS
;
407 classes
[1] = X86_64_X87UP_CLASS
;
421 if (bytes
* 8 + bit_offset
<= 32)
422 classes
[0] = X86_64_INTEGERSI_CLASS
;
424 classes
[0] = X86_64_INTEGER_CLASS
;
427 classes
[0] = classes
[1] = X86_64_INTEGER_CLASS
;
434 default: /* Avoid warning. */
437 internal_error (__FILE__
, __LINE__
,
438 "classify_argument: unknown argument type");
441 /* Examine the argument and set *INT_NREGS and *SSE_NREGS to the
442 number of registers required based on the information passed in
443 CLASSES. Return 0 if parameter should be passed in memory. */
446 examine_argument (enum x86_64_reg_class classes
[MAX_CLASSES
],
447 int n
, int *int_nregs
, int *sse_nregs
)
453 for (n
--; n
>= 0; n
--)
456 case X86_64_INTEGER_CLASS
:
457 case X86_64_INTEGERSI_CLASS
:
460 case X86_64_SSE_CLASS
:
461 case X86_64_SSESF_CLASS
:
462 case X86_64_SSEDF_CLASS
:
465 case X86_64_NO_CLASS
:
466 case X86_64_SSEUP_CLASS
:
467 case X86_64_X87_CLASS
:
468 case X86_64_X87UP_CLASS
:
470 case X86_64_MEMORY_CLASS
:
471 internal_error (__FILE__
, __LINE__
,
472 "examine_argument: unexpected memory class");
477 #define RET_INT_REGS 2
478 #define RET_SSE_REGS 2
480 /* Check if the structure in value_type is returned in registers or in
481 memory. If this function returns 1, GDB will call
482 STORE_STRUCT_RETURN and EXTRACT_STRUCT_VALUE_ADDRESS else
483 STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE will be used. */
486 x86_64_use_struct_convention (int gcc_p
, struct type
*value_type
)
488 enum x86_64_reg_class
class[MAX_CLASSES
];
489 int n
= classify_argument (value_type
, class, 0);
494 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
495 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
);
498 /* Extract from an array REGBUF containing the (raw) register state, a
499 function return value of TYPE, and copy that, in virtual format,
503 x86_64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
506 enum x86_64_reg_class
class[MAX_CLASSES
];
507 int n
= classify_argument (type
, class, 0);
513 int ret_int_r
[RET_INT_REGS
] = { X86_64_RAX_REGNUM
, X86_64_RDX_REGNUM
};
514 int ret_sse_r
[RET_SSE_REGS
] = { X86_64_XMM0_REGNUM
, X86_64_XMM1_REGNUM
};
517 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
) ||
518 needed_intregs
> RET_INT_REGS
|| needed_sseregs
> RET_SSE_REGS
)
521 regcache_cooked_read (regcache
, X86_64_RAX_REGNUM
, &addr
);
522 read_memory (addr
, valbuf
, TYPE_LENGTH (type
));
528 for (i
= 0; i
< n
; i
++)
532 case X86_64_NO_CLASS
:
534 case X86_64_INTEGER_CLASS
:
535 regcache_cooked_read (regcache
, ret_int_r
[(intreg
+ 1) / 2],
536 (char *) valbuf
+ offset
);
540 case X86_64_INTEGERSI_CLASS
:
541 regcache_cooked_read_part (regcache
, ret_int_r
[intreg
/ 2],
542 0, 4, (char *) valbuf
+ offset
);
546 case X86_64_SSEDF_CLASS
:
547 case X86_64_SSESF_CLASS
:
548 case X86_64_SSE_CLASS
:
549 regcache_cooked_read_part (regcache
,
550 ret_sse_r
[(ssereg
+ 1) / 2], 0, 8,
551 (char *) valbuf
+ offset
);
555 case X86_64_SSEUP_CLASS
:
556 regcache_cooked_read_part (regcache
, ret_sse_r
[ssereg
/ 2],
557 0, 8, (char *) valbuf
+ offset
);
561 case X86_64_X87_CLASS
:
562 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
563 0, 8, (char *) valbuf
+ offset
);
566 case X86_64_X87UP_CLASS
:
567 regcache_cooked_read_part (regcache
, X86_64_ST0_REGNUM
,
568 8, 2, (char *) valbuf
+ offset
);
571 case X86_64_MEMORY_CLASS
:
573 internal_error (__FILE__
, __LINE__
,
574 "Unexpected argument class");
584 x86_64_push_arguments (struct regcache
*regcache
, int nargs
,
585 struct value
**args
, CORE_ADDR sp
)
589 /* For varargs functions we have to pass the total number of SSE
590 registers used in %rax. So, let's count this number. */
591 int total_sse_args
= 0;
592 /* Once an SSE/int argument is passed on the stack, all subsequent
593 arguments are passed there. */
599 static int int_parameter_registers
[INT_REGS
] =
601 X86_64_RDI_REGNUM
, 4, /* %rdi, %rsi */
602 X86_64_RDX_REGNUM
, 2, /* %rdx, %rcx */
606 static int sse_parameter_registers
[SSE_REGS
] =
608 X86_64_XMM0_REGNUM
+ 0, X86_64_XMM1_REGNUM
,
609 X86_64_XMM0_REGNUM
+ 2, X86_64_XMM0_REGNUM
+ 3,
610 X86_64_XMM0_REGNUM
+ 4, X86_64_XMM0_REGNUM
+ 5,
611 X86_64_XMM0_REGNUM
+ 6, X86_64_XMM0_REGNUM
+ 7,
613 int stack_values_count
= 0;
615 stack_values
= alloca (nargs
* sizeof (int));
617 for (i
= 0; i
< nargs
; i
++)
619 enum x86_64_reg_class
class[MAX_CLASSES
];
620 int n
= classify_argument (args
[i
]->type
, class, 0);
625 !examine_argument (class, n
, &needed_intregs
, &needed_sseregs
))
627 stack_values
[stack_values_count
++] = i
;
634 if (intreg
/ 2 + needed_intregs
> INT_REGS
)
636 if (ssereg
/ 2 + needed_sseregs
> SSE_REGS
)
639 total_sse_args
+= needed_sseregs
;
641 for (j
= 0; j
< n
; j
++)
645 case X86_64_NO_CLASS
:
647 case X86_64_INTEGER_CLASS
:
649 stack_values
[stack_values_count
++] = i
;
652 regcache_cooked_write
653 (regcache
, int_parameter_registers
[(intreg
+ 1) / 2],
654 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
659 case X86_64_INTEGERSI_CLASS
:
661 stack_values
[stack_values_count
++] = i
;
664 LONGEST val
= extract_signed_integer
665 (VALUE_CONTENTS_ALL (args
[i
]) + offset
, 4);
666 regcache_cooked_write_signed
667 (regcache
, int_parameter_registers
[intreg
/ 2], val
);
673 case X86_64_SSEDF_CLASS
:
674 case X86_64_SSESF_CLASS
:
675 case X86_64_SSE_CLASS
:
677 stack_values
[stack_values_count
++] = i
;
680 regcache_cooked_write
681 (regcache
, sse_parameter_registers
[(ssereg
+ 1) / 2],
682 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
687 case X86_64_SSEUP_CLASS
:
689 stack_values
[stack_values_count
++] = i
;
692 regcache_cooked_write
693 (regcache
, sse_parameter_registers
[ssereg
/ 2],
694 VALUE_CONTENTS_ALL (args
[i
]) + offset
);
699 case X86_64_X87_CLASS
:
700 case X86_64_MEMORY_CLASS
:
701 stack_values
[stack_values_count
++] = i
;
703 case X86_64_X87UP_CLASS
:
706 internal_error (__FILE__
, __LINE__
,
707 "Unexpected argument class");
709 intreg
+= intreg
% 2;
710 ssereg
+= ssereg
% 2;
715 /* We have to make sure that the stack is 16-byte aligned after the
716 setup. Let's calculate size of arguments first, align stack and
717 then fill in the arguments. */
719 for (i
= 0; i
< stack_values_count
; i
++)
721 struct value
*arg
= args
[stack_values
[i
]];
722 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg
));
723 total_sp
+= (len
+ 7) & ~7;
725 /* total_sp is now a multiple of 8, if it is not a multiple of 16,
726 change the stack pointer so that it will be afterwards correctly
731 /* Push any remaining arguments onto the stack. */
732 while (--stack_values_count
>= 0)
734 struct value
*arg
= args
[stack_values
[stack_values_count
]];
735 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg
));
737 /* Make sure the stack is 8-byte-aligned. */
738 sp
-= (len
+ 7) & ~7;
739 write_memory (sp
, VALUE_CONTENTS_ALL (arg
), len
);
742 /* Write number of SSE type arguments to RAX to take care of varargs
744 store_unsigned_integer (buf
, 8, total_sse_args
);
745 regcache_cooked_write (regcache
, X86_64_RAX_REGNUM
, buf
);
750 /* Write into the appropriate registers a function return value stored
751 in VALBUF of type TYPE, given in virtual format. */
754 x86_64_store_return_value (struct type
*type
, struct regcache
*regcache
,
757 int len
= TYPE_LENGTH (type
);
759 /* First handle long doubles. */
760 if (TYPE_CODE_FLT
== TYPE_CODE (type
) && len
== 16)
763 char buf
[FPU_REG_RAW_SIZE
];
765 /* Returning floating-point values is a bit tricky. Apart from
766 storing the return value in %st(0), we have to simulate the
767 state of the FPU at function return point. */
769 /* Convert the value found in VALBUF to the extended
770 floating-point format used by the FPU. This is probably
771 not exactly how it would happen on the target itself, but
772 it is the best we can do. */
773 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
774 regcache_raw_write (regcache
, X86_64_ST0_REGNUM
, buf
);
776 /* Set the top of the floating-point register stack to 7. The
777 actual value doesn't really matter, but 7 is what a normal
778 function return would end up with if the program started out
779 with a freshly initialized FPU. */
780 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
782 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
784 /* Mark %st(1) through %st(7) as empty. Since we set the top of
785 the floating-point register stack to 7, the appropriate value
786 for the tag word is 0x3fff. */
787 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
789 else if (TYPE_CODE_FLT
== TYPE_CODE (type
))
791 /* Handle double and float variables. */
792 regcache_cooked_write_part (regcache
, X86_64_XMM0_REGNUM
,
795 /* XXX: What about complex floating point types? */
798 int low_size
= REGISTER_RAW_SIZE (0);
799 int high_size
= REGISTER_RAW_SIZE (1);
802 regcache_cooked_write_part (regcache
, 0, 0, len
, valbuf
);
803 else if (len
<= (low_size
+ high_size
))
805 regcache_cooked_write_part (regcache
, 0, 0, low_size
, valbuf
);
806 regcache_cooked_write_part (regcache
, 1, 0,
808 (const char *) valbuf
+ low_size
);
811 internal_error (__FILE__
, __LINE__
,
812 "Cannot store return value of %d bytes long.", len
);
818 x86_64_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
819 struct regcache
*regcache
, CORE_ADDR bp_addr
,
820 int nargs
, struct value
**args
, CORE_ADDR sp
,
821 int struct_return
, CORE_ADDR struct_addr
)
825 /* Pass arguments. */
826 sp
= x86_64_push_arguments (regcache
, nargs
, args
, sp
);
828 /* Pass "hidden" argument". */
831 store_unsigned_integer (buf
, 8, struct_addr
);
832 regcache_cooked_write (regcache
, X86_64_RDI_REGNUM
, buf
);
835 /* Store return address. */
837 store_unsigned_integer (buf
, 8, bp_addr
);
838 write_memory (sp
, buf
, 8);
840 /* Finally, update the stack pointer... */
841 store_unsigned_integer (buf
, 8, sp
);
842 regcache_cooked_write (regcache
, X86_64_RSP_REGNUM
, buf
);
844 /* ...and fake a frame pointer. */
845 regcache_cooked_write (regcache
, X86_64_RBP_REGNUM
, buf
);
851 /* The maximum number of saved registers. This should include %rip. */
852 #define X86_64_NUM_SAVED_REGS X86_64_NUM_GREGS
854 struct x86_64_frame_cache
861 /* Saved registers. */
862 CORE_ADDR saved_regs
[X86_64_NUM_SAVED_REGS
];
865 /* Do we have a frame? */
869 /* Allocate and initialize a frame cache. */
871 static struct x86_64_frame_cache
*
872 x86_64_alloc_frame_cache (void)
874 struct x86_64_frame_cache
*cache
;
877 cache
= FRAME_OBSTACK_ZALLOC (struct x86_64_frame_cache
);
881 cache
->sp_offset
= -8;
884 /* Saved registers. We initialize these to -1 since zero is a valid
885 offset (that's where %rbp is supposed to be stored). */
886 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
887 cache
->saved_regs
[i
] = -1;
890 /* Frameless until proven otherwise. */
891 cache
->frameless_p
= 1;
896 /* Do a limited analysis of the prologue at PC and update CACHE
897 accordingly. Bail out early if CURRENT_PC is reached. Return the
898 address where the analysis stopped.
900 We will handle only functions beginning with:
903 movq %rsp, %rbp 0x48 0x89 0xe5
905 Any function that doesn't start with this sequence will be assumed
906 to have no prologue and thus no valid frame pointer in %rbp. */
909 x86_64_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
910 struct x86_64_frame_cache
*cache
)
912 static unsigned char proto
[3] = { 0x48, 0x89, 0xe5 };
913 unsigned char buf
[3];
916 if (current_pc
<= pc
)
919 op
= read_memory_unsigned_integer (pc
, 1);
921 if (op
== 0x55) /* pushq %rbp */
923 /* Take into account that we've executed the `pushq %rbp' that
924 starts this instruction sequence. */
925 cache
->saved_regs
[X86_64_RBP_REGNUM
] = 0;
926 cache
->sp_offset
+= 8;
928 /* If that's all, return now. */
929 if (current_pc
<= pc
+ 1)
932 /* Check for `movq %rsp, %rbp'. */
933 read_memory (pc
+ 1, buf
, 3);
934 if (memcmp (buf
, proto
, 3) != 0)
937 /* OK, we actually have a frame. */
938 cache
->frameless_p
= 0;
945 /* Return PC of first real instruction. */
948 x86_64_skip_prologue (CORE_ADDR start_pc
)
950 struct x86_64_frame_cache cache
;
953 pc
= x86_64_analyze_prologue (start_pc
, 0xffffffffffffffff, &cache
);
954 if (cache
.frameless_p
)
963 static struct x86_64_frame_cache
*
964 x86_64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
966 struct x86_64_frame_cache
*cache
;
973 cache
= x86_64_alloc_frame_cache ();
976 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
977 cache
->base
= extract_unsigned_integer (buf
, 8);
978 if (cache
->base
== 0)
981 /* For normal frames, %rip is stored at 8(%rbp). */
982 cache
->saved_regs
[X86_64_RIP_REGNUM
] = 8;
984 cache
->pc
= frame_func_unwind (next_frame
);
986 x86_64_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
988 if (cache
->frameless_p
)
990 /* We didn't find a valid frame, which means that CACHE->base
991 currently holds the frame pointer for our calling frame. If
992 we're at the start of a function, or somewhere half-way its
993 prologue, the function's frame probably hasn't been fully
994 setup yet. Try to reconstruct the base address for the stack
995 frame by looking at the stack pointer. For truly "frameless"
996 functions this might work too. */
998 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
999 cache
->base
= extract_unsigned_integer (buf
, 8) + cache
->sp_offset
;
1002 /* Now that we have the base address for the stack frame we can
1003 calculate the value of %rsp in the calling frame. */
1004 cache
->saved_sp
= cache
->base
+ 16;
1006 /* Adjust all the saved registers such that they contain addresses
1007 instead of offsets. */
1008 for (i
= 0; i
< X86_64_NUM_SAVED_REGS
; i
++)
1009 if (cache
->saved_regs
[i
] != -1)
1010 cache
->saved_regs
[i
] += cache
->base
;
1016 x86_64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1017 struct frame_id
*this_id
)
1019 struct x86_64_frame_cache
*cache
=
1020 x86_64_frame_cache (next_frame
, this_cache
);
1022 /* This marks the outermost frame. */
1023 if (cache
->base
== 0)
1026 (*this_id
) = frame_id_build (cache
->base
+ 16, cache
->pc
);
1030 x86_64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1031 int regnum
, int *optimizedp
,
1032 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1033 int *realnump
, void *valuep
)
1035 struct x86_64_frame_cache
*cache
=
1036 x86_64_frame_cache (next_frame
, this_cache
);
1038 gdb_assert (regnum
>= 0);
1040 if (regnum
== SP_REGNUM
&& cache
->saved_sp
)
1048 /* Store the value. */
1049 store_unsigned_integer (valuep
, 8, cache
->saved_sp
);
1054 if (regnum
< X86_64_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
1057 *lvalp
= lval_memory
;
1058 *addrp
= cache
->saved_regs
[regnum
];
1062 /* Read the value in from memory. */
1063 read_memory (*addrp
, valuep
,
1064 register_size (current_gdbarch
, regnum
));
1069 frame_register_unwind (next_frame
, regnum
,
1070 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1073 static const struct frame_unwind x86_64_frame_unwind
=
1076 x86_64_frame_this_id
,
1077 x86_64_frame_prev_register
1080 static const struct frame_unwind
*
1081 x86_64_frame_sniffer (struct frame_info
*next_frame
)
1083 return &x86_64_frame_unwind
;
1087 /* Signal trampolines. */
1089 /* FIXME: kettenis/20030419: Perhaps, we can unify the 32-bit and
1090 64-bit variants. This would require using identical frame caches
1091 on both platforms. */
1093 static struct x86_64_frame_cache
*
1094 x86_64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1096 struct x86_64_frame_cache
*cache
;
1097 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1105 cache
= x86_64_alloc_frame_cache ();
1107 frame_unwind_register (next_frame
, X86_64_RSP_REGNUM
, buf
);
1108 cache
->base
= extract_unsigned_integer (buf
, 8) - 8;
1110 addr
= tdep
->sigcontext_addr (next_frame
);
1111 gdb_assert (tdep
->sc_reg_offset
);
1112 gdb_assert (tdep
->sc_num_regs
<= X86_64_NUM_SAVED_REGS
);
1113 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1114 if (tdep
->sc_reg_offset
[i
] != -1)
1115 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1117 *this_cache
= cache
;
1122 x86_64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1123 void **this_cache
, struct frame_id
*this_id
)
1125 struct x86_64_frame_cache
*cache
=
1126 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1128 (*this_id
) = frame_id_build (cache
->base
+ 16, frame_pc_unwind (next_frame
));
1132 x86_64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1134 int regnum
, int *optimizedp
,
1135 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1136 int *realnump
, void *valuep
)
1138 /* Make sure we've initialized the cache. */
1139 x86_64_sigtramp_frame_cache (next_frame
, this_cache
);
1141 x86_64_frame_prev_register (next_frame
, this_cache
, regnum
,
1142 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1145 static const struct frame_unwind x86_64_sigtramp_frame_unwind
=
1148 x86_64_sigtramp_frame_this_id
,
1149 x86_64_sigtramp_frame_prev_register
1152 static const struct frame_unwind
*
1153 x86_64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1155 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1158 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1159 if (PC_IN_SIGTRAMP (pc
, name
))
1161 gdb_assert (gdbarch_tdep (current_gdbarch
)->sigcontext_addr
);
1163 return &x86_64_sigtramp_frame_unwind
;
1171 x86_64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1173 struct x86_64_frame_cache
*cache
=
1174 x86_64_frame_cache (next_frame
, this_cache
);
1179 static const struct frame_base x86_64_frame_base
=
1181 &x86_64_frame_unwind
,
1182 x86_64_frame_base_address
,
1183 x86_64_frame_base_address
,
1184 x86_64_frame_base_address
1187 static struct frame_id
1188 x86_64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1193 frame_unwind_register (next_frame
, X86_64_RBP_REGNUM
, buf
);
1194 fp
= extract_unsigned_integer (buf
, 8);
1196 return frame_id_build (fp
+ 16, frame_pc_unwind (next_frame
));
1199 /* 16 byte align the SP per frame requirements. */
1202 x86_64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1204 return sp
& -(CORE_ADDR
)16;
1208 x86_64_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1210 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1212 /* The x86-64 has 16 SSE registers. */
1213 tdep
->num_xmm_regs
= 16;
1215 /* This is what all the fuss is about. */
1216 set_gdbarch_long_bit (gdbarch
, 64);
1217 set_gdbarch_long_long_bit (gdbarch
, 64);
1218 set_gdbarch_ptr_bit (gdbarch
, 64);
1220 /* In contrast to the i386, on the x86-64 a `long double' actually
1221 takes up 128 bits, even though it's still based on the i387
1222 extended floating-point format which has only 80 significant bits. */
1223 set_gdbarch_long_double_bit (gdbarch
, 128);
1225 set_gdbarch_num_regs (gdbarch
, X86_64_NUM_REGS
);
1226 set_gdbarch_register_name (gdbarch
, x86_64_register_name
);
1227 set_gdbarch_register_type (gdbarch
, x86_64_register_type
);
1229 /* Register numbers of various important registers. */
1230 set_gdbarch_sp_regnum (gdbarch
, X86_64_RSP_REGNUM
); /* %rsp */
1231 set_gdbarch_pc_regnum (gdbarch
, X86_64_RIP_REGNUM
); /* %rip */
1232 set_gdbarch_ps_regnum (gdbarch
, X86_64_EFLAGS_REGNUM
); /* %eflags */
1233 set_gdbarch_fp0_regnum (gdbarch
, X86_64_ST0_REGNUM
); /* %st(0) */
1235 /* The "default" register numbering scheme for the x86-64 is
1236 referred to as the "DWARF Register Number Mapping" in the System
1237 V psABI. The preferred debugging format for all known x86-64
1238 targets is actually DWARF2, and GCC doesn't seem to support DWARF
1239 (that is DWARF-1), but we provide the same mapping just in case.
1240 This mapping is also used for stabs, which GCC does support. */
1241 set_gdbarch_stab_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1242 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1243 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, x86_64_dwarf_reg_to_regnum
);
1245 /* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
1246 be in use on any of the supported x86-64 targets. */
1248 /* Call dummy code. */
1249 set_gdbarch_push_dummy_call (gdbarch
, x86_64_push_dummy_call
);
1250 set_gdbarch_frame_align (gdbarch
, x86_64_frame_align
);
1251 set_gdbarch_frame_red_zone_size (gdbarch
, 128);
1253 set_gdbarch_convert_register_p (gdbarch
, x86_64_convert_register_p
);
1254 set_gdbarch_register_to_value (gdbarch
, i387_register_to_value
);
1255 set_gdbarch_value_to_register (gdbarch
, i387_value_to_register
);
1257 set_gdbarch_extract_return_value (gdbarch
, x86_64_extract_return_value
);
1258 set_gdbarch_store_return_value (gdbarch
, x86_64_store_return_value
);
1259 /* Override, since this is handled by x86_64_extract_return_value. */
1260 set_gdbarch_extract_struct_value_address (gdbarch
, NULL
);
1261 set_gdbarch_use_struct_convention (gdbarch
, x86_64_use_struct_convention
);
1263 set_gdbarch_skip_prologue (gdbarch
, x86_64_skip_prologue
);
1265 /* Avoid wiring in the MMX registers for now. */
1266 set_gdbarch_num_pseudo_regs (gdbarch
, 0);
1268 set_gdbarch_unwind_dummy_id (gdbarch
, x86_64_unwind_dummy_id
);
1270 /* FIXME: kettenis/20021026: This is ELF-specific. Fine for now,
1271 since all supported x86-64 targets are ELF, but that might change
1273 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1275 frame_unwind_append_sniffer (gdbarch
, x86_64_sigtramp_frame_sniffer
);
1276 frame_unwind_append_sniffer (gdbarch
, x86_64_frame_sniffer
);
1277 frame_base_set_default (gdbarch
, &x86_64_frame_base
);
1281 #define I387_FISEG_REGNUM FISEG_REGNUM
1282 #define I387_FOSEG_REGNUM FOSEG_REGNUM
1284 /* The 64-bit FXSAVE format differs from the 32-bit format in the
1285 sense that the instruction pointer and data pointer are simply
1286 64-bit offsets into the code segment and the data segment instead
1287 of a selector offset pair. The functions below store the upper 32
1288 bits of these pointers (instead of just the 16-bits of the segment
1291 /* Fill register REGNUM in GDB's register cache with the appropriate
1292 floating-point or SSE register value from *FXSAVE. If REGNUM is
1293 -1, do this for all registers. This function masks off any of the
1294 reserved bits in *FXSAVE. */
1297 x86_64_supply_fxsave (const char *fxsave
, int regnum
)
1299 i387_supply_fxsave (fxsave
, regnum
);
1303 if (regnum
== -1 || regnum
== I387_FISEG_REGNUM
)
1304 supply_register (I387_FISEG_REGNUM
, fxsave
+ 12);
1305 if (regnum
== -1 || regnum
== I387_FOSEG_REGNUM
)
1306 supply_register (I387_FOSEG_REGNUM
, fxsave
+ 20);
1310 /* Fill register REGNUM (if it is a floating-point or SSE register) in
1311 *FXSAVE with the value in GDB's register cache. If REGNUM is -1, do
1312 this for all registers. This function doesn't touch any of the
1313 reserved bits in *FXSAVE. */
1316 x86_64_fill_fxsave (char *fxsave
, int regnum
)
1318 i387_fill_fxsave (fxsave
, regnum
);
1320 if (regnum
== -1 || regnum
== I387_FISEG_REGNUM
)
1321 regcache_collect (I387_FISEG_REGNUM
, fxsave
+ 12);
1322 if (regnum
== -1 || regnum
== I387_FOSEG_REGNUM
)
1323 regcache_collect (I387_FOSEG_REGNUM
, fxsave
+ 20);