* x86-64-tdep.c (value.h): Delete.
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
1 /* Target-dependent code for the x86-64 for GDB, the GNU debugger.
2 Copyright 2001
3 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "inferior.h"
25 #include "gdbcore.h"
26 #include "gdbcmd.h"
27 #include "arch-utils.h"
28 #include "regcache.h"
29 #include "symfile.h"
30 #include "x86-64-tdep.h"
31 #include "dwarf2cfi.h"
32 #include "gdb_assert.h"
33
34
35 /* Register numbers of various important registers. */
36 #define RAX_REGNUM 0
37 #define RDX_REGNUM 1
38 #define RDI_REGNUM 5
39 #define EFLAGS_REGNUM 17
40 #define XMM1_REGNUM 35
41
42 /* x86_64_register_raw_size_table[i] is the number of bytes of storage in
43 GDB's register array occupied by register i. */
44 int x86_64_register_raw_size_table[X86_64_NUM_REGS] = {
45 8, 8, 8, 8,
46 8, 8, 8, 8,
47 8, 8, 8, 8,
48 8, 8, 8, 8,
49 8, 4,
50 10, 10, 10, 10,
51 10, 10, 10, 10,
52 4, 4, 4, 4,
53 4, 4, 4, 4,
54 16, 16, 16, 16,
55 16, 16, 16, 16,
56 16, 16, 16, 16,
57 16, 16, 16, 16,
58 4
59 };
60
61 /* Number of bytes of storage in the actual machine representation for
62 register REGNO. */
63 int
64 x86_64_register_raw_size (int regno)
65 {
66 return x86_64_register_raw_size_table[regno];
67 }
68
69 /* x86_64_register_byte_table[i] is the offset into the register file of the
70 start of register number i. We initialize this from
71 x86_64_register_raw_size_table. */
72 int x86_64_register_byte_table[X86_64_NUM_REGS];
73
74 /* Index within `registers' of the first byte of the space for register REGNO. */
75 int
76 x86_64_register_byte (int regno)
77 {
78 return x86_64_register_byte_table[regno];
79 }
80
81 /* Return the GDB type object for the "standard" data type of data in
82 register N. */
83 static struct type *
84 x86_64_register_virtual_type (int regno)
85 {
86 if (regno == PC_REGNUM || regno == SP_REGNUM)
87 return builtin_type_void_func_ptr;
88 if (IS_FP_REGNUM (regno))
89 return builtin_type_i387_ext;
90 if (IS_SSE_REGNUM (regno))
91 return builtin_type_v4sf;
92 if (IS_FPU_CTRL_REGNUM (regno) || regno == MXCSR_REGNUM
93 || regno == EFLAGS_REGNUM)
94 return builtin_type_int32;
95 return builtin_type_int64;
96 }
97
98 /* x86_64_register_convertible is true if register N's virtual format is
99 different from its raw format. Note that this definition assumes
100 that the host supports IEEE 32-bit floats, since it doesn't say
101 that SSE registers need conversion. Even if we can't find a
102 counterexample, this is still sloppy. */
103 int
104 x86_64_register_convertible (int regno)
105 {
106 return IS_FP_REGNUM (regno);
107 }
108
109 /* Convert data from raw format for register REGNUM in buffer FROM to
110 virtual format with type TYPE in buffer TO. In principle both
111 formats are identical except that the virtual format has two extra
112 bytes appended that aren't used. We set these to zero. */
113 void
114 x86_64_register_convert_to_virtual (int regnum, struct type *type,
115 char *from, char *to)
116 {
117 char buf[12];
118 DOUBLEST d;
119 /* We only support floating-point values. */
120 if (TYPE_CODE (type) != TYPE_CODE_FLT)
121 {
122 warning ("Cannot convert floating-point register value "
123 "to non-floating-point type.");
124 memset (to, 0, TYPE_LENGTH (type));
125 return;
126 }
127 /* First add the necessary padding. */
128 memcpy (buf, from, FPU_REG_RAW_SIZE);
129 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
130 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
131 to the extended floating-point format used by the FPU. */
132 convert_typed_floating (to, type, buf, x86_64_register_virtual_type (regnum));
133 }
134
135 /* Convert data from virtual format with type TYPE in buffer FROM to
136 raw format for register REGNUM in buffer TO. Simply omit the two
137 unused bytes. */
138
139 void
140 x86_64_register_convert_to_raw (struct type *type, int regnum,
141 char *from, char *to)
142 {
143 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT
144 && TYPE_LENGTH (type) == 12);
145 /* Simply omit the two unused bytes. */
146 memcpy (to, from, FPU_REG_RAW_SIZE);
147 }
148
149 /* This is the variable that is set with "set disassembly-flavour", and
150 its legitimate values. */
151 static const char att_flavour[] = "att";
152 static const char intel_flavour[] = "intel";
153 static const char *valid_flavours[] = {
154 att_flavour,
155 intel_flavour,
156 NULL
157 };
158 static const char *disassembly_flavour = att_flavour;
159
160 static CORE_ADDR
161 x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
162 {
163 char buf[8];
164
165 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
166
167 write_memory (sp - 8, buf, 8);
168 return sp - 8;
169 }
170
171 void
172 x86_64_pop_frame (void)
173 {
174 generic_pop_current_frame (cfi_pop_frame);
175 }
176 \f
177
178 /* The returning of values is done according to the special algorithm.
179 Some types are returned in registers an some (big structures) in memory.
180 See ABI for details.
181 */
182
183 #define MAX_CLASSES 4
184
185 enum x86_64_reg_class
186 {
187 X86_64_NO_CLASS,
188 X86_64_INTEGER_CLASS,
189 X86_64_INTEGERSI_CLASS,
190 X86_64_SSE_CLASS,
191 X86_64_SSESF_CLASS,
192 X86_64_SSEDF_CLASS,
193 X86_64_SSEUP_CLASS,
194 X86_64_X87_CLASS,
195 X86_64_X87UP_CLASS,
196 X86_64_MEMORY_CLASS
197 };
198
199 /* Return the union class of CLASS1 and CLASS2.
200 See the x86-64 ABI for details. */
201
202 static enum x86_64_reg_class
203 merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
204 {
205 /* Rule #1: If both classes are equal, this is the resulting class. */
206 if (class1 == class2)
207 return class1;
208
209 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
210 the other class. */
211 if (class1 == X86_64_NO_CLASS)
212 return class2;
213 if (class2 == X86_64_NO_CLASS)
214 return class1;
215
216 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
217 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
218 return X86_64_MEMORY_CLASS;
219
220 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
221 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
222 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
223 return X86_64_INTEGERSI_CLASS;
224 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
225 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
226 return X86_64_INTEGER_CLASS;
227
228 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
229 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
230 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
231 return X86_64_MEMORY_CLASS;
232
233 /* Rule #6: Otherwise class SSE is used. */
234 return X86_64_SSE_CLASS;
235 }
236
237
238 /* Classify the argument type.
239 CLASSES will be filled by the register class used to pass each word
240 of the operand. The number of words is returned. In case the parameter
241 should be passed in memory, 0 is returned. As a special case for zero
242 sized containers, classes[0] will be NO_CLASS and 1 is returned.
243
244 See the x86-64 PS ABI for details.
245 */
246
247 static int
248 classify_argument (struct type *type,
249 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
250 {
251 int bytes = TYPE_LENGTH (type);
252 int words = (bytes + 8 - 1) / 8;
253
254 switch (TYPE_CODE (type))
255 {
256 case TYPE_CODE_ARRAY:
257 case TYPE_CODE_STRUCT:
258 case TYPE_CODE_UNION:
259 {
260 int i;
261 enum x86_64_reg_class subclasses[MAX_CLASSES];
262
263 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
264 if (bytes > 16)
265 return 0;
266
267 for (i = 0; i < words; i++)
268 classes[i] = X86_64_NO_CLASS;
269
270 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
271 signalize memory class, so handle it as special case. */
272 if (!words)
273 {
274 classes[0] = X86_64_NO_CLASS;
275 return 1;
276 }
277 switch (TYPE_CODE (type))
278 {
279 case TYPE_CODE_STRUCT:
280 {
281 int j;
282 for (j = 0; j < type->nfields; ++j)
283 {
284 int num = classify_argument (type->fields[j].type,
285 subclasses,
286 (type->fields[j].loc.bitpos
287 + bit_offset) % 256);
288 if (!num)
289 return 0;
290 for (i = 0; i < num; i++)
291 {
292 int pos =
293 (type->fields[j].loc.bitpos + bit_offset) / 8 / 8;
294 classes[i + pos] =
295 merge_classes (subclasses[i], classes[i + pos]);
296 }
297 }
298 }
299 break;
300 case TYPE_CODE_ARRAY:
301 {
302 int num;
303
304 num = classify_argument (type->target_type,
305 subclasses, bit_offset);
306 if (!num)
307 return 0;
308
309 /* The partial classes are now full classes. */
310 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
311 subclasses[0] = X86_64_SSE_CLASS;
312 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
313 subclasses[0] = X86_64_INTEGER_CLASS;
314
315 for (i = 0; i < words; i++)
316 classes[i] = subclasses[i % num];
317 }
318 break;
319 case TYPE_CODE_UNION:
320 {
321 int j;
322 {
323 for (j = 0; j < type->nfields; ++j)
324 {
325 int num;
326 num = classify_argument (type->fields[j].type,
327 subclasses, bit_offset);
328 if (!num)
329 return 0;
330 for (i = 0; i < num; i++)
331 classes[i] = merge_classes (subclasses[i], classes[i]);
332 }
333 }
334 }
335 break;
336 }
337 /* Final merger cleanup. */
338 for (i = 0; i < words; i++)
339 {
340 /* If one class is MEMORY, everything should be passed in
341 memory. */
342 if (classes[i] == X86_64_MEMORY_CLASS)
343 return 0;
344
345 /* The X86_64_SSEUP_CLASS should be always preceeded by
346 X86_64_SSE_CLASS. */
347 if (classes[i] == X86_64_SSEUP_CLASS
348 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
349 classes[i] = X86_64_SSE_CLASS;
350
351 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
352 if (classes[i] == X86_64_X87UP_CLASS
353 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
354 classes[i] = X86_64_SSE_CLASS;
355 }
356 return words;
357 }
358 break;
359 case TYPE_CODE_FLT:
360 switch (bytes)
361 {
362 case 4:
363 if (!(bit_offset % 64))
364 classes[0] = X86_64_SSESF_CLASS;
365 else
366 classes[0] = X86_64_SSE_CLASS;
367 return 1;
368 case 8:
369 classes[0] = X86_64_SSEDF_CLASS;
370 return 1;
371 case 16:
372 classes[0] = X86_64_X87_CLASS;
373 classes[1] = X86_64_X87UP_CLASS;
374 return 2;
375 }
376 break;
377 case TYPE_CODE_INT:
378 case TYPE_CODE_PTR:
379 switch (bytes)
380 {
381 case 1:
382 case 2:
383 case 4:
384 case 8:
385 if (bytes * 8 + bit_offset <= 32)
386 classes[0] = X86_64_INTEGERSI_CLASS;
387 else
388 classes[0] = X86_64_INTEGER_CLASS;
389 return 1;
390 case 16:
391 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
392 return 2;
393 default:
394 break;
395 }
396 case TYPE_CODE_VOID:
397 return 0;
398 }
399 internal_error (__FILE__, __LINE__, "classify_argument: unknown argument type");
400 }
401
402 /* Examine the argument and return set number of register required in each
403 class. Return 0 ifif parameter should be passed in memory. */
404
405 static int
406 examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
407 int n, int *int_nregs, int *sse_nregs)
408 {
409 *int_nregs = 0;
410 *sse_nregs = 0;
411 if (!n)
412 return 0;
413 for (n--; n >= 0; n--)
414 switch (classes[n])
415 {
416 case X86_64_INTEGER_CLASS:
417 case X86_64_INTEGERSI_CLASS:
418 (*int_nregs)++;
419 break;
420 case X86_64_SSE_CLASS:
421 case X86_64_SSESF_CLASS:
422 case X86_64_SSEDF_CLASS:
423 (*sse_nregs)++;
424 break;
425 case X86_64_NO_CLASS:
426 case X86_64_SSEUP_CLASS:
427 case X86_64_X87_CLASS:
428 case X86_64_X87UP_CLASS:
429 break;
430 case X86_64_MEMORY_CLASS:
431 internal_error (__FILE__, __LINE__, "examine_argument: unexpected memory class");
432 }
433 return 1;
434 }
435
436 #define RET_INT_REGS 2
437 #define RET_SSE_REGS 2
438
439 /* Check if the structure in value_type is returned in registers or in
440 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
441 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
442 will be used. */
443 int
444 x86_64_use_struct_convention (int gcc_p, struct type *value_type)
445 {
446 enum x86_64_reg_class class[MAX_CLASSES];
447 int n = classify_argument (value_type, class, 0);
448 int needed_intregs;
449 int needed_sseregs;
450
451 return (!n ||
452 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
453 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
454 }
455
456
457 /* Extract from an array REGBUF containing the (raw) register state, a
458 function return value of TYPE, and copy that, in virtual format,
459 into VALBUF. */
460
461 void
462 x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
463 {
464 enum x86_64_reg_class class[MAX_CLASSES];
465 int n = classify_argument (type, class, 0);
466 int needed_intregs;
467 int needed_sseregs;
468 int intreg = 0;
469 int ssereg = 0;
470 int offset = 0;
471 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
472 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
473
474 if (!n ||
475 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
476 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
477 { /* memory class */
478 CORE_ADDR addr;
479 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
480 read_memory (addr, valbuf, TYPE_LENGTH (type));
481 return;
482 }
483 else
484 {
485 int i;
486 for (i = 0; i < n; i++)
487 {
488 switch (class[i])
489 {
490 case X86_64_NO_CLASS:
491 break;
492 case X86_64_INTEGER_CLASS:
493 memcpy (valbuf + offset,
494 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
495 8);
496 offset += 8;
497 intreg += 2;
498 break;
499 case X86_64_INTEGERSI_CLASS:
500 memcpy (valbuf + offset,
501 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
502 offset += 8;
503 intreg++;
504 break;
505 case X86_64_SSEDF_CLASS:
506 case X86_64_SSESF_CLASS:
507 case X86_64_SSE_CLASS:
508 memcpy (valbuf + offset,
509 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
510 8);
511 offset += 8;
512 ssereg += 2;
513 break;
514 case X86_64_SSEUP_CLASS:
515 memcpy (valbuf + offset + 8,
516 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
517 offset += 8;
518 ssereg++;
519 break;
520 case X86_64_X87_CLASS:
521 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
522 8);
523 offset += 8;
524 break;
525 case X86_64_X87UP_CLASS:
526 memcpy (valbuf + offset,
527 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
528 offset += 8;
529 break;
530 case X86_64_MEMORY_CLASS:
531 default:
532 internal_error (__FILE__, __LINE__,
533 "Unexpected argument class");
534 }
535 }
536 }
537 }
538
539 /* Handled by unwind informations. */
540 static void
541 x86_64_frame_init_saved_regs (struct frame_info *fi)
542 {
543 }
544
545 #define INT_REGS 6
546 #define SSE_REGS 16
547
548 CORE_ADDR
549 x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
550 int struct_return, CORE_ADDR struct_addr)
551 {
552 int intreg = 0;
553 int ssereg = 0;
554 int i;
555 static int int_parameter_registers[INT_REGS] = {5 /*RDI*/, 4 /*RSI*/,
556 1 /*RDX*/, 2 /*RCX*/,
557 8 /*R8 */, 9 /*R9 */};
558 /* XMM0 - XMM15 */
559 static int sse_parameter_registers[SSE_REGS] = {34, 35, 36, 37,
560 38, 39, 40, 41,
561 42, 43, 44, 45,
562 46, 47, 48, 49};
563 int stack_values_count=0;
564 int *stack_values;
565 stack_values = alloca (naregs * sizeof (int));
566 for (i = 0; i < nargs; i++)
567 {
568 enum x86_64_reg_class class[MAX_CLASSES];
569 int n = classify_argument (args[i]->type, class, 0);
570 int needed_intregs;
571 int needed_sseregs;
572
573 if (!n ||
574 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
575 || intreg / 2 + needed_intregs > INT_REGS
576 || ssereg / 2 + needed_sseregs > SSE_REGS)
577 { /* memory class */
578 stack_values[stack_values_count++]=i;
579 }
580 else
581 {
582 int j;
583 for (j = 0; j < n; j++)
584 {
585 int offset = 0;
586 switch (class[j])
587 {
588 case X86_64_NO_CLASS:
589 break;
590 case X86_64_INTEGER_CLASS:
591 write_register_gen (int_parameter_registers[(intreg + 1) / 2],
592 VALUE_CONTENTS_ALL (args[i]) + offset);
593 offset += 8;
594 intreg += 2;
595 break;
596 case X86_64_INTEGERSI_CLASS:
597 write_register_gen (int_parameter_registers[intreg / 2],
598 VALUE_CONTENTS_ALL (args[i]) + offset);
599 offset += 8;
600 intreg++;
601 break;
602 case X86_64_SSEDF_CLASS:
603 case X86_64_SSESF_CLASS:
604 case X86_64_SSE_CLASS:
605 write_register_gen (sse_parameter_registers[(ssereg + 1) / 2],
606 VALUE_CONTENTS_ALL (args[i]) + offset);
607 offset += 8;
608 ssereg += 2;
609 break;
610 case X86_64_SSEUP_CLASS:
611 write_register_gen (sse_parameter_registers[ssereg / 2],
612 VALUE_CONTENTS_ALL (args[i]) + offset);
613 offset += 8;
614 ssereg++;
615 break;
616 case X86_64_X87_CLASS:
617 case X86_64_MEMORY_CLASS:
618 stack_values[stack_values_count++]=i;
619 break;
620 case X86_64_X87UP_CLASS:
621 break;
622 default:
623 internal_error (__FILE__, __LINE__,
624 "Unexpected argument class");
625 }
626 intreg += intreg % 2;
627 ssereg += ssereg % 2;
628 }
629 }
630 }
631 while (--stack_values_count >= 0)
632 {
633 value_ptr arg = args[stack_values[stack_values_count]];
634 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
635 len += 7;
636 len -= len % 8;
637 sp -= len;
638 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
639 }
640 return sp;
641 }
642
643 /* Write into the appropriate registers a function return value stored
644 in VALBUF of type TYPE, given in virtual format. */
645 void
646 x86_64_store_return_value (struct type *type, char *valbuf)
647 {
648 int len = TYPE_LENGTH (type);
649
650 if (TYPE_CODE_FLT == TYPE_CODE (type))
651 {
652 /* Floating-point return values can be found in %st(0). */
653 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
654 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
655 {
656 /* Copy straight over. */
657 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
658 FPU_REG_RAW_SIZE);
659 }
660 else
661 {
662 char buf[FPU_REG_RAW_SIZE];
663 DOUBLEST val;
664
665 /* Convert the value found in VALBUF to the extended
666 floating point format used by the FPU. This is probably
667 not exactly how it would happen on the target itself, but
668 it is the best we can do. */
669 val = extract_floating (valbuf, TYPE_LENGTH (type));
670 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
671 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
672 FPU_REG_RAW_SIZE);
673 }
674 }
675 else
676 {
677 int low_size = REGISTER_RAW_SIZE (0);
678 int high_size = REGISTER_RAW_SIZE (1);
679
680 if (len <= low_size)
681 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
682 else if (len <= (low_size + high_size))
683 {
684 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
685 write_register_bytes (REGISTER_BYTE (1),
686 valbuf + low_size, len - low_size);
687 }
688 else
689 internal_error (__FILE__, __LINE__,
690 "Cannot store return value of %d bytes long.", len);
691 }
692 }
693 \f
694
695 static char *
696 x86_64_register_name (int reg_nr)
697 {
698 static char *register_names[] = {
699 "rax", "rdx", "rcx", "rbx",
700 "rsi", "rdi", "rbp", "rsp",
701 "r8", "r9", "r10", "r11",
702 "r12", "r13", "r14", "r15",
703 "rip", "eflags",
704 "st0", "st1", "st2", "st3",
705 "st4", "st5", "st6", "st7",
706 "fctrl", "fstat", "ftag", "fiseg",
707 "fioff", "foseg", "fooff", "fop",
708 "xmm0", "xmm1", "xmm2", "xmm3",
709 "xmm4", "xmm5", "xmm6", "xmm7",
710 "xmm8", "xmm9", "xmm10", "xmm11",
711 "xmm12", "xmm13", "xmm14", "xmm15",
712 "mxcsr"
713 };
714 if (reg_nr < 0)
715 return NULL;
716 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
717 return NULL;
718 return register_names[reg_nr];
719 }
720 \f
721
722
723 /* We have two flavours of disassembly. The machinery on this page
724 deals with switching between those. */
725
726 static int
727 gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
728 {
729 if (disassembly_flavour == att_flavour)
730 return print_insn_i386_att (memaddr, info);
731 else if (disassembly_flavour == intel_flavour)
732 return print_insn_i386_intel (memaddr, info);
733 /* Never reached -- disassembly_flavour is always either att_flavour
734 or intel_flavour. */
735 internal_error (__FILE__, __LINE__, "failed internal consistency check");
736 }
737 \f
738
739 /* Store the address of the place in which to copy the structure the
740 subroutine will return. This is called from call_function. */
741 void
742 x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
743 {
744 write_register (RDI_REGNUM, addr);
745 }
746
747 int
748 x86_64_frameless_function_invocation (struct frame_info *frame)
749 {
750 return 0;
751 }
752
753 /* On x86_64 there are no reasonable prologs. */
754 CORE_ADDR
755 x86_64_skip_prologue (CORE_ADDR pc)
756 {
757 return pc;
758 }
759
760 /* Sequence of bytes for breakpoint instruction. */
761 static unsigned char *
762 x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr)
763 {
764 static unsigned char breakpoint[] = { 0xcc };
765 *lenptr = 1;
766 return breakpoint;
767 }
768
769 static struct gdbarch *
770 i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
771 {
772 struct gdbarch *gdbarch;
773 struct gdbarch_tdep *tdep;
774
775 /* Find a candidate among the list of pre-declared architectures. */
776 for (arches = gdbarch_list_lookup_by_info (arches, &info);
777 arches != NULL;
778 arches = gdbarch_list_lookup_by_info (arches->next, &info))
779 {
780 switch (info.bfd_arch_info->mach)
781 {
782 case bfd_mach_x86_64:
783 case bfd_mach_x86_64_intel_syntax:
784 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
785 {
786 case bfd_mach_x86_64:
787 case bfd_mach_x86_64_intel_syntax:
788 return arches->gdbarch;
789 case bfd_mach_i386_i386:
790 case bfd_mach_i386_i8086:
791 case bfd_mach_i386_i386_intel_syntax:
792 break;
793 default:
794 internal_error (__FILE__, __LINE__,
795 "i386_gdbarch_init: unknown machine type");
796 }
797 break;
798 case bfd_mach_i386_i386:
799 case bfd_mach_i386_i8086:
800 case bfd_mach_i386_i386_intel_syntax:
801 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
802 {
803 case bfd_mach_x86_64:
804 case bfd_mach_x86_64_intel_syntax:
805 break;
806 case bfd_mach_i386_i386:
807 case bfd_mach_i386_i8086:
808 case bfd_mach_i386_i386_intel_syntax:
809 return arches->gdbarch;
810 default:
811 internal_error (__FILE__, __LINE__,
812 "i386_gdbarch_init: unknown machine type");
813 }
814 break;
815 default:
816 internal_error (__FILE__, __LINE__,
817 "i386_gdbarch_init: unknown machine type");
818 }
819 }
820
821 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
822 gdbarch = gdbarch_alloc (&info, tdep);
823
824 switch (info.bfd_arch_info->mach)
825 {
826 case bfd_mach_x86_64:
827 case bfd_mach_x86_64_intel_syntax:
828 tdep->num_xmm_regs = 16;
829 break;
830 case bfd_mach_i386_i386:
831 case bfd_mach_i386_i8086:
832 case bfd_mach_i386_i386_intel_syntax:
833 /* This is place for definition of i386 target vector. */
834 break;
835 default:
836 internal_error (__FILE__, __LINE__,
837 "i386_gdbarch_init: unknown machine type");
838 }
839
840 set_gdbarch_long_bit (gdbarch, 64);
841 set_gdbarch_long_long_bit (gdbarch, 64);
842 set_gdbarch_ptr_bit (gdbarch, 64);
843
844 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
845
846 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
847 set_gdbarch_register_name (gdbarch, x86_64_register_name);
848 set_gdbarch_register_size (gdbarch, 8);
849 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
850 set_gdbarch_max_register_raw_size (gdbarch, 16);
851 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
852 /* Total amount of space needed to store our copies of the machine's register
853 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
854 set_gdbarch_register_bytes (gdbarch,
855 (18 * 8) + (8 * 10) + (8 * 4) + (16 * 16 + 4));
856 set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size);
857 set_gdbarch_max_register_virtual_size (gdbarch, 16);
858
859 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
860
861 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
862 set_gdbarch_register_convert_to_virtual (gdbarch,
863 x86_64_register_convert_to_virtual);
864 set_gdbarch_register_convert_to_raw (gdbarch,
865 x86_64_register_convert_to_raw);
866
867 /* Register numbers of various important registers. */
868 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
869 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
870 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
871
872 set_gdbarch_fp0_regnum (gdbarch, 18); /* First FPU floating-point register. */
873
874 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
875 set_gdbarch_write_fp (gdbarch, cfi_write_fp);
876
877 /* Discard from the stack the innermost frame, restoring all registers. */
878 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
879
880 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
881 chain-pointer. */
882 set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
883
884 set_gdbarch_frameless_function_invocation (gdbarch,
885 x86_64_frameless_function_invocation);
886 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
887
888 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
889 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
890
891 /* Return number of bytes at start of arglist that are not really args. */
892 set_gdbarch_frame_args_skip (gdbarch, 8);
893
894 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
895
896 /* Frame pc initialization is handled by unwind informations. */
897 set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
898
899 /* Initialization of unwind informations. */
900 set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
901
902 /* Getting saved registers is handled by unwind informations. */
903 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
904
905 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
906
907 /* Cons up virtual frame pointer for trace */
908 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
909
910
911 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
912
913 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
914 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
915 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
916 set_gdbarch_call_dummy_length (gdbarch, 0);
917 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
918 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
919 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
920 set_gdbarch_call_dummy_words (gdbarch, 0);
921 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
922 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
923 set_gdbarch_call_dummy_p (gdbarch, 1);
924 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
925 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
926 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
927 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
928 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
929
930 /* Return number of args passed to a frame, no way to tell. */
931 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
932 /* Don't use default structure extract routine */
933 set_gdbarch_extract_struct_value_address (gdbarch, 0);
934
935 /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
936 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
937 the case when structure is returned in registers. */
938 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
939
940 /* Store the address of the place in which to copy the structure the
941 subroutine will return. This is called from call_function. */
942 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
943
944 /* Extract from an array REGBUF containing the (raw) register state
945 a function return value of type TYPE, and copy that, in virtual format,
946 into VALBUF. */
947 set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
948
949
950 /* Write into the appropriate registers a function return value stored
951 in VALBUF of type TYPE, given in virtual format. */
952 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
953 \f
954
955 /* Offset from address of function to start of its code. */
956 set_gdbarch_function_start_offset (gdbarch, 0);
957
958 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
959
960 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
961
962 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
963
964 set_gdbarch_breakpoint_from_pc (gdbarch, x86_64_breakpoint_from_pc);
965
966
967 /* Amount PC must be decremented by after a breakpoint. This is often the
968 number of bytes in BREAKPOINT but not always. */
969 set_gdbarch_decr_pc_after_break (gdbarch, 1);
970
971 /* Use dwarf2 debug frame informations. */
972 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
973 return gdbarch;
974 }
975
976 void
977 _initialize_x86_64_tdep (void)
978 {
979 register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init);
980
981 /* Initialize the table saying where each register starts in the
982 register file. */
983 {
984 int i, offset;
985
986 offset = 0;
987 for (i = 0; i < X86_64_NUM_REGS; i++)
988 {
989 x86_64_register_byte_table[i] = offset;
990 offset += x86_64_register_raw_size_table[i];
991 }
992 }
993
994 tm_print_insn = gdb_print_insn_x86_64;
995 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
996
997 /* Add the variable that controls the disassembly flavour. */
998 {
999 struct cmd_list_element *new_cmd;
1000
1001 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1002 valid_flavours, &disassembly_flavour, "\
1003 Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1004 and the default value is \"att\".", &setlist);
1005 add_show_from_set (new_cmd, &showlist);
1006 }
1007 }
This page took 0.051275 seconds and 5 git commands to generate.