1 /* GNU/Linux/x86-64 specific low level interface, for the remote server
3 Copyright (C) 2002-2020 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-low.h"
27 #include "gdbsupport/x86-xstate.h"
28 #include "nat/gdb_ptrace.h"
31 #include "nat/amd64-linux-siginfo.h"
34 #include "gdb_proc_service.h"
35 /* Don't include elf/common.h if linux/elf.h got included by
36 gdb_proc_service.h. */
38 #include "elf/common.h"
41 #include "gdbsupport/agent.h"
43 #include "tracepoint.h"
45 #include "nat/linux-nat.h"
46 #include "nat/x86-linux.h"
47 #include "nat/x86-linux-dregs.h"
48 #include "linux-x86-tdesc.h"
51 static struct target_desc
*tdesc_amd64_linux_no_xml
;
53 static struct target_desc
*tdesc_i386_linux_no_xml
;
56 static unsigned char jump_insn
[] = { 0xe9, 0, 0, 0, 0 };
57 static unsigned char small_jump_insn
[] = { 0x66, 0xe9, 0, 0 };
59 /* Backward compatibility for gdb without XML support. */
61 static const char *xmltarget_i386_linux_no_xml
= "@<target>\
62 <architecture>i386</architecture>\
63 <osabi>GNU/Linux</osabi>\
67 static const char *xmltarget_amd64_linux_no_xml
= "@<target>\
68 <architecture>i386:x86-64</architecture>\
69 <osabi>GNU/Linux</osabi>\
74 #include <sys/procfs.h>
77 #ifndef PTRACE_GET_THREAD_AREA
78 #define PTRACE_GET_THREAD_AREA 25
81 /* This definition comes from prctl.h, but some kernels may not have it. */
82 #ifndef PTRACE_ARCH_PRCTL
83 #define PTRACE_ARCH_PRCTL 30
86 /* The following definitions come from prctl.h, but may be absent
87 for certain configurations. */
89 #define ARCH_SET_GS 0x1001
90 #define ARCH_SET_FS 0x1002
91 #define ARCH_GET_FS 0x1003
92 #define ARCH_GET_GS 0x1004
95 /* Linux target op definitions for the x86 architecture.
96 This is initialized assuming an amd64 target.
97 'low_arch_setup' will correct it for i386 or amd64 targets. */
99 class x86_target
: public linux_process_target
105 /* The singleton target ops object. */
107 static x86_target the_x86_target
;
109 /* Per-process arch-specific data we want to keep. */
111 struct arch_process_info
113 struct x86_debug_reg_state debug_reg_state
;
118 /* Mapping between the general-purpose registers in `struct user'
119 format and GDB's register array layout.
120 Note that the transfer layout uses 64-bit regs. */
121 static /*const*/ int i386_regmap
[] =
123 RAX
* 8, RCX
* 8, RDX
* 8, RBX
* 8,
124 RSP
* 8, RBP
* 8, RSI
* 8, RDI
* 8,
125 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
126 DS
* 8, ES
* 8, FS
* 8, GS
* 8
129 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
131 /* So code below doesn't have to care, i386 or amd64. */
132 #define ORIG_EAX ORIG_RAX
135 static const int x86_64_regmap
[] =
137 RAX
* 8, RBX
* 8, RCX
* 8, RDX
* 8,
138 RSI
* 8, RDI
* 8, RBP
* 8, RSP
* 8,
139 R8
* 8, R9
* 8, R10
* 8, R11
* 8,
140 R12
* 8, R13
* 8, R14
* 8, R15
* 8,
141 RIP
* 8, EFLAGS
* 8, CS
* 8, SS
* 8,
142 DS
* 8, ES
* 8, FS
* 8, GS
* 8,
143 -1, -1, -1, -1, -1, -1, -1, -1,
144 -1, -1, -1, -1, -1, -1, -1, -1,
145 -1, -1, -1, -1, -1, -1, -1, -1,
147 -1, -1, -1, -1, -1, -1, -1, -1,
149 #ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
154 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
155 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
156 -1, -1, -1, -1, -1, -1, -1, -1, /* xmm16 ... xmm31 (AVX512) */
157 -1, -1, -1, -1, -1, -1, -1, -1,
158 -1, -1, -1, -1, -1, -1, -1, -1, /* ymm16 ... ymm31 (AVX512) */
159 -1, -1, -1, -1, -1, -1, -1, -1,
160 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
161 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm31 (AVX512) */
162 -1, -1, -1, -1, -1, -1, -1, -1,
163 -1, -1, -1, -1, -1, -1, -1, -1,
164 -1, -1, -1, -1, -1, -1, -1, -1,
168 #define X86_64_NUM_REGS (sizeof (x86_64_regmap) / sizeof (x86_64_regmap[0]))
169 #define X86_64_USER_REGS (GS + 1)
171 #else /* ! __x86_64__ */
173 /* Mapping between the general-purpose registers in `struct user'
174 format and GDB's register array layout. */
175 static /*const*/ int i386_regmap
[] =
177 EAX
* 4, ECX
* 4, EDX
* 4, EBX
* 4,
178 UESP
* 4, EBP
* 4, ESI
* 4, EDI
* 4,
179 EIP
* 4, EFL
* 4, CS
* 4, SS
* 4,
180 DS
* 4, ES
* 4, FS
* 4, GS
* 4
183 #define I386_NUM_REGS (sizeof (i386_regmap) / sizeof (i386_regmap[0]))
191 /* Returns true if the current inferior belongs to a x86-64 process,
195 is_64bit_tdesc (void)
197 struct regcache
*regcache
= get_thread_regcache (current_thread
, 0);
199 return register_size (regcache
->tdesc
, 0) == 8;
205 /* Called by libthread_db. */
208 ps_get_thread_area (struct ps_prochandle
*ph
,
209 lwpid_t lwpid
, int idx
, void **base
)
212 int use_64bit
= is_64bit_tdesc ();
219 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_FS
) == 0)
223 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, base
, ARCH_GET_GS
) == 0)
234 unsigned int desc
[4];
236 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
,
237 (void *) (intptr_t) idx
, (unsigned long) &desc
) < 0)
240 /* Ensure we properly extend the value to 64-bits for x86_64. */
241 *base
= (void *) (uintptr_t) desc
[1];
246 /* Get the thread area address. This is used to recognize which
247 thread is which when tracing with the in-process agent library. We
248 don't read anything from the address, and treat it as opaque; it's
249 the address itself that we assume is unique per-thread. */
252 x86_get_thread_area (int lwpid
, CORE_ADDR
*addr
)
255 int use_64bit
= is_64bit_tdesc ();
260 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
262 *addr
= (CORE_ADDR
) (uintptr_t) base
;
271 struct lwp_info
*lwp
= find_lwp_pid (ptid_t (lwpid
));
272 struct thread_info
*thr
= get_lwp_thread (lwp
);
273 struct regcache
*regcache
= get_thread_regcache (thr
, 1);
274 unsigned int desc
[4];
276 const int reg_thread_area
= 3; /* bits to scale down register value. */
279 collect_register_by_name (regcache
, "gs", &gs
);
281 idx
= gs
>> reg_thread_area
;
283 if (ptrace (PTRACE_GET_THREAD_AREA
,
285 (void *) (long) idx
, (unsigned long) &desc
) < 0)
296 x86_cannot_store_register (int regno
)
299 if (is_64bit_tdesc ())
303 return regno
>= I386_NUM_REGS
;
307 x86_cannot_fetch_register (int regno
)
310 if (is_64bit_tdesc ())
314 return regno
>= I386_NUM_REGS
;
318 x86_fill_gregset (struct regcache
*regcache
, void *buf
)
323 if (register_size (regcache
->tdesc
, 0) == 8)
325 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
326 if (x86_64_regmap
[i
] != -1)
327 collect_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
329 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
332 int lwpid
= lwpid_of (current_thread
);
334 collect_register_by_name (regcache
, "fs_base", &base
);
335 ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_SET_FS
);
337 collect_register_by_name (regcache
, "gs_base", &base
);
338 ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_SET_GS
);
345 /* 32-bit inferior registers need to be zero-extended.
346 Callers would read uninitialized memory otherwise. */
347 memset (buf
, 0x00, X86_64_USER_REGS
* 8);
350 for (i
= 0; i
< I386_NUM_REGS
; i
++)
351 collect_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
353 collect_register_by_name (regcache
, "orig_eax",
354 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
357 /* Sign extend EAX value to avoid potential syscall restart
360 See amd64_linux_collect_native_gregset() in gdb/amd64-linux-nat.c
361 for a detailed explanation. */
362 if (register_size (regcache
->tdesc
, 0) == 4)
364 void *ptr
= ((gdb_byte
*) buf
365 + i386_regmap
[find_regno (regcache
->tdesc
, "eax")]);
367 *(int64_t *) ptr
= *(int32_t *) ptr
;
373 x86_store_gregset (struct regcache
*regcache
, const void *buf
)
378 if (register_size (regcache
->tdesc
, 0) == 8)
380 for (i
= 0; i
< X86_64_NUM_REGS
; i
++)
381 if (x86_64_regmap
[i
] != -1)
382 supply_register (regcache
, i
, ((char *) buf
) + x86_64_regmap
[i
]);
384 #ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
387 int lwpid
= lwpid_of (current_thread
);
389 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_FS
) == 0)
390 supply_register_by_name (regcache
, "fs_base", &base
);
392 if (ptrace (PTRACE_ARCH_PRCTL
, lwpid
, &base
, ARCH_GET_GS
) == 0)
393 supply_register_by_name (regcache
, "gs_base", &base
);
400 for (i
= 0; i
< I386_NUM_REGS
; i
++)
401 supply_register (regcache
, i
, ((char *) buf
) + i386_regmap
[i
]);
403 supply_register_by_name (regcache
, "orig_eax",
404 ((char *) buf
) + ORIG_EAX
* REGSIZE
);
408 x86_fill_fpregset (struct regcache
*regcache
, void *buf
)
411 i387_cache_to_fxsave (regcache
, buf
);
413 i387_cache_to_fsave (regcache
, buf
);
418 x86_store_fpregset (struct regcache
*regcache
, const void *buf
)
421 i387_fxsave_to_cache (regcache
, buf
);
423 i387_fsave_to_cache (regcache
, buf
);
430 x86_fill_fpxregset (struct regcache
*regcache
, void *buf
)
432 i387_cache_to_fxsave (regcache
, buf
);
436 x86_store_fpxregset (struct regcache
*regcache
, const void *buf
)
438 i387_fxsave_to_cache (regcache
, buf
);
444 x86_fill_xstateregset (struct regcache
*regcache
, void *buf
)
446 i387_cache_to_xsave (regcache
, buf
);
450 x86_store_xstateregset (struct regcache
*regcache
, const void *buf
)
452 i387_xsave_to_cache (regcache
, buf
);
455 /* ??? The non-biarch i386 case stores all the i387 regs twice.
456 Once in i387_.*fsave.* and once in i387_.*fxsave.*.
457 This is, presumably, to handle the case where PTRACE_[GS]ETFPXREGS
458 doesn't work. IWBN to avoid the duplication in the case where it
459 does work. Maybe the arch_setup routine could check whether it works
460 and update the supported regsets accordingly. */
462 static struct regset_info x86_regsets
[] =
464 #ifdef HAVE_PTRACE_GETREGS
465 { PTRACE_GETREGS
, PTRACE_SETREGS
, 0, sizeof (elf_gregset_t
),
467 x86_fill_gregset
, x86_store_gregset
},
468 { PTRACE_GETREGSET
, PTRACE_SETREGSET
, NT_X86_XSTATE
, 0,
469 EXTENDED_REGS
, x86_fill_xstateregset
, x86_store_xstateregset
},
471 # ifdef HAVE_PTRACE_GETFPXREGS
472 { PTRACE_GETFPXREGS
, PTRACE_SETFPXREGS
, 0, sizeof (elf_fpxregset_t
),
474 x86_fill_fpxregset
, x86_store_fpxregset
},
477 { PTRACE_GETFPREGS
, PTRACE_SETFPREGS
, 0, sizeof (elf_fpregset_t
),
479 x86_fill_fpregset
, x86_store_fpregset
},
480 #endif /* HAVE_PTRACE_GETREGS */
485 x86_get_pc (struct regcache
*regcache
)
487 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
493 collect_register_by_name (regcache
, "rip", &pc
);
494 return (CORE_ADDR
) pc
;
500 collect_register_by_name (regcache
, "eip", &pc
);
501 return (CORE_ADDR
) pc
;
506 x86_set_pc (struct regcache
*regcache
, CORE_ADDR pc
)
508 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
514 supply_register_by_name (regcache
, "rip", &newpc
);
520 supply_register_by_name (regcache
, "eip", &newpc
);
524 static const gdb_byte x86_breakpoint
[] = { 0xCC };
525 #define x86_breakpoint_len 1
528 x86_breakpoint_at (CORE_ADDR pc
)
532 the_target
->read_memory (pc
, &c
, 1);
539 /* Low-level function vector. */
540 struct x86_dr_low_type x86_dr_low
=
542 x86_linux_dr_set_control
,
543 x86_linux_dr_set_addr
,
544 x86_linux_dr_get_addr
,
545 x86_linux_dr_get_status
,
546 x86_linux_dr_get_control
,
550 /* Breakpoint/Watchpoint support. */
553 x86_supports_z_point_type (char z_type
)
559 case Z_PACKET_WRITE_WP
:
560 case Z_PACKET_ACCESS_WP
:
568 x86_insert_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
569 int size
, struct raw_breakpoint
*bp
)
571 struct process_info
*proc
= current_process ();
575 case raw_bkpt_type_hw
:
576 case raw_bkpt_type_write_wp
:
577 case raw_bkpt_type_access_wp
:
579 enum target_hw_bp_type hw_type
580 = raw_bkpt_type_to_target_hw_bp_type (type
);
581 struct x86_debug_reg_state
*state
582 = &proc
->priv
->arch_private
->debug_reg_state
;
584 return x86_dr_insert_watchpoint (state
, hw_type
, addr
, size
);
594 x86_remove_point (enum raw_bkpt_type type
, CORE_ADDR addr
,
595 int size
, struct raw_breakpoint
*bp
)
597 struct process_info
*proc
= current_process ();
601 case raw_bkpt_type_hw
:
602 case raw_bkpt_type_write_wp
:
603 case raw_bkpt_type_access_wp
:
605 enum target_hw_bp_type hw_type
606 = raw_bkpt_type_to_target_hw_bp_type (type
);
607 struct x86_debug_reg_state
*state
608 = &proc
->priv
->arch_private
->debug_reg_state
;
610 return x86_dr_remove_watchpoint (state
, hw_type
, addr
, size
);
619 x86_stopped_by_watchpoint (void)
621 struct process_info
*proc
= current_process ();
622 return x86_dr_stopped_by_watchpoint (&proc
->priv
->arch_private
->debug_reg_state
);
626 x86_stopped_data_address (void)
628 struct process_info
*proc
= current_process ();
630 if (x86_dr_stopped_data_address (&proc
->priv
->arch_private
->debug_reg_state
,
636 /* Called when a new process is created. */
638 static struct arch_process_info
*
639 x86_linux_new_process (void)
641 struct arch_process_info
*info
= XCNEW (struct arch_process_info
);
643 x86_low_init_dregs (&info
->debug_reg_state
);
648 /* Called when a process is being deleted. */
651 x86_linux_delete_process (struct arch_process_info
*info
)
656 /* Target routine for linux_new_fork. */
659 x86_linux_new_fork (struct process_info
*parent
, struct process_info
*child
)
661 /* These are allocated by linux_add_process. */
662 gdb_assert (parent
->priv
!= NULL
663 && parent
->priv
->arch_private
!= NULL
);
664 gdb_assert (child
->priv
!= NULL
665 && child
->priv
->arch_private
!= NULL
);
667 /* Linux kernel before 2.6.33 commit
668 72f674d203cd230426437cdcf7dd6f681dad8b0d
669 will inherit hardware debug registers from parent
670 on fork/vfork/clone. Newer Linux kernels create such tasks with
671 zeroed debug registers.
673 GDB core assumes the child inherits the watchpoints/hw
674 breakpoints of the parent, and will remove them all from the
675 forked off process. Copy the debug registers mirrors into the
676 new process so that all breakpoints and watchpoints can be
677 removed together. The debug registers mirror will become zeroed
678 in the end before detaching the forked off process, thus making
679 this compatible with older Linux kernels too. */
681 *child
->priv
->arch_private
= *parent
->priv
->arch_private
;
684 /* See nat/x86-dregs.h. */
686 struct x86_debug_reg_state
*
687 x86_debug_reg_state (pid_t pid
)
689 struct process_info
*proc
= find_process_pid (pid
);
691 return &proc
->priv
->arch_private
->debug_reg_state
;
694 /* When GDBSERVER is built as a 64-bit application on linux, the
695 PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
696 debugging a 32-bit inferior with a 64-bit GDBSERVER should look the same
697 as debugging it with a 32-bit GDBSERVER, we do the 32-bit <-> 64-bit
698 conversion in-place ourselves. */
700 /* Convert a ptrace/host siginfo object, into/from the siginfo in the
701 layout of the inferiors' architecture. Returns true if any
702 conversion was done; false otherwise. If DIRECTION is 1, then copy
703 from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
707 x86_siginfo_fixup (siginfo_t
*ptrace
, gdb_byte
*inf
, int direction
)
710 unsigned int machine
;
711 int tid
= lwpid_of (current_thread
);
712 int is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
714 /* Is the inferior 32-bit? If so, then fixup the siginfo object. */
715 if (!is_64bit_tdesc ())
716 return amd64_linux_siginfo_fixup_common (ptrace
, inf
, direction
,
718 /* No fixup for native x32 GDB. */
719 else if (!is_elf64
&& sizeof (void *) == 8)
720 return amd64_linux_siginfo_fixup_common (ptrace
, inf
, direction
,
729 /* Format of XSAVE extended state is:
733 sw_usable_bytes[464..511]
734 xstate_hdr_bytes[512..575]
739 Same memory layout will be used for the coredump NT_X86_XSTATE
740 representing the XSAVE extended state registers.
742 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
743 extended state mask, which is the same as the extended control register
744 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
745 together with the mask saved in the xstate_hdr_bytes to determine what
746 states the processor/OS supports and what state, used or initialized,
747 the process/thread is in. */
748 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
750 /* Does the current host support the GETFPXREGS request? The header
751 file may or may not define it, and even if it is defined, the
752 kernel will return EIO if it's running on a pre-SSE processor. */
753 int have_ptrace_getfpxregs
=
754 #ifdef HAVE_PTRACE_GETFPXREGS
761 /* Get Linux/x86 target description from running target. */
763 static const struct target_desc
*
764 x86_linux_read_description (void)
766 unsigned int machine
;
770 static uint64_t xcr0
;
771 struct regset_info
*regset
;
773 tid
= lwpid_of (current_thread
);
775 is_elf64
= linux_pid_exe_is_elf_64_file (tid
, &machine
);
777 if (sizeof (void *) == 4)
780 error (_("Can't debug 64-bit process with 32-bit GDBserver"));
782 else if (machine
== EM_X86_64
)
783 error (_("Can't debug x86-64 process with 32-bit GDBserver"));
787 #if !defined __x86_64__ && defined HAVE_PTRACE_GETFPXREGS
788 if (machine
== EM_386
&& have_ptrace_getfpxregs
== -1)
790 elf_fpxregset_t fpxregs
;
792 if (ptrace (PTRACE_GETFPXREGS
, tid
, 0, (long) &fpxregs
) < 0)
794 have_ptrace_getfpxregs
= 0;
795 have_ptrace_getregset
= 0;
796 return i386_linux_read_description (X86_XSTATE_X87
);
799 have_ptrace_getfpxregs
= 1;
805 x86_xcr0
= X86_XSTATE_SSE_MASK
;
809 if (machine
== EM_X86_64
)
810 return tdesc_amd64_linux_no_xml
;
813 return tdesc_i386_linux_no_xml
;
816 if (have_ptrace_getregset
== -1)
818 uint64_t xstateregs
[(X86_XSTATE_SSE_SIZE
/ sizeof (uint64_t))];
821 iov
.iov_base
= xstateregs
;
822 iov
.iov_len
= sizeof (xstateregs
);
824 /* Check if PTRACE_GETREGSET works. */
825 if (ptrace (PTRACE_GETREGSET
, tid
,
826 (unsigned int) NT_X86_XSTATE
, (long) &iov
) < 0)
827 have_ptrace_getregset
= 0;
830 have_ptrace_getregset
= 1;
832 /* Get XCR0 from XSAVE extended state. */
833 xcr0
= xstateregs
[(I386_LINUX_XSAVE_XCR0_OFFSET
834 / sizeof (uint64_t))];
836 /* Use PTRACE_GETREGSET if it is available. */
837 for (regset
= x86_regsets
;
838 regset
->fill_function
!= NULL
; regset
++)
839 if (regset
->get_request
== PTRACE_GETREGSET
)
840 regset
->size
= X86_XSTATE_SIZE (xcr0
);
841 else if (regset
->type
!= GENERAL_REGS
)
846 /* Check the native XCR0 only if PTRACE_GETREGSET is available. */
847 xcr0_features
= (have_ptrace_getregset
848 && (xcr0
& X86_XSTATE_ALL_MASK
));
853 if (machine
== EM_X86_64
)
856 const target_desc
*tdesc
= NULL
;
860 tdesc
= amd64_linux_read_description (xcr0
& X86_XSTATE_ALL_MASK
,
865 tdesc
= amd64_linux_read_description (X86_XSTATE_SSE_MASK
, !is_elf64
);
871 const target_desc
*tdesc
= NULL
;
874 tdesc
= i386_linux_read_description (xcr0
& X86_XSTATE_ALL_MASK
);
877 tdesc
= i386_linux_read_description (X86_XSTATE_SSE
);
882 gdb_assert_not_reached ("failed to return tdesc");
885 /* Update all the target description of all processes; a new GDB
886 connected, and it may or not support xml target descriptions. */
889 x86_linux_update_xmltarget (void)
891 struct thread_info
*saved_thread
= current_thread
;
893 /* Before changing the register cache's internal layout, flush the
894 contents of the current valid caches back to the threads, and
895 release the current regcache objects. */
898 for_each_process ([] (process_info
*proc
) {
901 /* Look up any thread of this process. */
902 current_thread
= find_any_thread_of_pid (pid
);
904 the_low_target
.arch_setup ();
907 current_thread
= saved_thread
;
910 /* Process qSupported query, "xmlRegisters=". Update the buffer size for
914 x86_linux_process_qsupported (char **features
, int count
)
918 /* Return if gdb doesn't support XML. If gdb sends "xmlRegisters="
919 with "i386" in qSupported query, it supports x86 XML target
922 for (i
= 0; i
< count
; i
++)
924 const char *feature
= features
[i
];
926 if (startswith (feature
, "xmlRegisters="))
928 char *copy
= xstrdup (feature
+ 13);
931 for (char *p
= strtok_r (copy
, ",", &saveptr
);
933 p
= strtok_r (NULL
, ",", &saveptr
))
935 if (strcmp (p
, "i386") == 0)
945 x86_linux_update_xmltarget ();
948 /* Common for x86/x86-64. */
950 static struct regsets_info x86_regsets_info
=
952 x86_regsets
, /* regsets */
954 NULL
, /* disabled_regsets */
958 static struct regs_info amd64_linux_regs_info
=
960 NULL
, /* regset_bitmap */
961 NULL
, /* usrregs_info */
965 static struct usrregs_info i386_linux_usrregs_info
=
971 static struct regs_info i386_linux_regs_info
=
973 NULL
, /* regset_bitmap */
974 &i386_linux_usrregs_info
,
978 static const struct regs_info
*
979 x86_linux_regs_info (void)
982 if (is_64bit_tdesc ())
983 return &amd64_linux_regs_info
;
986 return &i386_linux_regs_info
;
989 /* Initialize the target description for the architecture of the
993 x86_arch_setup (void)
995 current_process ()->tdesc
= x86_linux_read_description ();
998 /* Fill *SYSNO and *SYSRET with the syscall nr trapped and the syscall return
999 code. This should only be called if LWP got a SYSCALL_SIGTRAP. */
1002 x86_get_syscall_trapinfo (struct regcache
*regcache
, int *sysno
)
1004 int use_64bit
= register_size (regcache
->tdesc
, 0) == 8;
1010 collect_register_by_name (regcache
, "orig_rax", &l_sysno
);
1011 *sysno
= (int) l_sysno
;
1014 collect_register_by_name (regcache
, "orig_eax", sysno
);
1018 x86_supports_tracepoints (void)
1024 append_insns (CORE_ADDR
*to
, size_t len
, const unsigned char *buf
)
1026 target_write_memory (*to
, buf
, len
);
1031 push_opcode (unsigned char *buf
, const char *op
)
1033 unsigned char *buf_org
= buf
;
1038 unsigned long ul
= strtoul (op
, &endptr
, 16);
1047 return buf
- buf_org
;
1052 /* Build a jump pad that saves registers and calls a collection
1053 function. Writes a jump instruction to the jump pad to
1054 JJUMPAD_INSN. The caller is responsible to write it in at the
1055 tracepoint address. */
1058 amd64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1059 CORE_ADDR collector
,
1062 CORE_ADDR
*jump_entry
,
1063 CORE_ADDR
*trampoline
,
1064 ULONGEST
*trampoline_size
,
1065 unsigned char *jjump_pad_insn
,
1066 ULONGEST
*jjump_pad_insn_size
,
1067 CORE_ADDR
*adjusted_insn_addr
,
1068 CORE_ADDR
*adjusted_insn_addr_end
,
1071 unsigned char buf
[40];
1075 CORE_ADDR buildaddr
= *jump_entry
;
1077 /* Build the jump pad. */
1079 /* First, do tracepoint data collection. Save registers. */
1081 /* Need to ensure stack pointer saved first. */
1082 buf
[i
++] = 0x54; /* push %rsp */
1083 buf
[i
++] = 0x55; /* push %rbp */
1084 buf
[i
++] = 0x57; /* push %rdi */
1085 buf
[i
++] = 0x56; /* push %rsi */
1086 buf
[i
++] = 0x52; /* push %rdx */
1087 buf
[i
++] = 0x51; /* push %rcx */
1088 buf
[i
++] = 0x53; /* push %rbx */
1089 buf
[i
++] = 0x50; /* push %rax */
1090 buf
[i
++] = 0x41; buf
[i
++] = 0x57; /* push %r15 */
1091 buf
[i
++] = 0x41; buf
[i
++] = 0x56; /* push %r14 */
1092 buf
[i
++] = 0x41; buf
[i
++] = 0x55; /* push %r13 */
1093 buf
[i
++] = 0x41; buf
[i
++] = 0x54; /* push %r12 */
1094 buf
[i
++] = 0x41; buf
[i
++] = 0x53; /* push %r11 */
1095 buf
[i
++] = 0x41; buf
[i
++] = 0x52; /* push %r10 */
1096 buf
[i
++] = 0x41; buf
[i
++] = 0x51; /* push %r9 */
1097 buf
[i
++] = 0x41; buf
[i
++] = 0x50; /* push %r8 */
1098 buf
[i
++] = 0x9c; /* pushfq */
1099 buf
[i
++] = 0x48; /* movabs <addr>,%rdi */
1101 memcpy (buf
+ i
, &tpaddr
, 8);
1103 buf
[i
++] = 0x57; /* push %rdi */
1104 append_insns (&buildaddr
, i
, buf
);
1106 /* Stack space for the collecting_t object. */
1108 i
+= push_opcode (&buf
[i
], "48 83 ec 18"); /* sub $0x18,%rsp */
1109 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov <tpoint>,%rax */
1110 memcpy (buf
+ i
, &tpoint
, 8);
1112 i
+= push_opcode (&buf
[i
], "48 89 04 24"); /* mov %rax,(%rsp) */
1113 i
+= push_opcode (&buf
[i
],
1114 "64 48 8b 04 25 00 00 00 00"); /* mov %fs:0x0,%rax */
1115 i
+= push_opcode (&buf
[i
], "48 89 44 24 08"); /* mov %rax,0x8(%rsp) */
1116 append_insns (&buildaddr
, i
, buf
);
1120 i
+= push_opcode (&buf
[i
], "48 be"); /* movl <lockaddr>,%rsi */
1121 memcpy (&buf
[i
], (void *) &lockaddr
, 8);
1123 i
+= push_opcode (&buf
[i
], "48 89 e1"); /* mov %rsp,%rcx */
1124 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1125 i
+= push_opcode (&buf
[i
], "f0 48 0f b1 0e"); /* lock cmpxchg %rcx,(%rsi) */
1126 i
+= push_opcode (&buf
[i
], "48 85 c0"); /* test %rax,%rax */
1127 i
+= push_opcode (&buf
[i
], "75 f4"); /* jne <again> */
1128 append_insns (&buildaddr
, i
, buf
);
1130 /* Set up the gdb_collect call. */
1131 /* At this point, (stack pointer + 0x18) is the base of our saved
1135 i
+= push_opcode (&buf
[i
], "48 89 e6"); /* mov %rsp,%rsi */
1136 i
+= push_opcode (&buf
[i
], "48 83 c6 18"); /* add $0x18,%rsi */
1138 /* tpoint address may be 64-bit wide. */
1139 i
+= push_opcode (&buf
[i
], "48 bf"); /* movl <addr>,%rdi */
1140 memcpy (buf
+ i
, &tpoint
, 8);
1142 append_insns (&buildaddr
, i
, buf
);
1144 /* The collector function being in the shared library, may be
1145 >31-bits away off the jump pad. */
1147 i
+= push_opcode (&buf
[i
], "48 b8"); /* mov $collector,%rax */
1148 memcpy (buf
+ i
, &collector
, 8);
1150 i
+= push_opcode (&buf
[i
], "ff d0"); /* callq *%rax */
1151 append_insns (&buildaddr
, i
, buf
);
1153 /* Clear the spin-lock. */
1155 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1156 i
+= push_opcode (&buf
[i
], "48 a3"); /* mov %rax, lockaddr */
1157 memcpy (buf
+ i
, &lockaddr
, 8);
1159 append_insns (&buildaddr
, i
, buf
);
1161 /* Remove stack that had been used for the collect_t object. */
1163 i
+= push_opcode (&buf
[i
], "48 83 c4 18"); /* add $0x18,%rsp */
1164 append_insns (&buildaddr
, i
, buf
);
1166 /* Restore register state. */
1168 buf
[i
++] = 0x48; /* add $0x8,%rsp */
1172 buf
[i
++] = 0x9d; /* popfq */
1173 buf
[i
++] = 0x41; buf
[i
++] = 0x58; /* pop %r8 */
1174 buf
[i
++] = 0x41; buf
[i
++] = 0x59; /* pop %r9 */
1175 buf
[i
++] = 0x41; buf
[i
++] = 0x5a; /* pop %r10 */
1176 buf
[i
++] = 0x41; buf
[i
++] = 0x5b; /* pop %r11 */
1177 buf
[i
++] = 0x41; buf
[i
++] = 0x5c; /* pop %r12 */
1178 buf
[i
++] = 0x41; buf
[i
++] = 0x5d; /* pop %r13 */
1179 buf
[i
++] = 0x41; buf
[i
++] = 0x5e; /* pop %r14 */
1180 buf
[i
++] = 0x41; buf
[i
++] = 0x5f; /* pop %r15 */
1181 buf
[i
++] = 0x58; /* pop %rax */
1182 buf
[i
++] = 0x5b; /* pop %rbx */
1183 buf
[i
++] = 0x59; /* pop %rcx */
1184 buf
[i
++] = 0x5a; /* pop %rdx */
1185 buf
[i
++] = 0x5e; /* pop %rsi */
1186 buf
[i
++] = 0x5f; /* pop %rdi */
1187 buf
[i
++] = 0x5d; /* pop %rbp */
1188 buf
[i
++] = 0x5c; /* pop %rsp */
1189 append_insns (&buildaddr
, i
, buf
);
1191 /* Now, adjust the original instruction to execute in the jump
1193 *adjusted_insn_addr
= buildaddr
;
1194 relocate_instruction (&buildaddr
, tpaddr
);
1195 *adjusted_insn_addr_end
= buildaddr
;
1197 /* Finally, write a jump back to the program. */
1199 loffset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1200 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1203 "E.Jump back from jump pad too far from tracepoint "
1204 "(offset 0x%" PRIx64
" > int32).", loffset
);
1208 offset
= (int) loffset
;
1209 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1210 memcpy (buf
+ 1, &offset
, 4);
1211 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1213 /* The jump pad is now built. Wire in a jump to our jump pad. This
1214 is always done last (by our caller actually), so that we can
1215 install fast tracepoints with threads running. This relies on
1216 the agent's atomic write support. */
1217 loffset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1218 if (loffset
> INT_MAX
|| loffset
< INT_MIN
)
1221 "E.Jump pad too far from tracepoint "
1222 "(offset 0x%" PRIx64
" > int32).", loffset
);
1226 offset
= (int) loffset
;
1228 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1229 memcpy (buf
+ 1, &offset
, 4);
1230 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1231 *jjump_pad_insn_size
= sizeof (jump_insn
);
1233 /* Return the end address of our pad. */
1234 *jump_entry
= buildaddr
;
1239 #endif /* __x86_64__ */
1241 /* Build a jump pad that saves registers and calls a collection
1242 function. Writes a jump instruction to the jump pad to
1243 JJUMPAD_INSN. The caller is responsible to write it in at the
1244 tracepoint address. */
1247 i386_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1248 CORE_ADDR collector
,
1251 CORE_ADDR
*jump_entry
,
1252 CORE_ADDR
*trampoline
,
1253 ULONGEST
*trampoline_size
,
1254 unsigned char *jjump_pad_insn
,
1255 ULONGEST
*jjump_pad_insn_size
,
1256 CORE_ADDR
*adjusted_insn_addr
,
1257 CORE_ADDR
*adjusted_insn_addr_end
,
1260 unsigned char buf
[0x100];
1262 CORE_ADDR buildaddr
= *jump_entry
;
1264 /* Build the jump pad. */
1266 /* First, do tracepoint data collection. Save registers. */
1268 buf
[i
++] = 0x60; /* pushad */
1269 buf
[i
++] = 0x68; /* push tpaddr aka $pc */
1270 *((int *)(buf
+ i
)) = (int) tpaddr
;
1272 buf
[i
++] = 0x9c; /* pushf */
1273 buf
[i
++] = 0x1e; /* push %ds */
1274 buf
[i
++] = 0x06; /* push %es */
1275 buf
[i
++] = 0x0f; /* push %fs */
1277 buf
[i
++] = 0x0f; /* push %gs */
1279 buf
[i
++] = 0x16; /* push %ss */
1280 buf
[i
++] = 0x0e; /* push %cs */
1281 append_insns (&buildaddr
, i
, buf
);
1283 /* Stack space for the collecting_t object. */
1285 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1287 /* Build the object. */
1288 i
+= push_opcode (&buf
[i
], "b8"); /* mov <tpoint>,%eax */
1289 memcpy (buf
+ i
, &tpoint
, 4);
1291 i
+= push_opcode (&buf
[i
], "89 04 24"); /* mov %eax,(%esp) */
1293 i
+= push_opcode (&buf
[i
], "65 a1 00 00 00 00"); /* mov %gs:0x0,%eax */
1294 i
+= push_opcode (&buf
[i
], "89 44 24 04"); /* mov %eax,0x4(%esp) */
1295 append_insns (&buildaddr
, i
, buf
);
1297 /* spin-lock. Note this is using cmpxchg, which leaves i386 behind.
1298 If we cared for it, this could be using xchg alternatively. */
1301 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1302 i
+= push_opcode (&buf
[i
], "f0 0f b1 25"); /* lock cmpxchg
1304 memcpy (&buf
[i
], (void *) &lockaddr
, 4);
1306 i
+= push_opcode (&buf
[i
], "85 c0"); /* test %eax,%eax */
1307 i
+= push_opcode (&buf
[i
], "75 f2"); /* jne <again> */
1308 append_insns (&buildaddr
, i
, buf
);
1311 /* Set up arguments to the gdb_collect call. */
1313 i
+= push_opcode (&buf
[i
], "89 e0"); /* mov %esp,%eax */
1314 i
+= push_opcode (&buf
[i
], "83 c0 08"); /* add $0x08,%eax */
1315 i
+= push_opcode (&buf
[i
], "89 44 24 fc"); /* mov %eax,-0x4(%esp) */
1316 append_insns (&buildaddr
, i
, buf
);
1319 i
+= push_opcode (&buf
[i
], "83 ec 08"); /* sub $0x8,%esp */
1320 append_insns (&buildaddr
, i
, buf
);
1323 i
+= push_opcode (&buf
[i
], "c7 04 24"); /* movl <addr>,(%esp) */
1324 memcpy (&buf
[i
], (void *) &tpoint
, 4);
1326 append_insns (&buildaddr
, i
, buf
);
1328 buf
[0] = 0xe8; /* call <reladdr> */
1329 offset
= collector
- (buildaddr
+ sizeof (jump_insn
));
1330 memcpy (buf
+ 1, &offset
, 4);
1331 append_insns (&buildaddr
, 5, buf
);
1332 /* Clean up after the call. */
1333 buf
[0] = 0x83; /* add $0x8,%esp */
1336 append_insns (&buildaddr
, 3, buf
);
1339 /* Clear the spin-lock. This would need the LOCK prefix on older
1342 i
+= push_opcode (&buf
[i
], "31 c0"); /* xor %eax,%eax */
1343 i
+= push_opcode (&buf
[i
], "a3"); /* mov %eax, lockaddr */
1344 memcpy (buf
+ i
, &lockaddr
, 4);
1346 append_insns (&buildaddr
, i
, buf
);
1349 /* Remove stack that had been used for the collect_t object. */
1351 i
+= push_opcode (&buf
[i
], "83 c4 08"); /* add $0x08,%esp */
1352 append_insns (&buildaddr
, i
, buf
);
1355 buf
[i
++] = 0x83; /* add $0x4,%esp (no pop of %cs, assume unchanged) */
1358 buf
[i
++] = 0x17; /* pop %ss */
1359 buf
[i
++] = 0x0f; /* pop %gs */
1361 buf
[i
++] = 0x0f; /* pop %fs */
1363 buf
[i
++] = 0x07; /* pop %es */
1364 buf
[i
++] = 0x1f; /* pop %ds */
1365 buf
[i
++] = 0x9d; /* popf */
1366 buf
[i
++] = 0x83; /* add $0x4,%esp (pop of tpaddr aka $pc) */
1369 buf
[i
++] = 0x61; /* popad */
1370 append_insns (&buildaddr
, i
, buf
);
1372 /* Now, adjust the original instruction to execute in the jump
1374 *adjusted_insn_addr
= buildaddr
;
1375 relocate_instruction (&buildaddr
, tpaddr
);
1376 *adjusted_insn_addr_end
= buildaddr
;
1378 /* Write the jump back to the program. */
1379 offset
= (tpaddr
+ orig_size
) - (buildaddr
+ sizeof (jump_insn
));
1380 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1381 memcpy (buf
+ 1, &offset
, 4);
1382 append_insns (&buildaddr
, sizeof (jump_insn
), buf
);
1384 /* The jump pad is now built. Wire in a jump to our jump pad. This
1385 is always done last (by our caller actually), so that we can
1386 install fast tracepoints with threads running. This relies on
1387 the agent's atomic write support. */
1390 /* Create a trampoline. */
1391 *trampoline_size
= sizeof (jump_insn
);
1392 if (!claim_trampoline_space (*trampoline_size
, trampoline
))
1394 /* No trampoline space available. */
1396 "E.Cannot allocate trampoline space needed for fast "
1397 "tracepoints on 4-byte instructions.");
1401 offset
= *jump_entry
- (*trampoline
+ sizeof (jump_insn
));
1402 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1403 memcpy (buf
+ 1, &offset
, 4);
1404 target_write_memory (*trampoline
, buf
, sizeof (jump_insn
));
1406 /* Use a 16-bit relative jump instruction to jump to the trampoline. */
1407 offset
= (*trampoline
- (tpaddr
+ sizeof (small_jump_insn
))) & 0xffff;
1408 memcpy (buf
, small_jump_insn
, sizeof (small_jump_insn
));
1409 memcpy (buf
+ 2, &offset
, 2);
1410 memcpy (jjump_pad_insn
, buf
, sizeof (small_jump_insn
));
1411 *jjump_pad_insn_size
= sizeof (small_jump_insn
);
1415 /* Else use a 32-bit relative jump instruction. */
1416 offset
= *jump_entry
- (tpaddr
+ sizeof (jump_insn
));
1417 memcpy (buf
, jump_insn
, sizeof (jump_insn
));
1418 memcpy (buf
+ 1, &offset
, 4);
1419 memcpy (jjump_pad_insn
, buf
, sizeof (jump_insn
));
1420 *jjump_pad_insn_size
= sizeof (jump_insn
);
1423 /* Return the end address of our pad. */
1424 *jump_entry
= buildaddr
;
1430 x86_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint
, CORE_ADDR tpaddr
,
1431 CORE_ADDR collector
,
1434 CORE_ADDR
*jump_entry
,
1435 CORE_ADDR
*trampoline
,
1436 ULONGEST
*trampoline_size
,
1437 unsigned char *jjump_pad_insn
,
1438 ULONGEST
*jjump_pad_insn_size
,
1439 CORE_ADDR
*adjusted_insn_addr
,
1440 CORE_ADDR
*adjusted_insn_addr_end
,
1444 if (is_64bit_tdesc ())
1445 return amd64_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1446 collector
, lockaddr
,
1447 orig_size
, jump_entry
,
1448 trampoline
, trampoline_size
,
1450 jjump_pad_insn_size
,
1452 adjusted_insn_addr_end
,
1456 return i386_install_fast_tracepoint_jump_pad (tpoint
, tpaddr
,
1457 collector
, lockaddr
,
1458 orig_size
, jump_entry
,
1459 trampoline
, trampoline_size
,
1461 jjump_pad_insn_size
,
1463 adjusted_insn_addr_end
,
1467 /* Return the minimum instruction length for fast tracepoints on x86/x86-64
1471 x86_get_min_fast_tracepoint_insn_len (void)
1473 static int warned_about_fast_tracepoints
= 0;
1476 /* On x86-64, 5-byte jump instructions with a 4-byte offset are always
1477 used for fast tracepoints. */
1478 if (is_64bit_tdesc ())
1482 if (agent_loaded_p ())
1484 char errbuf
[IPA_BUFSIZ
];
1488 /* On x86, if trampolines are available, then 4-byte jump instructions
1489 with a 2-byte offset may be used, otherwise 5-byte jump instructions
1490 with a 4-byte offset are used instead. */
1491 if (have_fast_tracepoint_trampoline_buffer (errbuf
))
1495 /* GDB has no channel to explain to user why a shorter fast
1496 tracepoint is not possible, but at least make GDBserver
1497 mention that something has gone awry. */
1498 if (!warned_about_fast_tracepoints
)
1500 warning ("4-byte fast tracepoints not available; %s", errbuf
);
1501 warned_about_fast_tracepoints
= 1;
1508 /* Indicate that the minimum length is currently unknown since the IPA
1509 has not loaded yet. */
1515 add_insns (unsigned char *start
, int len
)
1517 CORE_ADDR buildaddr
= current_insn_ptr
;
1520 debug_printf ("Adding %d bytes of insn at %s\n",
1521 len
, paddress (buildaddr
));
1523 append_insns (&buildaddr
, len
, start
);
1524 current_insn_ptr
= buildaddr
;
1527 /* Our general strategy for emitting code is to avoid specifying raw
1528 bytes whenever possible, and instead copy a block of inline asm
1529 that is embedded in the function. This is a little messy, because
1530 we need to keep the compiler from discarding what looks like dead
1531 code, plus suppress various warnings. */
1533 #define EMIT_ASM(NAME, INSNS) \
1536 extern unsigned char start_ ## NAME, end_ ## NAME; \
1537 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1538 __asm__ ("jmp end_" #NAME "\n" \
1539 "\t" "start_" #NAME ":" \
1541 "\t" "end_" #NAME ":"); \
1546 #define EMIT_ASM32(NAME,INSNS) \
1549 extern unsigned char start_ ## NAME, end_ ## NAME; \
1550 add_insns (&start_ ## NAME, &end_ ## NAME - &start_ ## NAME); \
1551 __asm__ (".code32\n" \
1552 "\t" "jmp end_" #NAME "\n" \
1553 "\t" "start_" #NAME ":\n" \
1555 "\t" "end_" #NAME ":\n" \
1561 #define EMIT_ASM32(NAME,INSNS) EMIT_ASM(NAME,INSNS)
1568 amd64_emit_prologue (void)
1570 EMIT_ASM (amd64_prologue
,
1572 "movq %rsp,%rbp\n\t"
1573 "sub $0x20,%rsp\n\t"
1574 "movq %rdi,-8(%rbp)\n\t"
1575 "movq %rsi,-16(%rbp)");
1580 amd64_emit_epilogue (void)
1582 EMIT_ASM (amd64_epilogue
,
1583 "movq -16(%rbp),%rdi\n\t"
1584 "movq %rax,(%rdi)\n\t"
1591 amd64_emit_add (void)
1593 EMIT_ASM (amd64_add
,
1594 "add (%rsp),%rax\n\t"
1595 "lea 0x8(%rsp),%rsp");
1599 amd64_emit_sub (void)
1601 EMIT_ASM (amd64_sub
,
1602 "sub %rax,(%rsp)\n\t"
1607 amd64_emit_mul (void)
1613 amd64_emit_lsh (void)
1619 amd64_emit_rsh_signed (void)
1625 amd64_emit_rsh_unsigned (void)
1631 amd64_emit_ext (int arg
)
1636 EMIT_ASM (amd64_ext_8
,
1642 EMIT_ASM (amd64_ext_16
,
1647 EMIT_ASM (amd64_ext_32
,
1656 amd64_emit_log_not (void)
1658 EMIT_ASM (amd64_log_not
,
1659 "test %rax,%rax\n\t"
1665 amd64_emit_bit_and (void)
1667 EMIT_ASM (amd64_and
,
1668 "and (%rsp),%rax\n\t"
1669 "lea 0x8(%rsp),%rsp");
1673 amd64_emit_bit_or (void)
1676 "or (%rsp),%rax\n\t"
1677 "lea 0x8(%rsp),%rsp");
1681 amd64_emit_bit_xor (void)
1683 EMIT_ASM (amd64_xor
,
1684 "xor (%rsp),%rax\n\t"
1685 "lea 0x8(%rsp),%rsp");
1689 amd64_emit_bit_not (void)
1691 EMIT_ASM (amd64_bit_not
,
1692 "xorq $0xffffffffffffffff,%rax");
1696 amd64_emit_equal (void)
1698 EMIT_ASM (amd64_equal
,
1699 "cmp %rax,(%rsp)\n\t"
1700 "je .Lamd64_equal_true\n\t"
1702 "jmp .Lamd64_equal_end\n\t"
1703 ".Lamd64_equal_true:\n\t"
1705 ".Lamd64_equal_end:\n\t"
1706 "lea 0x8(%rsp),%rsp");
1710 amd64_emit_less_signed (void)
1712 EMIT_ASM (amd64_less_signed
,
1713 "cmp %rax,(%rsp)\n\t"
1714 "jl .Lamd64_less_signed_true\n\t"
1716 "jmp .Lamd64_less_signed_end\n\t"
1717 ".Lamd64_less_signed_true:\n\t"
1719 ".Lamd64_less_signed_end:\n\t"
1720 "lea 0x8(%rsp),%rsp");
1724 amd64_emit_less_unsigned (void)
1726 EMIT_ASM (amd64_less_unsigned
,
1727 "cmp %rax,(%rsp)\n\t"
1728 "jb .Lamd64_less_unsigned_true\n\t"
1730 "jmp .Lamd64_less_unsigned_end\n\t"
1731 ".Lamd64_less_unsigned_true:\n\t"
1733 ".Lamd64_less_unsigned_end:\n\t"
1734 "lea 0x8(%rsp),%rsp");
1738 amd64_emit_ref (int size
)
1743 EMIT_ASM (amd64_ref1
,
1747 EMIT_ASM (amd64_ref2
,
1751 EMIT_ASM (amd64_ref4
,
1752 "movl (%rax),%eax");
1755 EMIT_ASM (amd64_ref8
,
1756 "movq (%rax),%rax");
1762 amd64_emit_if_goto (int *offset_p
, int *size_p
)
1764 EMIT_ASM (amd64_if_goto
,
1768 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
1776 amd64_emit_goto (int *offset_p
, int *size_p
)
1778 EMIT_ASM (amd64_goto
,
1779 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
1787 amd64_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
1789 int diff
= (to
- (from
+ size
));
1790 unsigned char buf
[sizeof (int)];
1798 memcpy (buf
, &diff
, sizeof (int));
1799 target_write_memory (from
, buf
, sizeof (int));
1803 amd64_emit_const (LONGEST num
)
1805 unsigned char buf
[16];
1807 CORE_ADDR buildaddr
= current_insn_ptr
;
1810 buf
[i
++] = 0x48; buf
[i
++] = 0xb8; /* mov $<n>,%rax */
1811 memcpy (&buf
[i
], &num
, sizeof (num
));
1813 append_insns (&buildaddr
, i
, buf
);
1814 current_insn_ptr
= buildaddr
;
1818 amd64_emit_call (CORE_ADDR fn
)
1820 unsigned char buf
[16];
1822 CORE_ADDR buildaddr
;
1825 /* The destination function being in the shared library, may be
1826 >31-bits away off the compiled code pad. */
1828 buildaddr
= current_insn_ptr
;
1830 offset64
= fn
- (buildaddr
+ 1 /* call op */ + 4 /* 32-bit offset */);
1834 if (offset64
> INT_MAX
|| offset64
< INT_MIN
)
1836 /* Offset is too large for a call. Use callq, but that requires
1837 a register, so avoid it if possible. Use r10, since it is
1838 call-clobbered, we don't have to push/pop it. */
1839 buf
[i
++] = 0x48; /* mov $fn,%r10 */
1841 memcpy (buf
+ i
, &fn
, 8);
1843 buf
[i
++] = 0xff; /* callq *%r10 */
1848 int offset32
= offset64
; /* we know we can't overflow here. */
1850 buf
[i
++] = 0xe8; /* call <reladdr> */
1851 memcpy (buf
+ i
, &offset32
, 4);
1855 append_insns (&buildaddr
, i
, buf
);
1856 current_insn_ptr
= buildaddr
;
1860 amd64_emit_reg (int reg
)
1862 unsigned char buf
[16];
1864 CORE_ADDR buildaddr
;
1866 /* Assume raw_regs is still in %rdi. */
1867 buildaddr
= current_insn_ptr
;
1869 buf
[i
++] = 0xbe; /* mov $<n>,%esi */
1870 memcpy (&buf
[i
], ®
, sizeof (reg
));
1872 append_insns (&buildaddr
, i
, buf
);
1873 current_insn_ptr
= buildaddr
;
1874 amd64_emit_call (get_raw_reg_func_addr ());
1878 amd64_emit_pop (void)
1880 EMIT_ASM (amd64_pop
,
1885 amd64_emit_stack_flush (void)
1887 EMIT_ASM (amd64_stack_flush
,
1892 amd64_emit_zero_ext (int arg
)
1897 EMIT_ASM (amd64_zero_ext_8
,
1901 EMIT_ASM (amd64_zero_ext_16
,
1902 "and $0xffff,%rax");
1905 EMIT_ASM (amd64_zero_ext_32
,
1906 "mov $0xffffffff,%rcx\n\t"
1915 amd64_emit_swap (void)
1917 EMIT_ASM (amd64_swap
,
1924 amd64_emit_stack_adjust (int n
)
1926 unsigned char buf
[16];
1928 CORE_ADDR buildaddr
= current_insn_ptr
;
1931 buf
[i
++] = 0x48; /* lea $<n>(%rsp),%rsp */
1935 /* This only handles adjustments up to 16, but we don't expect any more. */
1937 append_insns (&buildaddr
, i
, buf
);
1938 current_insn_ptr
= buildaddr
;
1941 /* FN's prototype is `LONGEST(*fn)(int)'. */
1944 amd64_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
1946 unsigned char buf
[16];
1948 CORE_ADDR buildaddr
;
1950 buildaddr
= current_insn_ptr
;
1952 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
1953 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
1955 append_insns (&buildaddr
, i
, buf
);
1956 current_insn_ptr
= buildaddr
;
1957 amd64_emit_call (fn
);
1960 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
1963 amd64_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
1965 unsigned char buf
[16];
1967 CORE_ADDR buildaddr
;
1969 buildaddr
= current_insn_ptr
;
1971 buf
[i
++] = 0xbf; /* movl $<n>,%edi */
1972 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
1974 append_insns (&buildaddr
, i
, buf
);
1975 current_insn_ptr
= buildaddr
;
1976 EMIT_ASM (amd64_void_call_2_a
,
1977 /* Save away a copy of the stack top. */
1979 /* Also pass top as the second argument. */
1981 amd64_emit_call (fn
);
1982 EMIT_ASM (amd64_void_call_2_b
,
1983 /* Restore the stack top, %rax may have been trashed. */
1988 amd64_emit_eq_goto (int *offset_p
, int *size_p
)
1991 "cmp %rax,(%rsp)\n\t"
1992 "jne .Lamd64_eq_fallthru\n\t"
1993 "lea 0x8(%rsp),%rsp\n\t"
1995 /* jmp, but don't trust the assembler to choose the right jump */
1996 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
1997 ".Lamd64_eq_fallthru:\n\t"
1998 "lea 0x8(%rsp),%rsp\n\t"
2008 amd64_emit_ne_goto (int *offset_p
, int *size_p
)
2011 "cmp %rax,(%rsp)\n\t"
2012 "je .Lamd64_ne_fallthru\n\t"
2013 "lea 0x8(%rsp),%rsp\n\t"
2015 /* jmp, but don't trust the assembler to choose the right jump */
2016 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2017 ".Lamd64_ne_fallthru:\n\t"
2018 "lea 0x8(%rsp),%rsp\n\t"
2028 amd64_emit_lt_goto (int *offset_p
, int *size_p
)
2031 "cmp %rax,(%rsp)\n\t"
2032 "jnl .Lamd64_lt_fallthru\n\t"
2033 "lea 0x8(%rsp),%rsp\n\t"
2035 /* jmp, but don't trust the assembler to choose the right jump */
2036 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2037 ".Lamd64_lt_fallthru:\n\t"
2038 "lea 0x8(%rsp),%rsp\n\t"
2048 amd64_emit_le_goto (int *offset_p
, int *size_p
)
2051 "cmp %rax,(%rsp)\n\t"
2052 "jnle .Lamd64_le_fallthru\n\t"
2053 "lea 0x8(%rsp),%rsp\n\t"
2055 /* jmp, but don't trust the assembler to choose the right jump */
2056 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2057 ".Lamd64_le_fallthru:\n\t"
2058 "lea 0x8(%rsp),%rsp\n\t"
2068 amd64_emit_gt_goto (int *offset_p
, int *size_p
)
2071 "cmp %rax,(%rsp)\n\t"
2072 "jng .Lamd64_gt_fallthru\n\t"
2073 "lea 0x8(%rsp),%rsp\n\t"
2075 /* jmp, but don't trust the assembler to choose the right jump */
2076 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2077 ".Lamd64_gt_fallthru:\n\t"
2078 "lea 0x8(%rsp),%rsp\n\t"
2088 amd64_emit_ge_goto (int *offset_p
, int *size_p
)
2091 "cmp %rax,(%rsp)\n\t"
2092 "jnge .Lamd64_ge_fallthru\n\t"
2093 ".Lamd64_ge_jump:\n\t"
2094 "lea 0x8(%rsp),%rsp\n\t"
2096 /* jmp, but don't trust the assembler to choose the right jump */
2097 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2098 ".Lamd64_ge_fallthru:\n\t"
2099 "lea 0x8(%rsp),%rsp\n\t"
2108 struct emit_ops amd64_emit_ops
=
2110 amd64_emit_prologue
,
2111 amd64_emit_epilogue
,
2116 amd64_emit_rsh_signed
,
2117 amd64_emit_rsh_unsigned
,
2125 amd64_emit_less_signed
,
2126 amd64_emit_less_unsigned
,
2130 amd64_write_goto_address
,
2135 amd64_emit_stack_flush
,
2136 amd64_emit_zero_ext
,
2138 amd64_emit_stack_adjust
,
2139 amd64_emit_int_call_1
,
2140 amd64_emit_void_call_2
,
2149 #endif /* __x86_64__ */
2152 i386_emit_prologue (void)
2154 EMIT_ASM32 (i386_prologue
,
2158 /* At this point, the raw regs base address is at 8(%ebp), and the
2159 value pointer is at 12(%ebp). */
2163 i386_emit_epilogue (void)
2165 EMIT_ASM32 (i386_epilogue
,
2166 "mov 12(%ebp),%ecx\n\t"
2167 "mov %eax,(%ecx)\n\t"
2168 "mov %ebx,0x4(%ecx)\n\t"
2176 i386_emit_add (void)
2178 EMIT_ASM32 (i386_add
,
2179 "add (%esp),%eax\n\t"
2180 "adc 0x4(%esp),%ebx\n\t"
2181 "lea 0x8(%esp),%esp");
2185 i386_emit_sub (void)
2187 EMIT_ASM32 (i386_sub
,
2188 "subl %eax,(%esp)\n\t"
2189 "sbbl %ebx,4(%esp)\n\t"
2195 i386_emit_mul (void)
2201 i386_emit_lsh (void)
2207 i386_emit_rsh_signed (void)
2213 i386_emit_rsh_unsigned (void)
2219 i386_emit_ext (int arg
)
2224 EMIT_ASM32 (i386_ext_8
,
2227 "movl %eax,%ebx\n\t"
2231 EMIT_ASM32 (i386_ext_16
,
2233 "movl %eax,%ebx\n\t"
2237 EMIT_ASM32 (i386_ext_32
,
2238 "movl %eax,%ebx\n\t"
2247 i386_emit_log_not (void)
2249 EMIT_ASM32 (i386_log_not
,
2251 "test %eax,%eax\n\t"
2258 i386_emit_bit_and (void)
2260 EMIT_ASM32 (i386_and
,
2261 "and (%esp),%eax\n\t"
2262 "and 0x4(%esp),%ebx\n\t"
2263 "lea 0x8(%esp),%esp");
2267 i386_emit_bit_or (void)
2269 EMIT_ASM32 (i386_or
,
2270 "or (%esp),%eax\n\t"
2271 "or 0x4(%esp),%ebx\n\t"
2272 "lea 0x8(%esp),%esp");
2276 i386_emit_bit_xor (void)
2278 EMIT_ASM32 (i386_xor
,
2279 "xor (%esp),%eax\n\t"
2280 "xor 0x4(%esp),%ebx\n\t"
2281 "lea 0x8(%esp),%esp");
2285 i386_emit_bit_not (void)
2287 EMIT_ASM32 (i386_bit_not
,
2288 "xor $0xffffffff,%eax\n\t"
2289 "xor $0xffffffff,%ebx\n\t");
2293 i386_emit_equal (void)
2295 EMIT_ASM32 (i386_equal
,
2296 "cmpl %ebx,4(%esp)\n\t"
2297 "jne .Li386_equal_false\n\t"
2298 "cmpl %eax,(%esp)\n\t"
2299 "je .Li386_equal_true\n\t"
2300 ".Li386_equal_false:\n\t"
2302 "jmp .Li386_equal_end\n\t"
2303 ".Li386_equal_true:\n\t"
2305 ".Li386_equal_end:\n\t"
2307 "lea 0x8(%esp),%esp");
2311 i386_emit_less_signed (void)
2313 EMIT_ASM32 (i386_less_signed
,
2314 "cmpl %ebx,4(%esp)\n\t"
2315 "jl .Li386_less_signed_true\n\t"
2316 "jne .Li386_less_signed_false\n\t"
2317 "cmpl %eax,(%esp)\n\t"
2318 "jl .Li386_less_signed_true\n\t"
2319 ".Li386_less_signed_false:\n\t"
2321 "jmp .Li386_less_signed_end\n\t"
2322 ".Li386_less_signed_true:\n\t"
2324 ".Li386_less_signed_end:\n\t"
2326 "lea 0x8(%esp),%esp");
2330 i386_emit_less_unsigned (void)
2332 EMIT_ASM32 (i386_less_unsigned
,
2333 "cmpl %ebx,4(%esp)\n\t"
2334 "jb .Li386_less_unsigned_true\n\t"
2335 "jne .Li386_less_unsigned_false\n\t"
2336 "cmpl %eax,(%esp)\n\t"
2337 "jb .Li386_less_unsigned_true\n\t"
2338 ".Li386_less_unsigned_false:\n\t"
2340 "jmp .Li386_less_unsigned_end\n\t"
2341 ".Li386_less_unsigned_true:\n\t"
2343 ".Li386_less_unsigned_end:\n\t"
2345 "lea 0x8(%esp),%esp");
2349 i386_emit_ref (int size
)
2354 EMIT_ASM32 (i386_ref1
,
2358 EMIT_ASM32 (i386_ref2
,
2362 EMIT_ASM32 (i386_ref4
,
2363 "movl (%eax),%eax");
2366 EMIT_ASM32 (i386_ref8
,
2367 "movl 4(%eax),%ebx\n\t"
2368 "movl (%eax),%eax");
2374 i386_emit_if_goto (int *offset_p
, int *size_p
)
2376 EMIT_ASM32 (i386_if_goto
,
2382 /* Don't trust the assembler to choose the right jump */
2383 ".byte 0x0f, 0x85, 0x0, 0x0, 0x0, 0x0");
2386 *offset_p
= 11; /* be sure that this matches the sequence above */
2392 i386_emit_goto (int *offset_p
, int *size_p
)
2394 EMIT_ASM32 (i386_goto
,
2395 /* Don't trust the assembler to choose the right jump */
2396 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0");
2404 i386_write_goto_address (CORE_ADDR from
, CORE_ADDR to
, int size
)
2406 int diff
= (to
- (from
+ size
));
2407 unsigned char buf
[sizeof (int)];
2409 /* We're only doing 4-byte sizes at the moment. */
2416 memcpy (buf
, &diff
, sizeof (int));
2417 target_write_memory (from
, buf
, sizeof (int));
2421 i386_emit_const (LONGEST num
)
2423 unsigned char buf
[16];
2425 CORE_ADDR buildaddr
= current_insn_ptr
;
2428 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2429 lo
= num
& 0xffffffff;
2430 memcpy (&buf
[i
], &lo
, sizeof (lo
));
2432 hi
= ((num
>> 32) & 0xffffffff);
2435 buf
[i
++] = 0xbb; /* mov $<n>,%ebx */
2436 memcpy (&buf
[i
], &hi
, sizeof (hi
));
2441 buf
[i
++] = 0x31; buf
[i
++] = 0xdb; /* xor %ebx,%ebx */
2443 append_insns (&buildaddr
, i
, buf
);
2444 current_insn_ptr
= buildaddr
;
2448 i386_emit_call (CORE_ADDR fn
)
2450 unsigned char buf
[16];
2452 CORE_ADDR buildaddr
;
2454 buildaddr
= current_insn_ptr
;
2456 buf
[i
++] = 0xe8; /* call <reladdr> */
2457 offset
= ((int) fn
) - (buildaddr
+ 5);
2458 memcpy (buf
+ 1, &offset
, 4);
2459 append_insns (&buildaddr
, 5, buf
);
2460 current_insn_ptr
= buildaddr
;
2464 i386_emit_reg (int reg
)
2466 unsigned char buf
[16];
2468 CORE_ADDR buildaddr
;
2470 EMIT_ASM32 (i386_reg_a
,
2472 buildaddr
= current_insn_ptr
;
2474 buf
[i
++] = 0xb8; /* mov $<n>,%eax */
2475 memcpy (&buf
[i
], ®
, sizeof (reg
));
2477 append_insns (&buildaddr
, i
, buf
);
2478 current_insn_ptr
= buildaddr
;
2479 EMIT_ASM32 (i386_reg_b
,
2480 "mov %eax,4(%esp)\n\t"
2481 "mov 8(%ebp),%eax\n\t"
2483 i386_emit_call (get_raw_reg_func_addr ());
2484 EMIT_ASM32 (i386_reg_c
,
2486 "lea 0x8(%esp),%esp");
2490 i386_emit_pop (void)
2492 EMIT_ASM32 (i386_pop
,
2498 i386_emit_stack_flush (void)
2500 EMIT_ASM32 (i386_stack_flush
,
2506 i386_emit_zero_ext (int arg
)
2511 EMIT_ASM32 (i386_zero_ext_8
,
2512 "and $0xff,%eax\n\t"
2516 EMIT_ASM32 (i386_zero_ext_16
,
2517 "and $0xffff,%eax\n\t"
2521 EMIT_ASM32 (i386_zero_ext_32
,
2530 i386_emit_swap (void)
2532 EMIT_ASM32 (i386_swap
,
2542 i386_emit_stack_adjust (int n
)
2544 unsigned char buf
[16];
2546 CORE_ADDR buildaddr
= current_insn_ptr
;
2549 buf
[i
++] = 0x8d; /* lea $<n>(%esp),%esp */
2553 append_insns (&buildaddr
, i
, buf
);
2554 current_insn_ptr
= buildaddr
;
2557 /* FN's prototype is `LONGEST(*fn)(int)'. */
2560 i386_emit_int_call_1 (CORE_ADDR fn
, int arg1
)
2562 unsigned char buf
[16];
2564 CORE_ADDR buildaddr
;
2566 EMIT_ASM32 (i386_int_call_1_a
,
2567 /* Reserve a bit of stack space. */
2569 /* Put the one argument on the stack. */
2570 buildaddr
= current_insn_ptr
;
2572 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
2575 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2577 append_insns (&buildaddr
, i
, buf
);
2578 current_insn_ptr
= buildaddr
;
2579 i386_emit_call (fn
);
2580 EMIT_ASM32 (i386_int_call_1_c
,
2582 "lea 0x8(%esp),%esp");
2585 /* FN's prototype is `void(*fn)(int,LONGEST)'. */
2588 i386_emit_void_call_2 (CORE_ADDR fn
, int arg1
)
2590 unsigned char buf
[16];
2592 CORE_ADDR buildaddr
;
2594 EMIT_ASM32 (i386_void_call_2_a
,
2595 /* Preserve %eax only; we don't have to worry about %ebx. */
2597 /* Reserve a bit of stack space for arguments. */
2598 "sub $0x10,%esp\n\t"
2599 /* Copy "top" to the second argument position. (Note that
2600 we can't assume function won't scribble on its
2601 arguments, so don't try to restore from this.) */
2602 "mov %eax,4(%esp)\n\t"
2603 "mov %ebx,8(%esp)");
2604 /* Put the first argument on the stack. */
2605 buildaddr
= current_insn_ptr
;
2607 buf
[i
++] = 0xc7; /* movl $<arg1>,(%esp) */
2610 memcpy (&buf
[i
], &arg1
, sizeof (arg1
));
2612 append_insns (&buildaddr
, i
, buf
);
2613 current_insn_ptr
= buildaddr
;
2614 i386_emit_call (fn
);
2615 EMIT_ASM32 (i386_void_call_2_b
,
2616 "lea 0x10(%esp),%esp\n\t"
2617 /* Restore original stack top. */
2623 i386_emit_eq_goto (int *offset_p
, int *size_p
)
2626 /* Check low half first, more likely to be decider */
2627 "cmpl %eax,(%esp)\n\t"
2628 "jne .Leq_fallthru\n\t"
2629 "cmpl %ebx,4(%esp)\n\t"
2630 "jne .Leq_fallthru\n\t"
2631 "lea 0x8(%esp),%esp\n\t"
2634 /* jmp, but don't trust the assembler to choose the right jump */
2635 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2636 ".Leq_fallthru:\n\t"
2637 "lea 0x8(%esp),%esp\n\t"
2648 i386_emit_ne_goto (int *offset_p
, int *size_p
)
2651 /* Check low half first, more likely to be decider */
2652 "cmpl %eax,(%esp)\n\t"
2654 "cmpl %ebx,4(%esp)\n\t"
2655 "je .Lne_fallthru\n\t"
2657 "lea 0x8(%esp),%esp\n\t"
2660 /* jmp, but don't trust the assembler to choose the right jump */
2661 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2662 ".Lne_fallthru:\n\t"
2663 "lea 0x8(%esp),%esp\n\t"
2674 i386_emit_lt_goto (int *offset_p
, int *size_p
)
2677 "cmpl %ebx,4(%esp)\n\t"
2679 "jne .Llt_fallthru\n\t"
2680 "cmpl %eax,(%esp)\n\t"
2681 "jnl .Llt_fallthru\n\t"
2683 "lea 0x8(%esp),%esp\n\t"
2686 /* jmp, but don't trust the assembler to choose the right jump */
2687 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2688 ".Llt_fallthru:\n\t"
2689 "lea 0x8(%esp),%esp\n\t"
2700 i386_emit_le_goto (int *offset_p
, int *size_p
)
2703 "cmpl %ebx,4(%esp)\n\t"
2705 "jne .Lle_fallthru\n\t"
2706 "cmpl %eax,(%esp)\n\t"
2707 "jnle .Lle_fallthru\n\t"
2709 "lea 0x8(%esp),%esp\n\t"
2712 /* jmp, but don't trust the assembler to choose the right jump */
2713 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2714 ".Lle_fallthru:\n\t"
2715 "lea 0x8(%esp),%esp\n\t"
2726 i386_emit_gt_goto (int *offset_p
, int *size_p
)
2729 "cmpl %ebx,4(%esp)\n\t"
2731 "jne .Lgt_fallthru\n\t"
2732 "cmpl %eax,(%esp)\n\t"
2733 "jng .Lgt_fallthru\n\t"
2735 "lea 0x8(%esp),%esp\n\t"
2738 /* jmp, but don't trust the assembler to choose the right jump */
2739 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2740 ".Lgt_fallthru:\n\t"
2741 "lea 0x8(%esp),%esp\n\t"
2752 i386_emit_ge_goto (int *offset_p
, int *size_p
)
2755 "cmpl %ebx,4(%esp)\n\t"
2757 "jne .Lge_fallthru\n\t"
2758 "cmpl %eax,(%esp)\n\t"
2759 "jnge .Lge_fallthru\n\t"
2761 "lea 0x8(%esp),%esp\n\t"
2764 /* jmp, but don't trust the assembler to choose the right jump */
2765 ".byte 0xe9, 0x0, 0x0, 0x0, 0x0\n\t"
2766 ".Lge_fallthru:\n\t"
2767 "lea 0x8(%esp),%esp\n\t"
2777 struct emit_ops i386_emit_ops
=
2785 i386_emit_rsh_signed
,
2786 i386_emit_rsh_unsigned
,
2794 i386_emit_less_signed
,
2795 i386_emit_less_unsigned
,
2799 i386_write_goto_address
,
2804 i386_emit_stack_flush
,
2807 i386_emit_stack_adjust
,
2808 i386_emit_int_call_1
,
2809 i386_emit_void_call_2
,
2819 static struct emit_ops
*
2823 if (is_64bit_tdesc ())
2824 return &amd64_emit_ops
;
2827 return &i386_emit_ops
;
2830 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
2832 static const gdb_byte
*
2833 x86_sw_breakpoint_from_kind (int kind
, int *size
)
2835 *size
= x86_breakpoint_len
;
2836 return x86_breakpoint
;
2840 x86_supports_range_stepping (void)
2845 /* Implementation of linux_target_ops method "supports_hardware_single_step".
2849 x86_supports_hardware_single_step (void)
2855 x86_get_ipa_tdesc_idx (void)
2857 struct regcache
*regcache
= get_thread_regcache (current_thread
, 0);
2858 const struct target_desc
*tdesc
= regcache
->tdesc
;
2861 return amd64_get_ipa_tdesc_idx (tdesc
);
2864 if (tdesc
== tdesc_i386_linux_no_xml
)
2865 return X86_TDESC_SSE
;
2867 return i386_get_ipa_tdesc_idx (tdesc
);
2870 /* This is initialized assuming an amd64 target.
2871 x86_arch_setup will correct it for i386 or amd64 targets. */
2873 struct linux_target_ops the_low_target
=
2876 x86_linux_regs_info
,
2877 x86_cannot_fetch_register
,
2878 x86_cannot_store_register
,
2879 NULL
, /* fetch_register */
2882 NULL
, /* breakpoint_kind_from_pc */
2883 x86_sw_breakpoint_from_kind
,
2887 x86_supports_z_point_type
,
2890 x86_stopped_by_watchpoint
,
2891 x86_stopped_data_address
,
2892 /* collect_ptrace_register/supply_ptrace_register are not needed in the
2893 native i386 case (no registers smaller than an xfer unit), and are not
2894 used in the biarch case (HAVE_LINUX_USRREGS is not defined). */
2897 /* need to fix up i386 siginfo if host is amd64 */
2899 x86_linux_new_process
,
2900 x86_linux_delete_process
,
2901 x86_linux_new_thread
,
2902 x86_linux_delete_thread
,
2904 x86_linux_prepare_to_resume
,
2905 x86_linux_process_qsupported
,
2906 x86_supports_tracepoints
,
2907 x86_get_thread_area
,
2908 x86_install_fast_tracepoint_jump_pad
,
2910 x86_get_min_fast_tracepoint_insn_len
,
2911 x86_supports_range_stepping
,
2912 NULL
, /* breakpoint_kind_from_current_state */
2913 x86_supports_hardware_single_step
,
2914 x86_get_syscall_trapinfo
,
2915 x86_get_ipa_tdesc_idx
,
2918 /* The linux target ops object. */
2920 linux_process_target
*the_linux_target
= &the_x86_target
;
2923 initialize_low_arch (void)
2925 /* Initialize the Linux target descriptions. */
2927 tdesc_amd64_linux_no_xml
= allocate_target_description ();
2928 copy_target_description (tdesc_amd64_linux_no_xml
,
2929 amd64_linux_read_description (X86_XSTATE_SSE_MASK
,
2931 tdesc_amd64_linux_no_xml
->xmltarget
= xmltarget_amd64_linux_no_xml
;
2934 tdesc_i386_linux_no_xml
= allocate_target_description ();
2935 copy_target_description (tdesc_i386_linux_no_xml
,
2936 i386_linux_read_description (X86_XSTATE_SSE_MASK
));
2937 tdesc_i386_linux_no_xml
->xmltarget
= xmltarget_i386_linux_no_xml
;
2939 initialize_regsets_info (&x86_regsets_info
);