1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2014 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_standard
;
67 template<bool big_endian
>
70 template<bool big_endian
>
71 class Arm_input_section
;
73 class Arm_exidx_cantunwind
;
75 class Arm_exidx_merged_section
;
77 class Arm_exidx_fixup
;
79 template<bool big_endian
>
80 class Arm_output_section
;
82 class Arm_exidx_input_section
;
84 template<bool big_endian
>
87 template<bool big_endian
>
88 class Arm_relocate_functions
;
90 template<bool big_endian
>
91 class Arm_output_data_got
;
93 template<bool big_endian
>
97 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE
= 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE
,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data
)
159 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data
)
169 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data
, int reloc_addend
)
174 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
178 static const Insn_template
179 arm_insn(uint32_t data
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data
, int reloc_addend
)
184 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
186 static const Insn_template
187 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
188 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_
; }
197 // Return the instruction sequence type of this.
200 { return this->type_
; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_
; }
209 { return this->reloc_addend_
; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
224 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_
;
234 // Relocation addend.
235 int32_t reloc_addend_
;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
270 // Last reloc stub type.
271 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
279 arm_stub_type_last
= arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type
, const Insn_template
*, size_t);
298 { return this->type_
; }
300 // Return an array of instruction templates.
303 { return this->insns_
; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_
; }
310 // Return size of template in bytes.
313 { return this->size_
; }
315 // Return alignment of the stub template.
318 { return this->alignment_
; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_
; }
325 // Return number of relocations in this template.
328 { return this->relocs_
.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i
) const
334 gold_assert(i
< this->relocs_
.size());
335 return this->relocs_
[i
].first
;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i
) const
343 gold_assert(i
< this->relocs_
.size());
344 return this->relocs_
[i
].second
;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair
<size_t, section_size_type
> Reloc
;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template
&);
355 Stub_template
& operator=(const Stub_template
&);
359 // Points to an array of Insn_templates.
360 const Insn_template
* insns_
;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_
;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector
<Reloc
> relocs_
;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset
=
384 static_cast<section_offset_type
>(-1);
387 Stub(const Stub_template
* stub_template
)
388 : stub_template_(stub_template
), offset_(invalid_offset
)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_
; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_
!= invalid_offset
);
405 return this->offset_
;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset
)
411 { this->offset_
= offset
; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i
)
417 { return this->do_reloc_target(i
); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
422 { this->do_write(view
, view_size
, big_endian
); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i
)
428 { return this->do_thumb16_special(i
); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
440 this->do_fixed_endian_write
<true>(view
, view_size
);
442 this->do_fixed_endian_write
<false>(view
, view_size
);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian
>
455 do_fixed_endian_write(unsigned char*, section_size_type
);
458 const Stub_template
* stub_template_
;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_
;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub
: public Stub
469 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_
!= this->invalid_address
);
478 return this->destination_address_
;
481 // Set destination address.
483 set_destination_address(Arm_address address
)
485 gold_assert(address
!= this->invalid_address
);
486 this->destination_address_
= address
;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_
= this->invalid_address
; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
500 Arm_address branch_target
, bool target_is_thumb
);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
513 unsigned int r_sym
, int32_t addend
)
514 : stub_type_(stub_type
), addend_(addend
)
518 this->r_sym_
= Reloc_stub::invalid_index
;
519 this->u_
.symbol
= symbol
;
523 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
524 this->r_sym_
= r_sym
;
525 this->u_
.relobj
= relobj
;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_
; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_
; }
545 // Return the symbol if there is one.
548 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
550 // Return the relobj if there is one.
553 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
555 // Whether this equals to another key k.
557 eq(const Key
& k
) const
559 return ((this->stub_type_
== k
.stub_type_
)
560 && (this->r_sym_
== k
.r_sym_
)
561 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
562 ? (this->u_
.relobj
== k
.u_
.relobj
)
563 : (this->u_
.symbol
== k
.u_
.symbol
))
564 && (this->addend_
== k
.addend_
));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash
<char>(
574 (this->r_sym_
!= Reloc_stub::invalid_index
)
575 ? this->u_
.relobj
->name().c_str()
576 : this->u_
.symbol
->name())
580 // Functors for STL associative containers.
584 operator()(const Key
& k
) const
585 { return k
.hash_value(); }
591 operator()(const Key
& k1
, const Key
& k2
) const
592 { return k1
.eq(k2
); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_
;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol
* symbol
;
614 const Relobj
* relobj
;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template
* stub_template
)
623 : Stub(stub_template
), destination_address_(invalid_address
)
629 friend class Stub_factory
;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i
)
636 // All reloc stub have only one relocation.
638 return this->destination_address_
;
642 // Address of destination.
643 Arm_address destination_address_
;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub
: public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_
; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_
; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_
; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_
; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_
; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
705 unsigned int shndx
, Arm_address source_address
,
706 Arm_address destination_address
, uint32_t original_insn
)
707 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
708 source_address_(source_address
| 1U),
709 destination_address_(destination_address
),
710 original_insn_(original_insn
)
713 friend class Stub_factory
;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i
)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
722 // The conditional branch veneer has two relocations.
724 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_
;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_
;
745 // Destination address of the original branch.
746 Arm_address destination_address_
;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_
;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub
: public Stub
759 // Return the associated register.
762 { return this->reg_
; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
767 : Stub(stub_template
), reg_(reg
)
770 friend class Stub_factory
;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
783 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
785 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
789 // A template to implement do_write.
790 template<bool big_endian
>
792 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
794 const Insn_template
* insns
= this->stub_template()->insns();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
797 + (this->reg_
<< 16)));
798 view
+= insns
[0].size();
799 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 (insns
[1].data() + this->reg_
));
801 view
+= insns
[1].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[2].data() + this->reg_
));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory
&
819 static Stub_factory singleton
;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type
) const
827 gold_assert(stub_type
>= arm_stub_reloc_first
828 && stub_type
<= arm_stub_reloc_last
);
829 return new Reloc_stub(this->stub_templates_
[stub_type
]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
835 Arm_address source
, Arm_address destination
,
836 uint32_t original_insn
) const
838 gold_assert(stub_type
>= arm_stub_cortex_a8_first
839 && stub_type
<= arm_stub_cortex_a8_last
);
840 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
841 source
, destination
, original_insn
);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg
) const
849 gold_assert(reg
< 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory
&);
862 Stub_factory
& operator=(Stub_factory
&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian
>
871 class Stub_table
: public Output_data
874 Stub_table(Arm_input_section
<big_endian
>* owner
)
875 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section
<big_endian
>*
886 { return this->owner_
; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_
.empty()
893 && this->cortex_a8_stubs_
.empty()
894 && this->arm_v4bx_stubs_
.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
907 const Stub_template
* stub_template
= stub
->stub_template();
908 gold_assert(stub_template
->type() == key
.stub_type());
909 this->reloc_stubs_
[key
] = stub
;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align
= stub_template
->alignment();
914 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
915 stub
->set_offset(this->reloc_stubs_size_
);
916 this->reloc_stubs_size_
+= stub_template
->size();
917 this->reloc_stubs_addralign_
=
918 std::max(this->reloc_stubs_addralign_
, align
);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
927 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
928 this->cortex_a8_stubs_
.insert(value
);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
936 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
937 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key
& key
) const
948 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
949 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg
) const
957 gold_assert(reg
< 0xf);
958 return this->arm_v4bx_stubs_
[reg
];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info
<32, big_endian
>*,
964 Target_arm
<big_endian
>*, Output_section
*,
965 unsigned char*, Arm_address
, section_size_type
);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
981 unsigned char*, Arm_address
,
985 // Write out section contents.
987 do_write(Output_file
*);
989 // Return the required alignment.
992 { return this->prev_addralign_
; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_
); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1008 Target_arm
<big_endian
>*, Output_section
*,
1009 unsigned char*, Arm_address
, section_size_type
);
1011 // Unordered map of relocation stubs.
1013 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1014 Reloc_stub::Key::equal_to
>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1023 // Owner of this stub table.
1024 Arm_input_section
<big_endian
>* owner_
;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_
;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_
;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_
;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_
;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_
;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_
;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind
: public Output_section_data
1047 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1048 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_
; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_
; }
1063 do_write(Output_file
* of
)
1065 if (parameters
->target().is_big_endian())
1066 this->do_fixed_endian_write
<true>(of
);
1068 this->do_fixed_endian_write
<false>(of
);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile
* mapfile
) const
1074 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian
>
1080 do_fixed_endian_write(Output_file
*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_
;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map
<section_offset_type
, section_offset_type
>
1093 Arm_exidx_section_offset_map
;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section
& exidx_input_section
,
1108 const Arm_exidx_section_offset_map
& section_offset_map
,
1109 uint32_t deleted_bytes
);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type
);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section
&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_
; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map
&
1122 section_offset_map() const
1123 { return this->section_offset_map_
; }
1126 // Write merged section into file OF.
1128 do_write(Output_file
* of
);
1131 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1132 section_offset_type
*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section
& exidx_input_section_
;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map
& section_offset_map_
;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_
;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian
>
1148 class Arm_input_section
: public Output_relaxed_input_section
1151 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1152 : Output_relaxed_input_section(relobj
, shndx
, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1154 original_contents_(NULL
)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_
; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1169 // Return the stub table.
1170 Stub_table
<big_endian
>*
1172 { return this->stub_table_
; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1177 { this->stub_table_
= stub_table
; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section
<big_endian
>*
1182 as_arm_input_section(Output_relaxed_input_section
* poris
)
1183 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_
; }
1191 // Write data to output file.
1193 do_write(Output_file
*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_
->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_
));
1203 return this->original_addralign_
;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1217 section_offset_type offset
,
1218 section_offset_type
* poutput
) const
1220 if ((object
== this->relobj())
1221 && (shndx
== this->shndx())
1224 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section
&);
1236 Arm_input_section
& operator=(const Arm_input_section
&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_
;
1240 // Section size of the original input section.
1241 uint32_t original_size_
;
1243 Stub_table
<big_endian
>* stub_table_
;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_
;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1257 bool merge_exidx_entries
= true)
1258 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1259 last_inlined_entry_(0), last_input_section_(NULL
),
1260 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1261 merge_exidx_entries_(merge_exidx_entries
)
1265 { delete this->section_offset_map_
; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian
>
1275 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1276 const unsigned char* section_contents
,
1277 section_size_type section_size
,
1278 Arm_exidx_section_offset_map
** psection_offset_map
);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_
; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1294 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND
,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word
);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset
,
1321 section_size_type deleted_bytes
, bool delete_entry
);
1323 // EXIDX output section.
1324 Output_section
* exidx_output_section_
;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_
;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_
;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section
* last_input_section_
;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map
* section_offset_map_
;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section
* first_output_text_section_
;
1337 bool merge_exidx_entries_
;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian
>
1344 class Arm_output_section
: public Output_section
1347 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1351 elfcpp::Elf_Xword flags
)
1352 : Output_section(name
, type
,
1353 (type
== elfcpp::SHT_ARM_EXIDX
1354 ? flags
| elfcpp::SHF_LINK_ORDER
1357 if (type
== elfcpp::SHT_ARM_EXIDX
)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section
<big_endian
>*
1371 as_arm_output_section(Output_section
* os
)
1372 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list
* list
);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout
* layout
,
1383 const Text_section_list
& sorted_text_section
,
1384 Symbol_table
* symtab
,
1385 bool merge_exidx_entries
,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section
;
1395 typedef Output_section::Input_section_list Input_section_list
;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator
,
1399 Input_section_list::const_iterator
,
1400 Input_section_list::const_iterator
,
1401 Target_arm
<big_endian
>*,
1402 std::vector
<Output_relaxed_input_section
*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset
=
1412 static_cast<section_offset_type
>(-1);
1414 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1415 unsigned int link
, uint32_t size
,
1416 uint32_t addralign
, uint32_t text_size
)
1417 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1418 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_
; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_
; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_
; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_
; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_
; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_
; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_
; }
1461 // Set has-errors flag.
1464 { this->has_errors_
= true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_
;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_
;
1477 // Size of associated text section.
1478 uint32_t text_size_
;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian
>
1486 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1489 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1491 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1492 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1493 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL
), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_
; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table
<big_endian
>*
1506 stub_table(unsigned int shndx
) const
1508 gold_assert(shndx
< this->stub_tables_
.size());
1509 return this->stub_tables_
[shndx
];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1516 gold_assert(shndx
< this->stub_tables_
.size());
1517 this->stub_tables_
[shndx
] = stub_table
;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym
) const
1525 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1526 return this->local_symbol_is_thumb_function_
[r_sym
];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx
)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx
, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj
<big_endian
>*
1547 as_arm_relobj(Relobj
* relobj
)
1548 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_
; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data
*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_
; }
1562 // Mapping symbol location.
1563 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position
& p1
,
1570 const Mapping_symbol_position
& p2
) const
1572 return (p1
.first
< p2
.first
1573 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map
<Mapping_symbol_position
, char,
1580 Mapping_symbol_position_less
> Mapping_symbols_info
;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx
) const
1586 return (this->section_has_cortex_a8_workaround_
!= NULL
1587 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1594 if (this->section_has_cortex_a8_workaround_
== NULL
)
1595 this->section_has_cortex_a8_workaround_
=
1596 new std::vector
<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section
*
1603 exidx_input_section_by_link(unsigned int shndx
) const
1605 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1606 return ((p
!= this->exidx_section_map_
.end()
1607 && p
->second
->link() == shndx
)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section
*
1614 exidx_input_section_by_shndx(unsigned shndx
) const
1616 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1617 return ((p
!= this->exidx_section_map_
.end()
1618 && p
->second
->shndx() == shndx
)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_
; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_
= true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_
; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1647 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1648 p
!= this->exidx_section_map_
.end();
1651 if (p
->second
->shndx() == p
->first
)
1652 list
->push_back(p
->first
);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list
->begin(), list
->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file
<32, big_endian
>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1668 this->stub_tables_
.swap(empty_stub_table_list
);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template
<char>*,
1674 Stringpool_template
<char>*);
1677 do_relocate_sections(
1678 const Symbol_table
* symtab
, const Layout
* layout
,
1679 const unsigned char* pshdrs
, Output_file
* of
,
1680 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data
* sd
);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1695 const Relobj::Output_sections
&,
1696 const Symbol_table
*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1701 const Output_section
*, const Symbol_table
*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1706 unsigned int, Output_section
*,
1707 const Symbol_table
*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1712 unsigned int, Output_section
*,
1713 Target_arm
<big_endian
>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr
,
1722 const unsigned char* psyms
, unsigned int* pshndx
);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx
,
1730 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1731 unsigned int text_shndx
,
1732 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section
*);
1739 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1740 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_
;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector
<bool> local_symbol_is_thumb_function_
;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_
;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data
* attributes_section_data_
;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_
;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_
;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_
;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_
;
1765 // Arm_dynobj class.
1767 template<bool big_endian
>
1768 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1771 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1772 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1773 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1774 processor_specific_flags_(0), attributes_section_data_(NULL
)
1778 { delete this->attributes_section_data_
; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj
<big_endian
>*
1783 as_arm_dynobj(Dynobj
* dynobj
)
1784 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_
; }
1792 // Attributes section data.
1793 const Attributes_section_data
*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_
; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data
* sd
);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_
;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data
* attributes_section_data_
;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type
, bool big_endian
>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types
<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types
<sh_type
,
1822 32, big_endian
>::Reloc
& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian
>
1828 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1830 elfcpp::Elf_types
<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian
>
1843 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1845 elfcpp::Elf_types
<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1850 big_endian
>::Reloc
& reloc
) const
1851 { return reloc
.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1861 Arm_address destination
)
1862 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_
; }
1876 // Return the relocation type.
1879 { return this->r_type_
; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_
; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub
* reloc_stub_
;
1891 unsigned int r_type_
;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_
;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian
>
1901 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1904 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1905 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1913 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1920 Sized_relobj_file
<32, big_endian
>* relobj
,
1923 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1938 Sized_relobj_file
<32, big_endian
>* object
,
1939 unsigned int index
);
1942 // Write out the GOT table.
1944 do_write(Output_file
*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1953 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1954 { this->u_
.global
.symbol
= gsym
; }
1956 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1957 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1958 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1960 this->u_
.local
.relobj
= relobj
;
1961 this->u_
.local
.index
= index
;
1964 // Return the GOT offset.
1967 { return this->got_offset_
; }
1972 { return this->r_type_
; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_
; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_
);
1984 return this->u_
.global
.symbol
;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file
<32, big_endian
>*
1991 gold_assert(!this->symbol_is_global_
);
1992 return this->u_
.local
.relobj
;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_
);
2000 return this->u_
.local
.index
;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_
;
2006 // Type of relocation.
2007 unsigned int r_type_
;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_
;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file
<32, big_endian
>* relobj
;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table
* symbol_table_
;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector
<Static_reloc
> static_relocs_
;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2041 class Arm_scan_relocatable_relocs
:
2042 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type
, Relobj
*)
2050 if (sh_type
== elfcpp::SHT_RELA
)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2054 if (r_type
== elfcpp::R_ARM_TARGET1
2055 || r_type
== elfcpp::R_ARM_TARGET2
)
2057 const Target_arm
<big_endian
>* arm_target
=
2058 Target_arm
<big_endian
>::default_target();
2059 r_type
= arm_target
->get_real_reloc_type(r_type
);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE
:
2067 case elfcpp::R_ARM_V4BX
:
2068 case elfcpp::R_ARM_TLS_GOTDESC
:
2069 case elfcpp::R_ARM_TLS_CALL
:
2070 case elfcpp::R_ARM_TLS_DESCSEQ
:
2071 case elfcpp::R_ARM_THM_TLS_CALL
:
2072 case elfcpp::R_ARM_GOTRELAX
:
2073 case elfcpp::R_ARM_GNU_VTENTRY
:
2074 case elfcpp::R_ARM_GNU_VTINHERIT
:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1
:
2080 case elfcpp::R_ARM_TARGET2
:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32
:
2085 case elfcpp::R_ARM_REL32
:
2086 case elfcpp::R_ARM_SBREL32
:
2087 case elfcpp::R_ARM_GOTOFF32
:
2088 case elfcpp::R_ARM_BASE_PREL
:
2089 case elfcpp::R_ARM_GOT_BREL
:
2090 case elfcpp::R_ARM_BASE_ABS
:
2091 case elfcpp::R_ARM_ABS32_NOI
:
2092 case elfcpp::R_ARM_REL32_NOI
:
2093 case elfcpp::R_ARM_PLT32_ABS
:
2094 case elfcpp::R_ARM_GOT_ABS
:
2095 case elfcpp::R_ARM_GOT_PREL
:
2096 case elfcpp::R_ARM_TLS_GD32
:
2097 case elfcpp::R_ARM_TLS_LDM32
:
2098 case elfcpp::R_ARM_TLS_LDO32
:
2099 case elfcpp::R_ARM_TLS_IE32
:
2100 case elfcpp::R_ARM_TLS_LE32
:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL
;
2110 template<bool big_endian
>
2111 class Target_arm
: public Sized_target
<32, big_endian
>
2114 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info
* info
= &arm_info
)
2121 : Sized_target
<32, big_endian
>(info
),
2122 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2123 copy_relocs_(elfcpp::R_ARM_COPY
),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL
),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_
; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value
)
2139 { this->should_force_pic_veneer_
= value
; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute
* attr
=
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2147 int arch
= attr
->int_value();
2148 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute
* attr
=
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2158 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2161 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2164 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2165 return attr
->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute
* attr
=
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2174 int arch
= attr
->int_value();
2175 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2177 || arch
== elfcpp::TAG_CPU_ARCH_V7
2178 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute
* attr
=
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2187 int arch
= attr
->int_value();
2188 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch
== elfcpp::TAG_CPU_ARCH_V7
2190 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute
* attr
=
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2199 int arch
= attr
->int_value();
2200 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute
* attr
=
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2210 int arch
= attr
->int_value();
2211 if (parameters
->options().fix_arm1176())
2212 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch
== elfcpp::TAG_CPU_ARCH_V7
2214 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2218 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2220 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table
* symtab
,
2228 Sized_relobj_file
<32, big_endian
>* object
,
2229 unsigned int data_shndx
,
2230 unsigned int sh_type
,
2231 const unsigned char* prelocs
,
2233 Output_section
* output_section
,
2234 bool needs_special_offset_handling
,
2235 size_t local_symbol_count
,
2236 const unsigned char* plocal_symbols
);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table
* symtab
,
2242 Sized_relobj_file
<32, big_endian
>* object
,
2243 unsigned int data_shndx
,
2244 unsigned int sh_type
,
2245 const unsigned char* prelocs
,
2247 Output_section
* output_section
,
2248 bool needs_special_offset_handling
,
2249 size_t local_symbol_count
,
2250 const unsigned char* plocal_symbols
);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol
*) const;
2261 // Relocate a section.
2263 relocate_section(const Relocate_info
<32, big_endian
>*,
2264 unsigned int sh_type
,
2265 const unsigned char* prelocs
,
2267 Output_section
* output_section
,
2268 bool needs_special_offset_handling
,
2269 unsigned char* view
,
2270 Arm_address view_address
,
2271 section_size_type view_size
,
2272 const Reloc_symbol_changes
*);
2274 // Scan the relocs during a relocatable link.
2276 scan_relocatable_relocs(Symbol_table
* symtab
,
2278 Sized_relobj_file
<32, big_endian
>* object
,
2279 unsigned int data_shndx
,
2280 unsigned int sh_type
,
2281 const unsigned char* prelocs
,
2283 Output_section
* output_section
,
2284 bool needs_special_offset_handling
,
2285 size_t local_symbol_count
,
2286 const unsigned char* plocal_symbols
,
2287 Relocatable_relocs
*);
2289 // Emit relocations for a section.
2291 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2292 unsigned int sh_type
,
2293 const unsigned char* prelocs
,
2295 Output_section
* output_section
,
2296 typename
elfcpp::Elf_types
<32>::Elf_Off
2297 offset_in_output_section
,
2298 const Relocatable_relocs
*,
2299 unsigned char* view
,
2300 Arm_address view_address
,
2301 section_size_type view_size
,
2302 unsigned char* reloc_view
,
2303 section_size_type reloc_view_size
);
2305 // Perform target-specific processing in a relocatable link. This is
2306 // only used if we use the relocation strategy RELOC_SPECIAL.
2308 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2309 unsigned int sh_type
,
2310 const unsigned char* preloc_in
,
2312 Output_section
* output_section
,
2313 typename
elfcpp::Elf_types
<32>::Elf_Off
2314 offset_in_output_section
,
2315 unsigned char* view
,
2316 typename
elfcpp::Elf_types
<32>::Elf_Addr
2318 section_size_type view_size
,
2319 unsigned char* preloc_out
);
2321 // Return whether SYM is defined by the ABI.
2323 do_is_defined_by_abi(const Symbol
* sym
) const
2324 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2326 // Return whether there is a GOT section.
2328 has_got_section() const
2329 { return this->got_
!= NULL
; }
2331 // Return the size of the GOT section.
2335 gold_assert(this->got_
!= NULL
);
2336 return this->got_
->data_size();
2339 // Return the number of entries in the GOT.
2341 got_entry_count() const
2343 if (!this->has_got_section())
2345 return this->got_size() / 4;
2348 // Return the number of entries in the PLT.
2350 plt_entry_count() const;
2352 // Return the offset of the first non-reserved PLT entry.
2354 first_plt_entry_offset() const;
2356 // Return the size of each PLT entry.
2358 plt_entry_size() const;
2360 // Map platform-specific reloc types
2362 get_real_reloc_type(unsigned int r_type
);
2365 // Methods to support stub-generations.
2368 // Return the stub factory
2370 stub_factory() const
2371 { return this->stub_factory_
; }
2373 // Make a new Arm_input_section object.
2374 Arm_input_section
<big_endian
>*
2375 new_arm_input_section(Relobj
*, unsigned int);
2377 // Find the Arm_input_section object corresponding to the SHNDX-th input
2378 // section of RELOBJ.
2379 Arm_input_section
<big_endian
>*
2380 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2382 // Make a new Stub_table
2383 Stub_table
<big_endian
>*
2384 new_stub_table(Arm_input_section
<big_endian
>*);
2386 // Scan a section for stub generation.
2388 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2389 const unsigned char*, size_t, Output_section
*,
2390 bool, const unsigned char*, Arm_address
,
2395 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2396 Output_section
*, unsigned char*, Arm_address
,
2399 // Get the default ARM target.
2400 static Target_arm
<big_endian
>*
2403 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2404 && parameters
->target().is_big_endian() == big_endian
);
2405 return static_cast<Target_arm
<big_endian
>*>(
2406 parameters
->sized_target
<32, big_endian
>());
2409 // Whether NAME belongs to a mapping symbol.
2411 is_mapping_symbol_name(const char* name
)
2415 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2416 && (name
[2] == '\0' || name
[2] == '.'));
2419 // Whether we work around the Cortex-A8 erratum.
2421 fix_cortex_a8() const
2422 { return this->fix_cortex_a8_
; }
2424 // Whether we merge exidx entries in debuginfo.
2426 merge_exidx_entries() const
2427 { return parameters
->options().merge_exidx_entries(); }
2429 // Whether we fix R_ARM_V4BX relocation.
2431 // 1 - replace with MOV instruction (armv4 target)
2432 // 2 - make interworking veneer (>= armv4t targets only)
2433 General_options::Fix_v4bx
2435 { return parameters
->options().fix_v4bx(); }
2437 // Scan a span of THUMB code section for Cortex-A8 erratum.
2439 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2440 section_size_type
, section_size_type
,
2441 const unsigned char*, Arm_address
);
2443 // Apply Cortex-A8 workaround to a branch.
2445 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2446 unsigned char*, Arm_address
);
2449 // Make the PLT-generator object.
2450 Output_data_plt_arm
<big_endian
>*
2451 make_data_plt(Layout
* layout
, Output_data_space
* got_plt
)
2452 { return this->do_make_data_plt(layout
, got_plt
); }
2454 // Make an ELF object.
2456 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2457 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2460 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2461 const elfcpp::Ehdr
<32, !big_endian
>&)
2462 { gold_unreachable(); }
2465 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2466 const elfcpp::Ehdr
<64, false>&)
2467 { gold_unreachable(); }
2470 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2471 const elfcpp::Ehdr
<64, true>&)
2472 { gold_unreachable(); }
2474 // Make an output section.
2476 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2477 elfcpp::Elf_Xword flags
)
2478 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2481 do_adjust_elf_header(unsigned char* view
, int len
);
2483 // We only need to generate stubs, and hence perform relaxation if we are
2484 // not doing relocatable linking.
2486 do_may_relax() const
2487 { return !parameters
->options().relocatable(); }
2490 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2492 // Determine whether an object attribute tag takes an integer, a
2495 do_attribute_arg_type(int tag
) const;
2497 // Reorder tags during output.
2499 do_attributes_order(int num
) const;
2501 // This is called when the target is selected as the default.
2503 do_select_as_default_target()
2505 // No locking is required since there should only be one default target.
2506 // We cannot have both the big-endian and little-endian ARM targets
2508 gold_assert(arm_reloc_property_table
== NULL
);
2509 arm_reloc_property_table
= new Arm_reloc_property_table();
2512 // Virtual function which is set to return true by a target if
2513 // it can use relocation types to determine if a function's
2514 // pointer is taken.
2516 do_can_check_for_function_pointers() const
2519 // Whether a section called SECTION_NAME may have function pointers to
2520 // sections not eligible for safe ICF folding.
2522 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2524 return (!is_prefix_of(".ARM.exidx", section_name
)
2525 && !is_prefix_of(".ARM.extab", section_name
)
2526 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2530 do_define_standard_symbols(Symbol_table
*, Layout
*);
2532 virtual Output_data_plt_arm
<big_endian
>*
2533 do_make_data_plt(Layout
* layout
, Output_data_space
* got_plt
)
2535 return new Output_data_plt_arm_standard
<big_endian
>(layout
, got_plt
);
2539 // The class which scans relocations.
2544 : issued_non_pic_error_(false)
2548 get_reference_flags(unsigned int r_type
);
2551 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2552 Sized_relobj_file
<32, big_endian
>* object
,
2553 unsigned int data_shndx
,
2554 Output_section
* output_section
,
2555 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2556 const elfcpp::Sym
<32, big_endian
>& lsym
,
2560 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2561 Sized_relobj_file
<32, big_endian
>* object
,
2562 unsigned int data_shndx
,
2563 Output_section
* output_section
,
2564 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2568 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2569 Sized_relobj_file
<32, big_endian
>* ,
2572 const elfcpp::Rel
<32, big_endian
>& ,
2574 const elfcpp::Sym
<32, big_endian
>&);
2577 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2578 Sized_relobj_file
<32, big_endian
>* ,
2581 const elfcpp::Rel
<32, big_endian
>& ,
2582 unsigned int , Symbol
*);
2586 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2587 unsigned int r_type
);
2590 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2591 unsigned int r_type
, Symbol
*);
2594 check_non_pic(Relobj
*, unsigned int r_type
);
2596 // Almost identical to Symbol::needs_plt_entry except that it also
2597 // handles STT_ARM_TFUNC.
2599 symbol_needs_plt_entry(const Symbol
* sym
)
2601 // An undefined symbol from an executable does not need a PLT entry.
2602 if (sym
->is_undefined() && !parameters
->options().shared())
2605 return (!parameters
->doing_static_link()
2606 && (sym
->type() == elfcpp::STT_FUNC
2607 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2608 && (sym
->is_from_dynobj()
2609 || sym
->is_undefined()
2610 || sym
->is_preemptible()));
2614 possible_function_pointer_reloc(unsigned int r_type
);
2616 // Whether we have issued an error about a non-PIC compilation.
2617 bool issued_non_pic_error_
;
2620 // The class which implements relocation.
2630 // Return whether the static relocation needs to be applied.
2632 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2633 unsigned int r_type
,
2635 Output_section
* output_section
);
2637 // Do a relocation. Return false if the caller should not issue
2638 // any warnings about this relocation.
2640 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2641 Output_section
*, size_t relnum
,
2642 const elfcpp::Rel
<32, big_endian
>&,
2643 unsigned int r_type
, const Sized_symbol
<32>*,
2644 const Symbol_value
<32>*,
2645 unsigned char*, Arm_address
,
2648 // Return whether we want to pass flag NON_PIC_REF for this
2649 // reloc. This means the relocation type accesses a symbol not via
2652 reloc_is_non_pic(unsigned int r_type
)
2656 // These relocation types reference GOT or PLT entries explicitly.
2657 case elfcpp::R_ARM_GOT_BREL
:
2658 case elfcpp::R_ARM_GOT_ABS
:
2659 case elfcpp::R_ARM_GOT_PREL
:
2660 case elfcpp::R_ARM_GOT_BREL12
:
2661 case elfcpp::R_ARM_PLT32_ABS
:
2662 case elfcpp::R_ARM_TLS_GD32
:
2663 case elfcpp::R_ARM_TLS_LDM32
:
2664 case elfcpp::R_ARM_TLS_IE32
:
2665 case elfcpp::R_ARM_TLS_IE12GP
:
2667 // These relocate types may use PLT entries.
2668 case elfcpp::R_ARM_CALL
:
2669 case elfcpp::R_ARM_THM_CALL
:
2670 case elfcpp::R_ARM_JUMP24
:
2671 case elfcpp::R_ARM_THM_JUMP24
:
2672 case elfcpp::R_ARM_THM_JUMP19
:
2673 case elfcpp::R_ARM_PLT32
:
2674 case elfcpp::R_ARM_THM_XPC22
:
2675 case elfcpp::R_ARM_PREL31
:
2676 case elfcpp::R_ARM_SBREL31
:
2685 // Do a TLS relocation.
2686 inline typename Arm_relocate_functions
<big_endian
>::Status
2687 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2688 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2689 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2690 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2695 // A class which returns the size required for a relocation type,
2696 // used while scanning relocs during a relocatable link.
2697 class Relocatable_size_for_reloc
2701 get_size_for_reloc(unsigned int, Relobj
*);
2704 // Adjust TLS relocation type based on the options and whether this
2705 // is a local symbol.
2706 static tls::Tls_optimization
2707 optimize_tls_reloc(bool is_final
, int r_type
);
2709 // Get the GOT section, creating it if necessary.
2710 Arm_output_data_got
<big_endian
>*
2711 got_section(Symbol_table
*, Layout
*);
2713 // Get the GOT PLT section.
2715 got_plt_section() const
2717 gold_assert(this->got_plt_
!= NULL
);
2718 return this->got_plt_
;
2721 // Create a PLT entry for a global symbol.
2723 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2725 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2727 define_tls_base_symbol(Symbol_table
*, Layout
*);
2729 // Create a GOT entry for the TLS module index.
2731 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2732 Sized_relobj_file
<32, big_endian
>* object
);
2734 // Get the PLT section.
2735 const Output_data_plt_arm
<big_endian
>*
2738 gold_assert(this->plt_
!= NULL
);
2742 // Get the dynamic reloc section, creating it if necessary.
2744 rel_dyn_section(Layout
*);
2746 // Get the section to use for TLS_DESC relocations.
2748 rel_tls_desc_section(Layout
*) const;
2750 // Return true if the symbol may need a COPY relocation.
2751 // References from an executable object to non-function symbols
2752 // defined in a dynamic object may need a COPY relocation.
2754 may_need_copy_reloc(Symbol
* gsym
)
2756 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2757 && gsym
->may_need_copy_reloc());
2760 // Add a potential copy relocation.
2762 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2763 Sized_relobj_file
<32, big_endian
>* object
,
2764 unsigned int shndx
, Output_section
* output_section
,
2765 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2767 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2768 symtab
->get_sized_symbol
<32>(sym
),
2769 object
, shndx
, output_section
, reloc
,
2770 this->rel_dyn_section(layout
));
2773 // Whether two EABI versions are compatible.
2775 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2777 // Merge processor-specific flags from input object and those in the ELF
2778 // header of the output.
2780 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2782 // Get the secondary compatible architecture.
2784 get_secondary_compatible_arch(const Attributes_section_data
*);
2786 // Set the secondary compatible architecture.
2788 set_secondary_compatible_arch(Attributes_section_data
*, int);
2791 tag_cpu_arch_combine(const char*, int, int*, int, int);
2793 // Helper to print AEABI enum tag value.
2795 aeabi_enum_name(unsigned int);
2797 // Return string value for TAG_CPU_name.
2799 tag_cpu_name_value(unsigned int);
2801 // Query attributes object to see if integer divide instructions may be
2802 // present in an object.
2804 attributes_accept_div(int arch
, int profile
,
2805 const Object_attribute
* div_attr
);
2807 // Query attributes object to see if integer divide instructions are
2808 // forbidden to be in the object. This is not the inverse of
2809 // attributes_accept_div.
2811 attributes_forbid_div(const Object_attribute
* div_attr
);
2813 // Merge object attributes from input object and those in the output.
2815 merge_object_attributes(const char*, const Attributes_section_data
*);
2817 // Helper to get an AEABI object attribute
2819 get_aeabi_object_attribute(int tag
) const
2821 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2822 gold_assert(pasd
!= NULL
);
2823 Object_attribute
* attr
=
2824 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2825 gold_assert(attr
!= NULL
);
2830 // Methods to support stub-generations.
2833 // Group input sections for stub generation.
2835 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2837 // Scan a relocation for stub generation.
2839 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2840 const Sized_symbol
<32>*, unsigned int,
2841 const Symbol_value
<32>*,
2842 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2844 // Scan a relocation section for stub.
2845 template<int sh_type
>
2847 scan_reloc_section_for_stubs(
2848 const Relocate_info
<32, big_endian
>* relinfo
,
2849 const unsigned char* prelocs
,
2851 Output_section
* output_section
,
2852 bool needs_special_offset_handling
,
2853 const unsigned char* view
,
2854 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2857 // Fix .ARM.exidx section coverage.
2859 fix_exidx_coverage(Layout
*, const Input_objects
*,
2860 Arm_output_section
<big_endian
>*, Symbol_table
*,
2863 // Functors for STL set.
2864 struct output_section_address_less_than
2867 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2868 { return s1
->address() < s2
->address(); }
2871 // Information about this specific target which we pass to the
2872 // general Target structure.
2873 static const Target::Target_info arm_info
;
2875 // The types of GOT entries needed for this platform.
2876 // These values are exposed to the ABI in an incremental link.
2877 // Do not renumber existing values without changing the version
2878 // number of the .gnu_incremental_inputs section.
2881 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2882 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2883 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2884 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2885 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2888 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2890 // Map input section to Arm_input_section.
2891 typedef Unordered_map
<Section_id
,
2892 Arm_input_section
<big_endian
>*,
2894 Arm_input_section_map
;
2896 // Map output addresses to relocs for Cortex-A8 erratum.
2897 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2898 Cortex_a8_relocs_info
;
2901 Arm_output_data_got
<big_endian
>* got_
;
2903 Output_data_plt_arm
<big_endian
>* plt_
;
2904 // The GOT PLT section.
2905 Output_data_space
* got_plt_
;
2906 // The dynamic reloc section.
2907 Reloc_section
* rel_dyn_
;
2908 // Relocs saved to avoid a COPY reloc.
2909 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2910 // Offset of the GOT entry for the TLS module index.
2911 unsigned int got_mod_index_offset_
;
2912 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2913 bool tls_base_symbol_defined_
;
2914 // Vector of Stub_tables created.
2915 Stub_table_list stub_tables_
;
2917 const Stub_factory
&stub_factory_
;
2918 // Whether we force PIC branch veneers.
2919 bool should_force_pic_veneer_
;
2920 // Map for locating Arm_input_sections.
2921 Arm_input_section_map arm_input_section_map_
;
2922 // Attributes section data in output.
2923 Attributes_section_data
* attributes_section_data_
;
2924 // Whether we want to fix code for Cortex-A8 erratum.
2925 bool fix_cortex_a8_
;
2926 // Map addresses to relocs for Cortex-A8 erratum.
2927 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2930 template<bool big_endian
>
2931 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2934 big_endian
, // is_big_endian
2935 elfcpp::EM_ARM
, // machine_code
2936 false, // has_make_symbol
2937 false, // has_resolve
2938 false, // has_code_fill
2939 true, // is_default_stack_executable
2940 false, // can_icf_inline_merge_sections
2942 "/usr/lib/libc.so.1", // dynamic_linker
2943 0x8000, // default_text_segment_address
2944 0x1000, // abi_pagesize (overridable by -z max-page-size)
2945 0x1000, // common_pagesize (overridable by -z common-page-size)
2946 false, // isolate_execinstr
2948 elfcpp::SHN_UNDEF
, // small_common_shndx
2949 elfcpp::SHN_UNDEF
, // large_common_shndx
2950 0, // small_common_section_flags
2951 0, // large_common_section_flags
2952 ".ARM.attributes", // attributes_section
2953 "aeabi", // attributes_vendor
2954 "_start" // entry_symbol_name
2957 // Arm relocate functions class
2960 template<bool big_endian
>
2961 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2966 STATUS_OKAY
, // No error during relocation.
2967 STATUS_OVERFLOW
, // Relocation overflow.
2968 STATUS_BAD_RELOC
// Relocation cannot be applied.
2972 typedef Relocate_functions
<32, big_endian
> Base
;
2973 typedef Arm_relocate_functions
<big_endian
> This
;
2975 // Encoding of imm16 argument for movt and movw ARM instructions
2978 // imm16 := imm4 | imm12
2980 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2981 // +-------+---------------+-------+-------+-----------------------+
2982 // | | |imm4 | |imm12 |
2983 // +-------+---------------+-------+-------+-----------------------+
2985 // Extract the relocation addend from VAL based on the ARM
2986 // instruction encoding described above.
2987 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2988 extract_arm_movw_movt_addend(
2989 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2991 // According to the Elf ABI for ARM Architecture the immediate
2992 // field is sign-extended to form the addend.
2993 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
2996 // Insert X into VAL based on the ARM instruction encoding described
2998 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2999 insert_val_arm_movw_movt(
3000 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3001 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3005 val
|= (x
& 0xf000) << 4;
3009 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3012 // imm16 := imm4 | i | imm3 | imm8
3014 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3015 // +---------+-+-----------+-------++-+-----+-------+---------------+
3016 // | |i| |imm4 || |imm3 | |imm8 |
3017 // +---------+-+-----------+-------++-+-----+-------+---------------+
3019 // Extract the relocation addend from VAL based on the Thumb2
3020 // instruction encoding described above.
3021 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3022 extract_thumb_movw_movt_addend(
3023 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3025 // According to the Elf ABI for ARM Architecture the immediate
3026 // field is sign-extended to form the addend.
3027 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3028 | ((val
>> 15) & 0x0800)
3029 | ((val
>> 4) & 0x0700)
3033 // Insert X into VAL based on the Thumb2 instruction encoding
3035 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3036 insert_val_thumb_movw_movt(
3037 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3038 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3041 val
|= (x
& 0xf000) << 4;
3042 val
|= (x
& 0x0800) << 15;
3043 val
|= (x
& 0x0700) << 4;
3044 val
|= (x
& 0x00ff);
3048 // Calculate the smallest constant Kn for the specified residual.
3049 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3051 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3057 // Determine the most significant bit in the residual and
3058 // align the resulting value to a 2-bit boundary.
3059 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3061 // The desired shift is now (msb - 6), or zero, whichever
3063 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3066 // Calculate the final residual for the specified group index.
3067 // If the passed group index is less than zero, the method will return
3068 // the value of the specified residual without any change.
3069 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3070 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3071 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3074 for (int n
= 0; n
<= group
; n
++)
3076 // Calculate which part of the value to mask.
3077 uint32_t shift
= calc_grp_kn(residual
);
3078 // Calculate the residual for the next time around.
3079 residual
&= ~(residual
& (0xff << shift
));
3085 // Calculate the value of Gn for the specified group index.
3086 // We return it in the form of an encoded constant-and-rotation.
3087 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3088 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3089 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3092 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3095 for (int n
= 0; n
<= group
; n
++)
3097 // Calculate which part of the value to mask.
3098 shift
= calc_grp_kn(residual
);
3099 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3100 gn
= residual
& (0xff << shift
);
3101 // Calculate the residual for the next time around.
3104 // Return Gn in the form of an encoded constant-and-rotation.
3105 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3109 // Handle ARM long branches.
3110 static typename
This::Status
3111 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3112 unsigned char*, const Sized_symbol
<32>*,
3113 const Arm_relobj
<big_endian
>*, unsigned int,
3114 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3116 // Handle THUMB long branches.
3117 static typename
This::Status
3118 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3119 unsigned char*, const Sized_symbol
<32>*,
3120 const Arm_relobj
<big_endian
>*, unsigned int,
3121 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3124 // Return the branch offset of a 32-bit THUMB branch.
3125 static inline int32_t
3126 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3128 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3129 // involving the J1 and J2 bits.
3130 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3131 uint32_t upper
= upper_insn
& 0x3ffU
;
3132 uint32_t lower
= lower_insn
& 0x7ffU
;
3133 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3134 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3135 uint32_t i1
= j1
^ s
? 0 : 1;
3136 uint32_t i2
= j2
^ s
? 0 : 1;
3138 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3139 | (upper
<< 12) | (lower
<< 1));
3142 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3143 // UPPER_INSN is the original upper instruction of the branch. Caller is
3144 // responsible for overflow checking and BLX offset adjustment.
3145 static inline uint16_t
3146 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3148 uint32_t s
= offset
< 0 ? 1 : 0;
3149 uint32_t bits
= static_cast<uint32_t>(offset
);
3150 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3153 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3154 // LOWER_INSN is the original lower instruction of the branch. Caller is
3155 // responsible for overflow checking and BLX offset adjustment.
3156 static inline uint16_t
3157 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3159 uint32_t s
= offset
< 0 ? 1 : 0;
3160 uint32_t bits
= static_cast<uint32_t>(offset
);
3161 return ((lower_insn
& ~0x2fffU
)
3162 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3163 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3164 | ((bits
>> 1) & 0x7ffU
));
3167 // Return the branch offset of a 32-bit THUMB conditional branch.
3168 static inline int32_t
3169 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3171 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3172 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3173 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3174 uint32_t lower
= (lower_insn
& 0x07ffU
);
3175 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3177 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3180 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3181 // instruction. UPPER_INSN is the original upper instruction of the branch.
3182 // Caller is responsible for overflow checking.
3183 static inline uint16_t
3184 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3186 uint32_t s
= offset
< 0 ? 1 : 0;
3187 uint32_t bits
= static_cast<uint32_t>(offset
);
3188 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3191 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3192 // instruction. LOWER_INSN is the original lower instruction of the branch.
3193 // The caller is responsible for overflow checking.
3194 static inline uint16_t
3195 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3197 uint32_t bits
= static_cast<uint32_t>(offset
);
3198 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3199 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3200 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3202 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3205 // R_ARM_ABS8: S + A
3206 static inline typename
This::Status
3207 abs8(unsigned char* view
,
3208 const Sized_relobj_file
<32, big_endian
>* object
,
3209 const Symbol_value
<32>* psymval
)
3211 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3212 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3213 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3214 int32_t addend
= Bits
<8>::sign_extend32(val
);
3215 Arm_address x
= psymval
->value(object
, addend
);
3216 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3217 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3219 // R_ARM_ABS8 permits signed or unsigned results.
3220 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3221 ? This::STATUS_OVERFLOW
3222 : This::STATUS_OKAY
);
3225 // R_ARM_THM_ABS5: S + A
3226 static inline typename
This::Status
3227 thm_abs5(unsigned char* view
,
3228 const Sized_relobj_file
<32, big_endian
>* object
,
3229 const Symbol_value
<32>* psymval
)
3231 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3232 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3233 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3234 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3235 Reltype addend
= (val
& 0x7e0U
) >> 6;
3236 Reltype x
= psymval
->value(object
, addend
);
3237 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3238 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3239 return (Bits
<5>::has_overflow32(x
)
3240 ? This::STATUS_OVERFLOW
3241 : This::STATUS_OKAY
);
3244 // R_ARM_ABS12: S + A
3245 static inline typename
This::Status
3246 abs12(unsigned char* view
,
3247 const Sized_relobj_file
<32, big_endian
>* object
,
3248 const Symbol_value
<32>* psymval
)
3250 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3251 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3252 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3253 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3254 Reltype addend
= val
& 0x0fffU
;
3255 Reltype x
= psymval
->value(object
, addend
);
3256 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3257 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3258 return (Bits
<12>::has_overflow32(x
)
3259 ? This::STATUS_OVERFLOW
3260 : This::STATUS_OKAY
);
3263 // R_ARM_ABS16: S + A
3264 static inline typename
This::Status
3265 abs16(unsigned char* view
,
3266 const Sized_relobj_file
<32, big_endian
>* object
,
3267 const Symbol_value
<32>* psymval
)
3269 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3270 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3271 int32_t addend
= Bits
<16>::sign_extend32(val
);
3272 Arm_address x
= psymval
->value(object
, addend
);
3273 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3274 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3276 // R_ARM_ABS16 permits signed or unsigned results.
3277 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3278 ? This::STATUS_OVERFLOW
3279 : This::STATUS_OKAY
);
3282 // R_ARM_ABS32: (S + A) | T
3283 static inline typename
This::Status
3284 abs32(unsigned char* view
,
3285 const Sized_relobj_file
<32, big_endian
>* object
,
3286 const Symbol_value
<32>* psymval
,
3287 Arm_address thumb_bit
)
3289 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3290 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3291 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3292 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3293 return This::STATUS_OKAY
;
3296 // R_ARM_REL32: (S + A) | T - P
3297 static inline typename
This::Status
3298 rel32(unsigned char* view
,
3299 const Sized_relobj_file
<32, big_endian
>* object
,
3300 const Symbol_value
<32>* psymval
,
3301 Arm_address address
,
3302 Arm_address thumb_bit
)
3304 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3305 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3306 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3307 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3308 return This::STATUS_OKAY
;
3311 // R_ARM_THM_JUMP24: (S + A) | T - P
3312 static typename
This::Status
3313 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3314 const Symbol_value
<32>* psymval
, Arm_address address
,
3315 Arm_address thumb_bit
);
3317 // R_ARM_THM_JUMP6: S + A – P
3318 static inline typename
This::Status
3319 thm_jump6(unsigned char* view
,
3320 const Sized_relobj_file
<32, big_endian
>* object
,
3321 const Symbol_value
<32>* psymval
,
3322 Arm_address address
)
3324 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3325 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3326 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3327 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3328 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3329 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3330 Reltype x
= (psymval
->value(object
, addend
) - address
);
3331 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3332 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3333 // CZB does only forward jumps.
3334 return ((x
> 0x007e)
3335 ? This::STATUS_OVERFLOW
3336 : This::STATUS_OKAY
);
3339 // R_ARM_THM_JUMP8: S + A – P
3340 static inline typename
This::Status
3341 thm_jump8(unsigned char* view
,
3342 const Sized_relobj_file
<32, big_endian
>* object
,
3343 const Symbol_value
<32>* psymval
,
3344 Arm_address address
)
3346 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3347 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3348 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3349 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3350 int32_t x
= (psymval
->value(object
, addend
) - address
);
3351 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3352 | ((x
& 0x01fe) >> 1)));
3353 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3354 return (Bits
<9>::has_overflow32(x
)
3355 ? This::STATUS_OVERFLOW
3356 : This::STATUS_OKAY
);
3359 // R_ARM_THM_JUMP11: S + A – P
3360 static inline typename
This::Status
3361 thm_jump11(unsigned char* view
,
3362 const Sized_relobj_file
<32, big_endian
>* object
,
3363 const Symbol_value
<32>* psymval
,
3364 Arm_address address
)
3366 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3367 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3368 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3369 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3370 int32_t x
= (psymval
->value(object
, addend
) - address
);
3371 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3372 | ((x
& 0x0ffe) >> 1)));
3373 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3374 return (Bits
<12>::has_overflow32(x
)
3375 ? This::STATUS_OVERFLOW
3376 : This::STATUS_OKAY
);
3379 // R_ARM_BASE_PREL: B(S) + A - P
3380 static inline typename
This::Status
3381 base_prel(unsigned char* view
,
3383 Arm_address address
)
3385 Base::rel32(view
, origin
- address
);
3389 // R_ARM_BASE_ABS: B(S) + A
3390 static inline typename
This::Status
3391 base_abs(unsigned char* view
,
3394 Base::rel32(view
, origin
);
3398 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3399 static inline typename
This::Status
3400 got_brel(unsigned char* view
,
3401 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3403 Base::rel32(view
, got_offset
);
3404 return This::STATUS_OKAY
;
3407 // R_ARM_GOT_PREL: GOT(S) + A - P
3408 static inline typename
This::Status
3409 got_prel(unsigned char* view
,
3410 Arm_address got_entry
,
3411 Arm_address address
)
3413 Base::rel32(view
, got_entry
- address
);
3414 return This::STATUS_OKAY
;
3417 // R_ARM_PREL: (S + A) | T - P
3418 static inline typename
This::Status
3419 prel31(unsigned char* view
,
3420 const Sized_relobj_file
<32, big_endian
>* object
,
3421 const Symbol_value
<32>* psymval
,
3422 Arm_address address
,
3423 Arm_address thumb_bit
)
3425 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3426 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3427 Valtype addend
= Bits
<31>::sign_extend32(val
);
3428 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3429 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3430 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3431 return (Bits
<31>::has_overflow32(x
)
3432 ? This::STATUS_OVERFLOW
3433 : This::STATUS_OKAY
);
3436 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3437 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3438 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3439 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3440 static inline typename
This::Status
3441 movw(unsigned char* view
,
3442 const Sized_relobj_file
<32, big_endian
>* object
,
3443 const Symbol_value
<32>* psymval
,
3444 Arm_address relative_address_base
,
3445 Arm_address thumb_bit
,
3446 bool check_overflow
)
3448 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3449 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3450 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3451 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3452 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3453 - relative_address_base
);
3454 val
= This::insert_val_arm_movw_movt(val
, x
);
3455 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3456 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3457 ? This::STATUS_OVERFLOW
3458 : This::STATUS_OKAY
);
3461 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3462 // R_ARM_MOVT_PREL: S + A - P
3463 // R_ARM_MOVT_BREL: S + A - B(S)
3464 static inline typename
This::Status
3465 movt(unsigned char* view
,
3466 const Sized_relobj_file
<32, big_endian
>* object
,
3467 const Symbol_value
<32>* psymval
,
3468 Arm_address relative_address_base
)
3470 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3471 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3472 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3473 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3474 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3475 val
= This::insert_val_arm_movw_movt(val
, x
);
3476 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3477 // FIXME: IHI0044D says that we should check for overflow.
3478 return This::STATUS_OKAY
;
3481 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3482 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3483 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3484 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3485 static inline typename
This::Status
3486 thm_movw(unsigned char* view
,
3487 const Sized_relobj_file
<32, big_endian
>* object
,
3488 const Symbol_value
<32>* psymval
,
3489 Arm_address relative_address_base
,
3490 Arm_address thumb_bit
,
3491 bool check_overflow
)
3493 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3494 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3495 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3496 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3497 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3498 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3500 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3501 val
= This::insert_val_thumb_movw_movt(val
, x
);
3502 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3503 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3504 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3505 ? This::STATUS_OVERFLOW
3506 : This::STATUS_OKAY
);
3509 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3510 // R_ARM_THM_MOVT_PREL: S + A - P
3511 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3512 static inline typename
This::Status
3513 thm_movt(unsigned char* view
,
3514 const Sized_relobj_file
<32, big_endian
>* object
,
3515 const Symbol_value
<32>* psymval
,
3516 Arm_address relative_address_base
)
3518 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3519 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3520 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3521 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3522 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3523 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3524 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3525 val
= This::insert_val_thumb_movw_movt(val
, x
);
3526 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3527 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3528 return This::STATUS_OKAY
;
3531 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3532 static inline typename
This::Status
3533 thm_alu11(unsigned char* view
,
3534 const Sized_relobj_file
<32, big_endian
>* object
,
3535 const Symbol_value
<32>* psymval
,
3536 Arm_address address
,
3537 Arm_address thumb_bit
)
3539 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3540 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3541 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3542 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3543 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3545 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3546 // -----------------------------------------------------------------------
3547 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3548 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3549 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3550 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3551 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3552 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3554 // Determine a sign for the addend.
3555 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3556 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3557 // Thumb2 addend encoding:
3558 // imm12 := i | imm3 | imm8
3559 int32_t addend
= (insn
& 0xff)
3560 | ((insn
& 0x00007000) >> 4)
3561 | ((insn
& 0x04000000) >> 15);
3562 // Apply a sign to the added.
3565 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3566 - (address
& 0xfffffffc);
3567 Reltype val
= abs(x
);
3568 // Mask out the value and a distinct part of the ADD/SUB opcode
3569 // (bits 7:5 of opword).
3570 insn
= (insn
& 0xfb0f8f00)
3572 | ((val
& 0x700) << 4)
3573 | ((val
& 0x800) << 15);
3574 // Set the opcode according to whether the value to go in the
3575 // place is negative.
3579 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3580 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3581 return ((val
> 0xfff) ?
3582 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3585 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3586 static inline typename
This::Status
3587 thm_pc8(unsigned char* view
,
3588 const Sized_relobj_file
<32, big_endian
>* object
,
3589 const Symbol_value
<32>* psymval
,
3590 Arm_address address
)
3592 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3593 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3594 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3595 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3596 Reltype addend
= ((insn
& 0x00ff) << 2);
3597 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3598 Reltype val
= abs(x
);
3599 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3601 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3602 return ((val
> 0x03fc)
3603 ? This::STATUS_OVERFLOW
3604 : This::STATUS_OKAY
);
3607 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3608 static inline typename
This::Status
3609 thm_pc12(unsigned char* view
,
3610 const Sized_relobj_file
<32, big_endian
>* object
,
3611 const Symbol_value
<32>* psymval
,
3612 Arm_address address
)
3614 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3615 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3616 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3617 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3618 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3619 // Determine a sign for the addend (positive if the U bit is 1).
3620 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3621 int32_t addend
= (insn
& 0xfff);
3622 // Apply a sign to the added.
3625 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3626 Reltype val
= abs(x
);
3627 // Mask out and apply the value and the U bit.
3628 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3629 // Set the U bit according to whether the value to go in the
3630 // place is positive.
3634 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3635 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3636 return ((val
> 0xfff) ?
3637 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3641 static inline typename
This::Status
3642 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3643 unsigned char* view
,
3644 const Arm_relobj
<big_endian
>* object
,
3645 const Arm_address address
,
3646 const bool is_interworking
)
3649 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3650 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3651 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3653 // Ensure that we have a BX instruction.
3654 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3655 const uint32_t reg
= (val
& 0xf);
3656 if (is_interworking
&& reg
!= 0xf)
3658 Stub_table
<big_endian
>* stub_table
=
3659 object
->stub_table(relinfo
->data_shndx
);
3660 gold_assert(stub_table
!= NULL
);
3662 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3663 gold_assert(stub
!= NULL
);
3665 int32_t veneer_address
=
3666 stub_table
->address() + stub
->offset() - 8 - address
;
3667 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3668 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3669 // Replace with a branch to veneer (B <addr>)
3670 val
= (val
& 0xf0000000) | 0x0a000000
3671 | ((veneer_address
>> 2) & 0x00ffffff);
3675 // Preserve Rm (lowest four bits) and the condition code
3676 // (highest four bits). Other bits encode MOV PC,Rm.
3677 val
= (val
& 0xf000000f) | 0x01a0f000;
3679 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3680 return This::STATUS_OKAY
;
3683 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3684 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3685 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3686 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3687 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3688 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3689 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3690 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3691 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3692 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3693 static inline typename
This::Status
3694 arm_grp_alu(unsigned char* view
,
3695 const Sized_relobj_file
<32, big_endian
>* object
,
3696 const Symbol_value
<32>* psymval
,
3698 Arm_address address
,
3699 Arm_address thumb_bit
,
3700 bool check_overflow
)
3702 gold_assert(group
>= 0 && group
< 3);
3703 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3704 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3705 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3707 // ALU group relocations are allowed only for the ADD/SUB instructions.
3708 // (0x00800000 - ADD, 0x00400000 - SUB)
3709 const Valtype opcode
= insn
& 0x01e00000;
3710 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3711 return This::STATUS_BAD_RELOC
;
3713 // Determine a sign for the addend.
3714 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3715 // shifter = rotate_imm * 2
3716 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3717 // Initial addend value.
3718 int32_t addend
= insn
& 0xff;
3719 // Rotate addend right by shifter.
3720 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3721 // Apply a sign to the added.
3724 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3725 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3726 // Check for overflow if required
3728 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3729 return This::STATUS_OVERFLOW
;
3731 // Mask out the value and the ADD/SUB part of the opcode; take care
3732 // not to destroy the S bit.
3734 // Set the opcode according to whether the value to go in the
3735 // place is negative.
3736 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3737 // Encode the offset (encoded Gn).
3740 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3741 return This::STATUS_OKAY
;
3744 // R_ARM_LDR_PC_G0: S + A - P
3745 // R_ARM_LDR_PC_G1: S + A - P
3746 // R_ARM_LDR_PC_G2: S + A - P
3747 // R_ARM_LDR_SB_G0: S + A - B(S)
3748 // R_ARM_LDR_SB_G1: S + A - B(S)
3749 // R_ARM_LDR_SB_G2: S + A - B(S)
3750 static inline typename
This::Status
3751 arm_grp_ldr(unsigned char* view
,
3752 const Sized_relobj_file
<32, big_endian
>* object
,
3753 const Symbol_value
<32>* psymval
,
3755 Arm_address address
)
3757 gold_assert(group
>= 0 && group
< 3);
3758 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3759 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3760 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3762 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3763 int32_t addend
= (insn
& 0xfff) * sign
;
3764 int32_t x
= (psymval
->value(object
, addend
) - address
);
3765 // Calculate the relevant G(n-1) value to obtain this stage residual.
3767 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3768 if (residual
>= 0x1000)
3769 return This::STATUS_OVERFLOW
;
3771 // Mask out the value and U bit.
3773 // Set the U bit for non-negative values.
3778 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3779 return This::STATUS_OKAY
;
3782 // R_ARM_LDRS_PC_G0: S + A - P
3783 // R_ARM_LDRS_PC_G1: S + A - P
3784 // R_ARM_LDRS_PC_G2: S + A - P
3785 // R_ARM_LDRS_SB_G0: S + A - B(S)
3786 // R_ARM_LDRS_SB_G1: S + A - B(S)
3787 // R_ARM_LDRS_SB_G2: S + A - B(S)
3788 static inline typename
This::Status
3789 arm_grp_ldrs(unsigned char* view
,
3790 const Sized_relobj_file
<32, big_endian
>* object
,
3791 const Symbol_value
<32>* psymval
,
3793 Arm_address address
)
3795 gold_assert(group
>= 0 && group
< 3);
3796 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3797 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3798 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3800 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3801 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3802 int32_t x
= (psymval
->value(object
, addend
) - address
);
3803 // Calculate the relevant G(n-1) value to obtain this stage residual.
3805 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3806 if (residual
>= 0x100)
3807 return This::STATUS_OVERFLOW
;
3809 // Mask out the value and U bit.
3811 // Set the U bit for non-negative values.
3814 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3816 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3817 return This::STATUS_OKAY
;
3820 // R_ARM_LDC_PC_G0: S + A - P
3821 // R_ARM_LDC_PC_G1: S + A - P
3822 // R_ARM_LDC_PC_G2: S + A - P
3823 // R_ARM_LDC_SB_G0: S + A - B(S)
3824 // R_ARM_LDC_SB_G1: S + A - B(S)
3825 // R_ARM_LDC_SB_G2: S + A - B(S)
3826 static inline typename
This::Status
3827 arm_grp_ldc(unsigned char* view
,
3828 const Sized_relobj_file
<32, big_endian
>* object
,
3829 const Symbol_value
<32>* psymval
,
3831 Arm_address address
)
3833 gold_assert(group
>= 0 && group
< 3);
3834 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3835 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3836 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3838 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3839 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3840 int32_t x
= (psymval
->value(object
, addend
) - address
);
3841 // Calculate the relevant G(n-1) value to obtain this stage residual.
3843 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3844 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3845 return This::STATUS_OVERFLOW
;
3847 // Mask out the value and U bit.
3849 // Set the U bit for non-negative values.
3852 insn
|= (residual
>> 2);
3854 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3855 return This::STATUS_OKAY
;
3859 // Relocate ARM long branches. This handles relocation types
3860 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3861 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3862 // undefined and we do not use PLT in this relocation. In such a case,
3863 // the branch is converted into an NOP.
3865 template<bool big_endian
>
3866 typename Arm_relocate_functions
<big_endian
>::Status
3867 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3868 unsigned int r_type
,
3869 const Relocate_info
<32, big_endian
>* relinfo
,
3870 unsigned char* view
,
3871 const Sized_symbol
<32>* gsym
,
3872 const Arm_relobj
<big_endian
>* object
,
3874 const Symbol_value
<32>* psymval
,
3875 Arm_address address
,
3876 Arm_address thumb_bit
,
3877 bool is_weakly_undefined_without_plt
)
3879 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3880 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3881 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3883 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3884 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3885 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3886 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3887 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3888 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3889 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3891 // Check that the instruction is valid.
3892 if (r_type
== elfcpp::R_ARM_CALL
)
3894 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3895 return This::STATUS_BAD_RELOC
;
3897 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3899 if (!insn_is_b
&& !insn_is_cond_bl
)
3900 return This::STATUS_BAD_RELOC
;
3902 else if (r_type
== elfcpp::R_ARM_PLT32
)
3904 if (!insn_is_any_branch
)
3905 return This::STATUS_BAD_RELOC
;
3907 else if (r_type
== elfcpp::R_ARM_XPC25
)
3909 // FIXME: AAELF document IH0044C does not say much about it other
3910 // than it being obsolete.
3911 if (!insn_is_any_branch
)
3912 return This::STATUS_BAD_RELOC
;
3917 // A branch to an undefined weak symbol is turned into a jump to
3918 // the next instruction unless a PLT entry will be created.
3919 // Do the same for local undefined symbols.
3920 // The jump to the next instruction is optimized as a NOP depending
3921 // on the architecture.
3922 const Target_arm
<big_endian
>* arm_target
=
3923 Target_arm
<big_endian
>::default_target();
3924 if (is_weakly_undefined_without_plt
)
3926 gold_assert(!parameters
->options().relocatable());
3927 Valtype cond
= val
& 0xf0000000U
;
3928 if (arm_target
->may_use_arm_nop())
3929 val
= cond
| 0x0320f000;
3931 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3932 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3933 return This::STATUS_OKAY
;
3936 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
3937 Valtype branch_target
= psymval
->value(object
, addend
);
3938 int32_t branch_offset
= branch_target
- address
;
3940 // We need a stub if the branch offset is too large or if we need
3942 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
3943 Reloc_stub
* stub
= NULL
;
3945 if (!parameters
->options().relocatable()
3946 && (Bits
<26>::has_overflow32(branch_offset
)
3947 || ((thumb_bit
!= 0)
3948 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3950 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3952 Stub_type stub_type
=
3953 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3954 unadjusted_branch_target
,
3956 if (stub_type
!= arm_stub_none
)
3958 Stub_table
<big_endian
>* stub_table
=
3959 object
->stub_table(relinfo
->data_shndx
);
3960 gold_assert(stub_table
!= NULL
);
3962 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3963 stub
= stub_table
->find_reloc_stub(stub_key
);
3964 gold_assert(stub
!= NULL
);
3965 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3966 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3967 branch_offset
= branch_target
- address
;
3968 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
3972 // At this point, if we still need to switch mode, the instruction
3973 // must either be a BLX or a BL that can be converted to a BLX.
3977 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3978 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3981 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
3982 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3983 return (Bits
<26>::has_overflow32(branch_offset
)
3984 ? This::STATUS_OVERFLOW
3985 : This::STATUS_OKAY
);
3988 // Relocate THUMB long branches. This handles relocation types
3989 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3990 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3991 // undefined and we do not use PLT in this relocation. In such a case,
3992 // the branch is converted into an NOP.
3994 template<bool big_endian
>
3995 typename Arm_relocate_functions
<big_endian
>::Status
3996 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3997 unsigned int r_type
,
3998 const Relocate_info
<32, big_endian
>* relinfo
,
3999 unsigned char* view
,
4000 const Sized_symbol
<32>* gsym
,
4001 const Arm_relobj
<big_endian
>* object
,
4003 const Symbol_value
<32>* psymval
,
4004 Arm_address address
,
4005 Arm_address thumb_bit
,
4006 bool is_weakly_undefined_without_plt
)
4008 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4009 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4010 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4011 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4013 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4015 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4016 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4018 // Check that the instruction is valid.
4019 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4021 if (!is_bl_insn
&& !is_blx_insn
)
4022 return This::STATUS_BAD_RELOC
;
4024 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4026 // This cannot be a BLX.
4028 return This::STATUS_BAD_RELOC
;
4030 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4032 // Check for Thumb to Thumb call.
4034 return This::STATUS_BAD_RELOC
;
4037 gold_warning(_("%s: Thumb BLX instruction targets "
4038 "thumb function '%s'."),
4039 object
->name().c_str(),
4040 (gsym
? gsym
->name() : "(local)"));
4041 // Convert BLX to BL.
4042 lower_insn
|= 0x1000U
;
4048 // A branch to an undefined weak symbol is turned into a jump to
4049 // the next instruction unless a PLT entry will be created.
4050 // The jump to the next instruction is optimized as a NOP.W for
4051 // Thumb-2 enabled architectures.
4052 const Target_arm
<big_endian
>* arm_target
=
4053 Target_arm
<big_endian
>::default_target();
4054 if (is_weakly_undefined_without_plt
)
4056 gold_assert(!parameters
->options().relocatable());
4057 if (arm_target
->may_use_thumb2_nop())
4059 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4060 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4064 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4065 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4067 return This::STATUS_OKAY
;
4070 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4071 Arm_address branch_target
= psymval
->value(object
, addend
);
4073 // For BLX, bit 1 of target address comes from bit 1 of base address.
4074 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4075 if (thumb_bit
== 0 && may_use_blx
)
4076 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4078 int32_t branch_offset
= branch_target
- address
;
4080 // We need a stub if the branch offset is too large or if we need
4082 bool thumb2
= arm_target
->using_thumb2();
4083 if (!parameters
->options().relocatable()
4084 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4085 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4086 || ((thumb_bit
== 0)
4087 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4088 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4090 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4092 Stub_type stub_type
=
4093 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4094 unadjusted_branch_target
,
4097 if (stub_type
!= arm_stub_none
)
4099 Stub_table
<big_endian
>* stub_table
=
4100 object
->stub_table(relinfo
->data_shndx
);
4101 gold_assert(stub_table
!= NULL
);
4103 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4104 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4105 gold_assert(stub
!= NULL
);
4106 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4107 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4108 if (thumb_bit
== 0 && may_use_blx
)
4109 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4110 branch_offset
= branch_target
- address
;
4114 // At this point, if we still need to switch mode, the instruction
4115 // must either be a BLX or a BL that can be converted to a BLX.
4118 gold_assert(may_use_blx
4119 && (r_type
== elfcpp::R_ARM_THM_CALL
4120 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4121 // Make sure this is a BLX.
4122 lower_insn
&= ~0x1000U
;
4126 // Make sure this is a BL.
4127 lower_insn
|= 0x1000U
;
4130 // For a BLX instruction, make sure that the relocation is rounded up
4131 // to a word boundary. This follows the semantics of the instruction
4132 // which specifies that bit 1 of the target address will come from bit
4133 // 1 of the base address.
4134 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4135 gold_assert((branch_offset
& 3) == 0);
4137 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4138 // We use the Thumb-2 encoding, which is safe even if dealing with
4139 // a Thumb-1 instruction by virtue of our overflow check above. */
4140 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4141 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4143 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4144 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4146 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4149 ? Bits
<25>::has_overflow32(branch_offset
)
4150 : Bits
<23>::has_overflow32(branch_offset
))
4151 ? This::STATUS_OVERFLOW
4152 : This::STATUS_OKAY
);
4155 // Relocate THUMB-2 long conditional branches.
4156 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4157 // undefined and we do not use PLT in this relocation. In such a case,
4158 // the branch is converted into an NOP.
4160 template<bool big_endian
>
4161 typename Arm_relocate_functions
<big_endian
>::Status
4162 Arm_relocate_functions
<big_endian
>::thm_jump19(
4163 unsigned char* view
,
4164 const Arm_relobj
<big_endian
>* object
,
4165 const Symbol_value
<32>* psymval
,
4166 Arm_address address
,
4167 Arm_address thumb_bit
)
4169 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4170 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4171 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4172 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4173 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4175 Arm_address branch_target
= psymval
->value(object
, addend
);
4176 int32_t branch_offset
= branch_target
- address
;
4178 // ??? Should handle interworking? GCC might someday try to
4179 // use this for tail calls.
4180 // FIXME: We do support thumb entry to PLT yet.
4183 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4184 return This::STATUS_BAD_RELOC
;
4187 // Put RELOCATION back into the insn.
4188 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4189 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4191 // Put the relocated value back in the object file:
4192 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4193 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4195 return (Bits
<21>::has_overflow32(branch_offset
)
4196 ? This::STATUS_OVERFLOW
4197 : This::STATUS_OKAY
);
4200 // Get the GOT section, creating it if necessary.
4202 template<bool big_endian
>
4203 Arm_output_data_got
<big_endian
>*
4204 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4206 if (this->got_
== NULL
)
4208 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4210 // When using -z now, we can treat .got as a relro section.
4211 // Without -z now, it is modified after program startup by lazy
4213 bool is_got_relro
= parameters
->options().now();
4214 Output_section_order got_order
= (is_got_relro
4218 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4219 // .got.plt sections in output. The output .got section contains both
4220 // PLT and non-PLT GOT entries.
4221 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4223 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4224 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4225 this->got_
, got_order
, is_got_relro
);
4227 // The old GNU linker creates a .got.plt section. We just
4228 // create another set of data in the .got section. Note that we
4229 // always create a PLT if we create a GOT, although the PLT
4231 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4232 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4233 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4234 this->got_plt_
, got_order
, is_got_relro
);
4236 // The first three entries are reserved.
4237 this->got_plt_
->set_current_data_size(3 * 4);
4239 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4240 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4241 Symbol_table::PREDEFINED
,
4243 0, 0, elfcpp::STT_OBJECT
,
4245 elfcpp::STV_HIDDEN
, 0,
4251 // Get the dynamic reloc section, creating it if necessary.
4253 template<bool big_endian
>
4254 typename Target_arm
<big_endian
>::Reloc_section
*
4255 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4257 if (this->rel_dyn_
== NULL
)
4259 gold_assert(layout
!= NULL
);
4260 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4261 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4262 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4263 ORDER_DYNAMIC_RELOCS
, false);
4265 return this->rel_dyn_
;
4268 // Insn_template methods.
4270 // Return byte size of an instruction template.
4273 Insn_template::size() const
4275 switch (this->type())
4278 case THUMB16_SPECIAL_TYPE
:
4289 // Return alignment of an instruction template.
4292 Insn_template::alignment() const
4294 switch (this->type())
4297 case THUMB16_SPECIAL_TYPE
:
4308 // Stub_template methods.
4310 Stub_template::Stub_template(
4311 Stub_type type
, const Insn_template
* insns
,
4313 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4314 entry_in_thumb_mode_(false), relocs_()
4318 // Compute byte size and alignment of stub template.
4319 for (size_t i
= 0; i
< insn_count
; i
++)
4321 unsigned insn_alignment
= insns
[i
].alignment();
4322 size_t insn_size
= insns
[i
].size();
4323 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4324 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4325 switch (insns
[i
].type())
4327 case Insn_template::THUMB16_TYPE
:
4328 case Insn_template::THUMB16_SPECIAL_TYPE
:
4330 this->entry_in_thumb_mode_
= true;
4333 case Insn_template::THUMB32_TYPE
:
4334 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4335 this->relocs_
.push_back(Reloc(i
, offset
));
4337 this->entry_in_thumb_mode_
= true;
4340 case Insn_template::ARM_TYPE
:
4341 // Handle cases where the target is encoded within the
4343 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4344 this->relocs_
.push_back(Reloc(i
, offset
));
4347 case Insn_template::DATA_TYPE
:
4348 // Entry point cannot be data.
4349 gold_assert(i
!= 0);
4350 this->relocs_
.push_back(Reloc(i
, offset
));
4356 offset
+= insn_size
;
4358 this->size_
= offset
;
4363 // Template to implement do_write for a specific target endianness.
4365 template<bool big_endian
>
4367 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4369 const Stub_template
* stub_template
= this->stub_template();
4370 const Insn_template
* insns
= stub_template
->insns();
4372 // FIXME: We do not handle BE8 encoding yet.
4373 unsigned char* pov
= view
;
4374 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4376 switch (insns
[i
].type())
4378 case Insn_template::THUMB16_TYPE
:
4379 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4381 case Insn_template::THUMB16_SPECIAL_TYPE
:
4382 elfcpp::Swap
<16, big_endian
>::writeval(
4384 this->thumb16_special(i
));
4386 case Insn_template::THUMB32_TYPE
:
4388 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4389 uint32_t lo
= insns
[i
].data() & 0xffff;
4390 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4391 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4394 case Insn_template::ARM_TYPE
:
4395 case Insn_template::DATA_TYPE
:
4396 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4401 pov
+= insns
[i
].size();
4403 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4406 // Reloc_stub::Key methods.
4408 // Dump a Key as a string for debugging.
4411 Reloc_stub::Key::name() const
4413 if (this->r_sym_
== invalid_index
)
4415 // Global symbol key name
4416 // <stub-type>:<symbol name>:<addend>.
4417 const std::string sym_name
= this->u_
.symbol
->name();
4418 // We need to print two hex number and two colons. So just add 100 bytes
4419 // to the symbol name size.
4420 size_t len
= sym_name
.size() + 100;
4421 char* buffer
= new char[len
];
4422 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4423 sym_name
.c_str(), this->addend_
);
4424 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4426 return std::string(buffer
);
4430 // local symbol key name
4431 // <stub-type>:<object>:<r_sym>:<addend>.
4432 const size_t len
= 200;
4434 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4435 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4436 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4437 return std::string(buffer
);
4441 // Reloc_stub methods.
4443 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4444 // LOCATION to DESTINATION.
4445 // This code is based on the arm_type_of_stub function in
4446 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4450 Reloc_stub::stub_type_for_reloc(
4451 unsigned int r_type
,
4452 Arm_address location
,
4453 Arm_address destination
,
4454 bool target_is_thumb
)
4456 Stub_type stub_type
= arm_stub_none
;
4458 // This is a bit ugly but we want to avoid using a templated class for
4459 // big and little endianities.
4461 bool should_force_pic_veneer
;
4464 if (parameters
->target().is_big_endian())
4466 const Target_arm
<true>* big_endian_target
=
4467 Target_arm
<true>::default_target();
4468 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4469 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4470 thumb2
= big_endian_target
->using_thumb2();
4471 thumb_only
= big_endian_target
->using_thumb_only();
4475 const Target_arm
<false>* little_endian_target
=
4476 Target_arm
<false>::default_target();
4477 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4478 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4479 thumb2
= little_endian_target
->using_thumb2();
4480 thumb_only
= little_endian_target
->using_thumb_only();
4483 int64_t branch_offset
;
4484 bool output_is_position_independent
=
4485 parameters
->options().output_is_position_independent();
4486 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4488 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4489 // base address (instruction address + 4).
4490 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4491 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4492 branch_offset
= static_cast<int64_t>(destination
) - location
;
4494 // Handle cases where:
4495 // - this call goes too far (different Thumb/Thumb2 max
4497 // - it's a Thumb->Arm call and blx is not available, or it's a
4498 // Thumb->Arm branch (not bl). A stub is needed in this case.
4500 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4501 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4503 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4504 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4505 || ((!target_is_thumb
)
4506 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4507 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4509 if (target_is_thumb
)
4514 stub_type
= (output_is_position_independent
4515 || should_force_pic_veneer
)
4518 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4519 // V5T and above. Stub starts with ARM code, so
4520 // we must be able to switch mode before
4521 // reaching it, which is only possible for 'bl'
4522 // (ie R_ARM_THM_CALL relocation).
4523 ? arm_stub_long_branch_any_thumb_pic
4524 // On V4T, use Thumb code only.
4525 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4529 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4530 ? arm_stub_long_branch_any_any
// V5T and above.
4531 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4535 stub_type
= (output_is_position_independent
4536 || should_force_pic_veneer
)
4537 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4538 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4545 // FIXME: We should check that the input section is from an
4546 // object that has interwork enabled.
4548 stub_type
= (output_is_position_independent
4549 || should_force_pic_veneer
)
4552 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4553 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4554 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4558 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4559 ? arm_stub_long_branch_any_any
// V5T and above.
4560 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4562 // Handle v4t short branches.
4563 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4564 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4565 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4566 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4570 else if (r_type
== elfcpp::R_ARM_CALL
4571 || r_type
== elfcpp::R_ARM_JUMP24
4572 || r_type
== elfcpp::R_ARM_PLT32
)
4574 branch_offset
= static_cast<int64_t>(destination
) - location
;
4575 if (target_is_thumb
)
4579 // FIXME: We should check that the input section is from an
4580 // object that has interwork enabled.
4582 // We have an extra 2-bytes reach because of
4583 // the mode change (bit 24 (H) of BLX encoding).
4584 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4585 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4586 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4587 || (r_type
== elfcpp::R_ARM_JUMP24
)
4588 || (r_type
== elfcpp::R_ARM_PLT32
))
4590 stub_type
= (output_is_position_independent
4591 || should_force_pic_veneer
)
4594 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4595 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4599 ? arm_stub_long_branch_any_any
// V5T and above.
4600 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4606 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4607 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4609 stub_type
= (output_is_position_independent
4610 || should_force_pic_veneer
)
4611 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4612 : arm_stub_long_branch_any_any
; /// non-PIC.
4620 // Cortex_a8_stub methods.
4622 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4623 // I is the position of the instruction template in the stub template.
4626 Cortex_a8_stub::do_thumb16_special(size_t i
)
4628 // The only use of this is to copy condition code from a conditional
4629 // branch being worked around to the corresponding conditional branch in
4631 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4633 uint16_t data
= this->stub_template()->insns()[i
].data();
4634 gold_assert((data
& 0xff00U
) == 0xd000U
);
4635 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4639 // Stub_factory methods.
4641 Stub_factory::Stub_factory()
4643 // The instruction template sequences are declared as static
4644 // objects and initialized first time the constructor runs.
4646 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4647 // to reach the stub if necessary.
4648 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4650 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4651 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4652 // dcd R_ARM_ABS32(X)
4655 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4657 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4659 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4660 Insn_template::arm_insn(0xe12fff1c), // bx ip
4661 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4662 // dcd R_ARM_ABS32(X)
4665 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4666 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4668 Insn_template::thumb16_insn(0xb401), // push {r0}
4669 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4670 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4671 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4672 Insn_template::thumb16_insn(0x4760), // bx ip
4673 Insn_template::thumb16_insn(0xbf00), // nop
4674 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4675 // dcd R_ARM_ABS32(X)
4678 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4680 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4682 Insn_template::thumb16_insn(0x4778), // bx pc
4683 Insn_template::thumb16_insn(0x46c0), // nop
4684 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4685 Insn_template::arm_insn(0xe12fff1c), // bx ip
4686 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4687 // dcd R_ARM_ABS32(X)
4690 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4692 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4694 Insn_template::thumb16_insn(0x4778), // bx pc
4695 Insn_template::thumb16_insn(0x46c0), // nop
4696 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4697 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4698 // dcd R_ARM_ABS32(X)
4701 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4702 // one, when the destination is close enough.
4703 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4705 Insn_template::thumb16_insn(0x4778), // bx pc
4706 Insn_template::thumb16_insn(0x46c0), // nop
4707 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4710 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4711 // blx to reach the stub if necessary.
4712 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4714 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4715 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4716 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4717 // dcd R_ARM_REL32(X-4)
4720 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4721 // blx to reach the stub if necessary. We can not add into pc;
4722 // it is not guaranteed to mode switch (different in ARMv6 and
4724 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4726 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4727 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4728 Insn_template::arm_insn(0xe12fff1c), // bx ip
4729 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4730 // dcd R_ARM_REL32(X)
4733 // V4T ARM -> ARM long branch stub, PIC.
4734 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4736 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4737 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4738 Insn_template::arm_insn(0xe12fff1c), // bx ip
4739 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4740 // dcd R_ARM_REL32(X)
4743 // V4T Thumb -> ARM long branch stub, PIC.
4744 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4746 Insn_template::thumb16_insn(0x4778), // bx pc
4747 Insn_template::thumb16_insn(0x46c0), // nop
4748 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4749 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4750 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4751 // dcd R_ARM_REL32(X)
4754 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4756 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4758 Insn_template::thumb16_insn(0xb401), // push {r0}
4759 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4760 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4761 Insn_template::thumb16_insn(0x4484), // add ip, r0
4762 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4763 Insn_template::thumb16_insn(0x4760), // bx ip
4764 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4765 // dcd R_ARM_REL32(X)
4768 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4770 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4772 Insn_template::thumb16_insn(0x4778), // bx pc
4773 Insn_template::thumb16_insn(0x46c0), // nop
4774 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4775 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4776 Insn_template::arm_insn(0xe12fff1c), // bx ip
4777 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4778 // dcd R_ARM_REL32(X)
4781 // Cortex-A8 erratum-workaround stubs.
4783 // Stub used for conditional branches (which may be beyond +/-1MB away,
4784 // so we can't use a conditional branch to reach this stub).
4791 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4793 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4794 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4795 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4799 // Stub used for b.w and bl.w instructions.
4801 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4803 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4806 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4808 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4811 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4812 // instruction (which switches to ARM mode) to point to this stub. Jump to
4813 // the real destination using an ARM-mode branch.
4814 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4816 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4819 // Stub used to provide an interworking for R_ARM_V4BX relocation
4820 // (bx r[n] instruction).
4821 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4823 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4824 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4825 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4828 // Fill in the stub template look-up table. Stub templates are constructed
4829 // per instance of Stub_factory for fast look-up without locking
4830 // in a thread-enabled environment.
4832 this->stub_templates_
[arm_stub_none
] =
4833 new Stub_template(arm_stub_none
, NULL
, 0);
4835 #define DEF_STUB(x) \
4839 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4840 Stub_type type = arm_stub_##x; \
4841 this->stub_templates_[type] = \
4842 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4850 // Stub_table methods.
4852 // Remove all Cortex-A8 stub.
4854 template<bool big_endian
>
4856 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4858 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4859 p
!= this->cortex_a8_stubs_
.end();
4862 this->cortex_a8_stubs_
.clear();
4865 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4867 template<bool big_endian
>
4869 Stub_table
<big_endian
>::relocate_stub(
4871 const Relocate_info
<32, big_endian
>* relinfo
,
4872 Target_arm
<big_endian
>* arm_target
,
4873 Output_section
* output_section
,
4874 unsigned char* view
,
4875 Arm_address address
,
4876 section_size_type view_size
)
4878 const Stub_template
* stub_template
= stub
->stub_template();
4879 if (stub_template
->reloc_count() != 0)
4881 // Adjust view to cover the stub only.
4882 section_size_type offset
= stub
->offset();
4883 section_size_type stub_size
= stub_template
->size();
4884 gold_assert(offset
+ stub_size
<= view_size
);
4886 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4887 address
+ offset
, stub_size
);
4891 // Relocate all stubs in this stub table.
4893 template<bool big_endian
>
4895 Stub_table
<big_endian
>::relocate_stubs(
4896 const Relocate_info
<32, big_endian
>* relinfo
,
4897 Target_arm
<big_endian
>* arm_target
,
4898 Output_section
* output_section
,
4899 unsigned char* view
,
4900 Arm_address address
,
4901 section_size_type view_size
)
4903 // If we are passed a view bigger than the stub table's. we need to
4905 gold_assert(address
== this->address()
4907 == static_cast<section_size_type
>(this->data_size())));
4909 // Relocate all relocation stubs.
4910 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4911 p
!= this->reloc_stubs_
.end();
4913 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4914 address
, view_size
);
4916 // Relocate all Cortex-A8 stubs.
4917 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4918 p
!= this->cortex_a8_stubs_
.end();
4920 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4921 address
, view_size
);
4923 // Relocate all ARM V4BX stubs.
4924 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4925 p
!= this->arm_v4bx_stubs_
.end();
4929 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4930 address
, view_size
);
4934 // Write out the stubs to file.
4936 template<bool big_endian
>
4938 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4940 off_t offset
= this->offset();
4941 const section_size_type oview_size
=
4942 convert_to_section_size_type(this->data_size());
4943 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4945 // Write relocation stubs.
4946 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4947 p
!= this->reloc_stubs_
.end();
4950 Reloc_stub
* stub
= p
->second
;
4951 Arm_address address
= this->address() + stub
->offset();
4953 == align_address(address
,
4954 stub
->stub_template()->alignment()));
4955 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4959 // Write Cortex-A8 stubs.
4960 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4961 p
!= this->cortex_a8_stubs_
.end();
4964 Cortex_a8_stub
* stub
= p
->second
;
4965 Arm_address address
= this->address() + stub
->offset();
4967 == align_address(address
,
4968 stub
->stub_template()->alignment()));
4969 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4973 // Write ARM V4BX relocation stubs.
4974 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4975 p
!= this->arm_v4bx_stubs_
.end();
4981 Arm_address address
= this->address() + (*p
)->offset();
4983 == align_address(address
,
4984 (*p
)->stub_template()->alignment()));
4985 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4989 of
->write_output_view(this->offset(), oview_size
, oview
);
4992 // Update the data size and address alignment of the stub table at the end
4993 // of a relaxation pass. Return true if either the data size or the
4994 // alignment changed in this relaxation pass.
4996 template<bool big_endian
>
4998 Stub_table
<big_endian
>::update_data_size_and_addralign()
5000 // Go over all stubs in table to compute data size and address alignment.
5001 off_t size
= this->reloc_stubs_size_
;
5002 unsigned addralign
= this->reloc_stubs_addralign_
;
5004 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5005 p
!= this->cortex_a8_stubs_
.end();
5008 const Stub_template
* stub_template
= p
->second
->stub_template();
5009 addralign
= std::max(addralign
, stub_template
->alignment());
5010 size
= (align_address(size
, stub_template
->alignment())
5011 + stub_template
->size());
5014 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5015 p
!= this->arm_v4bx_stubs_
.end();
5021 const Stub_template
* stub_template
= (*p
)->stub_template();
5022 addralign
= std::max(addralign
, stub_template
->alignment());
5023 size
= (align_address(size
, stub_template
->alignment())
5024 + stub_template
->size());
5027 // Check if either data size or alignment changed in this pass.
5028 // Update prev_data_size_ and prev_addralign_. These will be used
5029 // as the current data size and address alignment for the next pass.
5030 bool changed
= size
!= this->prev_data_size_
;
5031 this->prev_data_size_
= size
;
5033 if (addralign
!= this->prev_addralign_
)
5035 this->prev_addralign_
= addralign
;
5040 // Finalize the stubs. This sets the offsets of the stubs within the stub
5041 // table. It also marks all input sections needing Cortex-A8 workaround.
5043 template<bool big_endian
>
5045 Stub_table
<big_endian
>::finalize_stubs()
5047 off_t off
= this->reloc_stubs_size_
;
5048 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5049 p
!= this->cortex_a8_stubs_
.end();
5052 Cortex_a8_stub
* stub
= p
->second
;
5053 const Stub_template
* stub_template
= stub
->stub_template();
5054 uint64_t stub_addralign
= stub_template
->alignment();
5055 off
= align_address(off
, stub_addralign
);
5056 stub
->set_offset(off
);
5057 off
+= stub_template
->size();
5059 // Mark input section so that we can determine later if a code section
5060 // needs the Cortex-A8 workaround quickly.
5061 Arm_relobj
<big_endian
>* arm_relobj
=
5062 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5063 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5066 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5067 p
!= this->arm_v4bx_stubs_
.end();
5073 const Stub_template
* stub_template
= (*p
)->stub_template();
5074 uint64_t stub_addralign
= stub_template
->alignment();
5075 off
= align_address(off
, stub_addralign
);
5076 (*p
)->set_offset(off
);
5077 off
+= stub_template
->size();
5080 gold_assert(off
<= this->prev_data_size_
);
5083 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5084 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5085 // of the address range seen by the linker.
5087 template<bool big_endian
>
5089 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5090 Target_arm
<big_endian
>* arm_target
,
5091 unsigned char* view
,
5092 Arm_address view_address
,
5093 section_size_type view_size
)
5095 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5096 for (Cortex_a8_stub_list::const_iterator p
=
5097 this->cortex_a8_stubs_
.lower_bound(view_address
);
5098 ((p
!= this->cortex_a8_stubs_
.end())
5099 && (p
->first
< (view_address
+ view_size
)));
5102 // We do not store the THUMB bit in the LSB of either the branch address
5103 // or the stub offset. There is no need to strip the LSB.
5104 Arm_address branch_address
= p
->first
;
5105 const Cortex_a8_stub
* stub
= p
->second
;
5106 Arm_address stub_address
= this->address() + stub
->offset();
5108 // Offset of the branch instruction relative to this view.
5109 section_size_type offset
=
5110 convert_to_section_size_type(branch_address
- view_address
);
5111 gold_assert((offset
+ 4) <= view_size
);
5113 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5114 view
+ offset
, branch_address
);
5118 // Arm_input_section methods.
5120 // Initialize an Arm_input_section.
5122 template<bool big_endian
>
5124 Arm_input_section
<big_endian
>::init()
5126 Relobj
* relobj
= this->relobj();
5127 unsigned int shndx
= this->shndx();
5129 // We have to cache original size, alignment and contents to avoid locking
5130 // the original file.
5131 this->original_addralign_
=
5132 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5134 // This is not efficient but we expect only a small number of relaxed
5135 // input sections for stubs.
5136 section_size_type section_size
;
5137 const unsigned char* section_contents
=
5138 relobj
->section_contents(shndx
, §ion_size
, false);
5139 this->original_size_
=
5140 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5142 gold_assert(this->original_contents_
== NULL
);
5143 this->original_contents_
= new unsigned char[section_size
];
5144 memcpy(this->original_contents_
, section_contents
, section_size
);
5146 // We want to make this look like the original input section after
5147 // output sections are finalized.
5148 Output_section
* os
= relobj
->output_section(shndx
);
5149 off_t offset
= relobj
->output_section_offset(shndx
);
5150 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5151 this->set_address(os
->address() + offset
);
5152 this->set_file_offset(os
->offset() + offset
);
5154 this->set_current_data_size(this->original_size_
);
5155 this->finalize_data_size();
5158 template<bool big_endian
>
5160 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5162 // We have to write out the original section content.
5163 gold_assert(this->original_contents_
!= NULL
);
5164 of
->write(this->offset(), this->original_contents_
,
5165 this->original_size_
);
5167 // If this owns a stub table and it is not empty, write it.
5168 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5169 this->stub_table_
->write(of
);
5172 // Finalize data size.
5174 template<bool big_endian
>
5176 Arm_input_section
<big_endian
>::set_final_data_size()
5178 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5180 if (this->is_stub_table_owner())
5182 this->stub_table_
->finalize_data_size();
5183 off
= align_address(off
, this->stub_table_
->addralign());
5184 off
+= this->stub_table_
->data_size();
5186 this->set_data_size(off
);
5189 // Reset address and file offset.
5191 template<bool big_endian
>
5193 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5195 // Size of the original input section contents.
5196 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5198 // If this is a stub table owner, account for the stub table size.
5199 if (this->is_stub_table_owner())
5201 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5203 // Reset the stub table's address and file offset. The
5204 // current data size for child will be updated after that.
5205 stub_table_
->reset_address_and_file_offset();
5206 off
= align_address(off
, stub_table_
->addralign());
5207 off
+= stub_table
->current_data_size();
5210 this->set_current_data_size(off
);
5213 // Arm_exidx_cantunwind methods.
5215 // Write this to Output file OF for a fixed endianness.
5217 template<bool big_endian
>
5219 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5221 off_t offset
= this->offset();
5222 const section_size_type oview_size
= 8;
5223 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5225 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5226 gold_assert(os
!= NULL
);
5228 Arm_relobj
<big_endian
>* arm_relobj
=
5229 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5230 Arm_address output_offset
=
5231 arm_relobj
->get_output_section_offset(this->shndx_
);
5232 Arm_address section_start
;
5233 section_size_type section_size
;
5235 // Find out the end of the text section referred by this.
5236 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5238 section_start
= os
->address() + output_offset
;
5239 const Arm_exidx_input_section
* exidx_input_section
=
5240 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5241 gold_assert(exidx_input_section
!= NULL
);
5243 convert_to_section_size_type(exidx_input_section
->text_size());
5247 // Currently this only happens for a relaxed section.
5248 const Output_relaxed_input_section
* poris
=
5249 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5250 gold_assert(poris
!= NULL
);
5251 section_start
= poris
->address();
5252 section_size
= convert_to_section_size_type(poris
->data_size());
5255 // We always append this to the end of an EXIDX section.
5256 Arm_address output_address
= section_start
+ section_size
;
5258 // Write out the entry. The first word either points to the beginning
5259 // or after the end of a text section. The second word is the special
5260 // EXIDX_CANTUNWIND value.
5261 uint32_t prel31_offset
= output_address
- this->address();
5262 if (Bits
<31>::has_overflow32(offset
))
5263 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5264 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5265 prel31_offset
& 0x7fffffffU
);
5266 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5267 elfcpp::EXIDX_CANTUNWIND
);
5269 of
->write_output_view(this->offset(), oview_size
, oview
);
5272 // Arm_exidx_merged_section methods.
5274 // Constructor for Arm_exidx_merged_section.
5275 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5276 // SECTION_OFFSET_MAP points to a section offset map describing how
5277 // parts of the input section are mapped to output. DELETED_BYTES is
5278 // the number of bytes deleted from the EXIDX input section.
5280 Arm_exidx_merged_section::Arm_exidx_merged_section(
5281 const Arm_exidx_input_section
& exidx_input_section
,
5282 const Arm_exidx_section_offset_map
& section_offset_map
,
5283 uint32_t deleted_bytes
)
5284 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5285 exidx_input_section
.shndx(),
5286 exidx_input_section
.addralign()),
5287 exidx_input_section_(exidx_input_section
),
5288 section_offset_map_(section_offset_map
)
5290 // If we retain or discard the whole EXIDX input section, we would
5292 gold_assert(deleted_bytes
!= 0
5293 && deleted_bytes
!= this->exidx_input_section_
.size());
5295 // Fix size here so that we do not need to implement set_final_data_size.
5296 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5297 this->set_data_size(size
);
5298 this->fix_data_size();
5300 // Allocate buffer for section contents and build contents.
5301 this->section_contents_
= new unsigned char[size
];
5304 // Build the contents of a merged EXIDX output section.
5307 Arm_exidx_merged_section::build_contents(
5308 const unsigned char* original_contents
,
5309 section_size_type original_size
)
5311 // Go over spans of input offsets and write only those that are not
5313 section_offset_type in_start
= 0;
5314 section_offset_type out_start
= 0;
5315 section_offset_type in_max
=
5316 convert_types
<section_offset_type
>(original_size
);
5317 section_offset_type out_max
=
5318 convert_types
<section_offset_type
>(this->data_size());
5319 for (Arm_exidx_section_offset_map::const_iterator p
=
5320 this->section_offset_map_
.begin();
5321 p
!= this->section_offset_map_
.end();
5324 section_offset_type in_end
= p
->first
;
5325 gold_assert(in_end
>= in_start
);
5326 section_offset_type out_end
= p
->second
;
5327 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5330 size_t out_chunk_size
=
5331 convert_types
<size_t>(out_end
- out_start
+ 1);
5333 gold_assert(out_chunk_size
== in_chunk_size
5334 && in_end
< in_max
&& out_end
< out_max
);
5336 memcpy(this->section_contents_
+ out_start
,
5337 original_contents
+ in_start
,
5339 out_start
+= out_chunk_size
;
5341 in_start
+= in_chunk_size
;
5345 // Given an input OBJECT, an input section index SHNDX within that
5346 // object, and an OFFSET relative to the start of that input
5347 // section, return whether or not the corresponding offset within
5348 // the output section is known. If this function returns true, it
5349 // sets *POUTPUT to the output offset. The value -1 indicates that
5350 // this input offset is being discarded.
5353 Arm_exidx_merged_section::do_output_offset(
5354 const Relobj
* relobj
,
5356 section_offset_type offset
,
5357 section_offset_type
* poutput
) const
5359 // We only handle offsets for the original EXIDX input section.
5360 if (relobj
!= this->exidx_input_section_
.relobj()
5361 || shndx
!= this->exidx_input_section_
.shndx())
5364 section_offset_type section_size
=
5365 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5366 if (offset
< 0 || offset
>= section_size
)
5367 // Input offset is out of valid range.
5371 // We need to look up the section offset map to determine the output
5372 // offset. Find the reference point in map that is first offset
5373 // bigger than or equal to this offset.
5374 Arm_exidx_section_offset_map::const_iterator p
=
5375 this->section_offset_map_
.lower_bound(offset
);
5377 // The section offset maps are build such that this should not happen if
5378 // input offset is in the valid range.
5379 gold_assert(p
!= this->section_offset_map_
.end());
5381 // We need to check if this is dropped.
5382 section_offset_type ref
= p
->first
;
5383 section_offset_type mapped_ref
= p
->second
;
5385 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5386 // Offset is present in output.
5387 *poutput
= mapped_ref
+ (offset
- ref
);
5389 // Offset is discarded owing to EXIDX entry merging.
5396 // Write this to output file OF.
5399 Arm_exidx_merged_section::do_write(Output_file
* of
)
5401 off_t offset
= this->offset();
5402 const section_size_type oview_size
= this->data_size();
5403 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5405 Output_section
* os
= this->relobj()->output_section(this->shndx());
5406 gold_assert(os
!= NULL
);
5408 memcpy(oview
, this->section_contents_
, oview_size
);
5409 of
->write_output_view(this->offset(), oview_size
, oview
);
5412 // Arm_exidx_fixup methods.
5414 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5415 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5416 // points to the end of the last seen EXIDX section.
5419 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5421 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5422 && this->last_input_section_
!= NULL
)
5424 Relobj
* relobj
= this->last_input_section_
->relobj();
5425 unsigned int text_shndx
= this->last_input_section_
->link();
5426 Arm_exidx_cantunwind
* cantunwind
=
5427 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5428 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5429 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5433 // Process an EXIDX section entry in input. Return whether this entry
5434 // can be deleted in the output. SECOND_WORD in the second word of the
5438 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5441 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5443 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5444 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5445 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5447 else if ((second_word
& 0x80000000) != 0)
5449 // Inlined unwinding data. Merge if equal to previous.
5450 delete_entry
= (merge_exidx_entries_
5451 && this->last_unwind_type_
== UT_INLINED_ENTRY
5452 && this->last_inlined_entry_
== second_word
);
5453 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5454 this->last_inlined_entry_
= second_word
;
5458 // Normal table entry. In theory we could merge these too,
5459 // but duplicate entries are likely to be much less common.
5460 delete_entry
= false;
5461 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5463 return delete_entry
;
5466 // Update the current section offset map during EXIDX section fix-up.
5467 // If there is no map, create one. INPUT_OFFSET is the offset of a
5468 // reference point, DELETED_BYTES is the number of deleted by in the
5469 // section so far. If DELETE_ENTRY is true, the reference point and
5470 // all offsets after the previous reference point are discarded.
5473 Arm_exidx_fixup::update_offset_map(
5474 section_offset_type input_offset
,
5475 section_size_type deleted_bytes
,
5478 if (this->section_offset_map_
== NULL
)
5479 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5480 section_offset_type output_offset
;
5482 output_offset
= Arm_exidx_input_section::invalid_offset
;
5484 output_offset
= input_offset
- deleted_bytes
;
5485 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5488 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5489 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5490 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5491 // If some entries are merged, also store a pointer to a newly created
5492 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5493 // owns the map and is responsible for releasing it after use.
5495 template<bool big_endian
>
5497 Arm_exidx_fixup::process_exidx_section(
5498 const Arm_exidx_input_section
* exidx_input_section
,
5499 const unsigned char* section_contents
,
5500 section_size_type section_size
,
5501 Arm_exidx_section_offset_map
** psection_offset_map
)
5503 Relobj
* relobj
= exidx_input_section
->relobj();
5504 unsigned shndx
= exidx_input_section
->shndx();
5506 if ((section_size
% 8) != 0)
5508 // Something is wrong with this section. Better not touch it.
5509 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5510 relobj
->name().c_str(), shndx
);
5511 this->last_input_section_
= exidx_input_section
;
5512 this->last_unwind_type_
= UT_NONE
;
5516 uint32_t deleted_bytes
= 0;
5517 bool prev_delete_entry
= false;
5518 gold_assert(this->section_offset_map_
== NULL
);
5520 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5522 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5524 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5525 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5527 bool delete_entry
= this->process_exidx_entry(second_word
);
5529 // Entry deletion causes changes in output offsets. We use a std::map
5530 // to record these. And entry (x, y) means input offset x
5531 // is mapped to output offset y. If y is invalid_offset, then x is
5532 // dropped in the output. Because of the way std::map::lower_bound
5533 // works, we record the last offset in a region w.r.t to keeping or
5534 // dropping. If there is no entry (x0, y0) for an input offset x0,
5535 // the output offset y0 of it is determined by the output offset y1 of
5536 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5537 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5539 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5540 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5542 // Update total deleted bytes for this entry.
5546 prev_delete_entry
= delete_entry
;
5549 // If section offset map is not NULL, make an entry for the end of
5551 if (this->section_offset_map_
!= NULL
)
5552 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5554 *psection_offset_map
= this->section_offset_map_
;
5555 this->section_offset_map_
= NULL
;
5556 this->last_input_section_
= exidx_input_section
;
5558 // Set the first output text section so that we can link the EXIDX output
5559 // section to it. Ignore any EXIDX input section that is completely merged.
5560 if (this->first_output_text_section_
== NULL
5561 && deleted_bytes
!= section_size
)
5563 unsigned int link
= exidx_input_section
->link();
5564 Output_section
* os
= relobj
->output_section(link
);
5565 gold_assert(os
!= NULL
);
5566 this->first_output_text_section_
= os
;
5569 return deleted_bytes
;
5572 // Arm_output_section methods.
5574 // Create a stub group for input sections from BEGIN to END. OWNER
5575 // points to the input section to be the owner a new stub table.
5577 template<bool big_endian
>
5579 Arm_output_section
<big_endian
>::create_stub_group(
5580 Input_section_list::const_iterator begin
,
5581 Input_section_list::const_iterator end
,
5582 Input_section_list::const_iterator owner
,
5583 Target_arm
<big_endian
>* target
,
5584 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5587 // We use a different kind of relaxed section in an EXIDX section.
5588 // The static casting from Output_relaxed_input_section to
5589 // Arm_input_section is invalid in an EXIDX section. We are okay
5590 // because we should not be calling this for an EXIDX section.
5591 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5593 // Currently we convert ordinary input sections into relaxed sections only
5594 // at this point but we may want to support creating relaxed input section
5595 // very early. So we check here to see if owner is already a relaxed
5598 Arm_input_section
<big_endian
>* arm_input_section
;
5599 if (owner
->is_relaxed_input_section())
5602 Arm_input_section
<big_endian
>::as_arm_input_section(
5603 owner
->relaxed_input_section());
5607 gold_assert(owner
->is_input_section());
5608 // Create a new relaxed input section. We need to lock the original
5610 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5612 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5613 new_relaxed_sections
->push_back(arm_input_section
);
5616 // Create a stub table.
5617 Stub_table
<big_endian
>* stub_table
=
5618 target
->new_stub_table(arm_input_section
);
5620 arm_input_section
->set_stub_table(stub_table
);
5622 Input_section_list::const_iterator p
= begin
;
5623 Input_section_list::const_iterator prev_p
;
5625 // Look for input sections or relaxed input sections in [begin ... end].
5628 if (p
->is_input_section() || p
->is_relaxed_input_section())
5630 // The stub table information for input sections live
5631 // in their objects.
5632 Arm_relobj
<big_endian
>* arm_relobj
=
5633 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5634 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5638 while (prev_p
!= end
);
5641 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5642 // of stub groups. We grow a stub group by adding input section until the
5643 // size is just below GROUP_SIZE. The last input section will be converted
5644 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5645 // input section after the stub table, effectively double the group size.
5647 // This is similar to the group_sections() function in elf32-arm.c but is
5648 // implemented differently.
5650 template<bool big_endian
>
5652 Arm_output_section
<big_endian
>::group_sections(
5653 section_size_type group_size
,
5654 bool stubs_always_after_branch
,
5655 Target_arm
<big_endian
>* target
,
5658 // States for grouping.
5661 // No group is being built.
5663 // A group is being built but the stub table is not found yet.
5664 // We keep group a stub group until the size is just under GROUP_SIZE.
5665 // The last input section in the group will be used as the stub table.
5666 FINDING_STUB_SECTION
,
5667 // A group is being built and we have already found a stub table.
5668 // We enter this state to grow a stub group by adding input section
5669 // after the stub table. This effectively doubles the group size.
5673 // Any newly created relaxed sections are stored here.
5674 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5676 State state
= NO_GROUP
;
5677 section_size_type off
= 0;
5678 section_size_type group_begin_offset
= 0;
5679 section_size_type group_end_offset
= 0;
5680 section_size_type stub_table_end_offset
= 0;
5681 Input_section_list::const_iterator group_begin
=
5682 this->input_sections().end();
5683 Input_section_list::const_iterator stub_table
=
5684 this->input_sections().end();
5685 Input_section_list::const_iterator group_end
= this->input_sections().end();
5686 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5687 p
!= this->input_sections().end();
5690 section_size_type section_begin_offset
=
5691 align_address(off
, p
->addralign());
5692 section_size_type section_end_offset
=
5693 section_begin_offset
+ p
->data_size();
5695 // Check to see if we should group the previously seen sections.
5701 case FINDING_STUB_SECTION
:
5702 // Adding this section makes the group larger than GROUP_SIZE.
5703 if (section_end_offset
- group_begin_offset
>= group_size
)
5705 if (stubs_always_after_branch
)
5707 gold_assert(group_end
!= this->input_sections().end());
5708 this->create_stub_group(group_begin
, group_end
, group_end
,
5709 target
, &new_relaxed_sections
,
5715 // But wait, there's more! Input sections up to
5716 // stub_group_size bytes after the stub table can be
5717 // handled by it too.
5718 state
= HAS_STUB_SECTION
;
5719 stub_table
= group_end
;
5720 stub_table_end_offset
= group_end_offset
;
5725 case HAS_STUB_SECTION
:
5726 // Adding this section makes the post stub-section group larger
5728 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5730 gold_assert(group_end
!= this->input_sections().end());
5731 this->create_stub_group(group_begin
, group_end
, stub_table
,
5732 target
, &new_relaxed_sections
, task
);
5741 // If we see an input section and currently there is no group, start
5742 // a new one. Skip any empty sections. We look at the data size
5743 // instead of calling p->relobj()->section_size() to avoid locking.
5744 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5745 && (p
->data_size() != 0))
5747 if (state
== NO_GROUP
)
5749 state
= FINDING_STUB_SECTION
;
5751 group_begin_offset
= section_begin_offset
;
5754 // Keep track of the last input section seen.
5756 group_end_offset
= section_end_offset
;
5759 off
= section_end_offset
;
5762 // Create a stub group for any ungrouped sections.
5763 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5765 gold_assert(group_end
!= this->input_sections().end());
5766 this->create_stub_group(group_begin
, group_end
,
5767 (state
== FINDING_STUB_SECTION
5770 target
, &new_relaxed_sections
, task
);
5773 // Convert input section into relaxed input section in a batch.
5774 if (!new_relaxed_sections
.empty())
5775 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5777 // Update the section offsets
5778 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5780 Arm_relobj
<big_endian
>* arm_relobj
=
5781 Arm_relobj
<big_endian
>::as_arm_relobj(
5782 new_relaxed_sections
[i
]->relobj());
5783 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5784 // Tell Arm_relobj that this input section is converted.
5785 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5789 // Append non empty text sections in this to LIST in ascending
5790 // order of their position in this.
5792 template<bool big_endian
>
5794 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5795 Text_section_list
* list
)
5797 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5799 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5800 p
!= this->input_sections().end();
5803 // We only care about plain or relaxed input sections. We also
5804 // ignore any merged sections.
5805 if (p
->is_input_section() || p
->is_relaxed_input_section())
5806 list
->push_back(Text_section_list::value_type(p
->relobj(),
5811 template<bool big_endian
>
5813 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5815 const Text_section_list
& sorted_text_sections
,
5816 Symbol_table
* symtab
,
5817 bool merge_exidx_entries
,
5820 // We should only do this for the EXIDX output section.
5821 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5823 // We don't want the relaxation loop to undo these changes, so we discard
5824 // the current saved states and take another one after the fix-up.
5825 this->discard_states();
5827 // Remove all input sections.
5828 uint64_t address
= this->address();
5829 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5830 Input_section_list input_sections
;
5831 this->reset_address_and_file_offset();
5832 this->get_input_sections(address
, std::string(""), &input_sections
);
5834 if (!this->input_sections().empty())
5835 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5837 // Go through all the known input sections and record them.
5838 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5839 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5840 Section_id_hash
> Text_to_exidx_map
;
5841 Text_to_exidx_map text_to_exidx_map
;
5842 for (Input_section_list::const_iterator p
= input_sections
.begin();
5843 p
!= input_sections
.end();
5846 // This should never happen. At this point, we should only see
5847 // plain EXIDX input sections.
5848 gold_assert(!p
->is_relaxed_input_section());
5849 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5852 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5854 // Go over the sorted text sections.
5855 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5856 Section_id_set processed_input_sections
;
5857 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5858 p
!= sorted_text_sections
.end();
5861 Relobj
* relobj
= p
->first
;
5862 unsigned int shndx
= p
->second
;
5864 Arm_relobj
<big_endian
>* arm_relobj
=
5865 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5866 const Arm_exidx_input_section
* exidx_input_section
=
5867 arm_relobj
->exidx_input_section_by_link(shndx
);
5869 // If this text section has no EXIDX section or if the EXIDX section
5870 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5871 // of the last seen EXIDX section.
5872 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5874 exidx_fixup
.add_exidx_cantunwind_as_needed();
5878 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5879 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5880 Section_id
sid(exidx_relobj
, exidx_shndx
);
5881 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5882 if (iter
== text_to_exidx_map
.end())
5884 // This is odd. We have not seen this EXIDX input section before.
5885 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5886 // issue a warning instead. We assume the user knows what he
5887 // or she is doing. Otherwise, this is an error.
5888 if (layout
->script_options()->saw_sections_clause())
5889 gold_warning(_("unwinding may not work because EXIDX input section"
5890 " %u of %s is not in EXIDX output section"),
5891 exidx_shndx
, exidx_relobj
->name().c_str());
5893 gold_error(_("unwinding may not work because EXIDX input section"
5894 " %u of %s is not in EXIDX output section"),
5895 exidx_shndx
, exidx_relobj
->name().c_str());
5897 exidx_fixup
.add_exidx_cantunwind_as_needed();
5901 // We need to access the contents of the EXIDX section, lock the
5903 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5904 section_size_type exidx_size
;
5905 const unsigned char* exidx_contents
=
5906 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5908 // Fix up coverage and append input section to output data list.
5909 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5910 uint32_t deleted_bytes
=
5911 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5914 §ion_offset_map
);
5916 if (deleted_bytes
== exidx_input_section
->size())
5918 // The whole EXIDX section got merged. Remove it from output.
5919 gold_assert(section_offset_map
== NULL
);
5920 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5922 // All local symbols defined in this input section will be dropped.
5923 // We need to adjust output local symbol count.
5924 arm_relobj
->set_output_local_symbol_count_needs_update();
5926 else if (deleted_bytes
> 0)
5928 // Some entries are merged. We need to convert this EXIDX input
5929 // section into a relaxed section.
5930 gold_assert(section_offset_map
!= NULL
);
5932 Arm_exidx_merged_section
* merged_section
=
5933 new Arm_exidx_merged_section(*exidx_input_section
,
5934 *section_offset_map
, deleted_bytes
);
5935 merged_section
->build_contents(exidx_contents
, exidx_size
);
5937 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
5938 this->add_relaxed_input_section(layout
, merged_section
, secname
);
5939 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5941 // All local symbols defined in discarded portions of this input
5942 // section will be dropped. We need to adjust output local symbol
5944 arm_relobj
->set_output_local_symbol_count_needs_update();
5948 // Just add back the EXIDX input section.
5949 gold_assert(section_offset_map
== NULL
);
5950 const Output_section::Input_section
* pis
= iter
->second
;
5951 gold_assert(pis
->is_input_section());
5952 this->add_script_input_section(*pis
);
5955 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5958 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5959 exidx_fixup
.add_exidx_cantunwind_as_needed();
5961 // Remove any known EXIDX input sections that are not processed.
5962 for (Input_section_list::const_iterator p
= input_sections
.begin();
5963 p
!= input_sections
.end();
5966 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5967 == processed_input_sections
.end())
5969 // We discard a known EXIDX section because its linked
5970 // text section has been folded by ICF. We also discard an
5971 // EXIDX section with error, the output does not matter in this
5972 // case. We do this to avoid triggering asserts.
5973 Arm_relobj
<big_endian
>* arm_relobj
=
5974 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5975 const Arm_exidx_input_section
* exidx_input_section
=
5976 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5977 gold_assert(exidx_input_section
!= NULL
);
5978 if (!exidx_input_section
->has_errors())
5980 unsigned int text_shndx
= exidx_input_section
->link();
5981 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5984 // Remove this from link. We also need to recount the
5986 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5987 arm_relobj
->set_output_local_symbol_count_needs_update();
5991 // Link exidx output section to the first seen output section and
5992 // set correct entry size.
5993 this->set_link_section(exidx_fixup
.first_output_text_section());
5994 this->set_entsize(8);
5996 // Make changes permanent.
5997 this->save_states();
5998 this->set_section_offsets_need_adjustment();
6001 // Link EXIDX output sections to text output sections.
6003 template<bool big_endian
>
6005 Arm_output_section
<big_endian
>::set_exidx_section_link()
6007 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6008 if (!this->input_sections().empty())
6010 Input_section_list::const_iterator p
= this->input_sections().begin();
6011 Arm_relobj
<big_endian
>* arm_relobj
=
6012 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6013 unsigned exidx_shndx
= p
->shndx();
6014 const Arm_exidx_input_section
* exidx_input_section
=
6015 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6016 gold_assert(exidx_input_section
!= NULL
);
6017 unsigned int text_shndx
= exidx_input_section
->link();
6018 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6019 this->set_link_section(os
);
6023 // Arm_relobj methods.
6025 // Determine if an input section is scannable for stub processing. SHDR is
6026 // the header of the section and SHNDX is the section index. OS is the output
6027 // section for the input section and SYMTAB is the global symbol table used to
6028 // look up ICF information.
6030 template<bool big_endian
>
6032 Arm_relobj
<big_endian
>::section_is_scannable(
6033 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6035 const Output_section
* os
,
6036 const Symbol_table
* symtab
)
6038 // Skip any empty sections, unallocated sections or sections whose
6039 // type are not SHT_PROGBITS.
6040 if (shdr
.get_sh_size() == 0
6041 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6042 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6045 // Skip any discarded or ICF'ed sections.
6046 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6049 // If this requires special offset handling, check to see if it is
6050 // a relaxed section. If this is not, then it is a merged section that
6051 // we cannot handle.
6052 if (this->is_output_section_offset_invalid(shndx
))
6054 const Output_relaxed_input_section
* poris
=
6055 os
->find_relaxed_input_section(this, shndx
);
6063 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6064 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6066 template<bool big_endian
>
6068 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6069 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6070 const Relobj::Output_sections
& out_sections
,
6071 const Symbol_table
* symtab
,
6072 const unsigned char* pshdrs
)
6074 unsigned int sh_type
= shdr
.get_sh_type();
6075 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6078 // Ignore empty section.
6079 off_t sh_size
= shdr
.get_sh_size();
6083 // Ignore reloc section with unexpected symbol table. The
6084 // error will be reported in the final link.
6085 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6088 unsigned int reloc_size
;
6089 if (sh_type
== elfcpp::SHT_REL
)
6090 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6092 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6094 // Ignore reloc section with unexpected entsize or uneven size.
6095 // The error will be reported in the final link.
6096 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6099 // Ignore reloc section with bad info. This error will be
6100 // reported in the final link.
6101 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6102 if (index
>= this->shnum())
6105 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6106 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6107 return this->section_is_scannable(text_shdr
, index
,
6108 out_sections
[index
], symtab
);
6111 // Return the output address of either a plain input section or a relaxed
6112 // input section. SHNDX is the section index. We define and use this
6113 // instead of calling Output_section::output_address because that is slow
6114 // for large output.
6116 template<bool big_endian
>
6118 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6122 if (this->is_output_section_offset_invalid(shndx
))
6124 const Output_relaxed_input_section
* poris
=
6125 os
->find_relaxed_input_section(this, shndx
);
6126 // We do not handle merged sections here.
6127 gold_assert(poris
!= NULL
);
6128 return poris
->address();
6131 return os
->address() + this->get_output_section_offset(shndx
);
6134 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6135 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6137 template<bool big_endian
>
6139 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6140 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6143 const Symbol_table
* symtab
)
6145 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6148 // If the section does not cross any 4K-boundaries, it does not need to
6150 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6151 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6157 // Scan a section for Cortex-A8 workaround.
6159 template<bool big_endian
>
6161 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6162 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6165 Target_arm
<big_endian
>* arm_target
)
6167 // Look for the first mapping symbol in this section. It should be
6169 Mapping_symbol_position
section_start(shndx
, 0);
6170 typename
Mapping_symbols_info::const_iterator p
=
6171 this->mapping_symbols_info_
.lower_bound(section_start
);
6173 // There are no mapping symbols for this section. Treat it as a data-only
6174 // section. Issue a warning if section is marked as containing
6176 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6178 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
6179 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6180 "erratum because it has no mapping symbols."),
6181 shndx
, this->name().c_str());
6185 Arm_address output_address
=
6186 this->simple_input_section_output_address(shndx
, os
);
6188 // Get the section contents.
6189 section_size_type input_view_size
= 0;
6190 const unsigned char* input_view
=
6191 this->section_contents(shndx
, &input_view_size
, false);
6193 // We need to go through the mapping symbols to determine what to
6194 // scan. There are two reasons. First, we should look at THUMB code and
6195 // THUMB code only. Second, we only want to look at the 4K-page boundary
6196 // to speed up the scanning.
6198 while (p
!= this->mapping_symbols_info_
.end()
6199 && p
->first
.first
== shndx
)
6201 typename
Mapping_symbols_info::const_iterator next
=
6202 this->mapping_symbols_info_
.upper_bound(p
->first
);
6204 // Only scan part of a section with THUMB code.
6205 if (p
->second
== 't')
6207 // Determine the end of this range.
6208 section_size_type span_start
=
6209 convert_to_section_size_type(p
->first
.second
);
6210 section_size_type span_end
;
6211 if (next
!= this->mapping_symbols_info_
.end()
6212 && next
->first
.first
== shndx
)
6213 span_end
= convert_to_section_size_type(next
->first
.second
);
6215 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6217 if (((span_start
+ output_address
) & ~0xfffUL
)
6218 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6220 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6221 span_start
, span_end
,
6231 // Scan relocations for stub generation.
6233 template<bool big_endian
>
6235 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6236 Target_arm
<big_endian
>* arm_target
,
6237 const Symbol_table
* symtab
,
6238 const Layout
* layout
)
6240 unsigned int shnum
= this->shnum();
6241 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6243 // Read the section headers.
6244 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6248 // To speed up processing, we set up hash tables for fast lookup of
6249 // input offsets to output addresses.
6250 this->initialize_input_to_output_maps();
6252 const Relobj::Output_sections
& out_sections(this->output_sections());
6254 Relocate_info
<32, big_endian
> relinfo
;
6255 relinfo
.symtab
= symtab
;
6256 relinfo
.layout
= layout
;
6257 relinfo
.object
= this;
6259 // Do relocation stubs scanning.
6260 const unsigned char* p
= pshdrs
+ shdr_size
;
6261 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6263 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6264 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6267 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6268 Arm_address output_offset
= this->get_output_section_offset(index
);
6269 Arm_address output_address
;
6270 if (output_offset
!= invalid_address
)
6271 output_address
= out_sections
[index
]->address() + output_offset
;
6274 // Currently this only happens for a relaxed section.
6275 const Output_relaxed_input_section
* poris
=
6276 out_sections
[index
]->find_relaxed_input_section(this, index
);
6277 gold_assert(poris
!= NULL
);
6278 output_address
= poris
->address();
6281 // Get the relocations.
6282 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6286 // Get the section contents. This does work for the case in which
6287 // we modify the contents of an input section. We need to pass the
6288 // output view under such circumstances.
6289 section_size_type input_view_size
= 0;
6290 const unsigned char* input_view
=
6291 this->section_contents(index
, &input_view_size
, false);
6293 relinfo
.reloc_shndx
= i
;
6294 relinfo
.data_shndx
= index
;
6295 unsigned int sh_type
= shdr
.get_sh_type();
6296 unsigned int reloc_size
;
6297 if (sh_type
== elfcpp::SHT_REL
)
6298 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6300 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6302 Output_section
* os
= out_sections
[index
];
6303 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6304 shdr
.get_sh_size() / reloc_size
,
6306 output_offset
== invalid_address
,
6307 input_view
, output_address
,
6312 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6313 // after its relocation section, if there is one, is processed for
6314 // relocation stubs. Merging this loop with the one above would have been
6315 // complicated since we would have had to make sure that relocation stub
6316 // scanning is done first.
6317 if (arm_target
->fix_cortex_a8())
6319 const unsigned char* p
= pshdrs
+ shdr_size
;
6320 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6322 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6323 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6326 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6331 // After we've done the relocations, we release the hash tables,
6332 // since we no longer need them.
6333 this->free_input_to_output_maps();
6336 // Count the local symbols. The ARM backend needs to know if a symbol
6337 // is a THUMB function or not. For global symbols, it is easy because
6338 // the Symbol object keeps the ELF symbol type. For local symbol it is
6339 // harder because we cannot access this information. So we override the
6340 // do_count_local_symbol in parent and scan local symbols to mark
6341 // THUMB functions. This is not the most efficient way but I do not want to
6342 // slow down other ports by calling a per symbol target hook inside
6343 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6345 template<bool big_endian
>
6347 Arm_relobj
<big_endian
>::do_count_local_symbols(
6348 Stringpool_template
<char>* pool
,
6349 Stringpool_template
<char>* dynpool
)
6351 // We need to fix-up the values of any local symbols whose type are
6354 // Ask parent to count the local symbols.
6355 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6356 const unsigned int loccount
= this->local_symbol_count();
6360 // Initialize the thumb function bit-vector.
6361 std::vector
<bool> empty_vector(loccount
, false);
6362 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6364 // Read the symbol table section header.
6365 const unsigned int symtab_shndx
= this->symtab_shndx();
6366 elfcpp::Shdr
<32, big_endian
>
6367 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6368 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6370 // Read the local symbols.
6371 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6372 gold_assert(loccount
== symtabshdr
.get_sh_info());
6373 off_t locsize
= loccount
* sym_size
;
6374 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6375 locsize
, true, true);
6377 // For mapping symbol processing, we need to read the symbol names.
6378 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6379 if (strtab_shndx
>= this->shnum())
6381 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6385 elfcpp::Shdr
<32, big_endian
>
6386 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6387 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6389 this->error(_("symbol table name section has wrong type: %u"),
6390 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6393 const char* pnames
=
6394 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6395 strtabshdr
.get_sh_size(),
6398 // Loop over the local symbols and mark any local symbols pointing
6399 // to THUMB functions.
6401 // Skip the first dummy symbol.
6403 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6404 this->local_values();
6405 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6407 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6408 elfcpp::STT st_type
= sym
.get_st_type();
6409 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6410 Arm_address input_value
= lv
.input_value();
6412 // Check to see if this is a mapping symbol.
6413 const char* sym_name
= pnames
+ sym
.get_st_name();
6414 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6417 unsigned int input_shndx
=
6418 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6419 gold_assert(is_ordinary
);
6421 // Strip of LSB in case this is a THUMB symbol.
6422 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6423 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6426 if (st_type
== elfcpp::STT_ARM_TFUNC
6427 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6429 // This is a THUMB function. Mark this and canonicalize the
6430 // symbol value by setting LSB.
6431 this->local_symbol_is_thumb_function_
[i
] = true;
6432 if ((input_value
& 1) == 0)
6433 lv
.set_input_value(input_value
| 1);
6438 // Relocate sections.
6439 template<bool big_endian
>
6441 Arm_relobj
<big_endian
>::do_relocate_sections(
6442 const Symbol_table
* symtab
,
6443 const Layout
* layout
,
6444 const unsigned char* pshdrs
,
6446 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6448 // Call parent to relocate sections.
6449 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6450 pshdrs
, of
, pviews
);
6452 // We do not generate stubs if doing a relocatable link.
6453 if (parameters
->options().relocatable())
6456 // Relocate stub tables.
6457 unsigned int shnum
= this->shnum();
6459 Target_arm
<big_endian
>* arm_target
=
6460 Target_arm
<big_endian
>::default_target();
6462 Relocate_info
<32, big_endian
> relinfo
;
6463 relinfo
.symtab
= symtab
;
6464 relinfo
.layout
= layout
;
6465 relinfo
.object
= this;
6467 for (unsigned int i
= 1; i
< shnum
; ++i
)
6469 Arm_input_section
<big_endian
>* arm_input_section
=
6470 arm_target
->find_arm_input_section(this, i
);
6472 if (arm_input_section
!= NULL
6473 && arm_input_section
->is_stub_table_owner()
6474 && !arm_input_section
->stub_table()->empty())
6476 // We cannot discard a section if it owns a stub table.
6477 Output_section
* os
= this->output_section(i
);
6478 gold_assert(os
!= NULL
);
6480 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6481 relinfo
.reloc_shdr
= NULL
;
6482 relinfo
.data_shndx
= i
;
6483 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6485 gold_assert((*pviews
)[i
].view
!= NULL
);
6487 // We are passed the output section view. Adjust it to cover the
6489 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6490 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6491 && ((stub_table
->address() + stub_table
->data_size())
6492 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6494 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6495 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6496 Arm_address address
= stub_table
->address();
6497 section_size_type view_size
= stub_table
->data_size();
6499 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6503 // Apply Cortex A8 workaround if applicable.
6504 if (this->section_has_cortex_a8_workaround(i
))
6506 unsigned char* view
= (*pviews
)[i
].view
;
6507 Arm_address view_address
= (*pviews
)[i
].address
;
6508 section_size_type view_size
= (*pviews
)[i
].view_size
;
6509 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6511 // Adjust view to cover section.
6512 Output_section
* os
= this->output_section(i
);
6513 gold_assert(os
!= NULL
);
6514 Arm_address section_address
=
6515 this->simple_input_section_output_address(i
, os
);
6516 uint64_t section_size
= this->section_size(i
);
6518 gold_assert(section_address
>= view_address
6519 && ((section_address
+ section_size
)
6520 <= (view_address
+ view_size
)));
6522 unsigned char* section_view
= view
+ (section_address
- view_address
);
6524 // Apply the Cortex-A8 workaround to the output address range
6525 // corresponding to this input section.
6526 stub_table
->apply_cortex_a8_workaround_to_address_range(
6535 // Find the linked text section of an EXIDX section by looking at the first
6536 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6537 // must be linked to its associated code section via the sh_link field of
6538 // its section header. However, some tools are broken and the link is not
6539 // always set. LD just drops such an EXIDX section silently, causing the
6540 // associated code not unwindabled. Here we try a little bit harder to
6541 // discover the linked code section.
6543 // PSHDR points to the section header of a relocation section of an EXIDX
6544 // section. If we can find a linked text section, return true and
6545 // store the text section index in the location PSHNDX. Otherwise
6548 template<bool big_endian
>
6550 Arm_relobj
<big_endian
>::find_linked_text_section(
6551 const unsigned char* pshdr
,
6552 const unsigned char* psyms
,
6553 unsigned int* pshndx
)
6555 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6557 // If there is no relocation, we cannot find the linked text section.
6559 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6560 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6562 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6563 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6565 // Get the relocations.
6566 const unsigned char* prelocs
=
6567 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6569 // Find the REL31 relocation for the first word of the first EXIDX entry.
6570 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6572 Arm_address r_offset
;
6573 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6574 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6576 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6577 r_info
= reloc
.get_r_info();
6578 r_offset
= reloc
.get_r_offset();
6582 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6583 r_info
= reloc
.get_r_info();
6584 r_offset
= reloc
.get_r_offset();
6587 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6588 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6591 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6593 || r_sym
>= this->local_symbol_count()
6597 // This is the relocation for the first word of the first EXIDX entry.
6598 // We expect to see a local section symbol.
6599 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6600 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6601 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6605 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6606 gold_assert(is_ordinary
);
6616 // Make an EXIDX input section object for an EXIDX section whose index is
6617 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6618 // is the section index of the linked text section.
6620 template<bool big_endian
>
6622 Arm_relobj
<big_endian
>::make_exidx_input_section(
6624 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6625 unsigned int text_shndx
,
6626 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6628 // Create an Arm_exidx_input_section object for this EXIDX section.
6629 Arm_exidx_input_section
* exidx_input_section
=
6630 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6631 shdr
.get_sh_addralign(),
6632 text_shdr
.get_sh_size());
6634 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6635 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6637 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6639 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6640 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6641 this->name().c_str());
6642 exidx_input_section
->set_has_errors();
6644 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6646 unsigned other_exidx_shndx
=
6647 this->exidx_section_map_
[text_shndx
]->shndx();
6648 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6650 this->section_name(shndx
).c_str(), shndx
,
6651 this->section_name(other_exidx_shndx
).c_str(),
6652 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6653 text_shndx
, this->name().c_str());
6654 exidx_input_section
->set_has_errors();
6657 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6659 // Check section flags of text section.
6660 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6662 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6664 this->section_name(shndx
).c_str(), shndx
,
6665 this->section_name(text_shndx
).c_str(), text_shndx
,
6666 this->name().c_str());
6667 exidx_input_section
->set_has_errors();
6669 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6670 // I would like to make this an error but currently ld just ignores
6672 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6674 this->section_name(shndx
).c_str(), shndx
,
6675 this->section_name(text_shndx
).c_str(), text_shndx
,
6676 this->name().c_str());
6679 // Read the symbol information.
6681 template<bool big_endian
>
6683 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6685 // Call parent class to read symbol information.
6686 Sized_relobj_file
<32, big_endian
>::do_read_symbols(sd
);
6688 // If this input file is a binary file, it has no processor
6689 // specific flags and attributes section.
6690 Input_file::Format format
= this->input_file()->format();
6691 if (format
!= Input_file::FORMAT_ELF
)
6693 gold_assert(format
== Input_file::FORMAT_BINARY
);
6694 this->merge_flags_and_attributes_
= false;
6698 // Read processor-specific flags in ELF file header.
6699 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6700 elfcpp::Elf_sizes
<32>::ehdr_size
,
6702 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6703 this->processor_specific_flags_
= ehdr
.get_e_flags();
6705 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6707 std::vector
<unsigned int> deferred_exidx_sections
;
6708 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6709 const unsigned char* pshdrs
= sd
->section_headers
->data();
6710 const unsigned char* ps
= pshdrs
+ shdr_size
;
6711 bool must_merge_flags_and_attributes
= false;
6712 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6714 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6716 // Sometimes an object has no contents except the section name string
6717 // table and an empty symbol table with the undefined symbol. We
6718 // don't want to merge processor-specific flags from such an object.
6719 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6721 // Symbol table is not empty.
6722 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6723 elfcpp::Elf_sizes
<32>::sym_size
;
6724 if (shdr
.get_sh_size() > sym_size
)
6725 must_merge_flags_and_attributes
= true;
6727 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6728 // If this is neither an empty symbol table nor a string table,
6730 must_merge_flags_and_attributes
= true;
6732 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6734 gold_assert(this->attributes_section_data_
== NULL
);
6735 section_offset_type section_offset
= shdr
.get_sh_offset();
6736 section_size_type section_size
=
6737 convert_to_section_size_type(shdr
.get_sh_size());
6738 const unsigned char* view
=
6739 this->get_view(section_offset
, section_size
, true, false);
6740 this->attributes_section_data_
=
6741 new Attributes_section_data(view
, section_size
);
6743 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6745 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6746 if (text_shndx
== elfcpp::SHN_UNDEF
)
6747 deferred_exidx_sections
.push_back(i
);
6750 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6751 + text_shndx
* shdr_size
);
6752 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6754 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6755 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6756 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6757 this->section_name(i
).c_str(), this->name().c_str());
6762 if (!must_merge_flags_and_attributes
)
6764 gold_assert(deferred_exidx_sections
.empty());
6765 this->merge_flags_and_attributes_
= false;
6769 // Some tools are broken and they do not set the link of EXIDX sections.
6770 // We look at the first relocation to figure out the linked sections.
6771 if (!deferred_exidx_sections
.empty())
6773 // We need to go over the section headers again to find the mapping
6774 // from sections being relocated to their relocation sections. This is
6775 // a bit inefficient as we could do that in the loop above. However,
6776 // we do not expect any deferred EXIDX sections normally. So we do not
6777 // want to slow down the most common path.
6778 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6779 Reloc_map reloc_map
;
6780 ps
= pshdrs
+ shdr_size
;
6781 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6783 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6784 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6785 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6787 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6788 if (info_shndx
>= this->shnum())
6789 gold_error(_("relocation section %u has invalid info %u"),
6791 Reloc_map::value_type
value(info_shndx
, i
);
6792 std::pair
<Reloc_map::iterator
, bool> result
=
6793 reloc_map
.insert(value
);
6795 gold_error(_("section %u has multiple relocation sections "
6797 info_shndx
, i
, reloc_map
[info_shndx
]);
6801 // Read the symbol table section header.
6802 const unsigned int symtab_shndx
= this->symtab_shndx();
6803 elfcpp::Shdr
<32, big_endian
>
6804 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6805 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6807 // Read the local symbols.
6808 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6809 const unsigned int loccount
= this->local_symbol_count();
6810 gold_assert(loccount
== symtabshdr
.get_sh_info());
6811 off_t locsize
= loccount
* sym_size
;
6812 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6813 locsize
, true, true);
6815 // Process the deferred EXIDX sections.
6816 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6818 unsigned int shndx
= deferred_exidx_sections
[i
];
6819 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6820 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6821 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6822 if (it
!= reloc_map
.end())
6823 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6824 psyms
, &text_shndx
);
6825 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6826 + text_shndx
* shdr_size
);
6827 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6832 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6833 // sections for unwinding. These sections are referenced implicitly by
6834 // text sections linked in the section headers. If we ignore these implicit
6835 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6836 // will be garbage-collected incorrectly. Hence we override the same function
6837 // in the base class to handle these implicit references.
6839 template<bool big_endian
>
6841 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6843 Read_relocs_data
* rd
)
6845 // First, call base class method to process relocations in this object.
6846 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6848 // If --gc-sections is not specified, there is nothing more to do.
6849 // This happens when --icf is used but --gc-sections is not.
6850 if (!parameters
->options().gc_sections())
6853 unsigned int shnum
= this->shnum();
6854 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6855 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6859 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6860 // to these from the linked text sections.
6861 const unsigned char* ps
= pshdrs
+ shdr_size
;
6862 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6864 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6865 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6867 // Found an .ARM.exidx section, add it to the set of reachable
6868 // sections from its linked text section.
6869 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6870 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6875 // Update output local symbol count. Owing to EXIDX entry merging, some local
6876 // symbols will be removed in output. Adjust output local symbol count
6877 // accordingly. We can only changed the static output local symbol count. It
6878 // is too late to change the dynamic symbols.
6880 template<bool big_endian
>
6882 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6884 // Caller should check that this needs updating. We want caller checking
6885 // because output_local_symbol_count_needs_update() is most likely inlined.
6886 gold_assert(this->output_local_symbol_count_needs_update_
);
6888 gold_assert(this->symtab_shndx() != -1U);
6889 if (this->symtab_shndx() == 0)
6891 // This object has no symbols. Weird but legal.
6895 // Read the symbol table section header.
6896 const unsigned int symtab_shndx
= this->symtab_shndx();
6897 elfcpp::Shdr
<32, big_endian
>
6898 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6899 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6901 // Read the local symbols.
6902 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6903 const unsigned int loccount
= this->local_symbol_count();
6904 gold_assert(loccount
== symtabshdr
.get_sh_info());
6905 off_t locsize
= loccount
* sym_size
;
6906 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6907 locsize
, true, true);
6909 // Loop over the local symbols.
6911 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6913 const Output_sections
& out_sections(this->output_sections());
6914 unsigned int shnum
= this->shnum();
6915 unsigned int count
= 0;
6916 // Skip the first, dummy, symbol.
6918 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6920 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6922 Symbol_value
<32>& lv((*this->local_values())[i
]);
6924 // This local symbol was already discarded by do_count_local_symbols.
6925 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6929 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6934 Output_section
* os
= out_sections
[shndx
];
6936 // This local symbol no longer has an output section. Discard it.
6939 lv
.set_no_output_symtab_entry();
6943 // Currently we only discard parts of EXIDX input sections.
6944 // We explicitly check for a merged EXIDX input section to avoid
6945 // calling Output_section_data::output_offset unless necessary.
6946 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6947 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6949 section_offset_type output_offset
=
6950 os
->output_offset(this, shndx
, lv
.input_value());
6951 if (output_offset
== -1)
6953 // This symbol is defined in a part of an EXIDX input section
6954 // that is discarded due to entry merging.
6955 lv
.set_no_output_symtab_entry();
6964 this->set_output_local_symbol_count(count
);
6965 this->output_local_symbol_count_needs_update_
= false;
6968 // Arm_dynobj methods.
6970 // Read the symbol information.
6972 template<bool big_endian
>
6974 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6976 // Call parent class to read symbol information.
6977 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6979 // Read processor-specific flags in ELF file header.
6980 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6981 elfcpp::Elf_sizes
<32>::ehdr_size
,
6983 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6984 this->processor_specific_flags_
= ehdr
.get_e_flags();
6986 // Read the attributes section if there is one.
6987 // We read from the end because gas seems to put it near the end of
6988 // the section headers.
6989 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6990 const unsigned char* ps
=
6991 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6992 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6994 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6995 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6997 section_offset_type section_offset
= shdr
.get_sh_offset();
6998 section_size_type section_size
=
6999 convert_to_section_size_type(shdr
.get_sh_size());
7000 const unsigned char* view
=
7001 this->get_view(section_offset
, section_size
, true, false);
7002 this->attributes_section_data_
=
7003 new Attributes_section_data(view
, section_size
);
7009 // Stub_addend_reader methods.
7011 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7013 template<bool big_endian
>
7014 elfcpp::Elf_types
<32>::Elf_Swxword
7015 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7016 unsigned int r_type
,
7017 const unsigned char* view
,
7018 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7020 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7024 case elfcpp::R_ARM_CALL
:
7025 case elfcpp::R_ARM_JUMP24
:
7026 case elfcpp::R_ARM_PLT32
:
7028 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7029 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7030 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7031 return Bits
<26>::sign_extend32(val
<< 2);
7034 case elfcpp::R_ARM_THM_CALL
:
7035 case elfcpp::R_ARM_THM_JUMP24
:
7036 case elfcpp::R_ARM_THM_XPC22
:
7038 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7039 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7040 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7041 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7042 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7045 case elfcpp::R_ARM_THM_JUMP19
:
7047 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7048 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7049 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7050 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7051 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7059 // Arm_output_data_got methods.
7061 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7062 // The first one is initialized to be 1, which is the module index for
7063 // the main executable and the second one 0. A reloc of the type
7064 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7065 // be applied by gold. GSYM is a global symbol.
7067 template<bool big_endian
>
7069 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7070 unsigned int got_type
,
7073 if (gsym
->has_got_offset(got_type
))
7076 // We are doing a static link. Just mark it as belong to module 1,
7078 unsigned int got_offset
= this->add_constant(1);
7079 gsym
->set_got_offset(got_type
, got_offset
);
7080 got_offset
= this->add_constant(0);
7081 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7082 elfcpp::R_ARM_TLS_DTPOFF32
,
7086 // Same as the above but for a local symbol.
7088 template<bool big_endian
>
7090 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7091 unsigned int got_type
,
7092 Sized_relobj_file
<32, big_endian
>* object
,
7095 if (object
->local_has_got_offset(index
, got_type
))
7098 // We are doing a static link. Just mark it as belong to module 1,
7100 unsigned int got_offset
= this->add_constant(1);
7101 object
->set_local_got_offset(index
, got_type
, got_offset
);
7102 got_offset
= this->add_constant(0);
7103 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7104 elfcpp::R_ARM_TLS_DTPOFF32
,
7108 template<bool big_endian
>
7110 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7112 // Call parent to write out GOT.
7113 Output_data_got
<32, big_endian
>::do_write(of
);
7115 // We are done if there is no fix up.
7116 if (this->static_relocs_
.empty())
7119 gold_assert(parameters
->doing_static_link());
7121 const off_t offset
= this->offset();
7122 const section_size_type oview_size
=
7123 convert_to_section_size_type(this->data_size());
7124 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7126 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7127 gold_assert(tls_segment
!= NULL
);
7129 // The thread pointer $tp points to the TCB, which is followed by the
7130 // TLS. So we need to adjust $tp relative addressing by this amount.
7131 Arm_address aligned_tcb_size
=
7132 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7134 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7136 Static_reloc
& reloc(this->static_relocs_
[i
]);
7139 if (!reloc
.symbol_is_global())
7141 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7142 const Symbol_value
<32>* psymval
=
7143 reloc
.relobj()->local_symbol(reloc
.index());
7145 // We are doing static linking. Issue an error and skip this
7146 // relocation if the symbol is undefined or in a discarded_section.
7148 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7149 if ((shndx
== elfcpp::SHN_UNDEF
)
7151 && shndx
!= elfcpp::SHN_UNDEF
7152 && !object
->is_section_included(shndx
)
7153 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7155 gold_error(_("undefined or discarded local symbol %u from "
7156 " object %s in GOT"),
7157 reloc
.index(), reloc
.relobj()->name().c_str());
7161 value
= psymval
->value(object
, 0);
7165 const Symbol
* gsym
= reloc
.symbol();
7166 gold_assert(gsym
!= NULL
);
7167 if (gsym
->is_forwarder())
7168 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7170 // We are doing static linking. Issue an error and skip this
7171 // relocation if the symbol is undefined or in a discarded_section
7172 // unless it is a weakly_undefined symbol.
7173 if ((gsym
->is_defined_in_discarded_section()
7174 || gsym
->is_undefined())
7175 && !gsym
->is_weak_undefined())
7177 gold_error(_("undefined or discarded symbol %s in GOT"),
7182 if (!gsym
->is_weak_undefined())
7184 const Sized_symbol
<32>* sym
=
7185 static_cast<const Sized_symbol
<32>*>(gsym
);
7186 value
= sym
->value();
7192 unsigned got_offset
= reloc
.got_offset();
7193 gold_assert(got_offset
< oview_size
);
7195 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7196 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7198 switch (reloc
.r_type())
7200 case elfcpp::R_ARM_TLS_DTPOFF32
:
7203 case elfcpp::R_ARM_TLS_TPOFF32
:
7204 x
= value
+ aligned_tcb_size
;
7209 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7212 of
->write_output_view(offset
, oview_size
, oview
);
7215 // A class to handle the PLT data.
7216 // This is an abstract base class that handles most of the linker details
7217 // but does not know the actual contents of PLT entries. The derived
7218 // classes below fill in those details.
7220 template<bool big_endian
>
7221 class Output_data_plt_arm
: public Output_section_data
7224 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7227 Output_data_plt_arm(Layout
*, uint64_t addralign
, Output_data_space
*);
7229 // Add an entry to the PLT.
7231 add_entry(Symbol
* gsym
);
7233 // Return the .rel.plt section data.
7234 const Reloc_section
*
7236 { return this->rel_
; }
7238 // Return the number of PLT entries.
7241 { return this->count_
; }
7243 // Return the offset of the first non-reserved PLT entry.
7245 first_plt_entry_offset() const
7246 { return this->do_first_plt_entry_offset(); }
7248 // Return the size of a PLT entry.
7250 get_plt_entry_size() const
7251 { return this->do_get_plt_entry_size(); }
7254 // Fill in the first PLT entry.
7256 fill_first_plt_entry(unsigned char* pov
,
7257 Arm_address got_address
,
7258 Arm_address plt_address
)
7259 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7262 fill_plt_entry(unsigned char* pov
,
7263 Arm_address got_address
,
7264 Arm_address plt_address
,
7265 unsigned int got_offset
,
7266 unsigned int plt_offset
)
7267 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7269 virtual unsigned int
7270 do_first_plt_entry_offset() const = 0;
7272 virtual unsigned int
7273 do_get_plt_entry_size() const = 0;
7276 do_fill_first_plt_entry(unsigned char* pov
,
7277 Arm_address got_address
,
7278 Arm_address plt_address
) = 0;
7281 do_fill_plt_entry(unsigned char* pov
,
7282 Arm_address got_address
,
7283 Arm_address plt_address
,
7284 unsigned int got_offset
,
7285 unsigned int plt_offset
) = 0;
7288 do_adjust_output_section(Output_section
* os
);
7290 // Write to a map file.
7292 do_print_to_mapfile(Mapfile
* mapfile
) const
7293 { mapfile
->print_output_data(this, _("** PLT")); }
7296 // Set the final size.
7298 set_final_data_size()
7300 this->set_data_size(this->first_plt_entry_offset()
7301 + this->count_
* this->get_plt_entry_size());
7304 // Write out the PLT data.
7306 do_write(Output_file
*);
7308 // The reloc section.
7309 Reloc_section
* rel_
;
7310 // The .got.plt section.
7311 Output_data_space
* got_plt_
;
7312 // The number of PLT entries.
7313 unsigned int count_
;
7316 // Create the PLT section. The ordinary .got section is an argument,
7317 // since we need to refer to the start. We also create our own .got
7318 // section just for PLT entries.
7320 template<bool big_endian
>
7321 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7323 Output_data_space
* got_plt
)
7324 : Output_section_data(addralign
), got_plt_(got_plt
), count_(0)
7326 this->rel_
= new Reloc_section(false);
7327 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7328 elfcpp::SHF_ALLOC
, this->rel_
,
7329 ORDER_DYNAMIC_PLT_RELOCS
, false);
7332 template<bool big_endian
>
7334 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7339 // Add an entry to the PLT.
7341 template<bool big_endian
>
7343 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7345 gold_assert(!gsym
->has_plt_offset());
7347 // Note that when setting the PLT offset we skip the initial
7348 // reserved PLT entry.
7349 gsym
->set_plt_offset((this->count_
) * this->get_plt_entry_size()
7350 + this->first_plt_entry_offset());
7354 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7356 // Every PLT entry needs a GOT entry which points back to the PLT
7357 // entry (this will be changed by the dynamic linker, normally
7358 // lazily when the function is called).
7359 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7361 // Every PLT entry needs a reloc.
7362 gsym
->set_needs_dynsym_entry();
7363 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7366 // Note that we don't need to save the symbol. The contents of the
7367 // PLT are independent of which symbols are used. The symbols only
7368 // appear in the relocations.
7371 template<bool big_endian
>
7372 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7375 Output_data_plt_arm_standard(Layout
* layout
, Output_data_space
* got_plt
)
7376 : Output_data_plt_arm
<big_endian
>(layout
, 4, got_plt
)
7380 // Return the offset of the first non-reserved PLT entry.
7381 virtual unsigned int
7382 do_first_plt_entry_offset() const
7383 { return sizeof(first_plt_entry
); }
7385 // Return the size of a PLT entry.
7386 virtual unsigned int
7387 do_get_plt_entry_size() const
7388 { return sizeof(plt_entry
); }
7391 do_fill_first_plt_entry(unsigned char* pov
,
7392 Arm_address got_address
,
7393 Arm_address plt_address
);
7396 do_fill_plt_entry(unsigned char* pov
,
7397 Arm_address got_address
,
7398 Arm_address plt_address
,
7399 unsigned int got_offset
,
7400 unsigned int plt_offset
);
7403 // Template for the first PLT entry.
7404 static const uint32_t first_plt_entry
[5];
7406 // Template for subsequent PLT entries.
7407 static const uint32_t plt_entry
[3];
7411 // FIXME: This is not very flexible. Right now this has only been tested
7412 // on armv5te. If we are to support additional architecture features like
7413 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7415 // The first entry in the PLT.
7416 template<bool big_endian
>
7417 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7419 0xe52de004, // str lr, [sp, #-4]!
7420 0xe59fe004, // ldr lr, [pc, #4]
7421 0xe08fe00e, // add lr, pc, lr
7422 0xe5bef008, // ldr pc, [lr, #8]!
7423 0x00000000, // &GOT[0] - .
7426 template<bool big_endian
>
7428 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7430 Arm_address got_address
,
7431 Arm_address plt_address
)
7433 // Write first PLT entry. All but the last word are constants.
7434 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7435 / sizeof(plt_entry
[0]));
7436 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7437 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7438 // Last word in first PLT entry is &GOT[0] - .
7439 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7440 got_address
- (plt_address
+ 16));
7443 // Subsequent entries in the PLT.
7445 template<bool big_endian
>
7446 const uint32_t Output_data_plt_arm_standard
<big_endian
>::plt_entry
[3] =
7448 0xe28fc600, // add ip, pc, #0xNN00000
7449 0xe28cca00, // add ip, ip, #0xNN000
7450 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7453 template<bool big_endian
>
7455 Output_data_plt_arm_standard
<big_endian
>::do_fill_plt_entry(
7457 Arm_address got_address
,
7458 Arm_address plt_address
,
7459 unsigned int got_offset
,
7460 unsigned int plt_offset
)
7462 int32_t offset
= ((got_address
+ got_offset
)
7463 - (plt_address
+ plt_offset
+ 8));
7465 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7466 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7467 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7468 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7469 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7470 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7471 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7474 // Write out the PLT. This uses the hand-coded instructions above,
7475 // and adjusts them as needed. This is all specified by the arm ELF
7476 // Processor Supplement.
7478 template<bool big_endian
>
7480 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7482 const off_t offset
= this->offset();
7483 const section_size_type oview_size
=
7484 convert_to_section_size_type(this->data_size());
7485 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7487 const off_t got_file_offset
= this->got_plt_
->offset();
7488 const section_size_type got_size
=
7489 convert_to_section_size_type(this->got_plt_
->data_size());
7490 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7492 unsigned char* pov
= oview
;
7494 Arm_address plt_address
= this->address();
7495 Arm_address got_address
= this->got_plt_
->address();
7497 // Write first PLT entry.
7498 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
7499 pov
+= this->first_plt_entry_offset();
7501 unsigned char* got_pov
= got_view
;
7503 memset(got_pov
, 0, 12);
7506 unsigned int plt_offset
= this->first_plt_entry_offset();
7507 unsigned int got_offset
= 12;
7508 const unsigned int count
= this->count_
;
7509 for (unsigned int i
= 0;
7512 pov
+= this->get_plt_entry_size(),
7514 plt_offset
+= this->get_plt_entry_size(),
7517 // Set and adjust the PLT entry itself.
7518 this->fill_plt_entry(pov
, got_address
, plt_address
,
7519 got_offset
, plt_offset
);
7521 // Set the entry in the GOT.
7522 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7525 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7526 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7528 of
->write_output_view(offset
, oview_size
, oview
);
7529 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7532 // Create a PLT entry for a global symbol.
7534 template<bool big_endian
>
7536 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7539 if (gsym
->has_plt_offset())
7542 if (this->plt_
== NULL
)
7544 // Create the GOT sections first.
7545 this->got_section(symtab
, layout
);
7547 this->plt_
= this->make_data_plt(layout
, this->got_plt_
);
7549 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7551 | elfcpp::SHF_EXECINSTR
),
7552 this->plt_
, ORDER_PLT
, false);
7554 this->plt_
->add_entry(gsym
);
7557 // Return the number of entries in the PLT.
7559 template<bool big_endian
>
7561 Target_arm
<big_endian
>::plt_entry_count() const
7563 if (this->plt_
== NULL
)
7565 return this->plt_
->entry_count();
7568 // Return the offset of the first non-reserved PLT entry.
7570 template<bool big_endian
>
7572 Target_arm
<big_endian
>::first_plt_entry_offset() const
7574 return this->plt_
->first_plt_entry_offset();
7577 // Return the size of each PLT entry.
7579 template<bool big_endian
>
7581 Target_arm
<big_endian
>::plt_entry_size() const
7583 return this->plt_
->get_plt_entry_size();
7586 // Get the section to use for TLS_DESC relocations.
7588 template<bool big_endian
>
7589 typename Target_arm
<big_endian
>::Reloc_section
*
7590 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7592 return this->plt_section()->rel_tls_desc(layout
);
7595 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7597 template<bool big_endian
>
7599 Target_arm
<big_endian
>::define_tls_base_symbol(
7600 Symbol_table
* symtab
,
7603 if (this->tls_base_symbol_defined_
)
7606 Output_segment
* tls_segment
= layout
->tls_segment();
7607 if (tls_segment
!= NULL
)
7609 bool is_exec
= parameters
->options().output_is_executable();
7610 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7611 Symbol_table::PREDEFINED
,
7615 elfcpp::STV_HIDDEN
, 0,
7617 ? Symbol::SEGMENT_END
7618 : Symbol::SEGMENT_START
),
7621 this->tls_base_symbol_defined_
= true;
7624 // Create a GOT entry for the TLS module index.
7626 template<bool big_endian
>
7628 Target_arm
<big_endian
>::got_mod_index_entry(
7629 Symbol_table
* symtab
,
7631 Sized_relobj_file
<32, big_endian
>* object
)
7633 if (this->got_mod_index_offset_
== -1U)
7635 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7636 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7637 unsigned int got_offset
;
7638 if (!parameters
->doing_static_link())
7640 got_offset
= got
->add_constant(0);
7641 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7642 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7647 // We are doing a static link. Just mark it as belong to module 1,
7649 got_offset
= got
->add_constant(1);
7652 got
->add_constant(0);
7653 this->got_mod_index_offset_
= got_offset
;
7655 return this->got_mod_index_offset_
;
7658 // Optimize the TLS relocation type based on what we know about the
7659 // symbol. IS_FINAL is true if the final address of this symbol is
7660 // known at link time.
7662 template<bool big_endian
>
7663 tls::Tls_optimization
7664 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7666 // FIXME: Currently we do not do any TLS optimization.
7667 return tls::TLSOPT_NONE
;
7670 // Get the Reference_flags for a particular relocation.
7672 template<bool big_endian
>
7674 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
7678 case elfcpp::R_ARM_NONE
:
7679 case elfcpp::R_ARM_V4BX
:
7680 case elfcpp::R_ARM_GNU_VTENTRY
:
7681 case elfcpp::R_ARM_GNU_VTINHERIT
:
7682 // No symbol reference.
7685 case elfcpp::R_ARM_ABS32
:
7686 case elfcpp::R_ARM_ABS16
:
7687 case elfcpp::R_ARM_ABS12
:
7688 case elfcpp::R_ARM_THM_ABS5
:
7689 case elfcpp::R_ARM_ABS8
:
7690 case elfcpp::R_ARM_BASE_ABS
:
7691 case elfcpp::R_ARM_MOVW_ABS_NC
:
7692 case elfcpp::R_ARM_MOVT_ABS
:
7693 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7694 case elfcpp::R_ARM_THM_MOVT_ABS
:
7695 case elfcpp::R_ARM_ABS32_NOI
:
7696 return Symbol::ABSOLUTE_REF
;
7698 case elfcpp::R_ARM_REL32
:
7699 case elfcpp::R_ARM_LDR_PC_G0
:
7700 case elfcpp::R_ARM_SBREL32
:
7701 case elfcpp::R_ARM_THM_PC8
:
7702 case elfcpp::R_ARM_BASE_PREL
:
7703 case elfcpp::R_ARM_MOVW_PREL_NC
:
7704 case elfcpp::R_ARM_MOVT_PREL
:
7705 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7706 case elfcpp::R_ARM_THM_MOVT_PREL
:
7707 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7708 case elfcpp::R_ARM_THM_PC12
:
7709 case elfcpp::R_ARM_REL32_NOI
:
7710 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7711 case elfcpp::R_ARM_ALU_PC_G0
:
7712 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7713 case elfcpp::R_ARM_ALU_PC_G1
:
7714 case elfcpp::R_ARM_ALU_PC_G2
:
7715 case elfcpp::R_ARM_LDR_PC_G1
:
7716 case elfcpp::R_ARM_LDR_PC_G2
:
7717 case elfcpp::R_ARM_LDRS_PC_G0
:
7718 case elfcpp::R_ARM_LDRS_PC_G1
:
7719 case elfcpp::R_ARM_LDRS_PC_G2
:
7720 case elfcpp::R_ARM_LDC_PC_G0
:
7721 case elfcpp::R_ARM_LDC_PC_G1
:
7722 case elfcpp::R_ARM_LDC_PC_G2
:
7723 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7724 case elfcpp::R_ARM_ALU_SB_G0
:
7725 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7726 case elfcpp::R_ARM_ALU_SB_G1
:
7727 case elfcpp::R_ARM_ALU_SB_G2
:
7728 case elfcpp::R_ARM_LDR_SB_G0
:
7729 case elfcpp::R_ARM_LDR_SB_G1
:
7730 case elfcpp::R_ARM_LDR_SB_G2
:
7731 case elfcpp::R_ARM_LDRS_SB_G0
:
7732 case elfcpp::R_ARM_LDRS_SB_G1
:
7733 case elfcpp::R_ARM_LDRS_SB_G2
:
7734 case elfcpp::R_ARM_LDC_SB_G0
:
7735 case elfcpp::R_ARM_LDC_SB_G1
:
7736 case elfcpp::R_ARM_LDC_SB_G2
:
7737 case elfcpp::R_ARM_MOVW_BREL_NC
:
7738 case elfcpp::R_ARM_MOVT_BREL
:
7739 case elfcpp::R_ARM_MOVW_BREL
:
7740 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7741 case elfcpp::R_ARM_THM_MOVT_BREL
:
7742 case elfcpp::R_ARM_THM_MOVW_BREL
:
7743 case elfcpp::R_ARM_GOTOFF32
:
7744 case elfcpp::R_ARM_GOTOFF12
:
7745 case elfcpp::R_ARM_SBREL31
:
7746 return Symbol::RELATIVE_REF
;
7748 case elfcpp::R_ARM_PLT32
:
7749 case elfcpp::R_ARM_CALL
:
7750 case elfcpp::R_ARM_JUMP24
:
7751 case elfcpp::R_ARM_THM_CALL
:
7752 case elfcpp::R_ARM_THM_JUMP24
:
7753 case elfcpp::R_ARM_THM_JUMP19
:
7754 case elfcpp::R_ARM_THM_JUMP6
:
7755 case elfcpp::R_ARM_THM_JUMP11
:
7756 case elfcpp::R_ARM_THM_JUMP8
:
7757 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7758 // in unwind tables. It may point to functions via PLTs.
7759 // So we treat it like call/jump relocations above.
7760 case elfcpp::R_ARM_PREL31
:
7761 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
7763 case elfcpp::R_ARM_GOT_BREL
:
7764 case elfcpp::R_ARM_GOT_ABS
:
7765 case elfcpp::R_ARM_GOT_PREL
:
7767 return Symbol::ABSOLUTE_REF
;
7769 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7770 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7771 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7772 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7773 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7774 return Symbol::TLS_REF
;
7776 case elfcpp::R_ARM_TARGET1
:
7777 case elfcpp::R_ARM_TARGET2
:
7778 case elfcpp::R_ARM_COPY
:
7779 case elfcpp::R_ARM_GLOB_DAT
:
7780 case elfcpp::R_ARM_JUMP_SLOT
:
7781 case elfcpp::R_ARM_RELATIVE
:
7782 case elfcpp::R_ARM_PC24
:
7783 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7784 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7785 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7787 // Not expected. We will give an error later.
7792 // Report an unsupported relocation against a local symbol.
7794 template<bool big_endian
>
7796 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7797 Sized_relobj_file
<32, big_endian
>* object
,
7798 unsigned int r_type
)
7800 gold_error(_("%s: unsupported reloc %u against local symbol"),
7801 object
->name().c_str(), r_type
);
7804 // We are about to emit a dynamic relocation of type R_TYPE. If the
7805 // dynamic linker does not support it, issue an error. The GNU linker
7806 // only issues a non-PIC error for an allocated read-only section.
7807 // Here we know the section is allocated, but we don't know that it is
7808 // read-only. But we check for all the relocation types which the
7809 // glibc dynamic linker supports, so it seems appropriate to issue an
7810 // error even if the section is not read-only.
7812 template<bool big_endian
>
7814 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7815 unsigned int r_type
)
7819 // These are the relocation types supported by glibc for ARM.
7820 case elfcpp::R_ARM_RELATIVE
:
7821 case elfcpp::R_ARM_COPY
:
7822 case elfcpp::R_ARM_GLOB_DAT
:
7823 case elfcpp::R_ARM_JUMP_SLOT
:
7824 case elfcpp::R_ARM_ABS32
:
7825 case elfcpp::R_ARM_ABS32_NOI
:
7826 case elfcpp::R_ARM_PC24
:
7827 // FIXME: The following 3 types are not supported by Android's dynamic
7829 case elfcpp::R_ARM_TLS_DTPMOD32
:
7830 case elfcpp::R_ARM_TLS_DTPOFF32
:
7831 case elfcpp::R_ARM_TLS_TPOFF32
:
7836 // This prevents us from issuing more than one error per reloc
7837 // section. But we can still wind up issuing more than one
7838 // error per object file.
7839 if (this->issued_non_pic_error_
)
7841 const Arm_reloc_property
* reloc_property
=
7842 arm_reloc_property_table
->get_reloc_property(r_type
);
7843 gold_assert(reloc_property
!= NULL
);
7844 object
->error(_("requires unsupported dynamic reloc %s; "
7845 "recompile with -fPIC"),
7846 reloc_property
->name().c_str());
7847 this->issued_non_pic_error_
= true;
7851 case elfcpp::R_ARM_NONE
:
7856 // Scan a relocation for a local symbol.
7857 // FIXME: This only handles a subset of relocation types used by Android
7858 // on ARM v5te devices.
7860 template<bool big_endian
>
7862 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7865 Sized_relobj_file
<32, big_endian
>* object
,
7866 unsigned int data_shndx
,
7867 Output_section
* output_section
,
7868 const elfcpp::Rel
<32, big_endian
>& reloc
,
7869 unsigned int r_type
,
7870 const elfcpp::Sym
<32, big_endian
>& lsym
,
7876 r_type
= get_real_reloc_type(r_type
);
7879 case elfcpp::R_ARM_NONE
:
7880 case elfcpp::R_ARM_V4BX
:
7881 case elfcpp::R_ARM_GNU_VTENTRY
:
7882 case elfcpp::R_ARM_GNU_VTINHERIT
:
7885 case elfcpp::R_ARM_ABS32
:
7886 case elfcpp::R_ARM_ABS32_NOI
:
7887 // If building a shared library (or a position-independent
7888 // executable), we need to create a dynamic relocation for
7889 // this location. The relocation applied at link time will
7890 // apply the link-time value, so we flag the location with
7891 // an R_ARM_RELATIVE relocation so the dynamic loader can
7892 // relocate it easily.
7893 if (parameters
->options().output_is_position_independent())
7895 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7896 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7897 // If we are to add more other reloc types than R_ARM_ABS32,
7898 // we need to add check_non_pic(object, r_type) here.
7899 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7900 output_section
, data_shndx
,
7901 reloc
.get_r_offset());
7905 case elfcpp::R_ARM_ABS16
:
7906 case elfcpp::R_ARM_ABS12
:
7907 case elfcpp::R_ARM_THM_ABS5
:
7908 case elfcpp::R_ARM_ABS8
:
7909 case elfcpp::R_ARM_BASE_ABS
:
7910 case elfcpp::R_ARM_MOVW_ABS_NC
:
7911 case elfcpp::R_ARM_MOVT_ABS
:
7912 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7913 case elfcpp::R_ARM_THM_MOVT_ABS
:
7914 // If building a shared library (or a position-independent
7915 // executable), we need to create a dynamic relocation for
7916 // this location. Because the addend needs to remain in the
7917 // data section, we need to be careful not to apply this
7918 // relocation statically.
7919 if (parameters
->options().output_is_position_independent())
7921 check_non_pic(object
, r_type
);
7922 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7923 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7924 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7925 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7926 data_shndx
, reloc
.get_r_offset());
7929 gold_assert(lsym
.get_st_value() == 0);
7930 unsigned int shndx
= lsym
.get_st_shndx();
7932 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7935 object
->error(_("section symbol %u has bad shndx %u"),
7938 rel_dyn
->add_local_section(object
, shndx
,
7939 r_type
, output_section
,
7940 data_shndx
, reloc
.get_r_offset());
7945 case elfcpp::R_ARM_REL32
:
7946 case elfcpp::R_ARM_LDR_PC_G0
:
7947 case elfcpp::R_ARM_SBREL32
:
7948 case elfcpp::R_ARM_THM_CALL
:
7949 case elfcpp::R_ARM_THM_PC8
:
7950 case elfcpp::R_ARM_BASE_PREL
:
7951 case elfcpp::R_ARM_PLT32
:
7952 case elfcpp::R_ARM_CALL
:
7953 case elfcpp::R_ARM_JUMP24
:
7954 case elfcpp::R_ARM_THM_JUMP24
:
7955 case elfcpp::R_ARM_SBREL31
:
7956 case elfcpp::R_ARM_PREL31
:
7957 case elfcpp::R_ARM_MOVW_PREL_NC
:
7958 case elfcpp::R_ARM_MOVT_PREL
:
7959 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7960 case elfcpp::R_ARM_THM_MOVT_PREL
:
7961 case elfcpp::R_ARM_THM_JUMP19
:
7962 case elfcpp::R_ARM_THM_JUMP6
:
7963 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7964 case elfcpp::R_ARM_THM_PC12
:
7965 case elfcpp::R_ARM_REL32_NOI
:
7966 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7967 case elfcpp::R_ARM_ALU_PC_G0
:
7968 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7969 case elfcpp::R_ARM_ALU_PC_G1
:
7970 case elfcpp::R_ARM_ALU_PC_G2
:
7971 case elfcpp::R_ARM_LDR_PC_G1
:
7972 case elfcpp::R_ARM_LDR_PC_G2
:
7973 case elfcpp::R_ARM_LDRS_PC_G0
:
7974 case elfcpp::R_ARM_LDRS_PC_G1
:
7975 case elfcpp::R_ARM_LDRS_PC_G2
:
7976 case elfcpp::R_ARM_LDC_PC_G0
:
7977 case elfcpp::R_ARM_LDC_PC_G1
:
7978 case elfcpp::R_ARM_LDC_PC_G2
:
7979 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7980 case elfcpp::R_ARM_ALU_SB_G0
:
7981 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7982 case elfcpp::R_ARM_ALU_SB_G1
:
7983 case elfcpp::R_ARM_ALU_SB_G2
:
7984 case elfcpp::R_ARM_LDR_SB_G0
:
7985 case elfcpp::R_ARM_LDR_SB_G1
:
7986 case elfcpp::R_ARM_LDR_SB_G2
:
7987 case elfcpp::R_ARM_LDRS_SB_G0
:
7988 case elfcpp::R_ARM_LDRS_SB_G1
:
7989 case elfcpp::R_ARM_LDRS_SB_G2
:
7990 case elfcpp::R_ARM_LDC_SB_G0
:
7991 case elfcpp::R_ARM_LDC_SB_G1
:
7992 case elfcpp::R_ARM_LDC_SB_G2
:
7993 case elfcpp::R_ARM_MOVW_BREL_NC
:
7994 case elfcpp::R_ARM_MOVT_BREL
:
7995 case elfcpp::R_ARM_MOVW_BREL
:
7996 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7997 case elfcpp::R_ARM_THM_MOVT_BREL
:
7998 case elfcpp::R_ARM_THM_MOVW_BREL
:
7999 case elfcpp::R_ARM_THM_JUMP11
:
8000 case elfcpp::R_ARM_THM_JUMP8
:
8001 // We don't need to do anything for a relative addressing relocation
8002 // against a local symbol if it does not reference the GOT.
8005 case elfcpp::R_ARM_GOTOFF32
:
8006 case elfcpp::R_ARM_GOTOFF12
:
8007 // We need a GOT section:
8008 target
->got_section(symtab
, layout
);
8011 case elfcpp::R_ARM_GOT_BREL
:
8012 case elfcpp::R_ARM_GOT_PREL
:
8014 // The symbol requires a GOT entry.
8015 Arm_output_data_got
<big_endian
>* got
=
8016 target
->got_section(symtab
, layout
);
8017 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8018 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8020 // If we are generating a shared object, we need to add a
8021 // dynamic RELATIVE relocation for this symbol's GOT entry.
8022 if (parameters
->options().output_is_position_independent())
8024 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8025 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8026 rel_dyn
->add_local_relative(
8027 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8028 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8034 case elfcpp::R_ARM_TARGET1
:
8035 case elfcpp::R_ARM_TARGET2
:
8036 // This should have been mapped to another type already.
8038 case elfcpp::R_ARM_COPY
:
8039 case elfcpp::R_ARM_GLOB_DAT
:
8040 case elfcpp::R_ARM_JUMP_SLOT
:
8041 case elfcpp::R_ARM_RELATIVE
:
8042 // These are relocations which should only be seen by the
8043 // dynamic linker, and should never be seen here.
8044 gold_error(_("%s: unexpected reloc %u in object file"),
8045 object
->name().c_str(), r_type
);
8049 // These are initial TLS relocs, which are expected when
8051 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8052 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8053 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8054 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8055 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8057 bool output_is_shared
= parameters
->options().shared();
8058 const tls::Tls_optimization optimized_type
8059 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8063 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8064 if (optimized_type
== tls::TLSOPT_NONE
)
8066 // Create a pair of GOT entries for the module index and
8067 // dtv-relative offset.
8068 Arm_output_data_got
<big_endian
>* got
8069 = target
->got_section(symtab
, layout
);
8070 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8071 unsigned int shndx
= lsym
.get_st_shndx();
8073 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8076 object
->error(_("local symbol %u has bad shndx %u"),
8081 if (!parameters
->doing_static_link())
8082 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8084 target
->rel_dyn_section(layout
),
8085 elfcpp::R_ARM_TLS_DTPMOD32
);
8087 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8091 // FIXME: TLS optimization not supported yet.
8095 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8096 if (optimized_type
== tls::TLSOPT_NONE
)
8098 // Create a GOT entry for the module index.
8099 target
->got_mod_index_entry(symtab
, layout
, object
);
8102 // FIXME: TLS optimization not supported yet.
8106 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8109 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8110 layout
->set_has_static_tls();
8111 if (optimized_type
== tls::TLSOPT_NONE
)
8113 // Create a GOT entry for the tp-relative offset.
8114 Arm_output_data_got
<big_endian
>* got
8115 = target
->got_section(symtab
, layout
);
8116 unsigned int r_sym
=
8117 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8118 if (!parameters
->doing_static_link())
8119 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8120 target
->rel_dyn_section(layout
),
8121 elfcpp::R_ARM_TLS_TPOFF32
);
8122 else if (!object
->local_has_got_offset(r_sym
,
8123 GOT_TYPE_TLS_OFFSET
))
8125 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8126 unsigned int got_offset
=
8127 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8128 got
->add_static_reloc(got_offset
,
8129 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8134 // FIXME: TLS optimization not supported yet.
8138 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8139 layout
->set_has_static_tls();
8140 if (output_is_shared
)
8142 // We need to create a dynamic relocation.
8143 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8144 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8145 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8146 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8147 output_section
, data_shndx
,
8148 reloc
.get_r_offset());
8158 case elfcpp::R_ARM_PC24
:
8159 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8160 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8161 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8163 unsupported_reloc_local(object
, r_type
);
8168 // Report an unsupported relocation against a global symbol.
8170 template<bool big_endian
>
8172 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8173 Sized_relobj_file
<32, big_endian
>* object
,
8174 unsigned int r_type
,
8177 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8178 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8181 template<bool big_endian
>
8183 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8184 unsigned int r_type
)
8188 case elfcpp::R_ARM_PC24
:
8189 case elfcpp::R_ARM_THM_CALL
:
8190 case elfcpp::R_ARM_PLT32
:
8191 case elfcpp::R_ARM_CALL
:
8192 case elfcpp::R_ARM_JUMP24
:
8193 case elfcpp::R_ARM_THM_JUMP24
:
8194 case elfcpp::R_ARM_SBREL31
:
8195 case elfcpp::R_ARM_PREL31
:
8196 case elfcpp::R_ARM_THM_JUMP19
:
8197 case elfcpp::R_ARM_THM_JUMP6
:
8198 case elfcpp::R_ARM_THM_JUMP11
:
8199 case elfcpp::R_ARM_THM_JUMP8
:
8200 // All the relocations above are branches except SBREL31 and PREL31.
8204 // Be conservative and assume this is a function pointer.
8209 template<bool big_endian
>
8211 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8214 Target_arm
<big_endian
>* target
,
8215 Sized_relobj_file
<32, big_endian
>*,
8218 const elfcpp::Rel
<32, big_endian
>&,
8219 unsigned int r_type
,
8220 const elfcpp::Sym
<32, big_endian
>&)
8222 r_type
= target
->get_real_reloc_type(r_type
);
8223 return possible_function_pointer_reloc(r_type
);
8226 template<bool big_endian
>
8228 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8231 Target_arm
<big_endian
>* target
,
8232 Sized_relobj_file
<32, big_endian
>*,
8235 const elfcpp::Rel
<32, big_endian
>&,
8236 unsigned int r_type
,
8239 // GOT is not a function.
8240 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8243 r_type
= target
->get_real_reloc_type(r_type
);
8244 return possible_function_pointer_reloc(r_type
);
8247 // Scan a relocation for a global symbol.
8249 template<bool big_endian
>
8251 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8254 Sized_relobj_file
<32, big_endian
>* object
,
8255 unsigned int data_shndx
,
8256 Output_section
* output_section
,
8257 const elfcpp::Rel
<32, big_endian
>& reloc
,
8258 unsigned int r_type
,
8261 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8262 // section. We check here to avoid creating a dynamic reloc against
8263 // _GLOBAL_OFFSET_TABLE_.
8264 if (!target
->has_got_section()
8265 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8266 target
->got_section(symtab
, layout
);
8268 r_type
= get_real_reloc_type(r_type
);
8271 case elfcpp::R_ARM_NONE
:
8272 case elfcpp::R_ARM_V4BX
:
8273 case elfcpp::R_ARM_GNU_VTENTRY
:
8274 case elfcpp::R_ARM_GNU_VTINHERIT
:
8277 case elfcpp::R_ARM_ABS32
:
8278 case elfcpp::R_ARM_ABS16
:
8279 case elfcpp::R_ARM_ABS12
:
8280 case elfcpp::R_ARM_THM_ABS5
:
8281 case elfcpp::R_ARM_ABS8
:
8282 case elfcpp::R_ARM_BASE_ABS
:
8283 case elfcpp::R_ARM_MOVW_ABS_NC
:
8284 case elfcpp::R_ARM_MOVT_ABS
:
8285 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8286 case elfcpp::R_ARM_THM_MOVT_ABS
:
8287 case elfcpp::R_ARM_ABS32_NOI
:
8288 // Absolute addressing relocations.
8290 // Make a PLT entry if necessary.
8291 if (this->symbol_needs_plt_entry(gsym
))
8293 target
->make_plt_entry(symtab
, layout
, gsym
);
8294 // Since this is not a PC-relative relocation, we may be
8295 // taking the address of a function. In that case we need to
8296 // set the entry in the dynamic symbol table to the address of
8298 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8299 gsym
->set_needs_dynsym_value();
8301 // Make a dynamic relocation if necessary.
8302 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8304 if (!parameters
->options().output_is_position_independent()
8305 && gsym
->may_need_copy_reloc())
8307 target
->copy_reloc(symtab
, layout
, object
,
8308 data_shndx
, output_section
, gsym
, reloc
);
8310 else if ((r_type
== elfcpp::R_ARM_ABS32
8311 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8312 && gsym
->can_use_relative_reloc(false))
8314 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8315 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8316 output_section
, object
,
8317 data_shndx
, reloc
.get_r_offset());
8321 check_non_pic(object
, r_type
);
8322 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8323 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8324 data_shndx
, reloc
.get_r_offset());
8330 case elfcpp::R_ARM_GOTOFF32
:
8331 case elfcpp::R_ARM_GOTOFF12
:
8332 // We need a GOT section.
8333 target
->got_section(symtab
, layout
);
8336 case elfcpp::R_ARM_REL32
:
8337 case elfcpp::R_ARM_LDR_PC_G0
:
8338 case elfcpp::R_ARM_SBREL32
:
8339 case elfcpp::R_ARM_THM_PC8
:
8340 case elfcpp::R_ARM_BASE_PREL
:
8341 case elfcpp::R_ARM_MOVW_PREL_NC
:
8342 case elfcpp::R_ARM_MOVT_PREL
:
8343 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8344 case elfcpp::R_ARM_THM_MOVT_PREL
:
8345 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8346 case elfcpp::R_ARM_THM_PC12
:
8347 case elfcpp::R_ARM_REL32_NOI
:
8348 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8349 case elfcpp::R_ARM_ALU_PC_G0
:
8350 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8351 case elfcpp::R_ARM_ALU_PC_G1
:
8352 case elfcpp::R_ARM_ALU_PC_G2
:
8353 case elfcpp::R_ARM_LDR_PC_G1
:
8354 case elfcpp::R_ARM_LDR_PC_G2
:
8355 case elfcpp::R_ARM_LDRS_PC_G0
:
8356 case elfcpp::R_ARM_LDRS_PC_G1
:
8357 case elfcpp::R_ARM_LDRS_PC_G2
:
8358 case elfcpp::R_ARM_LDC_PC_G0
:
8359 case elfcpp::R_ARM_LDC_PC_G1
:
8360 case elfcpp::R_ARM_LDC_PC_G2
:
8361 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8362 case elfcpp::R_ARM_ALU_SB_G0
:
8363 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8364 case elfcpp::R_ARM_ALU_SB_G1
:
8365 case elfcpp::R_ARM_ALU_SB_G2
:
8366 case elfcpp::R_ARM_LDR_SB_G0
:
8367 case elfcpp::R_ARM_LDR_SB_G1
:
8368 case elfcpp::R_ARM_LDR_SB_G2
:
8369 case elfcpp::R_ARM_LDRS_SB_G0
:
8370 case elfcpp::R_ARM_LDRS_SB_G1
:
8371 case elfcpp::R_ARM_LDRS_SB_G2
:
8372 case elfcpp::R_ARM_LDC_SB_G0
:
8373 case elfcpp::R_ARM_LDC_SB_G1
:
8374 case elfcpp::R_ARM_LDC_SB_G2
:
8375 case elfcpp::R_ARM_MOVW_BREL_NC
:
8376 case elfcpp::R_ARM_MOVT_BREL
:
8377 case elfcpp::R_ARM_MOVW_BREL
:
8378 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8379 case elfcpp::R_ARM_THM_MOVT_BREL
:
8380 case elfcpp::R_ARM_THM_MOVW_BREL
:
8381 // Relative addressing relocations.
8383 // Make a dynamic relocation if necessary.
8384 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8386 if (parameters
->options().output_is_executable()
8387 && target
->may_need_copy_reloc(gsym
))
8389 target
->copy_reloc(symtab
, layout
, object
,
8390 data_shndx
, output_section
, gsym
, reloc
);
8394 check_non_pic(object
, r_type
);
8395 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8396 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8397 data_shndx
, reloc
.get_r_offset());
8403 case elfcpp::R_ARM_THM_CALL
:
8404 case elfcpp::R_ARM_PLT32
:
8405 case elfcpp::R_ARM_CALL
:
8406 case elfcpp::R_ARM_JUMP24
:
8407 case elfcpp::R_ARM_THM_JUMP24
:
8408 case elfcpp::R_ARM_SBREL31
:
8409 case elfcpp::R_ARM_PREL31
:
8410 case elfcpp::R_ARM_THM_JUMP19
:
8411 case elfcpp::R_ARM_THM_JUMP6
:
8412 case elfcpp::R_ARM_THM_JUMP11
:
8413 case elfcpp::R_ARM_THM_JUMP8
:
8414 // All the relocation above are branches except for the PREL31 ones.
8415 // A PREL31 relocation can point to a personality function in a shared
8416 // library. In that case we want to use a PLT because we want to
8417 // call the personality routine and the dynamic linkers we care about
8418 // do not support dynamic PREL31 relocations. An REL31 relocation may
8419 // point to a function whose unwinding behaviour is being described but
8420 // we will not mistakenly generate a PLT for that because we should use
8421 // a local section symbol.
8423 // If the symbol is fully resolved, this is just a relative
8424 // local reloc. Otherwise we need a PLT entry.
8425 if (gsym
->final_value_is_known())
8427 // If building a shared library, we can also skip the PLT entry
8428 // if the symbol is defined in the output file and is protected
8430 if (gsym
->is_defined()
8431 && !gsym
->is_from_dynobj()
8432 && !gsym
->is_preemptible())
8434 target
->make_plt_entry(symtab
, layout
, gsym
);
8437 case elfcpp::R_ARM_GOT_BREL
:
8438 case elfcpp::R_ARM_GOT_ABS
:
8439 case elfcpp::R_ARM_GOT_PREL
:
8441 // The symbol requires a GOT entry.
8442 Arm_output_data_got
<big_endian
>* got
=
8443 target
->got_section(symtab
, layout
);
8444 if (gsym
->final_value_is_known())
8445 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
8448 // If this symbol is not fully resolved, we need to add a
8449 // GOT entry with a dynamic relocation.
8450 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8451 if (gsym
->is_from_dynobj()
8452 || gsym
->is_undefined()
8453 || gsym
->is_preemptible()
8454 || (gsym
->visibility() == elfcpp::STV_PROTECTED
8455 && parameters
->options().shared()))
8456 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
8457 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
8460 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
8461 rel_dyn
->add_global_relative(
8462 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
8463 gsym
->got_offset(GOT_TYPE_STANDARD
));
8469 case elfcpp::R_ARM_TARGET1
:
8470 case elfcpp::R_ARM_TARGET2
:
8471 // These should have been mapped to other types already.
8473 case elfcpp::R_ARM_COPY
:
8474 case elfcpp::R_ARM_GLOB_DAT
:
8475 case elfcpp::R_ARM_JUMP_SLOT
:
8476 case elfcpp::R_ARM_RELATIVE
:
8477 // These are relocations which should only be seen by the
8478 // dynamic linker, and should never be seen here.
8479 gold_error(_("%s: unexpected reloc %u in object file"),
8480 object
->name().c_str(), r_type
);
8483 // These are initial tls relocs, which are expected when
8485 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8486 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8487 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8488 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8489 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8491 const bool is_final
= gsym
->final_value_is_known();
8492 const tls::Tls_optimization optimized_type
8493 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8496 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8497 if (optimized_type
== tls::TLSOPT_NONE
)
8499 // Create a pair of GOT entries for the module index and
8500 // dtv-relative offset.
8501 Arm_output_data_got
<big_endian
>* got
8502 = target
->got_section(symtab
, layout
);
8503 if (!parameters
->doing_static_link())
8504 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
8505 target
->rel_dyn_section(layout
),
8506 elfcpp::R_ARM_TLS_DTPMOD32
,
8507 elfcpp::R_ARM_TLS_DTPOFF32
);
8509 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
8512 // FIXME: TLS optimization not supported yet.
8516 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8517 if (optimized_type
== tls::TLSOPT_NONE
)
8519 // Create a GOT entry for the module index.
8520 target
->got_mod_index_entry(symtab
, layout
, object
);
8523 // FIXME: TLS optimization not supported yet.
8527 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8530 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8531 layout
->set_has_static_tls();
8532 if (optimized_type
== tls::TLSOPT_NONE
)
8534 // Create a GOT entry for the tp-relative offset.
8535 Arm_output_data_got
<big_endian
>* got
8536 = target
->got_section(symtab
, layout
);
8537 if (!parameters
->doing_static_link())
8538 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
8539 target
->rel_dyn_section(layout
),
8540 elfcpp::R_ARM_TLS_TPOFF32
);
8541 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
8543 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
8544 unsigned int got_offset
=
8545 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
8546 got
->add_static_reloc(got_offset
,
8547 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
8551 // FIXME: TLS optimization not supported yet.
8555 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8556 layout
->set_has_static_tls();
8557 if (parameters
->options().shared())
8559 // We need to create a dynamic relocation.
8560 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8561 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8562 output_section
, object
,
8563 data_shndx
, reloc
.get_r_offset());
8573 case elfcpp::R_ARM_PC24
:
8574 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8575 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8576 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8578 unsupported_reloc_global(object
, r_type
, gsym
);
8583 // Process relocations for gc.
8585 template<bool big_endian
>
8587 Target_arm
<big_endian
>::gc_process_relocs(
8588 Symbol_table
* symtab
,
8590 Sized_relobj_file
<32, big_endian
>* object
,
8591 unsigned int data_shndx
,
8593 const unsigned char* prelocs
,
8595 Output_section
* output_section
,
8596 bool needs_special_offset_handling
,
8597 size_t local_symbol_count
,
8598 const unsigned char* plocal_symbols
)
8600 typedef Target_arm
<big_endian
> Arm
;
8601 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8603 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
8604 typename
Target_arm::Relocatable_size_for_reloc
>(
8613 needs_special_offset_handling
,
8618 // Scan relocations for a section.
8620 template<bool big_endian
>
8622 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8624 Sized_relobj_file
<32, big_endian
>* object
,
8625 unsigned int data_shndx
,
8626 unsigned int sh_type
,
8627 const unsigned char* prelocs
,
8629 Output_section
* output_section
,
8630 bool needs_special_offset_handling
,
8631 size_t local_symbol_count
,
8632 const unsigned char* plocal_symbols
)
8634 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8635 if (sh_type
== elfcpp::SHT_RELA
)
8637 gold_error(_("%s: unsupported RELA reloc section"),
8638 object
->name().c_str());
8642 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8651 needs_special_offset_handling
,
8656 // Finalize the sections.
8658 template<bool big_endian
>
8660 Target_arm
<big_endian
>::do_finalize_sections(
8662 const Input_objects
* input_objects
,
8665 bool merged_any_attributes
= false;
8666 // Merge processor-specific flags.
8667 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8668 p
!= input_objects
->relobj_end();
8671 Arm_relobj
<big_endian
>* arm_relobj
=
8672 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8673 if (arm_relobj
->merge_flags_and_attributes())
8675 this->merge_processor_specific_flags(
8677 arm_relobj
->processor_specific_flags());
8678 this->merge_object_attributes(arm_relobj
->name().c_str(),
8679 arm_relobj
->attributes_section_data());
8680 merged_any_attributes
= true;
8684 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8685 p
!= input_objects
->dynobj_end();
8688 Arm_dynobj
<big_endian
>* arm_dynobj
=
8689 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8690 this->merge_processor_specific_flags(
8692 arm_dynobj
->processor_specific_flags());
8693 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8694 arm_dynobj
->attributes_section_data());
8695 merged_any_attributes
= true;
8698 // Create an empty uninitialized attribute section if we still don't have it
8699 // at this moment. This happens if there is no attributes sections in all
8701 if (this->attributes_section_data_
== NULL
)
8702 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8704 const Object_attribute
* cpu_arch_attr
=
8705 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8706 // Check if we need to use Cortex-A8 workaround.
8707 if (parameters
->options().user_set_fix_cortex_a8())
8708 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8711 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8712 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8714 const Object_attribute
* cpu_arch_profile_attr
=
8715 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8716 this->fix_cortex_a8_
=
8717 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8718 && (cpu_arch_profile_attr
->int_value() == 'A'
8719 || cpu_arch_profile_attr
->int_value() == 0));
8722 // Check if we can use V4BX interworking.
8723 // The V4BX interworking stub contains BX instruction,
8724 // which is not specified for some profiles.
8725 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8726 && !this->may_use_v4t_interworking())
8727 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8728 "the target profile does not support BX instruction"));
8730 // Fill in some more dynamic tags.
8731 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8733 : this->plt_
->rel_plt());
8734 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8735 this->rel_dyn_
, true, false);
8737 // Emit any relocs we saved in an attempt to avoid generating COPY
8739 if (this->copy_relocs_
.any_saved_relocs())
8740 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8742 // Handle the .ARM.exidx section.
8743 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8745 if (!parameters
->options().relocatable())
8747 if (exidx_section
!= NULL
8748 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
8750 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8751 // the .ARM.exidx section.
8752 if (!layout
->script_options()->saw_phdrs_clause())
8754 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
8757 Output_segment
* exidx_segment
=
8758 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8759 exidx_segment
->add_output_section_to_nonload(exidx_section
,
8765 // Create an .ARM.attributes section if we have merged any attributes
8767 if (merged_any_attributes
)
8769 Output_attributes_section_data
* attributes_section
=
8770 new Output_attributes_section_data(*this->attributes_section_data_
);
8771 layout
->add_output_section_data(".ARM.attributes",
8772 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8773 attributes_section
, ORDER_INVALID
,
8777 // Fix up links in section EXIDX headers.
8778 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
8779 p
!= layout
->section_list().end();
8781 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
8783 Arm_output_section
<big_endian
>* os
=
8784 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
8785 os
->set_exidx_section_link();
8789 // Return whether a direct absolute static relocation needs to be applied.
8790 // In cases where Scan::local() or Scan::global() has created
8791 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8792 // of the relocation is carried in the data, and we must not
8793 // apply the static relocation.
8795 template<bool big_endian
>
8797 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8798 const Sized_symbol
<32>* gsym
,
8799 unsigned int r_type
,
8801 Output_section
* output_section
)
8803 // If the output section is not allocated, then we didn't call
8804 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8806 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8809 int ref_flags
= Scan::get_reference_flags(r_type
);
8811 // For local symbols, we will have created a non-RELATIVE dynamic
8812 // relocation only if (a) the output is position independent,
8813 // (b) the relocation is absolute (not pc- or segment-relative), and
8814 // (c) the relocation is not 32 bits wide.
8816 return !(parameters
->options().output_is_position_independent()
8817 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8820 // For global symbols, we use the same helper routines used in the
8821 // scan pass. If we did not create a dynamic relocation, or if we
8822 // created a RELATIVE dynamic relocation, we should apply the static
8824 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8825 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8826 && gsym
->can_use_relative_reloc(ref_flags
8827 & Symbol::FUNCTION_CALL
);
8828 return !has_dyn
|| is_rel
;
8831 // Perform a relocation.
8833 template<bool big_endian
>
8835 Target_arm
<big_endian
>::Relocate::relocate(
8836 const Relocate_info
<32, big_endian
>* relinfo
,
8838 Output_section
* output_section
,
8840 const elfcpp::Rel
<32, big_endian
>& rel
,
8841 unsigned int r_type
,
8842 const Sized_symbol
<32>* gsym
,
8843 const Symbol_value
<32>* psymval
,
8844 unsigned char* view
,
8845 Arm_address address
,
8846 section_size_type view_size
)
8851 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8853 r_type
= get_real_reloc_type(r_type
);
8854 const Arm_reloc_property
* reloc_property
=
8855 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8856 if (reloc_property
== NULL
)
8858 std::string reloc_name
=
8859 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8860 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8861 _("cannot relocate %s in object file"),
8862 reloc_name
.c_str());
8866 const Arm_relobj
<big_endian
>* object
=
8867 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8869 // If the final branch target of a relocation is THUMB instruction, this
8870 // is 1. Otherwise it is 0.
8871 Arm_address thumb_bit
= 0;
8872 Symbol_value
<32> symval
;
8873 bool is_weakly_undefined_without_plt
= false;
8874 bool have_got_offset
= false;
8875 unsigned int got_offset
= 0;
8877 // If the relocation uses the GOT entry of a symbol instead of the symbol
8878 // itself, we don't care about whether the symbol is defined or what kind
8880 if (reloc_property
->uses_got_entry())
8882 // Get the GOT offset.
8883 // The GOT pointer points to the end of the GOT section.
8884 // We need to subtract the size of the GOT section to get
8885 // the actual offset to use in the relocation.
8886 // TODO: We should move GOT offset computing code in TLS relocations
8890 case elfcpp::R_ARM_GOT_BREL
:
8891 case elfcpp::R_ARM_GOT_PREL
:
8894 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8895 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8896 - target
->got_size());
8900 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8901 gold_assert(object
->local_has_got_offset(r_sym
,
8902 GOT_TYPE_STANDARD
));
8903 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8904 - target
->got_size());
8906 have_got_offset
= true;
8913 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8917 // This is a global symbol. Determine if we use PLT and if the
8918 // final target is THUMB.
8919 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
8921 // This uses a PLT, change the symbol value.
8922 symval
.set_output_value(target
->plt_section()->address()
8923 + gsym
->plt_offset());
8926 else if (gsym
->is_weak_undefined())
8928 // This is a weakly undefined symbol and we do not use PLT
8929 // for this relocation. A branch targeting this symbol will
8930 // be converted into an NOP.
8931 is_weakly_undefined_without_plt
= true;
8933 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
8935 // This relocation uses the symbol value but the symbol is
8936 // undefined. Exit early and have the caller reporting an
8942 // Set thumb bit if symbol:
8943 // -Has type STT_ARM_TFUNC or
8944 // -Has type STT_FUNC, is defined and with LSB in value set.
8946 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8947 || (gsym
->type() == elfcpp::STT_FUNC
8948 && !gsym
->is_undefined()
8949 && ((psymval
->value(object
, 0) & 1) != 0)))
8956 // This is a local symbol. Determine if the final target is THUMB.
8957 // We saved this information when all the local symbols were read.
8958 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8959 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8960 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8965 // This is a fake relocation synthesized for a stub. It does not have
8966 // a real symbol. We just look at the LSB of the symbol value to
8967 // determine if the target is THUMB or not.
8968 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8971 // Strip LSB if this points to a THUMB target.
8973 && reloc_property
->uses_thumb_bit()
8974 && ((psymval
->value(object
, 0) & 1) != 0))
8976 Arm_address stripped_value
=
8977 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8978 symval
.set_output_value(stripped_value
);
8982 // To look up relocation stubs, we need to pass the symbol table index of
8984 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8986 // Get the addressing origin of the output segment defining the
8987 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8988 Arm_address sym_origin
= 0;
8989 if (reloc_property
->uses_symbol_base())
8991 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8992 // R_ARM_BASE_ABS with the NULL symbol will give the
8993 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8994 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8995 sym_origin
= target
->got_plt_section()->address();
8996 else if (gsym
== NULL
)
8998 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8999 sym_origin
= gsym
->output_segment()->vaddr();
9000 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
9001 sym_origin
= gsym
->output_data()->address();
9003 // TODO: Assumes the segment base to be zero for the global symbols
9004 // till the proper support for the segment-base-relative addressing
9005 // will be implemented. This is consistent with GNU ld.
9008 // For relative addressing relocation, find out the relative address base.
9009 Arm_address relative_address_base
= 0;
9010 switch(reloc_property
->relative_address_base())
9012 case Arm_reloc_property::RAB_NONE
:
9013 // Relocations with relative address bases RAB_TLS and RAB_tp are
9014 // handled by relocate_tls. So we do not need to do anything here.
9015 case Arm_reloc_property::RAB_TLS
:
9016 case Arm_reloc_property::RAB_tp
:
9018 case Arm_reloc_property::RAB_B_S
:
9019 relative_address_base
= sym_origin
;
9021 case Arm_reloc_property::RAB_GOT_ORG
:
9022 relative_address_base
= target
->got_plt_section()->address();
9024 case Arm_reloc_property::RAB_P
:
9025 relative_address_base
= address
;
9027 case Arm_reloc_property::RAB_Pa
:
9028 relative_address_base
= address
& 0xfffffffcU
;
9034 typename
Arm_relocate_functions::Status reloc_status
=
9035 Arm_relocate_functions::STATUS_OKAY
;
9036 bool check_overflow
= reloc_property
->checks_overflow();
9039 case elfcpp::R_ARM_NONE
:
9042 case elfcpp::R_ARM_ABS8
:
9043 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9044 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9047 case elfcpp::R_ARM_ABS12
:
9048 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9049 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9052 case elfcpp::R_ARM_ABS16
:
9053 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9054 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9057 case elfcpp::R_ARM_ABS32
:
9058 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9059 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9063 case elfcpp::R_ARM_ABS32_NOI
:
9064 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9065 // No thumb bit for this relocation: (S + A)
9066 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9070 case elfcpp::R_ARM_MOVW_ABS_NC
:
9071 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9072 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9077 case elfcpp::R_ARM_MOVT_ABS
:
9078 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9079 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9082 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9083 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9084 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9085 0, thumb_bit
, false);
9088 case elfcpp::R_ARM_THM_MOVT_ABS
:
9089 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9090 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9094 case elfcpp::R_ARM_MOVW_PREL_NC
:
9095 case elfcpp::R_ARM_MOVW_BREL_NC
:
9096 case elfcpp::R_ARM_MOVW_BREL
:
9098 Arm_relocate_functions::movw(view
, object
, psymval
,
9099 relative_address_base
, thumb_bit
,
9103 case elfcpp::R_ARM_MOVT_PREL
:
9104 case elfcpp::R_ARM_MOVT_BREL
:
9106 Arm_relocate_functions::movt(view
, object
, psymval
,
9107 relative_address_base
);
9110 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9111 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9112 case elfcpp::R_ARM_THM_MOVW_BREL
:
9114 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9115 relative_address_base
,
9116 thumb_bit
, check_overflow
);
9119 case elfcpp::R_ARM_THM_MOVT_PREL
:
9120 case elfcpp::R_ARM_THM_MOVT_BREL
:
9122 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9123 relative_address_base
);
9126 case elfcpp::R_ARM_REL32
:
9127 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9128 address
, thumb_bit
);
9131 case elfcpp::R_ARM_THM_ABS5
:
9132 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9133 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9136 // Thumb long branches.
9137 case elfcpp::R_ARM_THM_CALL
:
9138 case elfcpp::R_ARM_THM_XPC22
:
9139 case elfcpp::R_ARM_THM_JUMP24
:
9141 Arm_relocate_functions::thumb_branch_common(
9142 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9143 thumb_bit
, is_weakly_undefined_without_plt
);
9146 case elfcpp::R_ARM_GOTOFF32
:
9148 Arm_address got_origin
;
9149 got_origin
= target
->got_plt_section()->address();
9150 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9151 got_origin
, thumb_bit
);
9155 case elfcpp::R_ARM_BASE_PREL
:
9156 gold_assert(gsym
!= NULL
);
9158 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9161 case elfcpp::R_ARM_BASE_ABS
:
9162 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9163 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9166 case elfcpp::R_ARM_GOT_BREL
:
9167 gold_assert(have_got_offset
);
9168 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9171 case elfcpp::R_ARM_GOT_PREL
:
9172 gold_assert(have_got_offset
);
9173 // Get the address origin for GOT PLT, which is allocated right
9174 // after the GOT section, to calculate an absolute address of
9175 // the symbol GOT entry (got_origin + got_offset).
9176 Arm_address got_origin
;
9177 got_origin
= target
->got_plt_section()->address();
9178 reloc_status
= Arm_relocate_functions::got_prel(view
,
9179 got_origin
+ got_offset
,
9183 case elfcpp::R_ARM_PLT32
:
9184 case elfcpp::R_ARM_CALL
:
9185 case elfcpp::R_ARM_JUMP24
:
9186 case elfcpp::R_ARM_XPC25
:
9187 gold_assert(gsym
== NULL
9188 || gsym
->has_plt_offset()
9189 || gsym
->final_value_is_known()
9190 || (gsym
->is_defined()
9191 && !gsym
->is_from_dynobj()
9192 && !gsym
->is_preemptible()));
9194 Arm_relocate_functions::arm_branch_common(
9195 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9196 thumb_bit
, is_weakly_undefined_without_plt
);
9199 case elfcpp::R_ARM_THM_JUMP19
:
9201 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9205 case elfcpp::R_ARM_THM_JUMP6
:
9207 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9210 case elfcpp::R_ARM_THM_JUMP8
:
9212 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9215 case elfcpp::R_ARM_THM_JUMP11
:
9217 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9220 case elfcpp::R_ARM_PREL31
:
9221 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9222 address
, thumb_bit
);
9225 case elfcpp::R_ARM_V4BX
:
9226 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9228 const bool is_v4bx_interworking
=
9229 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9231 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9232 is_v4bx_interworking
);
9236 case elfcpp::R_ARM_THM_PC8
:
9238 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9241 case elfcpp::R_ARM_THM_PC12
:
9243 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9246 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9248 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9252 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9253 case elfcpp::R_ARM_ALU_PC_G0
:
9254 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9255 case elfcpp::R_ARM_ALU_PC_G1
:
9256 case elfcpp::R_ARM_ALU_PC_G2
:
9257 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9258 case elfcpp::R_ARM_ALU_SB_G0
:
9259 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9260 case elfcpp::R_ARM_ALU_SB_G1
:
9261 case elfcpp::R_ARM_ALU_SB_G2
:
9263 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9264 reloc_property
->group_index(),
9265 relative_address_base
,
9266 thumb_bit
, check_overflow
);
9269 case elfcpp::R_ARM_LDR_PC_G0
:
9270 case elfcpp::R_ARM_LDR_PC_G1
:
9271 case elfcpp::R_ARM_LDR_PC_G2
:
9272 case elfcpp::R_ARM_LDR_SB_G0
:
9273 case elfcpp::R_ARM_LDR_SB_G1
:
9274 case elfcpp::R_ARM_LDR_SB_G2
:
9276 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9277 reloc_property
->group_index(),
9278 relative_address_base
);
9281 case elfcpp::R_ARM_LDRS_PC_G0
:
9282 case elfcpp::R_ARM_LDRS_PC_G1
:
9283 case elfcpp::R_ARM_LDRS_PC_G2
:
9284 case elfcpp::R_ARM_LDRS_SB_G0
:
9285 case elfcpp::R_ARM_LDRS_SB_G1
:
9286 case elfcpp::R_ARM_LDRS_SB_G2
:
9288 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9289 reloc_property
->group_index(),
9290 relative_address_base
);
9293 case elfcpp::R_ARM_LDC_PC_G0
:
9294 case elfcpp::R_ARM_LDC_PC_G1
:
9295 case elfcpp::R_ARM_LDC_PC_G2
:
9296 case elfcpp::R_ARM_LDC_SB_G0
:
9297 case elfcpp::R_ARM_LDC_SB_G1
:
9298 case elfcpp::R_ARM_LDC_SB_G2
:
9300 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9301 reloc_property
->group_index(),
9302 relative_address_base
);
9305 // These are initial tls relocs, which are expected when
9307 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9308 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9309 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9310 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9311 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9313 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9314 view
, address
, view_size
);
9317 // The known and unknown unsupported and/or deprecated relocations.
9318 case elfcpp::R_ARM_PC24
:
9319 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9320 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9321 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9323 // Just silently leave the method. We should get an appropriate error
9324 // message in the scan methods.
9328 // Report any errors.
9329 switch (reloc_status
)
9331 case Arm_relocate_functions::STATUS_OKAY
:
9333 case Arm_relocate_functions::STATUS_OVERFLOW
:
9334 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9335 _("relocation overflow in %s"),
9336 reloc_property
->name().c_str());
9338 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9339 gold_error_at_location(
9343 _("unexpected opcode while processing relocation %s"),
9344 reloc_property
->name().c_str());
9353 // Perform a TLS relocation.
9355 template<bool big_endian
>
9356 inline typename Arm_relocate_functions
<big_endian
>::Status
9357 Target_arm
<big_endian
>::Relocate::relocate_tls(
9358 const Relocate_info
<32, big_endian
>* relinfo
,
9359 Target_arm
<big_endian
>* target
,
9361 const elfcpp::Rel
<32, big_endian
>& rel
,
9362 unsigned int r_type
,
9363 const Sized_symbol
<32>* gsym
,
9364 const Symbol_value
<32>* psymval
,
9365 unsigned char* view
,
9366 elfcpp::Elf_types
<32>::Elf_Addr address
,
9367 section_size_type
/*view_size*/ )
9369 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9370 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9371 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9373 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9375 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9377 const bool is_final
= (gsym
== NULL
9378 ? !parameters
->options().shared()
9379 : gsym
->final_value_is_known());
9380 const tls::Tls_optimization optimized_type
9381 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9384 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9386 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9387 unsigned int got_offset
;
9390 gold_assert(gsym
->has_got_offset(got_type
));
9391 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9395 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9396 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9397 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9398 - target
->got_size());
9400 if (optimized_type
== tls::TLSOPT_NONE
)
9402 Arm_address got_entry
=
9403 target
->got_plt_section()->address() + got_offset
;
9405 // Relocate the field with the PC relative offset of the pair of
9407 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9408 return ArmRelocFuncs::STATUS_OKAY
;
9413 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9414 if (optimized_type
== tls::TLSOPT_NONE
)
9416 // Relocate the field with the offset of the GOT entry for
9417 // the module index.
9418 unsigned int got_offset
;
9419 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9420 - target
->got_size());
9421 Arm_address got_entry
=
9422 target
->got_plt_section()->address() + got_offset
;
9424 // Relocate the field with the PC relative offset of the pair of
9426 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9427 return ArmRelocFuncs::STATUS_OKAY
;
9431 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9432 RelocFuncs::rel32_unaligned(view
, value
);
9433 return ArmRelocFuncs::STATUS_OKAY
;
9435 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9436 if (optimized_type
== tls::TLSOPT_NONE
)
9438 // Relocate the field with the offset of the GOT entry for
9439 // the tp-relative offset of the symbol.
9440 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
9441 unsigned int got_offset
;
9444 gold_assert(gsym
->has_got_offset(got_type
));
9445 got_offset
= gsym
->got_offset(got_type
);
9449 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9450 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9451 got_offset
= object
->local_got_offset(r_sym
, got_type
);
9454 // All GOT offsets are relative to the end of the GOT.
9455 got_offset
-= target
->got_size();
9457 Arm_address got_entry
=
9458 target
->got_plt_section()->address() + got_offset
;
9460 // Relocate the field with the PC relative offset of the GOT entry.
9461 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9462 return ArmRelocFuncs::STATUS_OKAY
;
9466 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9467 // If we're creating a shared library, a dynamic relocation will
9468 // have been created for this location, so do not apply it now.
9469 if (!parameters
->options().shared())
9471 gold_assert(tls_segment
!= NULL
);
9473 // $tp points to the TCB, which is followed by the TLS, so we
9474 // need to add TCB size to the offset.
9475 Arm_address aligned_tcb_size
=
9476 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
9477 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
9480 return ArmRelocFuncs::STATUS_OKAY
;
9486 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9487 _("unsupported reloc %u"),
9489 return ArmRelocFuncs::STATUS_BAD_RELOC
;
9492 // Relocate section data.
9494 template<bool big_endian
>
9496 Target_arm
<big_endian
>::relocate_section(
9497 const Relocate_info
<32, big_endian
>* relinfo
,
9498 unsigned int sh_type
,
9499 const unsigned char* prelocs
,
9501 Output_section
* output_section
,
9502 bool needs_special_offset_handling
,
9503 unsigned char* view
,
9504 Arm_address address
,
9505 section_size_type view_size
,
9506 const Reloc_symbol_changes
* reloc_symbol_changes
)
9508 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
9509 gold_assert(sh_type
== elfcpp::SHT_REL
);
9511 // See if we are relocating a relaxed input section. If so, the view
9512 // covers the whole output section and we need to adjust accordingly.
9513 if (needs_special_offset_handling
)
9515 const Output_relaxed_input_section
* poris
=
9516 output_section
->find_relaxed_input_section(relinfo
->object
,
9517 relinfo
->data_shndx
);
9520 Arm_address section_address
= poris
->address();
9521 section_size_type section_size
= poris
->data_size();
9523 gold_assert((section_address
>= address
)
9524 && ((section_address
+ section_size
)
9525 <= (address
+ view_size
)));
9527 off_t offset
= section_address
- address
;
9530 view_size
= section_size
;
9534 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
9535 Arm_relocate
, gold::Default_comdat_behavior
>(
9541 needs_special_offset_handling
,
9545 reloc_symbol_changes
);
9548 // Return the size of a relocation while scanning during a relocatable
9551 template<bool big_endian
>
9553 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
9554 unsigned int r_type
,
9557 r_type
= get_real_reloc_type(r_type
);
9558 const Arm_reloc_property
* arp
=
9559 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9564 std::string reloc_name
=
9565 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9566 gold_error(_("%s: unexpected %s in object file"),
9567 object
->name().c_str(), reloc_name
.c_str());
9572 // Scan the relocs during a relocatable link.
9574 template<bool big_endian
>
9576 Target_arm
<big_endian
>::scan_relocatable_relocs(
9577 Symbol_table
* symtab
,
9579 Sized_relobj_file
<32, big_endian
>* object
,
9580 unsigned int data_shndx
,
9581 unsigned int sh_type
,
9582 const unsigned char* prelocs
,
9584 Output_section
* output_section
,
9585 bool needs_special_offset_handling
,
9586 size_t local_symbol_count
,
9587 const unsigned char* plocal_symbols
,
9588 Relocatable_relocs
* rr
)
9590 gold_assert(sh_type
== elfcpp::SHT_REL
);
9592 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9593 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9595 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9596 Scan_relocatable_relocs
>(
9604 needs_special_offset_handling
,
9610 // Emit relocations for a section.
9612 template<bool big_endian
>
9614 Target_arm
<big_endian
>::relocate_relocs(
9615 const Relocate_info
<32, big_endian
>* relinfo
,
9616 unsigned int sh_type
,
9617 const unsigned char* prelocs
,
9619 Output_section
* output_section
,
9620 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
9621 const Relocatable_relocs
* rr
,
9622 unsigned char* view
,
9623 Arm_address view_address
,
9624 section_size_type view_size
,
9625 unsigned char* reloc_view
,
9626 section_size_type reloc_view_size
)
9628 gold_assert(sh_type
== elfcpp::SHT_REL
);
9630 gold::relocate_relocs
<32, big_endian
, elfcpp::SHT_REL
>(
9635 offset_in_output_section
,
9644 // Perform target-specific processing in a relocatable link. This is
9645 // only used if we use the relocation strategy RELOC_SPECIAL.
9647 template<bool big_endian
>
9649 Target_arm
<big_endian
>::relocate_special_relocatable(
9650 const Relocate_info
<32, big_endian
>* relinfo
,
9651 unsigned int sh_type
,
9652 const unsigned char* preloc_in
,
9654 Output_section
* output_section
,
9655 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
9656 unsigned char* view
,
9657 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9659 unsigned char* preloc_out
)
9661 // We can only handle REL type relocation sections.
9662 gold_assert(sh_type
== elfcpp::SHT_REL
);
9664 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9665 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9667 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9669 const Arm_relobj
<big_endian
>* object
=
9670 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9671 const unsigned int local_count
= object
->local_symbol_count();
9673 Reltype
reloc(preloc_in
);
9674 Reltype_write
reloc_write(preloc_out
);
9676 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9677 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9678 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9680 const Arm_reloc_property
* arp
=
9681 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9682 gold_assert(arp
!= NULL
);
9684 // Get the new symbol index.
9685 // We only use RELOC_SPECIAL strategy in local relocations.
9686 gold_assert(r_sym
< local_count
);
9688 // We are adjusting a section symbol. We need to find
9689 // the symbol table index of the section symbol for
9690 // the output section corresponding to input section
9691 // in which this symbol is defined.
9693 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9694 gold_assert(is_ordinary
);
9695 Output_section
* os
= object
->output_section(shndx
);
9696 gold_assert(os
!= NULL
);
9697 gold_assert(os
->needs_symtab_index());
9698 unsigned int new_symndx
= os
->symtab_index();
9700 // Get the new offset--the location in the output section where
9701 // this relocation should be applied.
9703 Arm_address offset
= reloc
.get_r_offset();
9704 Arm_address new_offset
;
9705 if (offset_in_output_section
!= invalid_address
)
9706 new_offset
= offset
+ offset_in_output_section
;
9709 section_offset_type sot_offset
=
9710 convert_types
<section_offset_type
, Arm_address
>(offset
);
9711 section_offset_type new_sot_offset
=
9712 output_section
->output_offset(object
, relinfo
->data_shndx
,
9714 gold_assert(new_sot_offset
!= -1);
9715 new_offset
= new_sot_offset
;
9718 // In an object file, r_offset is an offset within the section.
9719 // In an executable or dynamic object, generated by
9720 // --emit-relocs, r_offset is an absolute address.
9721 if (!parameters
->options().relocatable())
9723 new_offset
+= view_address
;
9724 if (offset_in_output_section
!= invalid_address
)
9725 new_offset
-= offset_in_output_section
;
9728 reloc_write
.put_r_offset(new_offset
);
9729 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9731 // Handle the reloc addend.
9732 // The relocation uses a section symbol in the input file.
9733 // We are adjusting it to use a section symbol in the output
9734 // file. The input section symbol refers to some address in
9735 // the input section. We need the relocation in the output
9736 // file to refer to that same address. This adjustment to
9737 // the addend is the same calculation we use for a simple
9738 // absolute relocation for the input section symbol.
9740 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9742 // Handle THUMB bit.
9743 Symbol_value
<32> symval
;
9744 Arm_address thumb_bit
=
9745 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9747 && arp
->uses_thumb_bit()
9748 && ((psymval
->value(object
, 0) & 1) != 0))
9750 Arm_address stripped_value
=
9751 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9752 symval
.set_output_value(stripped_value
);
9756 unsigned char* paddend
= view
+ offset
;
9757 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9758 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9761 case elfcpp::R_ARM_ABS8
:
9762 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9766 case elfcpp::R_ARM_ABS12
:
9767 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9771 case elfcpp::R_ARM_ABS16
:
9772 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9776 case elfcpp::R_ARM_THM_ABS5
:
9777 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9782 case elfcpp::R_ARM_MOVW_ABS_NC
:
9783 case elfcpp::R_ARM_MOVW_PREL_NC
:
9784 case elfcpp::R_ARM_MOVW_BREL_NC
:
9785 case elfcpp::R_ARM_MOVW_BREL
:
9786 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9787 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9790 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9791 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9792 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9793 case elfcpp::R_ARM_THM_MOVW_BREL
:
9794 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9795 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9798 case elfcpp::R_ARM_THM_CALL
:
9799 case elfcpp::R_ARM_THM_XPC22
:
9800 case elfcpp::R_ARM_THM_JUMP24
:
9802 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9803 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9807 case elfcpp::R_ARM_PLT32
:
9808 case elfcpp::R_ARM_CALL
:
9809 case elfcpp::R_ARM_JUMP24
:
9810 case elfcpp::R_ARM_XPC25
:
9812 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9813 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9817 case elfcpp::R_ARM_THM_JUMP19
:
9819 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9820 psymval
, 0, thumb_bit
);
9823 case elfcpp::R_ARM_THM_JUMP6
:
9825 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9829 case elfcpp::R_ARM_THM_JUMP8
:
9831 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9835 case elfcpp::R_ARM_THM_JUMP11
:
9837 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9841 case elfcpp::R_ARM_PREL31
:
9843 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9847 case elfcpp::R_ARM_THM_PC8
:
9849 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9853 case elfcpp::R_ARM_THM_PC12
:
9855 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9859 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9861 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9865 // These relocation truncate relocation results so we cannot handle them
9866 // in a relocatable link.
9867 case elfcpp::R_ARM_MOVT_ABS
:
9868 case elfcpp::R_ARM_THM_MOVT_ABS
:
9869 case elfcpp::R_ARM_MOVT_PREL
:
9870 case elfcpp::R_ARM_MOVT_BREL
:
9871 case elfcpp::R_ARM_THM_MOVT_PREL
:
9872 case elfcpp::R_ARM_THM_MOVT_BREL
:
9873 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9874 case elfcpp::R_ARM_ALU_PC_G0
:
9875 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9876 case elfcpp::R_ARM_ALU_PC_G1
:
9877 case elfcpp::R_ARM_ALU_PC_G2
:
9878 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9879 case elfcpp::R_ARM_ALU_SB_G0
:
9880 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9881 case elfcpp::R_ARM_ALU_SB_G1
:
9882 case elfcpp::R_ARM_ALU_SB_G2
:
9883 case elfcpp::R_ARM_LDR_PC_G0
:
9884 case elfcpp::R_ARM_LDR_PC_G1
:
9885 case elfcpp::R_ARM_LDR_PC_G2
:
9886 case elfcpp::R_ARM_LDR_SB_G0
:
9887 case elfcpp::R_ARM_LDR_SB_G1
:
9888 case elfcpp::R_ARM_LDR_SB_G2
:
9889 case elfcpp::R_ARM_LDRS_PC_G0
:
9890 case elfcpp::R_ARM_LDRS_PC_G1
:
9891 case elfcpp::R_ARM_LDRS_PC_G2
:
9892 case elfcpp::R_ARM_LDRS_SB_G0
:
9893 case elfcpp::R_ARM_LDRS_SB_G1
:
9894 case elfcpp::R_ARM_LDRS_SB_G2
:
9895 case elfcpp::R_ARM_LDC_PC_G0
:
9896 case elfcpp::R_ARM_LDC_PC_G1
:
9897 case elfcpp::R_ARM_LDC_PC_G2
:
9898 case elfcpp::R_ARM_LDC_SB_G0
:
9899 case elfcpp::R_ARM_LDC_SB_G1
:
9900 case elfcpp::R_ARM_LDC_SB_G2
:
9901 gold_error(_("cannot handle %s in a relocatable link"),
9902 arp
->name().c_str());
9909 // Report any errors.
9910 switch (reloc_status
)
9912 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9914 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9915 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9916 _("relocation overflow in %s"),
9917 arp
->name().c_str());
9919 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9920 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9921 _("unexpected opcode while processing relocation %s"),
9922 arp
->name().c_str());
9929 // Return the value to use for a dynamic symbol which requires special
9930 // treatment. This is how we support equality comparisons of function
9931 // pointers across shared library boundaries, as described in the
9932 // processor specific ABI supplement.
9934 template<bool big_endian
>
9936 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9938 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9939 return this->plt_section()->address() + gsym
->plt_offset();
9942 // Map platform-specific relocs to real relocs
9944 template<bool big_endian
>
9946 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
9950 case elfcpp::R_ARM_TARGET1
:
9951 // This is either R_ARM_ABS32 or R_ARM_REL32;
9952 return elfcpp::R_ARM_ABS32
;
9954 case elfcpp::R_ARM_TARGET2
:
9955 // This can be any reloc type but usually is R_ARM_GOT_PREL
9956 return elfcpp::R_ARM_GOT_PREL
;
9963 // Whether if two EABI versions V1 and V2 are compatible.
9965 template<bool big_endian
>
9967 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9968 elfcpp::Elf_Word v1
,
9969 elfcpp::Elf_Word v2
)
9971 // v4 and v5 are the same spec before and after it was released,
9972 // so allow mixing them.
9973 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
9974 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9975 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9981 // Combine FLAGS from an input object called NAME and the processor-specific
9982 // flags in the ELF header of the output. Much of this is adapted from the
9983 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9984 // in bfd/elf32-arm.c.
9986 template<bool big_endian
>
9988 Target_arm
<big_endian
>::merge_processor_specific_flags(
9989 const std::string
& name
,
9990 elfcpp::Elf_Word flags
)
9992 if (this->are_processor_specific_flags_set())
9994 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9996 // Nothing to merge if flags equal to those in output.
9997 if (flags
== out_flags
)
10000 // Complain about various flag mismatches.
10001 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
10002 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
10003 if (!this->are_eabi_versions_compatible(version1
, version2
)
10004 && parameters
->options().warn_mismatch())
10005 gold_error(_("Source object %s has EABI version %d but output has "
10006 "EABI version %d."),
10008 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
10009 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
10013 // If the input is the default architecture and had the default
10014 // flags then do not bother setting the flags for the output
10015 // architecture, instead allow future merges to do this. If no
10016 // future merges ever set these flags then they will retain their
10017 // uninitialised values, which surprise surprise, correspond
10018 // to the default values.
10022 // This is the first time, just copy the flags.
10023 // We only copy the EABI version for now.
10024 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10028 // Adjust ELF file header.
10029 template<bool big_endian
>
10031 Target_arm
<big_endian
>::do_adjust_elf_header(
10032 unsigned char* view
,
10035 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10037 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10038 elfcpp::Elf_Word flags
= this->processor_specific_flags();
10039 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10040 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10042 if (elfcpp::arm_eabi_version(flags
)
10043 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10044 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10046 e_ident
[elfcpp::EI_OSABI
] = 0;
10047 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10049 // FIXME: Do EF_ARM_BE8 adjustment.
10051 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10053 if (elfcpp::arm_eabi_version(flags
) == elfcpp::EF_ARM_EABI_VER5
)
10055 elfcpp::Elf_Half type
= ehdr
.get_e_type();
10056 if (type
== elfcpp::ET_EXEC
|| type
== elfcpp::ET_DYN
)
10058 Object_attribute
* attr
= this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args
);
10059 if (attr
->int_value())
10060 flags
|= elfcpp::EF_ARM_ABI_FLOAT_HARD
;
10062 flags
|= elfcpp::EF_ARM_ABI_FLOAT_SOFT
;
10063 this->set_processor_specific_flags(flags
);
10066 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10067 oehdr
.put_e_ident(e_ident
);
10070 // do_make_elf_object to override the same function in the base class.
10071 // We need to use a target-specific sub-class of
10072 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10073 // Hence we need to have our own ELF object creation.
10075 template<bool big_endian
>
10077 Target_arm
<big_endian
>::do_make_elf_object(
10078 const std::string
& name
,
10079 Input_file
* input_file
,
10080 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10082 int et
= ehdr
.get_e_type();
10083 // ET_EXEC files are valid input for --just-symbols/-R,
10084 // and we treat them as relocatable objects.
10085 if (et
== elfcpp::ET_REL
10086 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10088 Arm_relobj
<big_endian
>* obj
=
10089 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10093 else if (et
== elfcpp::ET_DYN
)
10095 Sized_dynobj
<32, big_endian
>* obj
=
10096 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10102 gold_error(_("%s: unsupported ELF file type %d"),
10108 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10109 // Returns -1 if no architecture could be read.
10110 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10112 template<bool big_endian
>
10114 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10115 const Attributes_section_data
* pasd
)
10117 const Object_attribute
* known_attributes
=
10118 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10120 // Note: the tag and its argument below are uleb128 values, though
10121 // currently-defined values fit in one byte for each.
10122 const std::string
& sv
=
10123 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10125 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10126 && (sv
.data()[1] & 128) != 128)
10127 return sv
.data()[1];
10129 // This tag is "safely ignorable", so don't complain if it looks funny.
10133 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10134 // The tag is removed if ARCH is -1.
10135 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10137 template<bool big_endian
>
10139 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10140 Attributes_section_data
* pasd
,
10143 Object_attribute
* known_attributes
=
10144 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10148 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10152 // Note: the tag and its argument below are uleb128 values, though
10153 // currently-defined values fit in one byte for each.
10155 sv
[0] = elfcpp::Tag_CPU_arch
;
10156 gold_assert(arch
!= 0);
10160 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10163 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10165 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10167 template<bool big_endian
>
10169 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10172 int* secondary_compat_out
,
10174 int secondary_compat
)
10176 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10177 static const int v6t2
[] =
10179 T(V6T2
), // PRE_V4.
10189 static const int v6k
[] =
10202 static const int v7
[] =
10216 static const int v6_m
[] =
10231 static const int v6s_m
[] =
10247 static const int v7e_m
[] =
10254 T(V7E_M
), // V5TEJ.
10261 T(V7E_M
), // V6S_M.
10264 static const int v4t_plus_v6_m
[] =
10271 T(V5TEJ
), // V5TEJ.
10278 T(V6S_M
), // V6S_M.
10279 T(V7E_M
), // V7E_M.
10280 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10282 static const int* comb
[] =
10290 // Pseudo-architecture.
10294 // Check we've not got a higher architecture than we know about.
10296 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10298 gold_error(_("%s: unknown CPU architecture"), name
);
10302 // Override old tag if we have a Tag_also_compatible_with on the output.
10304 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10305 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10306 oldtag
= T(V4T_PLUS_V6_M
);
10308 // And override the new tag if we have a Tag_also_compatible_with on the
10311 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10312 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10313 newtag
= T(V4T_PLUS_V6_M
);
10315 // Architectures before V6KZ add features monotonically.
10316 int tagh
= std::max(oldtag
, newtag
);
10317 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10320 int tagl
= std::min(oldtag
, newtag
);
10321 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10323 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10324 // as the canonical version.
10325 if (result
== T(V4T_PLUS_V6_M
))
10328 *secondary_compat_out
= T(V6_M
);
10331 *secondary_compat_out
= -1;
10335 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10336 name
, oldtag
, newtag
);
10344 // Helper to print AEABI enum tag value.
10346 template<bool big_endian
>
10348 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10350 static const char* aeabi_enum_names
[] =
10351 { "", "variable-size", "32-bit", "" };
10352 const size_t aeabi_enum_names_size
=
10353 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10355 if (value
< aeabi_enum_names_size
)
10356 return std::string(aeabi_enum_names
[value
]);
10360 sprintf(buffer
, "<unknown value %u>", value
);
10361 return std::string(buffer
);
10365 // Return the string value to store in TAG_CPU_name.
10367 template<bool big_endian
>
10369 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10371 static const char* name_table
[] = {
10372 // These aren't real CPU names, but we can't guess
10373 // that from the architecture version alone.
10389 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10391 if (value
< name_table_size
)
10392 return std::string(name_table
[value
]);
10396 sprintf(buffer
, "<unknown CPU value %u>", value
);
10397 return std::string(buffer
);
10401 // Query attributes object to see if integer divide instructions may be
10402 // present in an object.
10404 template<bool big_endian
>
10406 Target_arm
<big_endian
>::attributes_accept_div(int arch
, int profile
,
10407 const Object_attribute
* div_attr
)
10409 switch (div_attr
->int_value())
10412 // Integer divide allowed if instruction contained in
10414 if (arch
== elfcpp::TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
10416 else if (arch
>= elfcpp::TAG_CPU_ARCH_V7E_M
)
10422 // Integer divide explicitly prohibited.
10426 // Unrecognised case - treat as allowing divide everywhere.
10428 // Integer divide allowed in ARM state.
10433 // Query attributes object to see if integer divide instructions are
10434 // forbidden to be in the object. This is not the inverse of
10435 // attributes_accept_div.
10437 template<bool big_endian
>
10439 Target_arm
<big_endian
>::attributes_forbid_div(const Object_attribute
* div_attr
)
10441 return div_attr
->int_value() == 1;
10444 // Merge object attributes from input file called NAME with those of the
10445 // output. The input object attributes are in the object pointed by PASD.
10447 template<bool big_endian
>
10449 Target_arm
<big_endian
>::merge_object_attributes(
10451 const Attributes_section_data
* pasd
)
10453 // Return if there is no attributes section data.
10457 // If output has no object attributes, just copy.
10458 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
10459 if (this->attributes_section_data_
== NULL
)
10461 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
10462 Object_attribute
* out_attr
=
10463 this->attributes_section_data_
->known_attributes(vendor
);
10465 // We do not output objects with Tag_MPextension_use_legacy - we move
10466 // the attribute's value to Tag_MPextension_use. */
10467 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
10469 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
10470 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
10471 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10473 gold_error(_("%s has both the current and legacy "
10474 "Tag_MPextension_use attributes"),
10478 out_attr
[elfcpp::Tag_MPextension_use
] =
10479 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
10480 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
10481 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
10487 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
10488 Object_attribute
* out_attr
=
10489 this->attributes_section_data_
->known_attributes(vendor
);
10491 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10492 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
10493 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
10495 // Ignore mismatches if the object doesn't use floating point. */
10496 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
10497 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
10498 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
10499 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
10500 && parameters
->options().warn_mismatch())
10501 gold_error(_("%s uses VFP register arguments, output does not"),
10505 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
10507 // Merge this attribute with existing attributes.
10510 case elfcpp::Tag_CPU_raw_name
:
10511 case elfcpp::Tag_CPU_name
:
10512 // These are merged after Tag_CPU_arch.
10515 case elfcpp::Tag_ABI_optimization_goals
:
10516 case elfcpp::Tag_ABI_FP_optimization_goals
:
10517 // Use the first value seen.
10520 case elfcpp::Tag_CPU_arch
:
10522 unsigned int saved_out_attr
= out_attr
->int_value();
10523 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10524 int secondary_compat
=
10525 this->get_secondary_compatible_arch(pasd
);
10526 int secondary_compat_out
=
10527 this->get_secondary_compatible_arch(
10528 this->attributes_section_data_
);
10529 out_attr
[i
].set_int_value(
10530 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
10531 &secondary_compat_out
,
10532 in_attr
[i
].int_value(),
10533 secondary_compat
));
10534 this->set_secondary_compatible_arch(this->attributes_section_data_
,
10535 secondary_compat_out
);
10537 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10538 if (out_attr
[i
].int_value() == saved_out_attr
)
10539 ; // Leave the names alone.
10540 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
10542 // The output architecture has been changed to match the
10543 // input architecture. Use the input names.
10544 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
10545 in_attr
[elfcpp::Tag_CPU_name
].string_value());
10546 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
10547 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
10551 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
10552 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
10555 // If we still don't have a value for Tag_CPU_name,
10556 // make one up now. Tag_CPU_raw_name remains blank.
10557 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
10559 const std::string cpu_name
=
10560 this->tag_cpu_name_value(out_attr
[i
].int_value());
10561 // FIXME: If we see an unknown CPU, this will be set
10562 // to "<unknown CPU n>", where n is the attribute value.
10563 // This is different from BFD, which leaves the name alone.
10564 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
10569 case elfcpp::Tag_ARM_ISA_use
:
10570 case elfcpp::Tag_THUMB_ISA_use
:
10571 case elfcpp::Tag_WMMX_arch
:
10572 case elfcpp::Tag_Advanced_SIMD_arch
:
10573 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10574 case elfcpp::Tag_ABI_FP_rounding
:
10575 case elfcpp::Tag_ABI_FP_exceptions
:
10576 case elfcpp::Tag_ABI_FP_user_exceptions
:
10577 case elfcpp::Tag_ABI_FP_number_model
:
10578 case elfcpp::Tag_VFP_HP_extension
:
10579 case elfcpp::Tag_CPU_unaligned_access
:
10580 case elfcpp::Tag_T2EE_use
:
10581 case elfcpp::Tag_Virtualization_use
:
10582 case elfcpp::Tag_MPextension_use
:
10583 // Use the largest value specified.
10584 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10585 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10588 case elfcpp::Tag_ABI_align8_preserved
:
10589 case elfcpp::Tag_ABI_PCS_RO_data
:
10590 // Use the smallest value specified.
10591 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10592 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10595 case elfcpp::Tag_ABI_align8_needed
:
10596 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
10597 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
10598 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
10601 // This error message should be enabled once all non-conforming
10602 // binaries in the toolchain have had the attributes set
10604 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10608 case elfcpp::Tag_ABI_FP_denormal
:
10609 case elfcpp::Tag_ABI_PCS_GOT_use
:
10611 // These tags have 0 = don't care, 1 = strong requirement,
10612 // 2 = weak requirement.
10613 static const int order_021
[3] = {0, 2, 1};
10615 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10616 // value if greater than 2 (for future-proofing).
10617 if ((in_attr
[i
].int_value() > 2
10618 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10619 || (in_attr
[i
].int_value() <= 2
10620 && out_attr
[i
].int_value() <= 2
10621 && (order_021
[in_attr
[i
].int_value()]
10622 > order_021
[out_attr
[i
].int_value()])))
10623 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10627 case elfcpp::Tag_CPU_arch_profile
:
10628 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
10630 // 0 will merge with anything.
10631 // 'A' and 'S' merge to 'A'.
10632 // 'R' and 'S' merge to 'R'.
10633 // 'M' and 'A|R|S' is an error.
10634 if (out_attr
[i
].int_value() == 0
10635 || (out_attr
[i
].int_value() == 'S'
10636 && (in_attr
[i
].int_value() == 'A'
10637 || in_attr
[i
].int_value() == 'R')))
10638 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10639 else if (in_attr
[i
].int_value() == 0
10640 || (in_attr
[i
].int_value() == 'S'
10641 && (out_attr
[i
].int_value() == 'A'
10642 || out_attr
[i
].int_value() == 'R')))
10644 else if (parameters
->options().warn_mismatch())
10647 (_("conflicting architecture profiles %c/%c"),
10648 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10649 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10653 case elfcpp::Tag_VFP_arch
:
10655 static const struct
10659 } vfp_versions
[7] =
10670 // Values greater than 6 aren't defined, so just pick the
10672 if (in_attr
[i
].int_value() > 6
10673 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10675 *out_attr
= *in_attr
;
10678 // The output uses the superset of input features
10679 // (ISA version) and registers.
10680 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10681 vfp_versions
[out_attr
[i
].int_value()].ver
);
10682 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10683 vfp_versions
[out_attr
[i
].int_value()].regs
);
10684 // This assumes all possible supersets are also a valid
10687 for (newval
= 6; newval
> 0; newval
--)
10689 if (regs
== vfp_versions
[newval
].regs
10690 && ver
== vfp_versions
[newval
].ver
)
10693 out_attr
[i
].set_int_value(newval
);
10696 case elfcpp::Tag_PCS_config
:
10697 if (out_attr
[i
].int_value() == 0)
10698 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10699 else if (in_attr
[i
].int_value() != 0
10700 && out_attr
[i
].int_value() != 0
10701 && parameters
->options().warn_mismatch())
10703 // It's sometimes ok to mix different configs, so this is only
10705 gold_warning(_("%s: conflicting platform configuration"), name
);
10708 case elfcpp::Tag_ABI_PCS_R9_use
:
10709 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10710 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10711 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10712 && parameters
->options().warn_mismatch())
10714 gold_error(_("%s: conflicting use of R9"), name
);
10716 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10717 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10719 case elfcpp::Tag_ABI_PCS_RW_data
:
10720 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10721 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10722 != elfcpp::AEABI_R9_SB
)
10723 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10724 != elfcpp::AEABI_R9_unused
)
10725 && parameters
->options().warn_mismatch())
10727 gold_error(_("%s: SB relative addressing conflicts with use "
10731 // Use the smallest value specified.
10732 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10733 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10735 case elfcpp::Tag_ABI_PCS_wchar_t
:
10736 if (out_attr
[i
].int_value()
10737 && in_attr
[i
].int_value()
10738 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10739 && parameters
->options().warn_mismatch()
10740 && parameters
->options().wchar_size_warning())
10742 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10743 "use %u-byte wchar_t; use of wchar_t values "
10744 "across objects may fail"),
10745 name
, in_attr
[i
].int_value(),
10746 out_attr
[i
].int_value());
10748 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10749 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10751 case elfcpp::Tag_ABI_enum_size
:
10752 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10754 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10755 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10757 // The existing object is compatible with anything.
10758 // Use whatever requirements the new object has.
10759 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10761 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10762 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10763 && parameters
->options().warn_mismatch()
10764 && parameters
->options().enum_size_warning())
10766 unsigned int in_value
= in_attr
[i
].int_value();
10767 unsigned int out_value
= out_attr
[i
].int_value();
10768 gold_warning(_("%s uses %s enums yet the output is to use "
10769 "%s enums; use of enum values across objects "
10772 this->aeabi_enum_name(in_value
).c_str(),
10773 this->aeabi_enum_name(out_value
).c_str());
10777 case elfcpp::Tag_ABI_VFP_args
:
10780 case elfcpp::Tag_ABI_WMMX_args
:
10781 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10782 && parameters
->options().warn_mismatch())
10784 gold_error(_("%s uses iWMMXt register arguments, output does "
10789 case Object_attribute::Tag_compatibility
:
10790 // Merged in target-independent code.
10792 case elfcpp::Tag_ABI_HardFP_use
:
10793 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10794 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10795 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10796 out_attr
[i
].set_int_value(3);
10797 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10798 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10800 case elfcpp::Tag_ABI_FP_16bit_format
:
10801 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10803 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10804 && parameters
->options().warn_mismatch())
10805 gold_error(_("fp16 format mismatch between %s and output"),
10808 if (in_attr
[i
].int_value() != 0)
10809 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10812 case elfcpp::Tag_DIV_use
:
10814 // A value of zero on input means that the divide
10815 // instruction may be used if available in the base
10816 // architecture as specified via Tag_CPU_arch and
10817 // Tag_CPU_arch_profile. A value of 1 means that the user
10818 // did not want divide instructions. A value of 2
10819 // explicitly means that divide instructions were allowed
10820 // in ARM and Thumb state.
10822 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
)->
10824 int profile
= this->
10825 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
)->
10827 if (in_attr
[i
].int_value() == out_attr
[i
].int_value())
10831 else if (attributes_forbid_div(&in_attr
[i
])
10832 && !attributes_accept_div(arch
, profile
, &out_attr
[i
]))
10833 out_attr
[i
].set_int_value(1);
10834 else if (attributes_forbid_div(&out_attr
[i
])
10835 && attributes_accept_div(arch
, profile
, &in_attr
[i
]))
10836 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10837 else if (in_attr
[i
].int_value() == 2)
10838 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10842 case elfcpp::Tag_MPextension_use_legacy
:
10843 // We don't output objects with Tag_MPextension_use_legacy - we
10844 // move the value to Tag_MPextension_use.
10845 if (in_attr
[i
].int_value() != 0
10846 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10848 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10849 != in_attr
[i
].int_value())
10851 gold_error(_("%s has has both the current and legacy "
10852 "Tag_MPextension_use attributes"),
10857 if (in_attr
[i
].int_value()
10858 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10859 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10863 case elfcpp::Tag_nodefaults
:
10864 // This tag is set if it exists, but the value is unused (and is
10865 // typically zero). We don't actually need to do anything here -
10866 // the merge happens automatically when the type flags are merged
10869 case elfcpp::Tag_also_compatible_with
:
10870 // Already done in Tag_CPU_arch.
10872 case elfcpp::Tag_conformance
:
10873 // Keep the attribute if it matches. Throw it away otherwise.
10874 // No attribute means no claim to conform.
10875 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10876 out_attr
[i
].set_string_value("");
10881 const char* err_object
= NULL
;
10883 // The "known_obj_attributes" table does contain some undefined
10884 // attributes. Ensure that there are unused.
10885 if (out_attr
[i
].int_value() != 0
10886 || out_attr
[i
].string_value() != "")
10887 err_object
= "output";
10888 else if (in_attr
[i
].int_value() != 0
10889 || in_attr
[i
].string_value() != "")
10892 if (err_object
!= NULL
10893 && parameters
->options().warn_mismatch())
10895 // Attribute numbers >=64 (mod 128) can be safely ignored.
10896 if ((i
& 127) < 64)
10897 gold_error(_("%s: unknown mandatory EABI object attribute "
10901 gold_warning(_("%s: unknown EABI object attribute %d"),
10905 // Only pass on attributes that match in both inputs.
10906 if (!in_attr
[i
].matches(out_attr
[i
]))
10908 out_attr
[i
].set_int_value(0);
10909 out_attr
[i
].set_string_value("");
10914 // If out_attr was copied from in_attr then it won't have a type yet.
10915 if (in_attr
[i
].type() && !out_attr
[i
].type())
10916 out_attr
[i
].set_type(in_attr
[i
].type());
10919 // Merge Tag_compatibility attributes and any common GNU ones.
10920 this->attributes_section_data_
->merge(name
, pasd
);
10922 // Check for any attributes not known on ARM.
10923 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10924 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10925 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10926 Other_attributes
* out_other_attributes
=
10927 this->attributes_section_data_
->other_attributes(vendor
);
10928 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10930 while (in_iter
!= in_other_attributes
->end()
10931 || out_iter
!= out_other_attributes
->end())
10933 const char* err_object
= NULL
;
10936 // The tags for each list are in numerical order.
10937 // If the tags are equal, then merge.
10938 if (out_iter
!= out_other_attributes
->end()
10939 && (in_iter
== in_other_attributes
->end()
10940 || in_iter
->first
> out_iter
->first
))
10942 // This attribute only exists in output. We can't merge, and we
10943 // don't know what the tag means, so delete it.
10944 err_object
= "output";
10945 err_tag
= out_iter
->first
;
10946 int saved_tag
= out_iter
->first
;
10947 delete out_iter
->second
;
10948 out_other_attributes
->erase(out_iter
);
10949 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10951 else if (in_iter
!= in_other_attributes
->end()
10952 && (out_iter
!= out_other_attributes
->end()
10953 || in_iter
->first
< out_iter
->first
))
10955 // This attribute only exists in input. We can't merge, and we
10956 // don't know what the tag means, so ignore it.
10958 err_tag
= in_iter
->first
;
10961 else // The tags are equal.
10963 // As present, all attributes in the list are unknown, and
10964 // therefore can't be merged meaningfully.
10965 err_object
= "output";
10966 err_tag
= out_iter
->first
;
10968 // Only pass on attributes that match in both inputs.
10969 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10971 // No match. Delete the attribute.
10972 int saved_tag
= out_iter
->first
;
10973 delete out_iter
->second
;
10974 out_other_attributes
->erase(out_iter
);
10975 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10979 // Matched. Keep the attribute and move to the next.
10985 if (err_object
&& parameters
->options().warn_mismatch())
10987 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10988 if ((err_tag
& 127) < 64)
10990 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10991 err_object
, err_tag
);
10995 gold_warning(_("%s: unknown EABI object attribute %d"),
10996 err_object
, err_tag
);
11002 // Stub-generation methods for Target_arm.
11004 // Make a new Arm_input_section object.
11006 template<bool big_endian
>
11007 Arm_input_section
<big_endian
>*
11008 Target_arm
<big_endian
>::new_arm_input_section(
11010 unsigned int shndx
)
11012 Section_id
sid(relobj
, shndx
);
11014 Arm_input_section
<big_endian
>* arm_input_section
=
11015 new Arm_input_section
<big_endian
>(relobj
, shndx
);
11016 arm_input_section
->init();
11018 // Register new Arm_input_section in map for look-up.
11019 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
11020 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
11022 // Make sure that it we have not created another Arm_input_section
11023 // for this input section already.
11024 gold_assert(ins
.second
);
11026 return arm_input_section
;
11029 // Find the Arm_input_section object corresponding to the SHNDX-th input
11030 // section of RELOBJ.
11032 template<bool big_endian
>
11033 Arm_input_section
<big_endian
>*
11034 Target_arm
<big_endian
>::find_arm_input_section(
11036 unsigned int shndx
) const
11038 Section_id
sid(relobj
, shndx
);
11039 typename
Arm_input_section_map::const_iterator p
=
11040 this->arm_input_section_map_
.find(sid
);
11041 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
11044 // Make a new stub table.
11046 template<bool big_endian
>
11047 Stub_table
<big_endian
>*
11048 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
11050 Stub_table
<big_endian
>* stub_table
=
11051 new Stub_table
<big_endian
>(owner
);
11052 this->stub_tables_
.push_back(stub_table
);
11054 stub_table
->set_address(owner
->address() + owner
->data_size());
11055 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
11056 stub_table
->finalize_data_size();
11061 // Scan a relocation for stub generation.
11063 template<bool big_endian
>
11065 Target_arm
<big_endian
>::scan_reloc_for_stub(
11066 const Relocate_info
<32, big_endian
>* relinfo
,
11067 unsigned int r_type
,
11068 const Sized_symbol
<32>* gsym
,
11069 unsigned int r_sym
,
11070 const Symbol_value
<32>* psymval
,
11071 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
11072 Arm_address address
)
11074 const Arm_relobj
<big_endian
>* arm_relobj
=
11075 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11077 bool target_is_thumb
;
11078 Symbol_value
<32> symval
;
11081 // This is a global symbol. Determine if we use PLT and if the
11082 // final target is THUMB.
11083 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11085 // This uses a PLT, change the symbol value.
11086 symval
.set_output_value(this->plt_section()->address()
11087 + gsym
->plt_offset());
11089 target_is_thumb
= false;
11091 else if (gsym
->is_undefined())
11092 // There is no need to generate a stub symbol is undefined.
11097 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11098 || (gsym
->type() == elfcpp::STT_FUNC
11099 && !gsym
->is_undefined()
11100 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11105 // This is a local symbol. Determine if the final target is THUMB.
11106 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11109 // Strip LSB if this points to a THUMB target.
11110 const Arm_reloc_property
* reloc_property
=
11111 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11112 gold_assert(reloc_property
!= NULL
);
11113 if (target_is_thumb
11114 && reloc_property
->uses_thumb_bit()
11115 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11117 Arm_address stripped_value
=
11118 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11119 symval
.set_output_value(stripped_value
);
11123 // Get the symbol value.
11124 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11126 // Owing to pipelining, the PC relative branches below actually skip
11127 // two instructions when the branch offset is 0.
11128 Arm_address destination
;
11131 case elfcpp::R_ARM_CALL
:
11132 case elfcpp::R_ARM_JUMP24
:
11133 case elfcpp::R_ARM_PLT32
:
11135 destination
= value
+ addend
+ 8;
11137 case elfcpp::R_ARM_THM_CALL
:
11138 case elfcpp::R_ARM_THM_XPC22
:
11139 case elfcpp::R_ARM_THM_JUMP24
:
11140 case elfcpp::R_ARM_THM_JUMP19
:
11142 destination
= value
+ addend
+ 4;
11145 gold_unreachable();
11148 Reloc_stub
* stub
= NULL
;
11149 Stub_type stub_type
=
11150 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11152 if (stub_type
!= arm_stub_none
)
11154 // Try looking up an existing stub from a stub table.
11155 Stub_table
<big_endian
>* stub_table
=
11156 arm_relobj
->stub_table(relinfo
->data_shndx
);
11157 gold_assert(stub_table
!= NULL
);
11159 // Locate stub by destination.
11160 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11162 // Create a stub if there is not one already
11163 stub
= stub_table
->find_reloc_stub(stub_key
);
11166 // create a new stub and add it to stub table.
11167 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11168 stub_table
->add_reloc_stub(stub
, stub_key
);
11171 // Record the destination address.
11172 stub
->set_destination_address(destination
11173 | (target_is_thumb
? 1 : 0));
11176 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11177 if (this->fix_cortex_a8_
11178 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11179 || r_type
== elfcpp::R_ARM_THM_JUMP19
11180 || r_type
== elfcpp::R_ARM_THM_CALL
11181 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11182 && (address
& 0xfffU
) == 0xffeU
)
11184 // Found a candidate. Note we haven't checked the destination is
11185 // within 4K here: if we do so (and don't create a record) we can't
11186 // tell that a branch should have been relocated when scanning later.
11187 this->cortex_a8_relocs_info_
[address
] =
11188 new Cortex_a8_reloc(stub
, r_type
,
11189 destination
| (target_is_thumb
? 1 : 0));
11193 // This function scans a relocation sections for stub generation.
11194 // The template parameter Relocate must be a class type which provides
11195 // a single function, relocate(), which implements the machine
11196 // specific part of a relocation.
11198 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11199 // SHT_REL or SHT_RELA.
11201 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11202 // of relocs. OUTPUT_SECTION is the output section.
11203 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11204 // mapped to output offsets.
11206 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11207 // VIEW_SIZE is the size. These refer to the input section, unless
11208 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11209 // the output section.
11211 template<bool big_endian
>
11212 template<int sh_type
>
11214 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11215 const Relocate_info
<32, big_endian
>* relinfo
,
11216 const unsigned char* prelocs
,
11217 size_t reloc_count
,
11218 Output_section
* output_section
,
11219 bool needs_special_offset_handling
,
11220 const unsigned char* view
,
11221 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11224 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11225 const int reloc_size
=
11226 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11228 Arm_relobj
<big_endian
>* arm_object
=
11229 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11230 unsigned int local_count
= arm_object
->local_symbol_count();
11232 gold::Default_comdat_behavior default_comdat_behavior
;
11233 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11235 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11237 Reltype
reloc(prelocs
);
11239 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11240 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11241 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11243 r_type
= this->get_real_reloc_type(r_type
);
11245 // Only a few relocation types need stubs.
11246 if ((r_type
!= elfcpp::R_ARM_CALL
)
11247 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11248 && (r_type
!= elfcpp::R_ARM_PLT32
)
11249 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11250 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11251 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11252 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11253 && (r_type
!= elfcpp::R_ARM_V4BX
))
11256 section_offset_type offset
=
11257 convert_to_section_size_type(reloc
.get_r_offset());
11259 if (needs_special_offset_handling
)
11261 offset
= output_section
->output_offset(relinfo
->object
,
11262 relinfo
->data_shndx
,
11268 // Create a v4bx stub if --fix-v4bx-interworking is used.
11269 if (r_type
== elfcpp::R_ARM_V4BX
)
11271 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11273 // Get the BX instruction.
11274 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11275 const Valtype
* wv
=
11276 reinterpret_cast<const Valtype
*>(view
+ offset
);
11277 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11278 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11279 const uint32_t reg
= (insn
& 0xf);
11283 // Try looking up an existing stub from a stub table.
11284 Stub_table
<big_endian
>* stub_table
=
11285 arm_object
->stub_table(relinfo
->data_shndx
);
11286 gold_assert(stub_table
!= NULL
);
11288 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11290 // create a new stub and add it to stub table.
11291 Arm_v4bx_stub
* stub
=
11292 this->stub_factory().make_arm_v4bx_stub(reg
);
11293 gold_assert(stub
!= NULL
);
11294 stub_table
->add_arm_v4bx_stub(stub
);
11302 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11303 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11304 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11306 const Sized_symbol
<32>* sym
;
11308 Symbol_value
<32> symval
;
11309 const Symbol_value
<32> *psymval
;
11310 bool is_defined_in_discarded_section
;
11311 unsigned int shndx
;
11312 if (r_sym
< local_count
)
11315 psymval
= arm_object
->local_symbol(r_sym
);
11317 // If the local symbol belongs to a section we are discarding,
11318 // and that section is a debug section, try to find the
11319 // corresponding kept section and map this symbol to its
11320 // counterpart in the kept section. The symbol must not
11321 // correspond to a section we are folding.
11323 shndx
= psymval
->input_shndx(&is_ordinary
);
11324 is_defined_in_discarded_section
=
11326 && shndx
!= elfcpp::SHN_UNDEF
11327 && !arm_object
->is_section_included(shndx
)
11328 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11330 // We need to compute the would-be final value of this local
11332 if (!is_defined_in_discarded_section
)
11334 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11335 typename
ObjType::Compute_final_local_value_status status
=
11336 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11338 if (status
== ObjType::CFLV_OK
)
11340 // Currently we cannot handle a branch to a target in
11341 // a merged section. If this is the case, issue an error
11342 // and also free the merge symbol value.
11343 if (!symval
.has_output_value())
11345 const std::string
& section_name
=
11346 arm_object
->section_name(shndx
);
11347 arm_object
->error(_("cannot handle branch to local %u "
11348 "in a merged section %s"),
11349 r_sym
, section_name
.c_str());
11355 // We cannot determine the final value.
11362 const Symbol
* gsym
;
11363 gsym
= arm_object
->global_symbol(r_sym
);
11364 gold_assert(gsym
!= NULL
);
11365 if (gsym
->is_forwarder())
11366 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11368 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11369 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11370 symval
.set_output_symtab_index(sym
->symtab_index());
11372 symval
.set_no_output_symtab_entry();
11374 // We need to compute the would-be final value of this global
11376 const Symbol_table
* symtab
= relinfo
->symtab
;
11377 const Sized_symbol
<32>* sized_symbol
=
11378 symtab
->get_sized_symbol
<32>(gsym
);
11379 Symbol_table::Compute_final_value_status status
;
11380 Arm_address value
=
11381 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11383 // Skip this if the symbol has not output section.
11384 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11386 symval
.set_output_value(value
);
11388 if (gsym
->type() == elfcpp::STT_TLS
)
11389 symval
.set_is_tls_symbol();
11390 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11391 symval
.set_is_ifunc_symbol();
11394 is_defined_in_discarded_section
=
11395 (gsym
->is_defined_in_discarded_section()
11396 && gsym
->is_undefined());
11400 Symbol_value
<32> symval2
;
11401 if (is_defined_in_discarded_section
)
11403 if (comdat_behavior
== CB_UNDETERMINED
)
11405 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
11406 comdat_behavior
= default_comdat_behavior
.get(name
.c_str());
11408 if (comdat_behavior
== CB_PRETEND
)
11410 // FIXME: This case does not work for global symbols.
11411 // We have no place to store the original section index.
11412 // Fortunately this does not matter for comdat sections,
11413 // only for sections explicitly discarded by a linker
11416 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
11417 arm_object
->map_to_kept_section(shndx
, &found
);
11419 symval2
.set_output_value(value
+ psymval
->input_value());
11421 symval2
.set_output_value(0);
11425 if (comdat_behavior
== CB_WARNING
)
11426 gold_warning_at_location(relinfo
, i
, offset
,
11427 _("relocation refers to discarded "
11429 symval2
.set_output_value(0);
11431 symval2
.set_no_output_symtab_entry();
11432 psymval
= &symval2
;
11435 // If symbol is a section symbol, we don't know the actual type of
11436 // destination. Give up.
11437 if (psymval
->is_section_symbol())
11440 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
11441 addend
, view_address
+ offset
);
11445 // Scan an input section for stub generation.
11447 template<bool big_endian
>
11449 Target_arm
<big_endian
>::scan_section_for_stubs(
11450 const Relocate_info
<32, big_endian
>* relinfo
,
11451 unsigned int sh_type
,
11452 const unsigned char* prelocs
,
11453 size_t reloc_count
,
11454 Output_section
* output_section
,
11455 bool needs_special_offset_handling
,
11456 const unsigned char* view
,
11457 Arm_address view_address
,
11458 section_size_type view_size
)
11460 if (sh_type
== elfcpp::SHT_REL
)
11461 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
11466 needs_special_offset_handling
,
11470 else if (sh_type
== elfcpp::SHT_RELA
)
11471 // We do not support RELA type relocations yet. This is provided for
11473 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
11478 needs_special_offset_handling
,
11483 gold_unreachable();
11486 // Group input sections for stub generation.
11488 // We group input sections in an output section so that the total size,
11489 // including any padding space due to alignment is smaller than GROUP_SIZE
11490 // unless the only input section in group is bigger than GROUP_SIZE already.
11491 // Then an ARM stub table is created to follow the last input section
11492 // in group. For each group an ARM stub table is created an is placed
11493 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11494 // extend the group after the stub table.
11496 template<bool big_endian
>
11498 Target_arm
<big_endian
>::group_sections(
11500 section_size_type group_size
,
11501 bool stubs_always_after_branch
,
11504 // Group input sections and insert stub table
11505 Layout::Section_list section_list
;
11506 layout
->get_executable_sections(§ion_list
);
11507 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11508 p
!= section_list
.end();
11511 Arm_output_section
<big_endian
>* output_section
=
11512 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11513 output_section
->group_sections(group_size
, stubs_always_after_branch
,
11518 // Relaxation hook. This is where we do stub generation.
11520 template<bool big_endian
>
11522 Target_arm
<big_endian
>::do_relax(
11524 const Input_objects
* input_objects
,
11525 Symbol_table
* symtab
,
11529 // No need to generate stubs if this is a relocatable link.
11530 gold_assert(!parameters
->options().relocatable());
11532 // If this is the first pass, we need to group input sections into
11534 bool done_exidx_fixup
= false;
11535 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
11538 // Determine the stub group size. The group size is the absolute
11539 // value of the parameter --stub-group-size. If --stub-group-size
11540 // is passed a negative value, we restrict stubs to be always after
11541 // the stubbed branches.
11542 int32_t stub_group_size_param
=
11543 parameters
->options().stub_group_size();
11544 bool stubs_always_after_branch
= stub_group_size_param
< 0;
11545 section_size_type stub_group_size
= abs(stub_group_size_param
);
11547 if (stub_group_size
== 1)
11550 // Thumb branch range is +-4MB has to be used as the default
11551 // maximum size (a given section can contain both ARM and Thumb
11552 // code, so the worst case has to be taken into account). If we are
11553 // fixing cortex-a8 errata, the branch range has to be even smaller,
11554 // since wide conditional branch has a range of +-1MB only.
11556 // This value is 48K less than that, which allows for 4096
11557 // 12-byte stubs. If we exceed that, then we will fail to link.
11558 // The user will have to relink with an explicit group size
11560 stub_group_size
= 4145152;
11563 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11564 // page as the first half of a 32-bit branch straddling two 4K pages.
11565 // This is a crude way of enforcing that. In addition, long conditional
11566 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11567 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11568 // cortex-A8 stubs from long conditional branches.
11569 if (this->fix_cortex_a8_
)
11571 stubs_always_after_branch
= true;
11572 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
11573 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
11576 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
11578 // Also fix .ARM.exidx section coverage.
11579 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
11580 for (Layout::Section_list::const_iterator p
=
11581 layout
->section_list().begin();
11582 p
!= layout
->section_list().end();
11584 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
11586 if (exidx_output_section
== NULL
)
11587 exidx_output_section
=
11588 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11590 // We cannot handle this now.
11591 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11592 "non-relocatable link"),
11593 exidx_output_section
->name(),
11597 if (exidx_output_section
!= NULL
)
11599 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
11601 done_exidx_fixup
= true;
11606 // If this is not the first pass, addresses and file offsets have
11607 // been reset at this point, set them here.
11608 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11609 sp
!= this->stub_tables_
.end();
11612 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11613 off_t off
= align_address(owner
->original_size(),
11614 (*sp
)->addralign());
11615 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
11616 owner
->offset() + off
);
11620 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11621 // beginning of each relaxation pass, just blow away all the stubs.
11622 // Alternatively, we could selectively remove only the stubs and reloc
11623 // information for code sections that have moved since the last pass.
11624 // That would require more book-keeping.
11625 if (this->fix_cortex_a8_
)
11627 // Clear all Cortex-A8 reloc information.
11628 for (typename
Cortex_a8_relocs_info::const_iterator p
=
11629 this->cortex_a8_relocs_info_
.begin();
11630 p
!= this->cortex_a8_relocs_info_
.end();
11633 this->cortex_a8_relocs_info_
.clear();
11635 // Remove all Cortex-A8 stubs.
11636 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11637 sp
!= this->stub_tables_
.end();
11639 (*sp
)->remove_all_cortex_a8_stubs();
11642 // Scan relocs for relocation stubs
11643 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11644 op
!= input_objects
->relobj_end();
11647 Arm_relobj
<big_endian
>* arm_relobj
=
11648 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11649 // Lock the object so we can read from it. This is only called
11650 // single-threaded from Layout::finalize, so it is OK to lock.
11651 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11652 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
11655 // Check all stub tables to see if any of them have their data sizes
11656 // or addresses alignments changed. These are the only things that
11658 bool any_stub_table_changed
= false;
11659 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
11660 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11661 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11664 if ((*sp
)->update_data_size_and_addralign())
11666 // Update data size of stub table owner.
11667 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11668 uint64_t address
= owner
->address();
11669 off_t offset
= owner
->offset();
11670 owner
->reset_address_and_file_offset();
11671 owner
->set_address_and_file_offset(address
, offset
);
11673 sections_needing_adjustment
.insert(owner
->output_section());
11674 any_stub_table_changed
= true;
11678 // Output_section_data::output_section() returns a const pointer but we
11679 // need to update output sections, so we record all output sections needing
11680 // update above and scan the sections here to find out what sections need
11682 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
11683 p
!= layout
->section_list().end();
11686 if (sections_needing_adjustment
.find(*p
)
11687 != sections_needing_adjustment
.end())
11688 (*p
)->set_section_offsets_need_adjustment();
11691 // Stop relaxation if no EXIDX fix-up and no stub table change.
11692 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
11694 // Finalize the stubs in the last relaxation pass.
11695 if (!continue_relaxation
)
11697 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11698 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11700 (*sp
)->finalize_stubs();
11702 // Update output local symbol counts of objects if necessary.
11703 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11704 op
!= input_objects
->relobj_end();
11707 Arm_relobj
<big_endian
>* arm_relobj
=
11708 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11710 // Update output local symbol counts. We need to discard local
11711 // symbols defined in parts of input sections that are discarded by
11713 if (arm_relobj
->output_local_symbol_count_needs_update())
11715 // We need to lock the object's file to update it.
11716 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11717 arm_relobj
->update_output_local_symbol_count();
11722 return continue_relaxation
;
11725 // Relocate a stub.
11727 template<bool big_endian
>
11729 Target_arm
<big_endian
>::relocate_stub(
11731 const Relocate_info
<32, big_endian
>* relinfo
,
11732 Output_section
* output_section
,
11733 unsigned char* view
,
11734 Arm_address address
,
11735 section_size_type view_size
)
11738 const Stub_template
* stub_template
= stub
->stub_template();
11739 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11741 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11742 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11744 unsigned int r_type
= insn
->r_type();
11745 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11746 section_size_type reloc_size
= insn
->size();
11747 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11749 // This is the address of the stub destination.
11750 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11751 Symbol_value
<32> symval
;
11752 symval
.set_output_value(target
);
11754 // Synthesize a fake reloc just in case. We don't have a symbol so
11756 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11757 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11758 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11759 reloc_write
.put_r_offset(reloc_offset
);
11760 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11761 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11763 relocate
.relocate(relinfo
, this, output_section
,
11764 this->fake_relnum_for_stubs
, rel
, r_type
,
11765 NULL
, &symval
, view
+ reloc_offset
,
11766 address
+ reloc_offset
, reloc_size
);
11770 // Determine whether an object attribute tag takes an integer, a
11773 template<bool big_endian
>
11775 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11777 if (tag
== Object_attribute::Tag_compatibility
)
11778 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11779 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11780 else if (tag
== elfcpp::Tag_nodefaults
)
11781 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11782 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11783 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11784 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11786 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11788 return ((tag
& 1) != 0
11789 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11790 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11793 // Reorder attributes.
11795 // The ABI defines that Tag_conformance should be emitted first, and that
11796 // Tag_nodefaults should be second (if either is defined). This sets those
11797 // two positions, and bumps up the position of all the remaining tags to
11800 template<bool big_endian
>
11802 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11804 // Reorder the known object attributes in output. We want to move
11805 // Tag_conformance to position 4 and Tag_conformance to position 5
11806 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11808 return elfcpp::Tag_conformance
;
11810 return elfcpp::Tag_nodefaults
;
11811 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11813 if ((num
- 1) < elfcpp::Tag_conformance
)
11818 // Scan a span of THUMB code for Cortex-A8 erratum.
11820 template<bool big_endian
>
11822 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11823 Arm_relobj
<big_endian
>* arm_relobj
,
11824 unsigned int shndx
,
11825 section_size_type span_start
,
11826 section_size_type span_end
,
11827 const unsigned char* view
,
11828 Arm_address address
)
11830 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11832 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11833 // The branch target is in the same 4KB region as the
11834 // first half of the branch.
11835 // The instruction before the branch is a 32-bit
11836 // length non-branch instruction.
11837 section_size_type i
= span_start
;
11838 bool last_was_32bit
= false;
11839 bool last_was_branch
= false;
11840 while (i
< span_end
)
11842 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11843 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11844 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11845 bool is_blx
= false, is_b
= false;
11846 bool is_bl
= false, is_bcc
= false;
11848 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11851 // Load the rest of the insn (in manual-friendly order).
11852 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11854 // Encoding T4: B<c>.W.
11855 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11856 // Encoding T1: BL<c>.W.
11857 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11858 // Encoding T2: BLX<c>.W.
11859 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11860 // Encoding T3: B<c>.W (not permitted in IT block).
11861 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11862 && (insn
& 0x07f00000U
) != 0x03800000U
);
11865 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11867 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11868 // page boundary and it follows 32-bit non-branch instruction,
11869 // we need to work around.
11870 if (is_32bit_branch
11871 && ((address
+ i
) & 0xfffU
) == 0xffeU
11873 && !last_was_branch
)
11875 // Check to see if there is a relocation stub for this branch.
11876 bool force_target_arm
= false;
11877 bool force_target_thumb
= false;
11878 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11879 Cortex_a8_relocs_info::const_iterator p
=
11880 this->cortex_a8_relocs_info_
.find(address
+ i
);
11882 if (p
!= this->cortex_a8_relocs_info_
.end())
11884 cortex_a8_reloc
= p
->second
;
11885 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11887 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11888 && !target_is_thumb
)
11889 force_target_arm
= true;
11890 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11891 && target_is_thumb
)
11892 force_target_thumb
= true;
11896 Stub_type stub_type
= arm_stub_none
;
11898 // Check if we have an offending branch instruction.
11899 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11900 uint16_t lower_insn
= insn
& 0xffffU
;
11901 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
11903 if (cortex_a8_reloc
!= NULL
11904 && cortex_a8_reloc
->reloc_stub() != NULL
)
11905 // We've already made a stub for this instruction, e.g.
11906 // it's a long branch or a Thumb->ARM stub. Assume that
11907 // stub will suffice to work around the A8 erratum (see
11908 // setting of always_after_branch above).
11912 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11914 stub_type
= arm_stub_a8_veneer_b_cond
;
11916 else if (is_b
|| is_bl
|| is_blx
)
11918 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11923 stub_type
= (is_blx
11924 ? arm_stub_a8_veneer_blx
11926 ? arm_stub_a8_veneer_bl
11927 : arm_stub_a8_veneer_b
));
11930 if (stub_type
!= arm_stub_none
)
11932 Arm_address pc_for_insn
= address
+ i
+ 4;
11934 // The original instruction is a BL, but the target is
11935 // an ARM instruction. If we were not making a stub,
11936 // the BL would have been converted to a BLX. Use the
11937 // BLX stub instead in that case.
11938 if (this->may_use_v5t_interworking() && force_target_arm
11939 && stub_type
== arm_stub_a8_veneer_bl
)
11941 stub_type
= arm_stub_a8_veneer_blx
;
11945 // Conversely, if the original instruction was
11946 // BLX but the target is Thumb mode, use the BL stub.
11947 else if (force_target_thumb
11948 && stub_type
== arm_stub_a8_veneer_blx
)
11950 stub_type
= arm_stub_a8_veneer_bl
;
11958 // If we found a relocation, use the proper destination,
11959 // not the offset in the (unrelocated) instruction.
11960 // Note this is always done if we switched the stub type above.
11961 if (cortex_a8_reloc
!= NULL
)
11962 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11964 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11966 // Add a new stub if destination address in in the same page.
11967 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11969 Cortex_a8_stub
* stub
=
11970 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11974 Stub_table
<big_endian
>* stub_table
=
11975 arm_relobj
->stub_table(shndx
);
11976 gold_assert(stub_table
!= NULL
);
11977 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11982 i
+= insn_32bit
? 4 : 2;
11983 last_was_32bit
= insn_32bit
;
11984 last_was_branch
= is_32bit_branch
;
11988 // Apply the Cortex-A8 workaround.
11990 template<bool big_endian
>
11992 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11993 const Cortex_a8_stub
* stub
,
11994 Arm_address stub_address
,
11995 unsigned char* insn_view
,
11996 Arm_address insn_address
)
11998 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11999 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
12000 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12001 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12002 off_t branch_offset
= stub_address
- (insn_address
+ 4);
12004 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12005 switch (stub
->stub_template()->type())
12007 case arm_stub_a8_veneer_b_cond
:
12008 // For a conditional branch, we re-write it to be an unconditional
12009 // branch to the stub. We use the THUMB-2 encoding here.
12010 upper_insn
= 0xf000U
;
12011 lower_insn
= 0xb800U
;
12013 case arm_stub_a8_veneer_b
:
12014 case arm_stub_a8_veneer_bl
:
12015 case arm_stub_a8_veneer_blx
:
12016 if ((lower_insn
& 0x5000U
) == 0x4000U
)
12017 // For a BLX instruction, make sure that the relocation is
12018 // rounded up to a word boundary. This follows the semantics of
12019 // the instruction which specifies that bit 1 of the target
12020 // address will come from bit 1 of the base address.
12021 branch_offset
= (branch_offset
+ 2) & ~3;
12023 // Put BRANCH_OFFSET back into the insn.
12024 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
12025 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
12026 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
12030 gold_unreachable();
12033 // Put the relocated value back in the object file:
12034 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
12035 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
12038 // Target selector for ARM. Note this is never instantiated directly.
12039 // It's only used in Target_selector_arm_nacl, below.
12041 template<bool big_endian
>
12042 class Target_selector_arm
: public Target_selector
12045 Target_selector_arm()
12046 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
12047 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
12048 (big_endian
? "armelfb" : "armelf"))
12052 do_instantiate_target()
12053 { return new Target_arm
<big_endian
>(); }
12056 // Fix .ARM.exidx section coverage.
12058 template<bool big_endian
>
12060 Target_arm
<big_endian
>::fix_exidx_coverage(
12062 const Input_objects
* input_objects
,
12063 Arm_output_section
<big_endian
>* exidx_section
,
12064 Symbol_table
* symtab
,
12067 // We need to look at all the input sections in output in ascending
12068 // order of of output address. We do that by building a sorted list
12069 // of output sections by addresses. Then we looks at the output sections
12070 // in order. The input sections in an output section are already sorted
12071 // by addresses within the output section.
12073 typedef std::set
<Output_section
*, output_section_address_less_than
>
12074 Sorted_output_section_list
;
12075 Sorted_output_section_list sorted_output_sections
;
12077 // Find out all the output sections of input sections pointed by
12078 // EXIDX input sections.
12079 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
12080 p
!= input_objects
->relobj_end();
12083 Arm_relobj
<big_endian
>* arm_relobj
=
12084 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12085 std::vector
<unsigned int> shndx_list
;
12086 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12087 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12089 const Arm_exidx_input_section
* exidx_input_section
=
12090 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12091 gold_assert(exidx_input_section
!= NULL
);
12092 if (!exidx_input_section
->has_errors())
12094 unsigned int text_shndx
= exidx_input_section
->link();
12095 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12096 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12097 sorted_output_sections
.insert(os
);
12102 // Go over the output sections in ascending order of output addresses.
12103 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12105 Text_section_list sorted_text_sections
;
12106 for (typename
Sorted_output_section_list::iterator p
=
12107 sorted_output_sections
.begin();
12108 p
!= sorted_output_sections
.end();
12111 Arm_output_section
<big_endian
>* arm_output_section
=
12112 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12113 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12116 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12117 merge_exidx_entries(), task
);
12120 template<bool big_endian
>
12122 Target_arm
<big_endian
>::do_define_standard_symbols(
12123 Symbol_table
* symtab
,
12126 // Handle the .ARM.exidx section.
12127 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12129 if (exidx_section
!= NULL
)
12131 // Create __exidx_start and __exidx_end symbols.
12132 symtab
->define_in_output_data("__exidx_start",
12134 Symbol_table::PREDEFINED
,
12138 elfcpp::STT_NOTYPE
,
12139 elfcpp::STB_GLOBAL
,
12140 elfcpp::STV_HIDDEN
,
12142 false, // offset_is_from_end
12143 true); // only_if_ref
12145 symtab
->define_in_output_data("__exidx_end",
12147 Symbol_table::PREDEFINED
,
12151 elfcpp::STT_NOTYPE
,
12152 elfcpp::STB_GLOBAL
,
12153 elfcpp::STV_HIDDEN
,
12155 true, // offset_is_from_end
12156 true); // only_if_ref
12160 // Define __exidx_start and __exidx_end even when .ARM.exidx
12161 // section is missing to match ld's behaviour.
12162 symtab
->define_as_constant("__exidx_start", NULL
,
12163 Symbol_table::PREDEFINED
,
12164 0, 0, elfcpp::STT_OBJECT
,
12165 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12167 symtab
->define_as_constant("__exidx_end", NULL
,
12168 Symbol_table::PREDEFINED
,
12169 0, 0, elfcpp::STT_OBJECT
,
12170 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12175 // NaCl variant. It uses different PLT contents.
12177 template<bool big_endian
>
12178 class Output_data_plt_arm_nacl
;
12180 template<bool big_endian
>
12181 class Target_arm_nacl
: public Target_arm
<big_endian
>
12185 : Target_arm
<big_endian
>(&arm_nacl_info
)
12189 virtual Output_data_plt_arm
<big_endian
>*
12190 do_make_data_plt(Layout
* layout
, Output_data_space
* got_plt
)
12191 { return new Output_data_plt_arm_nacl
<big_endian
>(layout
, got_plt
); }
12194 static const Target::Target_info arm_nacl_info
;
12197 template<bool big_endian
>
12198 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
12201 big_endian
, // is_big_endian
12202 elfcpp::EM_ARM
, // machine_code
12203 false, // has_make_symbol
12204 false, // has_resolve
12205 false, // has_code_fill
12206 true, // is_default_stack_executable
12207 false, // can_icf_inline_merge_sections
12209 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12210 0x20000, // default_text_segment_address
12211 0x10000, // abi_pagesize (overridable by -z max-page-size)
12212 0x10000, // common_pagesize (overridable by -z common-page-size)
12213 true, // isolate_execinstr
12214 0x10000000, // rosegment_gap
12215 elfcpp::SHN_UNDEF
, // small_common_shndx
12216 elfcpp::SHN_UNDEF
, // large_common_shndx
12217 0, // small_common_section_flags
12218 0, // large_common_section_flags
12219 ".ARM.attributes", // attributes_section
12220 "aeabi", // attributes_vendor
12221 "_start" // entry_symbol_name
12224 template<bool big_endian
>
12225 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
12228 Output_data_plt_arm_nacl(Layout
* layout
, Output_data_space
* got_plt
)
12229 : Output_data_plt_arm
<big_endian
>(layout
, 16, got_plt
)
12233 // Return the offset of the first non-reserved PLT entry.
12234 virtual unsigned int
12235 do_first_plt_entry_offset() const
12236 { return sizeof(first_plt_entry
); }
12238 // Return the size of a PLT entry.
12239 virtual unsigned int
12240 do_get_plt_entry_size() const
12241 { return sizeof(plt_entry
); }
12244 do_fill_first_plt_entry(unsigned char* pov
,
12245 Arm_address got_address
,
12246 Arm_address plt_address
);
12249 do_fill_plt_entry(unsigned char* pov
,
12250 Arm_address got_address
,
12251 Arm_address plt_address
,
12252 unsigned int got_offset
,
12253 unsigned int plt_offset
);
12256 inline uint32_t arm_movw_immediate(uint32_t value
)
12258 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
12261 inline uint32_t arm_movt_immediate(uint32_t value
)
12263 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
12266 // Template for the first PLT entry.
12267 static const uint32_t first_plt_entry
[16];
12269 // Template for subsequent PLT entries.
12270 static const uint32_t plt_entry
[4];
12273 // The first entry in the PLT.
12274 template<bool big_endian
>
12275 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
12278 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12279 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12280 0xe08cc00f, // add ip, ip, pc
12281 0xe52dc008, // str ip, [sp, #-8]!
12283 0xe3ccc103, // bic ip, ip, #0xc0000000
12284 0xe59cc000, // ldr ip, [ip]
12285 0xe3ccc13f, // bic ip, ip, #0xc000000f
12286 0xe12fff1c, // bx ip
12292 0xe50dc004, // str ip, [sp, #-4]
12294 0xe3ccc103, // bic ip, ip, #0xc0000000
12295 0xe59cc000, // ldr ip, [ip]
12296 0xe3ccc13f, // bic ip, ip, #0xc000000f
12297 0xe12fff1c, // bx ip
12300 template<bool big_endian
>
12302 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
12303 unsigned char* pov
,
12304 Arm_address got_address
,
12305 Arm_address plt_address
)
12307 // Write first PLT entry. All but first two words are constants.
12308 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
12309 / sizeof(first_plt_entry
[0]));
12311 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
12313 elfcpp::Swap
<32, big_endian
>::writeval
12314 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
12315 elfcpp::Swap
<32, big_endian
>::writeval
12316 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
12318 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
12319 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
12322 // Subsequent entries in the PLT.
12324 template<bool big_endian
>
12325 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
12327 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12328 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12329 0xe08cc00f, // add ip, ip, pc
12330 0xea000000, // b .Lplt_tail
12333 template<bool big_endian
>
12335 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
12336 unsigned char* pov
,
12337 Arm_address got_address
,
12338 Arm_address plt_address
,
12339 unsigned int got_offset
,
12340 unsigned int plt_offset
)
12342 // Calculate the displacement between the PLT slot and the
12343 // common tail that's part of the special initial PLT slot.
12344 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
12345 - (plt_address
+ plt_offset
12346 + sizeof(plt_entry
) + sizeof(uint32_t)));
12347 gold_assert((tail_displacement
& 3) == 0);
12348 tail_displacement
>>= 2;
12350 gold_assert ((tail_displacement
& 0xff000000) == 0
12351 || (-tail_displacement
& 0xff000000) == 0);
12353 // Calculate the displacement between the PLT slot and the entry
12354 // in the GOT. The offset accounts for the value produced by
12355 // adding to pc in the penultimate instruction of the PLT stub.
12356 const int32_t got_displacement
= (got_address
+ got_offset
12357 - (plt_address
+ sizeof(plt_entry
)));
12359 elfcpp::Swap
<32, big_endian
>::writeval
12360 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
12361 elfcpp::Swap
<32, big_endian
>::writeval
12362 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
12363 elfcpp::Swap
<32, big_endian
>::writeval
12364 (pov
+ 8, plt_entry
[2]);
12365 elfcpp::Swap
<32, big_endian
>::writeval
12366 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
12369 // Target selectors.
12371 template<bool big_endian
>
12372 class Target_selector_arm_nacl
12373 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
12374 Target_arm_nacl
<big_endian
> >
12377 Target_selector_arm_nacl()
12378 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
12379 Target_arm_nacl
<big_endian
> >(
12381 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12382 big_endian
? "armelfb_nacl" : "armelf_nacl")
12386 Target_selector_arm_nacl
<false> target_selector_arm
;
12387 Target_selector_arm_nacl
<true> target_selector_armbe
;
12389 } // End anonymous namespace.