1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2018 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_short
;
67 template<bool big_endian
>
68 class Output_data_plt_arm_long
;
70 template<bool big_endian
>
73 template<bool big_endian
>
74 class Arm_input_section
;
76 class Arm_exidx_cantunwind
;
78 class Arm_exidx_merged_section
;
80 class Arm_exidx_fixup
;
82 template<bool big_endian
>
83 class Arm_output_section
;
85 class Arm_exidx_input_section
;
87 template<bool big_endian
>
90 template<bool big_endian
>
91 class Arm_relocate_functions
;
93 template<bool big_endian
>
94 class Arm_output_data_got
;
96 template<bool big_endian
>
100 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
102 // Maximum branch offsets for ARM, THUMB and THUMB2.
103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
105 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
106 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
110 // Thread Control Block size.
111 const size_t ARM_TCB_SIZE
= 8;
113 // The arm target class.
115 // This is a very simple port of gold for ARM-EABI. It is intended for
116 // supporting Android only for the time being.
119 // - Implement all static relocation types documented in arm-reloc.def.
120 // - Make PLTs more flexible for different architecture features like
122 // There are probably a lot more.
124 // Ideally we would like to avoid using global variables but this is used
125 // very in many places and sometimes in loops. If we use a function
126 // returning a static instance of Arm_reloc_property_table, it will be very
127 // slow in an threaded environment since the static instance needs to be
128 // locked. The pointer is below initialized in the
129 // Target::do_select_as_default_target() hook so that we do not spend time
130 // building the table if we are not linking ARM objects.
132 // An alternative is to process the information in arm-reloc.def in
133 // compilation time and generate a representation of it in PODs only. That
134 // way we can avoid initialization when the linker starts.
136 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
138 // Instruction template class. This class is similar to the insn_sequence
139 // struct in bfd/elf32-arm.c.
144 // Types of instruction templates.
148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
149 // templates with class-specific semantics. Currently this is used
150 // only by the Cortex_a8_stub class for handling condition codes in
151 // conditional branches.
152 THUMB16_SPECIAL_TYPE
,
158 // Factory methods to create instruction templates in different formats.
160 static const Insn_template
161 thumb16_insn(uint32_t data
)
162 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
164 // A Thumb conditional branch, in which the proper condition is inserted
165 // when we build the stub.
166 static const Insn_template
167 thumb16_bcond_insn(uint32_t data
)
168 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
170 static const Insn_template
171 thumb32_insn(uint32_t data
)
172 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
174 static const Insn_template
175 thumb32_b_insn(uint32_t data
, int reloc_addend
)
177 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
181 static const Insn_template
182 arm_insn(uint32_t data
)
183 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
185 static const Insn_template
186 arm_rel_insn(unsigned data
, int reloc_addend
)
187 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
189 static const Insn_template
190 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
191 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
193 // Accessors. This class is used for read-only objects so no modifiers
198 { return this->data_
; }
200 // Return the instruction sequence type of this.
203 { return this->type_
; }
205 // Return the ARM relocation type of this.
208 { return this->r_type_
; }
212 { return this->reloc_addend_
; }
214 // Return size of instruction template in bytes.
218 // Return byte-alignment of instruction template.
223 // We make the constructor private to ensure that only the factory
226 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
227 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
230 // Instruction specific data. This is used to store information like
231 // some of the instruction bits.
233 // Instruction template type.
235 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
236 unsigned int r_type_
;
237 // Relocation addend.
238 int32_t reloc_addend_
;
241 // Macro for generating code to stub types. One entry per long/short
245 DEF_STUB(long_branch_any_any) \
246 DEF_STUB(long_branch_v4t_arm_thumb) \
247 DEF_STUB(long_branch_thumb_only) \
248 DEF_STUB(long_branch_v4t_thumb_thumb) \
249 DEF_STUB(long_branch_v4t_thumb_arm) \
250 DEF_STUB(short_branch_v4t_thumb_arm) \
251 DEF_STUB(long_branch_any_arm_pic) \
252 DEF_STUB(long_branch_any_thumb_pic) \
253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
256 DEF_STUB(long_branch_thumb_only_pic) \
257 DEF_STUB(a8_veneer_b_cond) \
258 DEF_STUB(a8_veneer_b) \
259 DEF_STUB(a8_veneer_bl) \
260 DEF_STUB(a8_veneer_blx) \
261 DEF_STUB(v4_veneer_bx)
265 #define DEF_STUB(x) arm_stub_##x,
271 // First reloc stub type.
272 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
273 // Last reloc stub type.
274 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
276 // First Cortex-A8 stub type.
277 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
278 // Last Cortex-A8 stub type.
279 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
282 arm_stub_type_last
= arm_stub_v4_veneer_bx
286 // Stub template class. Templates are meant to be read-only objects.
287 // A stub template for a stub type contains all read-only attributes
288 // common to all stubs of the same type.
293 Stub_template(Stub_type
, const Insn_template
*, size_t);
301 { return this->type_
; }
303 // Return an array of instruction templates.
306 { return this->insns_
; }
308 // Return size of template in number of instructions.
311 { return this->insn_count_
; }
313 // Return size of template in bytes.
316 { return this->size_
; }
318 // Return alignment of the stub template.
321 { return this->alignment_
; }
323 // Return whether entry point is in thumb mode.
325 entry_in_thumb_mode() const
326 { return this->entry_in_thumb_mode_
; }
328 // Return number of relocations in this template.
331 { return this->relocs_
.size(); }
333 // Return index of the I-th instruction with relocation.
335 reloc_insn_index(size_t i
) const
337 gold_assert(i
< this->relocs_
.size());
338 return this->relocs_
[i
].first
;
341 // Return the offset of the I-th instruction with relocation from the
342 // beginning of the stub.
344 reloc_offset(size_t i
) const
346 gold_assert(i
< this->relocs_
.size());
347 return this->relocs_
[i
].second
;
351 // This contains information about an instruction template with a relocation
352 // and its offset from start of stub.
353 typedef std::pair
<size_t, section_size_type
> Reloc
;
355 // A Stub_template may not be copied. We want to share templates as much
357 Stub_template(const Stub_template
&);
358 Stub_template
& operator=(const Stub_template
&);
362 // Points to an array of Insn_templates.
363 const Insn_template
* insns_
;
364 // Number of Insn_templates in insns_[].
366 // Size of templated instructions in bytes.
368 // Alignment of templated instructions.
370 // Flag to indicate if entry is in thumb mode.
371 bool entry_in_thumb_mode_
;
372 // A table of reloc instruction indices and offsets. We can find these by
373 // looking at the instruction templates but we pre-compute and then stash
374 // them here for speed.
375 std::vector
<Reloc
> relocs_
;
379 // A class for code stubs. This is a base class for different type of
380 // stubs used in the ARM target.
386 static const section_offset_type invalid_offset
=
387 static_cast<section_offset_type
>(-1);
390 Stub(const Stub_template
* stub_template
)
391 : stub_template_(stub_template
), offset_(invalid_offset
)
398 // Return the stub template.
400 stub_template() const
401 { return this->stub_template_
; }
403 // Return offset of code stub from beginning of its containing stub table.
407 gold_assert(this->offset_
!= invalid_offset
);
408 return this->offset_
;
411 // Set offset of code stub from beginning of its containing stub table.
413 set_offset(section_offset_type offset
)
414 { this->offset_
= offset
; }
416 // Return the relocation target address of the i-th relocation in the
417 // stub. This must be defined in a child class.
419 reloc_target(size_t i
)
420 { return this->do_reloc_target(i
); }
422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
424 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
425 { this->do_write(view
, view_size
, big_endian
); }
427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
428 // for the i-th instruction.
430 thumb16_special(size_t i
)
431 { return this->do_thumb16_special(i
); }
434 // This must be defined in the child class.
436 do_reloc_target(size_t) = 0;
438 // This may be overridden in the child class.
440 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
443 this->do_fixed_endian_write
<true>(view
, view_size
);
445 this->do_fixed_endian_write
<false>(view
, view_size
);
448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
449 // instruction template.
451 do_thumb16_special(size_t)
452 { gold_unreachable(); }
455 // A template to implement do_write.
456 template<bool big_endian
>
458 do_fixed_endian_write(unsigned char*, section_size_type
);
461 const Stub_template
* stub_template_
;
462 // Offset within the section of containing this stub.
463 section_offset_type offset_
;
466 // Reloc stub class. These are stubs we use to fix up relocation because
467 // of limited branch ranges.
469 class Reloc_stub
: public Stub
472 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
473 // We assume we never jump to this address.
474 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
476 // Return destination address.
478 destination_address() const
480 gold_assert(this->destination_address_
!= this->invalid_address
);
481 return this->destination_address_
;
484 // Set destination address.
486 set_destination_address(Arm_address address
)
488 gold_assert(address
!= this->invalid_address
);
489 this->destination_address_
= address
;
492 // Reset destination address.
494 reset_destination_address()
495 { this->destination_address_
= this->invalid_address
; }
497 // Determine stub type for a branch of a relocation of R_TYPE going
498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
499 // the branch target is a thumb instruction. TARGET is used for look
500 // up ARM-specific linker settings.
502 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
503 Arm_address branch_target
, bool target_is_thumb
);
505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
506 // and an addend. Since we treat global and local symbol differently, we
507 // use a Symbol object for a global symbol and a object-index pair for
512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
514 // and R_SYM must not be invalid_index.
515 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
516 unsigned int r_sym
, int32_t addend
)
517 : stub_type_(stub_type
), addend_(addend
)
521 this->r_sym_
= Reloc_stub::invalid_index
;
522 this->u_
.symbol
= symbol
;
526 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
527 this->r_sym_
= r_sym
;
528 this->u_
.relobj
= relobj
;
535 // Accessors: Keys are meant to be read-only object so no modifiers are
541 { return this->stub_type_
; }
543 // Return the local symbol index or invalid_index.
546 { return this->r_sym_
; }
548 // Return the symbol if there is one.
551 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
553 // Return the relobj if there is one.
556 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
558 // Whether this equals to another key k.
560 eq(const Key
& k
) const
562 return ((this->stub_type_
== k
.stub_type_
)
563 && (this->r_sym_
== k
.r_sym_
)
564 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
565 ? (this->u_
.relobj
== k
.u_
.relobj
)
566 : (this->u_
.symbol
== k
.u_
.symbol
))
567 && (this->addend_
== k
.addend_
));
570 // Return a hash value.
574 return (this->stub_type_
576 ^ gold::string_hash
<char>(
577 (this->r_sym_
!= Reloc_stub::invalid_index
)
578 ? this->u_
.relobj
->name().c_str()
579 : this->u_
.symbol
->name())
583 // Functors for STL associative containers.
587 operator()(const Key
& k
) const
588 { return k
.hash_value(); }
594 operator()(const Key
& k1
, const Key
& k2
) const
595 { return k1
.eq(k2
); }
598 // Name of key. This is mainly for debugging.
600 name() const ATTRIBUTE_UNUSED
;
604 Stub_type stub_type_
;
605 // If this is a local symbol, this is the index in the defining object.
606 // Otherwise, it is invalid_index for a global symbol.
608 // If r_sym_ is an invalid index, this points to a global symbol.
609 // Otherwise, it points to a relobj. We used the unsized and target
610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
611 // Arm_relobj, in order to avoid making the stub class a template
612 // as most of the stub machinery is endianness-neutral. However, it
613 // may require a bit of casting done by users of this class.
616 const Symbol
* symbol
;
617 const Relobj
* relobj
;
619 // Addend associated with a reloc.
624 // Reloc_stubs are created via a stub factory. So these are protected.
625 Reloc_stub(const Stub_template
* stub_template
)
626 : Stub(stub_template
), destination_address_(invalid_address
)
632 friend class Stub_factory
;
634 // Return the relocation target address of the i-th relocation in the
637 do_reloc_target(size_t i
)
639 // All reloc stub have only one relocation.
641 return this->destination_address_
;
645 // Address of destination.
646 Arm_address destination_address_
;
649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
650 // THUMB branch that meets the following conditions:
652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
653 // branch address is 0xffe.
654 // 2. The branch target address is in the same page as the first word of the
656 // 3. The branch follows a 32-bit instruction which is not a branch.
658 // To do the fix up, we need to store the address of the branch instruction
659 // and its target at least. We also need to store the original branch
660 // instruction bits for the condition code in a conditional branch. The
661 // condition code is used in a special instruction template. We also want
662 // to identify input sections needing Cortex-A8 workaround quickly. We store
663 // extra information about object and section index of the code section
664 // containing a branch being fixed up. The information is used to mark
665 // the code section when we finalize the Cortex-A8 stubs.
668 class Cortex_a8_stub
: public Stub
674 // Return the object of the code section containing the branch being fixed
678 { return this->relobj_
; }
680 // Return the section index of the code section containing the branch being
684 { return this->shndx_
; }
686 // Return the source address of stub. This is the address of the original
687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
690 source_address() const
691 { return this->source_address_
; }
693 // Return the destination address of the stub. This is the branch taken
694 // address of the original branch instruction. LSB is 1 if it is a THUMB
695 // instruction address.
697 destination_address() const
698 { return this->destination_address_
; }
700 // Return the instruction being fixed up.
702 original_insn() const
703 { return this->original_insn_
; }
706 // Cortex_a8_stubs are created via a stub factory. So these are protected.
707 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
708 unsigned int shndx
, Arm_address source_address
,
709 Arm_address destination_address
, uint32_t original_insn
)
710 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
711 source_address_(source_address
| 1U),
712 destination_address_(destination_address
),
713 original_insn_(original_insn
)
716 friend class Stub_factory
;
718 // Return the relocation target address of the i-th relocation in the
721 do_reloc_target(size_t i
)
723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
725 // The conditional branch veneer has two relocations.
727 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
731 // All other Cortex-A8 stubs have only one relocation.
733 return this->destination_address_
;
737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
739 do_thumb16_special(size_t);
742 // Object of the code section containing the branch being fixed up.
744 // Section index of the code section containing the branch begin fixed up.
746 // Source address of original branch.
747 Arm_address source_address_
;
748 // Destination address of the original branch.
749 Arm_address destination_address_
;
750 // Original branch instruction. This is needed for copying the condition
751 // code from a condition branch to its stub.
752 uint32_t original_insn_
;
755 // ARMv4 BX Rx branch relocation stub class.
756 class Arm_v4bx_stub
: public Stub
762 // Return the associated register.
765 { return this->reg_
; }
768 // Arm V4BX stubs are created via a stub factory. So these are protected.
769 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
770 : Stub(stub_template
), reg_(reg
)
773 friend class Stub_factory
;
775 // Return the relocation target address of the i-th relocation in the
778 do_reloc_target(size_t)
779 { gold_unreachable(); }
781 // This may be overridden in the child class.
783 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
786 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
788 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
792 // A template to implement do_write.
793 template<bool big_endian
>
795 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
797 const Insn_template
* insns
= this->stub_template()->insns();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 + (this->reg_
<< 16)));
801 view
+= insns
[0].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[1].data() + this->reg_
));
804 view
+= insns
[1].size();
805 elfcpp::Swap
<32, big_endian
>::writeval(view
,
806 (insns
[2].data() + this->reg_
));
809 // A register index (r0-r14), which is associated with the stub.
813 // Stub factory class.
818 // Return the unique instance of this class.
819 static const Stub_factory
&
822 static Stub_factory singleton
;
826 // Make a relocation stub.
828 make_reloc_stub(Stub_type stub_type
) const
830 gold_assert(stub_type
>= arm_stub_reloc_first
831 && stub_type
<= arm_stub_reloc_last
);
832 return new Reloc_stub(this->stub_templates_
[stub_type
]);
835 // Make a Cortex-A8 stub.
837 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
838 Arm_address source
, Arm_address destination
,
839 uint32_t original_insn
) const
841 gold_assert(stub_type
>= arm_stub_cortex_a8_first
842 && stub_type
<= arm_stub_cortex_a8_last
);
843 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
844 source
, destination
, original_insn
);
847 // Make an ARM V4BX relocation stub.
848 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
850 make_arm_v4bx_stub(uint32_t reg
) const
852 gold_assert(reg
< 0xf);
853 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
858 // Constructor and destructor are protected since we only return a single
859 // instance created in Stub_factory::get_instance().
863 // A Stub_factory may not be copied since it is a singleton.
864 Stub_factory(const Stub_factory
&);
865 Stub_factory
& operator=(Stub_factory
&);
867 // Stub templates. These are initialized in the constructor.
868 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
871 // A class to hold stubs for the ARM target.
873 template<bool big_endian
>
874 class Stub_table
: public Output_data
877 Stub_table(Arm_input_section
<big_endian
>* owner
)
878 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
880 prev_data_size_(0), prev_addralign_(1)
886 // Owner of this stub table.
887 Arm_input_section
<big_endian
>*
889 { return this->owner_
; }
891 // Whether this stub table is empty.
895 return (this->reloc_stubs_
.empty()
896 && this->cortex_a8_stubs_
.empty()
897 && this->arm_v4bx_stubs_
.empty());
900 // Return the current data size.
902 current_data_size() const
903 { return this->current_data_size_for_child(); }
905 // Add a STUB using KEY. The caller is responsible for avoiding addition
906 // if a STUB with the same key has already been added.
908 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
910 const Stub_template
* stub_template
= stub
->stub_template();
911 gold_assert(stub_template
->type() == key
.stub_type());
912 this->reloc_stubs_
[key
] = stub
;
914 // Assign stub offset early. We can do this because we never remove
915 // reloc stubs and they are in the beginning of the stub table.
916 uint64_t align
= stub_template
->alignment();
917 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
918 stub
->set_offset(this->reloc_stubs_size_
);
919 this->reloc_stubs_size_
+= stub_template
->size();
920 this->reloc_stubs_addralign_
=
921 std::max(this->reloc_stubs_addralign_
, align
);
924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
925 // The caller is responsible for avoiding addition if a STUB with the same
926 // address has already been added.
928 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
930 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
931 this->cortex_a8_stubs_
.insert(value
);
934 // Add an ARM V4BX relocation stub. A register index will be retrieved
937 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
939 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
940 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
943 // Remove all Cortex-A8 stubs.
945 remove_all_cortex_a8_stubs();
947 // Look up a relocation stub using KEY. Return NULL if there is none.
949 find_reloc_stub(const Reloc_stub::Key
& key
) const
951 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
952 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
955 // Look up an arm v4bx relocation stub using the register index.
956 // Return NULL if there is none.
958 find_arm_v4bx_stub(const uint32_t reg
) const
960 gold_assert(reg
< 0xf);
961 return this->arm_v4bx_stubs_
[reg
];
964 // Relocate stubs in this stub table.
966 relocate_stubs(const Relocate_info
<32, big_endian
>*,
967 Target_arm
<big_endian
>*, Output_section
*,
968 unsigned char*, Arm_address
, section_size_type
);
970 // Update data size and alignment at the end of a relaxation pass. Return
971 // true if either data size or alignment is different from that of the
972 // previous relaxation pass.
974 update_data_size_and_addralign();
976 // Finalize stubs. Set the offsets of all stubs and mark input sections
977 // needing the Cortex-A8 workaround.
981 // Apply Cortex-A8 workaround to an address range.
983 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
984 unsigned char*, Arm_address
,
988 // Write out section contents.
990 do_write(Output_file
*);
992 // Return the required alignment.
995 { return this->prev_addralign_
; }
997 // Reset address and file offset.
999 do_reset_address_and_file_offset()
1000 { this->set_current_data_size_for_child(this->prev_data_size_
); }
1002 // Set final data size.
1004 set_final_data_size()
1005 { this->set_data_size(this->current_data_size()); }
1008 // Relocate one stub.
1010 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1011 Target_arm
<big_endian
>*, Output_section
*,
1012 unsigned char*, Arm_address
, section_size_type
);
1014 // Unordered map of relocation stubs.
1016 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1017 Reloc_stub::Key::equal_to
>
1020 // List of Cortex-A8 stubs ordered by addresses of branches being
1021 // fixed up in output.
1022 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1023 // List of Arm V4BX relocation stubs ordered by associated registers.
1024 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1026 // Owner of this stub table.
1027 Arm_input_section
<big_endian
>* owner_
;
1028 // The relocation stubs.
1029 Reloc_stub_map reloc_stubs_
;
1030 // Size of reloc stubs.
1031 off_t reloc_stubs_size_
;
1032 // Maximum address alignment of reloc stubs.
1033 uint64_t reloc_stubs_addralign_
;
1034 // The cortex_a8_stubs.
1035 Cortex_a8_stub_list cortex_a8_stubs_
;
1036 // The Arm V4BX relocation stubs.
1037 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1038 // data size of this in the previous pass.
1039 off_t prev_data_size_
;
1040 // address alignment of this in the previous pass.
1041 uint64_t prev_addralign_
;
1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1045 // we add to the end of an EXIDX input section that goes into the output.
1047 class Arm_exidx_cantunwind
: public Output_section_data
1050 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1051 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1054 // Return the object containing the section pointed by this.
1057 { return this->relobj_
; }
1059 // Return the section index of the section pointed by this.
1062 { return this->shndx_
; }
1066 do_write(Output_file
* of
)
1068 if (parameters
->target().is_big_endian())
1069 this->do_fixed_endian_write
<true>(of
);
1071 this->do_fixed_endian_write
<false>(of
);
1074 // Write to a map file.
1076 do_print_to_mapfile(Mapfile
* mapfile
) const
1077 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1080 // Implement do_write for a given endianness.
1081 template<bool big_endian
>
1083 do_fixed_endian_write(Output_file
*);
1085 // The object containing the section pointed by this.
1087 // The section index of the section pointed by this.
1088 unsigned int shndx_
;
1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1092 // Offset map is used to map input section offset within the EXIDX section
1093 // to the output offset from the start of this EXIDX section.
1095 typedef std::map
<section_offset_type
, section_offset_type
>
1096 Arm_exidx_section_offset_map
;
1098 // Arm_exidx_merged_section class. This represents an EXIDX input section
1099 // with some of its entries merged.
1101 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1104 // Constructor for Arm_exidx_merged_section.
1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1106 // SECTION_OFFSET_MAP points to a section offset map describing how
1107 // parts of the input section are mapped to output. DELETED_BYTES is
1108 // the number of bytes deleted from the EXIDX input section.
1109 Arm_exidx_merged_section(
1110 const Arm_exidx_input_section
& exidx_input_section
,
1111 const Arm_exidx_section_offset_map
& section_offset_map
,
1112 uint32_t deleted_bytes
);
1114 // Build output contents.
1116 build_contents(const unsigned char*, section_size_type
);
1118 // Return the original EXIDX input section.
1119 const Arm_exidx_input_section
&
1120 exidx_input_section() const
1121 { return this->exidx_input_section_
; }
1123 // Return the section offset map.
1124 const Arm_exidx_section_offset_map
&
1125 section_offset_map() const
1126 { return this->section_offset_map_
; }
1129 // Write merged section into file OF.
1131 do_write(Output_file
* of
);
1134 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1135 section_offset_type
*) const;
1138 // Original EXIDX input section.
1139 const Arm_exidx_input_section
& exidx_input_section_
;
1140 // Section offset map.
1141 const Arm_exidx_section_offset_map
& section_offset_map_
;
1142 // Merged section contents. We need to keep build the merged section
1143 // and save it here to avoid accessing the original EXIDX section when
1144 // we cannot lock the sections' object.
1145 unsigned char* section_contents_
;
1148 // A class to wrap an ordinary input section containing executable code.
1150 template<bool big_endian
>
1151 class Arm_input_section
: public Output_relaxed_input_section
1154 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1155 : Output_relaxed_input_section(relobj
, shndx
, 1),
1156 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1157 original_contents_(NULL
)
1160 ~Arm_input_section()
1161 { delete[] this->original_contents_
; }
1167 // Whether this is a stub table owner.
1169 is_stub_table_owner() const
1170 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1172 // Return the stub table.
1173 Stub_table
<big_endian
>*
1175 { return this->stub_table_
; }
1177 // Set the stub_table.
1179 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1180 { this->stub_table_
= stub_table
; }
1182 // Downcast a base pointer to an Arm_input_section pointer. This is
1183 // not type-safe but we only use Arm_input_section not the base class.
1184 static Arm_input_section
<big_endian
>*
1185 as_arm_input_section(Output_relaxed_input_section
* poris
)
1186 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1188 // Return the original size of the section.
1190 original_size() const
1191 { return this->original_size_
; }
1194 // Write data to output file.
1196 do_write(Output_file
*);
1198 // Return required alignment of this.
1200 do_addralign() const
1202 if (this->is_stub_table_owner())
1203 return std::max(this->stub_table_
->addralign(),
1204 static_cast<uint64_t>(this->original_addralign_
));
1206 return this->original_addralign_
;
1209 // Finalize data size.
1211 set_final_data_size();
1213 // Reset address and file offset.
1215 do_reset_address_and_file_offset();
1219 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1220 section_offset_type offset
,
1221 section_offset_type
* poutput
) const
1223 if ((object
== this->relobj())
1224 && (shndx
== this->shndx())
1227 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1237 // Copying is not allowed.
1238 Arm_input_section(const Arm_input_section
&);
1239 Arm_input_section
& operator=(const Arm_input_section
&);
1241 // Address alignment of the original input section.
1242 uint32_t original_addralign_
;
1243 // Section size of the original input section.
1244 uint32_t original_size_
;
1246 Stub_table
<big_endian
>* stub_table_
;
1247 // Original section contents. We have to make a copy here since the file
1248 // containing the original section may not be locked when we need to access
1250 unsigned char* original_contents_
;
1253 // Arm_exidx_fixup class. This is used to define a number of methods
1254 // and keep states for fixing up EXIDX coverage.
1256 class Arm_exidx_fixup
1259 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1260 bool merge_exidx_entries
= true)
1261 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1262 last_inlined_entry_(0), last_input_section_(NULL
),
1263 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1264 merge_exidx_entries_(merge_exidx_entries
)
1268 { delete this->section_offset_map_
; }
1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1272 // number of bytes to be deleted in output. If parts of the input EXIDX
1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1275 // responsible for releasing it.
1276 template<bool big_endian
>
1278 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1279 const unsigned char* section_contents
,
1280 section_size_type section_size
,
1281 Arm_exidx_section_offset_map
** psection_offset_map
);
1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1284 // input section, if there is not one already.
1286 add_exidx_cantunwind_as_needed();
1288 // Return the output section for the text section which is linked to the
1289 // first exidx input in output.
1291 first_output_text_section() const
1292 { return this->first_output_text_section_
; }
1295 // Copying is not allowed.
1296 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1297 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1299 // Type of EXIDX unwind entry.
1304 // EXIDX_CANTUNWIND.
1305 UT_EXIDX_CANTUNWIND
,
1312 // Process an EXIDX entry. We only care about the second word of the
1313 // entry. Return true if the entry can be deleted.
1315 process_exidx_entry(uint32_t second_word
);
1317 // Update the current section offset map during EXIDX section fix-up.
1318 // If there is no map, create one. INPUT_OFFSET is the offset of a
1319 // reference point, DELETED_BYTES is the number of deleted by in the
1320 // section so far. If DELETE_ENTRY is true, the reference point and
1321 // all offsets after the previous reference point are discarded.
1323 update_offset_map(section_offset_type input_offset
,
1324 section_size_type deleted_bytes
, bool delete_entry
);
1326 // EXIDX output section.
1327 Output_section
* exidx_output_section_
;
1328 // Unwind type of the last EXIDX entry processed.
1329 Unwind_type last_unwind_type_
;
1330 // Last seen inlined EXIDX entry.
1331 uint32_t last_inlined_entry_
;
1332 // Last processed EXIDX input section.
1333 const Arm_exidx_input_section
* last_input_section_
;
1334 // Section offset map created in process_exidx_section.
1335 Arm_exidx_section_offset_map
* section_offset_map_
;
1336 // Output section for the text section which is linked to the first exidx
1338 Output_section
* first_output_text_section_
;
1340 bool merge_exidx_entries_
;
1343 // Arm output section class. This is defined mainly to add a number of
1344 // stub generation methods.
1346 template<bool big_endian
>
1347 class Arm_output_section
: public Output_section
1350 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1353 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1354 elfcpp::Elf_Xword flags
)
1355 : Output_section(name
, type
,
1356 (type
== elfcpp::SHT_ARM_EXIDX
1357 ? flags
| elfcpp::SHF_LINK_ORDER
1360 if (type
== elfcpp::SHT_ARM_EXIDX
)
1361 this->set_always_keeps_input_sections();
1364 ~Arm_output_section()
1367 // Group input sections for stub generation.
1369 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1371 // Downcast a base pointer to an Arm_output_section pointer. This is
1372 // not type-safe but we only use Arm_output_section not the base class.
1373 static Arm_output_section
<big_endian
>*
1374 as_arm_output_section(Output_section
* os
)
1375 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1377 // Append all input text sections in this into LIST.
1379 append_text_sections_to_list(Text_section_list
* list
);
1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1382 // is a list of text input sections sorted in ascending order of their
1383 // output addresses.
1385 fix_exidx_coverage(Layout
* layout
,
1386 const Text_section_list
& sorted_text_section
,
1387 Symbol_table
* symtab
,
1388 bool merge_exidx_entries
,
1391 // Link an EXIDX section into its corresponding text section.
1393 set_exidx_section_link();
1397 typedef Output_section::Input_section Input_section
;
1398 typedef Output_section::Input_section_list Input_section_list
;
1400 // Create a stub group.
1401 void create_stub_group(Input_section_list::const_iterator
,
1402 Input_section_list::const_iterator
,
1403 Input_section_list::const_iterator
,
1404 Target_arm
<big_endian
>*,
1405 std::vector
<Output_relaxed_input_section
*>*,
1409 // Arm_exidx_input_section class. This represents an EXIDX input section.
1411 class Arm_exidx_input_section
1414 static const section_offset_type invalid_offset
=
1415 static_cast<section_offset_type
>(-1);
1417 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1418 unsigned int link
, uint32_t size
,
1419 uint32_t addralign
, uint32_t text_size
)
1420 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1421 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1424 ~Arm_exidx_input_section()
1427 // Accessors: This is a read-only class.
1429 // Return the object containing this EXIDX input section.
1432 { return this->relobj_
; }
1434 // Return the section index of this EXIDX input section.
1437 { return this->shndx_
; }
1439 // Return the section index of linked text section in the same object.
1442 { return this->link_
; }
1444 // Return size of the EXIDX input section.
1447 { return this->size_
; }
1449 // Return address alignment of EXIDX input section.
1452 { return this->addralign_
; }
1454 // Return size of the associated text input section.
1457 { return this->text_size_
; }
1459 // Whether there are any errors in the EXIDX input section.
1462 { return this->has_errors_
; }
1464 // Set has-errors flag.
1467 { this->has_errors_
= true; }
1470 // Object containing this.
1472 // Section index of this.
1473 unsigned int shndx_
;
1474 // text section linked to this in the same object.
1476 // Size of this. For ARM 32-bit is sufficient.
1478 // Address alignment of this. For ARM 32-bit is sufficient.
1479 uint32_t addralign_
;
1480 // Size of associated text section.
1481 uint32_t text_size_
;
1482 // Whether this has any errors.
1486 // Arm_relobj class.
1488 template<bool big_endian
>
1489 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1492 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1494 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1495 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1496 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1497 stub_tables_(), local_symbol_is_thumb_function_(),
1498 attributes_section_data_(NULL
), mapping_symbols_info_(),
1499 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1500 output_local_symbol_count_needs_update_(false),
1501 merge_flags_and_attributes_(true)
1505 { delete this->attributes_section_data_
; }
1507 // Return the stub table of the SHNDX-th section if there is one.
1508 Stub_table
<big_endian
>*
1509 stub_table(unsigned int shndx
) const
1511 gold_assert(shndx
< this->stub_tables_
.size());
1512 return this->stub_tables_
[shndx
];
1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1517 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1519 gold_assert(shndx
< this->stub_tables_
.size());
1520 this->stub_tables_
[shndx
] = stub_table
;
1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1524 // index. This is only valid after do_count_local_symbol is called.
1526 local_symbol_is_thumb_function(unsigned int r_sym
) const
1528 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1529 return this->local_symbol_is_thumb_function_
[r_sym
];
1532 // Scan all relocation sections for stub generation.
1534 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1537 // Convert regular input section with index SHNDX to a relaxed section.
1539 convert_input_section_to_relaxed_section(unsigned shndx
)
1541 // The stubs have relocations and we need to process them after writing
1542 // out the stubs. So relocation now must follow section write.
1543 this->set_section_offset(shndx
, -1ULL);
1544 this->set_relocs_must_follow_section_writes();
1547 // Downcast a base pointer to an Arm_relobj pointer. This is
1548 // not type-safe but we only use Arm_relobj not the base class.
1549 static Arm_relobj
<big_endian
>*
1550 as_arm_relobj(Relobj
* relobj
)
1551 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1553 // Processor-specific flags in ELF file header. This is valid only after
1556 processor_specific_flags() const
1557 { return this->processor_specific_flags_
; }
1559 // Attribute section data This is the contents of the .ARM.attribute section
1561 const Attributes_section_data
*
1562 attributes_section_data() const
1563 { return this->attributes_section_data_
; }
1565 // Mapping symbol location.
1566 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1568 // Functor for STL container.
1569 struct Mapping_symbol_position_less
1572 operator()(const Mapping_symbol_position
& p1
,
1573 const Mapping_symbol_position
& p2
) const
1575 return (p1
.first
< p2
.first
1576 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1580 // We only care about the first character of a mapping symbol, so
1581 // we only store that instead of the whole symbol name.
1582 typedef std::map
<Mapping_symbol_position
, char,
1583 Mapping_symbol_position_less
> Mapping_symbols_info
;
1585 // Whether a section contains any Cortex-A8 workaround.
1587 section_has_cortex_a8_workaround(unsigned int shndx
) const
1589 return (this->section_has_cortex_a8_workaround_
!= NULL
1590 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1593 // Mark a section that has Cortex-A8 workaround.
1595 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1597 if (this->section_has_cortex_a8_workaround_
== NULL
)
1598 this->section_has_cortex_a8_workaround_
=
1599 new std::vector
<bool>(this->shnum(), false);
1600 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1603 // Return the EXIDX section of an text section with index SHNDX or NULL
1604 // if the text section has no associated EXIDX section.
1605 const Arm_exidx_input_section
*
1606 exidx_input_section_by_link(unsigned int shndx
) const
1608 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1609 return ((p
!= this->exidx_section_map_
.end()
1610 && p
->second
->link() == shndx
)
1615 // Return the EXIDX section with index SHNDX or NULL if there is none.
1616 const Arm_exidx_input_section
*
1617 exidx_input_section_by_shndx(unsigned shndx
) const
1619 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1620 return ((p
!= this->exidx_section_map_
.end()
1621 && p
->second
->shndx() == shndx
)
1626 // Whether output local symbol count needs updating.
1628 output_local_symbol_count_needs_update() const
1629 { return this->output_local_symbol_count_needs_update_
; }
1631 // Set output_local_symbol_count_needs_update flag to be true.
1633 set_output_local_symbol_count_needs_update()
1634 { this->output_local_symbol_count_needs_update_
= true; }
1636 // Update output local symbol count at the end of relaxation.
1638 update_output_local_symbol_count();
1640 // Whether we want to merge processor-specific flags and attributes.
1642 merge_flags_and_attributes() const
1643 { return this->merge_flags_and_attributes_
; }
1645 // Export list of EXIDX section indices.
1647 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1650 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1651 p
!= this->exidx_section_map_
.end();
1654 if (p
->second
->shndx() == p
->first
)
1655 list
->push_back(p
->first
);
1657 // Sort list to make result independent of implementation of map.
1658 std::sort(list
->begin(), list
->end());
1662 // Post constructor setup.
1666 // Call parent's setup method.
1667 Sized_relobj_file
<32, big_endian
>::do_setup();
1669 // Initialize look-up tables.
1670 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1671 this->stub_tables_
.swap(empty_stub_table_list
);
1674 // Count the local symbols.
1676 do_count_local_symbols(Stringpool_template
<char>*,
1677 Stringpool_template
<char>*);
1680 do_relocate_sections(
1681 const Symbol_table
* symtab
, const Layout
* layout
,
1682 const unsigned char* pshdrs
, Output_file
* of
,
1683 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1685 // Read the symbol information.
1687 do_read_symbols(Read_symbols_data
* sd
);
1689 // Process relocs for garbage collection.
1691 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1695 // Whether a section needs to be scanned for relocation stubs.
1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1698 const Relobj::Output_sections
&,
1699 const Symbol_table
*, const unsigned char*);
1701 // Whether a section is a scannable text section.
1703 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1704 const Output_section
*, const Symbol_table
*);
1706 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1709 unsigned int, Output_section
*,
1710 const Symbol_table
*);
1712 // Scan a section for the Cortex-A8 erratum.
1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1715 unsigned int, Output_section
*,
1716 Target_arm
<big_endian
>*);
1718 // Find the linked text section of an EXIDX section by looking at the
1719 // first relocation of the EXIDX section. PSHDR points to the section
1720 // headers of a relocation section and PSYMS points to the local symbols.
1721 // PSHNDX points to a location storing the text section index if found.
1722 // Return whether we can find the linked section.
1724 find_linked_text_section(const unsigned char* pshdr
,
1725 const unsigned char* psyms
, unsigned int* pshndx
);
1728 // Make a new Arm_exidx_input_section object for EXIDX section with
1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1730 // index of the linked text section.
1732 make_exidx_input_section(unsigned int shndx
,
1733 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1734 unsigned int text_shndx
,
1735 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1737 // Return the output address of either a plain input section or a
1738 // relaxed input section. SHNDX is the section index.
1740 simple_input_section_output_address(unsigned int, Output_section
*);
1742 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1743 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1746 // List of stub tables.
1747 Stub_table_list stub_tables_
;
1748 // Bit vector to tell if a local symbol is a thumb function or not.
1749 // This is only valid after do_count_local_symbol is called.
1750 std::vector
<bool> local_symbol_is_thumb_function_
;
1751 // processor-specific flags in ELF file header.
1752 elfcpp::Elf_Word processor_specific_flags_
;
1753 // Object attributes if there is an .ARM.attributes section or NULL.
1754 Attributes_section_data
* attributes_section_data_
;
1755 // Mapping symbols information.
1756 Mapping_symbols_info mapping_symbols_info_
;
1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1758 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1759 // Map a text section to its associated .ARM.exidx section, if there is one.
1760 Exidx_section_map exidx_section_map_
;
1761 // Whether output local symbol count needs updating.
1762 bool output_local_symbol_count_needs_update_
;
1763 // Whether we merge processor flags and attributes of this object to
1765 bool merge_flags_and_attributes_
;
1768 // Arm_dynobj class.
1770 template<bool big_endian
>
1771 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1774 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1775 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1776 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1777 processor_specific_flags_(0), attributes_section_data_(NULL
)
1781 { delete this->attributes_section_data_
; }
1783 // Downcast a base pointer to an Arm_relobj pointer. This is
1784 // not type-safe but we only use Arm_relobj not the base class.
1785 static Arm_dynobj
<big_endian
>*
1786 as_arm_dynobj(Dynobj
* dynobj
)
1787 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1789 // Processor-specific flags in ELF file header. This is valid only after
1792 processor_specific_flags() const
1793 { return this->processor_specific_flags_
; }
1795 // Attributes section data.
1796 const Attributes_section_data
*
1797 attributes_section_data() const
1798 { return this->attributes_section_data_
; }
1801 // Read the symbol information.
1803 do_read_symbols(Read_symbols_data
* sd
);
1806 // processor-specific flags in ELF file header.
1807 elfcpp::Elf_Word processor_specific_flags_
;
1808 // Object attributes if there is an .ARM.attributes section or NULL.
1809 Attributes_section_data
* attributes_section_data_
;
1812 // Functor to read reloc addends during stub generation.
1814 template<int sh_type
, bool big_endian
>
1815 struct Stub_addend_reader
1817 // Return the addend for a relocation of a particular type. Depending
1818 // on whether this is a REL or RELA relocation, read the addend from a
1819 // view or from a Reloc object.
1820 elfcpp::Elf_types
<32>::Elf_Swxword
1822 unsigned int /* r_type */,
1823 const unsigned char* /* view */,
1824 const typename Reloc_types
<sh_type
,
1825 32, big_endian
>::Reloc
& /* reloc */) const;
1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1830 template<bool big_endian
>
1831 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1833 elfcpp::Elf_types
<32>::Elf_Swxword
1836 const unsigned char*,
1837 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1840 // Specialized Stub_addend_reader for RELA type relocation sections.
1841 // We currently do not handle RELA type relocation sections but it is trivial
1842 // to implement the addend reader. This is provided for completeness and to
1843 // make it easier to add support for RELA relocation sections in the future.
1845 template<bool big_endian
>
1846 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1848 elfcpp::Elf_types
<32>::Elf_Swxword
1851 const unsigned char*,
1852 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1853 big_endian
>::Reloc
& reloc
) const
1854 { return reloc
.get_r_addend(); }
1857 // Cortex_a8_reloc class. We keep record of relocation that may need
1858 // the Cortex-A8 erratum workaround.
1860 class Cortex_a8_reloc
1863 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1864 Arm_address destination
)
1865 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1871 // Accessors: This is a read-only class.
1873 // Return the relocation stub associated with this relocation if there is
1877 { return this->reloc_stub_
; }
1879 // Return the relocation type.
1882 { return this->r_type_
; }
1884 // Return the destination address of the relocation. LSB stores the THUMB
1888 { return this->destination_
; }
1891 // Associated relocation stub if there is one, or NULL.
1892 const Reloc_stub
* reloc_stub_
;
1894 unsigned int r_type_
;
1895 // Destination address of this relocation. LSB is used to distinguish
1897 Arm_address destination_
;
1900 // Arm_output_data_got class. We derive this from Output_data_got to add
1901 // extra methods to handle TLS relocations in a static link.
1903 template<bool big_endian
>
1904 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1907 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1908 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1913 // applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1916 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1920 // relocation that needs to be applied in a static link.
1922 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1923 Sized_relobj_file
<32, big_endian
>* relobj
,
1926 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1931 // The first one is initialized to be 1, which is the module index for
1932 // the main executable and the second one 0. A reloc of the type
1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1934 // be applied by gold. GSYM is a global symbol.
1936 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1938 // Same as the above but for a local symbol in OBJECT with INDEX.
1940 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1941 Sized_relobj_file
<32, big_endian
>* object
,
1942 unsigned int index
);
1945 // Write out the GOT table.
1947 do_write(Output_file
*);
1950 // This class represent dynamic relocations that need to be applied by
1951 // gold because we are using TLS relocations in a static link.
1955 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1956 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1957 { this->u_
.global
.symbol
= gsym
; }
1959 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1960 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1961 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1963 this->u_
.local
.relobj
= relobj
;
1964 this->u_
.local
.index
= index
;
1967 // Return the GOT offset.
1970 { return this->got_offset_
; }
1975 { return this->r_type_
; }
1977 // Whether the symbol is global or not.
1979 symbol_is_global() const
1980 { return this->symbol_is_global_
; }
1982 // For a relocation against a global symbol, the global symbol.
1986 gold_assert(this->symbol_is_global_
);
1987 return this->u_
.global
.symbol
;
1990 // For a relocation against a local symbol, the defining object.
1991 Sized_relobj_file
<32, big_endian
>*
1994 gold_assert(!this->symbol_is_global_
);
1995 return this->u_
.local
.relobj
;
1998 // For a relocation against a local symbol, the local symbol index.
2002 gold_assert(!this->symbol_is_global_
);
2003 return this->u_
.local
.index
;
2007 // GOT offset of the entry to which this relocation is applied.
2008 unsigned int got_offset_
;
2009 // Type of relocation.
2010 unsigned int r_type_
;
2011 // Whether this relocation is against a global symbol.
2012 bool symbol_is_global_
;
2013 // A global or local symbol.
2018 // For a global symbol, the symbol itself.
2023 // For a local symbol, the object defining object.
2024 Sized_relobj_file
<32, big_endian
>* relobj
;
2025 // For a local symbol, the symbol index.
2031 // Symbol table of the output object.
2032 Symbol_table
* symbol_table_
;
2033 // Layout of the output object.
2035 // Static relocs to be applied to the GOT.
2036 std::vector
<Static_reloc
> static_relocs_
;
2039 // The ARM target has many relocation types with odd-sizes or noncontiguous
2040 // bits. The default handling of relocatable relocation cannot process these
2041 // relocations. So we have to extend the default code.
2043 template<bool big_endian
, typename Classify_reloc
>
2044 class Arm_scan_relocatable_relocs
:
2045 public Default_scan_relocatable_relocs
<Classify_reloc
>
2048 // Return the strategy to use for a local symbol which is a section
2049 // symbol, given the relocation type.
2050 inline Relocatable_relocs::Reloc_strategy
2051 local_section_strategy(unsigned int r_type
, Relobj
*)
2053 if (Classify_reloc::sh_type
== elfcpp::SHT_RELA
)
2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2057 if (r_type
== elfcpp::R_ARM_TARGET1
2058 || r_type
== elfcpp::R_ARM_TARGET2
)
2060 const Target_arm
<big_endian
>* arm_target
=
2061 Target_arm
<big_endian
>::default_target();
2062 r_type
= arm_target
->get_real_reloc_type(r_type
);
2067 // Relocations that write nothing. These exclude R_ARM_TARGET1
2068 // and R_ARM_TARGET2.
2069 case elfcpp::R_ARM_NONE
:
2070 case elfcpp::R_ARM_V4BX
:
2071 case elfcpp::R_ARM_TLS_GOTDESC
:
2072 case elfcpp::R_ARM_TLS_CALL
:
2073 case elfcpp::R_ARM_TLS_DESCSEQ
:
2074 case elfcpp::R_ARM_THM_TLS_CALL
:
2075 case elfcpp::R_ARM_GOTRELAX
:
2076 case elfcpp::R_ARM_GNU_VTENTRY
:
2077 case elfcpp::R_ARM_GNU_VTINHERIT
:
2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2081 // These should have been converted to something else above.
2082 case elfcpp::R_ARM_TARGET1
:
2083 case elfcpp::R_ARM_TARGET2
:
2085 // Relocations that write full 32 bits and
2086 // have alignment of 1.
2087 case elfcpp::R_ARM_ABS32
:
2088 case elfcpp::R_ARM_REL32
:
2089 case elfcpp::R_ARM_SBREL32
:
2090 case elfcpp::R_ARM_GOTOFF32
:
2091 case elfcpp::R_ARM_BASE_PREL
:
2092 case elfcpp::R_ARM_GOT_BREL
:
2093 case elfcpp::R_ARM_BASE_ABS
:
2094 case elfcpp::R_ARM_ABS32_NOI
:
2095 case elfcpp::R_ARM_REL32_NOI
:
2096 case elfcpp::R_ARM_PLT32_ABS
:
2097 case elfcpp::R_ARM_GOT_ABS
:
2098 case elfcpp::R_ARM_GOT_PREL
:
2099 case elfcpp::R_ARM_TLS_GD32
:
2100 case elfcpp::R_ARM_TLS_LDM32
:
2101 case elfcpp::R_ARM_TLS_LDO32
:
2102 case elfcpp::R_ARM_TLS_IE32
:
2103 case elfcpp::R_ARM_TLS_LE32
:
2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2106 // For all other static relocations, return RELOC_SPECIAL.
2107 return Relocatable_relocs::RELOC_SPECIAL
;
2113 template<bool big_endian
>
2114 class Target_arm
: public Sized_target
<32, big_endian
>
2117 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2120 // When were are relocating a stub, we pass this as the relocation number.
2121 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2123 Target_arm(const Target::Target_info
* info
= &arm_info
)
2124 : Sized_target
<32, big_endian
>(info
),
2125 got_(NULL
), plt_(NULL
), got_plt_(NULL
), got_irelative_(NULL
),
2126 rel_dyn_(NULL
), rel_irelative_(NULL
), copy_relocs_(elfcpp::R_ARM_COPY
),
2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2129 should_force_pic_veneer_(false),
2130 arm_input_section_map_(), attributes_section_data_(NULL
),
2131 fix_cortex_a8_(false), cortex_a8_relocs_info_(),
2132 target1_reloc_(elfcpp::R_ARM_ABS32
),
2133 // This can be any reloc type but usually is R_ARM_GOT_PREL.
2134 target2_reloc_(elfcpp::R_ARM_GOT_PREL
)
2137 // Whether we force PCI branch veneers.
2139 should_force_pic_veneer() const
2140 { return this->should_force_pic_veneer_
; }
2142 // Set PIC veneer flag.
2144 set_should_force_pic_veneer(bool value
)
2145 { this->should_force_pic_veneer_
= value
; }
2147 // Whether we use THUMB-2 instructions.
2149 using_thumb2() const
2151 Object_attribute
* attr
=
2152 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2153 int arch
= attr
->int_value();
2154 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2157 // Whether we use THUMB/THUMB-2 instructions only.
2159 using_thumb_only() const
2161 Object_attribute
* attr
=
2162 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2164 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2165 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2167 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2168 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2170 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2171 return attr
->int_value() == 'M';
2174 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2176 may_use_arm_nop() const
2178 Object_attribute
* attr
=
2179 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2180 int arch
= attr
->int_value();
2181 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2182 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2183 || arch
== elfcpp::TAG_CPU_ARCH_V7
2184 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2187 // Whether we have THUMB-2 NOP.W instruction.
2189 may_use_thumb2_nop() const
2191 Object_attribute
* attr
=
2192 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2193 int arch
= attr
->int_value();
2194 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2195 || arch
== elfcpp::TAG_CPU_ARCH_V7
2196 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2199 // Whether we have v4T interworking instructions available.
2201 may_use_v4t_interworking() const
2203 Object_attribute
* attr
=
2204 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2205 int arch
= attr
->int_value();
2206 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2207 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2210 // Whether we have v5T interworking instructions available.
2212 may_use_v5t_interworking() const
2214 Object_attribute
* attr
=
2215 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2216 int arch
= attr
->int_value();
2217 if (parameters
->options().fix_arm1176())
2218 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2219 || arch
== elfcpp::TAG_CPU_ARCH_V7
2220 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2221 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2222 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2224 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2225 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2226 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2229 // Process the relocations to determine unreferenced sections for
2230 // garbage collection.
2232 gc_process_relocs(Symbol_table
* symtab
,
2234 Sized_relobj_file
<32, big_endian
>* object
,
2235 unsigned int data_shndx
,
2236 unsigned int sh_type
,
2237 const unsigned char* prelocs
,
2239 Output_section
* output_section
,
2240 bool needs_special_offset_handling
,
2241 size_t local_symbol_count
,
2242 const unsigned char* plocal_symbols
);
2244 // Scan the relocations to look for symbol adjustments.
2246 scan_relocs(Symbol_table
* symtab
,
2248 Sized_relobj_file
<32, big_endian
>* object
,
2249 unsigned int data_shndx
,
2250 unsigned int sh_type
,
2251 const unsigned char* prelocs
,
2253 Output_section
* output_section
,
2254 bool needs_special_offset_handling
,
2255 size_t local_symbol_count
,
2256 const unsigned char* plocal_symbols
);
2258 // Finalize the sections.
2260 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2262 // Return the value to use for a dynamic symbol which requires special
2265 do_dynsym_value(const Symbol
*) const;
2267 // Return the plt address for globals. Since we have irelative plt entries,
2268 // address calculation is not as straightforward as plt_address + plt_offset.
2270 do_plt_address_for_global(const Symbol
* gsym
) const
2271 { return this->plt_section()->address_for_global(gsym
); }
2273 // Return the plt address for locals. Since we have irelative plt entries,
2274 // address calculation is not as straightforward as plt_address + plt_offset.
2276 do_plt_address_for_local(const Relobj
* relobj
, unsigned int symndx
) const
2277 { return this->plt_section()->address_for_local(relobj
, symndx
); }
2279 // Relocate a section.
2281 relocate_section(const Relocate_info
<32, big_endian
>*,
2282 unsigned int sh_type
,
2283 const unsigned char* prelocs
,
2285 Output_section
* output_section
,
2286 bool needs_special_offset_handling
,
2287 unsigned char* view
,
2288 Arm_address view_address
,
2289 section_size_type view_size
,
2290 const Reloc_symbol_changes
*);
2292 // Scan the relocs during a relocatable link.
2294 scan_relocatable_relocs(Symbol_table
* symtab
,
2296 Sized_relobj_file
<32, big_endian
>* object
,
2297 unsigned int data_shndx
,
2298 unsigned int sh_type
,
2299 const unsigned char* prelocs
,
2301 Output_section
* output_section
,
2302 bool needs_special_offset_handling
,
2303 size_t local_symbol_count
,
2304 const unsigned char* plocal_symbols
,
2305 Relocatable_relocs
*);
2307 // Scan the relocs for --emit-relocs.
2309 emit_relocs_scan(Symbol_table
* symtab
,
2311 Sized_relobj_file
<32, big_endian
>* object
,
2312 unsigned int data_shndx
,
2313 unsigned int sh_type
,
2314 const unsigned char* prelocs
,
2316 Output_section
* output_section
,
2317 bool needs_special_offset_handling
,
2318 size_t local_symbol_count
,
2319 const unsigned char* plocal_syms
,
2320 Relocatable_relocs
* rr
);
2322 // Emit relocations for a section.
2324 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2325 unsigned int sh_type
,
2326 const unsigned char* prelocs
,
2328 Output_section
* output_section
,
2329 typename
elfcpp::Elf_types
<32>::Elf_Off
2330 offset_in_output_section
,
2331 unsigned char* view
,
2332 Arm_address view_address
,
2333 section_size_type view_size
,
2334 unsigned char* reloc_view
,
2335 section_size_type reloc_view_size
);
2337 // Perform target-specific processing in a relocatable link. This is
2338 // only used if we use the relocation strategy RELOC_SPECIAL.
2340 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2341 unsigned int sh_type
,
2342 const unsigned char* preloc_in
,
2344 Output_section
* output_section
,
2345 typename
elfcpp::Elf_types
<32>::Elf_Off
2346 offset_in_output_section
,
2347 unsigned char* view
,
2348 typename
elfcpp::Elf_types
<32>::Elf_Addr
2350 section_size_type view_size
,
2351 unsigned char* preloc_out
);
2353 // Return whether SYM is defined by the ABI.
2355 do_is_defined_by_abi(const Symbol
* sym
) const
2356 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2358 // Return whether there is a GOT section.
2360 has_got_section() const
2361 { return this->got_
!= NULL
; }
2363 // Return the size of the GOT section.
2367 gold_assert(this->got_
!= NULL
);
2368 return this->got_
->data_size();
2371 // Return the number of entries in the GOT.
2373 got_entry_count() const
2375 if (!this->has_got_section())
2377 return this->got_size() / 4;
2380 // Return the number of entries in the PLT.
2382 plt_entry_count() const;
2384 // Return the offset of the first non-reserved PLT entry.
2386 first_plt_entry_offset() const;
2388 // Return the size of each PLT entry.
2390 plt_entry_size() const;
2392 // Get the section to use for IRELATIVE relocations, create it if necessary.
2394 rel_irelative_section(Layout
*);
2396 // Map platform-specific reloc types
2398 get_real_reloc_type(unsigned int r_type
) const;
2401 // Methods to support stub-generations.
2404 // Return the stub factory
2406 stub_factory() const
2407 { return this->stub_factory_
; }
2409 // Make a new Arm_input_section object.
2410 Arm_input_section
<big_endian
>*
2411 new_arm_input_section(Relobj
*, unsigned int);
2413 // Find the Arm_input_section object corresponding to the SHNDX-th input
2414 // section of RELOBJ.
2415 Arm_input_section
<big_endian
>*
2416 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2418 // Make a new Stub_table
2419 Stub_table
<big_endian
>*
2420 new_stub_table(Arm_input_section
<big_endian
>*);
2422 // Scan a section for stub generation.
2424 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2425 const unsigned char*, size_t, Output_section
*,
2426 bool, const unsigned char*, Arm_address
,
2431 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2432 Output_section
*, unsigned char*, Arm_address
,
2435 // Get the default ARM target.
2436 static Target_arm
<big_endian
>*
2439 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2440 && parameters
->target().is_big_endian() == big_endian
);
2441 return static_cast<Target_arm
<big_endian
>*>(
2442 parameters
->sized_target
<32, big_endian
>());
2445 // Whether NAME belongs to a mapping symbol.
2447 is_mapping_symbol_name(const char* name
)
2451 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2452 && (name
[2] == '\0' || name
[2] == '.'));
2455 // Whether we work around the Cortex-A8 erratum.
2457 fix_cortex_a8() const
2458 { return this->fix_cortex_a8_
; }
2460 // Whether we merge exidx entries in debuginfo.
2462 merge_exidx_entries() const
2463 { return parameters
->options().merge_exidx_entries(); }
2465 // Whether we fix R_ARM_V4BX relocation.
2467 // 1 - replace with MOV instruction (armv4 target)
2468 // 2 - make interworking veneer (>= armv4t targets only)
2469 General_options::Fix_v4bx
2471 { return parameters
->options().fix_v4bx(); }
2473 // Scan a span of THUMB code section for Cortex-A8 erratum.
2475 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2476 section_size_type
, section_size_type
,
2477 const unsigned char*, Arm_address
);
2479 // Apply Cortex-A8 workaround to a branch.
2481 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2482 unsigned char*, Arm_address
);
2485 // Make the PLT-generator object.
2486 Output_data_plt_arm
<big_endian
>*
2487 make_data_plt(Layout
* layout
,
2488 Arm_output_data_got
<big_endian
>* got
,
2489 Output_data_space
* got_plt
,
2490 Output_data_space
* got_irelative
)
2491 { return this->do_make_data_plt(layout
, got
, got_plt
, got_irelative
); }
2493 // Make an ELF object.
2495 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2496 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2499 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2500 const elfcpp::Ehdr
<32, !big_endian
>&)
2501 { gold_unreachable(); }
2504 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2505 const elfcpp::Ehdr
<64, false>&)
2506 { gold_unreachable(); }
2509 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2510 const elfcpp::Ehdr
<64, true>&)
2511 { gold_unreachable(); }
2513 // Make an output section.
2515 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2516 elfcpp::Elf_Xword flags
)
2517 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2520 do_adjust_elf_header(unsigned char* view
, int len
);
2522 // We only need to generate stubs, and hence perform relaxation if we are
2523 // not doing relocatable linking.
2525 do_may_relax() const
2526 { return !parameters
->options().relocatable(); }
2529 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2531 // Determine whether an object attribute tag takes an integer, a
2534 do_attribute_arg_type(int tag
) const;
2536 // Reorder tags during output.
2538 do_attributes_order(int num
) const;
2540 // This is called when the target is selected as the default.
2542 do_select_as_default_target()
2544 // No locking is required since there should only be one default target.
2545 // We cannot have both the big-endian and little-endian ARM targets
2547 gold_assert(arm_reloc_property_table
== NULL
);
2548 arm_reloc_property_table
= new Arm_reloc_property_table();
2549 if (parameters
->options().user_set_target1_rel())
2551 // FIXME: This is not strictly compatible with ld, which allows both
2552 // --target1-abs and --target-rel to be given.
2553 if (parameters
->options().user_set_target1_abs())
2554 gold_error(_("Cannot use both --target1-abs and --target1-rel."));
2556 this->target1_reloc_
= elfcpp::R_ARM_REL32
;
2558 // We don't need to handle --target1-abs because target1_reloc_ is set
2559 // to elfcpp::R_ARM_ABS32 in the member initializer list.
2561 if (parameters
->options().user_set_target2())
2563 const char* target2
= parameters
->options().target2();
2564 if (strcmp(target2
, "rel") == 0)
2565 this->target2_reloc_
= elfcpp::R_ARM_REL32
;
2566 else if (strcmp(target2
, "abs") == 0)
2567 this->target2_reloc_
= elfcpp::R_ARM_ABS32
;
2568 else if (strcmp(target2
, "got-rel") == 0)
2569 this->target2_reloc_
= elfcpp::R_ARM_GOT_PREL
;
2575 // Virtual function which is set to return true by a target if
2576 // it can use relocation types to determine if a function's
2577 // pointer is taken.
2579 do_can_check_for_function_pointers() const
2582 // Whether a section called SECTION_NAME may have function pointers to
2583 // sections not eligible for safe ICF folding.
2585 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2587 return (!is_prefix_of(".ARM.exidx", section_name
)
2588 && !is_prefix_of(".ARM.extab", section_name
)
2589 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2593 do_define_standard_symbols(Symbol_table
*, Layout
*);
2595 virtual Output_data_plt_arm
<big_endian
>*
2596 do_make_data_plt(Layout
* layout
,
2597 Arm_output_data_got
<big_endian
>* got
,
2598 Output_data_space
* got_plt
,
2599 Output_data_space
* got_irelative
)
2601 gold_assert(got_plt
!= NULL
&& got_irelative
!= NULL
);
2602 if (parameters
->options().long_plt())
2603 return new Output_data_plt_arm_long
<big_endian
>(
2604 layout
, got
, got_plt
, got_irelative
);
2606 return new Output_data_plt_arm_short
<big_endian
>(
2607 layout
, got
, got_plt
, got_irelative
);
2611 // The class which scans relocations.
2616 : issued_non_pic_error_(false)
2620 get_reference_flags(unsigned int r_type
);
2623 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2624 Sized_relobj_file
<32, big_endian
>* object
,
2625 unsigned int data_shndx
,
2626 Output_section
* output_section
,
2627 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2628 const elfcpp::Sym
<32, big_endian
>& lsym
,
2632 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2633 Sized_relobj_file
<32, big_endian
>* object
,
2634 unsigned int data_shndx
,
2635 Output_section
* output_section
,
2636 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2640 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2641 Sized_relobj_file
<32, big_endian
>* ,
2644 const elfcpp::Rel
<32, big_endian
>& ,
2646 const elfcpp::Sym
<32, big_endian
>&);
2649 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2650 Sized_relobj_file
<32, big_endian
>* ,
2653 const elfcpp::Rel
<32, big_endian
>& ,
2654 unsigned int , Symbol
*);
2658 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2659 unsigned int r_type
);
2662 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2663 unsigned int r_type
, Symbol
*);
2666 check_non_pic(Relobj
*, unsigned int r_type
);
2668 // Almost identical to Symbol::needs_plt_entry except that it also
2669 // handles STT_ARM_TFUNC.
2671 symbol_needs_plt_entry(const Symbol
* sym
)
2673 // An undefined symbol from an executable does not need a PLT entry.
2674 if (sym
->is_undefined() && !parameters
->options().shared())
2677 if (sym
->type() == elfcpp::STT_GNU_IFUNC
)
2680 return (!parameters
->doing_static_link()
2681 && (sym
->type() == elfcpp::STT_FUNC
2682 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2683 && (sym
->is_from_dynobj()
2684 || sym
->is_undefined()
2685 || sym
->is_preemptible()));
2689 possible_function_pointer_reloc(unsigned int r_type
);
2691 // Whether a plt entry is needed for ifunc.
2693 reloc_needs_plt_for_ifunc(Sized_relobj_file
<32, big_endian
>*,
2694 unsigned int r_type
);
2696 // Whether we have issued an error about a non-PIC compilation.
2697 bool issued_non_pic_error_
;
2700 // The class which implements relocation.
2710 // Return whether the static relocation needs to be applied.
2712 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2713 unsigned int r_type
,
2715 Output_section
* output_section
);
2717 // Do a relocation. Return false if the caller should not issue
2718 // any warnings about this relocation.
2720 relocate(const Relocate_info
<32, big_endian
>*, unsigned int,
2721 Target_arm
*, Output_section
*, size_t, const unsigned char*,
2722 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2723 unsigned char*, Arm_address
, section_size_type
);
2725 // Return whether we want to pass flag NON_PIC_REF for this
2726 // reloc. This means the relocation type accesses a symbol not via
2729 reloc_is_non_pic(unsigned int r_type
)
2733 // These relocation types reference GOT or PLT entries explicitly.
2734 case elfcpp::R_ARM_GOT_BREL
:
2735 case elfcpp::R_ARM_GOT_ABS
:
2736 case elfcpp::R_ARM_GOT_PREL
:
2737 case elfcpp::R_ARM_GOT_BREL12
:
2738 case elfcpp::R_ARM_PLT32_ABS
:
2739 case elfcpp::R_ARM_TLS_GD32
:
2740 case elfcpp::R_ARM_TLS_LDM32
:
2741 case elfcpp::R_ARM_TLS_IE32
:
2742 case elfcpp::R_ARM_TLS_IE12GP
:
2744 // These relocate types may use PLT entries.
2745 case elfcpp::R_ARM_CALL
:
2746 case elfcpp::R_ARM_THM_CALL
:
2747 case elfcpp::R_ARM_JUMP24
:
2748 case elfcpp::R_ARM_THM_JUMP24
:
2749 case elfcpp::R_ARM_THM_JUMP19
:
2750 case elfcpp::R_ARM_PLT32
:
2751 case elfcpp::R_ARM_THM_XPC22
:
2752 case elfcpp::R_ARM_PREL31
:
2753 case elfcpp::R_ARM_SBREL31
:
2762 // Do a TLS relocation.
2763 inline typename Arm_relocate_functions
<big_endian
>::Status
2764 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2765 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2766 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2767 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2772 // A class for inquiring about properties of a relocation,
2773 // used while scanning relocs during a relocatable link and
2774 // garbage collection.
2775 class Classify_reloc
:
2776 public gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
2779 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
2782 // Return the explicit addend of the relocation (return 0 for SHT_REL).
2783 static typename
elfcpp::Elf_types
<32>::Elf_Swxword
2784 get_r_addend(const Reltype
*)
2787 // Return the size of the addend of the relocation (only used for SHT_REL).
2789 get_size_for_reloc(unsigned int, Relobj
*);
2792 // Adjust TLS relocation type based on the options and whether this
2793 // is a local symbol.
2794 static tls::Tls_optimization
2795 optimize_tls_reloc(bool is_final
, int r_type
);
2797 // Get the GOT section, creating it if necessary.
2798 Arm_output_data_got
<big_endian
>*
2799 got_section(Symbol_table
*, Layout
*);
2801 // Get the GOT PLT section.
2803 got_plt_section() const
2805 gold_assert(this->got_plt_
!= NULL
);
2806 return this->got_plt_
;
2809 // Create the PLT section.
2811 make_plt_section(Symbol_table
* symtab
, Layout
* layout
);
2813 // Create a PLT entry for a global symbol.
2815 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2817 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2819 make_local_ifunc_plt_entry(Symbol_table
*, Layout
*,
2820 Sized_relobj_file
<32, big_endian
>* relobj
,
2821 unsigned int local_sym_index
);
2823 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2825 define_tls_base_symbol(Symbol_table
*, Layout
*);
2827 // Create a GOT entry for the TLS module index.
2829 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2830 Sized_relobj_file
<32, big_endian
>* object
);
2832 // Get the PLT section.
2833 const Output_data_plt_arm
<big_endian
>*
2836 gold_assert(this->plt_
!= NULL
);
2840 // Get the dynamic reloc section, creating it if necessary.
2842 rel_dyn_section(Layout
*);
2844 // Get the section to use for TLS_DESC relocations.
2846 rel_tls_desc_section(Layout
*) const;
2848 // Return true if the symbol may need a COPY relocation.
2849 // References from an executable object to non-function symbols
2850 // defined in a dynamic object may need a COPY relocation.
2852 may_need_copy_reloc(Symbol
* gsym
)
2854 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2855 && gsym
->may_need_copy_reloc());
2858 // Add a potential copy relocation.
2860 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2861 Sized_relobj_file
<32, big_endian
>* object
,
2862 unsigned int shndx
, Output_section
* output_section
,
2863 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2865 unsigned int r_type
= elfcpp::elf_r_type
<32>(reloc
.get_r_info());
2866 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2867 symtab
->get_sized_symbol
<32>(sym
),
2868 object
, shndx
, output_section
,
2869 r_type
, reloc
.get_r_offset(), 0,
2870 this->rel_dyn_section(layout
));
2873 // Whether two EABI versions are compatible.
2875 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2877 // Merge processor-specific flags from input object and those in the ELF
2878 // header of the output.
2880 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2882 // Get the secondary compatible architecture.
2884 get_secondary_compatible_arch(const Attributes_section_data
*);
2886 // Set the secondary compatible architecture.
2888 set_secondary_compatible_arch(Attributes_section_data
*, int);
2891 tag_cpu_arch_combine(const char*, int, int*, int, int);
2893 // Helper to print AEABI enum tag value.
2895 aeabi_enum_name(unsigned int);
2897 // Return string value for TAG_CPU_name.
2899 tag_cpu_name_value(unsigned int);
2901 // Query attributes object to see if integer divide instructions may be
2902 // present in an object.
2904 attributes_accept_div(int arch
, int profile
,
2905 const Object_attribute
* div_attr
);
2907 // Query attributes object to see if integer divide instructions are
2908 // forbidden to be in the object. This is not the inverse of
2909 // attributes_accept_div.
2911 attributes_forbid_div(const Object_attribute
* div_attr
);
2913 // Merge object attributes from input object and those in the output.
2915 merge_object_attributes(const char*, const Attributes_section_data
*);
2917 // Helper to get an AEABI object attribute
2919 get_aeabi_object_attribute(int tag
) const
2921 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2922 gold_assert(pasd
!= NULL
);
2923 Object_attribute
* attr
=
2924 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2925 gold_assert(attr
!= NULL
);
2930 // Methods to support stub-generations.
2933 // Group input sections for stub generation.
2935 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2937 // Scan a relocation for stub generation.
2939 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2940 const Sized_symbol
<32>*, unsigned int,
2941 const Symbol_value
<32>*,
2942 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2944 // Scan a relocation section for stub.
2945 template<int sh_type
>
2947 scan_reloc_section_for_stubs(
2948 const Relocate_info
<32, big_endian
>* relinfo
,
2949 const unsigned char* prelocs
,
2951 Output_section
* output_section
,
2952 bool needs_special_offset_handling
,
2953 const unsigned char* view
,
2954 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2957 // Fix .ARM.exidx section coverage.
2959 fix_exidx_coverage(Layout
*, const Input_objects
*,
2960 Arm_output_section
<big_endian
>*, Symbol_table
*,
2963 // Functors for STL set.
2964 struct output_section_address_less_than
2967 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2968 { return s1
->address() < s2
->address(); }
2971 // Information about this specific target which we pass to the
2972 // general Target structure.
2973 static const Target::Target_info arm_info
;
2975 // The types of GOT entries needed for this platform.
2976 // These values are exposed to the ABI in an incremental link.
2977 // Do not renumber existing values without changing the version
2978 // number of the .gnu_incremental_inputs section.
2981 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2982 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2983 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2984 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2985 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2988 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2990 // Map input section to Arm_input_section.
2991 typedef Unordered_map
<Section_id
,
2992 Arm_input_section
<big_endian
>*,
2994 Arm_input_section_map
;
2996 // Map output addresses to relocs for Cortex-A8 erratum.
2997 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2998 Cortex_a8_relocs_info
;
3001 Arm_output_data_got
<big_endian
>* got_
;
3003 Output_data_plt_arm
<big_endian
>* plt_
;
3004 // The GOT PLT section.
3005 Output_data_space
* got_plt_
;
3006 // The GOT section for IRELATIVE relocations.
3007 Output_data_space
* got_irelative_
;
3008 // The dynamic reloc section.
3009 Reloc_section
* rel_dyn_
;
3010 // The section to use for IRELATIVE relocs.
3011 Reloc_section
* rel_irelative_
;
3012 // Relocs saved to avoid a COPY reloc.
3013 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
3014 // Offset of the GOT entry for the TLS module index.
3015 unsigned int got_mod_index_offset_
;
3016 // True if the _TLS_MODULE_BASE_ symbol has been defined.
3017 bool tls_base_symbol_defined_
;
3018 // Vector of Stub_tables created.
3019 Stub_table_list stub_tables_
;
3021 const Stub_factory
&stub_factory_
;
3022 // Whether we force PIC branch veneers.
3023 bool should_force_pic_veneer_
;
3024 // Map for locating Arm_input_sections.
3025 Arm_input_section_map arm_input_section_map_
;
3026 // Attributes section data in output.
3027 Attributes_section_data
* attributes_section_data_
;
3028 // Whether we want to fix code for Cortex-A8 erratum.
3029 bool fix_cortex_a8_
;
3030 // Map addresses to relocs for Cortex-A8 erratum.
3031 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
3032 // What R_ARM_TARGET1 maps to. It can be R_ARM_REL32 or R_ARM_ABS32.
3033 unsigned int target1_reloc_
;
3034 // What R_ARM_TARGET2 maps to. It should be one of R_ARM_REL32, R_ARM_ABS32
3035 // and R_ARM_GOT_PREL.
3036 unsigned int target2_reloc_
;
3039 template<bool big_endian
>
3040 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
3043 big_endian
, // is_big_endian
3044 elfcpp::EM_ARM
, // machine_code
3045 false, // has_make_symbol
3046 false, // has_resolve
3047 false, // has_code_fill
3048 true, // is_default_stack_executable
3049 false, // can_icf_inline_merge_sections
3051 "/usr/lib/libc.so.1", // dynamic_linker
3052 0x8000, // default_text_segment_address
3053 0x1000, // abi_pagesize (overridable by -z max-page-size)
3054 0x1000, // common_pagesize (overridable by -z common-page-size)
3055 false, // isolate_execinstr
3057 elfcpp::SHN_UNDEF
, // small_common_shndx
3058 elfcpp::SHN_UNDEF
, // large_common_shndx
3059 0, // small_common_section_flags
3060 0, // large_common_section_flags
3061 ".ARM.attributes", // attributes_section
3062 "aeabi", // attributes_vendor
3063 "_start", // entry_symbol_name
3064 32, // hash_entry_size
3067 // Arm relocate functions class
3070 template<bool big_endian
>
3071 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
3076 STATUS_OKAY
, // No error during relocation.
3077 STATUS_OVERFLOW
, // Relocation overflow.
3078 STATUS_BAD_RELOC
// Relocation cannot be applied.
3082 typedef Relocate_functions
<32, big_endian
> Base
;
3083 typedef Arm_relocate_functions
<big_endian
> This
;
3085 // Encoding of imm16 argument for movt and movw ARM instructions
3088 // imm16 := imm4 | imm12
3090 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3091 // +-------+---------------+-------+-------+-----------------------+
3092 // | | |imm4 | |imm12 |
3093 // +-------+---------------+-------+-------+-----------------------+
3095 // Extract the relocation addend from VAL based on the ARM
3096 // instruction encoding described above.
3097 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3098 extract_arm_movw_movt_addend(
3099 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3101 // According to the Elf ABI for ARM Architecture the immediate
3102 // field is sign-extended to form the addend.
3103 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
3106 // Insert X into VAL based on the ARM instruction encoding described
3108 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3109 insert_val_arm_movw_movt(
3110 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3111 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3115 val
|= (x
& 0xf000) << 4;
3119 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3122 // imm16 := imm4 | i | imm3 | imm8
3124 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3125 // +---------+-+-----------+-------++-+-----+-------+---------------+
3126 // | |i| |imm4 || |imm3 | |imm8 |
3127 // +---------+-+-----------+-------++-+-----+-------+---------------+
3129 // Extract the relocation addend from VAL based on the Thumb2
3130 // instruction encoding described above.
3131 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3132 extract_thumb_movw_movt_addend(
3133 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3135 // According to the Elf ABI for ARM Architecture the immediate
3136 // field is sign-extended to form the addend.
3137 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3138 | ((val
>> 15) & 0x0800)
3139 | ((val
>> 4) & 0x0700)
3143 // Insert X into VAL based on the Thumb2 instruction encoding
3145 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3146 insert_val_thumb_movw_movt(
3147 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3148 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3151 val
|= (x
& 0xf000) << 4;
3152 val
|= (x
& 0x0800) << 15;
3153 val
|= (x
& 0x0700) << 4;
3154 val
|= (x
& 0x00ff);
3158 // Calculate the smallest constant Kn for the specified residual.
3159 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3161 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3167 // Determine the most significant bit in the residual and
3168 // align the resulting value to a 2-bit boundary.
3169 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3171 // The desired shift is now (msb - 6), or zero, whichever
3173 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3176 // Calculate the final residual for the specified group index.
3177 // If the passed group index is less than zero, the method will return
3178 // the value of the specified residual without any change.
3179 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3180 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3181 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3184 for (int n
= 0; n
<= group
; n
++)
3186 // Calculate which part of the value to mask.
3187 uint32_t shift
= calc_grp_kn(residual
);
3188 // Calculate the residual for the next time around.
3189 residual
&= ~(residual
& (0xff << shift
));
3195 // Calculate the value of Gn for the specified group index.
3196 // We return it in the form of an encoded constant-and-rotation.
3197 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3198 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3199 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3202 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3205 for (int n
= 0; n
<= group
; n
++)
3207 // Calculate which part of the value to mask.
3208 shift
= calc_grp_kn(residual
);
3209 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3210 gn
= residual
& (0xff << shift
);
3211 // Calculate the residual for the next time around.
3214 // Return Gn in the form of an encoded constant-and-rotation.
3215 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3219 // Handle ARM long branches.
3220 static typename
This::Status
3221 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3222 unsigned char*, const Sized_symbol
<32>*,
3223 const Arm_relobj
<big_endian
>*, unsigned int,
3224 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3226 // Handle THUMB long branches.
3227 static typename
This::Status
3228 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3229 unsigned char*, const Sized_symbol
<32>*,
3230 const Arm_relobj
<big_endian
>*, unsigned int,
3231 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3234 // Return the branch offset of a 32-bit THUMB branch.
3235 static inline int32_t
3236 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3238 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3239 // involving the J1 and J2 bits.
3240 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3241 uint32_t upper
= upper_insn
& 0x3ffU
;
3242 uint32_t lower
= lower_insn
& 0x7ffU
;
3243 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3244 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3245 uint32_t i1
= j1
^ s
? 0 : 1;
3246 uint32_t i2
= j2
^ s
? 0 : 1;
3248 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3249 | (upper
<< 12) | (lower
<< 1));
3252 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3253 // UPPER_INSN is the original upper instruction of the branch. Caller is
3254 // responsible for overflow checking and BLX offset adjustment.
3255 static inline uint16_t
3256 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3258 uint32_t s
= offset
< 0 ? 1 : 0;
3259 uint32_t bits
= static_cast<uint32_t>(offset
);
3260 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3263 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3264 // LOWER_INSN is the original lower instruction of the branch. Caller is
3265 // responsible for overflow checking and BLX offset adjustment.
3266 static inline uint16_t
3267 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3269 uint32_t s
= offset
< 0 ? 1 : 0;
3270 uint32_t bits
= static_cast<uint32_t>(offset
);
3271 return ((lower_insn
& ~0x2fffU
)
3272 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3273 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3274 | ((bits
>> 1) & 0x7ffU
));
3277 // Return the branch offset of a 32-bit THUMB conditional branch.
3278 static inline int32_t
3279 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3281 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3282 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3283 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3284 uint32_t lower
= (lower_insn
& 0x07ffU
);
3285 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3287 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3290 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3291 // instruction. UPPER_INSN is the original upper instruction of the branch.
3292 // Caller is responsible for overflow checking.
3293 static inline uint16_t
3294 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3296 uint32_t s
= offset
< 0 ? 1 : 0;
3297 uint32_t bits
= static_cast<uint32_t>(offset
);
3298 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3301 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3302 // instruction. LOWER_INSN is the original lower instruction of the branch.
3303 // The caller is responsible for overflow checking.
3304 static inline uint16_t
3305 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3307 uint32_t bits
= static_cast<uint32_t>(offset
);
3308 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3309 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3310 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3312 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3315 // R_ARM_ABS8: S + A
3316 static inline typename
This::Status
3317 abs8(unsigned char* view
,
3318 const Sized_relobj_file
<32, big_endian
>* object
,
3319 const Symbol_value
<32>* psymval
)
3321 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3322 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3323 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3324 int32_t addend
= Bits
<8>::sign_extend32(val
);
3325 Arm_address x
= psymval
->value(object
, addend
);
3326 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3327 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3329 // R_ARM_ABS8 permits signed or unsigned results.
3330 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3331 ? This::STATUS_OVERFLOW
3332 : This::STATUS_OKAY
);
3335 // R_ARM_THM_ABS5: S + A
3336 static inline typename
This::Status
3337 thm_abs5(unsigned char* view
,
3338 const Sized_relobj_file
<32, big_endian
>* object
,
3339 const Symbol_value
<32>* psymval
)
3341 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3342 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3343 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3344 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3345 Reltype addend
= (val
& 0x7e0U
) >> 6;
3346 Reltype x
= psymval
->value(object
, addend
);
3347 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3348 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3349 return (Bits
<5>::has_overflow32(x
)
3350 ? This::STATUS_OVERFLOW
3351 : This::STATUS_OKAY
);
3354 // R_ARM_ABS12: S + A
3355 static inline typename
This::Status
3356 abs12(unsigned char* view
,
3357 const Sized_relobj_file
<32, big_endian
>* object
,
3358 const Symbol_value
<32>* psymval
)
3360 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3361 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3362 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3363 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3364 Reltype addend
= val
& 0x0fffU
;
3365 Reltype x
= psymval
->value(object
, addend
);
3366 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3367 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3368 return (Bits
<12>::has_overflow32(x
)
3369 ? This::STATUS_OVERFLOW
3370 : This::STATUS_OKAY
);
3373 // R_ARM_ABS16: S + A
3374 static inline typename
This::Status
3375 abs16(unsigned char* view
,
3376 const Sized_relobj_file
<32, big_endian
>* object
,
3377 const Symbol_value
<32>* psymval
)
3379 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3380 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3381 int32_t addend
= Bits
<16>::sign_extend32(val
);
3382 Arm_address x
= psymval
->value(object
, addend
);
3383 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3384 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3386 // R_ARM_ABS16 permits signed or unsigned results.
3387 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3388 ? This::STATUS_OVERFLOW
3389 : This::STATUS_OKAY
);
3392 // R_ARM_ABS32: (S + A) | T
3393 static inline typename
This::Status
3394 abs32(unsigned char* view
,
3395 const Sized_relobj_file
<32, big_endian
>* object
,
3396 const Symbol_value
<32>* psymval
,
3397 Arm_address thumb_bit
)
3399 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3400 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3401 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3402 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3403 return This::STATUS_OKAY
;
3406 // R_ARM_REL32: (S + A) | T - P
3407 static inline typename
This::Status
3408 rel32(unsigned char* view
,
3409 const Sized_relobj_file
<32, big_endian
>* object
,
3410 const Symbol_value
<32>* psymval
,
3411 Arm_address address
,
3412 Arm_address thumb_bit
)
3414 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3415 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3416 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3417 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3418 return This::STATUS_OKAY
;
3421 // R_ARM_THM_JUMP24: (S + A) | T - P
3422 static typename
This::Status
3423 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3424 const Symbol_value
<32>* psymval
, Arm_address address
,
3425 Arm_address thumb_bit
);
3427 // R_ARM_THM_JUMP6: S + A - P
3428 static inline typename
This::Status
3429 thm_jump6(unsigned char* view
,
3430 const Sized_relobj_file
<32, big_endian
>* object
,
3431 const Symbol_value
<32>* psymval
,
3432 Arm_address address
)
3434 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3435 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3436 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3437 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3438 // bit[9]:bit[7:3]:'0' (mask: 0x02f8)
3439 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3440 Reltype x
= (psymval
->value(object
, addend
) - address
);
3441 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3442 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3443 // CZB does only forward jumps.
3444 return ((x
> 0x007e)
3445 ? This::STATUS_OVERFLOW
3446 : This::STATUS_OKAY
);
3449 // R_ARM_THM_JUMP8: S + A - P
3450 static inline typename
This::Status
3451 thm_jump8(unsigned char* view
,
3452 const Sized_relobj_file
<32, big_endian
>* object
,
3453 const Symbol_value
<32>* psymval
,
3454 Arm_address address
)
3456 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3457 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3458 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3459 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3460 int32_t x
= (psymval
->value(object
, addend
) - address
);
3461 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3462 | ((x
& 0x01fe) >> 1)));
3463 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3464 return (Bits
<9>::has_overflow32(x
)
3465 ? This::STATUS_OVERFLOW
3466 : This::STATUS_OKAY
);
3469 // R_ARM_THM_JUMP11: S + A - P
3470 static inline typename
This::Status
3471 thm_jump11(unsigned char* view
,
3472 const Sized_relobj_file
<32, big_endian
>* object
,
3473 const Symbol_value
<32>* psymval
,
3474 Arm_address address
)
3476 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3477 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3478 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3479 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3480 int32_t x
= (psymval
->value(object
, addend
) - address
);
3481 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3482 | ((x
& 0x0ffe) >> 1)));
3483 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3484 return (Bits
<12>::has_overflow32(x
)
3485 ? This::STATUS_OVERFLOW
3486 : This::STATUS_OKAY
);
3489 // R_ARM_BASE_PREL: B(S) + A - P
3490 static inline typename
This::Status
3491 base_prel(unsigned char* view
,
3493 Arm_address address
)
3495 Base::rel32(view
, origin
- address
);
3499 // R_ARM_BASE_ABS: B(S) + A
3500 static inline typename
This::Status
3501 base_abs(unsigned char* view
,
3504 Base::rel32(view
, origin
);
3508 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3509 static inline typename
This::Status
3510 got_brel(unsigned char* view
,
3511 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3513 Base::rel32(view
, got_offset
);
3514 return This::STATUS_OKAY
;
3517 // R_ARM_GOT_PREL: GOT(S) + A - P
3518 static inline typename
This::Status
3519 got_prel(unsigned char* view
,
3520 Arm_address got_entry
,
3521 Arm_address address
)
3523 Base::rel32(view
, got_entry
- address
);
3524 return This::STATUS_OKAY
;
3527 // R_ARM_PREL: (S + A) | T - P
3528 static inline typename
This::Status
3529 prel31(unsigned char* view
,
3530 const Sized_relobj_file
<32, big_endian
>* object
,
3531 const Symbol_value
<32>* psymval
,
3532 Arm_address address
,
3533 Arm_address thumb_bit
)
3535 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3536 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3537 Valtype addend
= Bits
<31>::sign_extend32(val
);
3538 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3539 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3540 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3541 return (Bits
<31>::has_overflow32(x
)
3542 ? This::STATUS_OVERFLOW
3543 : This::STATUS_OKAY
);
3546 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3547 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3548 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3549 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3550 static inline typename
This::Status
3551 movw(unsigned char* view
,
3552 const Sized_relobj_file
<32, big_endian
>* object
,
3553 const Symbol_value
<32>* psymval
,
3554 Arm_address relative_address_base
,
3555 Arm_address thumb_bit
,
3556 bool check_overflow
)
3558 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3559 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3560 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3561 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3562 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3563 - relative_address_base
);
3564 val
= This::insert_val_arm_movw_movt(val
, x
);
3565 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3566 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3567 ? This::STATUS_OVERFLOW
3568 : This::STATUS_OKAY
);
3571 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3572 // R_ARM_MOVT_PREL: S + A - P
3573 // R_ARM_MOVT_BREL: S + A - B(S)
3574 static inline typename
This::Status
3575 movt(unsigned char* view
,
3576 const Sized_relobj_file
<32, big_endian
>* object
,
3577 const Symbol_value
<32>* psymval
,
3578 Arm_address relative_address_base
)
3580 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3581 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3582 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3583 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3584 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3585 val
= This::insert_val_arm_movw_movt(val
, x
);
3586 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3587 // FIXME: IHI0044D says that we should check for overflow.
3588 return This::STATUS_OKAY
;
3591 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3592 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3593 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3594 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3595 static inline typename
This::Status
3596 thm_movw(unsigned char* view
,
3597 const Sized_relobj_file
<32, big_endian
>* object
,
3598 const Symbol_value
<32>* psymval
,
3599 Arm_address relative_address_base
,
3600 Arm_address thumb_bit
,
3601 bool check_overflow
)
3603 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3604 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3605 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3606 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3607 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3608 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3610 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3611 val
= This::insert_val_thumb_movw_movt(val
, x
);
3612 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3613 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3614 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3615 ? This::STATUS_OVERFLOW
3616 : This::STATUS_OKAY
);
3619 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3620 // R_ARM_THM_MOVT_PREL: S + A - P
3621 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3622 static inline typename
This::Status
3623 thm_movt(unsigned char* view
,
3624 const Sized_relobj_file
<32, big_endian
>* object
,
3625 const Symbol_value
<32>* psymval
,
3626 Arm_address relative_address_base
)
3628 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3629 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3630 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3631 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3632 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3633 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3634 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3635 val
= This::insert_val_thumb_movw_movt(val
, x
);
3636 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3637 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3638 return This::STATUS_OKAY
;
3641 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3642 static inline typename
This::Status
3643 thm_alu11(unsigned char* view
,
3644 const Sized_relobj_file
<32, big_endian
>* object
,
3645 const Symbol_value
<32>* psymval
,
3646 Arm_address address
,
3647 Arm_address thumb_bit
)
3649 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3650 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3651 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3652 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3653 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3655 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3656 // -----------------------------------------------------------------------
3657 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3658 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3659 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3660 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3661 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3662 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3664 // Determine a sign for the addend.
3665 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3666 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3667 // Thumb2 addend encoding:
3668 // imm12 := i | imm3 | imm8
3669 int32_t addend
= (insn
& 0xff)
3670 | ((insn
& 0x00007000) >> 4)
3671 | ((insn
& 0x04000000) >> 15);
3672 // Apply a sign to the added.
3675 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3676 - (address
& 0xfffffffc);
3677 Reltype val
= abs(x
);
3678 // Mask out the value and a distinct part of the ADD/SUB opcode
3679 // (bits 7:5 of opword).
3680 insn
= (insn
& 0xfb0f8f00)
3682 | ((val
& 0x700) << 4)
3683 | ((val
& 0x800) << 15);
3684 // Set the opcode according to whether the value to go in the
3685 // place is negative.
3689 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3690 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3691 return ((val
> 0xfff) ?
3692 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3695 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3696 static inline typename
This::Status
3697 thm_pc8(unsigned char* view
,
3698 const Sized_relobj_file
<32, big_endian
>* object
,
3699 const Symbol_value
<32>* psymval
,
3700 Arm_address address
)
3702 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3703 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3704 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3705 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3706 Reltype addend
= ((insn
& 0x00ff) << 2);
3707 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3708 Reltype val
= abs(x
);
3709 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3711 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3712 return ((val
> 0x03fc)
3713 ? This::STATUS_OVERFLOW
3714 : This::STATUS_OKAY
);
3717 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3718 static inline typename
This::Status
3719 thm_pc12(unsigned char* view
,
3720 const Sized_relobj_file
<32, big_endian
>* object
,
3721 const Symbol_value
<32>* psymval
,
3722 Arm_address address
)
3724 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3725 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3726 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3727 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3728 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3729 // Determine a sign for the addend (positive if the U bit is 1).
3730 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3731 int32_t addend
= (insn
& 0xfff);
3732 // Apply a sign to the added.
3735 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3736 Reltype val
= abs(x
);
3737 // Mask out and apply the value and the U bit.
3738 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3739 // Set the U bit according to whether the value to go in the
3740 // place is positive.
3744 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3745 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3746 return ((val
> 0xfff) ?
3747 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3751 static inline typename
This::Status
3752 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3753 unsigned char* view
,
3754 const Arm_relobj
<big_endian
>* object
,
3755 const Arm_address address
,
3756 const bool is_interworking
)
3759 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3760 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3761 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3763 // Ensure that we have a BX instruction.
3764 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3765 const uint32_t reg
= (val
& 0xf);
3766 if (is_interworking
&& reg
!= 0xf)
3768 Stub_table
<big_endian
>* stub_table
=
3769 object
->stub_table(relinfo
->data_shndx
);
3770 gold_assert(stub_table
!= NULL
);
3772 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3773 gold_assert(stub
!= NULL
);
3775 int32_t veneer_address
=
3776 stub_table
->address() + stub
->offset() - 8 - address
;
3777 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3778 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3779 // Replace with a branch to veneer (B <addr>)
3780 val
= (val
& 0xf0000000) | 0x0a000000
3781 | ((veneer_address
>> 2) & 0x00ffffff);
3785 // Preserve Rm (lowest four bits) and the condition code
3786 // (highest four bits). Other bits encode MOV PC,Rm.
3787 val
= (val
& 0xf000000f) | 0x01a0f000;
3789 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3790 return This::STATUS_OKAY
;
3793 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3794 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3795 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3796 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3797 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3798 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3799 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3800 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3801 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3802 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3803 static inline typename
This::Status
3804 arm_grp_alu(unsigned char* view
,
3805 const Sized_relobj_file
<32, big_endian
>* object
,
3806 const Symbol_value
<32>* psymval
,
3808 Arm_address address
,
3809 Arm_address thumb_bit
,
3810 bool check_overflow
)
3812 gold_assert(group
>= 0 && group
< 3);
3813 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3814 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3815 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3817 // ALU group relocations are allowed only for the ADD/SUB instructions.
3818 // (0x00800000 - ADD, 0x00400000 - SUB)
3819 const Valtype opcode
= insn
& 0x01e00000;
3820 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3821 return This::STATUS_BAD_RELOC
;
3823 // Determine a sign for the addend.
3824 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3825 // shifter = rotate_imm * 2
3826 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3827 // Initial addend value.
3828 int32_t addend
= insn
& 0xff;
3829 // Rotate addend right by shifter.
3830 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3831 // Apply a sign to the added.
3834 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3835 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3836 // Check for overflow if required
3838 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3839 return This::STATUS_OVERFLOW
;
3841 // Mask out the value and the ADD/SUB part of the opcode; take care
3842 // not to destroy the S bit.
3844 // Set the opcode according to whether the value to go in the
3845 // place is negative.
3846 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3847 // Encode the offset (encoded Gn).
3850 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3851 return This::STATUS_OKAY
;
3854 // R_ARM_LDR_PC_G0: S + A - P
3855 // R_ARM_LDR_PC_G1: S + A - P
3856 // R_ARM_LDR_PC_G2: S + A - P
3857 // R_ARM_LDR_SB_G0: S + A - B(S)
3858 // R_ARM_LDR_SB_G1: S + A - B(S)
3859 // R_ARM_LDR_SB_G2: S + A - B(S)
3860 static inline typename
This::Status
3861 arm_grp_ldr(unsigned char* view
,
3862 const Sized_relobj_file
<32, big_endian
>* object
,
3863 const Symbol_value
<32>* psymval
,
3865 Arm_address address
)
3867 gold_assert(group
>= 0 && group
< 3);
3868 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3869 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3870 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3872 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3873 int32_t addend
= (insn
& 0xfff) * sign
;
3874 int32_t x
= (psymval
->value(object
, addend
) - address
);
3875 // Calculate the relevant G(n-1) value to obtain this stage residual.
3877 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3878 if (residual
>= 0x1000)
3879 return This::STATUS_OVERFLOW
;
3881 // Mask out the value and U bit.
3883 // Set the U bit for non-negative values.
3888 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3889 return This::STATUS_OKAY
;
3892 // R_ARM_LDRS_PC_G0: S + A - P
3893 // R_ARM_LDRS_PC_G1: S + A - P
3894 // R_ARM_LDRS_PC_G2: S + A - P
3895 // R_ARM_LDRS_SB_G0: S + A - B(S)
3896 // R_ARM_LDRS_SB_G1: S + A - B(S)
3897 // R_ARM_LDRS_SB_G2: S + A - B(S)
3898 static inline typename
This::Status
3899 arm_grp_ldrs(unsigned char* view
,
3900 const Sized_relobj_file
<32, big_endian
>* object
,
3901 const Symbol_value
<32>* psymval
,
3903 Arm_address address
)
3905 gold_assert(group
>= 0 && group
< 3);
3906 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3907 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3908 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3910 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3911 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3912 int32_t x
= (psymval
->value(object
, addend
) - address
);
3913 // Calculate the relevant G(n-1) value to obtain this stage residual.
3915 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3916 if (residual
>= 0x100)
3917 return This::STATUS_OVERFLOW
;
3919 // Mask out the value and U bit.
3921 // Set the U bit for non-negative values.
3924 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3926 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3927 return This::STATUS_OKAY
;
3930 // R_ARM_LDC_PC_G0: S + A - P
3931 // R_ARM_LDC_PC_G1: S + A - P
3932 // R_ARM_LDC_PC_G2: S + A - P
3933 // R_ARM_LDC_SB_G0: S + A - B(S)
3934 // R_ARM_LDC_SB_G1: S + A - B(S)
3935 // R_ARM_LDC_SB_G2: S + A - B(S)
3936 static inline typename
This::Status
3937 arm_grp_ldc(unsigned char* view
,
3938 const Sized_relobj_file
<32, big_endian
>* object
,
3939 const Symbol_value
<32>* psymval
,
3941 Arm_address address
)
3943 gold_assert(group
>= 0 && group
< 3);
3944 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3945 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3946 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3948 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3949 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3950 int32_t x
= (psymval
->value(object
, addend
) - address
);
3951 // Calculate the relevant G(n-1) value to obtain this stage residual.
3953 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3954 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3955 return This::STATUS_OVERFLOW
;
3957 // Mask out the value and U bit.
3959 // Set the U bit for non-negative values.
3962 insn
|= (residual
>> 2);
3964 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3965 return This::STATUS_OKAY
;
3969 // Relocate ARM long branches. This handles relocation types
3970 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3971 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3972 // undefined and we do not use PLT in this relocation. In such a case,
3973 // the branch is converted into an NOP.
3975 template<bool big_endian
>
3976 typename Arm_relocate_functions
<big_endian
>::Status
3977 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3978 unsigned int r_type
,
3979 const Relocate_info
<32, big_endian
>* relinfo
,
3980 unsigned char* view
,
3981 const Sized_symbol
<32>* gsym
,
3982 const Arm_relobj
<big_endian
>* object
,
3984 const Symbol_value
<32>* psymval
,
3985 Arm_address address
,
3986 Arm_address thumb_bit
,
3987 bool is_weakly_undefined_without_plt
)
3989 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3990 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3991 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3993 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3994 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3995 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3996 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3997 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3998 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3999 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
4001 // Check that the instruction is valid.
4002 if (r_type
== elfcpp::R_ARM_CALL
)
4004 if (!insn_is_uncond_bl
&& !insn_is_blx
)
4005 return This::STATUS_BAD_RELOC
;
4007 else if (r_type
== elfcpp::R_ARM_JUMP24
)
4009 if (!insn_is_b
&& !insn_is_cond_bl
)
4010 return This::STATUS_BAD_RELOC
;
4012 else if (r_type
== elfcpp::R_ARM_PLT32
)
4014 if (!insn_is_any_branch
)
4015 return This::STATUS_BAD_RELOC
;
4017 else if (r_type
== elfcpp::R_ARM_XPC25
)
4019 // FIXME: AAELF document IH0044C does not say much about it other
4020 // than it being obsolete.
4021 if (!insn_is_any_branch
)
4022 return This::STATUS_BAD_RELOC
;
4027 // A branch to an undefined weak symbol is turned into a jump to
4028 // the next instruction unless a PLT entry will be created.
4029 // Do the same for local undefined symbols.
4030 // The jump to the next instruction is optimized as a NOP depending
4031 // on the architecture.
4032 const Target_arm
<big_endian
>* arm_target
=
4033 Target_arm
<big_endian
>::default_target();
4034 if (is_weakly_undefined_without_plt
)
4036 gold_assert(!parameters
->options().relocatable());
4037 Valtype cond
= val
& 0xf0000000U
;
4038 if (arm_target
->may_use_arm_nop())
4039 val
= cond
| 0x0320f000;
4041 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
4042 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4043 return This::STATUS_OKAY
;
4046 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
4047 Valtype branch_target
= psymval
->value(object
, addend
);
4048 int32_t branch_offset
= branch_target
- address
;
4050 // We need a stub if the branch offset is too large or if we need
4052 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4053 Reloc_stub
* stub
= NULL
;
4055 if (!parameters
->options().relocatable()
4056 && (Bits
<26>::has_overflow32(branch_offset
)
4057 || ((thumb_bit
!= 0)
4058 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
4060 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
4062 Stub_type stub_type
=
4063 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4064 unadjusted_branch_target
,
4066 if (stub_type
!= arm_stub_none
)
4068 Stub_table
<big_endian
>* stub_table
=
4069 object
->stub_table(relinfo
->data_shndx
);
4070 gold_assert(stub_table
!= NULL
);
4072 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4073 stub
= stub_table
->find_reloc_stub(stub_key
);
4074 gold_assert(stub
!= NULL
);
4075 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4076 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4077 branch_offset
= branch_target
- address
;
4078 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
4082 // At this point, if we still need to switch mode, the instruction
4083 // must either be a BLX or a BL that can be converted to a BLX.
4087 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
4088 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
4091 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
4092 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4093 return (Bits
<26>::has_overflow32(branch_offset
)
4094 ? This::STATUS_OVERFLOW
4095 : This::STATUS_OKAY
);
4098 // Relocate THUMB long branches. This handles relocation types
4099 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4100 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4101 // undefined and we do not use PLT in this relocation. In such a case,
4102 // the branch is converted into an NOP.
4104 template<bool big_endian
>
4105 typename Arm_relocate_functions
<big_endian
>::Status
4106 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
4107 unsigned int r_type
,
4108 const Relocate_info
<32, big_endian
>* relinfo
,
4109 unsigned char* view
,
4110 const Sized_symbol
<32>* gsym
,
4111 const Arm_relobj
<big_endian
>* object
,
4113 const Symbol_value
<32>* psymval
,
4114 Arm_address address
,
4115 Arm_address thumb_bit
,
4116 bool is_weakly_undefined_without_plt
)
4118 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4119 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4120 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4121 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4123 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4125 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4126 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4128 // Check that the instruction is valid.
4129 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4131 if (!is_bl_insn
&& !is_blx_insn
)
4132 return This::STATUS_BAD_RELOC
;
4134 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4136 // This cannot be a BLX.
4138 return This::STATUS_BAD_RELOC
;
4140 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4142 // Check for Thumb to Thumb call.
4144 return This::STATUS_BAD_RELOC
;
4147 gold_warning(_("%s: Thumb BLX instruction targets "
4148 "thumb function '%s'."),
4149 object
->name().c_str(),
4150 (gsym
? gsym
->name() : "(local)"));
4151 // Convert BLX to BL.
4152 lower_insn
|= 0x1000U
;
4158 // A branch to an undefined weak symbol is turned into a jump to
4159 // the next instruction unless a PLT entry will be created.
4160 // The jump to the next instruction is optimized as a NOP.W for
4161 // Thumb-2 enabled architectures.
4162 const Target_arm
<big_endian
>* arm_target
=
4163 Target_arm
<big_endian
>::default_target();
4164 if (is_weakly_undefined_without_plt
)
4166 gold_assert(!parameters
->options().relocatable());
4167 if (arm_target
->may_use_thumb2_nop())
4169 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4170 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4174 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4175 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4177 return This::STATUS_OKAY
;
4180 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4181 Arm_address branch_target
= psymval
->value(object
, addend
);
4183 // For BLX, bit 1 of target address comes from bit 1 of base address.
4184 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4185 if (thumb_bit
== 0 && may_use_blx
)
4186 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4188 int32_t branch_offset
= branch_target
- address
;
4190 // We need a stub if the branch offset is too large or if we need
4192 bool thumb2
= arm_target
->using_thumb2();
4193 if (!parameters
->options().relocatable()
4194 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4195 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4196 || ((thumb_bit
== 0)
4197 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4198 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4200 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4202 Stub_type stub_type
=
4203 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4204 unadjusted_branch_target
,
4207 if (stub_type
!= arm_stub_none
)
4209 Stub_table
<big_endian
>* stub_table
=
4210 object
->stub_table(relinfo
->data_shndx
);
4211 gold_assert(stub_table
!= NULL
);
4213 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4214 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4215 gold_assert(stub
!= NULL
);
4216 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4217 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4218 if (thumb_bit
== 0 && may_use_blx
)
4219 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4220 branch_offset
= branch_target
- address
;
4224 // At this point, if we still need to switch mode, the instruction
4225 // must either be a BLX or a BL that can be converted to a BLX.
4228 gold_assert(may_use_blx
4229 && (r_type
== elfcpp::R_ARM_THM_CALL
4230 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4231 // Make sure this is a BLX.
4232 lower_insn
&= ~0x1000U
;
4236 // Make sure this is a BL.
4237 lower_insn
|= 0x1000U
;
4240 // For a BLX instruction, make sure that the relocation is rounded up
4241 // to a word boundary. This follows the semantics of the instruction
4242 // which specifies that bit 1 of the target address will come from bit
4243 // 1 of the base address.
4244 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4245 gold_assert((branch_offset
& 3) == 0);
4247 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4248 // We use the Thumb-2 encoding, which is safe even if dealing with
4249 // a Thumb-1 instruction by virtue of our overflow check above. */
4250 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4251 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4253 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4254 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4256 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4259 ? Bits
<25>::has_overflow32(branch_offset
)
4260 : Bits
<23>::has_overflow32(branch_offset
))
4261 ? This::STATUS_OVERFLOW
4262 : This::STATUS_OKAY
);
4265 // Relocate THUMB-2 long conditional branches.
4266 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4267 // undefined and we do not use PLT in this relocation. In such a case,
4268 // the branch is converted into an NOP.
4270 template<bool big_endian
>
4271 typename Arm_relocate_functions
<big_endian
>::Status
4272 Arm_relocate_functions
<big_endian
>::thm_jump19(
4273 unsigned char* view
,
4274 const Arm_relobj
<big_endian
>* object
,
4275 const Symbol_value
<32>* psymval
,
4276 Arm_address address
,
4277 Arm_address thumb_bit
)
4279 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4280 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4281 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4282 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4283 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4285 Arm_address branch_target
= psymval
->value(object
, addend
);
4286 int32_t branch_offset
= branch_target
- address
;
4288 // ??? Should handle interworking? GCC might someday try to
4289 // use this for tail calls.
4290 // FIXME: We do support thumb entry to PLT yet.
4293 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4294 return This::STATUS_BAD_RELOC
;
4297 // Put RELOCATION back into the insn.
4298 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4299 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4301 // Put the relocated value back in the object file:
4302 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4303 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4305 return (Bits
<21>::has_overflow32(branch_offset
)
4306 ? This::STATUS_OVERFLOW
4307 : This::STATUS_OKAY
);
4310 // Get the GOT section, creating it if necessary.
4312 template<bool big_endian
>
4313 Arm_output_data_got
<big_endian
>*
4314 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4316 if (this->got_
== NULL
)
4318 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4320 // When using -z now, we can treat .got as a relro section.
4321 // Without -z now, it is modified after program startup by lazy
4323 bool is_got_relro
= parameters
->options().now();
4324 Output_section_order got_order
= (is_got_relro
4328 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4329 // .got.plt sections in output. The output .got section contains both
4330 // PLT and non-PLT GOT entries.
4331 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4333 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4334 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4335 this->got_
, got_order
, is_got_relro
);
4337 // The old GNU linker creates a .got.plt section. We just
4338 // create another set of data in the .got section. Note that we
4339 // always create a PLT if we create a GOT, although the PLT
4341 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4342 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4343 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4344 this->got_plt_
, got_order
, is_got_relro
);
4346 // The first three entries are reserved.
4347 this->got_plt_
->set_current_data_size(3 * 4);
4349 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4350 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4351 Symbol_table::PREDEFINED
,
4353 0, 0, elfcpp::STT_OBJECT
,
4355 elfcpp::STV_HIDDEN
, 0,
4358 // If there are any IRELATIVE relocations, they get GOT entries
4359 // in .got.plt after the jump slot entries.
4360 this->got_irelative_
= new Output_data_space(4, "** GOT IRELATIVE PLT");
4361 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4362 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4363 this->got_irelative_
,
4364 got_order
, is_got_relro
);
4370 // Get the dynamic reloc section, creating it if necessary.
4372 template<bool big_endian
>
4373 typename Target_arm
<big_endian
>::Reloc_section
*
4374 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4376 if (this->rel_dyn_
== NULL
)
4378 gold_assert(layout
!= NULL
);
4379 // Create both relocation sections in the same place, so as to ensure
4380 // their relative order in the output section.
4381 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4382 this->rel_irelative_
= new Reloc_section(false);
4383 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4384 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4385 ORDER_DYNAMIC_RELOCS
, false);
4386 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4387 elfcpp::SHF_ALLOC
, this->rel_irelative_
,
4388 ORDER_DYNAMIC_RELOCS
, false);
4390 return this->rel_dyn_
;
4394 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4395 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4396 // follow the other dynamic relocations so that they can refer to global
4397 // variables initialized by those relocs.
4399 template<bool big_endian
>
4400 typename Target_arm
<big_endian
>::Reloc_section
*
4401 Target_arm
<big_endian
>::rel_irelative_section(Layout
* layout
)
4403 if (this->rel_irelative_
== NULL
)
4405 // Delegate the creation to rel_dyn_section so as to ensure their order in
4406 // the output section.
4407 this->rel_dyn_section(layout
);
4408 gold_assert(this->rel_irelative_
!= NULL
4409 && (this->rel_dyn_
->output_section()
4410 == this->rel_irelative_
->output_section()));
4412 return this->rel_irelative_
;
4416 // Insn_template methods.
4418 // Return byte size of an instruction template.
4421 Insn_template::size() const
4423 switch (this->type())
4426 case THUMB16_SPECIAL_TYPE
:
4437 // Return alignment of an instruction template.
4440 Insn_template::alignment() const
4442 switch (this->type())
4445 case THUMB16_SPECIAL_TYPE
:
4456 // Stub_template methods.
4458 Stub_template::Stub_template(
4459 Stub_type type
, const Insn_template
* insns
,
4461 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4462 entry_in_thumb_mode_(false), relocs_()
4466 // Compute byte size and alignment of stub template.
4467 for (size_t i
= 0; i
< insn_count
; i
++)
4469 unsigned insn_alignment
= insns
[i
].alignment();
4470 size_t insn_size
= insns
[i
].size();
4471 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4472 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4473 switch (insns
[i
].type())
4475 case Insn_template::THUMB16_TYPE
:
4476 case Insn_template::THUMB16_SPECIAL_TYPE
:
4478 this->entry_in_thumb_mode_
= true;
4481 case Insn_template::THUMB32_TYPE
:
4482 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4483 this->relocs_
.push_back(Reloc(i
, offset
));
4485 this->entry_in_thumb_mode_
= true;
4488 case Insn_template::ARM_TYPE
:
4489 // Handle cases where the target is encoded within the
4491 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4492 this->relocs_
.push_back(Reloc(i
, offset
));
4495 case Insn_template::DATA_TYPE
:
4496 // Entry point cannot be data.
4497 gold_assert(i
!= 0);
4498 this->relocs_
.push_back(Reloc(i
, offset
));
4504 offset
+= insn_size
;
4506 this->size_
= offset
;
4511 // Template to implement do_write for a specific target endianness.
4513 template<bool big_endian
>
4515 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4517 const Stub_template
* stub_template
= this->stub_template();
4518 const Insn_template
* insns
= stub_template
->insns();
4519 const bool enable_be8
= parameters
->options().be8();
4521 unsigned char* pov
= view
;
4522 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4524 switch (insns
[i
].type())
4526 case Insn_template::THUMB16_TYPE
:
4528 elfcpp::Swap
<16, false>::writeval(pov
, insns
[i
].data() & 0xffff);
4530 elfcpp::Swap
<16, big_endian
>::writeval(pov
,
4531 insns
[i
].data() & 0xffff);
4533 case Insn_template::THUMB16_SPECIAL_TYPE
:
4535 elfcpp::Swap
<16, false>::writeval(pov
, this->thumb16_special(i
));
4537 elfcpp::Swap
<16, big_endian
>::writeval(pov
,
4538 this->thumb16_special(i
));
4540 case Insn_template::THUMB32_TYPE
:
4542 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4543 uint32_t lo
= insns
[i
].data() & 0xffff;
4546 elfcpp::Swap
<16, false>::writeval(pov
, hi
);
4547 elfcpp::Swap
<16, false>::writeval(pov
+ 2, lo
);
4551 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4552 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4556 case Insn_template::ARM_TYPE
:
4558 elfcpp::Swap
<32, false>::writeval(pov
, insns
[i
].data());
4560 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4562 case Insn_template::DATA_TYPE
:
4563 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4568 pov
+= insns
[i
].size();
4570 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4573 // Reloc_stub::Key methods.
4575 // Dump a Key as a string for debugging.
4578 Reloc_stub::Key::name() const
4580 if (this->r_sym_
== invalid_index
)
4582 // Global symbol key name
4583 // <stub-type>:<symbol name>:<addend>.
4584 const std::string sym_name
= this->u_
.symbol
->name();
4585 // We need to print two hex number and two colons. So just add 100 bytes
4586 // to the symbol name size.
4587 size_t len
= sym_name
.size() + 100;
4588 char* buffer
= new char[len
];
4589 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4590 sym_name
.c_str(), this->addend_
);
4591 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4593 return std::string(buffer
);
4597 // local symbol key name
4598 // <stub-type>:<object>:<r_sym>:<addend>.
4599 const size_t len
= 200;
4601 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4602 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4603 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4604 return std::string(buffer
);
4608 // Reloc_stub methods.
4610 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4611 // LOCATION to DESTINATION.
4612 // This code is based on the arm_type_of_stub function in
4613 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4617 Reloc_stub::stub_type_for_reloc(
4618 unsigned int r_type
,
4619 Arm_address location
,
4620 Arm_address destination
,
4621 bool target_is_thumb
)
4623 Stub_type stub_type
= arm_stub_none
;
4625 // This is a bit ugly but we want to avoid using a templated class for
4626 // big and little endianities.
4628 bool should_force_pic_veneer
= parameters
->options().pic_veneer();
4631 if (parameters
->target().is_big_endian())
4633 const Target_arm
<true>* big_endian_target
=
4634 Target_arm
<true>::default_target();
4635 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4636 should_force_pic_veneer
|= big_endian_target
->should_force_pic_veneer();
4637 thumb2
= big_endian_target
->using_thumb2();
4638 thumb_only
= big_endian_target
->using_thumb_only();
4642 const Target_arm
<false>* little_endian_target
=
4643 Target_arm
<false>::default_target();
4644 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4645 should_force_pic_veneer
|=
4646 little_endian_target
->should_force_pic_veneer();
4647 thumb2
= little_endian_target
->using_thumb2();
4648 thumb_only
= little_endian_target
->using_thumb_only();
4651 int64_t branch_offset
;
4652 bool output_is_position_independent
=
4653 parameters
->options().output_is_position_independent();
4654 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4656 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4657 // base address (instruction address + 4).
4658 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4659 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4660 branch_offset
= static_cast<int64_t>(destination
) - location
;
4662 // Handle cases where:
4663 // - this call goes too far (different Thumb/Thumb2 max
4665 // - it's a Thumb->Arm call and blx is not available, or it's a
4666 // Thumb->Arm branch (not bl). A stub is needed in this case.
4668 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4669 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4671 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4672 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4673 || ((!target_is_thumb
)
4674 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4675 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4677 if (target_is_thumb
)
4682 stub_type
= (output_is_position_independent
4683 || should_force_pic_veneer
)
4686 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4687 // V5T and above. Stub starts with ARM code, so
4688 // we must be able to switch mode before
4689 // reaching it, which is only possible for 'bl'
4690 // (ie R_ARM_THM_CALL relocation).
4691 ? arm_stub_long_branch_any_thumb_pic
4692 // On V4T, use Thumb code only.
4693 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4697 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4698 ? arm_stub_long_branch_any_any
// V5T and above.
4699 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4703 stub_type
= (output_is_position_independent
4704 || should_force_pic_veneer
)
4705 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4706 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4713 // FIXME: We should check that the input section is from an
4714 // object that has interwork enabled.
4716 stub_type
= (output_is_position_independent
4717 || should_force_pic_veneer
)
4720 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4721 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4722 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4726 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4727 ? arm_stub_long_branch_any_any
// V5T and above.
4728 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4730 // Handle v4t short branches.
4731 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4732 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4733 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4734 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4738 else if (r_type
== elfcpp::R_ARM_CALL
4739 || r_type
== elfcpp::R_ARM_JUMP24
4740 || r_type
== elfcpp::R_ARM_PLT32
)
4742 branch_offset
= static_cast<int64_t>(destination
) - location
;
4743 if (target_is_thumb
)
4747 // FIXME: We should check that the input section is from an
4748 // object that has interwork enabled.
4750 // We have an extra 2-bytes reach because of
4751 // the mode change (bit 24 (H) of BLX encoding).
4752 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4753 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4754 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4755 || (r_type
== elfcpp::R_ARM_JUMP24
)
4756 || (r_type
== elfcpp::R_ARM_PLT32
))
4758 stub_type
= (output_is_position_independent
4759 || should_force_pic_veneer
)
4762 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4763 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4767 ? arm_stub_long_branch_any_any
// V5T and above.
4768 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4774 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4775 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4777 stub_type
= (output_is_position_independent
4778 || should_force_pic_veneer
)
4779 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4780 : arm_stub_long_branch_any_any
; /// non-PIC.
4788 // Cortex_a8_stub methods.
4790 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4791 // I is the position of the instruction template in the stub template.
4794 Cortex_a8_stub::do_thumb16_special(size_t i
)
4796 // The only use of this is to copy condition code from a conditional
4797 // branch being worked around to the corresponding conditional branch in
4799 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4801 uint16_t data
= this->stub_template()->insns()[i
].data();
4802 gold_assert((data
& 0xff00U
) == 0xd000U
);
4803 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4807 // Stub_factory methods.
4809 Stub_factory::Stub_factory()
4811 // The instruction template sequences are declared as static
4812 // objects and initialized first time the constructor runs.
4814 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4815 // to reach the stub if necessary.
4816 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4818 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4819 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4820 // dcd R_ARM_ABS32(X)
4823 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4825 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4827 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4828 Insn_template::arm_insn(0xe12fff1c), // bx ip
4829 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4830 // dcd R_ARM_ABS32(X)
4833 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4834 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4836 Insn_template::thumb16_insn(0xb401), // push {r0}
4837 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4838 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4839 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4840 Insn_template::thumb16_insn(0x4760), // bx ip
4841 Insn_template::thumb16_insn(0xbf00), // nop
4842 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4843 // dcd R_ARM_ABS32(X)
4846 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4848 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4850 Insn_template::thumb16_insn(0x4778), // bx pc
4851 Insn_template::thumb16_insn(0x46c0), // nop
4852 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4853 Insn_template::arm_insn(0xe12fff1c), // bx ip
4854 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4855 // dcd R_ARM_ABS32(X)
4858 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4860 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4862 Insn_template::thumb16_insn(0x4778), // bx pc
4863 Insn_template::thumb16_insn(0x46c0), // nop
4864 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4865 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4866 // dcd R_ARM_ABS32(X)
4869 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4870 // one, when the destination is close enough.
4871 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4873 Insn_template::thumb16_insn(0x4778), // bx pc
4874 Insn_template::thumb16_insn(0x46c0), // nop
4875 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4878 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4879 // blx to reach the stub if necessary.
4880 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4882 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4883 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4884 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4885 // dcd R_ARM_REL32(X-4)
4888 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4889 // blx to reach the stub if necessary. We can not add into pc;
4890 // it is not guaranteed to mode switch (different in ARMv6 and
4892 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4894 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4895 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4896 Insn_template::arm_insn(0xe12fff1c), // bx ip
4897 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4898 // dcd R_ARM_REL32(X)
4901 // V4T ARM -> ARM long branch stub, PIC.
4902 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4904 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4905 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4906 Insn_template::arm_insn(0xe12fff1c), // bx ip
4907 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4908 // dcd R_ARM_REL32(X)
4911 // V4T Thumb -> ARM long branch stub, PIC.
4912 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4914 Insn_template::thumb16_insn(0x4778), // bx pc
4915 Insn_template::thumb16_insn(0x46c0), // nop
4916 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4917 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4918 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4919 // dcd R_ARM_REL32(X)
4922 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4924 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4926 Insn_template::thumb16_insn(0xb401), // push {r0}
4927 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4928 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4929 Insn_template::thumb16_insn(0x4484), // add ip, r0
4930 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4931 Insn_template::thumb16_insn(0x4760), // bx ip
4932 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4933 // dcd R_ARM_REL32(X)
4936 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4938 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4940 Insn_template::thumb16_insn(0x4778), // bx pc
4941 Insn_template::thumb16_insn(0x46c0), // nop
4942 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4943 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4944 Insn_template::arm_insn(0xe12fff1c), // bx ip
4945 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4946 // dcd R_ARM_REL32(X)
4949 // Cortex-A8 erratum-workaround stubs.
4951 // Stub used for conditional branches (which may be beyond +/-1MB away,
4952 // so we can't use a conditional branch to reach this stub).
4959 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4961 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4962 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4963 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4967 // Stub used for b.w and bl.w instructions.
4969 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4971 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4974 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4976 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4979 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4980 // instruction (which switches to ARM mode) to point to this stub. Jump to
4981 // the real destination using an ARM-mode branch.
4982 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4984 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4987 // Stub used to provide an interworking for R_ARM_V4BX relocation
4988 // (bx r[n] instruction).
4989 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4991 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4992 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4993 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4996 // Fill in the stub template look-up table. Stub templates are constructed
4997 // per instance of Stub_factory for fast look-up without locking
4998 // in a thread-enabled environment.
5000 this->stub_templates_
[arm_stub_none
] =
5001 new Stub_template(arm_stub_none
, NULL
, 0);
5003 #define DEF_STUB(x) \
5007 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
5008 Stub_type type = arm_stub_##x; \
5009 this->stub_templates_[type] = \
5010 new Stub_template(type, elf32_arm_stub_##x, array_size); \
5018 // Stub_table methods.
5020 // Remove all Cortex-A8 stub.
5022 template<bool big_endian
>
5024 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
5026 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5027 p
!= this->cortex_a8_stubs_
.end();
5030 this->cortex_a8_stubs_
.clear();
5033 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
5035 template<bool big_endian
>
5037 Stub_table
<big_endian
>::relocate_stub(
5039 const Relocate_info
<32, big_endian
>* relinfo
,
5040 Target_arm
<big_endian
>* arm_target
,
5041 Output_section
* output_section
,
5042 unsigned char* view
,
5043 Arm_address address
,
5044 section_size_type view_size
)
5046 const Stub_template
* stub_template
= stub
->stub_template();
5047 if (stub_template
->reloc_count() != 0)
5049 // Adjust view to cover the stub only.
5050 section_size_type offset
= stub
->offset();
5051 section_size_type stub_size
= stub_template
->size();
5052 gold_assert(offset
+ stub_size
<= view_size
);
5054 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
5055 address
+ offset
, stub_size
);
5059 // Relocate all stubs in this stub table.
5061 template<bool big_endian
>
5063 Stub_table
<big_endian
>::relocate_stubs(
5064 const Relocate_info
<32, big_endian
>* relinfo
,
5065 Target_arm
<big_endian
>* arm_target
,
5066 Output_section
* output_section
,
5067 unsigned char* view
,
5068 Arm_address address
,
5069 section_size_type view_size
)
5071 // If we are passed a view bigger than the stub table's. we need to
5073 gold_assert(address
== this->address()
5075 == static_cast<section_size_type
>(this->data_size())));
5077 // Relocate all relocation stubs.
5078 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5079 p
!= this->reloc_stubs_
.end();
5081 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5082 address
, view_size
);
5084 // Relocate all Cortex-A8 stubs.
5085 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5086 p
!= this->cortex_a8_stubs_
.end();
5088 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5089 address
, view_size
);
5091 // Relocate all ARM V4BX stubs.
5092 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
5093 p
!= this->arm_v4bx_stubs_
.end();
5097 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
5098 address
, view_size
);
5102 // Write out the stubs to file.
5104 template<bool big_endian
>
5106 Stub_table
<big_endian
>::do_write(Output_file
* of
)
5108 off_t offset
= this->offset();
5109 const section_size_type oview_size
=
5110 convert_to_section_size_type(this->data_size());
5111 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5113 // Write relocation stubs.
5114 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5115 p
!= this->reloc_stubs_
.end();
5118 Reloc_stub
* stub
= p
->second
;
5119 Arm_address address
= this->address() + stub
->offset();
5121 == align_address(address
,
5122 stub
->stub_template()->alignment()));
5123 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5127 // Write Cortex-A8 stubs.
5128 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5129 p
!= this->cortex_a8_stubs_
.end();
5132 Cortex_a8_stub
* stub
= p
->second
;
5133 Arm_address address
= this->address() + stub
->offset();
5135 == align_address(address
,
5136 stub
->stub_template()->alignment()));
5137 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5141 // Write ARM V4BX relocation stubs.
5142 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5143 p
!= this->arm_v4bx_stubs_
.end();
5149 Arm_address address
= this->address() + (*p
)->offset();
5151 == align_address(address
,
5152 (*p
)->stub_template()->alignment()));
5153 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
5157 of
->write_output_view(this->offset(), oview_size
, oview
);
5160 // Update the data size and address alignment of the stub table at the end
5161 // of a relaxation pass. Return true if either the data size or the
5162 // alignment changed in this relaxation pass.
5164 template<bool big_endian
>
5166 Stub_table
<big_endian
>::update_data_size_and_addralign()
5168 // Go over all stubs in table to compute data size and address alignment.
5169 off_t size
= this->reloc_stubs_size_
;
5170 unsigned addralign
= this->reloc_stubs_addralign_
;
5172 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5173 p
!= this->cortex_a8_stubs_
.end();
5176 const Stub_template
* stub_template
= p
->second
->stub_template();
5177 addralign
= std::max(addralign
, stub_template
->alignment());
5178 size
= (align_address(size
, stub_template
->alignment())
5179 + stub_template
->size());
5182 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5183 p
!= this->arm_v4bx_stubs_
.end();
5189 const Stub_template
* stub_template
= (*p
)->stub_template();
5190 addralign
= std::max(addralign
, stub_template
->alignment());
5191 size
= (align_address(size
, stub_template
->alignment())
5192 + stub_template
->size());
5195 // Check if either data size or alignment changed in this pass.
5196 // Update prev_data_size_ and prev_addralign_. These will be used
5197 // as the current data size and address alignment for the next pass.
5198 bool changed
= size
!= this->prev_data_size_
;
5199 this->prev_data_size_
= size
;
5201 if (addralign
!= this->prev_addralign_
)
5203 this->prev_addralign_
= addralign
;
5208 // Finalize the stubs. This sets the offsets of the stubs within the stub
5209 // table. It also marks all input sections needing Cortex-A8 workaround.
5211 template<bool big_endian
>
5213 Stub_table
<big_endian
>::finalize_stubs()
5215 off_t off
= this->reloc_stubs_size_
;
5216 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5217 p
!= this->cortex_a8_stubs_
.end();
5220 Cortex_a8_stub
* stub
= p
->second
;
5221 const Stub_template
* stub_template
= stub
->stub_template();
5222 uint64_t stub_addralign
= stub_template
->alignment();
5223 off
= align_address(off
, stub_addralign
);
5224 stub
->set_offset(off
);
5225 off
+= stub_template
->size();
5227 // Mark input section so that we can determine later if a code section
5228 // needs the Cortex-A8 workaround quickly.
5229 Arm_relobj
<big_endian
>* arm_relobj
=
5230 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5231 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5234 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5235 p
!= this->arm_v4bx_stubs_
.end();
5241 const Stub_template
* stub_template
= (*p
)->stub_template();
5242 uint64_t stub_addralign
= stub_template
->alignment();
5243 off
= align_address(off
, stub_addralign
);
5244 (*p
)->set_offset(off
);
5245 off
+= stub_template
->size();
5248 gold_assert(off
<= this->prev_data_size_
);
5251 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5252 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5253 // of the address range seen by the linker.
5255 template<bool big_endian
>
5257 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5258 Target_arm
<big_endian
>* arm_target
,
5259 unsigned char* view
,
5260 Arm_address view_address
,
5261 section_size_type view_size
)
5263 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5264 for (Cortex_a8_stub_list::const_iterator p
=
5265 this->cortex_a8_stubs_
.lower_bound(view_address
);
5266 ((p
!= this->cortex_a8_stubs_
.end())
5267 && (p
->first
< (view_address
+ view_size
)));
5270 // We do not store the THUMB bit in the LSB of either the branch address
5271 // or the stub offset. There is no need to strip the LSB.
5272 Arm_address branch_address
= p
->first
;
5273 const Cortex_a8_stub
* stub
= p
->second
;
5274 Arm_address stub_address
= this->address() + stub
->offset();
5276 // Offset of the branch instruction relative to this view.
5277 section_size_type offset
=
5278 convert_to_section_size_type(branch_address
- view_address
);
5279 gold_assert((offset
+ 4) <= view_size
);
5281 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5282 view
+ offset
, branch_address
);
5286 // Arm_input_section methods.
5288 // Initialize an Arm_input_section.
5290 template<bool big_endian
>
5292 Arm_input_section
<big_endian
>::init()
5294 Relobj
* relobj
= this->relobj();
5295 unsigned int shndx
= this->shndx();
5297 // We have to cache original size, alignment and contents to avoid locking
5298 // the original file.
5299 this->original_addralign_
=
5300 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5302 // This is not efficient but we expect only a small number of relaxed
5303 // input sections for stubs.
5304 section_size_type section_size
;
5305 const unsigned char* section_contents
=
5306 relobj
->section_contents(shndx
, §ion_size
, false);
5307 this->original_size_
=
5308 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5310 gold_assert(this->original_contents_
== NULL
);
5311 this->original_contents_
= new unsigned char[section_size
];
5312 memcpy(this->original_contents_
, section_contents
, section_size
);
5314 // We want to make this look like the original input section after
5315 // output sections are finalized.
5316 Output_section
* os
= relobj
->output_section(shndx
);
5317 off_t offset
= relobj
->output_section_offset(shndx
);
5318 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5319 this->set_address(os
->address() + offset
);
5320 this->set_file_offset(os
->offset() + offset
);
5322 this->set_current_data_size(this->original_size_
);
5323 this->finalize_data_size();
5326 template<bool big_endian
>
5328 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5330 // We have to write out the original section content.
5331 gold_assert(this->original_contents_
!= NULL
);
5332 of
->write(this->offset(), this->original_contents_
,
5333 this->original_size_
);
5335 // If this owns a stub table and it is not empty, write it.
5336 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5337 this->stub_table_
->write(of
);
5340 // Finalize data size.
5342 template<bool big_endian
>
5344 Arm_input_section
<big_endian
>::set_final_data_size()
5346 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5348 if (this->is_stub_table_owner())
5350 this->stub_table_
->finalize_data_size();
5351 off
= align_address(off
, this->stub_table_
->addralign());
5352 off
+= this->stub_table_
->data_size();
5354 this->set_data_size(off
);
5357 // Reset address and file offset.
5359 template<bool big_endian
>
5361 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5363 // Size of the original input section contents.
5364 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5366 // If this is a stub table owner, account for the stub table size.
5367 if (this->is_stub_table_owner())
5369 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5371 // Reset the stub table's address and file offset. The
5372 // current data size for child will be updated after that.
5373 stub_table_
->reset_address_and_file_offset();
5374 off
= align_address(off
, stub_table_
->addralign());
5375 off
+= stub_table
->current_data_size();
5378 this->set_current_data_size(off
);
5381 // Arm_exidx_cantunwind methods.
5383 // Write this to Output file OF for a fixed endianness.
5385 template<bool big_endian
>
5387 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5389 off_t offset
= this->offset();
5390 const section_size_type oview_size
= 8;
5391 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5393 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5394 gold_assert(os
!= NULL
);
5396 Arm_relobj
<big_endian
>* arm_relobj
=
5397 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5398 Arm_address output_offset
=
5399 arm_relobj
->get_output_section_offset(this->shndx_
);
5400 Arm_address section_start
;
5401 section_size_type section_size
;
5403 // Find out the end of the text section referred by this.
5404 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5406 section_start
= os
->address() + output_offset
;
5407 const Arm_exidx_input_section
* exidx_input_section
=
5408 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5409 gold_assert(exidx_input_section
!= NULL
);
5411 convert_to_section_size_type(exidx_input_section
->text_size());
5415 // Currently this only happens for a relaxed section.
5416 const Output_relaxed_input_section
* poris
=
5417 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5418 gold_assert(poris
!= NULL
);
5419 section_start
= poris
->address();
5420 section_size
= convert_to_section_size_type(poris
->data_size());
5423 // We always append this to the end of an EXIDX section.
5424 Arm_address output_address
= section_start
+ section_size
;
5426 // Write out the entry. The first word either points to the beginning
5427 // or after the end of a text section. The second word is the special
5428 // EXIDX_CANTUNWIND value.
5429 uint32_t prel31_offset
= output_address
- this->address();
5430 if (Bits
<31>::has_overflow32(offset
))
5431 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5432 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5433 prel31_offset
& 0x7fffffffU
);
5434 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5435 elfcpp::EXIDX_CANTUNWIND
);
5437 of
->write_output_view(this->offset(), oview_size
, oview
);
5440 // Arm_exidx_merged_section methods.
5442 // Constructor for Arm_exidx_merged_section.
5443 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5444 // SECTION_OFFSET_MAP points to a section offset map describing how
5445 // parts of the input section are mapped to output. DELETED_BYTES is
5446 // the number of bytes deleted from the EXIDX input section.
5448 Arm_exidx_merged_section::Arm_exidx_merged_section(
5449 const Arm_exidx_input_section
& exidx_input_section
,
5450 const Arm_exidx_section_offset_map
& section_offset_map
,
5451 uint32_t deleted_bytes
)
5452 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5453 exidx_input_section
.shndx(),
5454 exidx_input_section
.addralign()),
5455 exidx_input_section_(exidx_input_section
),
5456 section_offset_map_(section_offset_map
)
5458 // If we retain or discard the whole EXIDX input section, we would
5460 gold_assert(deleted_bytes
!= 0
5461 && deleted_bytes
!= this->exidx_input_section_
.size());
5463 // Fix size here so that we do not need to implement set_final_data_size.
5464 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5465 this->set_data_size(size
);
5466 this->fix_data_size();
5468 // Allocate buffer for section contents and build contents.
5469 this->section_contents_
= new unsigned char[size
];
5472 // Build the contents of a merged EXIDX output section.
5475 Arm_exidx_merged_section::build_contents(
5476 const unsigned char* original_contents
,
5477 section_size_type original_size
)
5479 // Go over spans of input offsets and write only those that are not
5481 section_offset_type in_start
= 0;
5482 section_offset_type out_start
= 0;
5483 section_offset_type in_max
=
5484 convert_types
<section_offset_type
>(original_size
);
5485 section_offset_type out_max
=
5486 convert_types
<section_offset_type
>(this->data_size());
5487 for (Arm_exidx_section_offset_map::const_iterator p
=
5488 this->section_offset_map_
.begin();
5489 p
!= this->section_offset_map_
.end();
5492 section_offset_type in_end
= p
->first
;
5493 gold_assert(in_end
>= in_start
);
5494 section_offset_type out_end
= p
->second
;
5495 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5498 size_t out_chunk_size
=
5499 convert_types
<size_t>(out_end
- out_start
+ 1);
5501 gold_assert(out_chunk_size
== in_chunk_size
5502 && in_end
< in_max
&& out_end
< out_max
);
5504 memcpy(this->section_contents_
+ out_start
,
5505 original_contents
+ in_start
,
5507 out_start
+= out_chunk_size
;
5509 in_start
+= in_chunk_size
;
5513 // Given an input OBJECT, an input section index SHNDX within that
5514 // object, and an OFFSET relative to the start of that input
5515 // section, return whether or not the corresponding offset within
5516 // the output section is known. If this function returns true, it
5517 // sets *POUTPUT to the output offset. The value -1 indicates that
5518 // this input offset is being discarded.
5521 Arm_exidx_merged_section::do_output_offset(
5522 const Relobj
* relobj
,
5524 section_offset_type offset
,
5525 section_offset_type
* poutput
) const
5527 // We only handle offsets for the original EXIDX input section.
5528 if (relobj
!= this->exidx_input_section_
.relobj()
5529 || shndx
!= this->exidx_input_section_
.shndx())
5532 section_offset_type section_size
=
5533 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5534 if (offset
< 0 || offset
>= section_size
)
5535 // Input offset is out of valid range.
5539 // We need to look up the section offset map to determine the output
5540 // offset. Find the reference point in map that is first offset
5541 // bigger than or equal to this offset.
5542 Arm_exidx_section_offset_map::const_iterator p
=
5543 this->section_offset_map_
.lower_bound(offset
);
5545 // The section offset maps are build such that this should not happen if
5546 // input offset is in the valid range.
5547 gold_assert(p
!= this->section_offset_map_
.end());
5549 // We need to check if this is dropped.
5550 section_offset_type ref
= p
->first
;
5551 section_offset_type mapped_ref
= p
->second
;
5553 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5554 // Offset is present in output.
5555 *poutput
= mapped_ref
+ (offset
- ref
);
5557 // Offset is discarded owing to EXIDX entry merging.
5564 // Write this to output file OF.
5567 Arm_exidx_merged_section::do_write(Output_file
* of
)
5569 off_t offset
= this->offset();
5570 const section_size_type oview_size
= this->data_size();
5571 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5573 Output_section
* os
= this->relobj()->output_section(this->shndx());
5574 gold_assert(os
!= NULL
);
5576 memcpy(oview
, this->section_contents_
, oview_size
);
5577 of
->write_output_view(this->offset(), oview_size
, oview
);
5580 // Arm_exidx_fixup methods.
5582 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5583 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5584 // points to the end of the last seen EXIDX section.
5587 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5589 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5590 && this->last_input_section_
!= NULL
)
5592 Relobj
* relobj
= this->last_input_section_
->relobj();
5593 unsigned int text_shndx
= this->last_input_section_
->link();
5594 Arm_exidx_cantunwind
* cantunwind
=
5595 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5596 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5597 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5601 // Process an EXIDX section entry in input. Return whether this entry
5602 // can be deleted in the output. SECOND_WORD in the second word of the
5606 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5609 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5611 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5612 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5613 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5615 else if ((second_word
& 0x80000000) != 0)
5617 // Inlined unwinding data. Merge if equal to previous.
5618 delete_entry
= (merge_exidx_entries_
5619 && this->last_unwind_type_
== UT_INLINED_ENTRY
5620 && this->last_inlined_entry_
== second_word
);
5621 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5622 this->last_inlined_entry_
= second_word
;
5626 // Normal table entry. In theory we could merge these too,
5627 // but duplicate entries are likely to be much less common.
5628 delete_entry
= false;
5629 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5631 return delete_entry
;
5634 // Update the current section offset map during EXIDX section fix-up.
5635 // If there is no map, create one. INPUT_OFFSET is the offset of a
5636 // reference point, DELETED_BYTES is the number of deleted by in the
5637 // section so far. If DELETE_ENTRY is true, the reference point and
5638 // all offsets after the previous reference point are discarded.
5641 Arm_exidx_fixup::update_offset_map(
5642 section_offset_type input_offset
,
5643 section_size_type deleted_bytes
,
5646 if (this->section_offset_map_
== NULL
)
5647 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5648 section_offset_type output_offset
;
5650 output_offset
= Arm_exidx_input_section::invalid_offset
;
5652 output_offset
= input_offset
- deleted_bytes
;
5653 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5656 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5657 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5658 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5659 // If some entries are merged, also store a pointer to a newly created
5660 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5661 // owns the map and is responsible for releasing it after use.
5663 template<bool big_endian
>
5665 Arm_exidx_fixup::process_exidx_section(
5666 const Arm_exidx_input_section
* exidx_input_section
,
5667 const unsigned char* section_contents
,
5668 section_size_type section_size
,
5669 Arm_exidx_section_offset_map
** psection_offset_map
)
5671 Relobj
* relobj
= exidx_input_section
->relobj();
5672 unsigned shndx
= exidx_input_section
->shndx();
5674 if ((section_size
% 8) != 0)
5676 // Something is wrong with this section. Better not touch it.
5677 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5678 relobj
->name().c_str(), shndx
);
5679 this->last_input_section_
= exidx_input_section
;
5680 this->last_unwind_type_
= UT_NONE
;
5684 uint32_t deleted_bytes
= 0;
5685 bool prev_delete_entry
= false;
5686 gold_assert(this->section_offset_map_
== NULL
);
5688 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5690 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5692 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5693 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5695 bool delete_entry
= this->process_exidx_entry(second_word
);
5697 // Entry deletion causes changes in output offsets. We use a std::map
5698 // to record these. And entry (x, y) means input offset x
5699 // is mapped to output offset y. If y is invalid_offset, then x is
5700 // dropped in the output. Because of the way std::map::lower_bound
5701 // works, we record the last offset in a region w.r.t to keeping or
5702 // dropping. If there is no entry (x0, y0) for an input offset x0,
5703 // the output offset y0 of it is determined by the output offset y1 of
5704 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5705 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5707 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5708 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5710 // Update total deleted bytes for this entry.
5714 prev_delete_entry
= delete_entry
;
5717 // If section offset map is not NULL, make an entry for the end of
5719 if (this->section_offset_map_
!= NULL
)
5720 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5722 *psection_offset_map
= this->section_offset_map_
;
5723 this->section_offset_map_
= NULL
;
5724 this->last_input_section_
= exidx_input_section
;
5726 // Set the first output text section so that we can link the EXIDX output
5727 // section to it. Ignore any EXIDX input section that is completely merged.
5728 if (this->first_output_text_section_
== NULL
5729 && deleted_bytes
!= section_size
)
5731 unsigned int link
= exidx_input_section
->link();
5732 Output_section
* os
= relobj
->output_section(link
);
5733 gold_assert(os
!= NULL
);
5734 this->first_output_text_section_
= os
;
5737 return deleted_bytes
;
5740 // Arm_output_section methods.
5742 // Create a stub group for input sections from BEGIN to END. OWNER
5743 // points to the input section to be the owner a new stub table.
5745 template<bool big_endian
>
5747 Arm_output_section
<big_endian
>::create_stub_group(
5748 Input_section_list::const_iterator begin
,
5749 Input_section_list::const_iterator end
,
5750 Input_section_list::const_iterator owner
,
5751 Target_arm
<big_endian
>* target
,
5752 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5755 // We use a different kind of relaxed section in an EXIDX section.
5756 // The static casting from Output_relaxed_input_section to
5757 // Arm_input_section is invalid in an EXIDX section. We are okay
5758 // because we should not be calling this for an EXIDX section.
5759 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5761 // Currently we convert ordinary input sections into relaxed sections only
5762 // at this point but we may want to support creating relaxed input section
5763 // very early. So we check here to see if owner is already a relaxed
5766 Arm_input_section
<big_endian
>* arm_input_section
;
5767 if (owner
->is_relaxed_input_section())
5770 Arm_input_section
<big_endian
>::as_arm_input_section(
5771 owner
->relaxed_input_section());
5775 gold_assert(owner
->is_input_section());
5776 // Create a new relaxed input section. We need to lock the original
5778 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5780 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5781 new_relaxed_sections
->push_back(arm_input_section
);
5784 // Create a stub table.
5785 Stub_table
<big_endian
>* stub_table
=
5786 target
->new_stub_table(arm_input_section
);
5788 arm_input_section
->set_stub_table(stub_table
);
5790 Input_section_list::const_iterator p
= begin
;
5791 Input_section_list::const_iterator prev_p
;
5793 // Look for input sections or relaxed input sections in [begin ... end].
5796 if (p
->is_input_section() || p
->is_relaxed_input_section())
5798 // The stub table information for input sections live
5799 // in their objects.
5800 Arm_relobj
<big_endian
>* arm_relobj
=
5801 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5802 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5806 while (prev_p
!= end
);
5809 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5810 // of stub groups. We grow a stub group by adding input section until the
5811 // size is just below GROUP_SIZE. The last input section will be converted
5812 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5813 // input section after the stub table, effectively double the group size.
5815 // This is similar to the group_sections() function in elf32-arm.c but is
5816 // implemented differently.
5818 template<bool big_endian
>
5820 Arm_output_section
<big_endian
>::group_sections(
5821 section_size_type group_size
,
5822 bool stubs_always_after_branch
,
5823 Target_arm
<big_endian
>* target
,
5826 // States for grouping.
5829 // No group is being built.
5831 // A group is being built but the stub table is not found yet.
5832 // We keep group a stub group until the size is just under GROUP_SIZE.
5833 // The last input section in the group will be used as the stub table.
5834 FINDING_STUB_SECTION
,
5835 // A group is being built and we have already found a stub table.
5836 // We enter this state to grow a stub group by adding input section
5837 // after the stub table. This effectively doubles the group size.
5841 // Any newly created relaxed sections are stored here.
5842 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5844 State state
= NO_GROUP
;
5845 section_size_type off
= 0;
5846 section_size_type group_begin_offset
= 0;
5847 section_size_type group_end_offset
= 0;
5848 section_size_type stub_table_end_offset
= 0;
5849 Input_section_list::const_iterator group_begin
=
5850 this->input_sections().end();
5851 Input_section_list::const_iterator stub_table
=
5852 this->input_sections().end();
5853 Input_section_list::const_iterator group_end
= this->input_sections().end();
5854 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5855 p
!= this->input_sections().end();
5858 section_size_type section_begin_offset
=
5859 align_address(off
, p
->addralign());
5860 section_size_type section_end_offset
=
5861 section_begin_offset
+ p
->data_size();
5863 // Check to see if we should group the previously seen sections.
5869 case FINDING_STUB_SECTION
:
5870 // Adding this section makes the group larger than GROUP_SIZE.
5871 if (section_end_offset
- group_begin_offset
>= group_size
)
5873 if (stubs_always_after_branch
)
5875 gold_assert(group_end
!= this->input_sections().end());
5876 this->create_stub_group(group_begin
, group_end
, group_end
,
5877 target
, &new_relaxed_sections
,
5883 // But wait, there's more! Input sections up to
5884 // stub_group_size bytes after the stub table can be
5885 // handled by it too.
5886 state
= HAS_STUB_SECTION
;
5887 stub_table
= group_end
;
5888 stub_table_end_offset
= group_end_offset
;
5893 case HAS_STUB_SECTION
:
5894 // Adding this section makes the post stub-section group larger
5896 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5898 gold_assert(group_end
!= this->input_sections().end());
5899 this->create_stub_group(group_begin
, group_end
, stub_table
,
5900 target
, &new_relaxed_sections
, task
);
5909 // If we see an input section and currently there is no group, start
5910 // a new one. Skip any empty sections. We look at the data size
5911 // instead of calling p->relobj()->section_size() to avoid locking.
5912 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5913 && (p
->data_size() != 0))
5915 if (state
== NO_GROUP
)
5917 state
= FINDING_STUB_SECTION
;
5919 group_begin_offset
= section_begin_offset
;
5922 // Keep track of the last input section seen.
5924 group_end_offset
= section_end_offset
;
5927 off
= section_end_offset
;
5930 // Create a stub group for any ungrouped sections.
5931 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5933 gold_assert(group_end
!= this->input_sections().end());
5934 this->create_stub_group(group_begin
, group_end
,
5935 (state
== FINDING_STUB_SECTION
5938 target
, &new_relaxed_sections
, task
);
5941 // Convert input section into relaxed input section in a batch.
5942 if (!new_relaxed_sections
.empty())
5943 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5945 // Update the section offsets
5946 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5948 Arm_relobj
<big_endian
>* arm_relobj
=
5949 Arm_relobj
<big_endian
>::as_arm_relobj(
5950 new_relaxed_sections
[i
]->relobj());
5951 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5952 // Tell Arm_relobj that this input section is converted.
5953 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5957 // Append non empty text sections in this to LIST in ascending
5958 // order of their position in this.
5960 template<bool big_endian
>
5962 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5963 Text_section_list
* list
)
5965 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5967 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5968 p
!= this->input_sections().end();
5971 // We only care about plain or relaxed input sections. We also
5972 // ignore any merged sections.
5973 if (p
->is_input_section() || p
->is_relaxed_input_section())
5974 list
->push_back(Text_section_list::value_type(p
->relobj(),
5979 template<bool big_endian
>
5981 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5983 const Text_section_list
& sorted_text_sections
,
5984 Symbol_table
* symtab
,
5985 bool merge_exidx_entries
,
5988 // We should only do this for the EXIDX output section.
5989 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5991 // We don't want the relaxation loop to undo these changes, so we discard
5992 // the current saved states and take another one after the fix-up.
5993 this->discard_states();
5995 // Remove all input sections.
5996 uint64_t address
= this->address();
5997 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5998 Input_section_list input_sections
;
5999 this->reset_address_and_file_offset();
6000 this->get_input_sections(address
, std::string(""), &input_sections
);
6002 if (!this->input_sections().empty())
6003 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
6005 // Go through all the known input sections and record them.
6006 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
6007 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
6008 Section_id_hash
> Text_to_exidx_map
;
6009 Text_to_exidx_map text_to_exidx_map
;
6010 for (Input_section_list::const_iterator p
= input_sections
.begin();
6011 p
!= input_sections
.end();
6014 // This should never happen. At this point, we should only see
6015 // plain EXIDX input sections.
6016 gold_assert(!p
->is_relaxed_input_section());
6017 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
6020 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
6022 // Go over the sorted text sections.
6023 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
6024 Section_id_set processed_input_sections
;
6025 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
6026 p
!= sorted_text_sections
.end();
6029 Relobj
* relobj
= p
->first
;
6030 unsigned int shndx
= p
->second
;
6032 Arm_relobj
<big_endian
>* arm_relobj
=
6033 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
6034 const Arm_exidx_input_section
* exidx_input_section
=
6035 arm_relobj
->exidx_input_section_by_link(shndx
);
6037 // If this text section has no EXIDX section or if the EXIDX section
6038 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
6039 // of the last seen EXIDX section.
6040 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
6042 exidx_fixup
.add_exidx_cantunwind_as_needed();
6046 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
6047 unsigned int exidx_shndx
= exidx_input_section
->shndx();
6048 Section_id
sid(exidx_relobj
, exidx_shndx
);
6049 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
6050 if (iter
== text_to_exidx_map
.end())
6052 // This is odd. We have not seen this EXIDX input section before.
6053 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
6054 // issue a warning instead. We assume the user knows what he
6055 // or she is doing. Otherwise, this is an error.
6056 if (layout
->script_options()->saw_sections_clause())
6057 gold_warning(_("unwinding may not work because EXIDX input section"
6058 " %u of %s is not in EXIDX output section"),
6059 exidx_shndx
, exidx_relobj
->name().c_str());
6061 gold_error(_("unwinding may not work because EXIDX input section"
6062 " %u of %s is not in EXIDX output section"),
6063 exidx_shndx
, exidx_relobj
->name().c_str());
6065 exidx_fixup
.add_exidx_cantunwind_as_needed();
6069 // We need to access the contents of the EXIDX section, lock the
6071 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
6072 section_size_type exidx_size
;
6073 const unsigned char* exidx_contents
=
6074 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
6076 // Fix up coverage and append input section to output data list.
6077 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
6078 uint32_t deleted_bytes
=
6079 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
6082 §ion_offset_map
);
6084 if (deleted_bytes
== exidx_input_section
->size())
6086 // The whole EXIDX section got merged. Remove it from output.
6087 gold_assert(section_offset_map
== NULL
);
6088 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
6090 // All local symbols defined in this input section will be dropped.
6091 // We need to adjust output local symbol count.
6092 arm_relobj
->set_output_local_symbol_count_needs_update();
6094 else if (deleted_bytes
> 0)
6096 // Some entries are merged. We need to convert this EXIDX input
6097 // section into a relaxed section.
6098 gold_assert(section_offset_map
!= NULL
);
6100 Arm_exidx_merged_section
* merged_section
=
6101 new Arm_exidx_merged_section(*exidx_input_section
,
6102 *section_offset_map
, deleted_bytes
);
6103 merged_section
->build_contents(exidx_contents
, exidx_size
);
6105 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
6106 this->add_relaxed_input_section(layout
, merged_section
, secname
);
6107 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
6109 // All local symbols defined in discarded portions of this input
6110 // section will be dropped. We need to adjust output local symbol
6112 arm_relobj
->set_output_local_symbol_count_needs_update();
6116 // Just add back the EXIDX input section.
6117 gold_assert(section_offset_map
== NULL
);
6118 const Output_section::Input_section
* pis
= iter
->second
;
6119 gold_assert(pis
->is_input_section());
6120 this->add_script_input_section(*pis
);
6123 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
6126 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6127 exidx_fixup
.add_exidx_cantunwind_as_needed();
6129 // Remove any known EXIDX input sections that are not processed.
6130 for (Input_section_list::const_iterator p
= input_sections
.begin();
6131 p
!= input_sections
.end();
6134 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
6135 == processed_input_sections
.end())
6137 // We discard a known EXIDX section because its linked
6138 // text section has been folded by ICF. We also discard an
6139 // EXIDX section with error, the output does not matter in this
6140 // case. We do this to avoid triggering asserts.
6141 Arm_relobj
<big_endian
>* arm_relobj
=
6142 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6143 const Arm_exidx_input_section
* exidx_input_section
=
6144 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
6145 gold_assert(exidx_input_section
!= NULL
);
6146 if (!exidx_input_section
->has_errors())
6148 unsigned int text_shndx
= exidx_input_section
->link();
6149 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
6152 // Remove this from link. We also need to recount the
6154 p
->relobj()->set_output_section(p
->shndx(), NULL
);
6155 arm_relobj
->set_output_local_symbol_count_needs_update();
6159 // Link exidx output section to the first seen output section and
6160 // set correct entry size.
6161 this->set_link_section(exidx_fixup
.first_output_text_section());
6162 this->set_entsize(8);
6164 // Make changes permanent.
6165 this->save_states();
6166 this->set_section_offsets_need_adjustment();
6169 // Link EXIDX output sections to text output sections.
6171 template<bool big_endian
>
6173 Arm_output_section
<big_endian
>::set_exidx_section_link()
6175 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6176 if (!this->input_sections().empty())
6178 Input_section_list::const_iterator p
= this->input_sections().begin();
6179 Arm_relobj
<big_endian
>* arm_relobj
=
6180 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6181 unsigned exidx_shndx
= p
->shndx();
6182 const Arm_exidx_input_section
* exidx_input_section
=
6183 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6184 gold_assert(exidx_input_section
!= NULL
);
6185 unsigned int text_shndx
= exidx_input_section
->link();
6186 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6187 this->set_link_section(os
);
6191 // Arm_relobj methods.
6193 // Determine if an input section is scannable for stub processing. SHDR is
6194 // the header of the section and SHNDX is the section index. OS is the output
6195 // section for the input section and SYMTAB is the global symbol table used to
6196 // look up ICF information.
6198 template<bool big_endian
>
6200 Arm_relobj
<big_endian
>::section_is_scannable(
6201 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6203 const Output_section
* os
,
6204 const Symbol_table
* symtab
)
6206 // Skip any empty sections, unallocated sections or sections whose
6207 // type are not SHT_PROGBITS.
6208 if (shdr
.get_sh_size() == 0
6209 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6210 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6213 // Skip any discarded or ICF'ed sections.
6214 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6217 // If this requires special offset handling, check to see if it is
6218 // a relaxed section. If this is not, then it is a merged section that
6219 // we cannot handle.
6220 if (this->is_output_section_offset_invalid(shndx
))
6222 const Output_relaxed_input_section
* poris
=
6223 os
->find_relaxed_input_section(this, shndx
);
6231 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6232 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6234 template<bool big_endian
>
6236 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6237 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6238 const Relobj::Output_sections
& out_sections
,
6239 const Symbol_table
* symtab
,
6240 const unsigned char* pshdrs
)
6242 unsigned int sh_type
= shdr
.get_sh_type();
6243 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6246 // Ignore empty section.
6247 off_t sh_size
= shdr
.get_sh_size();
6251 // Ignore reloc section with unexpected symbol table. The
6252 // error will be reported in the final link.
6253 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6256 unsigned int reloc_size
;
6257 if (sh_type
== elfcpp::SHT_REL
)
6258 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6260 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6262 // Ignore reloc section with unexpected entsize or uneven size.
6263 // The error will be reported in the final link.
6264 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6267 // Ignore reloc section with bad info. This error will be
6268 // reported in the final link.
6269 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6270 if (index
>= this->shnum())
6273 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6274 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6275 return this->section_is_scannable(text_shdr
, index
,
6276 out_sections
[index
], symtab
);
6279 // Return the output address of either a plain input section or a relaxed
6280 // input section. SHNDX is the section index. We define and use this
6281 // instead of calling Output_section::output_address because that is slow
6282 // for large output.
6284 template<bool big_endian
>
6286 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6290 if (this->is_output_section_offset_invalid(shndx
))
6292 const Output_relaxed_input_section
* poris
=
6293 os
->find_relaxed_input_section(this, shndx
);
6294 // We do not handle merged sections here.
6295 gold_assert(poris
!= NULL
);
6296 return poris
->address();
6299 return os
->address() + this->get_output_section_offset(shndx
);
6302 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6303 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6305 template<bool big_endian
>
6307 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6308 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6311 const Symbol_table
* symtab
)
6313 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6316 // If the section does not cross any 4K-boundaries, it does not need to
6318 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6319 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6325 // Scan a section for Cortex-A8 workaround.
6327 template<bool big_endian
>
6329 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6330 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6333 Target_arm
<big_endian
>* arm_target
)
6335 // Look for the first mapping symbol in this section. It should be
6337 Mapping_symbol_position
section_start(shndx
, 0);
6338 typename
Mapping_symbols_info::const_iterator p
=
6339 this->mapping_symbols_info_
.lower_bound(section_start
);
6341 // There are no mapping symbols for this section. Treat it as a data-only
6343 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6346 Arm_address output_address
=
6347 this->simple_input_section_output_address(shndx
, os
);
6349 // Get the section contents.
6350 section_size_type input_view_size
= 0;
6351 const unsigned char* input_view
=
6352 this->section_contents(shndx
, &input_view_size
, false);
6354 // We need to go through the mapping symbols to determine what to
6355 // scan. There are two reasons. First, we should look at THUMB code and
6356 // THUMB code only. Second, we only want to look at the 4K-page boundary
6357 // to speed up the scanning.
6359 while (p
!= this->mapping_symbols_info_
.end()
6360 && p
->first
.first
== shndx
)
6362 typename
Mapping_symbols_info::const_iterator next
=
6363 this->mapping_symbols_info_
.upper_bound(p
->first
);
6365 // Only scan part of a section with THUMB code.
6366 if (p
->second
== 't')
6368 // Determine the end of this range.
6369 section_size_type span_start
=
6370 convert_to_section_size_type(p
->first
.second
);
6371 section_size_type span_end
;
6372 if (next
!= this->mapping_symbols_info_
.end()
6373 && next
->first
.first
== shndx
)
6374 span_end
= convert_to_section_size_type(next
->first
.second
);
6376 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6378 if (((span_start
+ output_address
) & ~0xfffUL
)
6379 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6381 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6382 span_start
, span_end
,
6392 // Scan relocations for stub generation.
6394 template<bool big_endian
>
6396 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6397 Target_arm
<big_endian
>* arm_target
,
6398 const Symbol_table
* symtab
,
6399 const Layout
* layout
)
6401 unsigned int shnum
= this->shnum();
6402 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6404 // Read the section headers.
6405 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6409 // To speed up processing, we set up hash tables for fast lookup of
6410 // input offsets to output addresses.
6411 this->initialize_input_to_output_maps();
6413 const Relobj::Output_sections
& out_sections(this->output_sections());
6415 Relocate_info
<32, big_endian
> relinfo
;
6416 relinfo
.symtab
= symtab
;
6417 relinfo
.layout
= layout
;
6418 relinfo
.object
= this;
6420 // Do relocation stubs scanning.
6421 const unsigned char* p
= pshdrs
+ shdr_size
;
6422 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6424 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6425 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6428 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6429 Arm_address output_offset
= this->get_output_section_offset(index
);
6430 Arm_address output_address
;
6431 if (output_offset
!= invalid_address
)
6432 output_address
= out_sections
[index
]->address() + output_offset
;
6435 // Currently this only happens for a relaxed section.
6436 const Output_relaxed_input_section
* poris
=
6437 out_sections
[index
]->find_relaxed_input_section(this, index
);
6438 gold_assert(poris
!= NULL
);
6439 output_address
= poris
->address();
6442 // Get the relocations.
6443 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6447 // Get the section contents. This does work for the case in which
6448 // we modify the contents of an input section. We need to pass the
6449 // output view under such circumstances.
6450 section_size_type input_view_size
= 0;
6451 const unsigned char* input_view
=
6452 this->section_contents(index
, &input_view_size
, false);
6454 relinfo
.reloc_shndx
= i
;
6455 relinfo
.data_shndx
= index
;
6456 unsigned int sh_type
= shdr
.get_sh_type();
6457 unsigned int reloc_size
;
6458 if (sh_type
== elfcpp::SHT_REL
)
6459 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6461 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6463 Output_section
* os
= out_sections
[index
];
6464 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6465 shdr
.get_sh_size() / reloc_size
,
6467 output_offset
== invalid_address
,
6468 input_view
, output_address
,
6473 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6474 // after its relocation section, if there is one, is processed for
6475 // relocation stubs. Merging this loop with the one above would have been
6476 // complicated since we would have had to make sure that relocation stub
6477 // scanning is done first.
6478 if (arm_target
->fix_cortex_a8())
6480 const unsigned char* p
= pshdrs
+ shdr_size
;
6481 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6483 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6484 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6487 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6492 // After we've done the relocations, we release the hash tables,
6493 // since we no longer need them.
6494 this->free_input_to_output_maps();
6497 // Count the local symbols. The ARM backend needs to know if a symbol
6498 // is a THUMB function or not. For global symbols, it is easy because
6499 // the Symbol object keeps the ELF symbol type. For local symbol it is
6500 // harder because we cannot access this information. So we override the
6501 // do_count_local_symbol in parent and scan local symbols to mark
6502 // THUMB functions. This is not the most efficient way but I do not want to
6503 // slow down other ports by calling a per symbol target hook inside
6504 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6506 template<bool big_endian
>
6508 Arm_relobj
<big_endian
>::do_count_local_symbols(
6509 Stringpool_template
<char>* pool
,
6510 Stringpool_template
<char>* dynpool
)
6512 // We need to fix-up the values of any local symbols whose type are
6515 // Ask parent to count the local symbols.
6516 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6517 const unsigned int loccount
= this->local_symbol_count();
6521 // Initialize the thumb function bit-vector.
6522 std::vector
<bool> empty_vector(loccount
, false);
6523 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6525 // Read the symbol table section header.
6526 const unsigned int symtab_shndx
= this->symtab_shndx();
6527 elfcpp::Shdr
<32, big_endian
>
6528 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6529 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6531 // Read the local symbols.
6532 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6533 gold_assert(loccount
== symtabshdr
.get_sh_info());
6534 off_t locsize
= loccount
* sym_size
;
6535 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6536 locsize
, true, true);
6538 // For mapping symbol processing, we need to read the symbol names.
6539 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6540 if (strtab_shndx
>= this->shnum())
6542 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6546 elfcpp::Shdr
<32, big_endian
>
6547 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6548 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6550 this->error(_("symbol table name section has wrong type: %u"),
6551 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6554 const char* pnames
=
6555 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6556 strtabshdr
.get_sh_size(),
6559 // Loop over the local symbols and mark any local symbols pointing
6560 // to THUMB functions.
6562 // Skip the first dummy symbol.
6564 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6565 this->local_values();
6566 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6568 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6569 elfcpp::STT st_type
= sym
.get_st_type();
6570 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6571 Arm_address input_value
= lv
.input_value();
6573 // Check to see if this is a mapping symbol.
6574 const char* sym_name
= pnames
+ sym
.get_st_name();
6575 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6578 unsigned int input_shndx
=
6579 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6580 gold_assert(is_ordinary
);
6582 // Strip of LSB in case this is a THUMB symbol.
6583 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6584 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6587 if (st_type
== elfcpp::STT_ARM_TFUNC
6588 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6590 // This is a THUMB function. Mark this and canonicalize the
6591 // symbol value by setting LSB.
6592 this->local_symbol_is_thumb_function_
[i
] = true;
6593 if ((input_value
& 1) == 0)
6594 lv
.set_input_value(input_value
| 1);
6599 // Relocate sections.
6600 template<bool big_endian
>
6602 Arm_relobj
<big_endian
>::do_relocate_sections(
6603 const Symbol_table
* symtab
,
6604 const Layout
* layout
,
6605 const unsigned char* pshdrs
,
6607 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6609 // Relocate the section data.
6610 this->relocate_section_range(symtab
, layout
, pshdrs
, of
, pviews
,
6611 1, this->shnum() - 1);
6613 // We do not generate stubs if doing a relocatable link.
6614 if (parameters
->options().relocatable())
6617 // Relocate stub tables.
6618 unsigned int shnum
= this->shnum();
6620 Target_arm
<big_endian
>* arm_target
=
6621 Target_arm
<big_endian
>::default_target();
6623 Relocate_info
<32, big_endian
> relinfo
;
6624 relinfo
.symtab
= symtab
;
6625 relinfo
.layout
= layout
;
6626 relinfo
.object
= this;
6628 for (unsigned int i
= 1; i
< shnum
; ++i
)
6630 Arm_input_section
<big_endian
>* arm_input_section
=
6631 arm_target
->find_arm_input_section(this, i
);
6633 if (arm_input_section
!= NULL
6634 && arm_input_section
->is_stub_table_owner()
6635 && !arm_input_section
->stub_table()->empty())
6637 // We cannot discard a section if it owns a stub table.
6638 Output_section
* os
= this->output_section(i
);
6639 gold_assert(os
!= NULL
);
6641 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6642 relinfo
.reloc_shdr
= NULL
;
6643 relinfo
.data_shndx
= i
;
6644 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6646 gold_assert((*pviews
)[i
].view
!= NULL
);
6648 // We are passed the output section view. Adjust it to cover the
6650 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6651 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6652 && ((stub_table
->address() + stub_table
->data_size())
6653 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6655 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6656 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6657 Arm_address address
= stub_table
->address();
6658 section_size_type view_size
= stub_table
->data_size();
6660 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6664 // Apply Cortex A8 workaround if applicable.
6665 if (this->section_has_cortex_a8_workaround(i
))
6667 unsigned char* view
= (*pviews
)[i
].view
;
6668 Arm_address view_address
= (*pviews
)[i
].address
;
6669 section_size_type view_size
= (*pviews
)[i
].view_size
;
6670 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6672 // Adjust view to cover section.
6673 Output_section
* os
= this->output_section(i
);
6674 gold_assert(os
!= NULL
);
6675 Arm_address section_address
=
6676 this->simple_input_section_output_address(i
, os
);
6677 uint64_t section_size
= this->section_size(i
);
6679 gold_assert(section_address
>= view_address
6680 && ((section_address
+ section_size
)
6681 <= (view_address
+ view_size
)));
6683 unsigned char* section_view
= view
+ (section_address
- view_address
);
6685 // Apply the Cortex-A8 workaround to the output address range
6686 // corresponding to this input section.
6687 stub_table
->apply_cortex_a8_workaround_to_address_range(
6694 if (parameters
->options().be8())
6696 section_size_type span_start
, span_end
;
6697 elfcpp::Shdr
<32, big_endian
>
6698 shdr(pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
);
6699 Mapping_symbol_position
section_start(i
, 0);
6700 typename
Mapping_symbols_info::const_iterator p
=
6701 this->mapping_symbols_info_
.lower_bound(section_start
);
6702 unsigned char* view
= (*pviews
)[i
].view
;
6703 Arm_address view_address
= (*pviews
)[i
].address
;
6704 section_size_type view_size
= (*pviews
)[i
].view_size
;
6705 while (p
!= this->mapping_symbols_info_
.end()
6706 && p
->first
.first
== i
)
6708 typename
Mapping_symbols_info::const_iterator next
=
6709 this->mapping_symbols_info_
.upper_bound(p
->first
);
6711 // Only swap arm or thumb code.
6712 if ((p
->second
== 'a') || (p
->second
== 't'))
6714 Output_section
* os
= this->output_section(i
);
6715 gold_assert(os
!= NULL
);
6716 Arm_address section_address
=
6717 this->simple_input_section_output_address(i
, os
);
6718 span_start
= convert_to_section_size_type(p
->first
.second
);
6719 if (next
!= this->mapping_symbols_info_
.end()
6720 && next
->first
.first
== i
)
6722 convert_to_section_size_type(next
->first
.second
);
6725 convert_to_section_size_type(shdr
.get_sh_size());
6726 unsigned char* section_view
=
6727 view
+ (section_address
- view_address
);
6728 uint64_t section_size
= this->section_size(i
);
6730 gold_assert(section_address
>= view_address
6731 && ((section_address
+ section_size
)
6732 <= (view_address
+ view_size
)));
6734 // Set Output view for swapping
6735 unsigned char *oview
= section_view
+ span_start
;
6736 unsigned int index
= 0;
6737 if (p
->second
== 'a')
6739 while (index
+ 3 < (span_end
- span_start
))
6741 typedef typename
elfcpp::Swap
<32, big_endian
>
6744 reinterpret_cast<Valtype
*>(oview
+index
);
6745 uint32_t val
= elfcpp::Swap
<32, false>::readval(wv
);
6746 elfcpp::Swap
<32, true>::writeval(wv
, val
);
6750 else if (p
->second
== 't')
6752 while (index
+ 1 < (span_end
- span_start
))
6754 typedef typename
elfcpp::Swap
<16, big_endian
>
6757 reinterpret_cast<Valtype
*>(oview
+index
);
6758 uint16_t val
= elfcpp::Swap
<16, false>::readval(wv
);
6759 elfcpp::Swap
<16, true>::writeval(wv
, val
);
6770 // Find the linked text section of an EXIDX section by looking at the first
6771 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6772 // must be linked to its associated code section via the sh_link field of
6773 // its section header. However, some tools are broken and the link is not
6774 // always set. LD just drops such an EXIDX section silently, causing the
6775 // associated code not unwindabled. Here we try a little bit harder to
6776 // discover the linked code section.
6778 // PSHDR points to the section header of a relocation section of an EXIDX
6779 // section. If we can find a linked text section, return true and
6780 // store the text section index in the location PSHNDX. Otherwise
6783 template<bool big_endian
>
6785 Arm_relobj
<big_endian
>::find_linked_text_section(
6786 const unsigned char* pshdr
,
6787 const unsigned char* psyms
,
6788 unsigned int* pshndx
)
6790 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6792 // If there is no relocation, we cannot find the linked text section.
6794 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6795 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6797 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6798 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6800 // Get the relocations.
6801 const unsigned char* prelocs
=
6802 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6804 // Find the REL31 relocation for the first word of the first EXIDX entry.
6805 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6807 Arm_address r_offset
;
6808 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6809 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6811 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6812 r_info
= reloc
.get_r_info();
6813 r_offset
= reloc
.get_r_offset();
6817 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6818 r_info
= reloc
.get_r_info();
6819 r_offset
= reloc
.get_r_offset();
6822 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6823 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6826 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6828 || r_sym
>= this->local_symbol_count()
6832 // This is the relocation for the first word of the first EXIDX entry.
6833 // We expect to see a local section symbol.
6834 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6835 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6836 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6840 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6841 gold_assert(is_ordinary
);
6851 // Make an EXIDX input section object for an EXIDX section whose index is
6852 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6853 // is the section index of the linked text section.
6855 template<bool big_endian
>
6857 Arm_relobj
<big_endian
>::make_exidx_input_section(
6859 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6860 unsigned int text_shndx
,
6861 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6863 // Create an Arm_exidx_input_section object for this EXIDX section.
6864 Arm_exidx_input_section
* exidx_input_section
=
6865 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6866 shdr
.get_sh_addralign(),
6867 text_shdr
.get_sh_size());
6869 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6870 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6872 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6874 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6875 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6876 this->name().c_str());
6877 exidx_input_section
->set_has_errors();
6879 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6881 unsigned other_exidx_shndx
=
6882 this->exidx_section_map_
[text_shndx
]->shndx();
6883 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6885 this->section_name(shndx
).c_str(), shndx
,
6886 this->section_name(other_exidx_shndx
).c_str(),
6887 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6888 text_shndx
, this->name().c_str());
6889 exidx_input_section
->set_has_errors();
6892 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6894 // Check section flags of text section.
6895 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6897 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6899 this->section_name(shndx
).c_str(), shndx
,
6900 this->section_name(text_shndx
).c_str(), text_shndx
,
6901 this->name().c_str());
6902 exidx_input_section
->set_has_errors();
6904 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6905 // I would like to make this an error but currently ld just ignores
6907 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6909 this->section_name(shndx
).c_str(), shndx
,
6910 this->section_name(text_shndx
).c_str(), text_shndx
,
6911 this->name().c_str());
6914 // Read the symbol information.
6916 template<bool big_endian
>
6918 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6920 // Call parent class to read symbol information.
6921 this->base_read_symbols(sd
);
6923 // If this input file is a binary file, it has no processor
6924 // specific flags and attributes section.
6925 Input_file::Format format
= this->input_file()->format();
6926 if (format
!= Input_file::FORMAT_ELF
)
6928 gold_assert(format
== Input_file::FORMAT_BINARY
);
6929 this->merge_flags_and_attributes_
= false;
6933 // Read processor-specific flags in ELF file header.
6934 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6935 elfcpp::Elf_sizes
<32>::ehdr_size
,
6937 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6938 this->processor_specific_flags_
= ehdr
.get_e_flags();
6940 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6942 std::vector
<unsigned int> deferred_exidx_sections
;
6943 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6944 const unsigned char* pshdrs
= sd
->section_headers
->data();
6945 const unsigned char* ps
= pshdrs
+ shdr_size
;
6946 bool must_merge_flags_and_attributes
= false;
6947 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6949 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6951 // Sometimes an object has no contents except the section name string
6952 // table and an empty symbol table with the undefined symbol. We
6953 // don't want to merge processor-specific flags from such an object.
6954 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6956 // Symbol table is not empty.
6957 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6958 elfcpp::Elf_sizes
<32>::sym_size
;
6959 if (shdr
.get_sh_size() > sym_size
)
6960 must_merge_flags_and_attributes
= true;
6962 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6963 // If this is neither an empty symbol table nor a string table,
6965 must_merge_flags_and_attributes
= true;
6967 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6969 gold_assert(this->attributes_section_data_
== NULL
);
6970 section_offset_type section_offset
= shdr
.get_sh_offset();
6971 section_size_type section_size
=
6972 convert_to_section_size_type(shdr
.get_sh_size());
6973 const unsigned char* view
=
6974 this->get_view(section_offset
, section_size
, true, false);
6975 this->attributes_section_data_
=
6976 new Attributes_section_data(view
, section_size
);
6978 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6980 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6981 if (text_shndx
== elfcpp::SHN_UNDEF
)
6982 deferred_exidx_sections
.push_back(i
);
6985 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6986 + text_shndx
* shdr_size
);
6987 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6989 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6990 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6991 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6992 this->section_name(i
).c_str(), this->name().c_str());
6997 if (!must_merge_flags_and_attributes
)
6999 gold_assert(deferred_exidx_sections
.empty());
7000 this->merge_flags_and_attributes_
= false;
7004 // Some tools are broken and they do not set the link of EXIDX sections.
7005 // We look at the first relocation to figure out the linked sections.
7006 if (!deferred_exidx_sections
.empty())
7008 // We need to go over the section headers again to find the mapping
7009 // from sections being relocated to their relocation sections. This is
7010 // a bit inefficient as we could do that in the loop above. However,
7011 // we do not expect any deferred EXIDX sections normally. So we do not
7012 // want to slow down the most common path.
7013 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
7014 Reloc_map reloc_map
;
7015 ps
= pshdrs
+ shdr_size
;
7016 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
7018 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7019 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
7020 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
7022 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
7023 if (info_shndx
>= this->shnum())
7024 gold_error(_("relocation section %u has invalid info %u"),
7026 Reloc_map::value_type
value(info_shndx
, i
);
7027 std::pair
<Reloc_map::iterator
, bool> result
=
7028 reloc_map
.insert(value
);
7030 gold_error(_("section %u has multiple relocation sections "
7032 info_shndx
, i
, reloc_map
[info_shndx
]);
7036 // Read the symbol table section header.
7037 const unsigned int symtab_shndx
= this->symtab_shndx();
7038 elfcpp::Shdr
<32, big_endian
>
7039 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
7040 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
7042 // Read the local symbols.
7043 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
7044 const unsigned int loccount
= this->local_symbol_count();
7045 gold_assert(loccount
== symtabshdr
.get_sh_info());
7046 off_t locsize
= loccount
* sym_size
;
7047 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
7048 locsize
, true, true);
7050 // Process the deferred EXIDX sections.
7051 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
7053 unsigned int shndx
= deferred_exidx_sections
[i
];
7054 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
7055 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
7056 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
7057 if (it
!= reloc_map
.end())
7058 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
7059 psyms
, &text_shndx
);
7060 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
7061 + text_shndx
* shdr_size
);
7062 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
7067 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
7068 // sections for unwinding. These sections are referenced implicitly by
7069 // text sections linked in the section headers. If we ignore these implicit
7070 // references, the .ARM.exidx sections and any .ARM.extab sections they use
7071 // will be garbage-collected incorrectly. Hence we override the same function
7072 // in the base class to handle these implicit references.
7074 template<bool big_endian
>
7076 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
7078 Read_relocs_data
* rd
)
7080 // First, call base class method to process relocations in this object.
7081 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
7083 // If --gc-sections is not specified, there is nothing more to do.
7084 // This happens when --icf is used but --gc-sections is not.
7085 if (!parameters
->options().gc_sections())
7088 unsigned int shnum
= this->shnum();
7089 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7090 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
7094 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
7095 // to these from the linked text sections.
7096 const unsigned char* ps
= pshdrs
+ shdr_size
;
7097 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
7099 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7100 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
7102 // Found an .ARM.exidx section, add it to the set of reachable
7103 // sections from its linked text section.
7104 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
7105 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
7110 // Update output local symbol count. Owing to EXIDX entry merging, some local
7111 // symbols will be removed in output. Adjust output local symbol count
7112 // accordingly. We can only changed the static output local symbol count. It
7113 // is too late to change the dynamic symbols.
7115 template<bool big_endian
>
7117 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
7119 // Caller should check that this needs updating. We want caller checking
7120 // because output_local_symbol_count_needs_update() is most likely inlined.
7121 gold_assert(this->output_local_symbol_count_needs_update_
);
7123 gold_assert(this->symtab_shndx() != -1U);
7124 if (this->symtab_shndx() == 0)
7126 // This object has no symbols. Weird but legal.
7130 // Read the symbol table section header.
7131 const unsigned int symtab_shndx
= this->symtab_shndx();
7132 elfcpp::Shdr
<32, big_endian
>
7133 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
7134 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
7136 // Read the local symbols.
7137 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
7138 const unsigned int loccount
= this->local_symbol_count();
7139 gold_assert(loccount
== symtabshdr
.get_sh_info());
7140 off_t locsize
= loccount
* sym_size
;
7141 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
7142 locsize
, true, true);
7144 // Loop over the local symbols.
7146 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
7148 const Output_sections
& out_sections(this->output_sections());
7149 unsigned int shnum
= this->shnum();
7150 unsigned int count
= 0;
7151 // Skip the first, dummy, symbol.
7153 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
7155 elfcpp::Sym
<32, big_endian
> sym(psyms
);
7157 Symbol_value
<32>& lv((*this->local_values())[i
]);
7159 // This local symbol was already discarded by do_count_local_symbols.
7160 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
7164 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
7169 Output_section
* os
= out_sections
[shndx
];
7171 // This local symbol no longer has an output section. Discard it.
7174 lv
.set_no_output_symtab_entry();
7178 // Currently we only discard parts of EXIDX input sections.
7179 // We explicitly check for a merged EXIDX input section to avoid
7180 // calling Output_section_data::output_offset unless necessary.
7181 if ((this->get_output_section_offset(shndx
) == invalid_address
)
7182 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
7184 section_offset_type output_offset
=
7185 os
->output_offset(this, shndx
, lv
.input_value());
7186 if (output_offset
== -1)
7188 // This symbol is defined in a part of an EXIDX input section
7189 // that is discarded due to entry merging.
7190 lv
.set_no_output_symtab_entry();
7199 this->set_output_local_symbol_count(count
);
7200 this->output_local_symbol_count_needs_update_
= false;
7203 // Arm_dynobj methods.
7205 // Read the symbol information.
7207 template<bool big_endian
>
7209 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
7211 // Call parent class to read symbol information.
7212 this->base_read_symbols(sd
);
7214 // Read processor-specific flags in ELF file header.
7215 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
7216 elfcpp::Elf_sizes
<32>::ehdr_size
,
7218 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
7219 this->processor_specific_flags_
= ehdr
.get_e_flags();
7221 // Read the attributes section if there is one.
7222 // We read from the end because gas seems to put it near the end of
7223 // the section headers.
7224 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7225 const unsigned char* ps
=
7226 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
7227 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
7229 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7230 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
7232 section_offset_type section_offset
= shdr
.get_sh_offset();
7233 section_size_type section_size
=
7234 convert_to_section_size_type(shdr
.get_sh_size());
7235 const unsigned char* view
=
7236 this->get_view(section_offset
, section_size
, true, false);
7237 this->attributes_section_data_
=
7238 new Attributes_section_data(view
, section_size
);
7244 // Stub_addend_reader methods.
7246 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7248 template<bool big_endian
>
7249 elfcpp::Elf_types
<32>::Elf_Swxword
7250 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7251 unsigned int r_type
,
7252 const unsigned char* view
,
7253 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7255 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7259 case elfcpp::R_ARM_CALL
:
7260 case elfcpp::R_ARM_JUMP24
:
7261 case elfcpp::R_ARM_PLT32
:
7263 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7264 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7265 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7266 return Bits
<26>::sign_extend32(val
<< 2);
7269 case elfcpp::R_ARM_THM_CALL
:
7270 case elfcpp::R_ARM_THM_JUMP24
:
7271 case elfcpp::R_ARM_THM_XPC22
:
7273 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7274 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7275 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7276 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7277 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7280 case elfcpp::R_ARM_THM_JUMP19
:
7282 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7283 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7284 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7285 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7286 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7294 // Arm_output_data_got methods.
7296 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7297 // The first one is initialized to be 1, which is the module index for
7298 // the main executable and the second one 0. A reloc of the type
7299 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7300 // be applied by gold. GSYM is a global symbol.
7302 template<bool big_endian
>
7304 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7305 unsigned int got_type
,
7308 if (gsym
->has_got_offset(got_type
))
7311 // We are doing a static link. Just mark it as belong to module 1,
7313 unsigned int got_offset
= this->add_constant(1);
7314 gsym
->set_got_offset(got_type
, got_offset
);
7315 got_offset
= this->add_constant(0);
7316 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7317 elfcpp::R_ARM_TLS_DTPOFF32
,
7321 // Same as the above but for a local symbol.
7323 template<bool big_endian
>
7325 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7326 unsigned int got_type
,
7327 Sized_relobj_file
<32, big_endian
>* object
,
7330 if (object
->local_has_got_offset(index
, got_type
))
7333 // We are doing a static link. Just mark it as belong to module 1,
7335 unsigned int got_offset
= this->add_constant(1);
7336 object
->set_local_got_offset(index
, got_type
, got_offset
);
7337 got_offset
= this->add_constant(0);
7338 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7339 elfcpp::R_ARM_TLS_DTPOFF32
,
7343 template<bool big_endian
>
7345 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7347 // Call parent to write out GOT.
7348 Output_data_got
<32, big_endian
>::do_write(of
);
7350 // We are done if there is no fix up.
7351 if (this->static_relocs_
.empty())
7354 gold_assert(parameters
->doing_static_link());
7356 const off_t offset
= this->offset();
7357 const section_size_type oview_size
=
7358 convert_to_section_size_type(this->data_size());
7359 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7361 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7362 gold_assert(tls_segment
!= NULL
);
7364 // The thread pointer $tp points to the TCB, which is followed by the
7365 // TLS. So we need to adjust $tp relative addressing by this amount.
7366 Arm_address aligned_tcb_size
=
7367 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7369 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7371 Static_reloc
& reloc(this->static_relocs_
[i
]);
7374 if (!reloc
.symbol_is_global())
7376 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7377 const Symbol_value
<32>* psymval
=
7378 reloc
.relobj()->local_symbol(reloc
.index());
7380 // We are doing static linking. Issue an error and skip this
7381 // relocation if the symbol is undefined or in a discarded_section.
7383 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7384 if ((shndx
== elfcpp::SHN_UNDEF
)
7386 && shndx
!= elfcpp::SHN_UNDEF
7387 && !object
->is_section_included(shndx
)
7388 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7390 gold_error(_("undefined or discarded local symbol %u from "
7391 " object %s in GOT"),
7392 reloc
.index(), reloc
.relobj()->name().c_str());
7396 value
= psymval
->value(object
, 0);
7400 const Symbol
* gsym
= reloc
.symbol();
7401 gold_assert(gsym
!= NULL
);
7402 if (gsym
->is_forwarder())
7403 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7405 // We are doing static linking. Issue an error and skip this
7406 // relocation if the symbol is undefined or in a discarded_section
7407 // unless it is a weakly_undefined symbol.
7408 if ((gsym
->is_defined_in_discarded_section()
7409 || gsym
->is_undefined())
7410 && !gsym
->is_weak_undefined())
7412 gold_error(_("undefined or discarded symbol %s in GOT"),
7417 if (!gsym
->is_weak_undefined())
7419 const Sized_symbol
<32>* sym
=
7420 static_cast<const Sized_symbol
<32>*>(gsym
);
7421 value
= sym
->value();
7427 unsigned got_offset
= reloc
.got_offset();
7428 gold_assert(got_offset
< oview_size
);
7430 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7431 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7433 switch (reloc
.r_type())
7435 case elfcpp::R_ARM_TLS_DTPOFF32
:
7438 case elfcpp::R_ARM_TLS_TPOFF32
:
7439 x
= value
+ aligned_tcb_size
;
7444 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7447 of
->write_output_view(offset
, oview_size
, oview
);
7450 // A class to handle the PLT data.
7451 // This is an abstract base class that handles most of the linker details
7452 // but does not know the actual contents of PLT entries. The derived
7453 // classes below fill in those details.
7455 template<bool big_endian
>
7456 class Output_data_plt_arm
: public Output_section_data
7459 // Unlike aarch64, which records symbol value in "addend" field of relocations
7460 // and could be done at the same time an IRelative reloc is created for the
7461 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7462 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7463 // to keep necessary symbol information for later use in do_write. We usually
7464 // have only a very limited number of ifuncs, so the extra data required here
7467 struct IRelative_data
7469 IRelative_data(Sized_symbol
<32>* sized_symbol
)
7470 : symbol_is_global_(true)
7472 u_
.global
= sized_symbol
;
7475 IRelative_data(Sized_relobj_file
<32, big_endian
>* relobj
,
7477 : symbol_is_global_(false)
7479 u_
.local
.relobj
= relobj
;
7480 u_
.local
.index
= index
;
7485 Sized_symbol
<32>* global
;
7489 Sized_relobj_file
<32, big_endian
>* relobj
;
7494 bool symbol_is_global_
;
7497 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7500 Output_data_plt_arm(Layout
* layout
, uint64_t addralign
,
7501 Arm_output_data_got
<big_endian
>* got
,
7502 Output_data_space
* got_plt
,
7503 Output_data_space
* got_irelative
);
7505 // Add an entry to the PLT.
7507 add_entry(Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
);
7509 // Add the relocation for a plt entry.
7511 add_relocation(Symbol_table
* symtab
, Layout
* layout
,
7512 Symbol
* gsym
, unsigned int got_offset
);
7514 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7516 add_local_ifunc_entry(Symbol_table
* symtab
, Layout
*,
7517 Sized_relobj_file
<32, big_endian
>* relobj
,
7518 unsigned int local_sym_index
);
7520 // Return the .rel.plt section data.
7521 const Reloc_section
*
7523 { return this->rel_
; }
7525 // Return the PLT relocation container for IRELATIVE.
7527 rel_irelative(Symbol_table
*, Layout
*);
7529 // Return the number of PLT entries.
7532 { return this->count_
+ this->irelative_count_
; }
7534 // Return the offset of the first non-reserved PLT entry.
7536 first_plt_entry_offset() const
7537 { return this->do_first_plt_entry_offset(); }
7539 // Return the size of a PLT entry.
7541 get_plt_entry_size() const
7542 { return this->do_get_plt_entry_size(); }
7544 // Return the PLT address for globals.
7546 address_for_global(const Symbol
*) const;
7548 // Return the PLT address for locals.
7550 address_for_local(const Relobj
*, unsigned int symndx
) const;
7553 // Fill in the first PLT entry.
7555 fill_first_plt_entry(unsigned char* pov
,
7556 Arm_address got_address
,
7557 Arm_address plt_address
)
7558 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7561 fill_plt_entry(unsigned char* pov
,
7562 Arm_address got_address
,
7563 Arm_address plt_address
,
7564 unsigned int got_offset
,
7565 unsigned int plt_offset
)
7566 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7568 virtual unsigned int
7569 do_first_plt_entry_offset() const = 0;
7571 virtual unsigned int
7572 do_get_plt_entry_size() const = 0;
7575 do_fill_first_plt_entry(unsigned char* pov
,
7576 Arm_address got_address
,
7577 Arm_address plt_address
) = 0;
7580 do_fill_plt_entry(unsigned char* pov
,
7581 Arm_address got_address
,
7582 Arm_address plt_address
,
7583 unsigned int got_offset
,
7584 unsigned int plt_offset
) = 0;
7587 do_adjust_output_section(Output_section
* os
);
7589 // Write to a map file.
7591 do_print_to_mapfile(Mapfile
* mapfile
) const
7592 { mapfile
->print_output_data(this, _("** PLT")); }
7595 // Set the final size.
7597 set_final_data_size()
7599 this->set_data_size(this->first_plt_entry_offset()
7600 + ((this->count_
+ this->irelative_count_
)
7601 * this->get_plt_entry_size()));
7604 // Write out the PLT data.
7606 do_write(Output_file
*);
7608 // Record irelative symbol data.
7609 void insert_irelative_data(const IRelative_data
& idata
)
7610 { irelative_data_vec_
.push_back(idata
); }
7612 // The reloc section.
7613 Reloc_section
* rel_
;
7614 // The IRELATIVE relocs, if necessary. These must follow the
7615 // regular PLT relocations.
7616 Reloc_section
* irelative_rel_
;
7617 // The .got section.
7618 Arm_output_data_got
<big_endian
>* got_
;
7619 // The .got.plt section.
7620 Output_data_space
* got_plt_
;
7621 // The part of the .got.plt section used for IRELATIVE relocs.
7622 Output_data_space
* got_irelative_
;
7623 // The number of PLT entries.
7624 unsigned int count_
;
7625 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7626 // follow the regular PLT entries.
7627 unsigned int irelative_count_
;
7628 // Vector for irelative data.
7629 typedef std::vector
<IRelative_data
> IRelative_data_vec
;
7630 IRelative_data_vec irelative_data_vec_
;
7633 // Create the PLT section. The ordinary .got section is an argument,
7634 // since we need to refer to the start. We also create our own .got
7635 // section just for PLT entries.
7637 template<bool big_endian
>
7638 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(
7639 Layout
* layout
, uint64_t addralign
,
7640 Arm_output_data_got
<big_endian
>* got
,
7641 Output_data_space
* got_plt
,
7642 Output_data_space
* got_irelative
)
7643 : Output_section_data(addralign
), irelative_rel_(NULL
),
7644 got_(got
), got_plt_(got_plt
), got_irelative_(got_irelative
),
7645 count_(0), irelative_count_(0)
7647 this->rel_
= new Reloc_section(false);
7648 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7649 elfcpp::SHF_ALLOC
, this->rel_
,
7650 ORDER_DYNAMIC_PLT_RELOCS
, false);
7653 template<bool big_endian
>
7655 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7660 // Add an entry to the PLT.
7662 template<bool big_endian
>
7664 Output_data_plt_arm
<big_endian
>::add_entry(Symbol_table
* symtab
,
7668 gold_assert(!gsym
->has_plt_offset());
7670 unsigned int* entry_count
;
7671 Output_section_data_build
* got
;
7673 // We have 2 different types of plt entry here, normal and ifunc.
7675 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7676 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7678 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7679 // second 12, third 24 ... etc.
7681 // IFunc plt entries *always* come after *normal* plt entries.
7683 // Notice, when computing the plt address of a certain symbol, "plt_address +
7684 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7685 // target->plt_address_for_local() instead.
7687 int begin_offset
= 0;
7688 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7689 && gsym
->can_use_relative_reloc(false))
7691 entry_count
= &this->irelative_count_
;
7692 got
= this->got_irelative_
;
7693 // For irelative plt entries, offset is relative to the end of normal plt
7694 // entries, so it starts from 0.
7696 // Record symbol information.
7697 this->insert_irelative_data(
7698 IRelative_data(symtab
->get_sized_symbol
<32>(gsym
)));
7702 entry_count
= &this->count_
;
7703 got
= this->got_plt_
;
7704 // Note that for normal plt entries, when setting the PLT offset we skip
7705 // the initial reserved PLT entry.
7706 begin_offset
= this->first_plt_entry_offset();
7709 gsym
->set_plt_offset(begin_offset
7710 + (*entry_count
) * this->get_plt_entry_size());
7714 section_offset_type got_offset
= got
->current_data_size();
7716 // Every PLT entry needs a GOT entry which points back to the PLT
7717 // entry (this will be changed by the dynamic linker, normally
7718 // lazily when the function is called).
7719 got
->set_current_data_size(got_offset
+ 4);
7721 // Every PLT entry needs a reloc.
7722 this->add_relocation(symtab
, layout
, gsym
, got_offset
);
7724 // Note that we don't need to save the symbol. The contents of the
7725 // PLT are independent of which symbols are used. The symbols only
7726 // appear in the relocations.
7729 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7732 template<bool big_endian
>
7734 Output_data_plt_arm
<big_endian
>::add_local_ifunc_entry(
7735 Symbol_table
* symtab
,
7737 Sized_relobj_file
<32, big_endian
>* relobj
,
7738 unsigned int local_sym_index
)
7740 this->insert_irelative_data(IRelative_data(relobj
, local_sym_index
));
7742 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7743 // no longer correct. Use target->plt_address_for_local() instead.
7744 unsigned int plt_offset
= this->irelative_count_
* this->get_plt_entry_size();
7745 ++this->irelative_count_
;
7747 section_offset_type got_offset
= this->got_irelative_
->current_data_size();
7749 // Every PLT entry needs a GOT entry which points back to the PLT
7751 this->got_irelative_
->set_current_data_size(got_offset
+ 4);
7754 // Every PLT entry needs a reloc.
7755 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7756 rel
->add_symbolless_local_addend(relobj
, local_sym_index
,
7757 elfcpp::R_ARM_IRELATIVE
,
7758 this->got_irelative_
, got_offset
);
7763 // Add the relocation for a PLT entry.
7765 template<bool big_endian
>
7767 Output_data_plt_arm
<big_endian
>::add_relocation(
7768 Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
, unsigned int got_offset
)
7770 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7771 && gsym
->can_use_relative_reloc(false))
7773 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7774 rel
->add_symbolless_global_addend(gsym
, elfcpp::R_ARM_IRELATIVE
,
7775 this->got_irelative_
, got_offset
);
7779 gsym
->set_needs_dynsym_entry();
7780 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7786 // Create the irelative relocation data.
7788 template<bool big_endian
>
7789 typename Output_data_plt_arm
<big_endian
>::Reloc_section
*
7790 Output_data_plt_arm
<big_endian
>::rel_irelative(Symbol_table
* symtab
,
7793 if (this->irelative_rel_
== NULL
)
7795 // Since irelative relocations goes into 'rel.dyn', we delegate the
7796 // creation of irelative_rel_ to where rel_dyn section gets created.
7797 Target_arm
<big_endian
>* arm_target
=
7798 Target_arm
<big_endian
>::default_target();
7799 this->irelative_rel_
= arm_target
->rel_irelative_section(layout
);
7801 // Make sure we have a place for the TLSDESC relocations, in
7802 // case we see any later on.
7803 // this->rel_tlsdesc(layout);
7804 if (parameters
->doing_static_link())
7806 // A statically linked executable will only have a .rel.plt section to
7807 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7808 // will use these symbols to locate the IRELATIVE relocs at program
7810 symtab
->define_in_output_data("__rel_iplt_start", NULL
,
7811 Symbol_table::PREDEFINED
,
7812 this->irelative_rel_
, 0, 0,
7813 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7814 elfcpp::STV_HIDDEN
, 0, false, true);
7815 symtab
->define_in_output_data("__rel_iplt_end", NULL
,
7816 Symbol_table::PREDEFINED
,
7817 this->irelative_rel_
, 0, 0,
7818 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7819 elfcpp::STV_HIDDEN
, 0, true, true);
7822 return this->irelative_rel_
;
7826 // Return the PLT address for a global symbol.
7828 template<bool big_endian
>
7830 Output_data_plt_arm
<big_endian
>::address_for_global(const Symbol
* gsym
) const
7832 uint64_t begin_offset
= 0;
7833 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7834 && gsym
->can_use_relative_reloc(false))
7836 begin_offset
= (this->first_plt_entry_offset() +
7837 this->count_
* this->get_plt_entry_size());
7839 return this->address() + begin_offset
+ gsym
->plt_offset();
7843 // Return the PLT address for a local symbol. These are always
7844 // IRELATIVE relocs.
7846 template<bool big_endian
>
7848 Output_data_plt_arm
<big_endian
>::address_for_local(
7849 const Relobj
* object
,
7850 unsigned int r_sym
) const
7852 return (this->address()
7853 + this->first_plt_entry_offset()
7854 + this->count_
* this->get_plt_entry_size()
7855 + object
->local_plt_offset(r_sym
));
7859 template<bool big_endian
>
7860 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7863 Output_data_plt_arm_standard(Layout
* layout
,
7864 Arm_output_data_got
<big_endian
>* got
,
7865 Output_data_space
* got_plt
,
7866 Output_data_space
* got_irelative
)
7867 : Output_data_plt_arm
<big_endian
>(layout
, 4, got
, got_plt
, got_irelative
)
7871 // Return the offset of the first non-reserved PLT entry.
7872 virtual unsigned int
7873 do_first_plt_entry_offset() const
7874 { return sizeof(first_plt_entry
); }
7877 do_fill_first_plt_entry(unsigned char* pov
,
7878 Arm_address got_address
,
7879 Arm_address plt_address
);
7882 // Template for the first PLT entry.
7883 static const uint32_t first_plt_entry
[5];
7887 // FIXME: This is not very flexible. Right now this has only been tested
7888 // on armv5te. If we are to support additional architecture features like
7889 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7891 // The first entry in the PLT.
7892 template<bool big_endian
>
7893 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7895 0xe52de004, // str lr, [sp, #-4]!
7896 0xe59fe004, // ldr lr, [pc, #4]
7897 0xe08fe00e, // add lr, pc, lr
7898 0xe5bef008, // ldr pc, [lr, #8]!
7899 0x00000000, // &GOT[0] - .
7902 template<bool big_endian
>
7904 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7906 Arm_address got_address
,
7907 Arm_address plt_address
)
7909 // Write first PLT entry. All but the last word are constants.
7910 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7911 / sizeof(first_plt_entry
[0]));
7912 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7914 if (parameters
->options().be8())
7916 elfcpp::Swap
<32, false>::writeval(pov
+ i
* 4,
7917 first_plt_entry
[i
]);
7921 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4,
7922 first_plt_entry
[i
]);
7925 // Last word in first PLT entry is &GOT[0] - .
7926 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7927 got_address
- (plt_address
+ 16));
7930 // Subsequent entries in the PLT.
7931 // This class generates short (12-byte) entries, for displacements up to 2^28.
7933 template<bool big_endian
>
7934 class Output_data_plt_arm_short
: public Output_data_plt_arm_standard
<big_endian
>
7937 Output_data_plt_arm_short(Layout
* layout
,
7938 Arm_output_data_got
<big_endian
>* got
,
7939 Output_data_space
* got_plt
,
7940 Output_data_space
* got_irelative
)
7941 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7945 // Return the size of a PLT entry.
7946 virtual unsigned int
7947 do_get_plt_entry_size() const
7948 { return sizeof(plt_entry
); }
7951 do_fill_plt_entry(unsigned char* pov
,
7952 Arm_address got_address
,
7953 Arm_address plt_address
,
7954 unsigned int got_offset
,
7955 unsigned int plt_offset
);
7958 // Template for subsequent PLT entries.
7959 static const uint32_t plt_entry
[3];
7962 template<bool big_endian
>
7963 const uint32_t Output_data_plt_arm_short
<big_endian
>::plt_entry
[3] =
7965 0xe28fc600, // add ip, pc, #0xNN00000
7966 0xe28cca00, // add ip, ip, #0xNN000
7967 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7970 template<bool big_endian
>
7972 Output_data_plt_arm_short
<big_endian
>::do_fill_plt_entry(
7974 Arm_address got_address
,
7975 Arm_address plt_address
,
7976 unsigned int got_offset
,
7977 unsigned int plt_offset
)
7979 int32_t offset
= ((got_address
+ got_offset
)
7980 - (plt_address
+ plt_offset
+ 8));
7981 if (offset
< 0 || offset
> 0x0fffffff)
7982 gold_error(_("PLT offset too large, try linking with --long-plt"));
7984 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7985 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7986 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7988 if (parameters
->options().be8())
7990 elfcpp::Swap
<32, false>::writeval(pov
, plt_insn0
);
7991 elfcpp::Swap
<32, false>::writeval(pov
+ 4, plt_insn1
);
7992 elfcpp::Swap
<32, false>::writeval(pov
+ 8, plt_insn2
);
7996 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7997 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7998 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
8002 // This class generates long (16-byte) entries, for arbitrary displacements.
8004 template<bool big_endian
>
8005 class Output_data_plt_arm_long
: public Output_data_plt_arm_standard
<big_endian
>
8008 Output_data_plt_arm_long(Layout
* layout
,
8009 Arm_output_data_got
<big_endian
>* got
,
8010 Output_data_space
* got_plt
,
8011 Output_data_space
* got_irelative
)
8012 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
8016 // Return the size of a PLT entry.
8017 virtual unsigned int
8018 do_get_plt_entry_size() const
8019 { return sizeof(plt_entry
); }
8022 do_fill_plt_entry(unsigned char* pov
,
8023 Arm_address got_address
,
8024 Arm_address plt_address
,
8025 unsigned int got_offset
,
8026 unsigned int plt_offset
);
8029 // Template for subsequent PLT entries.
8030 static const uint32_t plt_entry
[4];
8033 template<bool big_endian
>
8034 const uint32_t Output_data_plt_arm_long
<big_endian
>::plt_entry
[4] =
8036 0xe28fc200, // add ip, pc, #0xN0000000
8037 0xe28cc600, // add ip, ip, #0xNN00000
8038 0xe28cca00, // add ip, ip, #0xNN000
8039 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
8042 template<bool big_endian
>
8044 Output_data_plt_arm_long
<big_endian
>::do_fill_plt_entry(
8046 Arm_address got_address
,
8047 Arm_address plt_address
,
8048 unsigned int got_offset
,
8049 unsigned int plt_offset
)
8051 int32_t offset
= ((got_address
+ got_offset
)
8052 - (plt_address
+ plt_offset
+ 8));
8054 uint32_t plt_insn0
= plt_entry
[0] | (offset
>> 28);
8055 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 20) & 0xff);
8056 uint32_t plt_insn2
= plt_entry
[2] | ((offset
>> 12) & 0xff);
8057 uint32_t plt_insn3
= plt_entry
[3] | (offset
& 0xfff);
8059 if (parameters
->options().be8())
8061 elfcpp::Swap
<32, false>::writeval(pov
, plt_insn0
);
8062 elfcpp::Swap
<32, false>::writeval(pov
+ 4, plt_insn1
);
8063 elfcpp::Swap
<32, false>::writeval(pov
+ 8, plt_insn2
);
8064 elfcpp::Swap
<32, false>::writeval(pov
+ 12, plt_insn3
);
8068 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
8069 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
8070 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
8071 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 12, plt_insn3
);
8075 // Write out the PLT. This uses the hand-coded instructions above,
8076 // and adjusts them as needed. This is all specified by the arm ELF
8077 // Processor Supplement.
8079 template<bool big_endian
>
8081 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
8083 const off_t offset
= this->offset();
8084 const section_size_type oview_size
=
8085 convert_to_section_size_type(this->data_size());
8086 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
8088 const off_t got_file_offset
= this->got_plt_
->offset();
8089 gold_assert(got_file_offset
+ this->got_plt_
->data_size()
8090 == this->got_irelative_
->offset());
8091 const section_size_type got_size
=
8092 convert_to_section_size_type(this->got_plt_
->data_size()
8093 + this->got_irelative_
->data_size());
8094 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
8096 unsigned char* pov
= oview
;
8098 Arm_address plt_address
= this->address();
8099 Arm_address got_address
= this->got_plt_
->address();
8101 // Write first PLT entry.
8102 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
8103 pov
+= this->first_plt_entry_offset();
8105 unsigned char* got_pov
= got_view
;
8107 memset(got_pov
, 0, 12);
8110 unsigned int plt_offset
= this->first_plt_entry_offset();
8111 unsigned int got_offset
= 12;
8112 const unsigned int count
= this->count_
+ this->irelative_count_
;
8113 gold_assert(this->irelative_count_
== this->irelative_data_vec_
.size());
8114 for (unsigned int i
= 0;
8117 pov
+= this->get_plt_entry_size(),
8119 plt_offset
+= this->get_plt_entry_size(),
8122 // Set and adjust the PLT entry itself.
8123 this->fill_plt_entry(pov
, got_address
, plt_address
,
8124 got_offset
, plt_offset
);
8127 if (i
< this->count_
)
8129 // For non-irelative got entries, the value is the beginning of plt.
8130 value
= plt_address
;
8134 // For irelative got entries, the value is the (global/local) symbol
8136 const IRelative_data
& idata
=
8137 this->irelative_data_vec_
[i
- this->count_
];
8138 if (idata
.symbol_is_global_
)
8140 // Set the entry in the GOT for irelative symbols. The content is
8141 // the address of the ifunc, not the address of plt start.
8142 const Sized_symbol
<32>* sized_symbol
= idata
.u_
.global
;
8143 gold_assert(sized_symbol
->type() == elfcpp::STT_GNU_IFUNC
);
8144 value
= sized_symbol
->value();
8148 value
= idata
.u_
.local
.relobj
->local_symbol_value(
8149 idata
.u_
.local
.index
, 0);
8152 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, value
);
8155 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
8156 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
8158 of
->write_output_view(offset
, oview_size
, oview
);
8159 of
->write_output_view(got_file_offset
, got_size
, got_view
);
8163 // Create a PLT entry for a global symbol.
8165 template<bool big_endian
>
8167 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
8170 if (gsym
->has_plt_offset())
8173 if (this->plt_
== NULL
)
8174 this->make_plt_section(symtab
, layout
);
8176 this->plt_
->add_entry(symtab
, layout
, gsym
);
8180 // Create the PLT section.
8181 template<bool big_endian
>
8183 Target_arm
<big_endian
>::make_plt_section(
8184 Symbol_table
* symtab
, Layout
* layout
)
8186 if (this->plt_
== NULL
)
8188 // Create the GOT section first.
8189 this->got_section(symtab
, layout
);
8191 // GOT for irelatives is create along with got.plt.
8192 gold_assert(this->got_
!= NULL
8193 && this->got_plt_
!= NULL
8194 && this->got_irelative_
!= NULL
);
8195 this->plt_
= this->make_data_plt(layout
, this->got_
, this->got_plt_
,
8196 this->got_irelative_
);
8198 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
8200 | elfcpp::SHF_EXECINSTR
),
8201 this->plt_
, ORDER_PLT
, false);
8202 symtab
->define_in_output_data("$a", NULL
,
8203 Symbol_table::PREDEFINED
,
8205 0, 0, elfcpp::STT_NOTYPE
,
8207 elfcpp::STV_DEFAULT
, 0,
8213 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
8215 template<bool big_endian
>
8217 Target_arm
<big_endian
>::make_local_ifunc_plt_entry(
8218 Symbol_table
* symtab
, Layout
* layout
,
8219 Sized_relobj_file
<32, big_endian
>* relobj
,
8220 unsigned int local_sym_index
)
8222 if (relobj
->local_has_plt_offset(local_sym_index
))
8224 if (this->plt_
== NULL
)
8225 this->make_plt_section(symtab
, layout
);
8226 unsigned int plt_offset
= this->plt_
->add_local_ifunc_entry(symtab
, layout
,
8229 relobj
->set_local_plt_offset(local_sym_index
, plt_offset
);
8233 // Return the number of entries in the PLT.
8235 template<bool big_endian
>
8237 Target_arm
<big_endian
>::plt_entry_count() const
8239 if (this->plt_
== NULL
)
8241 return this->plt_
->entry_count();
8244 // Return the offset of the first non-reserved PLT entry.
8246 template<bool big_endian
>
8248 Target_arm
<big_endian
>::first_plt_entry_offset() const
8250 return this->plt_
->first_plt_entry_offset();
8253 // Return the size of each PLT entry.
8255 template<bool big_endian
>
8257 Target_arm
<big_endian
>::plt_entry_size() const
8259 return this->plt_
->get_plt_entry_size();
8262 // Get the section to use for TLS_DESC relocations.
8264 template<bool big_endian
>
8265 typename Target_arm
<big_endian
>::Reloc_section
*
8266 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
8268 return this->plt_section()->rel_tls_desc(layout
);
8271 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8273 template<bool big_endian
>
8275 Target_arm
<big_endian
>::define_tls_base_symbol(
8276 Symbol_table
* symtab
,
8279 if (this->tls_base_symbol_defined_
)
8282 Output_segment
* tls_segment
= layout
->tls_segment();
8283 if (tls_segment
!= NULL
)
8285 bool is_exec
= parameters
->options().output_is_executable();
8286 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
8287 Symbol_table::PREDEFINED
,
8291 elfcpp::STV_HIDDEN
, 0,
8293 ? Symbol::SEGMENT_END
8294 : Symbol::SEGMENT_START
),
8297 this->tls_base_symbol_defined_
= true;
8300 // Create a GOT entry for the TLS module index.
8302 template<bool big_endian
>
8304 Target_arm
<big_endian
>::got_mod_index_entry(
8305 Symbol_table
* symtab
,
8307 Sized_relobj_file
<32, big_endian
>* object
)
8309 if (this->got_mod_index_offset_
== -1U)
8311 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
8312 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
8313 unsigned int got_offset
;
8314 if (!parameters
->doing_static_link())
8316 got_offset
= got
->add_constant(0);
8317 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
8318 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
8323 // We are doing a static link. Just mark it as belong to module 1,
8325 got_offset
= got
->add_constant(1);
8328 got
->add_constant(0);
8329 this->got_mod_index_offset_
= got_offset
;
8331 return this->got_mod_index_offset_
;
8334 // Optimize the TLS relocation type based on what we know about the
8335 // symbol. IS_FINAL is true if the final address of this symbol is
8336 // known at link time.
8338 template<bool big_endian
>
8339 tls::Tls_optimization
8340 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
8342 // FIXME: Currently we do not do any TLS optimization.
8343 return tls::TLSOPT_NONE
;
8346 // Get the Reference_flags for a particular relocation.
8348 template<bool big_endian
>
8350 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
8354 case elfcpp::R_ARM_NONE
:
8355 case elfcpp::R_ARM_V4BX
:
8356 case elfcpp::R_ARM_GNU_VTENTRY
:
8357 case elfcpp::R_ARM_GNU_VTINHERIT
:
8358 // No symbol reference.
8361 case elfcpp::R_ARM_ABS32
:
8362 case elfcpp::R_ARM_ABS16
:
8363 case elfcpp::R_ARM_ABS12
:
8364 case elfcpp::R_ARM_THM_ABS5
:
8365 case elfcpp::R_ARM_ABS8
:
8366 case elfcpp::R_ARM_BASE_ABS
:
8367 case elfcpp::R_ARM_MOVW_ABS_NC
:
8368 case elfcpp::R_ARM_MOVT_ABS
:
8369 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8370 case elfcpp::R_ARM_THM_MOVT_ABS
:
8371 case elfcpp::R_ARM_ABS32_NOI
:
8372 return Symbol::ABSOLUTE_REF
;
8374 case elfcpp::R_ARM_REL32
:
8375 case elfcpp::R_ARM_LDR_PC_G0
:
8376 case elfcpp::R_ARM_SBREL32
:
8377 case elfcpp::R_ARM_THM_PC8
:
8378 case elfcpp::R_ARM_BASE_PREL
:
8379 case elfcpp::R_ARM_MOVW_PREL_NC
:
8380 case elfcpp::R_ARM_MOVT_PREL
:
8381 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8382 case elfcpp::R_ARM_THM_MOVT_PREL
:
8383 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8384 case elfcpp::R_ARM_THM_PC12
:
8385 case elfcpp::R_ARM_REL32_NOI
:
8386 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8387 case elfcpp::R_ARM_ALU_PC_G0
:
8388 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8389 case elfcpp::R_ARM_ALU_PC_G1
:
8390 case elfcpp::R_ARM_ALU_PC_G2
:
8391 case elfcpp::R_ARM_LDR_PC_G1
:
8392 case elfcpp::R_ARM_LDR_PC_G2
:
8393 case elfcpp::R_ARM_LDRS_PC_G0
:
8394 case elfcpp::R_ARM_LDRS_PC_G1
:
8395 case elfcpp::R_ARM_LDRS_PC_G2
:
8396 case elfcpp::R_ARM_LDC_PC_G0
:
8397 case elfcpp::R_ARM_LDC_PC_G1
:
8398 case elfcpp::R_ARM_LDC_PC_G2
:
8399 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8400 case elfcpp::R_ARM_ALU_SB_G0
:
8401 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8402 case elfcpp::R_ARM_ALU_SB_G1
:
8403 case elfcpp::R_ARM_ALU_SB_G2
:
8404 case elfcpp::R_ARM_LDR_SB_G0
:
8405 case elfcpp::R_ARM_LDR_SB_G1
:
8406 case elfcpp::R_ARM_LDR_SB_G2
:
8407 case elfcpp::R_ARM_LDRS_SB_G0
:
8408 case elfcpp::R_ARM_LDRS_SB_G1
:
8409 case elfcpp::R_ARM_LDRS_SB_G2
:
8410 case elfcpp::R_ARM_LDC_SB_G0
:
8411 case elfcpp::R_ARM_LDC_SB_G1
:
8412 case elfcpp::R_ARM_LDC_SB_G2
:
8413 case elfcpp::R_ARM_MOVW_BREL_NC
:
8414 case elfcpp::R_ARM_MOVT_BREL
:
8415 case elfcpp::R_ARM_MOVW_BREL
:
8416 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8417 case elfcpp::R_ARM_THM_MOVT_BREL
:
8418 case elfcpp::R_ARM_THM_MOVW_BREL
:
8419 case elfcpp::R_ARM_GOTOFF32
:
8420 case elfcpp::R_ARM_GOTOFF12
:
8421 case elfcpp::R_ARM_SBREL31
:
8422 return Symbol::RELATIVE_REF
;
8424 case elfcpp::R_ARM_PLT32
:
8425 case elfcpp::R_ARM_CALL
:
8426 case elfcpp::R_ARM_JUMP24
:
8427 case elfcpp::R_ARM_THM_CALL
:
8428 case elfcpp::R_ARM_THM_JUMP24
:
8429 case elfcpp::R_ARM_THM_JUMP19
:
8430 case elfcpp::R_ARM_THM_JUMP6
:
8431 case elfcpp::R_ARM_THM_JUMP11
:
8432 case elfcpp::R_ARM_THM_JUMP8
:
8433 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8434 // in unwind tables. It may point to functions via PLTs.
8435 // So we treat it like call/jump relocations above.
8436 case elfcpp::R_ARM_PREL31
:
8437 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
8439 case elfcpp::R_ARM_GOT_BREL
:
8440 case elfcpp::R_ARM_GOT_ABS
:
8441 case elfcpp::R_ARM_GOT_PREL
:
8443 return Symbol::ABSOLUTE_REF
;
8445 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8446 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8447 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8448 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8449 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8450 return Symbol::TLS_REF
;
8452 case elfcpp::R_ARM_TARGET1
:
8453 case elfcpp::R_ARM_TARGET2
:
8454 case elfcpp::R_ARM_COPY
:
8455 case elfcpp::R_ARM_GLOB_DAT
:
8456 case elfcpp::R_ARM_JUMP_SLOT
:
8457 case elfcpp::R_ARM_RELATIVE
:
8458 case elfcpp::R_ARM_PC24
:
8459 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8460 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8461 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8463 // Not expected. We will give an error later.
8468 // Report an unsupported relocation against a local symbol.
8470 template<bool big_endian
>
8472 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
8473 Sized_relobj_file
<32, big_endian
>* object
,
8474 unsigned int r_type
)
8476 gold_error(_("%s: unsupported reloc %u against local symbol"),
8477 object
->name().c_str(), r_type
);
8480 // We are about to emit a dynamic relocation of type R_TYPE. If the
8481 // dynamic linker does not support it, issue an error. The GNU linker
8482 // only issues a non-PIC error for an allocated read-only section.
8483 // Here we know the section is allocated, but we don't know that it is
8484 // read-only. But we check for all the relocation types which the
8485 // glibc dynamic linker supports, so it seems appropriate to issue an
8486 // error even if the section is not read-only.
8488 template<bool big_endian
>
8490 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
8491 unsigned int r_type
)
8495 // These are the relocation types supported by glibc for ARM.
8496 case elfcpp::R_ARM_RELATIVE
:
8497 case elfcpp::R_ARM_COPY
:
8498 case elfcpp::R_ARM_GLOB_DAT
:
8499 case elfcpp::R_ARM_JUMP_SLOT
:
8500 case elfcpp::R_ARM_ABS32
:
8501 case elfcpp::R_ARM_ABS32_NOI
:
8502 case elfcpp::R_ARM_IRELATIVE
:
8503 case elfcpp::R_ARM_PC24
:
8504 // FIXME: The following 3 types are not supported by Android's dynamic
8506 case elfcpp::R_ARM_TLS_DTPMOD32
:
8507 case elfcpp::R_ARM_TLS_DTPOFF32
:
8508 case elfcpp::R_ARM_TLS_TPOFF32
:
8513 // This prevents us from issuing more than one error per reloc
8514 // section. But we can still wind up issuing more than one
8515 // error per object file.
8516 if (this->issued_non_pic_error_
)
8518 const Arm_reloc_property
* reloc_property
=
8519 arm_reloc_property_table
->get_reloc_property(r_type
);
8520 gold_assert(reloc_property
!= NULL
);
8521 object
->error(_("requires unsupported dynamic reloc %s; "
8522 "recompile with -fPIC"),
8523 reloc_property
->name().c_str());
8524 this->issued_non_pic_error_
= true;
8528 case elfcpp::R_ARM_NONE
:
8534 // Return whether we need to make a PLT entry for a relocation of the
8535 // given type against a STT_GNU_IFUNC symbol.
8537 template<bool big_endian
>
8539 Target_arm
<big_endian
>::Scan::reloc_needs_plt_for_ifunc(
8540 Sized_relobj_file
<32, big_endian
>* object
,
8541 unsigned int r_type
)
8543 int flags
= Scan::get_reference_flags(r_type
);
8544 if (flags
& Symbol::TLS_REF
)
8546 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8547 object
->name().c_str(), r_type
);
8554 // Scan a relocation for a local symbol.
8555 // FIXME: This only handles a subset of relocation types used by Android
8556 // on ARM v5te devices.
8558 template<bool big_endian
>
8560 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
8563 Sized_relobj_file
<32, big_endian
>* object
,
8564 unsigned int data_shndx
,
8565 Output_section
* output_section
,
8566 const elfcpp::Rel
<32, big_endian
>& reloc
,
8567 unsigned int r_type
,
8568 const elfcpp::Sym
<32, big_endian
>& lsym
,
8574 r_type
= target
->get_real_reloc_type(r_type
);
8576 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8577 bool is_ifunc
= lsym
.get_st_type() == elfcpp::STT_GNU_IFUNC
;
8578 if (is_ifunc
&& this->reloc_needs_plt_for_ifunc(object
, r_type
))
8580 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8581 target
->make_local_ifunc_plt_entry(symtab
, layout
, object
, r_sym
);
8586 case elfcpp::R_ARM_NONE
:
8587 case elfcpp::R_ARM_V4BX
:
8588 case elfcpp::R_ARM_GNU_VTENTRY
:
8589 case elfcpp::R_ARM_GNU_VTINHERIT
:
8592 case elfcpp::R_ARM_ABS32
:
8593 case elfcpp::R_ARM_ABS32_NOI
:
8594 // If building a shared library (or a position-independent
8595 // executable), we need to create a dynamic relocation for
8596 // this location. The relocation applied at link time will
8597 // apply the link-time value, so we flag the location with
8598 // an R_ARM_RELATIVE relocation so the dynamic loader can
8599 // relocate it easily.
8600 if (parameters
->options().output_is_position_independent())
8602 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8603 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8604 // If we are to add more other reloc types than R_ARM_ABS32,
8605 // we need to add check_non_pic(object, r_type) here.
8606 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
8607 output_section
, data_shndx
,
8608 reloc
.get_r_offset(), is_ifunc
);
8612 case elfcpp::R_ARM_ABS16
:
8613 case elfcpp::R_ARM_ABS12
:
8614 case elfcpp::R_ARM_THM_ABS5
:
8615 case elfcpp::R_ARM_ABS8
:
8616 case elfcpp::R_ARM_BASE_ABS
:
8617 case elfcpp::R_ARM_MOVW_ABS_NC
:
8618 case elfcpp::R_ARM_MOVT_ABS
:
8619 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8620 case elfcpp::R_ARM_THM_MOVT_ABS
:
8621 // If building a shared library (or a position-independent
8622 // executable), we need to create a dynamic relocation for
8623 // this location. Because the addend needs to remain in the
8624 // data section, we need to be careful not to apply this
8625 // relocation statically.
8626 if (parameters
->options().output_is_position_independent())
8628 check_non_pic(object
, r_type
);
8629 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8630 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8631 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
8632 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
8633 data_shndx
, reloc
.get_r_offset());
8636 gold_assert(lsym
.get_st_value() == 0);
8637 unsigned int shndx
= lsym
.get_st_shndx();
8639 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
8642 object
->error(_("section symbol %u has bad shndx %u"),
8645 rel_dyn
->add_local_section(object
, shndx
,
8646 r_type
, output_section
,
8647 data_shndx
, reloc
.get_r_offset());
8652 case elfcpp::R_ARM_REL32
:
8653 case elfcpp::R_ARM_LDR_PC_G0
:
8654 case elfcpp::R_ARM_SBREL32
:
8655 case elfcpp::R_ARM_THM_CALL
:
8656 case elfcpp::R_ARM_THM_PC8
:
8657 case elfcpp::R_ARM_BASE_PREL
:
8658 case elfcpp::R_ARM_PLT32
:
8659 case elfcpp::R_ARM_CALL
:
8660 case elfcpp::R_ARM_JUMP24
:
8661 case elfcpp::R_ARM_THM_JUMP24
:
8662 case elfcpp::R_ARM_SBREL31
:
8663 case elfcpp::R_ARM_PREL31
:
8664 case elfcpp::R_ARM_MOVW_PREL_NC
:
8665 case elfcpp::R_ARM_MOVT_PREL
:
8666 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8667 case elfcpp::R_ARM_THM_MOVT_PREL
:
8668 case elfcpp::R_ARM_THM_JUMP19
:
8669 case elfcpp::R_ARM_THM_JUMP6
:
8670 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8671 case elfcpp::R_ARM_THM_PC12
:
8672 case elfcpp::R_ARM_REL32_NOI
:
8673 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8674 case elfcpp::R_ARM_ALU_PC_G0
:
8675 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8676 case elfcpp::R_ARM_ALU_PC_G1
:
8677 case elfcpp::R_ARM_ALU_PC_G2
:
8678 case elfcpp::R_ARM_LDR_PC_G1
:
8679 case elfcpp::R_ARM_LDR_PC_G2
:
8680 case elfcpp::R_ARM_LDRS_PC_G0
:
8681 case elfcpp::R_ARM_LDRS_PC_G1
:
8682 case elfcpp::R_ARM_LDRS_PC_G2
:
8683 case elfcpp::R_ARM_LDC_PC_G0
:
8684 case elfcpp::R_ARM_LDC_PC_G1
:
8685 case elfcpp::R_ARM_LDC_PC_G2
:
8686 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8687 case elfcpp::R_ARM_ALU_SB_G0
:
8688 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8689 case elfcpp::R_ARM_ALU_SB_G1
:
8690 case elfcpp::R_ARM_ALU_SB_G2
:
8691 case elfcpp::R_ARM_LDR_SB_G0
:
8692 case elfcpp::R_ARM_LDR_SB_G1
:
8693 case elfcpp::R_ARM_LDR_SB_G2
:
8694 case elfcpp::R_ARM_LDRS_SB_G0
:
8695 case elfcpp::R_ARM_LDRS_SB_G1
:
8696 case elfcpp::R_ARM_LDRS_SB_G2
:
8697 case elfcpp::R_ARM_LDC_SB_G0
:
8698 case elfcpp::R_ARM_LDC_SB_G1
:
8699 case elfcpp::R_ARM_LDC_SB_G2
:
8700 case elfcpp::R_ARM_MOVW_BREL_NC
:
8701 case elfcpp::R_ARM_MOVT_BREL
:
8702 case elfcpp::R_ARM_MOVW_BREL
:
8703 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8704 case elfcpp::R_ARM_THM_MOVT_BREL
:
8705 case elfcpp::R_ARM_THM_MOVW_BREL
:
8706 case elfcpp::R_ARM_THM_JUMP11
:
8707 case elfcpp::R_ARM_THM_JUMP8
:
8708 // We don't need to do anything for a relative addressing relocation
8709 // against a local symbol if it does not reference the GOT.
8712 case elfcpp::R_ARM_GOTOFF32
:
8713 case elfcpp::R_ARM_GOTOFF12
:
8714 // We need a GOT section:
8715 target
->got_section(symtab
, layout
);
8718 case elfcpp::R_ARM_GOT_BREL
:
8719 case elfcpp::R_ARM_GOT_PREL
:
8721 // The symbol requires a GOT entry.
8722 Arm_output_data_got
<big_endian
>* got
=
8723 target
->got_section(symtab
, layout
);
8724 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8725 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8727 // If we are generating a shared object, we need to add a
8728 // dynamic RELATIVE relocation for this symbol's GOT entry.
8729 if (parameters
->options().output_is_position_independent())
8731 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8732 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8733 rel_dyn
->add_local_relative(
8734 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8735 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8741 case elfcpp::R_ARM_TARGET1
:
8742 case elfcpp::R_ARM_TARGET2
:
8743 // This should have been mapped to another type already.
8745 case elfcpp::R_ARM_COPY
:
8746 case elfcpp::R_ARM_GLOB_DAT
:
8747 case elfcpp::R_ARM_JUMP_SLOT
:
8748 case elfcpp::R_ARM_RELATIVE
:
8749 // These are relocations which should only be seen by the
8750 // dynamic linker, and should never be seen here.
8751 gold_error(_("%s: unexpected reloc %u in object file"),
8752 object
->name().c_str(), r_type
);
8756 // These are initial TLS relocs, which are expected when
8758 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8759 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8760 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8761 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8762 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8764 bool output_is_shared
= parameters
->options().shared();
8765 const tls::Tls_optimization optimized_type
8766 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8770 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8771 if (optimized_type
== tls::TLSOPT_NONE
)
8773 // Create a pair of GOT entries for the module index and
8774 // dtv-relative offset.
8775 Arm_output_data_got
<big_endian
>* got
8776 = target
->got_section(symtab
, layout
);
8777 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8778 unsigned int shndx
= lsym
.get_st_shndx();
8780 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8783 object
->error(_("local symbol %u has bad shndx %u"),
8788 if (!parameters
->doing_static_link())
8789 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8791 target
->rel_dyn_section(layout
),
8792 elfcpp::R_ARM_TLS_DTPMOD32
);
8794 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8798 // FIXME: TLS optimization not supported yet.
8802 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8803 if (optimized_type
== tls::TLSOPT_NONE
)
8805 // Create a GOT entry for the module index.
8806 target
->got_mod_index_entry(symtab
, layout
, object
);
8809 // FIXME: TLS optimization not supported yet.
8813 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8816 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8817 layout
->set_has_static_tls();
8818 if (optimized_type
== tls::TLSOPT_NONE
)
8820 // Create a GOT entry for the tp-relative offset.
8821 Arm_output_data_got
<big_endian
>* got
8822 = target
->got_section(symtab
, layout
);
8823 unsigned int r_sym
=
8824 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8825 if (!parameters
->doing_static_link())
8826 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8827 target
->rel_dyn_section(layout
),
8828 elfcpp::R_ARM_TLS_TPOFF32
);
8829 else if (!object
->local_has_got_offset(r_sym
,
8830 GOT_TYPE_TLS_OFFSET
))
8832 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8833 unsigned int got_offset
=
8834 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8835 got
->add_static_reloc(got_offset
,
8836 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8841 // FIXME: TLS optimization not supported yet.
8845 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8846 layout
->set_has_static_tls();
8847 if (output_is_shared
)
8849 // We need to create a dynamic relocation.
8850 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8851 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8852 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8853 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8854 output_section
, data_shndx
,
8855 reloc
.get_r_offset());
8865 case elfcpp::R_ARM_PC24
:
8866 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8867 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8868 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8870 unsupported_reloc_local(object
, r_type
);
8875 // Report an unsupported relocation against a global symbol.
8877 template<bool big_endian
>
8879 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8880 Sized_relobj_file
<32, big_endian
>* object
,
8881 unsigned int r_type
,
8884 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8885 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8888 template<bool big_endian
>
8890 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8891 unsigned int r_type
)
8895 case elfcpp::R_ARM_PC24
:
8896 case elfcpp::R_ARM_THM_CALL
:
8897 case elfcpp::R_ARM_PLT32
:
8898 case elfcpp::R_ARM_CALL
:
8899 case elfcpp::R_ARM_JUMP24
:
8900 case elfcpp::R_ARM_THM_JUMP24
:
8901 case elfcpp::R_ARM_SBREL31
:
8902 case elfcpp::R_ARM_PREL31
:
8903 case elfcpp::R_ARM_THM_JUMP19
:
8904 case elfcpp::R_ARM_THM_JUMP6
:
8905 case elfcpp::R_ARM_THM_JUMP11
:
8906 case elfcpp::R_ARM_THM_JUMP8
:
8907 // All the relocations above are branches except SBREL31 and PREL31.
8911 // Be conservative and assume this is a function pointer.
8916 template<bool big_endian
>
8918 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8921 Target_arm
<big_endian
>* target
,
8922 Sized_relobj_file
<32, big_endian
>*,
8925 const elfcpp::Rel
<32, big_endian
>&,
8926 unsigned int r_type
,
8927 const elfcpp::Sym
<32, big_endian
>&)
8929 r_type
= target
->get_real_reloc_type(r_type
);
8930 return possible_function_pointer_reloc(r_type
);
8933 template<bool big_endian
>
8935 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8938 Target_arm
<big_endian
>* target
,
8939 Sized_relobj_file
<32, big_endian
>*,
8942 const elfcpp::Rel
<32, big_endian
>&,
8943 unsigned int r_type
,
8946 // GOT is not a function.
8947 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8950 r_type
= target
->get_real_reloc_type(r_type
);
8951 return possible_function_pointer_reloc(r_type
);
8954 // Scan a relocation for a global symbol.
8956 template<bool big_endian
>
8958 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8961 Sized_relobj_file
<32, big_endian
>* object
,
8962 unsigned int data_shndx
,
8963 Output_section
* output_section
,
8964 const elfcpp::Rel
<32, big_endian
>& reloc
,
8965 unsigned int r_type
,
8968 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8969 // section. We check here to avoid creating a dynamic reloc against
8970 // _GLOBAL_OFFSET_TABLE_.
8971 if (!target
->has_got_section()
8972 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8973 target
->got_section(symtab
, layout
);
8975 // A STT_GNU_IFUNC symbol may require a PLT entry.
8976 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
8977 && this->reloc_needs_plt_for_ifunc(object
, r_type
))
8978 target
->make_plt_entry(symtab
, layout
, gsym
);
8980 r_type
= target
->get_real_reloc_type(r_type
);
8983 case elfcpp::R_ARM_NONE
:
8984 case elfcpp::R_ARM_V4BX
:
8985 case elfcpp::R_ARM_GNU_VTENTRY
:
8986 case elfcpp::R_ARM_GNU_VTINHERIT
:
8989 case elfcpp::R_ARM_ABS32
:
8990 case elfcpp::R_ARM_ABS16
:
8991 case elfcpp::R_ARM_ABS12
:
8992 case elfcpp::R_ARM_THM_ABS5
:
8993 case elfcpp::R_ARM_ABS8
:
8994 case elfcpp::R_ARM_BASE_ABS
:
8995 case elfcpp::R_ARM_MOVW_ABS_NC
:
8996 case elfcpp::R_ARM_MOVT_ABS
:
8997 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8998 case elfcpp::R_ARM_THM_MOVT_ABS
:
8999 case elfcpp::R_ARM_ABS32_NOI
:
9000 // Absolute addressing relocations.
9002 // Make a PLT entry if necessary.
9003 if (this->symbol_needs_plt_entry(gsym
))
9005 target
->make_plt_entry(symtab
, layout
, gsym
);
9006 // Since this is not a PC-relative relocation, we may be
9007 // taking the address of a function. In that case we need to
9008 // set the entry in the dynamic symbol table to the address of
9010 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
9011 gsym
->set_needs_dynsym_value();
9013 // Make a dynamic relocation if necessary.
9014 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
9016 if (!parameters
->options().output_is_position_independent()
9017 && gsym
->may_need_copy_reloc())
9019 target
->copy_reloc(symtab
, layout
, object
,
9020 data_shndx
, output_section
, gsym
, reloc
);
9022 else if ((r_type
== elfcpp::R_ARM_ABS32
9023 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
9024 && gsym
->type() == elfcpp::STT_GNU_IFUNC
9025 && gsym
->can_use_relative_reloc(false)
9026 && !gsym
->is_from_dynobj()
9027 && !gsym
->is_undefined()
9028 && !gsym
->is_preemptible())
9030 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
9031 // symbol. This makes a function address in a PIE executable
9032 // match the address in a shared library that it links against.
9033 Reloc_section
* rel_irelative
=
9034 target
->rel_irelative_section(layout
);
9035 unsigned int r_type
= elfcpp::R_ARM_IRELATIVE
;
9036 rel_irelative
->add_symbolless_global_addend(
9037 gsym
, r_type
, output_section
, object
,
9038 data_shndx
, reloc
.get_r_offset());
9040 else if ((r_type
== elfcpp::R_ARM_ABS32
9041 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
9042 && gsym
->can_use_relative_reloc(false))
9044 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9045 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
9046 output_section
, object
,
9047 data_shndx
, reloc
.get_r_offset());
9051 check_non_pic(object
, r_type
);
9052 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9053 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
9054 data_shndx
, reloc
.get_r_offset());
9060 case elfcpp::R_ARM_GOTOFF32
:
9061 case elfcpp::R_ARM_GOTOFF12
:
9062 // We need a GOT section.
9063 target
->got_section(symtab
, layout
);
9066 case elfcpp::R_ARM_REL32
:
9067 case elfcpp::R_ARM_LDR_PC_G0
:
9068 case elfcpp::R_ARM_SBREL32
:
9069 case elfcpp::R_ARM_THM_PC8
:
9070 case elfcpp::R_ARM_BASE_PREL
:
9071 case elfcpp::R_ARM_MOVW_PREL_NC
:
9072 case elfcpp::R_ARM_MOVT_PREL
:
9073 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9074 case elfcpp::R_ARM_THM_MOVT_PREL
:
9075 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9076 case elfcpp::R_ARM_THM_PC12
:
9077 case elfcpp::R_ARM_REL32_NOI
:
9078 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9079 case elfcpp::R_ARM_ALU_PC_G0
:
9080 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9081 case elfcpp::R_ARM_ALU_PC_G1
:
9082 case elfcpp::R_ARM_ALU_PC_G2
:
9083 case elfcpp::R_ARM_LDR_PC_G1
:
9084 case elfcpp::R_ARM_LDR_PC_G2
:
9085 case elfcpp::R_ARM_LDRS_PC_G0
:
9086 case elfcpp::R_ARM_LDRS_PC_G1
:
9087 case elfcpp::R_ARM_LDRS_PC_G2
:
9088 case elfcpp::R_ARM_LDC_PC_G0
:
9089 case elfcpp::R_ARM_LDC_PC_G1
:
9090 case elfcpp::R_ARM_LDC_PC_G2
:
9091 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9092 case elfcpp::R_ARM_ALU_SB_G0
:
9093 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9094 case elfcpp::R_ARM_ALU_SB_G1
:
9095 case elfcpp::R_ARM_ALU_SB_G2
:
9096 case elfcpp::R_ARM_LDR_SB_G0
:
9097 case elfcpp::R_ARM_LDR_SB_G1
:
9098 case elfcpp::R_ARM_LDR_SB_G2
:
9099 case elfcpp::R_ARM_LDRS_SB_G0
:
9100 case elfcpp::R_ARM_LDRS_SB_G1
:
9101 case elfcpp::R_ARM_LDRS_SB_G2
:
9102 case elfcpp::R_ARM_LDC_SB_G0
:
9103 case elfcpp::R_ARM_LDC_SB_G1
:
9104 case elfcpp::R_ARM_LDC_SB_G2
:
9105 case elfcpp::R_ARM_MOVW_BREL_NC
:
9106 case elfcpp::R_ARM_MOVT_BREL
:
9107 case elfcpp::R_ARM_MOVW_BREL
:
9108 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9109 case elfcpp::R_ARM_THM_MOVT_BREL
:
9110 case elfcpp::R_ARM_THM_MOVW_BREL
:
9111 // Relative addressing relocations.
9113 // Make a dynamic relocation if necessary.
9114 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
9116 if (parameters
->options().output_is_executable()
9117 && target
->may_need_copy_reloc(gsym
))
9119 target
->copy_reloc(symtab
, layout
, object
,
9120 data_shndx
, output_section
, gsym
, reloc
);
9124 check_non_pic(object
, r_type
);
9125 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9126 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
9127 data_shndx
, reloc
.get_r_offset());
9133 case elfcpp::R_ARM_THM_CALL
:
9134 case elfcpp::R_ARM_PLT32
:
9135 case elfcpp::R_ARM_CALL
:
9136 case elfcpp::R_ARM_JUMP24
:
9137 case elfcpp::R_ARM_THM_JUMP24
:
9138 case elfcpp::R_ARM_SBREL31
:
9139 case elfcpp::R_ARM_PREL31
:
9140 case elfcpp::R_ARM_THM_JUMP19
:
9141 case elfcpp::R_ARM_THM_JUMP6
:
9142 case elfcpp::R_ARM_THM_JUMP11
:
9143 case elfcpp::R_ARM_THM_JUMP8
:
9144 // All the relocation above are branches except for the PREL31 ones.
9145 // A PREL31 relocation can point to a personality function in a shared
9146 // library. In that case we want to use a PLT because we want to
9147 // call the personality routine and the dynamic linkers we care about
9148 // do not support dynamic PREL31 relocations. An REL31 relocation may
9149 // point to a function whose unwinding behaviour is being described but
9150 // we will not mistakenly generate a PLT for that because we should use
9151 // a local section symbol.
9153 // If the symbol is fully resolved, this is just a relative
9154 // local reloc. Otherwise we need a PLT entry.
9155 if (gsym
->final_value_is_known())
9157 // If building a shared library, we can also skip the PLT entry
9158 // if the symbol is defined in the output file and is protected
9160 if (gsym
->is_defined()
9161 && !gsym
->is_from_dynobj()
9162 && !gsym
->is_preemptible())
9164 target
->make_plt_entry(symtab
, layout
, gsym
);
9167 case elfcpp::R_ARM_GOT_BREL
:
9168 case elfcpp::R_ARM_GOT_ABS
:
9169 case elfcpp::R_ARM_GOT_PREL
:
9171 // The symbol requires a GOT entry.
9172 Arm_output_data_got
<big_endian
>* got
=
9173 target
->got_section(symtab
, layout
);
9174 if (gsym
->final_value_is_known())
9176 // For a STT_GNU_IFUNC symbol we want the PLT address.
9177 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
9178 got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9180 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9184 // If this symbol is not fully resolved, we need to add a
9185 // GOT entry with a dynamic relocation.
9186 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9187 if (gsym
->is_from_dynobj()
9188 || gsym
->is_undefined()
9189 || gsym
->is_preemptible()
9190 || (gsym
->visibility() == elfcpp::STV_PROTECTED
9191 && parameters
->options().shared())
9192 || (gsym
->type() == elfcpp::STT_GNU_IFUNC
9193 && parameters
->options().output_is_position_independent()))
9194 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
9195 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
9198 // For a STT_GNU_IFUNC symbol we want to write the PLT
9199 // offset into the GOT, so that function pointer
9200 // comparisons work correctly.
9202 if (gsym
->type() != elfcpp::STT_GNU_IFUNC
)
9203 is_new
= got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9206 is_new
= got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9207 // Tell the dynamic linker to use the PLT address
9208 // when resolving relocations.
9209 if (gsym
->is_from_dynobj()
9210 && !parameters
->options().shared())
9211 gsym
->set_needs_dynsym_value();
9214 rel_dyn
->add_global_relative(
9215 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
9216 gsym
->got_offset(GOT_TYPE_STANDARD
));
9222 case elfcpp::R_ARM_TARGET1
:
9223 case elfcpp::R_ARM_TARGET2
:
9224 // These should have been mapped to other types already.
9226 case elfcpp::R_ARM_COPY
:
9227 case elfcpp::R_ARM_GLOB_DAT
:
9228 case elfcpp::R_ARM_JUMP_SLOT
:
9229 case elfcpp::R_ARM_RELATIVE
:
9230 // These are relocations which should only be seen by the
9231 // dynamic linker, and should never be seen here.
9232 gold_error(_("%s: unexpected reloc %u in object file"),
9233 object
->name().c_str(), r_type
);
9236 // These are initial tls relocs, which are expected when
9238 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9239 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9240 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9241 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9242 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9244 const bool is_final
= gsym
->final_value_is_known();
9245 const tls::Tls_optimization optimized_type
9246 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9249 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9250 if (optimized_type
== tls::TLSOPT_NONE
)
9252 // Create a pair of GOT entries for the module index and
9253 // dtv-relative offset.
9254 Arm_output_data_got
<big_endian
>* got
9255 = target
->got_section(symtab
, layout
);
9256 if (!parameters
->doing_static_link())
9257 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
9258 target
->rel_dyn_section(layout
),
9259 elfcpp::R_ARM_TLS_DTPMOD32
,
9260 elfcpp::R_ARM_TLS_DTPOFF32
);
9262 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
9265 // FIXME: TLS optimization not supported yet.
9269 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9270 if (optimized_type
== tls::TLSOPT_NONE
)
9272 // Create a GOT entry for the module index.
9273 target
->got_mod_index_entry(symtab
, layout
, object
);
9276 // FIXME: TLS optimization not supported yet.
9280 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9283 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9284 layout
->set_has_static_tls();
9285 if (optimized_type
== tls::TLSOPT_NONE
)
9287 // Create a GOT entry for the tp-relative offset.
9288 Arm_output_data_got
<big_endian
>* got
9289 = target
->got_section(symtab
, layout
);
9290 if (!parameters
->doing_static_link())
9291 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
9292 target
->rel_dyn_section(layout
),
9293 elfcpp::R_ARM_TLS_TPOFF32
);
9294 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
9296 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
9297 unsigned int got_offset
=
9298 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
9299 got
->add_static_reloc(got_offset
,
9300 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
9304 // FIXME: TLS optimization not supported yet.
9308 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9309 layout
->set_has_static_tls();
9310 if (parameters
->options().shared())
9312 // We need to create a dynamic relocation.
9313 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9314 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
9315 output_section
, object
,
9316 data_shndx
, reloc
.get_r_offset());
9326 case elfcpp::R_ARM_PC24
:
9327 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9328 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9329 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9331 unsupported_reloc_global(object
, r_type
, gsym
);
9336 // Process relocations for gc.
9338 template<bool big_endian
>
9340 Target_arm
<big_endian
>::gc_process_relocs(
9341 Symbol_table
* symtab
,
9343 Sized_relobj_file
<32, big_endian
>* object
,
9344 unsigned int data_shndx
,
9346 const unsigned char* prelocs
,
9348 Output_section
* output_section
,
9349 bool needs_special_offset_handling
,
9350 size_t local_symbol_count
,
9351 const unsigned char* plocal_symbols
)
9353 typedef Target_arm
<big_endian
> Arm
;
9354 typedef typename Target_arm
<big_endian
>::Scan Scan
;
9356 gold::gc_process_relocs
<32, big_endian
, Arm
, Scan
, Classify_reloc
>(
9365 needs_special_offset_handling
,
9370 // Scan relocations for a section.
9372 template<bool big_endian
>
9374 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
9376 Sized_relobj_file
<32, big_endian
>* object
,
9377 unsigned int data_shndx
,
9378 unsigned int sh_type
,
9379 const unsigned char* prelocs
,
9381 Output_section
* output_section
,
9382 bool needs_special_offset_handling
,
9383 size_t local_symbol_count
,
9384 const unsigned char* plocal_symbols
)
9386 if (sh_type
== elfcpp::SHT_RELA
)
9388 gold_error(_("%s: unsupported RELA reloc section"),
9389 object
->name().c_str());
9393 gold::scan_relocs
<32, big_endian
, Target_arm
, Scan
, Classify_reloc
>(
9402 needs_special_offset_handling
,
9407 // Finalize the sections.
9409 template<bool big_endian
>
9411 Target_arm
<big_endian
>::do_finalize_sections(
9413 const Input_objects
* input_objects
,
9416 bool merged_any_attributes
= false;
9417 // Merge processor-specific flags.
9418 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
9419 p
!= input_objects
->relobj_end();
9422 Arm_relobj
<big_endian
>* arm_relobj
=
9423 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
9424 if (arm_relobj
->merge_flags_and_attributes())
9426 this->merge_processor_specific_flags(
9428 arm_relobj
->processor_specific_flags());
9429 this->merge_object_attributes(arm_relobj
->name().c_str(),
9430 arm_relobj
->attributes_section_data());
9431 merged_any_attributes
= true;
9435 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
9436 p
!= input_objects
->dynobj_end();
9439 Arm_dynobj
<big_endian
>* arm_dynobj
=
9440 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
9441 this->merge_processor_specific_flags(
9443 arm_dynobj
->processor_specific_flags());
9444 this->merge_object_attributes(arm_dynobj
->name().c_str(),
9445 arm_dynobj
->attributes_section_data());
9446 merged_any_attributes
= true;
9449 // Create an empty uninitialized attribute section if we still don't have it
9450 // at this moment. This happens if there is no attributes sections in all
9452 if (this->attributes_section_data_
== NULL
)
9453 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
9455 const Object_attribute
* cpu_arch_attr
=
9456 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
9457 // Check if we need to use Cortex-A8 workaround.
9458 if (parameters
->options().user_set_fix_cortex_a8())
9459 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
9462 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9463 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9465 const Object_attribute
* cpu_arch_profile_attr
=
9466 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
9467 this->fix_cortex_a8_
=
9468 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
9469 && (cpu_arch_profile_attr
->int_value() == 'A'
9470 || cpu_arch_profile_attr
->int_value() == 0));
9473 // Check if we can use V4BX interworking.
9474 // The V4BX interworking stub contains BX instruction,
9475 // which is not specified for some profiles.
9476 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9477 && !this->may_use_v4t_interworking())
9478 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9479 "the target profile does not support BX instruction"));
9481 // Fill in some more dynamic tags.
9482 const Reloc_section
* rel_plt
= (this->plt_
== NULL
9484 : this->plt_
->rel_plt());
9485 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
9486 this->rel_dyn_
, true, false);
9488 // Emit any relocs we saved in an attempt to avoid generating COPY
9490 if (this->copy_relocs_
.any_saved_relocs())
9491 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
9493 // Handle the .ARM.exidx section.
9494 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
9496 if (!parameters
->options().relocatable())
9498 if (exidx_section
!= NULL
9499 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
9501 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9502 // the .ARM.exidx section.
9503 if (!layout
->script_options()->saw_phdrs_clause())
9505 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
9508 Output_segment
* exidx_segment
=
9509 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
9510 exidx_segment
->add_output_section_to_nonload(exidx_section
,
9516 // Create an .ARM.attributes section if we have merged any attributes
9518 if (merged_any_attributes
)
9520 Output_attributes_section_data
* attributes_section
=
9521 new Output_attributes_section_data(*this->attributes_section_data_
);
9522 layout
->add_output_section_data(".ARM.attributes",
9523 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
9524 attributes_section
, ORDER_INVALID
,
9528 // Fix up links in section EXIDX headers.
9529 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9530 p
!= layout
->section_list().end();
9532 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
9534 Arm_output_section
<big_endian
>* os
=
9535 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9536 os
->set_exidx_section_link();
9540 // Return whether a direct absolute static relocation needs to be applied.
9541 // In cases where Scan::local() or Scan::global() has created
9542 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9543 // of the relocation is carried in the data, and we must not
9544 // apply the static relocation.
9546 template<bool big_endian
>
9548 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
9549 const Sized_symbol
<32>* gsym
,
9550 unsigned int r_type
,
9552 Output_section
* output_section
)
9554 // If the output section is not allocated, then we didn't call
9555 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9557 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
9560 int ref_flags
= Scan::get_reference_flags(r_type
);
9562 // For local symbols, we will have created a non-RELATIVE dynamic
9563 // relocation only if (a) the output is position independent,
9564 // (b) the relocation is absolute (not pc- or segment-relative), and
9565 // (c) the relocation is not 32 bits wide.
9567 return !(parameters
->options().output_is_position_independent()
9568 && (ref_flags
& Symbol::ABSOLUTE_REF
)
9571 // For global symbols, we use the same helper routines used in the
9572 // scan pass. If we did not create a dynamic relocation, or if we
9573 // created a RELATIVE dynamic relocation, we should apply the static
9575 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
9576 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
9577 && gsym
->can_use_relative_reloc(ref_flags
9578 & Symbol::FUNCTION_CALL
);
9579 return !has_dyn
|| is_rel
;
9582 // Perform a relocation.
9584 template<bool big_endian
>
9586 Target_arm
<big_endian
>::Relocate::relocate(
9587 const Relocate_info
<32, big_endian
>* relinfo
,
9590 Output_section
* output_section
,
9592 const unsigned char* preloc
,
9593 const Sized_symbol
<32>* gsym
,
9594 const Symbol_value
<32>* psymval
,
9595 unsigned char* view
,
9596 Arm_address address
,
9597 section_size_type view_size
)
9602 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
9604 const elfcpp::Rel
<32, big_endian
> rel(preloc
);
9605 unsigned int r_type
= elfcpp::elf_r_type
<32>(rel
.get_r_info());
9606 r_type
= target
->get_real_reloc_type(r_type
);
9607 const Arm_reloc_property
* reloc_property
=
9608 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9609 if (reloc_property
== NULL
)
9611 std::string reloc_name
=
9612 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9613 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9614 _("cannot relocate %s in object file"),
9615 reloc_name
.c_str());
9619 const Arm_relobj
<big_endian
>* object
=
9620 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9622 // If the final branch target of a relocation is THUMB instruction, this
9623 // is 1. Otherwise it is 0.
9624 Arm_address thumb_bit
= 0;
9625 Symbol_value
<32> symval
;
9626 bool is_weakly_undefined_without_plt
= false;
9627 bool have_got_offset
= false;
9628 unsigned int got_offset
= 0;
9630 // If the relocation uses the GOT entry of a symbol instead of the symbol
9631 // itself, we don't care about whether the symbol is defined or what kind
9633 if (reloc_property
->uses_got_entry())
9635 // Get the GOT offset.
9636 // The GOT pointer points to the end of the GOT section.
9637 // We need to subtract the size of the GOT section to get
9638 // the actual offset to use in the relocation.
9639 // TODO: We should move GOT offset computing code in TLS relocations
9643 case elfcpp::R_ARM_GOT_BREL
:
9644 case elfcpp::R_ARM_GOT_PREL
:
9647 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
9648 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
9649 - target
->got_size());
9653 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9654 gold_assert(object
->local_has_got_offset(r_sym
,
9655 GOT_TYPE_STANDARD
));
9656 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
9657 - target
->got_size());
9659 have_got_offset
= true;
9666 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
9670 // This is a global symbol. Determine if we use PLT and if the
9671 // final target is THUMB.
9672 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
9674 // This uses a PLT, change the symbol value.
9675 symval
.set_output_value(target
->plt_address_for_global(gsym
));
9678 else if (gsym
->is_weak_undefined())
9680 // This is a weakly undefined symbol and we do not use PLT
9681 // for this relocation. A branch targeting this symbol will
9682 // be converted into an NOP.
9683 is_weakly_undefined_without_plt
= true;
9685 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
9687 // This relocation uses the symbol value but the symbol is
9688 // undefined. Exit early and have the caller reporting an
9694 // Set thumb bit if symbol:
9695 // -Has type STT_ARM_TFUNC or
9696 // -Has type STT_FUNC, is defined and with LSB in value set.
9698 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9699 || (gsym
->type() == elfcpp::STT_FUNC
9700 && !gsym
->is_undefined()
9701 && ((psymval
->value(object
, 0) & 1) != 0)))
9708 // This is a local symbol. Determine if the final target is THUMB.
9709 // We saved this information when all the local symbols were read.
9710 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
9711 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9712 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9714 if (psymval
->is_ifunc_symbol() && object
->local_has_plt_offset(r_sym
))
9716 symval
.set_output_value(
9717 target
->plt_address_for_local(object
, r_sym
));
9724 // This is a fake relocation synthesized for a stub. It does not have
9725 // a real symbol. We just look at the LSB of the symbol value to
9726 // determine if the target is THUMB or not.
9727 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
9730 // Strip LSB if this points to a THUMB target.
9732 && reloc_property
->uses_thumb_bit()
9733 && ((psymval
->value(object
, 0) & 1) != 0))
9735 Arm_address stripped_value
=
9736 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9737 symval
.set_output_value(stripped_value
);
9741 // To look up relocation stubs, we need to pass the symbol table index of
9743 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9745 // Get the addressing origin of the output segment defining the
9746 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9747 Arm_address sym_origin
= 0;
9748 if (reloc_property
->uses_symbol_base())
9750 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
9751 // R_ARM_BASE_ABS with the NULL symbol will give the
9752 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9753 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9754 sym_origin
= target
->got_plt_section()->address();
9755 else if (gsym
== NULL
)
9757 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
9758 sym_origin
= gsym
->output_segment()->vaddr();
9759 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
9760 sym_origin
= gsym
->output_data()->address();
9762 // TODO: Assumes the segment base to be zero for the global symbols
9763 // till the proper support for the segment-base-relative addressing
9764 // will be implemented. This is consistent with GNU ld.
9767 // For relative addressing relocation, find out the relative address base.
9768 Arm_address relative_address_base
= 0;
9769 switch(reloc_property
->relative_address_base())
9771 case Arm_reloc_property::RAB_NONE
:
9772 // Relocations with relative address bases RAB_TLS and RAB_tp are
9773 // handled by relocate_tls. So we do not need to do anything here.
9774 case Arm_reloc_property::RAB_TLS
:
9775 case Arm_reloc_property::RAB_tp
:
9777 case Arm_reloc_property::RAB_B_S
:
9778 relative_address_base
= sym_origin
;
9780 case Arm_reloc_property::RAB_GOT_ORG
:
9781 relative_address_base
= target
->got_plt_section()->address();
9783 case Arm_reloc_property::RAB_P
:
9784 relative_address_base
= address
;
9786 case Arm_reloc_property::RAB_Pa
:
9787 relative_address_base
= address
& 0xfffffffcU
;
9793 typename
Arm_relocate_functions::Status reloc_status
=
9794 Arm_relocate_functions::STATUS_OKAY
;
9795 bool check_overflow
= reloc_property
->checks_overflow();
9798 case elfcpp::R_ARM_NONE
:
9801 case elfcpp::R_ARM_ABS8
:
9802 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9803 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9806 case elfcpp::R_ARM_ABS12
:
9807 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9808 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9811 case elfcpp::R_ARM_ABS16
:
9812 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9813 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9816 case elfcpp::R_ARM_ABS32
:
9817 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9818 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9822 case elfcpp::R_ARM_ABS32_NOI
:
9823 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9824 // No thumb bit for this relocation: (S + A)
9825 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9829 case elfcpp::R_ARM_MOVW_ABS_NC
:
9830 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9831 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9836 case elfcpp::R_ARM_MOVT_ABS
:
9837 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9838 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9841 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9842 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9843 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9844 0, thumb_bit
, false);
9847 case elfcpp::R_ARM_THM_MOVT_ABS
:
9848 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9849 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9853 case elfcpp::R_ARM_MOVW_PREL_NC
:
9854 case elfcpp::R_ARM_MOVW_BREL_NC
:
9855 case elfcpp::R_ARM_MOVW_BREL
:
9857 Arm_relocate_functions::movw(view
, object
, psymval
,
9858 relative_address_base
, thumb_bit
,
9862 case elfcpp::R_ARM_MOVT_PREL
:
9863 case elfcpp::R_ARM_MOVT_BREL
:
9865 Arm_relocate_functions::movt(view
, object
, psymval
,
9866 relative_address_base
);
9869 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9870 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9871 case elfcpp::R_ARM_THM_MOVW_BREL
:
9873 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9874 relative_address_base
,
9875 thumb_bit
, check_overflow
);
9878 case elfcpp::R_ARM_THM_MOVT_PREL
:
9879 case elfcpp::R_ARM_THM_MOVT_BREL
:
9881 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9882 relative_address_base
);
9885 case elfcpp::R_ARM_REL32
:
9886 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9887 address
, thumb_bit
);
9890 case elfcpp::R_ARM_THM_ABS5
:
9891 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9892 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9895 // Thumb long branches.
9896 case elfcpp::R_ARM_THM_CALL
:
9897 case elfcpp::R_ARM_THM_XPC22
:
9898 case elfcpp::R_ARM_THM_JUMP24
:
9900 Arm_relocate_functions::thumb_branch_common(
9901 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9902 thumb_bit
, is_weakly_undefined_without_plt
);
9905 case elfcpp::R_ARM_GOTOFF32
:
9907 Arm_address got_origin
;
9908 got_origin
= target
->got_plt_section()->address();
9909 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9910 got_origin
, thumb_bit
);
9914 case elfcpp::R_ARM_BASE_PREL
:
9915 gold_assert(gsym
!= NULL
);
9917 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9920 case elfcpp::R_ARM_BASE_ABS
:
9921 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9922 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9925 case elfcpp::R_ARM_GOT_BREL
:
9926 gold_assert(have_got_offset
);
9927 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9930 case elfcpp::R_ARM_GOT_PREL
:
9931 gold_assert(have_got_offset
);
9932 // Get the address origin for GOT PLT, which is allocated right
9933 // after the GOT section, to calculate an absolute address of
9934 // the symbol GOT entry (got_origin + got_offset).
9935 Arm_address got_origin
;
9936 got_origin
= target
->got_plt_section()->address();
9937 reloc_status
= Arm_relocate_functions::got_prel(view
,
9938 got_origin
+ got_offset
,
9942 case elfcpp::R_ARM_PLT32
:
9943 case elfcpp::R_ARM_CALL
:
9944 case elfcpp::R_ARM_JUMP24
:
9945 case elfcpp::R_ARM_XPC25
:
9946 gold_assert(gsym
== NULL
9947 || gsym
->has_plt_offset()
9948 || gsym
->final_value_is_known()
9949 || (gsym
->is_defined()
9950 && !gsym
->is_from_dynobj()
9951 && !gsym
->is_preemptible()));
9953 Arm_relocate_functions::arm_branch_common(
9954 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9955 thumb_bit
, is_weakly_undefined_without_plt
);
9958 case elfcpp::R_ARM_THM_JUMP19
:
9960 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9964 case elfcpp::R_ARM_THM_JUMP6
:
9966 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9969 case elfcpp::R_ARM_THM_JUMP8
:
9971 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9974 case elfcpp::R_ARM_THM_JUMP11
:
9976 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9979 case elfcpp::R_ARM_PREL31
:
9980 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9981 address
, thumb_bit
);
9984 case elfcpp::R_ARM_V4BX
:
9985 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9987 const bool is_v4bx_interworking
=
9988 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9990 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9991 is_v4bx_interworking
);
9995 case elfcpp::R_ARM_THM_PC8
:
9997 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
10000 case elfcpp::R_ARM_THM_PC12
:
10002 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
10005 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
10007 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
10011 case elfcpp::R_ARM_ALU_PC_G0_NC
:
10012 case elfcpp::R_ARM_ALU_PC_G0
:
10013 case elfcpp::R_ARM_ALU_PC_G1_NC
:
10014 case elfcpp::R_ARM_ALU_PC_G1
:
10015 case elfcpp::R_ARM_ALU_PC_G2
:
10016 case elfcpp::R_ARM_ALU_SB_G0_NC
:
10017 case elfcpp::R_ARM_ALU_SB_G0
:
10018 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10019 case elfcpp::R_ARM_ALU_SB_G1
:
10020 case elfcpp::R_ARM_ALU_SB_G2
:
10022 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
10023 reloc_property
->group_index(),
10024 relative_address_base
,
10025 thumb_bit
, check_overflow
);
10028 case elfcpp::R_ARM_LDR_PC_G0
:
10029 case elfcpp::R_ARM_LDR_PC_G1
:
10030 case elfcpp::R_ARM_LDR_PC_G2
:
10031 case elfcpp::R_ARM_LDR_SB_G0
:
10032 case elfcpp::R_ARM_LDR_SB_G1
:
10033 case elfcpp::R_ARM_LDR_SB_G2
:
10035 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
10036 reloc_property
->group_index(),
10037 relative_address_base
);
10040 case elfcpp::R_ARM_LDRS_PC_G0
:
10041 case elfcpp::R_ARM_LDRS_PC_G1
:
10042 case elfcpp::R_ARM_LDRS_PC_G2
:
10043 case elfcpp::R_ARM_LDRS_SB_G0
:
10044 case elfcpp::R_ARM_LDRS_SB_G1
:
10045 case elfcpp::R_ARM_LDRS_SB_G2
:
10047 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
10048 reloc_property
->group_index(),
10049 relative_address_base
);
10052 case elfcpp::R_ARM_LDC_PC_G0
:
10053 case elfcpp::R_ARM_LDC_PC_G1
:
10054 case elfcpp::R_ARM_LDC_PC_G2
:
10055 case elfcpp::R_ARM_LDC_SB_G0
:
10056 case elfcpp::R_ARM_LDC_SB_G1
:
10057 case elfcpp::R_ARM_LDC_SB_G2
:
10059 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
10060 reloc_property
->group_index(),
10061 relative_address_base
);
10064 // These are initial tls relocs, which are expected when
10066 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
10067 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10068 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10069 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10070 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10072 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
10073 view
, address
, view_size
);
10076 // The known and unknown unsupported and/or deprecated relocations.
10077 case elfcpp::R_ARM_PC24
:
10078 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
10079 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
10080 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
10082 // Just silently leave the method. We should get an appropriate error
10083 // message in the scan methods.
10087 // Report any errors.
10088 switch (reloc_status
)
10090 case Arm_relocate_functions::STATUS_OKAY
:
10092 case Arm_relocate_functions::STATUS_OVERFLOW
:
10093 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10094 _("relocation overflow in %s"),
10095 reloc_property
->name().c_str());
10097 case Arm_relocate_functions::STATUS_BAD_RELOC
:
10098 gold_error_at_location(
10101 rel
.get_r_offset(),
10102 _("unexpected opcode while processing relocation %s"),
10103 reloc_property
->name().c_str());
10106 gold_unreachable();
10112 // Perform a TLS relocation.
10114 template<bool big_endian
>
10115 inline typename Arm_relocate_functions
<big_endian
>::Status
10116 Target_arm
<big_endian
>::Relocate::relocate_tls(
10117 const Relocate_info
<32, big_endian
>* relinfo
,
10118 Target_arm
<big_endian
>* target
,
10120 const elfcpp::Rel
<32, big_endian
>& rel
,
10121 unsigned int r_type
,
10122 const Sized_symbol
<32>* gsym
,
10123 const Symbol_value
<32>* psymval
,
10124 unsigned char* view
,
10125 elfcpp::Elf_types
<32>::Elf_Addr address
,
10126 section_size_type
/*view_size*/ )
10128 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
10129 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
10130 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
10132 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
10134 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
10136 const bool is_final
= (gsym
== NULL
10137 ? !parameters
->options().shared()
10138 : gsym
->final_value_is_known());
10139 const tls::Tls_optimization optimized_type
10140 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
10143 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
10145 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
10146 unsigned int got_offset
;
10149 gold_assert(gsym
->has_got_offset(got_type
));
10150 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
10154 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10155 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10156 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
10157 - target
->got_size());
10159 if (optimized_type
== tls::TLSOPT_NONE
)
10161 Arm_address got_entry
=
10162 target
->got_plt_section()->address() + got_offset
;
10164 // Relocate the field with the PC relative offset of the pair of
10166 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10167 return ArmRelocFuncs::STATUS_OKAY
;
10172 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10173 if (optimized_type
== tls::TLSOPT_NONE
)
10175 // Relocate the field with the offset of the GOT entry for
10176 // the module index.
10177 unsigned int got_offset
;
10178 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
10179 - target
->got_size());
10180 Arm_address got_entry
=
10181 target
->got_plt_section()->address() + got_offset
;
10183 // Relocate the field with the PC relative offset of the pair of
10185 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10186 return ArmRelocFuncs::STATUS_OKAY
;
10190 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10191 RelocFuncs::rel32_unaligned(view
, value
);
10192 return ArmRelocFuncs::STATUS_OKAY
;
10194 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10195 if (optimized_type
== tls::TLSOPT_NONE
)
10197 // Relocate the field with the offset of the GOT entry for
10198 // the tp-relative offset of the symbol.
10199 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
10200 unsigned int got_offset
;
10203 gold_assert(gsym
->has_got_offset(got_type
));
10204 got_offset
= gsym
->got_offset(got_type
);
10208 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10209 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10210 got_offset
= object
->local_got_offset(r_sym
, got_type
);
10213 // All GOT offsets are relative to the end of the GOT.
10214 got_offset
-= target
->got_size();
10216 Arm_address got_entry
=
10217 target
->got_plt_section()->address() + got_offset
;
10219 // Relocate the field with the PC relative offset of the GOT entry.
10220 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10221 return ArmRelocFuncs::STATUS_OKAY
;
10225 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10226 // If we're creating a shared library, a dynamic relocation will
10227 // have been created for this location, so do not apply it now.
10228 if (!parameters
->options().shared())
10230 gold_assert(tls_segment
!= NULL
);
10232 // $tp points to the TCB, which is followed by the TLS, so we
10233 // need to add TCB size to the offset.
10234 Arm_address aligned_tcb_size
=
10235 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
10236 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
10239 return ArmRelocFuncs::STATUS_OKAY
;
10242 gold_unreachable();
10245 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10246 _("unsupported reloc %u"),
10248 return ArmRelocFuncs::STATUS_BAD_RELOC
;
10251 // Relocate section data.
10253 template<bool big_endian
>
10255 Target_arm
<big_endian
>::relocate_section(
10256 const Relocate_info
<32, big_endian
>* relinfo
,
10257 unsigned int sh_type
,
10258 const unsigned char* prelocs
,
10259 size_t reloc_count
,
10260 Output_section
* output_section
,
10261 bool needs_special_offset_handling
,
10262 unsigned char* view
,
10263 Arm_address address
,
10264 section_size_type view_size
,
10265 const Reloc_symbol_changes
* reloc_symbol_changes
)
10267 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
10268 gold_assert(sh_type
== elfcpp::SHT_REL
);
10270 // See if we are relocating a relaxed input section. If so, the view
10271 // covers the whole output section and we need to adjust accordingly.
10272 if (needs_special_offset_handling
)
10274 const Output_relaxed_input_section
* poris
=
10275 output_section
->find_relaxed_input_section(relinfo
->object
,
10276 relinfo
->data_shndx
);
10279 Arm_address section_address
= poris
->address();
10280 section_size_type section_size
= poris
->data_size();
10282 gold_assert((section_address
>= address
)
10283 && ((section_address
+ section_size
)
10284 <= (address
+ view_size
)));
10286 off_t offset
= section_address
- address
;
10289 view_size
= section_size
;
10293 gold::relocate_section
<32, big_endian
, Target_arm
, Arm_relocate
,
10294 gold::Default_comdat_behavior
, Classify_reloc
>(
10300 needs_special_offset_handling
,
10304 reloc_symbol_changes
);
10307 // Return the size of a relocation while scanning during a relocatable
10310 template<bool big_endian
>
10312 Target_arm
<big_endian
>::Classify_reloc::get_size_for_reloc(
10313 unsigned int r_type
,
10316 Target_arm
<big_endian
>* arm_target
=
10317 Target_arm
<big_endian
>::default_target();
10318 r_type
= arm_target
->get_real_reloc_type(r_type
);
10319 const Arm_reloc_property
* arp
=
10320 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10322 return arp
->size();
10325 std::string reloc_name
=
10326 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
10327 gold_error(_("%s: unexpected %s in object file"),
10328 object
->name().c_str(), reloc_name
.c_str());
10333 // Scan the relocs during a relocatable link.
10335 template<bool big_endian
>
10337 Target_arm
<big_endian
>::scan_relocatable_relocs(
10338 Symbol_table
* symtab
,
10340 Sized_relobj_file
<32, big_endian
>* object
,
10341 unsigned int data_shndx
,
10342 unsigned int sh_type
,
10343 const unsigned char* prelocs
,
10344 size_t reloc_count
,
10345 Output_section
* output_section
,
10346 bool needs_special_offset_handling
,
10347 size_t local_symbol_count
,
10348 const unsigned char* plocal_symbols
,
10349 Relocatable_relocs
* rr
)
10351 typedef Arm_scan_relocatable_relocs
<big_endian
, Classify_reloc
>
10352 Scan_relocatable_relocs
;
10354 gold_assert(sh_type
== elfcpp::SHT_REL
);
10356 gold::scan_relocatable_relocs
<32, big_endian
, Scan_relocatable_relocs
>(
10364 needs_special_offset_handling
,
10365 local_symbol_count
,
10370 // Scan the relocs for --emit-relocs.
10372 template<bool big_endian
>
10374 Target_arm
<big_endian
>::emit_relocs_scan(Symbol_table
* symtab
,
10376 Sized_relobj_file
<32, big_endian
>* object
,
10377 unsigned int data_shndx
,
10378 unsigned int sh_type
,
10379 const unsigned char* prelocs
,
10380 size_t reloc_count
,
10381 Output_section
* output_section
,
10382 bool needs_special_offset_handling
,
10383 size_t local_symbol_count
,
10384 const unsigned char* plocal_syms
,
10385 Relocatable_relocs
* rr
)
10387 typedef gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
10389 typedef gold::Default_emit_relocs_strategy
<Classify_reloc
>
10390 Emit_relocs_strategy
;
10392 gold_assert(sh_type
== elfcpp::SHT_REL
);
10394 gold::scan_relocatable_relocs
<32, big_endian
, Emit_relocs_strategy
>(
10402 needs_special_offset_handling
,
10403 local_symbol_count
,
10408 // Emit relocations for a section.
10410 template<bool big_endian
>
10412 Target_arm
<big_endian
>::relocate_relocs(
10413 const Relocate_info
<32, big_endian
>* relinfo
,
10414 unsigned int sh_type
,
10415 const unsigned char* prelocs
,
10416 size_t reloc_count
,
10417 Output_section
* output_section
,
10418 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10419 unsigned char* view
,
10420 Arm_address view_address
,
10421 section_size_type view_size
,
10422 unsigned char* reloc_view
,
10423 section_size_type reloc_view_size
)
10425 gold_assert(sh_type
== elfcpp::SHT_REL
);
10427 gold::relocate_relocs
<32, big_endian
, Classify_reloc
>(
10432 offset_in_output_section
,
10440 // Perform target-specific processing in a relocatable link. This is
10441 // only used if we use the relocation strategy RELOC_SPECIAL.
10443 template<bool big_endian
>
10445 Target_arm
<big_endian
>::relocate_special_relocatable(
10446 const Relocate_info
<32, big_endian
>* relinfo
,
10447 unsigned int sh_type
,
10448 const unsigned char* preloc_in
,
10450 Output_section
* output_section
,
10451 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10452 unsigned char* view
,
10453 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
10455 unsigned char* preloc_out
)
10457 // We can only handle REL type relocation sections.
10458 gold_assert(sh_type
== elfcpp::SHT_REL
);
10460 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
10461 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
10463 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
10465 const Arm_relobj
<big_endian
>* object
=
10466 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10467 const unsigned int local_count
= object
->local_symbol_count();
10469 Reltype
reloc(preloc_in
);
10470 Reltype_write
reloc_write(preloc_out
);
10472 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
10473 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
10474 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
10476 const Arm_reloc_property
* arp
=
10477 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10478 gold_assert(arp
!= NULL
);
10480 // Get the new symbol index.
10481 // We only use RELOC_SPECIAL strategy in local relocations.
10482 gold_assert(r_sym
< local_count
);
10484 // We are adjusting a section symbol. We need to find
10485 // the symbol table index of the section symbol for
10486 // the output section corresponding to input section
10487 // in which this symbol is defined.
10489 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
10490 gold_assert(is_ordinary
);
10491 Output_section
* os
= object
->output_section(shndx
);
10492 gold_assert(os
!= NULL
);
10493 gold_assert(os
->needs_symtab_index());
10494 unsigned int new_symndx
= os
->symtab_index();
10496 // Get the new offset--the location in the output section where
10497 // this relocation should be applied.
10499 Arm_address offset
= reloc
.get_r_offset();
10500 Arm_address new_offset
;
10501 if (offset_in_output_section
!= invalid_address
)
10502 new_offset
= offset
+ offset_in_output_section
;
10505 section_offset_type sot_offset
=
10506 convert_types
<section_offset_type
, Arm_address
>(offset
);
10507 section_offset_type new_sot_offset
=
10508 output_section
->output_offset(object
, relinfo
->data_shndx
,
10510 gold_assert(new_sot_offset
!= -1);
10511 new_offset
= new_sot_offset
;
10514 // In an object file, r_offset is an offset within the section.
10515 // In an executable or dynamic object, generated by
10516 // --emit-relocs, r_offset is an absolute address.
10517 if (!parameters
->options().relocatable())
10519 new_offset
+= view_address
;
10520 if (offset_in_output_section
!= invalid_address
)
10521 new_offset
-= offset_in_output_section
;
10524 reloc_write
.put_r_offset(new_offset
);
10525 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
10527 // Handle the reloc addend.
10528 // The relocation uses a section symbol in the input file.
10529 // We are adjusting it to use a section symbol in the output
10530 // file. The input section symbol refers to some address in
10531 // the input section. We need the relocation in the output
10532 // file to refer to that same address. This adjustment to
10533 // the addend is the same calculation we use for a simple
10534 // absolute relocation for the input section symbol.
10536 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
10538 // Handle THUMB bit.
10539 Symbol_value
<32> symval
;
10540 Arm_address thumb_bit
=
10541 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
10543 && arp
->uses_thumb_bit()
10544 && ((psymval
->value(object
, 0) & 1) != 0))
10546 Arm_address stripped_value
=
10547 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
10548 symval
.set_output_value(stripped_value
);
10552 unsigned char* paddend
= view
+ offset
;
10553 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
10554 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
10557 case elfcpp::R_ARM_ABS8
:
10558 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
10562 case elfcpp::R_ARM_ABS12
:
10563 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
10567 case elfcpp::R_ARM_ABS16
:
10568 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
10572 case elfcpp::R_ARM_THM_ABS5
:
10573 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
10578 case elfcpp::R_ARM_MOVW_ABS_NC
:
10579 case elfcpp::R_ARM_MOVW_PREL_NC
:
10580 case elfcpp::R_ARM_MOVW_BREL_NC
:
10581 case elfcpp::R_ARM_MOVW_BREL
:
10582 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
10583 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10586 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
10587 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
10588 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
10589 case elfcpp::R_ARM_THM_MOVW_BREL
:
10590 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
10591 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10594 case elfcpp::R_ARM_THM_CALL
:
10595 case elfcpp::R_ARM_THM_XPC22
:
10596 case elfcpp::R_ARM_THM_JUMP24
:
10598 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
10599 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10603 case elfcpp::R_ARM_PLT32
:
10604 case elfcpp::R_ARM_CALL
:
10605 case elfcpp::R_ARM_JUMP24
:
10606 case elfcpp::R_ARM_XPC25
:
10608 Arm_relocate_functions
<big_endian
>::arm_branch_common(
10609 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10613 case elfcpp::R_ARM_THM_JUMP19
:
10615 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
10616 psymval
, 0, thumb_bit
);
10619 case elfcpp::R_ARM_THM_JUMP6
:
10621 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
10625 case elfcpp::R_ARM_THM_JUMP8
:
10627 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
10631 case elfcpp::R_ARM_THM_JUMP11
:
10633 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
10637 case elfcpp::R_ARM_PREL31
:
10639 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
10643 case elfcpp::R_ARM_THM_PC8
:
10645 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
10649 case elfcpp::R_ARM_THM_PC12
:
10651 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
10655 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
10657 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
10661 // These relocation truncate relocation results so we cannot handle them
10662 // in a relocatable link.
10663 case elfcpp::R_ARM_MOVT_ABS
:
10664 case elfcpp::R_ARM_THM_MOVT_ABS
:
10665 case elfcpp::R_ARM_MOVT_PREL
:
10666 case elfcpp::R_ARM_MOVT_BREL
:
10667 case elfcpp::R_ARM_THM_MOVT_PREL
:
10668 case elfcpp::R_ARM_THM_MOVT_BREL
:
10669 case elfcpp::R_ARM_ALU_PC_G0_NC
:
10670 case elfcpp::R_ARM_ALU_PC_G0
:
10671 case elfcpp::R_ARM_ALU_PC_G1_NC
:
10672 case elfcpp::R_ARM_ALU_PC_G1
:
10673 case elfcpp::R_ARM_ALU_PC_G2
:
10674 case elfcpp::R_ARM_ALU_SB_G0_NC
:
10675 case elfcpp::R_ARM_ALU_SB_G0
:
10676 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10677 case elfcpp::R_ARM_ALU_SB_G1
:
10678 case elfcpp::R_ARM_ALU_SB_G2
:
10679 case elfcpp::R_ARM_LDR_PC_G0
:
10680 case elfcpp::R_ARM_LDR_PC_G1
:
10681 case elfcpp::R_ARM_LDR_PC_G2
:
10682 case elfcpp::R_ARM_LDR_SB_G0
:
10683 case elfcpp::R_ARM_LDR_SB_G1
:
10684 case elfcpp::R_ARM_LDR_SB_G2
:
10685 case elfcpp::R_ARM_LDRS_PC_G0
:
10686 case elfcpp::R_ARM_LDRS_PC_G1
:
10687 case elfcpp::R_ARM_LDRS_PC_G2
:
10688 case elfcpp::R_ARM_LDRS_SB_G0
:
10689 case elfcpp::R_ARM_LDRS_SB_G1
:
10690 case elfcpp::R_ARM_LDRS_SB_G2
:
10691 case elfcpp::R_ARM_LDC_PC_G0
:
10692 case elfcpp::R_ARM_LDC_PC_G1
:
10693 case elfcpp::R_ARM_LDC_PC_G2
:
10694 case elfcpp::R_ARM_LDC_SB_G0
:
10695 case elfcpp::R_ARM_LDC_SB_G1
:
10696 case elfcpp::R_ARM_LDC_SB_G2
:
10697 gold_error(_("cannot handle %s in a relocatable link"),
10698 arp
->name().c_str());
10702 gold_unreachable();
10705 // Report any errors.
10706 switch (reloc_status
)
10708 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
10710 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
10711 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10712 _("relocation overflow in %s"),
10713 arp
->name().c_str());
10715 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
10716 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10717 _("unexpected opcode while processing relocation %s"),
10718 arp
->name().c_str());
10721 gold_unreachable();
10725 // Return the value to use for a dynamic symbol which requires special
10726 // treatment. This is how we support equality comparisons of function
10727 // pointers across shared library boundaries, as described in the
10728 // processor specific ABI supplement.
10730 template<bool big_endian
>
10732 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
10734 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
10735 return this->plt_address_for_global(gsym
);
10738 // Map platform-specific relocs to real relocs
10740 template<bool big_endian
>
10742 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
) const
10746 case elfcpp::R_ARM_TARGET1
:
10747 return this->target1_reloc_
;
10749 case elfcpp::R_ARM_TARGET2
:
10750 return this->target2_reloc_
;
10757 // Whether if two EABI versions V1 and V2 are compatible.
10759 template<bool big_endian
>
10761 Target_arm
<big_endian
>::are_eabi_versions_compatible(
10762 elfcpp::Elf_Word v1
,
10763 elfcpp::Elf_Word v2
)
10765 // v4 and v5 are the same spec before and after it was released,
10766 // so allow mixing them.
10767 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
10768 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
10769 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
10775 // Combine FLAGS from an input object called NAME and the processor-specific
10776 // flags in the ELF header of the output. Much of this is adapted from the
10777 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10778 // in bfd/elf32-arm.c.
10780 template<bool big_endian
>
10782 Target_arm
<big_endian
>::merge_processor_specific_flags(
10783 const std::string
& name
,
10784 elfcpp::Elf_Word flags
)
10786 if (this->are_processor_specific_flags_set())
10788 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
10790 // Nothing to merge if flags equal to those in output.
10791 if (flags
== out_flags
)
10794 // Complain about various flag mismatches.
10795 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
10796 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
10797 if (!this->are_eabi_versions_compatible(version1
, version2
)
10798 && parameters
->options().warn_mismatch())
10799 gold_error(_("Source object %s has EABI version %d but output has "
10800 "EABI version %d."),
10802 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
10803 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
10807 // If the input is the default architecture and had the default
10808 // flags then do not bother setting the flags for the output
10809 // architecture, instead allow future merges to do this. If no
10810 // future merges ever set these flags then they will retain their
10811 // uninitialised values, which surprise surprise, correspond
10812 // to the default values.
10816 // This is the first time, just copy the flags.
10817 // We only copy the EABI version for now.
10818 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10822 // Adjust ELF file header.
10823 template<bool big_endian
>
10825 Target_arm
<big_endian
>::do_adjust_elf_header(
10826 unsigned char* view
,
10829 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10831 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10832 elfcpp::Elf_Word flags
= this->processor_specific_flags();
10833 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10834 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10836 if (elfcpp::arm_eabi_version(flags
)
10837 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10838 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10840 e_ident
[elfcpp::EI_OSABI
] = 0;
10841 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10843 // Do EF_ARM_BE8 adjustment.
10844 if (parameters
->options().be8() && !big_endian
)
10845 gold_error("BE8 images only valid in big-endian mode.");
10846 if (parameters
->options().be8())
10848 flags
|= elfcpp::EF_ARM_BE8
;
10849 this->set_processor_specific_flags(flags
);
10852 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10854 if (elfcpp::arm_eabi_version(flags
) == elfcpp::EF_ARM_EABI_VER5
)
10856 elfcpp::Elf_Half type
= ehdr
.get_e_type();
10857 if (type
== elfcpp::ET_EXEC
|| type
== elfcpp::ET_DYN
)
10859 Object_attribute
* attr
= this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args
);
10860 if (attr
->int_value() == elfcpp::AEABI_VFP_args_vfp
)
10861 flags
|= elfcpp::EF_ARM_ABI_FLOAT_HARD
;
10863 flags
|= elfcpp::EF_ARM_ABI_FLOAT_SOFT
;
10864 this->set_processor_specific_flags(flags
);
10867 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10868 oehdr
.put_e_ident(e_ident
);
10869 oehdr
.put_e_flags(this->processor_specific_flags());
10872 // do_make_elf_object to override the same function in the base class.
10873 // We need to use a target-specific sub-class of
10874 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10875 // Hence we need to have our own ELF object creation.
10877 template<bool big_endian
>
10879 Target_arm
<big_endian
>::do_make_elf_object(
10880 const std::string
& name
,
10881 Input_file
* input_file
,
10882 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10884 int et
= ehdr
.get_e_type();
10885 // ET_EXEC files are valid input for --just-symbols/-R,
10886 // and we treat them as relocatable objects.
10887 if (et
== elfcpp::ET_REL
10888 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10890 Arm_relobj
<big_endian
>* obj
=
10891 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10895 else if (et
== elfcpp::ET_DYN
)
10897 Sized_dynobj
<32, big_endian
>* obj
=
10898 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10904 gold_error(_("%s: unsupported ELF file type %d"),
10910 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10911 // Returns -1 if no architecture could be read.
10912 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10914 template<bool big_endian
>
10916 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10917 const Attributes_section_data
* pasd
)
10919 const Object_attribute
* known_attributes
=
10920 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10922 // Note: the tag and its argument below are uleb128 values, though
10923 // currently-defined values fit in one byte for each.
10924 const std::string
& sv
=
10925 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10927 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10928 && (sv
.data()[1] & 128) != 128)
10929 return sv
.data()[1];
10931 // This tag is "safely ignorable", so don't complain if it looks funny.
10935 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10936 // The tag is removed if ARCH is -1.
10937 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10939 template<bool big_endian
>
10941 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10942 Attributes_section_data
* pasd
,
10945 Object_attribute
* known_attributes
=
10946 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10950 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10954 // Note: the tag and its argument below are uleb128 values, though
10955 // currently-defined values fit in one byte for each.
10957 sv
[0] = elfcpp::Tag_CPU_arch
;
10958 gold_assert(arch
!= 0);
10962 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10965 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10967 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10969 template<bool big_endian
>
10971 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10974 int* secondary_compat_out
,
10976 int secondary_compat
)
10978 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10979 static const int v6t2
[] =
10981 T(V6T2
), // PRE_V4.
10991 static const int v6k
[] =
11004 static const int v7
[] =
11018 static const int v6_m
[] =
11033 static const int v6s_m
[] =
11049 static const int v7e_m
[] =
11056 T(V7E_M
), // V5TEJ.
11063 T(V7E_M
), // V6S_M.
11066 static const int v8
[] =
11084 static const int v4t_plus_v6_m
[] =
11091 T(V5TEJ
), // V5TEJ.
11098 T(V6S_M
), // V6S_M.
11099 T(V7E_M
), // V7E_M.
11101 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
11103 static const int* comb
[] =
11112 // Pseudo-architecture.
11116 // Check we've not got a higher architecture than we know about.
11118 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
11120 gold_error(_("%s: unknown CPU architecture"), name
);
11124 // Override old tag if we have a Tag_also_compatible_with on the output.
11126 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
11127 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
11128 oldtag
= T(V4T_PLUS_V6_M
);
11130 // And override the new tag if we have a Tag_also_compatible_with on the
11133 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
11134 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
11135 newtag
= T(V4T_PLUS_V6_M
);
11137 // Architectures before V6KZ add features monotonically.
11138 int tagh
= std::max(oldtag
, newtag
);
11139 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
11142 int tagl
= std::min(oldtag
, newtag
);
11143 int result
= comb
[tagh
- T(V6T2
)][tagl
];
11145 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11146 // as the canonical version.
11147 if (result
== T(V4T_PLUS_V6_M
))
11150 *secondary_compat_out
= T(V6_M
);
11153 *secondary_compat_out
= -1;
11157 gold_error(_("%s: conflicting CPU architectures %d/%d"),
11158 name
, oldtag
, newtag
);
11166 // Helper to print AEABI enum tag value.
11168 template<bool big_endian
>
11170 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
11172 static const char* aeabi_enum_names
[] =
11173 { "", "variable-size", "32-bit", "" };
11174 const size_t aeabi_enum_names_size
=
11175 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
11177 if (value
< aeabi_enum_names_size
)
11178 return std::string(aeabi_enum_names
[value
]);
11182 sprintf(buffer
, "<unknown value %u>", value
);
11183 return std::string(buffer
);
11187 // Return the string value to store in TAG_CPU_name.
11189 template<bool big_endian
>
11191 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
11193 static const char* name_table
[] = {
11194 // These aren't real CPU names, but we can't guess
11195 // that from the architecture version alone.
11212 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
11214 if (value
< name_table_size
)
11215 return std::string(name_table
[value
]);
11219 sprintf(buffer
, "<unknown CPU value %u>", value
);
11220 return std::string(buffer
);
11224 // Query attributes object to see if integer divide instructions may be
11225 // present in an object.
11227 template<bool big_endian
>
11229 Target_arm
<big_endian
>::attributes_accept_div(int arch
, int profile
,
11230 const Object_attribute
* div_attr
)
11232 switch (div_attr
->int_value())
11235 // Integer divide allowed if instruction contained in
11237 if (arch
== elfcpp::TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
11239 else if (arch
>= elfcpp::TAG_CPU_ARCH_V7E_M
)
11245 // Integer divide explicitly prohibited.
11249 // Unrecognised case - treat as allowing divide everywhere.
11251 // Integer divide allowed in ARM state.
11256 // Query attributes object to see if integer divide instructions are
11257 // forbidden to be in the object. This is not the inverse of
11258 // attributes_accept_div.
11260 template<bool big_endian
>
11262 Target_arm
<big_endian
>::attributes_forbid_div(const Object_attribute
* div_attr
)
11264 return div_attr
->int_value() == 1;
11267 // Merge object attributes from input file called NAME with those of the
11268 // output. The input object attributes are in the object pointed by PASD.
11270 template<bool big_endian
>
11272 Target_arm
<big_endian
>::merge_object_attributes(
11274 const Attributes_section_data
* pasd
)
11276 // Return if there is no attributes section data.
11280 // If output has no object attributes, just copy.
11281 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
11282 if (this->attributes_section_data_
== NULL
)
11284 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
11285 Object_attribute
* out_attr
=
11286 this->attributes_section_data_
->known_attributes(vendor
);
11288 // We do not output objects with Tag_MPextension_use_legacy - we move
11289 // the attribute's value to Tag_MPextension_use. */
11290 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
11292 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
11293 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
11294 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11296 gold_error(_("%s has both the current and legacy "
11297 "Tag_MPextension_use attributes"),
11301 out_attr
[elfcpp::Tag_MPextension_use
] =
11302 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
11303 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
11304 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
11310 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
11311 Object_attribute
* out_attr
=
11312 this->attributes_section_data_
->known_attributes(vendor
);
11314 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11315 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11316 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
11318 // Ignore mismatches if the object doesn't use floating point. */
11319 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11320 == elfcpp::AEABI_FP_number_model_none
11321 || (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11322 != elfcpp::AEABI_FP_number_model_none
11323 && out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11324 == elfcpp::AEABI_VFP_args_compatible
))
11325 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
11326 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
11327 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11328 != elfcpp::AEABI_FP_number_model_none
11329 && in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11330 != elfcpp::AEABI_VFP_args_compatible
11331 && parameters
->options().warn_mismatch())
11332 gold_error(_("%s uses VFP register arguments, output does not"),
11336 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
11338 // Merge this attribute with existing attributes.
11341 case elfcpp::Tag_CPU_raw_name
:
11342 case elfcpp::Tag_CPU_name
:
11343 // These are merged after Tag_CPU_arch.
11346 case elfcpp::Tag_ABI_optimization_goals
:
11347 case elfcpp::Tag_ABI_FP_optimization_goals
:
11348 // Use the first value seen.
11351 case elfcpp::Tag_CPU_arch
:
11353 unsigned int saved_out_attr
= out_attr
->int_value();
11354 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11355 int secondary_compat
=
11356 this->get_secondary_compatible_arch(pasd
);
11357 int secondary_compat_out
=
11358 this->get_secondary_compatible_arch(
11359 this->attributes_section_data_
);
11360 out_attr
[i
].set_int_value(
11361 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
11362 &secondary_compat_out
,
11363 in_attr
[i
].int_value(),
11364 secondary_compat
));
11365 this->set_secondary_compatible_arch(this->attributes_section_data_
,
11366 secondary_compat_out
);
11368 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11369 if (out_attr
[i
].int_value() == saved_out_attr
)
11370 ; // Leave the names alone.
11371 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
11373 // The output architecture has been changed to match the
11374 // input architecture. Use the input names.
11375 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
11376 in_attr
[elfcpp::Tag_CPU_name
].string_value());
11377 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
11378 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
11382 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
11383 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
11386 // If we still don't have a value for Tag_CPU_name,
11387 // make one up now. Tag_CPU_raw_name remains blank.
11388 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
11390 const std::string cpu_name
=
11391 this->tag_cpu_name_value(out_attr
[i
].int_value());
11392 // FIXME: If we see an unknown CPU, this will be set
11393 // to "<unknown CPU n>", where n is the attribute value.
11394 // This is different from BFD, which leaves the name alone.
11395 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
11400 case elfcpp::Tag_ARM_ISA_use
:
11401 case elfcpp::Tag_THUMB_ISA_use
:
11402 case elfcpp::Tag_WMMX_arch
:
11403 case elfcpp::Tag_Advanced_SIMD_arch
:
11404 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11405 case elfcpp::Tag_ABI_FP_rounding
:
11406 case elfcpp::Tag_ABI_FP_exceptions
:
11407 case elfcpp::Tag_ABI_FP_user_exceptions
:
11408 case elfcpp::Tag_ABI_FP_number_model
:
11409 case elfcpp::Tag_VFP_HP_extension
:
11410 case elfcpp::Tag_CPU_unaligned_access
:
11411 case elfcpp::Tag_T2EE_use
:
11412 case elfcpp::Tag_Virtualization_use
:
11413 case elfcpp::Tag_MPextension_use
:
11414 // Use the largest value specified.
11415 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11416 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11419 case elfcpp::Tag_ABI_align8_preserved
:
11420 case elfcpp::Tag_ABI_PCS_RO_data
:
11421 // Use the smallest value specified.
11422 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11423 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11426 case elfcpp::Tag_ABI_align8_needed
:
11427 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
11428 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
11429 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
11432 // This error message should be enabled once all non-conforming
11433 // binaries in the toolchain have had the attributes set
11435 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11439 case elfcpp::Tag_ABI_FP_denormal
:
11440 case elfcpp::Tag_ABI_PCS_GOT_use
:
11442 // These tags have 0 = don't care, 1 = strong requirement,
11443 // 2 = weak requirement.
11444 static const int order_021
[3] = {0, 2, 1};
11446 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11447 // value if greater than 2 (for future-proofing).
11448 if ((in_attr
[i
].int_value() > 2
11449 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11450 || (in_attr
[i
].int_value() <= 2
11451 && out_attr
[i
].int_value() <= 2
11452 && (order_021
[in_attr
[i
].int_value()]
11453 > order_021
[out_attr
[i
].int_value()])))
11454 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11458 case elfcpp::Tag_CPU_arch_profile
:
11459 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
11461 // 0 will merge with anything.
11462 // 'A' and 'S' merge to 'A'.
11463 // 'R' and 'S' merge to 'R'.
11464 // 'M' and 'A|R|S' is an error.
11465 if (out_attr
[i
].int_value() == 0
11466 || (out_attr
[i
].int_value() == 'S'
11467 && (in_attr
[i
].int_value() == 'A'
11468 || in_attr
[i
].int_value() == 'R')))
11469 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11470 else if (in_attr
[i
].int_value() == 0
11471 || (in_attr
[i
].int_value() == 'S'
11472 && (out_attr
[i
].int_value() == 'A'
11473 || out_attr
[i
].int_value() == 'R')))
11475 else if (parameters
->options().warn_mismatch())
11478 (_("conflicting architecture profiles %c/%c"),
11479 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
11480 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
11484 case elfcpp::Tag_VFP_arch
:
11486 static const struct
11490 } vfp_versions
[7] =
11501 // Values greater than 6 aren't defined, so just pick the
11503 if (in_attr
[i
].int_value() > 6
11504 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11506 *out_attr
= *in_attr
;
11509 // The output uses the superset of input features
11510 // (ISA version) and registers.
11511 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
11512 vfp_versions
[out_attr
[i
].int_value()].ver
);
11513 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
11514 vfp_versions
[out_attr
[i
].int_value()].regs
);
11515 // This assumes all possible supersets are also a valid
11518 for (newval
= 6; newval
> 0; newval
--)
11520 if (regs
== vfp_versions
[newval
].regs
11521 && ver
== vfp_versions
[newval
].ver
)
11524 out_attr
[i
].set_int_value(newval
);
11527 case elfcpp::Tag_PCS_config
:
11528 if (out_attr
[i
].int_value() == 0)
11529 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11530 else if (in_attr
[i
].int_value() != 0
11531 && out_attr
[i
].int_value() != 0
11532 && parameters
->options().warn_mismatch())
11534 // It's sometimes ok to mix different configs, so this is only
11536 gold_warning(_("%s: conflicting platform configuration"), name
);
11539 case elfcpp::Tag_ABI_PCS_R9_use
:
11540 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11541 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11542 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11543 && parameters
->options().warn_mismatch())
11545 gold_error(_("%s: conflicting use of R9"), name
);
11547 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
11548 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11550 case elfcpp::Tag_ABI_PCS_RW_data
:
11551 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11552 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11553 != elfcpp::AEABI_R9_SB
)
11554 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11555 != elfcpp::AEABI_R9_unused
)
11556 && parameters
->options().warn_mismatch())
11558 gold_error(_("%s: SB relative addressing conflicts with use "
11562 // Use the smallest value specified.
11563 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11564 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11566 case elfcpp::Tag_ABI_PCS_wchar_t
:
11567 if (out_attr
[i
].int_value()
11568 && in_attr
[i
].int_value()
11569 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11570 && parameters
->options().warn_mismatch()
11571 && parameters
->options().wchar_size_warning())
11573 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11574 "use %u-byte wchar_t; use of wchar_t values "
11575 "across objects may fail"),
11576 name
, in_attr
[i
].int_value(),
11577 out_attr
[i
].int_value());
11579 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
11580 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11582 case elfcpp::Tag_ABI_enum_size
:
11583 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
11585 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
11586 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
11588 // The existing object is compatible with anything.
11589 // Use whatever requirements the new object has.
11590 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11592 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
11593 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11594 && parameters
->options().warn_mismatch()
11595 && parameters
->options().enum_size_warning())
11597 unsigned int in_value
= in_attr
[i
].int_value();
11598 unsigned int out_value
= out_attr
[i
].int_value();
11599 gold_warning(_("%s uses %s enums yet the output is to use "
11600 "%s enums; use of enum values across objects "
11603 this->aeabi_enum_name(in_value
).c_str(),
11604 this->aeabi_enum_name(out_value
).c_str());
11608 case elfcpp::Tag_ABI_VFP_args
:
11611 case elfcpp::Tag_ABI_WMMX_args
:
11612 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11613 && parameters
->options().warn_mismatch())
11615 gold_error(_("%s uses iWMMXt register arguments, output does "
11620 case Object_attribute::Tag_compatibility
:
11621 // Merged in target-independent code.
11623 case elfcpp::Tag_ABI_HardFP_use
:
11624 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11625 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
11626 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
11627 out_attr
[i
].set_int_value(3);
11628 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11629 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11631 case elfcpp::Tag_ABI_FP_16bit_format
:
11632 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
11634 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11635 && parameters
->options().warn_mismatch())
11636 gold_error(_("fp16 format mismatch between %s and output"),
11639 if (in_attr
[i
].int_value() != 0)
11640 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11643 case elfcpp::Tag_DIV_use
:
11645 // A value of zero on input means that the divide
11646 // instruction may be used if available in the base
11647 // architecture as specified via Tag_CPU_arch and
11648 // Tag_CPU_arch_profile. A value of 1 means that the user
11649 // did not want divide instructions. A value of 2
11650 // explicitly means that divide instructions were allowed
11651 // in ARM and Thumb state.
11653 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
)->
11655 int profile
= this->
11656 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
)->
11658 if (in_attr
[i
].int_value() == out_attr
[i
].int_value())
11662 else if (attributes_forbid_div(&in_attr
[i
])
11663 && !attributes_accept_div(arch
, profile
, &out_attr
[i
]))
11664 out_attr
[i
].set_int_value(1);
11665 else if (attributes_forbid_div(&out_attr
[i
])
11666 && attributes_accept_div(arch
, profile
, &in_attr
[i
]))
11667 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11668 else if (in_attr
[i
].int_value() == 2)
11669 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11673 case elfcpp::Tag_MPextension_use_legacy
:
11674 // We don't output objects with Tag_MPextension_use_legacy - we
11675 // move the value to Tag_MPextension_use.
11676 if (in_attr
[i
].int_value() != 0
11677 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
11679 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
11680 != in_attr
[i
].int_value())
11682 gold_error(_("%s has both the current and legacy "
11683 "Tag_MPextension_use attributes"),
11688 if (in_attr
[i
].int_value()
11689 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11690 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
11694 case elfcpp::Tag_nodefaults
:
11695 // This tag is set if it exists, but the value is unused (and is
11696 // typically zero). We don't actually need to do anything here -
11697 // the merge happens automatically when the type flags are merged
11700 case elfcpp::Tag_also_compatible_with
:
11701 // Already done in Tag_CPU_arch.
11703 case elfcpp::Tag_conformance
:
11704 // Keep the attribute if it matches. Throw it away otherwise.
11705 // No attribute means no claim to conform.
11706 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
11707 out_attr
[i
].set_string_value("");
11712 const char* err_object
= NULL
;
11714 // The "known_obj_attributes" table does contain some undefined
11715 // attributes. Ensure that there are unused.
11716 if (out_attr
[i
].int_value() != 0
11717 || out_attr
[i
].string_value() != "")
11718 err_object
= "output";
11719 else if (in_attr
[i
].int_value() != 0
11720 || in_attr
[i
].string_value() != "")
11723 if (err_object
!= NULL
11724 && parameters
->options().warn_mismatch())
11726 // Attribute numbers >=64 (mod 128) can be safely ignored.
11727 if ((i
& 127) < 64)
11728 gold_error(_("%s: unknown mandatory EABI object attribute "
11732 gold_warning(_("%s: unknown EABI object attribute %d"),
11736 // Only pass on attributes that match in both inputs.
11737 if (!in_attr
[i
].matches(out_attr
[i
]))
11739 out_attr
[i
].set_int_value(0);
11740 out_attr
[i
].set_string_value("");
11745 // If out_attr was copied from in_attr then it won't have a type yet.
11746 if (in_attr
[i
].type() && !out_attr
[i
].type())
11747 out_attr
[i
].set_type(in_attr
[i
].type());
11750 // Merge Tag_compatibility attributes and any common GNU ones.
11751 this->attributes_section_data_
->merge(name
, pasd
);
11753 // Check for any attributes not known on ARM.
11754 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
11755 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
11756 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
11757 Other_attributes
* out_other_attributes
=
11758 this->attributes_section_data_
->other_attributes(vendor
);
11759 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
11761 while (in_iter
!= in_other_attributes
->end()
11762 || out_iter
!= out_other_attributes
->end())
11764 const char* err_object
= NULL
;
11767 // The tags for each list are in numerical order.
11768 // If the tags are equal, then merge.
11769 if (out_iter
!= out_other_attributes
->end()
11770 && (in_iter
== in_other_attributes
->end()
11771 || in_iter
->first
> out_iter
->first
))
11773 // This attribute only exists in output. We can't merge, and we
11774 // don't know what the tag means, so delete it.
11775 err_object
= "output";
11776 err_tag
= out_iter
->first
;
11777 int saved_tag
= out_iter
->first
;
11778 delete out_iter
->second
;
11779 out_other_attributes
->erase(out_iter
);
11780 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11782 else if (in_iter
!= in_other_attributes
->end()
11783 && (out_iter
!= out_other_attributes
->end()
11784 || in_iter
->first
< out_iter
->first
))
11786 // This attribute only exists in input. We can't merge, and we
11787 // don't know what the tag means, so ignore it.
11789 err_tag
= in_iter
->first
;
11792 else // The tags are equal.
11794 // As present, all attributes in the list are unknown, and
11795 // therefore can't be merged meaningfully.
11796 err_object
= "output";
11797 err_tag
= out_iter
->first
;
11799 // Only pass on attributes that match in both inputs.
11800 if (!in_iter
->second
->matches(*(out_iter
->second
)))
11802 // No match. Delete the attribute.
11803 int saved_tag
= out_iter
->first
;
11804 delete out_iter
->second
;
11805 out_other_attributes
->erase(out_iter
);
11806 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11810 // Matched. Keep the attribute and move to the next.
11816 if (err_object
&& parameters
->options().warn_mismatch())
11818 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11819 if ((err_tag
& 127) < 64)
11821 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11822 err_object
, err_tag
);
11826 gold_warning(_("%s: unknown EABI object attribute %d"),
11827 err_object
, err_tag
);
11833 // Stub-generation methods for Target_arm.
11835 // Make a new Arm_input_section object.
11837 template<bool big_endian
>
11838 Arm_input_section
<big_endian
>*
11839 Target_arm
<big_endian
>::new_arm_input_section(
11841 unsigned int shndx
)
11843 Section_id
sid(relobj
, shndx
);
11845 Arm_input_section
<big_endian
>* arm_input_section
=
11846 new Arm_input_section
<big_endian
>(relobj
, shndx
);
11847 arm_input_section
->init();
11849 // Register new Arm_input_section in map for look-up.
11850 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
11851 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
11853 // Make sure that it we have not created another Arm_input_section
11854 // for this input section already.
11855 gold_assert(ins
.second
);
11857 return arm_input_section
;
11860 // Find the Arm_input_section object corresponding to the SHNDX-th input
11861 // section of RELOBJ.
11863 template<bool big_endian
>
11864 Arm_input_section
<big_endian
>*
11865 Target_arm
<big_endian
>::find_arm_input_section(
11867 unsigned int shndx
) const
11869 Section_id
sid(relobj
, shndx
);
11870 typename
Arm_input_section_map::const_iterator p
=
11871 this->arm_input_section_map_
.find(sid
);
11872 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
11875 // Make a new stub table.
11877 template<bool big_endian
>
11878 Stub_table
<big_endian
>*
11879 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
11881 Stub_table
<big_endian
>* stub_table
=
11882 new Stub_table
<big_endian
>(owner
);
11883 this->stub_tables_
.push_back(stub_table
);
11885 stub_table
->set_address(owner
->address() + owner
->data_size());
11886 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
11887 stub_table
->finalize_data_size();
11892 // Scan a relocation for stub generation.
11894 template<bool big_endian
>
11896 Target_arm
<big_endian
>::scan_reloc_for_stub(
11897 const Relocate_info
<32, big_endian
>* relinfo
,
11898 unsigned int r_type
,
11899 const Sized_symbol
<32>* gsym
,
11900 unsigned int r_sym
,
11901 const Symbol_value
<32>* psymval
,
11902 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
11903 Arm_address address
)
11905 const Arm_relobj
<big_endian
>* arm_relobj
=
11906 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11908 bool target_is_thumb
;
11909 Symbol_value
<32> symval
;
11912 // This is a global symbol. Determine if we use PLT and if the
11913 // final target is THUMB.
11914 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11916 // This uses a PLT, change the symbol value.
11917 symval
.set_output_value(this->plt_address_for_global(gsym
));
11919 target_is_thumb
= false;
11921 else if (gsym
->is_undefined())
11922 // There is no need to generate a stub symbol is undefined.
11927 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11928 || (gsym
->type() == elfcpp::STT_FUNC
11929 && !gsym
->is_undefined()
11930 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11935 // This is a local symbol. Determine if the final target is THUMB.
11936 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11939 // Strip LSB if this points to a THUMB target.
11940 const Arm_reloc_property
* reloc_property
=
11941 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11942 gold_assert(reloc_property
!= NULL
);
11943 if (target_is_thumb
11944 && reloc_property
->uses_thumb_bit()
11945 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11947 Arm_address stripped_value
=
11948 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11949 symval
.set_output_value(stripped_value
);
11953 // Get the symbol value.
11954 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11956 // Owing to pipelining, the PC relative branches below actually skip
11957 // two instructions when the branch offset is 0.
11958 Arm_address destination
;
11961 case elfcpp::R_ARM_CALL
:
11962 case elfcpp::R_ARM_JUMP24
:
11963 case elfcpp::R_ARM_PLT32
:
11965 destination
= value
+ addend
+ 8;
11967 case elfcpp::R_ARM_THM_CALL
:
11968 case elfcpp::R_ARM_THM_XPC22
:
11969 case elfcpp::R_ARM_THM_JUMP24
:
11970 case elfcpp::R_ARM_THM_JUMP19
:
11972 destination
= value
+ addend
+ 4;
11975 gold_unreachable();
11978 Reloc_stub
* stub
= NULL
;
11979 Stub_type stub_type
=
11980 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11982 if (stub_type
!= arm_stub_none
)
11984 // Try looking up an existing stub from a stub table.
11985 Stub_table
<big_endian
>* stub_table
=
11986 arm_relobj
->stub_table(relinfo
->data_shndx
);
11987 gold_assert(stub_table
!= NULL
);
11989 // Locate stub by destination.
11990 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11992 // Create a stub if there is not one already
11993 stub
= stub_table
->find_reloc_stub(stub_key
);
11996 // create a new stub and add it to stub table.
11997 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11998 stub_table
->add_reloc_stub(stub
, stub_key
);
12001 // Record the destination address.
12002 stub
->set_destination_address(destination
12003 | (target_is_thumb
? 1 : 0));
12006 // For Cortex-A8, we need to record a relocation at 4K page boundary.
12007 if (this->fix_cortex_a8_
12008 && (r_type
== elfcpp::R_ARM_THM_JUMP24
12009 || r_type
== elfcpp::R_ARM_THM_JUMP19
12010 || r_type
== elfcpp::R_ARM_THM_CALL
12011 || r_type
== elfcpp::R_ARM_THM_XPC22
)
12012 && (address
& 0xfffU
) == 0xffeU
)
12014 // Found a candidate. Note we haven't checked the destination is
12015 // within 4K here: if we do so (and don't create a record) we can't
12016 // tell that a branch should have been relocated when scanning later.
12017 this->cortex_a8_relocs_info_
[address
] =
12018 new Cortex_a8_reloc(stub
, r_type
,
12019 destination
| (target_is_thumb
? 1 : 0));
12023 // This function scans a relocation sections for stub generation.
12024 // The template parameter Relocate must be a class type which provides
12025 // a single function, relocate(), which implements the machine
12026 // specific part of a relocation.
12028 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
12029 // SHT_REL or SHT_RELA.
12031 // PRELOCS points to the relocation data. RELOC_COUNT is the number
12032 // of relocs. OUTPUT_SECTION is the output section.
12033 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
12034 // mapped to output offsets.
12036 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
12037 // VIEW_SIZE is the size. These refer to the input section, unless
12038 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
12039 // the output section.
12041 template<bool big_endian
>
12042 template<int sh_type
>
12044 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
12045 const Relocate_info
<32, big_endian
>* relinfo
,
12046 const unsigned char* prelocs
,
12047 size_t reloc_count
,
12048 Output_section
* output_section
,
12049 bool needs_special_offset_handling
,
12050 const unsigned char* view
,
12051 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
12054 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
12055 const int reloc_size
=
12056 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
12058 Arm_relobj
<big_endian
>* arm_object
=
12059 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
12060 unsigned int local_count
= arm_object
->local_symbol_count();
12062 gold::Default_comdat_behavior default_comdat_behavior
;
12063 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
12065 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
12067 Reltype
reloc(prelocs
);
12069 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
12070 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
12071 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
12073 r_type
= this->get_real_reloc_type(r_type
);
12075 // Only a few relocation types need stubs.
12076 if ((r_type
!= elfcpp::R_ARM_CALL
)
12077 && (r_type
!= elfcpp::R_ARM_JUMP24
)
12078 && (r_type
!= elfcpp::R_ARM_PLT32
)
12079 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
12080 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
12081 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
12082 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
12083 && (r_type
!= elfcpp::R_ARM_V4BX
))
12086 section_offset_type offset
=
12087 convert_to_section_size_type(reloc
.get_r_offset());
12089 if (needs_special_offset_handling
)
12091 offset
= output_section
->output_offset(relinfo
->object
,
12092 relinfo
->data_shndx
,
12098 // Create a v4bx stub if --fix-v4bx-interworking is used.
12099 if (r_type
== elfcpp::R_ARM_V4BX
)
12101 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
12103 // Get the BX instruction.
12104 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
12105 const Valtype
* wv
=
12106 reinterpret_cast<const Valtype
*>(view
+ offset
);
12107 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
12108 elfcpp::Swap
<32, big_endian
>::readval(wv
);
12109 const uint32_t reg
= (insn
& 0xf);
12113 // Try looking up an existing stub from a stub table.
12114 Stub_table
<big_endian
>* stub_table
=
12115 arm_object
->stub_table(relinfo
->data_shndx
);
12116 gold_assert(stub_table
!= NULL
);
12118 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
12120 // create a new stub and add it to stub table.
12121 Arm_v4bx_stub
* stub
=
12122 this->stub_factory().make_arm_v4bx_stub(reg
);
12123 gold_assert(stub
!= NULL
);
12124 stub_table
->add_arm_v4bx_stub(stub
);
12132 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
12133 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
12134 stub_addend_reader(r_type
, view
+ offset
, reloc
);
12136 const Sized_symbol
<32>* sym
;
12138 Symbol_value
<32> symval
;
12139 const Symbol_value
<32> *psymval
;
12140 bool is_defined_in_discarded_section
;
12141 unsigned int shndx
;
12142 if (r_sym
< local_count
)
12145 psymval
= arm_object
->local_symbol(r_sym
);
12147 // If the local symbol belongs to a section we are discarding,
12148 // and that section is a debug section, try to find the
12149 // corresponding kept section and map this symbol to its
12150 // counterpart in the kept section. The symbol must not
12151 // correspond to a section we are folding.
12153 shndx
= psymval
->input_shndx(&is_ordinary
);
12154 is_defined_in_discarded_section
=
12156 && shndx
!= elfcpp::SHN_UNDEF
12157 && !arm_object
->is_section_included(shndx
)
12158 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
12160 // We need to compute the would-be final value of this local
12162 if (!is_defined_in_discarded_section
)
12164 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
12165 if (psymval
->is_section_symbol())
12166 symval
.set_is_section_symbol();
12167 typename
ObjType::Compute_final_local_value_status status
=
12168 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
12170 if (status
== ObjType::CFLV_OK
)
12172 // Currently we cannot handle a branch to a target in
12173 // a merged section. If this is the case, issue an error
12174 // and also free the merge symbol value.
12175 if (!symval
.has_output_value())
12177 const std::string
& section_name
=
12178 arm_object
->section_name(shndx
);
12179 arm_object
->error(_("cannot handle branch to local %u "
12180 "in a merged section %s"),
12181 r_sym
, section_name
.c_str());
12187 // We cannot determine the final value.
12194 const Symbol
* gsym
;
12195 gsym
= arm_object
->global_symbol(r_sym
);
12196 gold_assert(gsym
!= NULL
);
12197 if (gsym
->is_forwarder())
12198 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
12200 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
12201 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
12202 symval
.set_output_symtab_index(sym
->symtab_index());
12204 symval
.set_no_output_symtab_entry();
12206 // We need to compute the would-be final value of this global
12208 const Symbol_table
* symtab
= relinfo
->symtab
;
12209 const Sized_symbol
<32>* sized_symbol
=
12210 symtab
->get_sized_symbol
<32>(gsym
);
12211 Symbol_table::Compute_final_value_status status
;
12212 Arm_address value
=
12213 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
12215 // Skip this if the symbol has not output section.
12216 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
12218 symval
.set_output_value(value
);
12220 if (gsym
->type() == elfcpp::STT_TLS
)
12221 symval
.set_is_tls_symbol();
12222 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
12223 symval
.set_is_ifunc_symbol();
12226 is_defined_in_discarded_section
=
12227 (gsym
->is_defined_in_discarded_section()
12228 && gsym
->is_undefined());
12232 Symbol_value
<32> symval2
;
12233 if (is_defined_in_discarded_section
)
12235 if (comdat_behavior
== CB_UNDETERMINED
)
12237 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
12238 comdat_behavior
= default_comdat_behavior
.get(name
.c_str());
12240 if (comdat_behavior
== CB_PRETEND
)
12242 // FIXME: This case does not work for global symbols.
12243 // We have no place to store the original section index.
12244 // Fortunately this does not matter for comdat sections,
12245 // only for sections explicitly discarded by a linker
12248 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
12249 arm_object
->map_to_kept_section(shndx
, &found
);
12251 symval2
.set_output_value(value
+ psymval
->input_value());
12253 symval2
.set_output_value(0);
12257 if (comdat_behavior
== CB_WARNING
)
12258 gold_warning_at_location(relinfo
, i
, offset
,
12259 _("relocation refers to discarded "
12261 symval2
.set_output_value(0);
12263 symval2
.set_no_output_symtab_entry();
12264 psymval
= &symval2
;
12267 // If symbol is a section symbol, we don't know the actual type of
12268 // destination. Give up.
12269 if (psymval
->is_section_symbol())
12272 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
12273 addend
, view_address
+ offset
);
12277 // Scan an input section for stub generation.
12279 template<bool big_endian
>
12281 Target_arm
<big_endian
>::scan_section_for_stubs(
12282 const Relocate_info
<32, big_endian
>* relinfo
,
12283 unsigned int sh_type
,
12284 const unsigned char* prelocs
,
12285 size_t reloc_count
,
12286 Output_section
* output_section
,
12287 bool needs_special_offset_handling
,
12288 const unsigned char* view
,
12289 Arm_address view_address
,
12290 section_size_type view_size
)
12292 if (sh_type
== elfcpp::SHT_REL
)
12293 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
12298 needs_special_offset_handling
,
12302 else if (sh_type
== elfcpp::SHT_RELA
)
12303 // We do not support RELA type relocations yet. This is provided for
12305 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
12310 needs_special_offset_handling
,
12315 gold_unreachable();
12318 // Group input sections for stub generation.
12320 // We group input sections in an output section so that the total size,
12321 // including any padding space due to alignment is smaller than GROUP_SIZE
12322 // unless the only input section in group is bigger than GROUP_SIZE already.
12323 // Then an ARM stub table is created to follow the last input section
12324 // in group. For each group an ARM stub table is created an is placed
12325 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12326 // extend the group after the stub table.
12328 template<bool big_endian
>
12330 Target_arm
<big_endian
>::group_sections(
12332 section_size_type group_size
,
12333 bool stubs_always_after_branch
,
12336 // Group input sections and insert stub table
12337 Layout::Section_list section_list
;
12338 layout
->get_executable_sections(§ion_list
);
12339 for (Layout::Section_list::const_iterator p
= section_list
.begin();
12340 p
!= section_list
.end();
12343 Arm_output_section
<big_endian
>* output_section
=
12344 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12345 output_section
->group_sections(group_size
, stubs_always_after_branch
,
12350 // Relaxation hook. This is where we do stub generation.
12352 template<bool big_endian
>
12354 Target_arm
<big_endian
>::do_relax(
12356 const Input_objects
* input_objects
,
12357 Symbol_table
* symtab
,
12361 // No need to generate stubs if this is a relocatable link.
12362 gold_assert(!parameters
->options().relocatable());
12364 // If this is the first pass, we need to group input sections into
12366 bool done_exidx_fixup
= false;
12367 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
12370 // Determine the stub group size. The group size is the absolute
12371 // value of the parameter --stub-group-size. If --stub-group-size
12372 // is passed a negative value, we restrict stubs to be always after
12373 // the stubbed branches.
12374 int32_t stub_group_size_param
=
12375 parameters
->options().stub_group_size();
12376 bool stubs_always_after_branch
= stub_group_size_param
< 0;
12377 section_size_type stub_group_size
= abs(stub_group_size_param
);
12379 if (stub_group_size
== 1)
12382 // Thumb branch range is +-4MB has to be used as the default
12383 // maximum size (a given section can contain both ARM and Thumb
12384 // code, so the worst case has to be taken into account). If we are
12385 // fixing cortex-a8 errata, the branch range has to be even smaller,
12386 // since wide conditional branch has a range of +-1MB only.
12388 // This value is 48K less than that, which allows for 4096
12389 // 12-byte stubs. If we exceed that, then we will fail to link.
12390 // The user will have to relink with an explicit group size
12392 stub_group_size
= 4145152;
12395 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12396 // page as the first half of a 32-bit branch straddling two 4K pages.
12397 // This is a crude way of enforcing that. In addition, long conditional
12398 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12399 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12400 // cortex-A8 stubs from long conditional branches.
12401 if (this->fix_cortex_a8_
)
12403 stubs_always_after_branch
= true;
12404 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
12405 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
12408 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
12410 // Also fix .ARM.exidx section coverage.
12411 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
12412 for (Layout::Section_list::const_iterator p
=
12413 layout
->section_list().begin();
12414 p
!= layout
->section_list().end();
12416 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
12418 if (exidx_output_section
== NULL
)
12419 exidx_output_section
=
12420 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12422 // We cannot handle this now.
12423 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12424 "non-relocatable link"),
12425 exidx_output_section
->name(),
12429 if (exidx_output_section
!= NULL
)
12431 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
12433 done_exidx_fixup
= true;
12438 // If this is not the first pass, addresses and file offsets have
12439 // been reset at this point, set them here.
12440 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12441 sp
!= this->stub_tables_
.end();
12444 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12445 off_t off
= align_address(owner
->original_size(),
12446 (*sp
)->addralign());
12447 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
12448 owner
->offset() + off
);
12452 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12453 // beginning of each relaxation pass, just blow away all the stubs.
12454 // Alternatively, we could selectively remove only the stubs and reloc
12455 // information for code sections that have moved since the last pass.
12456 // That would require more book-keeping.
12457 if (this->fix_cortex_a8_
)
12459 // Clear all Cortex-A8 reloc information.
12460 for (typename
Cortex_a8_relocs_info::const_iterator p
=
12461 this->cortex_a8_relocs_info_
.begin();
12462 p
!= this->cortex_a8_relocs_info_
.end();
12465 this->cortex_a8_relocs_info_
.clear();
12467 // Remove all Cortex-A8 stubs.
12468 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12469 sp
!= this->stub_tables_
.end();
12471 (*sp
)->remove_all_cortex_a8_stubs();
12474 // Scan relocs for relocation stubs
12475 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12476 op
!= input_objects
->relobj_end();
12479 Arm_relobj
<big_endian
>* arm_relobj
=
12480 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12481 // Lock the object so we can read from it. This is only called
12482 // single-threaded from Layout::finalize, so it is OK to lock.
12483 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12484 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
12487 // Check all stub tables to see if any of them have their data sizes
12488 // or addresses alignments changed. These are the only things that
12490 bool any_stub_table_changed
= false;
12491 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
12492 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12493 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12496 if ((*sp
)->update_data_size_and_addralign())
12498 // Update data size of stub table owner.
12499 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12500 uint64_t address
= owner
->address();
12501 off_t offset
= owner
->offset();
12502 owner
->reset_address_and_file_offset();
12503 owner
->set_address_and_file_offset(address
, offset
);
12505 sections_needing_adjustment
.insert(owner
->output_section());
12506 any_stub_table_changed
= true;
12510 // Output_section_data::output_section() returns a const pointer but we
12511 // need to update output sections, so we record all output sections needing
12512 // update above and scan the sections here to find out what sections need
12514 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
12515 p
!= layout
->section_list().end();
12518 if (sections_needing_adjustment
.find(*p
)
12519 != sections_needing_adjustment
.end())
12520 (*p
)->set_section_offsets_need_adjustment();
12523 // Stop relaxation if no EXIDX fix-up and no stub table change.
12524 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
12526 // Finalize the stubs in the last relaxation pass.
12527 if (!continue_relaxation
)
12529 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12530 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12532 (*sp
)->finalize_stubs();
12534 // Update output local symbol counts of objects if necessary.
12535 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12536 op
!= input_objects
->relobj_end();
12539 Arm_relobj
<big_endian
>* arm_relobj
=
12540 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12542 // Update output local symbol counts. We need to discard local
12543 // symbols defined in parts of input sections that are discarded by
12545 if (arm_relobj
->output_local_symbol_count_needs_update())
12547 // We need to lock the object's file to update it.
12548 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12549 arm_relobj
->update_output_local_symbol_count();
12554 return continue_relaxation
;
12557 // Relocate a stub.
12559 template<bool big_endian
>
12561 Target_arm
<big_endian
>::relocate_stub(
12563 const Relocate_info
<32, big_endian
>* relinfo
,
12564 Output_section
* output_section
,
12565 unsigned char* view
,
12566 Arm_address address
,
12567 section_size_type view_size
)
12570 const Stub_template
* stub_template
= stub
->stub_template();
12571 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
12573 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
12574 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
12576 unsigned int r_type
= insn
->r_type();
12577 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
12578 section_size_type reloc_size
= insn
->size();
12579 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
12581 // This is the address of the stub destination.
12582 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
12583 Symbol_value
<32> symval
;
12584 symval
.set_output_value(target
);
12586 // Synthesize a fake reloc just in case. We don't have a symbol so
12588 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
12589 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
12590 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
12591 reloc_write
.put_r_offset(reloc_offset
);
12592 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
12594 relocate
.relocate(relinfo
, elfcpp::SHT_REL
, this, output_section
,
12595 this->fake_relnum_for_stubs
, reloc_buffer
,
12596 NULL
, &symval
, view
+ reloc_offset
,
12597 address
+ reloc_offset
, reloc_size
);
12601 // Determine whether an object attribute tag takes an integer, a
12604 template<bool big_endian
>
12606 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
12608 if (tag
== Object_attribute::Tag_compatibility
)
12609 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12610 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
12611 else if (tag
== elfcpp::Tag_nodefaults
)
12612 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12613 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
12614 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
12615 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
12617 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
12619 return ((tag
& 1) != 0
12620 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12621 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
12624 // Reorder attributes.
12626 // The ABI defines that Tag_conformance should be emitted first, and that
12627 // Tag_nodefaults should be second (if either is defined). This sets those
12628 // two positions, and bumps up the position of all the remaining tags to
12631 template<bool big_endian
>
12633 Target_arm
<big_endian
>::do_attributes_order(int num
) const
12635 // Reorder the known object attributes in output. We want to move
12636 // Tag_conformance to position 4 and Tag_conformance to position 5
12637 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12639 return elfcpp::Tag_conformance
;
12641 return elfcpp::Tag_nodefaults
;
12642 if ((num
- 2) < elfcpp::Tag_nodefaults
)
12644 if ((num
- 1) < elfcpp::Tag_conformance
)
12649 // Scan a span of THUMB code for Cortex-A8 erratum.
12651 template<bool big_endian
>
12653 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
12654 Arm_relobj
<big_endian
>* arm_relobj
,
12655 unsigned int shndx
,
12656 section_size_type span_start
,
12657 section_size_type span_end
,
12658 const unsigned char* view
,
12659 Arm_address address
)
12661 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12663 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12664 // The branch target is in the same 4KB region as the
12665 // first half of the branch.
12666 // The instruction before the branch is a 32-bit
12667 // length non-branch instruction.
12668 section_size_type i
= span_start
;
12669 bool last_was_32bit
= false;
12670 bool last_was_branch
= false;
12671 while (i
< span_end
)
12673 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12674 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
12675 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12676 bool is_blx
= false, is_b
= false;
12677 bool is_bl
= false, is_bcc
= false;
12679 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
12682 // Load the rest of the insn (in manual-friendly order).
12683 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12685 // Encoding T4: B<c>.W.
12686 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
12687 // Encoding T1: BL<c>.W.
12688 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
12689 // Encoding T2: BLX<c>.W.
12690 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
12691 // Encoding T3: B<c>.W (not permitted in IT block).
12692 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
12693 && (insn
& 0x07f00000U
) != 0x03800000U
);
12696 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
12698 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12699 // page boundary and it follows 32-bit non-branch instruction,
12700 // we need to work around.
12701 if (is_32bit_branch
12702 && ((address
+ i
) & 0xfffU
) == 0xffeU
12704 && !last_was_branch
)
12706 // Check to see if there is a relocation stub for this branch.
12707 bool force_target_arm
= false;
12708 bool force_target_thumb
= false;
12709 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
12710 Cortex_a8_relocs_info::const_iterator p
=
12711 this->cortex_a8_relocs_info_
.find(address
+ i
);
12713 if (p
!= this->cortex_a8_relocs_info_
.end())
12715 cortex_a8_reloc
= p
->second
;
12716 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
12718 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12719 && !target_is_thumb
)
12720 force_target_arm
= true;
12721 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12722 && target_is_thumb
)
12723 force_target_thumb
= true;
12727 Stub_type stub_type
= arm_stub_none
;
12729 // Check if we have an offending branch instruction.
12730 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
12731 uint16_t lower_insn
= insn
& 0xffffU
;
12732 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12734 if (cortex_a8_reloc
!= NULL
12735 && cortex_a8_reloc
->reloc_stub() != NULL
)
12736 // We've already made a stub for this instruction, e.g.
12737 // it's a long branch or a Thumb->ARM stub. Assume that
12738 // stub will suffice to work around the A8 erratum (see
12739 // setting of always_after_branch above).
12743 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
12745 stub_type
= arm_stub_a8_veneer_b_cond
;
12747 else if (is_b
|| is_bl
|| is_blx
)
12749 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
12754 stub_type
= (is_blx
12755 ? arm_stub_a8_veneer_blx
12757 ? arm_stub_a8_veneer_bl
12758 : arm_stub_a8_veneer_b
));
12761 if (stub_type
!= arm_stub_none
)
12763 Arm_address pc_for_insn
= address
+ i
+ 4;
12765 // The original instruction is a BL, but the target is
12766 // an ARM instruction. If we were not making a stub,
12767 // the BL would have been converted to a BLX. Use the
12768 // BLX stub instead in that case.
12769 if (this->may_use_v5t_interworking() && force_target_arm
12770 && stub_type
== arm_stub_a8_veneer_bl
)
12772 stub_type
= arm_stub_a8_veneer_blx
;
12776 // Conversely, if the original instruction was
12777 // BLX but the target is Thumb mode, use the BL stub.
12778 else if (force_target_thumb
12779 && stub_type
== arm_stub_a8_veneer_blx
)
12781 stub_type
= arm_stub_a8_veneer_bl
;
12789 // If we found a relocation, use the proper destination,
12790 // not the offset in the (unrelocated) instruction.
12791 // Note this is always done if we switched the stub type above.
12792 if (cortex_a8_reloc
!= NULL
)
12793 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
12795 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
12797 // Add a new stub if destination address is in the same page.
12798 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
12800 Cortex_a8_stub
* stub
=
12801 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
12805 Stub_table
<big_endian
>* stub_table
=
12806 arm_relobj
->stub_table(shndx
);
12807 gold_assert(stub_table
!= NULL
);
12808 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
12813 i
+= insn_32bit
? 4 : 2;
12814 last_was_32bit
= insn_32bit
;
12815 last_was_branch
= is_32bit_branch
;
12819 // Apply the Cortex-A8 workaround.
12821 template<bool big_endian
>
12823 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
12824 const Cortex_a8_stub
* stub
,
12825 Arm_address stub_address
,
12826 unsigned char* insn_view
,
12827 Arm_address insn_address
)
12829 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12830 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
12831 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12832 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12833 off_t branch_offset
= stub_address
- (insn_address
+ 4);
12835 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12836 switch (stub
->stub_template()->type())
12838 case arm_stub_a8_veneer_b_cond
:
12839 // For a conditional branch, we re-write it to be an unconditional
12840 // branch to the stub. We use the THUMB-2 encoding here.
12841 upper_insn
= 0xf000U
;
12842 lower_insn
= 0xb800U
;
12844 case arm_stub_a8_veneer_b
:
12845 case arm_stub_a8_veneer_bl
:
12846 case arm_stub_a8_veneer_blx
:
12847 if ((lower_insn
& 0x5000U
) == 0x4000U
)
12848 // For a BLX instruction, make sure that the relocation is
12849 // rounded up to a word boundary. This follows the semantics of
12850 // the instruction which specifies that bit 1 of the target
12851 // address will come from bit 1 of the base address.
12852 branch_offset
= (branch_offset
+ 2) & ~3;
12854 // Put BRANCH_OFFSET back into the insn.
12855 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
12856 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
12857 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
12861 gold_unreachable();
12864 // Put the relocated value back in the object file:
12865 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
12866 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
12869 // Target selector for ARM. Note this is never instantiated directly.
12870 // It's only used in Target_selector_arm_nacl, below.
12872 template<bool big_endian
>
12873 class Target_selector_arm
: public Target_selector
12876 Target_selector_arm()
12877 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
12878 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
12879 (big_endian
? "armelfb" : "armelf"))
12883 do_instantiate_target()
12884 { return new Target_arm
<big_endian
>(); }
12887 // Fix .ARM.exidx section coverage.
12889 template<bool big_endian
>
12891 Target_arm
<big_endian
>::fix_exidx_coverage(
12893 const Input_objects
* input_objects
,
12894 Arm_output_section
<big_endian
>* exidx_section
,
12895 Symbol_table
* symtab
,
12898 // We need to look at all the input sections in output in ascending
12899 // order of output address. We do that by building a sorted list
12900 // of output sections by addresses. Then we looks at the output sections
12901 // in order. The input sections in an output section are already sorted
12902 // by addresses within the output section.
12904 typedef std::set
<Output_section
*, output_section_address_less_than
>
12905 Sorted_output_section_list
;
12906 Sorted_output_section_list sorted_output_sections
;
12908 // Find out all the output sections of input sections pointed by
12909 // EXIDX input sections.
12910 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
12911 p
!= input_objects
->relobj_end();
12914 Arm_relobj
<big_endian
>* arm_relobj
=
12915 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12916 std::vector
<unsigned int> shndx_list
;
12917 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12918 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12920 const Arm_exidx_input_section
* exidx_input_section
=
12921 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12922 gold_assert(exidx_input_section
!= NULL
);
12923 if (!exidx_input_section
->has_errors())
12925 unsigned int text_shndx
= exidx_input_section
->link();
12926 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12927 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12928 sorted_output_sections
.insert(os
);
12933 // Go over the output sections in ascending order of output addresses.
12934 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12936 Text_section_list sorted_text_sections
;
12937 for (typename
Sorted_output_section_list::iterator p
=
12938 sorted_output_sections
.begin();
12939 p
!= sorted_output_sections
.end();
12942 Arm_output_section
<big_endian
>* arm_output_section
=
12943 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12944 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12947 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12948 merge_exidx_entries(), task
);
12951 template<bool big_endian
>
12953 Target_arm
<big_endian
>::do_define_standard_symbols(
12954 Symbol_table
* symtab
,
12957 // Handle the .ARM.exidx section.
12958 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12960 if (exidx_section
!= NULL
)
12962 // Create __exidx_start and __exidx_end symbols.
12963 symtab
->define_in_output_data("__exidx_start",
12965 Symbol_table::PREDEFINED
,
12969 elfcpp::STT_NOTYPE
,
12970 elfcpp::STB_GLOBAL
,
12971 elfcpp::STV_HIDDEN
,
12973 false, // offset_is_from_end
12974 true); // only_if_ref
12976 symtab
->define_in_output_data("__exidx_end",
12978 Symbol_table::PREDEFINED
,
12982 elfcpp::STT_NOTYPE
,
12983 elfcpp::STB_GLOBAL
,
12984 elfcpp::STV_HIDDEN
,
12986 true, // offset_is_from_end
12987 true); // only_if_ref
12991 // Define __exidx_start and __exidx_end even when .ARM.exidx
12992 // section is missing to match ld's behaviour.
12993 symtab
->define_as_constant("__exidx_start", NULL
,
12994 Symbol_table::PREDEFINED
,
12995 0, 0, elfcpp::STT_OBJECT
,
12996 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12998 symtab
->define_as_constant("__exidx_end", NULL
,
12999 Symbol_table::PREDEFINED
,
13000 0, 0, elfcpp::STT_OBJECT
,
13001 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
13006 // NaCl variant. It uses different PLT contents.
13008 template<bool big_endian
>
13009 class Output_data_plt_arm_nacl
;
13011 template<bool big_endian
>
13012 class Target_arm_nacl
: public Target_arm
<big_endian
>
13016 : Target_arm
<big_endian
>(&arm_nacl_info
)
13020 virtual Output_data_plt_arm
<big_endian
>*
13023 Arm_output_data_got
<big_endian
>* got
,
13024 Output_data_space
* got_plt
,
13025 Output_data_space
* got_irelative
)
13026 { return new Output_data_plt_arm_nacl
<big_endian
>(
13027 layout
, got
, got_plt
, got_irelative
); }
13030 static const Target::Target_info arm_nacl_info
;
13033 template<bool big_endian
>
13034 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
13037 big_endian
, // is_big_endian
13038 elfcpp::EM_ARM
, // machine_code
13039 false, // has_make_symbol
13040 false, // has_resolve
13041 false, // has_code_fill
13042 true, // is_default_stack_executable
13043 false, // can_icf_inline_merge_sections
13045 "/lib/ld-nacl-arm.so.1", // dynamic_linker
13046 0x20000, // default_text_segment_address
13047 0x10000, // abi_pagesize (overridable by -z max-page-size)
13048 0x10000, // common_pagesize (overridable by -z common-page-size)
13049 true, // isolate_execinstr
13050 0x10000000, // rosegment_gap
13051 elfcpp::SHN_UNDEF
, // small_common_shndx
13052 elfcpp::SHN_UNDEF
, // large_common_shndx
13053 0, // small_common_section_flags
13054 0, // large_common_section_flags
13055 ".ARM.attributes", // attributes_section
13056 "aeabi", // attributes_vendor
13057 "_start", // entry_symbol_name
13058 32, // hash_entry_size
13061 template<bool big_endian
>
13062 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
13065 Output_data_plt_arm_nacl(
13067 Arm_output_data_got
<big_endian
>* got
,
13068 Output_data_space
* got_plt
,
13069 Output_data_space
* got_irelative
)
13070 : Output_data_plt_arm
<big_endian
>(layout
, 16, got
, got_plt
, got_irelative
)
13074 // Return the offset of the first non-reserved PLT entry.
13075 virtual unsigned int
13076 do_first_plt_entry_offset() const
13077 { return sizeof(first_plt_entry
); }
13079 // Return the size of a PLT entry.
13080 virtual unsigned int
13081 do_get_plt_entry_size() const
13082 { return sizeof(plt_entry
); }
13085 do_fill_first_plt_entry(unsigned char* pov
,
13086 Arm_address got_address
,
13087 Arm_address plt_address
);
13090 do_fill_plt_entry(unsigned char* pov
,
13091 Arm_address got_address
,
13092 Arm_address plt_address
,
13093 unsigned int got_offset
,
13094 unsigned int plt_offset
);
13097 inline uint32_t arm_movw_immediate(uint32_t value
)
13099 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
13102 inline uint32_t arm_movt_immediate(uint32_t value
)
13104 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
13107 // Template for the first PLT entry.
13108 static const uint32_t first_plt_entry
[16];
13110 // Template for subsequent PLT entries.
13111 static const uint32_t plt_entry
[4];
13114 // The first entry in the PLT.
13115 template<bool big_endian
>
13116 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
13119 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
13120 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
13121 0xe08cc00f, // add ip, ip, pc
13122 0xe52dc008, // str ip, [sp, #-8]!
13124 0xe3ccc103, // bic ip, ip, #0xc0000000
13125 0xe59cc000, // ldr ip, [ip]
13126 0xe3ccc13f, // bic ip, ip, #0xc000000f
13127 0xe12fff1c, // bx ip
13133 0xe50dc004, // str ip, [sp, #-4]
13135 0xe3ccc103, // bic ip, ip, #0xc0000000
13136 0xe59cc000, // ldr ip, [ip]
13137 0xe3ccc13f, // bic ip, ip, #0xc000000f
13138 0xe12fff1c, // bx ip
13141 template<bool big_endian
>
13143 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
13144 unsigned char* pov
,
13145 Arm_address got_address
,
13146 Arm_address plt_address
)
13148 // Write first PLT entry. All but first two words are constants.
13149 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
13150 / sizeof(first_plt_entry
[0]));
13152 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
13154 elfcpp::Swap
<32, big_endian
>::writeval
13155 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
13156 elfcpp::Swap
<32, big_endian
>::writeval
13157 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
13159 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
13160 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
13163 // Subsequent entries in the PLT.
13165 template<bool big_endian
>
13166 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
13168 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
13169 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
13170 0xe08cc00f, // add ip, ip, pc
13171 0xea000000, // b .Lplt_tail
13174 template<bool big_endian
>
13176 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
13177 unsigned char* pov
,
13178 Arm_address got_address
,
13179 Arm_address plt_address
,
13180 unsigned int got_offset
,
13181 unsigned int plt_offset
)
13183 // Calculate the displacement between the PLT slot and the
13184 // common tail that's part of the special initial PLT slot.
13185 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
13186 - (plt_address
+ plt_offset
13187 + sizeof(plt_entry
) + sizeof(uint32_t)));
13188 gold_assert((tail_displacement
& 3) == 0);
13189 tail_displacement
>>= 2;
13191 gold_assert ((tail_displacement
& 0xff000000) == 0
13192 || (-tail_displacement
& 0xff000000) == 0);
13194 // Calculate the displacement between the PLT slot and the entry
13195 // in the GOT. The offset accounts for the value produced by
13196 // adding to pc in the penultimate instruction of the PLT stub.
13197 const int32_t got_displacement
= (got_address
+ got_offset
13198 - (plt_address
+ sizeof(plt_entry
)));
13200 elfcpp::Swap
<32, big_endian
>::writeval
13201 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
13202 elfcpp::Swap
<32, big_endian
>::writeval
13203 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
13204 elfcpp::Swap
<32, big_endian
>::writeval
13205 (pov
+ 8, plt_entry
[2]);
13206 elfcpp::Swap
<32, big_endian
>::writeval
13207 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
13210 // Target selectors.
13212 template<bool big_endian
>
13213 class Target_selector_arm_nacl
13214 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13215 Target_arm_nacl
<big_endian
> >
13218 Target_selector_arm_nacl()
13219 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13220 Target_arm_nacl
<big_endian
> >(
13222 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
13223 big_endian
? "armelfb_nacl" : "armelf_nacl")
13227 Target_selector_arm_nacl
<false> target_selector_arm
;
13228 Target_selector_arm_nacl
<true> target_selector_armbe
;
13230 } // End anonymous namespace.