1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_standard
;
67 template<bool big_endian
>
70 template<bool big_endian
>
71 class Arm_input_section
;
73 class Arm_exidx_cantunwind
;
75 class Arm_exidx_merged_section
;
77 class Arm_exidx_fixup
;
79 template<bool big_endian
>
80 class Arm_output_section
;
82 class Arm_exidx_input_section
;
84 template<bool big_endian
>
87 template<bool big_endian
>
88 class Arm_relocate_functions
;
90 template<bool big_endian
>
91 class Arm_output_data_got
;
93 template<bool big_endian
>
97 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE
= 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE
,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data
)
159 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data
)
169 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data
, int reloc_addend
)
174 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
178 static const Insn_template
179 arm_insn(uint32_t data
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data
, int reloc_addend
)
184 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
186 static const Insn_template
187 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
188 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_
; }
197 // Return the instruction sequence type of this.
200 { return this->type_
; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_
; }
209 { return this->reloc_addend_
; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
224 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_
;
234 // Relocation addend.
235 int32_t reloc_addend_
;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
270 // Last reloc stub type.
271 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
279 arm_stub_type_last
= arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type
, const Insn_template
*, size_t);
298 { return this->type_
; }
300 // Return an array of instruction templates.
303 { return this->insns_
; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_
; }
310 // Return size of template in bytes.
313 { return this->size_
; }
315 // Return alignment of the stub template.
318 { return this->alignment_
; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_
; }
325 // Return number of relocations in this template.
328 { return this->relocs_
.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i
) const
334 gold_assert(i
< this->relocs_
.size());
335 return this->relocs_
[i
].first
;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i
) const
343 gold_assert(i
< this->relocs_
.size());
344 return this->relocs_
[i
].second
;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair
<size_t, section_size_type
> Reloc
;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template
&);
355 Stub_template
& operator=(const Stub_template
&);
359 // Points to an array of Insn_templates.
360 const Insn_template
* insns_
;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_
;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector
<Reloc
> relocs_
;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset
=
384 static_cast<section_offset_type
>(-1);
387 Stub(const Stub_template
* stub_template
)
388 : stub_template_(stub_template
), offset_(invalid_offset
)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_
; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_
!= invalid_offset
);
405 return this->offset_
;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset
)
411 { this->offset_
= offset
; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i
)
417 { return this->do_reloc_target(i
); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
422 { this->do_write(view
, view_size
, big_endian
); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i
)
428 { return this->do_thumb16_special(i
); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
440 this->do_fixed_endian_write
<true>(view
, view_size
);
442 this->do_fixed_endian_write
<false>(view
, view_size
);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian
>
455 do_fixed_endian_write(unsigned char*, section_size_type
);
458 const Stub_template
* stub_template_
;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_
;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub
: public Stub
469 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_
!= this->invalid_address
);
478 return this->destination_address_
;
481 // Set destination address.
483 set_destination_address(Arm_address address
)
485 gold_assert(address
!= this->invalid_address
);
486 this->destination_address_
= address
;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_
= this->invalid_address
; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
500 Arm_address branch_target
, bool target_is_thumb
);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
513 unsigned int r_sym
, int32_t addend
)
514 : stub_type_(stub_type
), addend_(addend
)
518 this->r_sym_
= Reloc_stub::invalid_index
;
519 this->u_
.symbol
= symbol
;
523 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
524 this->r_sym_
= r_sym
;
525 this->u_
.relobj
= relobj
;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_
; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_
; }
545 // Return the symbol if there is one.
548 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
550 // Return the relobj if there is one.
553 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
555 // Whether this equals to another key k.
557 eq(const Key
& k
) const
559 return ((this->stub_type_
== k
.stub_type_
)
560 && (this->r_sym_
== k
.r_sym_
)
561 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
562 ? (this->u_
.relobj
== k
.u_
.relobj
)
563 : (this->u_
.symbol
== k
.u_
.symbol
))
564 && (this->addend_
== k
.addend_
));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash
<char>(
574 (this->r_sym_
!= Reloc_stub::invalid_index
)
575 ? this->u_
.relobj
->name().c_str()
576 : this->u_
.symbol
->name())
580 // Functors for STL associative containers.
584 operator()(const Key
& k
) const
585 { return k
.hash_value(); }
591 operator()(const Key
& k1
, const Key
& k2
) const
592 { return k1
.eq(k2
); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_
;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol
* symbol
;
614 const Relobj
* relobj
;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template
* stub_template
)
623 : Stub(stub_template
), destination_address_(invalid_address
)
629 friend class Stub_factory
;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i
)
636 // All reloc stub have only one relocation.
638 return this->destination_address_
;
642 // Address of destination.
643 Arm_address destination_address_
;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub
: public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_
; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_
; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_
; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_
; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_
; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
705 unsigned int shndx
, Arm_address source_address
,
706 Arm_address destination_address
, uint32_t original_insn
)
707 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
708 source_address_(source_address
| 1U),
709 destination_address_(destination_address
),
710 original_insn_(original_insn
)
713 friend class Stub_factory
;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i
)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
722 // The conditional branch veneer has two relocations.
724 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_
;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_
;
745 // Destination address of the original branch.
746 Arm_address destination_address_
;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_
;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub
: public Stub
759 // Return the associated register.
762 { return this->reg_
; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
767 : Stub(stub_template
), reg_(reg
)
770 friend class Stub_factory
;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
783 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
785 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
789 // A template to implement do_write.
790 template<bool big_endian
>
792 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
794 const Insn_template
* insns
= this->stub_template()->insns();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
797 + (this->reg_
<< 16)));
798 view
+= insns
[0].size();
799 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 (insns
[1].data() + this->reg_
));
801 view
+= insns
[1].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[2].data() + this->reg_
));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory
&
819 static Stub_factory singleton
;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type
) const
827 gold_assert(stub_type
>= arm_stub_reloc_first
828 && stub_type
<= arm_stub_reloc_last
);
829 return new Reloc_stub(this->stub_templates_
[stub_type
]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
835 Arm_address source
, Arm_address destination
,
836 uint32_t original_insn
) const
838 gold_assert(stub_type
>= arm_stub_cortex_a8_first
839 && stub_type
<= arm_stub_cortex_a8_last
);
840 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
841 source
, destination
, original_insn
);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg
) const
849 gold_assert(reg
< 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory
&);
862 Stub_factory
& operator=(Stub_factory
&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian
>
871 class Stub_table
: public Output_data
874 Stub_table(Arm_input_section
<big_endian
>* owner
)
875 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section
<big_endian
>*
886 { return this->owner_
; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_
.empty()
893 && this->cortex_a8_stubs_
.empty()
894 && this->arm_v4bx_stubs_
.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
907 const Stub_template
* stub_template
= stub
->stub_template();
908 gold_assert(stub_template
->type() == key
.stub_type());
909 this->reloc_stubs_
[key
] = stub
;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align
= stub_template
->alignment();
914 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
915 stub
->set_offset(this->reloc_stubs_size_
);
916 this->reloc_stubs_size_
+= stub_template
->size();
917 this->reloc_stubs_addralign_
=
918 std::max(this->reloc_stubs_addralign_
, align
);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
927 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
928 this->cortex_a8_stubs_
.insert(value
);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
936 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
937 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key
& key
) const
948 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
949 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg
) const
957 gold_assert(reg
< 0xf);
958 return this->arm_v4bx_stubs_
[reg
];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info
<32, big_endian
>*,
964 Target_arm
<big_endian
>*, Output_section
*,
965 unsigned char*, Arm_address
, section_size_type
);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
981 unsigned char*, Arm_address
,
985 // Write out section contents.
987 do_write(Output_file
*);
989 // Return the required alignment.
992 { return this->prev_addralign_
; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_
); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1008 Target_arm
<big_endian
>*, Output_section
*,
1009 unsigned char*, Arm_address
, section_size_type
);
1011 // Unordered map of relocation stubs.
1013 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1014 Reloc_stub::Key::equal_to
>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1023 // Owner of this stub table.
1024 Arm_input_section
<big_endian
>* owner_
;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_
;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_
;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_
;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_
;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_
;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_
;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind
: public Output_section_data
1047 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1048 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_
; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_
; }
1063 do_write(Output_file
* of
)
1065 if (parameters
->target().is_big_endian())
1066 this->do_fixed_endian_write
<true>(of
);
1068 this->do_fixed_endian_write
<false>(of
);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile
* mapfile
) const
1074 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian
>
1080 do_fixed_endian_write(Output_file
*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_
;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map
<section_offset_type
, section_offset_type
>
1093 Arm_exidx_section_offset_map
;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section
& exidx_input_section
,
1108 const Arm_exidx_section_offset_map
& section_offset_map
,
1109 uint32_t deleted_bytes
);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type
);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section
&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_
; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map
&
1122 section_offset_map() const
1123 { return this->section_offset_map_
; }
1126 // Write merged section into file OF.
1128 do_write(Output_file
* of
);
1131 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1132 section_offset_type
*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section
& exidx_input_section_
;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map
& section_offset_map_
;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_
;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian
>
1148 class Arm_input_section
: public Output_relaxed_input_section
1151 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1152 : Output_relaxed_input_section(relobj
, shndx
, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1154 original_contents_(NULL
)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_
; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1169 // Return the stub table.
1170 Stub_table
<big_endian
>*
1172 { return this->stub_table_
; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1177 { this->stub_table_
= stub_table
; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section
<big_endian
>*
1182 as_arm_input_section(Output_relaxed_input_section
* poris
)
1183 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_
; }
1191 // Write data to output file.
1193 do_write(Output_file
*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_
->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_
));
1203 return this->original_addralign_
;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1217 section_offset_type offset
,
1218 section_offset_type
* poutput
) const
1220 if ((object
== this->relobj())
1221 && (shndx
== this->shndx())
1224 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section
&);
1236 Arm_input_section
& operator=(const Arm_input_section
&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_
;
1240 // Section size of the original input section.
1241 uint32_t original_size_
;
1243 Stub_table
<big_endian
>* stub_table_
;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_
;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1257 bool merge_exidx_entries
= true)
1258 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1259 last_inlined_entry_(0), last_input_section_(NULL
),
1260 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1261 merge_exidx_entries_(merge_exidx_entries
)
1265 { delete this->section_offset_map_
; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian
>
1275 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1276 const unsigned char* section_contents
,
1277 section_size_type section_size
,
1278 Arm_exidx_section_offset_map
** psection_offset_map
);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_
; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1294 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND
,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word
);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset
,
1321 section_size_type deleted_bytes
, bool delete_entry
);
1323 // EXIDX output section.
1324 Output_section
* exidx_output_section_
;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_
;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_
;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section
* last_input_section_
;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map
* section_offset_map_
;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section
* first_output_text_section_
;
1337 bool merge_exidx_entries_
;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian
>
1344 class Arm_output_section
: public Output_section
1347 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1351 elfcpp::Elf_Xword flags
)
1352 : Output_section(name
, type
,
1353 (type
== elfcpp::SHT_ARM_EXIDX
1354 ? flags
| elfcpp::SHF_LINK_ORDER
1357 if (type
== elfcpp::SHT_ARM_EXIDX
)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section
<big_endian
>*
1371 as_arm_output_section(Output_section
* os
)
1372 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list
* list
);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout
* layout
,
1383 const Text_section_list
& sorted_text_section
,
1384 Symbol_table
* symtab
,
1385 bool merge_exidx_entries
,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section
;
1395 typedef Output_section::Input_section_list Input_section_list
;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator
,
1399 Input_section_list::const_iterator
,
1400 Input_section_list::const_iterator
,
1401 Target_arm
<big_endian
>*,
1402 std::vector
<Output_relaxed_input_section
*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset
=
1412 static_cast<section_offset_type
>(-1);
1414 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1415 unsigned int link
, uint32_t size
,
1416 uint32_t addralign
, uint32_t text_size
)
1417 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1418 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_
; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_
; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_
; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_
; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_
; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_
; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_
; }
1461 // Set has-errors flag.
1464 { this->has_errors_
= true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_
;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_
;
1477 // Size of associated text section.
1478 uint32_t text_size_
;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian
>
1486 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1489 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1491 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1492 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1493 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL
), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_
; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table
<big_endian
>*
1506 stub_table(unsigned int shndx
) const
1508 gold_assert(shndx
< this->stub_tables_
.size());
1509 return this->stub_tables_
[shndx
];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1516 gold_assert(shndx
< this->stub_tables_
.size());
1517 this->stub_tables_
[shndx
] = stub_table
;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym
) const
1525 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1526 return this->local_symbol_is_thumb_function_
[r_sym
];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx
)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx
, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj
<big_endian
>*
1547 as_arm_relobj(Relobj
* relobj
)
1548 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_
; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data
*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_
; }
1562 // Mapping symbol location.
1563 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position
& p1
,
1570 const Mapping_symbol_position
& p2
) const
1572 return (p1
.first
< p2
.first
1573 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map
<Mapping_symbol_position
, char,
1580 Mapping_symbol_position_less
> Mapping_symbols_info
;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx
) const
1586 return (this->section_has_cortex_a8_workaround_
!= NULL
1587 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1594 if (this->section_has_cortex_a8_workaround_
== NULL
)
1595 this->section_has_cortex_a8_workaround_
=
1596 new std::vector
<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section
*
1603 exidx_input_section_by_link(unsigned int shndx
) const
1605 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1606 return ((p
!= this->exidx_section_map_
.end()
1607 && p
->second
->link() == shndx
)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section
*
1614 exidx_input_section_by_shndx(unsigned shndx
) const
1616 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1617 return ((p
!= this->exidx_section_map_
.end()
1618 && p
->second
->shndx() == shndx
)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_
; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_
= true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_
; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1647 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1648 p
!= this->exidx_section_map_
.end();
1651 if (p
->second
->shndx() == p
->first
)
1652 list
->push_back(p
->first
);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list
->begin(), list
->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file
<32, big_endian
>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1668 this->stub_tables_
.swap(empty_stub_table_list
);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template
<char>*,
1674 Stringpool_template
<char>*);
1677 do_relocate_sections(
1678 const Symbol_table
* symtab
, const Layout
* layout
,
1679 const unsigned char* pshdrs
, Output_file
* of
,
1680 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data
* sd
);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1695 const Relobj::Output_sections
&,
1696 const Symbol_table
*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1701 const Output_section
*, const Symbol_table
*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1706 unsigned int, Output_section
*,
1707 const Symbol_table
*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1712 unsigned int, Output_section
*,
1713 Target_arm
<big_endian
>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr
,
1722 const unsigned char* psyms
, unsigned int* pshndx
);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx
,
1730 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1731 unsigned int text_shndx
,
1732 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section
*);
1739 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1740 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_
;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector
<bool> local_symbol_is_thumb_function_
;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_
;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data
* attributes_section_data_
;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_
;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_
;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_
;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_
;
1765 // Arm_dynobj class.
1767 template<bool big_endian
>
1768 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1771 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1772 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1773 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1774 processor_specific_flags_(0), attributes_section_data_(NULL
)
1778 { delete this->attributes_section_data_
; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj
<big_endian
>*
1783 as_arm_dynobj(Dynobj
* dynobj
)
1784 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_
; }
1792 // Attributes section data.
1793 const Attributes_section_data
*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_
; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data
* sd
);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_
;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data
* attributes_section_data_
;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type
, bool big_endian
>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types
<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types
<sh_type
,
1822 32, big_endian
>::Reloc
& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian
>
1828 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1830 elfcpp::Elf_types
<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian
>
1843 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1845 elfcpp::Elf_types
<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1850 big_endian
>::Reloc
& reloc
) const
1851 { return reloc
.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1861 Arm_address destination
)
1862 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_
; }
1876 // Return the relocation type.
1879 { return this->r_type_
; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_
; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub
* reloc_stub_
;
1891 unsigned int r_type_
;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_
;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian
>
1901 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1904 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1905 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1913 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1920 Sized_relobj_file
<32, big_endian
>* relobj
,
1923 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1938 Sized_relobj_file
<32, big_endian
>* object
,
1939 unsigned int index
);
1942 // Write out the GOT table.
1944 do_write(Output_file
*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1953 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1954 { this->u_
.global
.symbol
= gsym
; }
1956 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1957 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1958 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1960 this->u_
.local
.relobj
= relobj
;
1961 this->u_
.local
.index
= index
;
1964 // Return the GOT offset.
1967 { return this->got_offset_
; }
1972 { return this->r_type_
; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_
; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_
);
1984 return this->u_
.global
.symbol
;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file
<32, big_endian
>*
1991 gold_assert(!this->symbol_is_global_
);
1992 return this->u_
.local
.relobj
;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_
);
2000 return this->u_
.local
.index
;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_
;
2006 // Type of relocation.
2007 unsigned int r_type_
;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_
;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file
<32, big_endian
>* relobj
;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table
* symbol_table_
;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector
<Static_reloc
> static_relocs_
;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2041 class Arm_scan_relocatable_relocs
:
2042 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type
, Relobj
*)
2050 if (sh_type
== elfcpp::SHT_RELA
)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2054 if (r_type
== elfcpp::R_ARM_TARGET1
2055 || r_type
== elfcpp::R_ARM_TARGET2
)
2057 const Target_arm
<big_endian
>* arm_target
=
2058 Target_arm
<big_endian
>::default_target();
2059 r_type
= arm_target
->get_real_reloc_type(r_type
);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE
:
2067 case elfcpp::R_ARM_V4BX
:
2068 case elfcpp::R_ARM_TLS_GOTDESC
:
2069 case elfcpp::R_ARM_TLS_CALL
:
2070 case elfcpp::R_ARM_TLS_DESCSEQ
:
2071 case elfcpp::R_ARM_THM_TLS_CALL
:
2072 case elfcpp::R_ARM_GOTRELAX
:
2073 case elfcpp::R_ARM_GNU_VTENTRY
:
2074 case elfcpp::R_ARM_GNU_VTINHERIT
:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1
:
2080 case elfcpp::R_ARM_TARGET2
:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32
:
2085 case elfcpp::R_ARM_REL32
:
2086 case elfcpp::R_ARM_SBREL32
:
2087 case elfcpp::R_ARM_GOTOFF32
:
2088 case elfcpp::R_ARM_BASE_PREL
:
2089 case elfcpp::R_ARM_GOT_BREL
:
2090 case elfcpp::R_ARM_BASE_ABS
:
2091 case elfcpp::R_ARM_ABS32_NOI
:
2092 case elfcpp::R_ARM_REL32_NOI
:
2093 case elfcpp::R_ARM_PLT32_ABS
:
2094 case elfcpp::R_ARM_GOT_ABS
:
2095 case elfcpp::R_ARM_GOT_PREL
:
2096 case elfcpp::R_ARM_TLS_GD32
:
2097 case elfcpp::R_ARM_TLS_LDM32
:
2098 case elfcpp::R_ARM_TLS_LDO32
:
2099 case elfcpp::R_ARM_TLS_IE32
:
2100 case elfcpp::R_ARM_TLS_LE32
:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL
;
2110 template<bool big_endian
>
2111 class Target_arm
: public Sized_target
<32, big_endian
>
2114 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info
* info
= &arm_info
)
2121 : Sized_target
<32, big_endian
>(info
),
2122 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2123 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL
),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_
; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value
)
2139 { this->should_force_pic_veneer_
= value
; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute
* attr
=
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2147 int arch
= attr
->int_value();
2148 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute
* attr
=
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2158 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2161 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2164 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2165 return attr
->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute
* attr
=
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2174 int arch
= attr
->int_value();
2175 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2177 || arch
== elfcpp::TAG_CPU_ARCH_V7
2178 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute
* attr
=
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2187 int arch
= attr
->int_value();
2188 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch
== elfcpp::TAG_CPU_ARCH_V7
2190 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute
* attr
=
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2199 int arch
= attr
->int_value();
2200 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute
* attr
=
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2210 int arch
= attr
->int_value();
2211 if (parameters
->options().fix_arm1176())
2212 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch
== elfcpp::TAG_CPU_ARCH_V7
2214 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2218 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2220 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table
* symtab
,
2228 Sized_relobj_file
<32, big_endian
>* object
,
2229 unsigned int data_shndx
,
2230 unsigned int sh_type
,
2231 const unsigned char* prelocs
,
2233 Output_section
* output_section
,
2234 bool needs_special_offset_handling
,
2235 size_t local_symbol_count
,
2236 const unsigned char* plocal_symbols
);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table
* symtab
,
2242 Sized_relobj_file
<32, big_endian
>* object
,
2243 unsigned int data_shndx
,
2244 unsigned int sh_type
,
2245 const unsigned char* prelocs
,
2247 Output_section
* output_section
,
2248 bool needs_special_offset_handling
,
2249 size_t local_symbol_count
,
2250 const unsigned char* plocal_symbols
);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol
*) const;
2261 // Relocate a section.
2263 relocate_section(const Relocate_info
<32, big_endian
>*,
2264 unsigned int sh_type
,
2265 const unsigned char* prelocs
,
2267 Output_section
* output_section
,
2268 bool needs_special_offset_handling
,
2269 unsigned char* view
,
2270 Arm_address view_address
,
2271 section_size_type view_size
,
2272 const Reloc_symbol_changes
*);
2274 // Scan the relocs during a relocatable link.
2276 scan_relocatable_relocs(Symbol_table
* symtab
,
2278 Sized_relobj_file
<32, big_endian
>* object
,
2279 unsigned int data_shndx
,
2280 unsigned int sh_type
,
2281 const unsigned char* prelocs
,
2283 Output_section
* output_section
,
2284 bool needs_special_offset_handling
,
2285 size_t local_symbol_count
,
2286 const unsigned char* plocal_symbols
,
2287 Relocatable_relocs
*);
2289 // Emit relocations for a section.
2291 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2292 unsigned int sh_type
,
2293 const unsigned char* prelocs
,
2295 Output_section
* output_section
,
2296 off_t offset_in_output_section
,
2297 const Relocatable_relocs
*,
2298 unsigned char* view
,
2299 Arm_address view_address
,
2300 section_size_type view_size
,
2301 unsigned char* reloc_view
,
2302 section_size_type reloc_view_size
);
2304 // Perform target-specific processing in a relocatable link. This is
2305 // only used if we use the relocation strategy RELOC_SPECIAL.
2307 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2308 unsigned int sh_type
,
2309 const unsigned char* preloc_in
,
2311 Output_section
* output_section
,
2312 off_t offset_in_output_section
,
2313 unsigned char* view
,
2314 typename
elfcpp::Elf_types
<32>::Elf_Addr
2316 section_size_type view_size
,
2317 unsigned char* preloc_out
);
2319 // Return whether SYM is defined by the ABI.
2321 do_is_defined_by_abi(const Symbol
* sym
) const
2322 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2324 // Return whether there is a GOT section.
2326 has_got_section() const
2327 { return this->got_
!= NULL
; }
2329 // Return the size of the GOT section.
2333 gold_assert(this->got_
!= NULL
);
2334 return this->got_
->data_size();
2337 // Return the number of entries in the GOT.
2339 got_entry_count() const
2341 if (!this->has_got_section())
2343 return this->got_size() / 4;
2346 // Return the number of entries in the PLT.
2348 plt_entry_count() const;
2350 // Return the offset of the first non-reserved PLT entry.
2352 first_plt_entry_offset() const;
2354 // Return the size of each PLT entry.
2356 plt_entry_size() const;
2358 // Map platform-specific reloc types
2360 get_real_reloc_type(unsigned int r_type
);
2363 // Methods to support stub-generations.
2366 // Return the stub factory
2368 stub_factory() const
2369 { return this->stub_factory_
; }
2371 // Make a new Arm_input_section object.
2372 Arm_input_section
<big_endian
>*
2373 new_arm_input_section(Relobj
*, unsigned int);
2375 // Find the Arm_input_section object corresponding to the SHNDX-th input
2376 // section of RELOBJ.
2377 Arm_input_section
<big_endian
>*
2378 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2380 // Make a new Stub_table
2381 Stub_table
<big_endian
>*
2382 new_stub_table(Arm_input_section
<big_endian
>*);
2384 // Scan a section for stub generation.
2386 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2387 const unsigned char*, size_t, Output_section
*,
2388 bool, const unsigned char*, Arm_address
,
2393 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2394 Output_section
*, unsigned char*, Arm_address
,
2397 // Get the default ARM target.
2398 static Target_arm
<big_endian
>*
2401 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2402 && parameters
->target().is_big_endian() == big_endian
);
2403 return static_cast<Target_arm
<big_endian
>*>(
2404 parameters
->sized_target
<32, big_endian
>());
2407 // Whether NAME belongs to a mapping symbol.
2409 is_mapping_symbol_name(const char* name
)
2413 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2414 && (name
[2] == '\0' || name
[2] == '.'));
2417 // Whether we work around the Cortex-A8 erratum.
2419 fix_cortex_a8() const
2420 { return this->fix_cortex_a8_
; }
2422 // Whether we merge exidx entries in debuginfo.
2424 merge_exidx_entries() const
2425 { return parameters
->options().merge_exidx_entries(); }
2427 // Whether we fix R_ARM_V4BX relocation.
2429 // 1 - replace with MOV instruction (armv4 target)
2430 // 2 - make interworking veneer (>= armv4t targets only)
2431 General_options::Fix_v4bx
2433 { return parameters
->options().fix_v4bx(); }
2435 // Scan a span of THUMB code section for Cortex-A8 erratum.
2437 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2438 section_size_type
, section_size_type
,
2439 const unsigned char*, Arm_address
);
2441 // Apply Cortex-A8 workaround to a branch.
2443 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2444 unsigned char*, Arm_address
);
2447 // Make the PLT-generator object.
2448 Output_data_plt_arm
<big_endian
>*
2449 make_data_plt(Layout
* layout
, Output_data_space
* got_plt
)
2450 { return this->do_make_data_plt(layout
, got_plt
); }
2452 // Make an ELF object.
2454 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2455 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2458 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2459 const elfcpp::Ehdr
<32, !big_endian
>&)
2460 { gold_unreachable(); }
2463 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2464 const elfcpp::Ehdr
<64, false>&)
2465 { gold_unreachable(); }
2468 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2469 const elfcpp::Ehdr
<64, true>&)
2470 { gold_unreachable(); }
2472 // Make an output section.
2474 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2475 elfcpp::Elf_Xword flags
)
2476 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2479 do_adjust_elf_header(unsigned char* view
, int len
) const;
2481 // We only need to generate stubs, and hence perform relaxation if we are
2482 // not doing relocatable linking.
2484 do_may_relax() const
2485 { return !parameters
->options().relocatable(); }
2488 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2490 // Determine whether an object attribute tag takes an integer, a
2493 do_attribute_arg_type(int tag
) const;
2495 // Reorder tags during output.
2497 do_attributes_order(int num
) const;
2499 // This is called when the target is selected as the default.
2501 do_select_as_default_target()
2503 // No locking is required since there should only be one default target.
2504 // We cannot have both the big-endian and little-endian ARM targets
2506 gold_assert(arm_reloc_property_table
== NULL
);
2507 arm_reloc_property_table
= new Arm_reloc_property_table();
2510 // Virtual function which is set to return true by a target if
2511 // it can use relocation types to determine if a function's
2512 // pointer is taken.
2514 do_can_check_for_function_pointers() const
2517 // Whether a section called SECTION_NAME may have function pointers to
2518 // sections not eligible for safe ICF folding.
2520 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2522 return (!is_prefix_of(".ARM.exidx", section_name
)
2523 && !is_prefix_of(".ARM.extab", section_name
)
2524 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2528 do_define_standard_symbols(Symbol_table
*, Layout
*);
2530 virtual Output_data_plt_arm
<big_endian
>*
2531 do_make_data_plt(Layout
* layout
, Output_data_space
* got_plt
)
2533 return new Output_data_plt_arm_standard
<big_endian
>(layout
, got_plt
);
2537 // The class which scans relocations.
2542 : issued_non_pic_error_(false)
2546 get_reference_flags(unsigned int r_type
);
2549 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2550 Sized_relobj_file
<32, big_endian
>* object
,
2551 unsigned int data_shndx
,
2552 Output_section
* output_section
,
2553 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2554 const elfcpp::Sym
<32, big_endian
>& lsym
);
2557 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2558 Sized_relobj_file
<32, big_endian
>* object
,
2559 unsigned int data_shndx
,
2560 Output_section
* output_section
,
2561 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2565 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2566 Sized_relobj_file
<32, big_endian
>* ,
2569 const elfcpp::Rel
<32, big_endian
>& ,
2571 const elfcpp::Sym
<32, big_endian
>&);
2574 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2575 Sized_relobj_file
<32, big_endian
>* ,
2578 const elfcpp::Rel
<32, big_endian
>& ,
2579 unsigned int , Symbol
*);
2583 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2584 unsigned int r_type
);
2587 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2588 unsigned int r_type
, Symbol
*);
2591 check_non_pic(Relobj
*, unsigned int r_type
);
2593 // Almost identical to Symbol::needs_plt_entry except that it also
2594 // handles STT_ARM_TFUNC.
2596 symbol_needs_plt_entry(const Symbol
* sym
)
2598 // An undefined symbol from an executable does not need a PLT entry.
2599 if (sym
->is_undefined() && !parameters
->options().shared())
2602 return (!parameters
->doing_static_link()
2603 && (sym
->type() == elfcpp::STT_FUNC
2604 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2605 && (sym
->is_from_dynobj()
2606 || sym
->is_undefined()
2607 || sym
->is_preemptible()));
2611 possible_function_pointer_reloc(unsigned int r_type
);
2613 // Whether we have issued an error about a non-PIC compilation.
2614 bool issued_non_pic_error_
;
2617 // The class which implements relocation.
2627 // Return whether the static relocation needs to be applied.
2629 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2630 unsigned int r_type
,
2632 Output_section
* output_section
);
2634 // Do a relocation. Return false if the caller should not issue
2635 // any warnings about this relocation.
2637 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2638 Output_section
*, size_t relnum
,
2639 const elfcpp::Rel
<32, big_endian
>&,
2640 unsigned int r_type
, const Sized_symbol
<32>*,
2641 const Symbol_value
<32>*,
2642 unsigned char*, Arm_address
,
2645 // Return whether we want to pass flag NON_PIC_REF for this
2646 // reloc. This means the relocation type accesses a symbol not via
2649 reloc_is_non_pic(unsigned int r_type
)
2653 // These relocation types reference GOT or PLT entries explicitly.
2654 case elfcpp::R_ARM_GOT_BREL
:
2655 case elfcpp::R_ARM_GOT_ABS
:
2656 case elfcpp::R_ARM_GOT_PREL
:
2657 case elfcpp::R_ARM_GOT_BREL12
:
2658 case elfcpp::R_ARM_PLT32_ABS
:
2659 case elfcpp::R_ARM_TLS_GD32
:
2660 case elfcpp::R_ARM_TLS_LDM32
:
2661 case elfcpp::R_ARM_TLS_IE32
:
2662 case elfcpp::R_ARM_TLS_IE12GP
:
2664 // These relocate types may use PLT entries.
2665 case elfcpp::R_ARM_CALL
:
2666 case elfcpp::R_ARM_THM_CALL
:
2667 case elfcpp::R_ARM_JUMP24
:
2668 case elfcpp::R_ARM_THM_JUMP24
:
2669 case elfcpp::R_ARM_THM_JUMP19
:
2670 case elfcpp::R_ARM_PLT32
:
2671 case elfcpp::R_ARM_THM_XPC22
:
2672 case elfcpp::R_ARM_PREL31
:
2673 case elfcpp::R_ARM_SBREL31
:
2682 // Do a TLS relocation.
2683 inline typename Arm_relocate_functions
<big_endian
>::Status
2684 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2685 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2686 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2687 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2692 // A class which returns the size required for a relocation type,
2693 // used while scanning relocs during a relocatable link.
2694 class Relocatable_size_for_reloc
2698 get_size_for_reloc(unsigned int, Relobj
*);
2701 // Adjust TLS relocation type based on the options and whether this
2702 // is a local symbol.
2703 static tls::Tls_optimization
2704 optimize_tls_reloc(bool is_final
, int r_type
);
2706 // Get the GOT section, creating it if necessary.
2707 Arm_output_data_got
<big_endian
>*
2708 got_section(Symbol_table
*, Layout
*);
2710 // Get the GOT PLT section.
2712 got_plt_section() const
2714 gold_assert(this->got_plt_
!= NULL
);
2715 return this->got_plt_
;
2718 // Create a PLT entry for a global symbol.
2720 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2722 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2724 define_tls_base_symbol(Symbol_table
*, Layout
*);
2726 // Create a GOT entry for the TLS module index.
2728 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2729 Sized_relobj_file
<32, big_endian
>* object
);
2731 // Get the PLT section.
2732 const Output_data_plt_arm
<big_endian
>*
2735 gold_assert(this->plt_
!= NULL
);
2739 // Get the dynamic reloc section, creating it if necessary.
2741 rel_dyn_section(Layout
*);
2743 // Get the section to use for TLS_DESC relocations.
2745 rel_tls_desc_section(Layout
*) const;
2747 // Return true if the symbol may need a COPY relocation.
2748 // References from an executable object to non-function symbols
2749 // defined in a dynamic object may need a COPY relocation.
2751 may_need_copy_reloc(Symbol
* gsym
)
2753 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2754 && gsym
->may_need_copy_reloc());
2757 // Add a potential copy relocation.
2759 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2760 Sized_relobj_file
<32, big_endian
>* object
,
2761 unsigned int shndx
, Output_section
* output_section
,
2762 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2764 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2765 symtab
->get_sized_symbol
<32>(sym
),
2766 object
, shndx
, output_section
, reloc
,
2767 this->rel_dyn_section(layout
));
2770 // Whether two EABI versions are compatible.
2772 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2774 // Merge processor-specific flags from input object and those in the ELF
2775 // header of the output.
2777 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2779 // Get the secondary compatible architecture.
2781 get_secondary_compatible_arch(const Attributes_section_data
*);
2783 // Set the secondary compatible architecture.
2785 set_secondary_compatible_arch(Attributes_section_data
*, int);
2788 tag_cpu_arch_combine(const char*, int, int*, int, int);
2790 // Helper to print AEABI enum tag value.
2792 aeabi_enum_name(unsigned int);
2794 // Return string value for TAG_CPU_name.
2796 tag_cpu_name_value(unsigned int);
2798 // Merge object attributes from input object and those in the output.
2800 merge_object_attributes(const char*, const Attributes_section_data
*);
2802 // Helper to get an AEABI object attribute
2804 get_aeabi_object_attribute(int tag
) const
2806 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2807 gold_assert(pasd
!= NULL
);
2808 Object_attribute
* attr
=
2809 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2810 gold_assert(attr
!= NULL
);
2815 // Methods to support stub-generations.
2818 // Group input sections for stub generation.
2820 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2822 // Scan a relocation for stub generation.
2824 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2825 const Sized_symbol
<32>*, unsigned int,
2826 const Symbol_value
<32>*,
2827 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2829 // Scan a relocation section for stub.
2830 template<int sh_type
>
2832 scan_reloc_section_for_stubs(
2833 const Relocate_info
<32, big_endian
>* relinfo
,
2834 const unsigned char* prelocs
,
2836 Output_section
* output_section
,
2837 bool needs_special_offset_handling
,
2838 const unsigned char* view
,
2839 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2842 // Fix .ARM.exidx section coverage.
2844 fix_exidx_coverage(Layout
*, const Input_objects
*,
2845 Arm_output_section
<big_endian
>*, Symbol_table
*,
2848 // Functors for STL set.
2849 struct output_section_address_less_than
2852 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2853 { return s1
->address() < s2
->address(); }
2856 // Information about this specific target which we pass to the
2857 // general Target structure.
2858 static const Target::Target_info arm_info
;
2860 // The types of GOT entries needed for this platform.
2861 // These values are exposed to the ABI in an incremental link.
2862 // Do not renumber existing values without changing the version
2863 // number of the .gnu_incremental_inputs section.
2866 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2867 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2868 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2869 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2870 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2873 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2875 // Map input section to Arm_input_section.
2876 typedef Unordered_map
<Section_id
,
2877 Arm_input_section
<big_endian
>*,
2879 Arm_input_section_map
;
2881 // Map output addresses to relocs for Cortex-A8 erratum.
2882 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2883 Cortex_a8_relocs_info
;
2886 Arm_output_data_got
<big_endian
>* got_
;
2888 Output_data_plt_arm
<big_endian
>* plt_
;
2889 // The GOT PLT section.
2890 Output_data_space
* got_plt_
;
2891 // The dynamic reloc section.
2892 Reloc_section
* rel_dyn_
;
2893 // Relocs saved to avoid a COPY reloc.
2894 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2895 // Space for variables copied with a COPY reloc.
2896 Output_data_space
* dynbss_
;
2897 // Offset of the GOT entry for the TLS module index.
2898 unsigned int got_mod_index_offset_
;
2899 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2900 bool tls_base_symbol_defined_
;
2901 // Vector of Stub_tables created.
2902 Stub_table_list stub_tables_
;
2904 const Stub_factory
&stub_factory_
;
2905 // Whether we force PIC branch veneers.
2906 bool should_force_pic_veneer_
;
2907 // Map for locating Arm_input_sections.
2908 Arm_input_section_map arm_input_section_map_
;
2909 // Attributes section data in output.
2910 Attributes_section_data
* attributes_section_data_
;
2911 // Whether we want to fix code for Cortex-A8 erratum.
2912 bool fix_cortex_a8_
;
2913 // Map addresses to relocs for Cortex-A8 erratum.
2914 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2917 template<bool big_endian
>
2918 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2921 big_endian
, // is_big_endian
2922 elfcpp::EM_ARM
, // machine_code
2923 false, // has_make_symbol
2924 false, // has_resolve
2925 false, // has_code_fill
2926 true, // is_default_stack_executable
2927 false, // can_icf_inline_merge_sections
2929 "/usr/lib/libc.so.1", // dynamic_linker
2930 0x8000, // default_text_segment_address
2931 0x1000, // abi_pagesize (overridable by -z max-page-size)
2932 0x1000, // common_pagesize (overridable by -z common-page-size)
2933 false, // isolate_execinstr
2935 elfcpp::SHN_UNDEF
, // small_common_shndx
2936 elfcpp::SHN_UNDEF
, // large_common_shndx
2937 0, // small_common_section_flags
2938 0, // large_common_section_flags
2939 ".ARM.attributes", // attributes_section
2940 "aeabi" // attributes_vendor
2943 // Arm relocate functions class
2946 template<bool big_endian
>
2947 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2952 STATUS_OKAY
, // No error during relocation.
2953 STATUS_OVERFLOW
, // Relocation overflow.
2954 STATUS_BAD_RELOC
// Relocation cannot be applied.
2958 typedef Relocate_functions
<32, big_endian
> Base
;
2959 typedef Arm_relocate_functions
<big_endian
> This
;
2961 // Encoding of imm16 argument for movt and movw ARM instructions
2964 // imm16 := imm4 | imm12
2966 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2967 // +-------+---------------+-------+-------+-----------------------+
2968 // | | |imm4 | |imm12 |
2969 // +-------+---------------+-------+-------+-----------------------+
2971 // Extract the relocation addend from VAL based on the ARM
2972 // instruction encoding described above.
2973 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2974 extract_arm_movw_movt_addend(
2975 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2977 // According to the Elf ABI for ARM Architecture the immediate
2978 // field is sign-extended to form the addend.
2979 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
2982 // Insert X into VAL based on the ARM instruction encoding described
2984 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2985 insert_val_arm_movw_movt(
2986 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2987 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2991 val
|= (x
& 0xf000) << 4;
2995 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2998 // imm16 := imm4 | i | imm3 | imm8
3000 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3001 // +---------+-+-----------+-------++-+-----+-------+---------------+
3002 // | |i| |imm4 || |imm3 | |imm8 |
3003 // +---------+-+-----------+-------++-+-----+-------+---------------+
3005 // Extract the relocation addend from VAL based on the Thumb2
3006 // instruction encoding described above.
3007 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3008 extract_thumb_movw_movt_addend(
3009 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3011 // According to the Elf ABI for ARM Architecture the immediate
3012 // field is sign-extended to form the addend.
3013 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3014 | ((val
>> 15) & 0x0800)
3015 | ((val
>> 4) & 0x0700)
3019 // Insert X into VAL based on the Thumb2 instruction encoding
3021 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3022 insert_val_thumb_movw_movt(
3023 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3024 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3027 val
|= (x
& 0xf000) << 4;
3028 val
|= (x
& 0x0800) << 15;
3029 val
|= (x
& 0x0700) << 4;
3030 val
|= (x
& 0x00ff);
3034 // Calculate the smallest constant Kn for the specified residual.
3035 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3037 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3043 // Determine the most significant bit in the residual and
3044 // align the resulting value to a 2-bit boundary.
3045 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3047 // The desired shift is now (msb - 6), or zero, whichever
3049 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3052 // Calculate the final residual for the specified group index.
3053 // If the passed group index is less than zero, the method will return
3054 // the value of the specified residual without any change.
3055 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3056 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3057 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3060 for (int n
= 0; n
<= group
; n
++)
3062 // Calculate which part of the value to mask.
3063 uint32_t shift
= calc_grp_kn(residual
);
3064 // Calculate the residual for the next time around.
3065 residual
&= ~(residual
& (0xff << shift
));
3071 // Calculate the value of Gn for the specified group index.
3072 // We return it in the form of an encoded constant-and-rotation.
3073 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3074 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3075 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3078 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3081 for (int n
= 0; n
<= group
; n
++)
3083 // Calculate which part of the value to mask.
3084 shift
= calc_grp_kn(residual
);
3085 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3086 gn
= residual
& (0xff << shift
);
3087 // Calculate the residual for the next time around.
3090 // Return Gn in the form of an encoded constant-and-rotation.
3091 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3095 // Handle ARM long branches.
3096 static typename
This::Status
3097 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3098 unsigned char*, const Sized_symbol
<32>*,
3099 const Arm_relobj
<big_endian
>*, unsigned int,
3100 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3102 // Handle THUMB long branches.
3103 static typename
This::Status
3104 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3105 unsigned char*, const Sized_symbol
<32>*,
3106 const Arm_relobj
<big_endian
>*, unsigned int,
3107 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3110 // Return the branch offset of a 32-bit THUMB branch.
3111 static inline int32_t
3112 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3114 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3115 // involving the J1 and J2 bits.
3116 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3117 uint32_t upper
= upper_insn
& 0x3ffU
;
3118 uint32_t lower
= lower_insn
& 0x7ffU
;
3119 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3120 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3121 uint32_t i1
= j1
^ s
? 0 : 1;
3122 uint32_t i2
= j2
^ s
? 0 : 1;
3124 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3125 | (upper
<< 12) | (lower
<< 1));
3128 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3129 // UPPER_INSN is the original upper instruction of the branch. Caller is
3130 // responsible for overflow checking and BLX offset adjustment.
3131 static inline uint16_t
3132 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3134 uint32_t s
= offset
< 0 ? 1 : 0;
3135 uint32_t bits
= static_cast<uint32_t>(offset
);
3136 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3139 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3140 // LOWER_INSN is the original lower instruction of the branch. Caller is
3141 // responsible for overflow checking and BLX offset adjustment.
3142 static inline uint16_t
3143 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3145 uint32_t s
= offset
< 0 ? 1 : 0;
3146 uint32_t bits
= static_cast<uint32_t>(offset
);
3147 return ((lower_insn
& ~0x2fffU
)
3148 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3149 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3150 | ((bits
>> 1) & 0x7ffU
));
3153 // Return the branch offset of a 32-bit THUMB conditional branch.
3154 static inline int32_t
3155 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3157 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3158 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3159 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3160 uint32_t lower
= (lower_insn
& 0x07ffU
);
3161 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3163 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3166 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3167 // instruction. UPPER_INSN is the original upper instruction of the branch.
3168 // Caller is responsible for overflow checking.
3169 static inline uint16_t
3170 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3172 uint32_t s
= offset
< 0 ? 1 : 0;
3173 uint32_t bits
= static_cast<uint32_t>(offset
);
3174 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3177 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3178 // instruction. LOWER_INSN is the original lower instruction of the branch.
3179 // The caller is responsible for overflow checking.
3180 static inline uint16_t
3181 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3183 uint32_t bits
= static_cast<uint32_t>(offset
);
3184 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3185 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3186 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3188 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3191 // R_ARM_ABS8: S + A
3192 static inline typename
This::Status
3193 abs8(unsigned char* view
,
3194 const Sized_relobj_file
<32, big_endian
>* object
,
3195 const Symbol_value
<32>* psymval
)
3197 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3198 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3199 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3200 int32_t addend
= Bits
<8>::sign_extend32(val
);
3201 Arm_address x
= psymval
->value(object
, addend
);
3202 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3203 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3205 // R_ARM_ABS8 permits signed or unsigned results.
3206 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3207 ? This::STATUS_OVERFLOW
3208 : This::STATUS_OKAY
);
3211 // R_ARM_THM_ABS5: S + A
3212 static inline typename
This::Status
3213 thm_abs5(unsigned char* view
,
3214 const Sized_relobj_file
<32, big_endian
>* object
,
3215 const Symbol_value
<32>* psymval
)
3217 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3218 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3219 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3220 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3221 Reltype addend
= (val
& 0x7e0U
) >> 6;
3222 Reltype x
= psymval
->value(object
, addend
);
3223 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3224 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3225 return (Bits
<5>::has_overflow32(x
)
3226 ? This::STATUS_OVERFLOW
3227 : This::STATUS_OKAY
);
3230 // R_ARM_ABS12: S + A
3231 static inline typename
This::Status
3232 abs12(unsigned char* view
,
3233 const Sized_relobj_file
<32, big_endian
>* object
,
3234 const Symbol_value
<32>* psymval
)
3236 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3237 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3238 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3239 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3240 Reltype addend
= val
& 0x0fffU
;
3241 Reltype x
= psymval
->value(object
, addend
);
3242 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3243 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3244 return (Bits
<12>::has_overflow32(x
)
3245 ? This::STATUS_OVERFLOW
3246 : This::STATUS_OKAY
);
3249 // R_ARM_ABS16: S + A
3250 static inline typename
This::Status
3251 abs16(unsigned char* view
,
3252 const Sized_relobj_file
<32, big_endian
>* object
,
3253 const Symbol_value
<32>* psymval
)
3255 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3256 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3257 int32_t addend
= Bits
<16>::sign_extend32(val
);
3258 Arm_address x
= psymval
->value(object
, addend
);
3259 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3260 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3262 // R_ARM_ABS16 permits signed or unsigned results.
3263 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3264 ? This::STATUS_OVERFLOW
3265 : This::STATUS_OKAY
);
3268 // R_ARM_ABS32: (S + A) | T
3269 static inline typename
This::Status
3270 abs32(unsigned char* view
,
3271 const Sized_relobj_file
<32, big_endian
>* object
,
3272 const Symbol_value
<32>* psymval
,
3273 Arm_address thumb_bit
)
3275 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3276 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3277 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3278 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3279 return This::STATUS_OKAY
;
3282 // R_ARM_REL32: (S + A) | T - P
3283 static inline typename
This::Status
3284 rel32(unsigned char* view
,
3285 const Sized_relobj_file
<32, big_endian
>* object
,
3286 const Symbol_value
<32>* psymval
,
3287 Arm_address address
,
3288 Arm_address thumb_bit
)
3290 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3291 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3292 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3293 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3294 return This::STATUS_OKAY
;
3297 // R_ARM_THM_JUMP24: (S + A) | T - P
3298 static typename
This::Status
3299 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3300 const Symbol_value
<32>* psymval
, Arm_address address
,
3301 Arm_address thumb_bit
);
3303 // R_ARM_THM_JUMP6: S + A – P
3304 static inline typename
This::Status
3305 thm_jump6(unsigned char* view
,
3306 const Sized_relobj_file
<32, big_endian
>* object
,
3307 const Symbol_value
<32>* psymval
,
3308 Arm_address address
)
3310 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3311 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3312 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3313 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3314 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3315 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3316 Reltype x
= (psymval
->value(object
, addend
) - address
);
3317 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3318 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3319 // CZB does only forward jumps.
3320 return ((x
> 0x007e)
3321 ? This::STATUS_OVERFLOW
3322 : This::STATUS_OKAY
);
3325 // R_ARM_THM_JUMP8: S + A – P
3326 static inline typename
This::Status
3327 thm_jump8(unsigned char* view
,
3328 const Sized_relobj_file
<32, big_endian
>* object
,
3329 const Symbol_value
<32>* psymval
,
3330 Arm_address address
)
3332 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3333 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3334 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3335 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3336 int32_t x
= (psymval
->value(object
, addend
) - address
);
3337 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3338 | ((x
& 0x01fe) >> 1)));
3339 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3340 return (Bits
<9>::has_overflow32(x
)
3341 ? This::STATUS_OVERFLOW
3342 : This::STATUS_OKAY
);
3345 // R_ARM_THM_JUMP11: S + A – P
3346 static inline typename
This::Status
3347 thm_jump11(unsigned char* view
,
3348 const Sized_relobj_file
<32, big_endian
>* object
,
3349 const Symbol_value
<32>* psymval
,
3350 Arm_address address
)
3352 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3353 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3354 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3355 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3356 int32_t x
= (psymval
->value(object
, addend
) - address
);
3357 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3358 | ((x
& 0x0ffe) >> 1)));
3359 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3360 return (Bits
<12>::has_overflow32(x
)
3361 ? This::STATUS_OVERFLOW
3362 : This::STATUS_OKAY
);
3365 // R_ARM_BASE_PREL: B(S) + A - P
3366 static inline typename
This::Status
3367 base_prel(unsigned char* view
,
3369 Arm_address address
)
3371 Base::rel32(view
, origin
- address
);
3375 // R_ARM_BASE_ABS: B(S) + A
3376 static inline typename
This::Status
3377 base_abs(unsigned char* view
,
3380 Base::rel32(view
, origin
);
3384 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3385 static inline typename
This::Status
3386 got_brel(unsigned char* view
,
3387 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3389 Base::rel32(view
, got_offset
);
3390 return This::STATUS_OKAY
;
3393 // R_ARM_GOT_PREL: GOT(S) + A - P
3394 static inline typename
This::Status
3395 got_prel(unsigned char* view
,
3396 Arm_address got_entry
,
3397 Arm_address address
)
3399 Base::rel32(view
, got_entry
- address
);
3400 return This::STATUS_OKAY
;
3403 // R_ARM_PREL: (S + A) | T - P
3404 static inline typename
This::Status
3405 prel31(unsigned char* view
,
3406 const Sized_relobj_file
<32, big_endian
>* object
,
3407 const Symbol_value
<32>* psymval
,
3408 Arm_address address
,
3409 Arm_address thumb_bit
)
3411 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3412 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3413 Valtype addend
= Bits
<31>::sign_extend32(val
);
3414 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3415 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3416 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3417 return (Bits
<31>::has_overflow32(x
)
3418 ? This::STATUS_OVERFLOW
3419 : This::STATUS_OKAY
);
3422 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3423 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3424 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3425 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3426 static inline typename
This::Status
3427 movw(unsigned char* view
,
3428 const Sized_relobj_file
<32, big_endian
>* object
,
3429 const Symbol_value
<32>* psymval
,
3430 Arm_address relative_address_base
,
3431 Arm_address thumb_bit
,
3432 bool check_overflow
)
3434 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3435 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3436 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3437 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3438 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3439 - relative_address_base
);
3440 val
= This::insert_val_arm_movw_movt(val
, x
);
3441 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3442 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3443 ? This::STATUS_OVERFLOW
3444 : This::STATUS_OKAY
);
3447 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3448 // R_ARM_MOVT_PREL: S + A - P
3449 // R_ARM_MOVT_BREL: S + A - B(S)
3450 static inline typename
This::Status
3451 movt(unsigned char* view
,
3452 const Sized_relobj_file
<32, big_endian
>* object
,
3453 const Symbol_value
<32>* psymval
,
3454 Arm_address relative_address_base
)
3456 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3457 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3458 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3459 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3460 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3461 val
= This::insert_val_arm_movw_movt(val
, x
);
3462 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3463 // FIXME: IHI0044D says that we should check for overflow.
3464 return This::STATUS_OKAY
;
3467 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3468 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3469 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3470 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3471 static inline typename
This::Status
3472 thm_movw(unsigned char* view
,
3473 const Sized_relobj_file
<32, big_endian
>* object
,
3474 const Symbol_value
<32>* psymval
,
3475 Arm_address relative_address_base
,
3476 Arm_address thumb_bit
,
3477 bool check_overflow
)
3479 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3480 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3481 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3482 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3483 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3484 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3486 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3487 val
= This::insert_val_thumb_movw_movt(val
, x
);
3488 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3489 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3490 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3491 ? This::STATUS_OVERFLOW
3492 : This::STATUS_OKAY
);
3495 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3496 // R_ARM_THM_MOVT_PREL: S + A - P
3497 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3498 static inline typename
This::Status
3499 thm_movt(unsigned char* view
,
3500 const Sized_relobj_file
<32, big_endian
>* object
,
3501 const Symbol_value
<32>* psymval
,
3502 Arm_address relative_address_base
)
3504 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3505 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3506 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3507 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3508 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3509 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3510 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3511 val
= This::insert_val_thumb_movw_movt(val
, x
);
3512 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3513 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3514 return This::STATUS_OKAY
;
3517 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3518 static inline typename
This::Status
3519 thm_alu11(unsigned char* view
,
3520 const Sized_relobj_file
<32, big_endian
>* object
,
3521 const Symbol_value
<32>* psymval
,
3522 Arm_address address
,
3523 Arm_address thumb_bit
)
3525 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3526 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3527 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3528 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3529 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3531 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3532 // -----------------------------------------------------------------------
3533 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3534 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3535 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3536 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3537 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3538 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3540 // Determine a sign for the addend.
3541 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3542 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3543 // Thumb2 addend encoding:
3544 // imm12 := i | imm3 | imm8
3545 int32_t addend
= (insn
& 0xff)
3546 | ((insn
& 0x00007000) >> 4)
3547 | ((insn
& 0x04000000) >> 15);
3548 // Apply a sign to the added.
3551 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3552 - (address
& 0xfffffffc);
3553 Reltype val
= abs(x
);
3554 // Mask out the value and a distinct part of the ADD/SUB opcode
3555 // (bits 7:5 of opword).
3556 insn
= (insn
& 0xfb0f8f00)
3558 | ((val
& 0x700) << 4)
3559 | ((val
& 0x800) << 15);
3560 // Set the opcode according to whether the value to go in the
3561 // place is negative.
3565 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3566 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3567 return ((val
> 0xfff) ?
3568 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3571 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3572 static inline typename
This::Status
3573 thm_pc8(unsigned char* view
,
3574 const Sized_relobj_file
<32, big_endian
>* object
,
3575 const Symbol_value
<32>* psymval
,
3576 Arm_address address
)
3578 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3579 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3580 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3581 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3582 Reltype addend
= ((insn
& 0x00ff) << 2);
3583 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3584 Reltype val
= abs(x
);
3585 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3587 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3588 return ((val
> 0x03fc)
3589 ? This::STATUS_OVERFLOW
3590 : This::STATUS_OKAY
);
3593 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3594 static inline typename
This::Status
3595 thm_pc12(unsigned char* view
,
3596 const Sized_relobj_file
<32, big_endian
>* object
,
3597 const Symbol_value
<32>* psymval
,
3598 Arm_address address
)
3600 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3601 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3602 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3603 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3604 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3605 // Determine a sign for the addend (positive if the U bit is 1).
3606 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3607 int32_t addend
= (insn
& 0xfff);
3608 // Apply a sign to the added.
3611 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3612 Reltype val
= abs(x
);
3613 // Mask out and apply the value and the U bit.
3614 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3615 // Set the U bit according to whether the value to go in the
3616 // place is positive.
3620 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3621 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3622 return ((val
> 0xfff) ?
3623 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3627 static inline typename
This::Status
3628 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3629 unsigned char* view
,
3630 const Arm_relobj
<big_endian
>* object
,
3631 const Arm_address address
,
3632 const bool is_interworking
)
3635 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3636 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3637 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3639 // Ensure that we have a BX instruction.
3640 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3641 const uint32_t reg
= (val
& 0xf);
3642 if (is_interworking
&& reg
!= 0xf)
3644 Stub_table
<big_endian
>* stub_table
=
3645 object
->stub_table(relinfo
->data_shndx
);
3646 gold_assert(stub_table
!= NULL
);
3648 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3649 gold_assert(stub
!= NULL
);
3651 int32_t veneer_address
=
3652 stub_table
->address() + stub
->offset() - 8 - address
;
3653 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3654 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3655 // Replace with a branch to veneer (B <addr>)
3656 val
= (val
& 0xf0000000) | 0x0a000000
3657 | ((veneer_address
>> 2) & 0x00ffffff);
3661 // Preserve Rm (lowest four bits) and the condition code
3662 // (highest four bits). Other bits encode MOV PC,Rm.
3663 val
= (val
& 0xf000000f) | 0x01a0f000;
3665 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3666 return This::STATUS_OKAY
;
3669 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3670 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3671 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3672 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3673 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3674 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3675 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3676 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3677 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3678 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3679 static inline typename
This::Status
3680 arm_grp_alu(unsigned char* view
,
3681 const Sized_relobj_file
<32, big_endian
>* object
,
3682 const Symbol_value
<32>* psymval
,
3684 Arm_address address
,
3685 Arm_address thumb_bit
,
3686 bool check_overflow
)
3688 gold_assert(group
>= 0 && group
< 3);
3689 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3690 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3691 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3693 // ALU group relocations are allowed only for the ADD/SUB instructions.
3694 // (0x00800000 - ADD, 0x00400000 - SUB)
3695 const Valtype opcode
= insn
& 0x01e00000;
3696 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3697 return This::STATUS_BAD_RELOC
;
3699 // Determine a sign for the addend.
3700 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3701 // shifter = rotate_imm * 2
3702 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3703 // Initial addend value.
3704 int32_t addend
= insn
& 0xff;
3705 // Rotate addend right by shifter.
3706 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3707 // Apply a sign to the added.
3710 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3711 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3712 // Check for overflow if required
3714 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3715 return This::STATUS_OVERFLOW
;
3717 // Mask out the value and the ADD/SUB part of the opcode; take care
3718 // not to destroy the S bit.
3720 // Set the opcode according to whether the value to go in the
3721 // place is negative.
3722 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3723 // Encode the offset (encoded Gn).
3726 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3727 return This::STATUS_OKAY
;
3730 // R_ARM_LDR_PC_G0: S + A - P
3731 // R_ARM_LDR_PC_G1: S + A - P
3732 // R_ARM_LDR_PC_G2: S + A - P
3733 // R_ARM_LDR_SB_G0: S + A - B(S)
3734 // R_ARM_LDR_SB_G1: S + A - B(S)
3735 // R_ARM_LDR_SB_G2: S + A - B(S)
3736 static inline typename
This::Status
3737 arm_grp_ldr(unsigned char* view
,
3738 const Sized_relobj_file
<32, big_endian
>* object
,
3739 const Symbol_value
<32>* psymval
,
3741 Arm_address address
)
3743 gold_assert(group
>= 0 && group
< 3);
3744 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3745 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3746 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3748 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3749 int32_t addend
= (insn
& 0xfff) * sign
;
3750 int32_t x
= (psymval
->value(object
, addend
) - address
);
3751 // Calculate the relevant G(n-1) value to obtain this stage residual.
3753 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3754 if (residual
>= 0x1000)
3755 return This::STATUS_OVERFLOW
;
3757 // Mask out the value and U bit.
3759 // Set the U bit for non-negative values.
3764 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3765 return This::STATUS_OKAY
;
3768 // R_ARM_LDRS_PC_G0: S + A - P
3769 // R_ARM_LDRS_PC_G1: S + A - P
3770 // R_ARM_LDRS_PC_G2: S + A - P
3771 // R_ARM_LDRS_SB_G0: S + A - B(S)
3772 // R_ARM_LDRS_SB_G1: S + A - B(S)
3773 // R_ARM_LDRS_SB_G2: S + A - B(S)
3774 static inline typename
This::Status
3775 arm_grp_ldrs(unsigned char* view
,
3776 const Sized_relobj_file
<32, big_endian
>* object
,
3777 const Symbol_value
<32>* psymval
,
3779 Arm_address address
)
3781 gold_assert(group
>= 0 && group
< 3);
3782 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3783 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3784 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3786 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3787 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3788 int32_t x
= (psymval
->value(object
, addend
) - address
);
3789 // Calculate the relevant G(n-1) value to obtain this stage residual.
3791 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3792 if (residual
>= 0x100)
3793 return This::STATUS_OVERFLOW
;
3795 // Mask out the value and U bit.
3797 // Set the U bit for non-negative values.
3800 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3802 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3803 return This::STATUS_OKAY
;
3806 // R_ARM_LDC_PC_G0: S + A - P
3807 // R_ARM_LDC_PC_G1: S + A - P
3808 // R_ARM_LDC_PC_G2: S + A - P
3809 // R_ARM_LDC_SB_G0: S + A - B(S)
3810 // R_ARM_LDC_SB_G1: S + A - B(S)
3811 // R_ARM_LDC_SB_G2: S + A - B(S)
3812 static inline typename
This::Status
3813 arm_grp_ldc(unsigned char* view
,
3814 const Sized_relobj_file
<32, big_endian
>* object
,
3815 const Symbol_value
<32>* psymval
,
3817 Arm_address address
)
3819 gold_assert(group
>= 0 && group
< 3);
3820 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3821 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3822 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3824 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3825 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3826 int32_t x
= (psymval
->value(object
, addend
) - address
);
3827 // Calculate the relevant G(n-1) value to obtain this stage residual.
3829 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3830 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3831 return This::STATUS_OVERFLOW
;
3833 // Mask out the value and U bit.
3835 // Set the U bit for non-negative values.
3838 insn
|= (residual
>> 2);
3840 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3841 return This::STATUS_OKAY
;
3845 // Relocate ARM long branches. This handles relocation types
3846 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3847 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3848 // undefined and we do not use PLT in this relocation. In such a case,
3849 // the branch is converted into an NOP.
3851 template<bool big_endian
>
3852 typename Arm_relocate_functions
<big_endian
>::Status
3853 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3854 unsigned int r_type
,
3855 const Relocate_info
<32, big_endian
>* relinfo
,
3856 unsigned char* view
,
3857 const Sized_symbol
<32>* gsym
,
3858 const Arm_relobj
<big_endian
>* object
,
3860 const Symbol_value
<32>* psymval
,
3861 Arm_address address
,
3862 Arm_address thumb_bit
,
3863 bool is_weakly_undefined_without_plt
)
3865 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3866 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3867 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3869 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3870 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3871 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3872 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3873 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3874 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3875 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3877 // Check that the instruction is valid.
3878 if (r_type
== elfcpp::R_ARM_CALL
)
3880 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3881 return This::STATUS_BAD_RELOC
;
3883 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3885 if (!insn_is_b
&& !insn_is_cond_bl
)
3886 return This::STATUS_BAD_RELOC
;
3888 else if (r_type
== elfcpp::R_ARM_PLT32
)
3890 if (!insn_is_any_branch
)
3891 return This::STATUS_BAD_RELOC
;
3893 else if (r_type
== elfcpp::R_ARM_XPC25
)
3895 // FIXME: AAELF document IH0044C does not say much about it other
3896 // than it being obsolete.
3897 if (!insn_is_any_branch
)
3898 return This::STATUS_BAD_RELOC
;
3903 // A branch to an undefined weak symbol is turned into a jump to
3904 // the next instruction unless a PLT entry will be created.
3905 // Do the same for local undefined symbols.
3906 // The jump to the next instruction is optimized as a NOP depending
3907 // on the architecture.
3908 const Target_arm
<big_endian
>* arm_target
=
3909 Target_arm
<big_endian
>::default_target();
3910 if (is_weakly_undefined_without_plt
)
3912 gold_assert(!parameters
->options().relocatable());
3913 Valtype cond
= val
& 0xf0000000U
;
3914 if (arm_target
->may_use_arm_nop())
3915 val
= cond
| 0x0320f000;
3917 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3918 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3919 return This::STATUS_OKAY
;
3922 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
3923 Valtype branch_target
= psymval
->value(object
, addend
);
3924 int32_t branch_offset
= branch_target
- address
;
3926 // We need a stub if the branch offset is too large or if we need
3928 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
3929 Reloc_stub
* stub
= NULL
;
3931 if (!parameters
->options().relocatable()
3932 && (Bits
<26>::has_overflow32(branch_offset
)
3933 || ((thumb_bit
!= 0)
3934 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3936 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3938 Stub_type stub_type
=
3939 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3940 unadjusted_branch_target
,
3942 if (stub_type
!= arm_stub_none
)
3944 Stub_table
<big_endian
>* stub_table
=
3945 object
->stub_table(relinfo
->data_shndx
);
3946 gold_assert(stub_table
!= NULL
);
3948 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3949 stub
= stub_table
->find_reloc_stub(stub_key
);
3950 gold_assert(stub
!= NULL
);
3951 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3952 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3953 branch_offset
= branch_target
- address
;
3954 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
3958 // At this point, if we still need to switch mode, the instruction
3959 // must either be a BLX or a BL that can be converted to a BLX.
3963 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3964 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3967 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
3968 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3969 return (Bits
<26>::has_overflow32(branch_offset
)
3970 ? This::STATUS_OVERFLOW
3971 : This::STATUS_OKAY
);
3974 // Relocate THUMB long branches. This handles relocation types
3975 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3976 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3977 // undefined and we do not use PLT in this relocation. In such a case,
3978 // the branch is converted into an NOP.
3980 template<bool big_endian
>
3981 typename Arm_relocate_functions
<big_endian
>::Status
3982 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3983 unsigned int r_type
,
3984 const Relocate_info
<32, big_endian
>* relinfo
,
3985 unsigned char* view
,
3986 const Sized_symbol
<32>* gsym
,
3987 const Arm_relobj
<big_endian
>* object
,
3989 const Symbol_value
<32>* psymval
,
3990 Arm_address address
,
3991 Arm_address thumb_bit
,
3992 bool is_weakly_undefined_without_plt
)
3994 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3995 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3996 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3997 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3999 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4001 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4002 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4004 // Check that the instruction is valid.
4005 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4007 if (!is_bl_insn
&& !is_blx_insn
)
4008 return This::STATUS_BAD_RELOC
;
4010 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4012 // This cannot be a BLX.
4014 return This::STATUS_BAD_RELOC
;
4016 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4018 // Check for Thumb to Thumb call.
4020 return This::STATUS_BAD_RELOC
;
4023 gold_warning(_("%s: Thumb BLX instruction targets "
4024 "thumb function '%s'."),
4025 object
->name().c_str(),
4026 (gsym
? gsym
->name() : "(local)"));
4027 // Convert BLX to BL.
4028 lower_insn
|= 0x1000U
;
4034 // A branch to an undefined weak symbol is turned into a jump to
4035 // the next instruction unless a PLT entry will be created.
4036 // The jump to the next instruction is optimized as a NOP.W for
4037 // Thumb-2 enabled architectures.
4038 const Target_arm
<big_endian
>* arm_target
=
4039 Target_arm
<big_endian
>::default_target();
4040 if (is_weakly_undefined_without_plt
)
4042 gold_assert(!parameters
->options().relocatable());
4043 if (arm_target
->may_use_thumb2_nop())
4045 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4046 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4050 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4051 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4053 return This::STATUS_OKAY
;
4056 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4057 Arm_address branch_target
= psymval
->value(object
, addend
);
4059 // For BLX, bit 1 of target address comes from bit 1 of base address.
4060 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4061 if (thumb_bit
== 0 && may_use_blx
)
4062 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4064 int32_t branch_offset
= branch_target
- address
;
4066 // We need a stub if the branch offset is too large or if we need
4068 bool thumb2
= arm_target
->using_thumb2();
4069 if (!parameters
->options().relocatable()
4070 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4071 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4072 || ((thumb_bit
== 0)
4073 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4074 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4076 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4078 Stub_type stub_type
=
4079 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4080 unadjusted_branch_target
,
4083 if (stub_type
!= arm_stub_none
)
4085 Stub_table
<big_endian
>* stub_table
=
4086 object
->stub_table(relinfo
->data_shndx
);
4087 gold_assert(stub_table
!= NULL
);
4089 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4090 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4091 gold_assert(stub
!= NULL
);
4092 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4093 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4094 if (thumb_bit
== 0 && may_use_blx
)
4095 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4096 branch_offset
= branch_target
- address
;
4100 // At this point, if we still need to switch mode, the instruction
4101 // must either be a BLX or a BL that can be converted to a BLX.
4104 gold_assert(may_use_blx
4105 && (r_type
== elfcpp::R_ARM_THM_CALL
4106 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4107 // Make sure this is a BLX.
4108 lower_insn
&= ~0x1000U
;
4112 // Make sure this is a BL.
4113 lower_insn
|= 0x1000U
;
4116 // For a BLX instruction, make sure that the relocation is rounded up
4117 // to a word boundary. This follows the semantics of the instruction
4118 // which specifies that bit 1 of the target address will come from bit
4119 // 1 of the base address.
4120 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4121 gold_assert((branch_offset
& 3) == 0);
4123 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4124 // We use the Thumb-2 encoding, which is safe even if dealing with
4125 // a Thumb-1 instruction by virtue of our overflow check above. */
4126 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4127 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4129 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4130 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4132 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4135 ? Bits
<25>::has_overflow32(branch_offset
)
4136 : Bits
<23>::has_overflow32(branch_offset
))
4137 ? This::STATUS_OVERFLOW
4138 : This::STATUS_OKAY
);
4141 // Relocate THUMB-2 long conditional branches.
4142 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4143 // undefined and we do not use PLT in this relocation. In such a case,
4144 // the branch is converted into an NOP.
4146 template<bool big_endian
>
4147 typename Arm_relocate_functions
<big_endian
>::Status
4148 Arm_relocate_functions
<big_endian
>::thm_jump19(
4149 unsigned char* view
,
4150 const Arm_relobj
<big_endian
>* object
,
4151 const Symbol_value
<32>* psymval
,
4152 Arm_address address
,
4153 Arm_address thumb_bit
)
4155 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4156 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4157 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4158 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4159 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4161 Arm_address branch_target
= psymval
->value(object
, addend
);
4162 int32_t branch_offset
= branch_target
- address
;
4164 // ??? Should handle interworking? GCC might someday try to
4165 // use this for tail calls.
4166 // FIXME: We do support thumb entry to PLT yet.
4169 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4170 return This::STATUS_BAD_RELOC
;
4173 // Put RELOCATION back into the insn.
4174 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4175 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4177 // Put the relocated value back in the object file:
4178 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4179 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4181 return (Bits
<21>::has_overflow32(branch_offset
)
4182 ? This::STATUS_OVERFLOW
4183 : This::STATUS_OKAY
);
4186 // Get the GOT section, creating it if necessary.
4188 template<bool big_endian
>
4189 Arm_output_data_got
<big_endian
>*
4190 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4192 if (this->got_
== NULL
)
4194 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4196 // When using -z now, we can treat .got as a relro section.
4197 // Without -z now, it is modified after program startup by lazy
4199 bool is_got_relro
= parameters
->options().now();
4200 Output_section_order got_order
= (is_got_relro
4204 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4205 // .got.plt sections in output. The output .got section contains both
4206 // PLT and non-PLT GOT entries.
4207 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4209 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4210 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4211 this->got_
, got_order
, is_got_relro
);
4213 // The old GNU linker creates a .got.plt section. We just
4214 // create another set of data in the .got section. Note that we
4215 // always create a PLT if we create a GOT, although the PLT
4217 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4218 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4219 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4220 this->got_plt_
, got_order
, is_got_relro
);
4222 // The first three entries are reserved.
4223 this->got_plt_
->set_current_data_size(3 * 4);
4225 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4226 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4227 Symbol_table::PREDEFINED
,
4229 0, 0, elfcpp::STT_OBJECT
,
4231 elfcpp::STV_HIDDEN
, 0,
4237 // Get the dynamic reloc section, creating it if necessary.
4239 template<bool big_endian
>
4240 typename Target_arm
<big_endian
>::Reloc_section
*
4241 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4243 if (this->rel_dyn_
== NULL
)
4245 gold_assert(layout
!= NULL
);
4246 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4247 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4248 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4249 ORDER_DYNAMIC_RELOCS
, false);
4251 return this->rel_dyn_
;
4254 // Insn_template methods.
4256 // Return byte size of an instruction template.
4259 Insn_template::size() const
4261 switch (this->type())
4264 case THUMB16_SPECIAL_TYPE
:
4275 // Return alignment of an instruction template.
4278 Insn_template::alignment() const
4280 switch (this->type())
4283 case THUMB16_SPECIAL_TYPE
:
4294 // Stub_template methods.
4296 Stub_template::Stub_template(
4297 Stub_type type
, const Insn_template
* insns
,
4299 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4300 entry_in_thumb_mode_(false), relocs_()
4304 // Compute byte size and alignment of stub template.
4305 for (size_t i
= 0; i
< insn_count
; i
++)
4307 unsigned insn_alignment
= insns
[i
].alignment();
4308 size_t insn_size
= insns
[i
].size();
4309 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4310 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4311 switch (insns
[i
].type())
4313 case Insn_template::THUMB16_TYPE
:
4314 case Insn_template::THUMB16_SPECIAL_TYPE
:
4316 this->entry_in_thumb_mode_
= true;
4319 case Insn_template::THUMB32_TYPE
:
4320 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4321 this->relocs_
.push_back(Reloc(i
, offset
));
4323 this->entry_in_thumb_mode_
= true;
4326 case Insn_template::ARM_TYPE
:
4327 // Handle cases where the target is encoded within the
4329 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4330 this->relocs_
.push_back(Reloc(i
, offset
));
4333 case Insn_template::DATA_TYPE
:
4334 // Entry point cannot be data.
4335 gold_assert(i
!= 0);
4336 this->relocs_
.push_back(Reloc(i
, offset
));
4342 offset
+= insn_size
;
4344 this->size_
= offset
;
4349 // Template to implement do_write for a specific target endianness.
4351 template<bool big_endian
>
4353 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4355 const Stub_template
* stub_template
= this->stub_template();
4356 const Insn_template
* insns
= stub_template
->insns();
4358 // FIXME: We do not handle BE8 encoding yet.
4359 unsigned char* pov
= view
;
4360 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4362 switch (insns
[i
].type())
4364 case Insn_template::THUMB16_TYPE
:
4365 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4367 case Insn_template::THUMB16_SPECIAL_TYPE
:
4368 elfcpp::Swap
<16, big_endian
>::writeval(
4370 this->thumb16_special(i
));
4372 case Insn_template::THUMB32_TYPE
:
4374 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4375 uint32_t lo
= insns
[i
].data() & 0xffff;
4376 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4377 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4380 case Insn_template::ARM_TYPE
:
4381 case Insn_template::DATA_TYPE
:
4382 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4387 pov
+= insns
[i
].size();
4389 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4392 // Reloc_stub::Key methods.
4394 // Dump a Key as a string for debugging.
4397 Reloc_stub::Key::name() const
4399 if (this->r_sym_
== invalid_index
)
4401 // Global symbol key name
4402 // <stub-type>:<symbol name>:<addend>.
4403 const std::string sym_name
= this->u_
.symbol
->name();
4404 // We need to print two hex number and two colons. So just add 100 bytes
4405 // to the symbol name size.
4406 size_t len
= sym_name
.size() + 100;
4407 char* buffer
= new char[len
];
4408 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4409 sym_name
.c_str(), this->addend_
);
4410 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4412 return std::string(buffer
);
4416 // local symbol key name
4417 // <stub-type>:<object>:<r_sym>:<addend>.
4418 const size_t len
= 200;
4420 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4421 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4422 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4423 return std::string(buffer
);
4427 // Reloc_stub methods.
4429 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4430 // LOCATION to DESTINATION.
4431 // This code is based on the arm_type_of_stub function in
4432 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4436 Reloc_stub::stub_type_for_reloc(
4437 unsigned int r_type
,
4438 Arm_address location
,
4439 Arm_address destination
,
4440 bool target_is_thumb
)
4442 Stub_type stub_type
= arm_stub_none
;
4444 // This is a bit ugly but we want to avoid using a templated class for
4445 // big and little endianities.
4447 bool should_force_pic_veneer
;
4450 if (parameters
->target().is_big_endian())
4452 const Target_arm
<true>* big_endian_target
=
4453 Target_arm
<true>::default_target();
4454 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4455 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4456 thumb2
= big_endian_target
->using_thumb2();
4457 thumb_only
= big_endian_target
->using_thumb_only();
4461 const Target_arm
<false>* little_endian_target
=
4462 Target_arm
<false>::default_target();
4463 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4464 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4465 thumb2
= little_endian_target
->using_thumb2();
4466 thumb_only
= little_endian_target
->using_thumb_only();
4469 int64_t branch_offset
;
4470 bool output_is_position_independent
=
4471 parameters
->options().output_is_position_independent();
4472 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4474 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4475 // base address (instruction address + 4).
4476 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4477 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4478 branch_offset
= static_cast<int64_t>(destination
) - location
;
4480 // Handle cases where:
4481 // - this call goes too far (different Thumb/Thumb2 max
4483 // - it's a Thumb->Arm call and blx is not available, or it's a
4484 // Thumb->Arm branch (not bl). A stub is needed in this case.
4486 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4487 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4489 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4490 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4491 || ((!target_is_thumb
)
4492 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4493 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4495 if (target_is_thumb
)
4500 stub_type
= (output_is_position_independent
4501 || should_force_pic_veneer
)
4504 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4505 // V5T and above. Stub starts with ARM code, so
4506 // we must be able to switch mode before
4507 // reaching it, which is only possible for 'bl'
4508 // (ie R_ARM_THM_CALL relocation).
4509 ? arm_stub_long_branch_any_thumb_pic
4510 // On V4T, use Thumb code only.
4511 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4515 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4516 ? arm_stub_long_branch_any_any
// V5T and above.
4517 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4521 stub_type
= (output_is_position_independent
4522 || should_force_pic_veneer
)
4523 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4524 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4531 // FIXME: We should check that the input section is from an
4532 // object that has interwork enabled.
4534 stub_type
= (output_is_position_independent
4535 || should_force_pic_veneer
)
4538 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4539 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4540 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4544 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4545 ? arm_stub_long_branch_any_any
// V5T and above.
4546 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4548 // Handle v4t short branches.
4549 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4550 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4551 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4552 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4556 else if (r_type
== elfcpp::R_ARM_CALL
4557 || r_type
== elfcpp::R_ARM_JUMP24
4558 || r_type
== elfcpp::R_ARM_PLT32
)
4560 branch_offset
= static_cast<int64_t>(destination
) - location
;
4561 if (target_is_thumb
)
4565 // FIXME: We should check that the input section is from an
4566 // object that has interwork enabled.
4568 // We have an extra 2-bytes reach because of
4569 // the mode change (bit 24 (H) of BLX encoding).
4570 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4571 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4572 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4573 || (r_type
== elfcpp::R_ARM_JUMP24
)
4574 || (r_type
== elfcpp::R_ARM_PLT32
))
4576 stub_type
= (output_is_position_independent
4577 || should_force_pic_veneer
)
4580 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4581 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4585 ? arm_stub_long_branch_any_any
// V5T and above.
4586 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4592 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4593 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4595 stub_type
= (output_is_position_independent
4596 || should_force_pic_veneer
)
4597 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4598 : arm_stub_long_branch_any_any
; /// non-PIC.
4606 // Cortex_a8_stub methods.
4608 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4609 // I is the position of the instruction template in the stub template.
4612 Cortex_a8_stub::do_thumb16_special(size_t i
)
4614 // The only use of this is to copy condition code from a conditional
4615 // branch being worked around to the corresponding conditional branch in
4617 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4619 uint16_t data
= this->stub_template()->insns()[i
].data();
4620 gold_assert((data
& 0xff00U
) == 0xd000U
);
4621 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4625 // Stub_factory methods.
4627 Stub_factory::Stub_factory()
4629 // The instruction template sequences are declared as static
4630 // objects and initialized first time the constructor runs.
4632 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4633 // to reach the stub if necessary.
4634 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4636 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4637 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4638 // dcd R_ARM_ABS32(X)
4641 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4643 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4645 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4646 Insn_template::arm_insn(0xe12fff1c), // bx ip
4647 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4648 // dcd R_ARM_ABS32(X)
4651 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4652 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4654 Insn_template::thumb16_insn(0xb401), // push {r0}
4655 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4656 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4657 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4658 Insn_template::thumb16_insn(0x4760), // bx ip
4659 Insn_template::thumb16_insn(0xbf00), // nop
4660 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4661 // dcd R_ARM_ABS32(X)
4664 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4666 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4668 Insn_template::thumb16_insn(0x4778), // bx pc
4669 Insn_template::thumb16_insn(0x46c0), // nop
4670 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4671 Insn_template::arm_insn(0xe12fff1c), // bx ip
4672 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4673 // dcd R_ARM_ABS32(X)
4676 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4678 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4680 Insn_template::thumb16_insn(0x4778), // bx pc
4681 Insn_template::thumb16_insn(0x46c0), // nop
4682 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4683 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4684 // dcd R_ARM_ABS32(X)
4687 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4688 // one, when the destination is close enough.
4689 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4691 Insn_template::thumb16_insn(0x4778), // bx pc
4692 Insn_template::thumb16_insn(0x46c0), // nop
4693 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4696 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4697 // blx to reach the stub if necessary.
4698 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4700 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4701 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4702 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4703 // dcd R_ARM_REL32(X-4)
4706 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4707 // blx to reach the stub if necessary. We can not add into pc;
4708 // it is not guaranteed to mode switch (different in ARMv6 and
4710 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4712 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4713 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4714 Insn_template::arm_insn(0xe12fff1c), // bx ip
4715 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4716 // dcd R_ARM_REL32(X)
4719 // V4T ARM -> ARM long branch stub, PIC.
4720 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4722 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4723 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4724 Insn_template::arm_insn(0xe12fff1c), // bx ip
4725 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4726 // dcd R_ARM_REL32(X)
4729 // V4T Thumb -> ARM long branch stub, PIC.
4730 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4732 Insn_template::thumb16_insn(0x4778), // bx pc
4733 Insn_template::thumb16_insn(0x46c0), // nop
4734 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4735 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4736 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4737 // dcd R_ARM_REL32(X)
4740 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4742 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4744 Insn_template::thumb16_insn(0xb401), // push {r0}
4745 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4746 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4747 Insn_template::thumb16_insn(0x4484), // add ip, r0
4748 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4749 Insn_template::thumb16_insn(0x4760), // bx ip
4750 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4751 // dcd R_ARM_REL32(X)
4754 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4756 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4758 Insn_template::thumb16_insn(0x4778), // bx pc
4759 Insn_template::thumb16_insn(0x46c0), // nop
4760 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4761 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4762 Insn_template::arm_insn(0xe12fff1c), // bx ip
4763 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4764 // dcd R_ARM_REL32(X)
4767 // Cortex-A8 erratum-workaround stubs.
4769 // Stub used for conditional branches (which may be beyond +/-1MB away,
4770 // so we can't use a conditional branch to reach this stub).
4777 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4779 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4780 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4781 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4785 // Stub used for b.w and bl.w instructions.
4787 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4789 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4792 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4794 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4797 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4798 // instruction (which switches to ARM mode) to point to this stub. Jump to
4799 // the real destination using an ARM-mode branch.
4800 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4802 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4805 // Stub used to provide an interworking for R_ARM_V4BX relocation
4806 // (bx r[n] instruction).
4807 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4809 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4810 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4811 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4814 // Fill in the stub template look-up table. Stub templates are constructed
4815 // per instance of Stub_factory for fast look-up without locking
4816 // in a thread-enabled environment.
4818 this->stub_templates_
[arm_stub_none
] =
4819 new Stub_template(arm_stub_none
, NULL
, 0);
4821 #define DEF_STUB(x) \
4825 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4826 Stub_type type = arm_stub_##x; \
4827 this->stub_templates_[type] = \
4828 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4836 // Stub_table methods.
4838 // Remove all Cortex-A8 stub.
4840 template<bool big_endian
>
4842 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4844 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4845 p
!= this->cortex_a8_stubs_
.end();
4848 this->cortex_a8_stubs_
.clear();
4851 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4853 template<bool big_endian
>
4855 Stub_table
<big_endian
>::relocate_stub(
4857 const Relocate_info
<32, big_endian
>* relinfo
,
4858 Target_arm
<big_endian
>* arm_target
,
4859 Output_section
* output_section
,
4860 unsigned char* view
,
4861 Arm_address address
,
4862 section_size_type view_size
)
4864 const Stub_template
* stub_template
= stub
->stub_template();
4865 if (stub_template
->reloc_count() != 0)
4867 // Adjust view to cover the stub only.
4868 section_size_type offset
= stub
->offset();
4869 section_size_type stub_size
= stub_template
->size();
4870 gold_assert(offset
+ stub_size
<= view_size
);
4872 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4873 address
+ offset
, stub_size
);
4877 // Relocate all stubs in this stub table.
4879 template<bool big_endian
>
4881 Stub_table
<big_endian
>::relocate_stubs(
4882 const Relocate_info
<32, big_endian
>* relinfo
,
4883 Target_arm
<big_endian
>* arm_target
,
4884 Output_section
* output_section
,
4885 unsigned char* view
,
4886 Arm_address address
,
4887 section_size_type view_size
)
4889 // If we are passed a view bigger than the stub table's. we need to
4891 gold_assert(address
== this->address()
4893 == static_cast<section_size_type
>(this->data_size())));
4895 // Relocate all relocation stubs.
4896 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4897 p
!= this->reloc_stubs_
.end();
4899 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4900 address
, view_size
);
4902 // Relocate all Cortex-A8 stubs.
4903 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4904 p
!= this->cortex_a8_stubs_
.end();
4906 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4907 address
, view_size
);
4909 // Relocate all ARM V4BX stubs.
4910 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4911 p
!= this->arm_v4bx_stubs_
.end();
4915 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4916 address
, view_size
);
4920 // Write out the stubs to file.
4922 template<bool big_endian
>
4924 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4926 off_t offset
= this->offset();
4927 const section_size_type oview_size
=
4928 convert_to_section_size_type(this->data_size());
4929 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4931 // Write relocation stubs.
4932 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4933 p
!= this->reloc_stubs_
.end();
4936 Reloc_stub
* stub
= p
->second
;
4937 Arm_address address
= this->address() + stub
->offset();
4939 == align_address(address
,
4940 stub
->stub_template()->alignment()));
4941 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4945 // Write Cortex-A8 stubs.
4946 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4947 p
!= this->cortex_a8_stubs_
.end();
4950 Cortex_a8_stub
* stub
= p
->second
;
4951 Arm_address address
= this->address() + stub
->offset();
4953 == align_address(address
,
4954 stub
->stub_template()->alignment()));
4955 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4959 // Write ARM V4BX relocation stubs.
4960 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4961 p
!= this->arm_v4bx_stubs_
.end();
4967 Arm_address address
= this->address() + (*p
)->offset();
4969 == align_address(address
,
4970 (*p
)->stub_template()->alignment()));
4971 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4975 of
->write_output_view(this->offset(), oview_size
, oview
);
4978 // Update the data size and address alignment of the stub table at the end
4979 // of a relaxation pass. Return true if either the data size or the
4980 // alignment changed in this relaxation pass.
4982 template<bool big_endian
>
4984 Stub_table
<big_endian
>::update_data_size_and_addralign()
4986 // Go over all stubs in table to compute data size and address alignment.
4987 off_t size
= this->reloc_stubs_size_
;
4988 unsigned addralign
= this->reloc_stubs_addralign_
;
4990 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4991 p
!= this->cortex_a8_stubs_
.end();
4994 const Stub_template
* stub_template
= p
->second
->stub_template();
4995 addralign
= std::max(addralign
, stub_template
->alignment());
4996 size
= (align_address(size
, stub_template
->alignment())
4997 + stub_template
->size());
5000 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5001 p
!= this->arm_v4bx_stubs_
.end();
5007 const Stub_template
* stub_template
= (*p
)->stub_template();
5008 addralign
= std::max(addralign
, stub_template
->alignment());
5009 size
= (align_address(size
, stub_template
->alignment())
5010 + stub_template
->size());
5013 // Check if either data size or alignment changed in this pass.
5014 // Update prev_data_size_ and prev_addralign_. These will be used
5015 // as the current data size and address alignment for the next pass.
5016 bool changed
= size
!= this->prev_data_size_
;
5017 this->prev_data_size_
= size
;
5019 if (addralign
!= this->prev_addralign_
)
5021 this->prev_addralign_
= addralign
;
5026 // Finalize the stubs. This sets the offsets of the stubs within the stub
5027 // table. It also marks all input sections needing Cortex-A8 workaround.
5029 template<bool big_endian
>
5031 Stub_table
<big_endian
>::finalize_stubs()
5033 off_t off
= this->reloc_stubs_size_
;
5034 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5035 p
!= this->cortex_a8_stubs_
.end();
5038 Cortex_a8_stub
* stub
= p
->second
;
5039 const Stub_template
* stub_template
= stub
->stub_template();
5040 uint64_t stub_addralign
= stub_template
->alignment();
5041 off
= align_address(off
, stub_addralign
);
5042 stub
->set_offset(off
);
5043 off
+= stub_template
->size();
5045 // Mark input section so that we can determine later if a code section
5046 // needs the Cortex-A8 workaround quickly.
5047 Arm_relobj
<big_endian
>* arm_relobj
=
5048 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5049 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5052 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5053 p
!= this->arm_v4bx_stubs_
.end();
5059 const Stub_template
* stub_template
= (*p
)->stub_template();
5060 uint64_t stub_addralign
= stub_template
->alignment();
5061 off
= align_address(off
, stub_addralign
);
5062 (*p
)->set_offset(off
);
5063 off
+= stub_template
->size();
5066 gold_assert(off
<= this->prev_data_size_
);
5069 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5070 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5071 // of the address range seen by the linker.
5073 template<bool big_endian
>
5075 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5076 Target_arm
<big_endian
>* arm_target
,
5077 unsigned char* view
,
5078 Arm_address view_address
,
5079 section_size_type view_size
)
5081 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5082 for (Cortex_a8_stub_list::const_iterator p
=
5083 this->cortex_a8_stubs_
.lower_bound(view_address
);
5084 ((p
!= this->cortex_a8_stubs_
.end())
5085 && (p
->first
< (view_address
+ view_size
)));
5088 // We do not store the THUMB bit in the LSB of either the branch address
5089 // or the stub offset. There is no need to strip the LSB.
5090 Arm_address branch_address
= p
->first
;
5091 const Cortex_a8_stub
* stub
= p
->second
;
5092 Arm_address stub_address
= this->address() + stub
->offset();
5094 // Offset of the branch instruction relative to this view.
5095 section_size_type offset
=
5096 convert_to_section_size_type(branch_address
- view_address
);
5097 gold_assert((offset
+ 4) <= view_size
);
5099 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5100 view
+ offset
, branch_address
);
5104 // Arm_input_section methods.
5106 // Initialize an Arm_input_section.
5108 template<bool big_endian
>
5110 Arm_input_section
<big_endian
>::init()
5112 Relobj
* relobj
= this->relobj();
5113 unsigned int shndx
= this->shndx();
5115 // We have to cache original size, alignment and contents to avoid locking
5116 // the original file.
5117 this->original_addralign_
=
5118 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5120 // This is not efficient but we expect only a small number of relaxed
5121 // input sections for stubs.
5122 section_size_type section_size
;
5123 const unsigned char* section_contents
=
5124 relobj
->section_contents(shndx
, §ion_size
, false);
5125 this->original_size_
=
5126 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5128 gold_assert(this->original_contents_
== NULL
);
5129 this->original_contents_
= new unsigned char[section_size
];
5130 memcpy(this->original_contents_
, section_contents
, section_size
);
5132 // We want to make this look like the original input section after
5133 // output sections are finalized.
5134 Output_section
* os
= relobj
->output_section(shndx
);
5135 off_t offset
= relobj
->output_section_offset(shndx
);
5136 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5137 this->set_address(os
->address() + offset
);
5138 this->set_file_offset(os
->offset() + offset
);
5140 this->set_current_data_size(this->original_size_
);
5141 this->finalize_data_size();
5144 template<bool big_endian
>
5146 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5148 // We have to write out the original section content.
5149 gold_assert(this->original_contents_
!= NULL
);
5150 of
->write(this->offset(), this->original_contents_
,
5151 this->original_size_
);
5153 // If this owns a stub table and it is not empty, write it.
5154 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5155 this->stub_table_
->write(of
);
5158 // Finalize data size.
5160 template<bool big_endian
>
5162 Arm_input_section
<big_endian
>::set_final_data_size()
5164 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5166 if (this->is_stub_table_owner())
5168 this->stub_table_
->finalize_data_size();
5169 off
= align_address(off
, this->stub_table_
->addralign());
5170 off
+= this->stub_table_
->data_size();
5172 this->set_data_size(off
);
5175 // Reset address and file offset.
5177 template<bool big_endian
>
5179 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5181 // Size of the original input section contents.
5182 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5184 // If this is a stub table owner, account for the stub table size.
5185 if (this->is_stub_table_owner())
5187 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5189 // Reset the stub table's address and file offset. The
5190 // current data size for child will be updated after that.
5191 stub_table_
->reset_address_and_file_offset();
5192 off
= align_address(off
, stub_table_
->addralign());
5193 off
+= stub_table
->current_data_size();
5196 this->set_current_data_size(off
);
5199 // Arm_exidx_cantunwind methods.
5201 // Write this to Output file OF for a fixed endianness.
5203 template<bool big_endian
>
5205 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5207 off_t offset
= this->offset();
5208 const section_size_type oview_size
= 8;
5209 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5211 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5212 gold_assert(os
!= NULL
);
5214 Arm_relobj
<big_endian
>* arm_relobj
=
5215 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5216 Arm_address output_offset
=
5217 arm_relobj
->get_output_section_offset(this->shndx_
);
5218 Arm_address section_start
;
5219 section_size_type section_size
;
5221 // Find out the end of the text section referred by this.
5222 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5224 section_start
= os
->address() + output_offset
;
5225 const Arm_exidx_input_section
* exidx_input_section
=
5226 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5227 gold_assert(exidx_input_section
!= NULL
);
5229 convert_to_section_size_type(exidx_input_section
->text_size());
5233 // Currently this only happens for a relaxed section.
5234 const Output_relaxed_input_section
* poris
=
5235 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5236 gold_assert(poris
!= NULL
);
5237 section_start
= poris
->address();
5238 section_size
= convert_to_section_size_type(poris
->data_size());
5241 // We always append this to the end of an EXIDX section.
5242 Arm_address output_address
= section_start
+ section_size
;
5244 // Write out the entry. The first word either points to the beginning
5245 // or after the end of a text section. The second word is the special
5246 // EXIDX_CANTUNWIND value.
5247 uint32_t prel31_offset
= output_address
- this->address();
5248 if (Bits
<31>::has_overflow32(offset
))
5249 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5250 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5251 prel31_offset
& 0x7fffffffU
);
5252 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5253 elfcpp::EXIDX_CANTUNWIND
);
5255 of
->write_output_view(this->offset(), oview_size
, oview
);
5258 // Arm_exidx_merged_section methods.
5260 // Constructor for Arm_exidx_merged_section.
5261 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5262 // SECTION_OFFSET_MAP points to a section offset map describing how
5263 // parts of the input section are mapped to output. DELETED_BYTES is
5264 // the number of bytes deleted from the EXIDX input section.
5266 Arm_exidx_merged_section::Arm_exidx_merged_section(
5267 const Arm_exidx_input_section
& exidx_input_section
,
5268 const Arm_exidx_section_offset_map
& section_offset_map
,
5269 uint32_t deleted_bytes
)
5270 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5271 exidx_input_section
.shndx(),
5272 exidx_input_section
.addralign()),
5273 exidx_input_section_(exidx_input_section
),
5274 section_offset_map_(section_offset_map
)
5276 // If we retain or discard the whole EXIDX input section, we would
5278 gold_assert(deleted_bytes
!= 0
5279 && deleted_bytes
!= this->exidx_input_section_
.size());
5281 // Fix size here so that we do not need to implement set_final_data_size.
5282 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5283 this->set_data_size(size
);
5284 this->fix_data_size();
5286 // Allocate buffer for section contents and build contents.
5287 this->section_contents_
= new unsigned char[size
];
5290 // Build the contents of a merged EXIDX output section.
5293 Arm_exidx_merged_section::build_contents(
5294 const unsigned char* original_contents
,
5295 section_size_type original_size
)
5297 // Go over spans of input offsets and write only those that are not
5299 section_offset_type in_start
= 0;
5300 section_offset_type out_start
= 0;
5301 section_offset_type in_max
=
5302 convert_types
<section_offset_type
>(original_size
);
5303 section_offset_type out_max
=
5304 convert_types
<section_offset_type
>(this->data_size());
5305 for (Arm_exidx_section_offset_map::const_iterator p
=
5306 this->section_offset_map_
.begin();
5307 p
!= this->section_offset_map_
.end();
5310 section_offset_type in_end
= p
->first
;
5311 gold_assert(in_end
>= in_start
);
5312 section_offset_type out_end
= p
->second
;
5313 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5316 size_t out_chunk_size
=
5317 convert_types
<size_t>(out_end
- out_start
+ 1);
5319 gold_assert(out_chunk_size
== in_chunk_size
5320 && in_end
< in_max
&& out_end
< out_max
);
5322 memcpy(this->section_contents_
+ out_start
,
5323 original_contents
+ in_start
,
5325 out_start
+= out_chunk_size
;
5327 in_start
+= in_chunk_size
;
5331 // Given an input OBJECT, an input section index SHNDX within that
5332 // object, and an OFFSET relative to the start of that input
5333 // section, return whether or not the corresponding offset within
5334 // the output section is known. If this function returns true, it
5335 // sets *POUTPUT to the output offset. The value -1 indicates that
5336 // this input offset is being discarded.
5339 Arm_exidx_merged_section::do_output_offset(
5340 const Relobj
* relobj
,
5342 section_offset_type offset
,
5343 section_offset_type
* poutput
) const
5345 // We only handle offsets for the original EXIDX input section.
5346 if (relobj
!= this->exidx_input_section_
.relobj()
5347 || shndx
!= this->exidx_input_section_
.shndx())
5350 section_offset_type section_size
=
5351 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5352 if (offset
< 0 || offset
>= section_size
)
5353 // Input offset is out of valid range.
5357 // We need to look up the section offset map to determine the output
5358 // offset. Find the reference point in map that is first offset
5359 // bigger than or equal to this offset.
5360 Arm_exidx_section_offset_map::const_iterator p
=
5361 this->section_offset_map_
.lower_bound(offset
);
5363 // The section offset maps are build such that this should not happen if
5364 // input offset is in the valid range.
5365 gold_assert(p
!= this->section_offset_map_
.end());
5367 // We need to check if this is dropped.
5368 section_offset_type ref
= p
->first
;
5369 section_offset_type mapped_ref
= p
->second
;
5371 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5372 // Offset is present in output.
5373 *poutput
= mapped_ref
+ (offset
- ref
);
5375 // Offset is discarded owing to EXIDX entry merging.
5382 // Write this to output file OF.
5385 Arm_exidx_merged_section::do_write(Output_file
* of
)
5387 off_t offset
= this->offset();
5388 const section_size_type oview_size
= this->data_size();
5389 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5391 Output_section
* os
= this->relobj()->output_section(this->shndx());
5392 gold_assert(os
!= NULL
);
5394 memcpy(oview
, this->section_contents_
, oview_size
);
5395 of
->write_output_view(this->offset(), oview_size
, oview
);
5398 // Arm_exidx_fixup methods.
5400 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5401 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5402 // points to the end of the last seen EXIDX section.
5405 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5407 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5408 && this->last_input_section_
!= NULL
)
5410 Relobj
* relobj
= this->last_input_section_
->relobj();
5411 unsigned int text_shndx
= this->last_input_section_
->link();
5412 Arm_exidx_cantunwind
* cantunwind
=
5413 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5414 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5415 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5419 // Process an EXIDX section entry in input. Return whether this entry
5420 // can be deleted in the output. SECOND_WORD in the second word of the
5424 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5427 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5429 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5430 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5431 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5433 else if ((second_word
& 0x80000000) != 0)
5435 // Inlined unwinding data. Merge if equal to previous.
5436 delete_entry
= (merge_exidx_entries_
5437 && this->last_unwind_type_
== UT_INLINED_ENTRY
5438 && this->last_inlined_entry_
== second_word
);
5439 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5440 this->last_inlined_entry_
= second_word
;
5444 // Normal table entry. In theory we could merge these too,
5445 // but duplicate entries are likely to be much less common.
5446 delete_entry
= false;
5447 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5449 return delete_entry
;
5452 // Update the current section offset map during EXIDX section fix-up.
5453 // If there is no map, create one. INPUT_OFFSET is the offset of a
5454 // reference point, DELETED_BYTES is the number of deleted by in the
5455 // section so far. If DELETE_ENTRY is true, the reference point and
5456 // all offsets after the previous reference point are discarded.
5459 Arm_exidx_fixup::update_offset_map(
5460 section_offset_type input_offset
,
5461 section_size_type deleted_bytes
,
5464 if (this->section_offset_map_
== NULL
)
5465 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5466 section_offset_type output_offset
;
5468 output_offset
= Arm_exidx_input_section::invalid_offset
;
5470 output_offset
= input_offset
- deleted_bytes
;
5471 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5474 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5475 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5476 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5477 // If some entries are merged, also store a pointer to a newly created
5478 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5479 // owns the map and is responsible for releasing it after use.
5481 template<bool big_endian
>
5483 Arm_exidx_fixup::process_exidx_section(
5484 const Arm_exidx_input_section
* exidx_input_section
,
5485 const unsigned char* section_contents
,
5486 section_size_type section_size
,
5487 Arm_exidx_section_offset_map
** psection_offset_map
)
5489 Relobj
* relobj
= exidx_input_section
->relobj();
5490 unsigned shndx
= exidx_input_section
->shndx();
5492 if ((section_size
% 8) != 0)
5494 // Something is wrong with this section. Better not touch it.
5495 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5496 relobj
->name().c_str(), shndx
);
5497 this->last_input_section_
= exidx_input_section
;
5498 this->last_unwind_type_
= UT_NONE
;
5502 uint32_t deleted_bytes
= 0;
5503 bool prev_delete_entry
= false;
5504 gold_assert(this->section_offset_map_
== NULL
);
5506 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5508 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5510 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5511 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5513 bool delete_entry
= this->process_exidx_entry(second_word
);
5515 // Entry deletion causes changes in output offsets. We use a std::map
5516 // to record these. And entry (x, y) means input offset x
5517 // is mapped to output offset y. If y is invalid_offset, then x is
5518 // dropped in the output. Because of the way std::map::lower_bound
5519 // works, we record the last offset in a region w.r.t to keeping or
5520 // dropping. If there is no entry (x0, y0) for an input offset x0,
5521 // the output offset y0 of it is determined by the output offset y1 of
5522 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5523 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5525 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5526 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5528 // Update total deleted bytes for this entry.
5532 prev_delete_entry
= delete_entry
;
5535 // If section offset map is not NULL, make an entry for the end of
5537 if (this->section_offset_map_
!= NULL
)
5538 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5540 *psection_offset_map
= this->section_offset_map_
;
5541 this->section_offset_map_
= NULL
;
5542 this->last_input_section_
= exidx_input_section
;
5544 // Set the first output text section so that we can link the EXIDX output
5545 // section to it. Ignore any EXIDX input section that is completely merged.
5546 if (this->first_output_text_section_
== NULL
5547 && deleted_bytes
!= section_size
)
5549 unsigned int link
= exidx_input_section
->link();
5550 Output_section
* os
= relobj
->output_section(link
);
5551 gold_assert(os
!= NULL
);
5552 this->first_output_text_section_
= os
;
5555 return deleted_bytes
;
5558 // Arm_output_section methods.
5560 // Create a stub group for input sections from BEGIN to END. OWNER
5561 // points to the input section to be the owner a new stub table.
5563 template<bool big_endian
>
5565 Arm_output_section
<big_endian
>::create_stub_group(
5566 Input_section_list::const_iterator begin
,
5567 Input_section_list::const_iterator end
,
5568 Input_section_list::const_iterator owner
,
5569 Target_arm
<big_endian
>* target
,
5570 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5573 // We use a different kind of relaxed section in an EXIDX section.
5574 // The static casting from Output_relaxed_input_section to
5575 // Arm_input_section is invalid in an EXIDX section. We are okay
5576 // because we should not be calling this for an EXIDX section.
5577 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5579 // Currently we convert ordinary input sections into relaxed sections only
5580 // at this point but we may want to support creating relaxed input section
5581 // very early. So we check here to see if owner is already a relaxed
5584 Arm_input_section
<big_endian
>* arm_input_section
;
5585 if (owner
->is_relaxed_input_section())
5588 Arm_input_section
<big_endian
>::as_arm_input_section(
5589 owner
->relaxed_input_section());
5593 gold_assert(owner
->is_input_section());
5594 // Create a new relaxed input section. We need to lock the original
5596 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5598 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5599 new_relaxed_sections
->push_back(arm_input_section
);
5602 // Create a stub table.
5603 Stub_table
<big_endian
>* stub_table
=
5604 target
->new_stub_table(arm_input_section
);
5606 arm_input_section
->set_stub_table(stub_table
);
5608 Input_section_list::const_iterator p
= begin
;
5609 Input_section_list::const_iterator prev_p
;
5611 // Look for input sections or relaxed input sections in [begin ... end].
5614 if (p
->is_input_section() || p
->is_relaxed_input_section())
5616 // The stub table information for input sections live
5617 // in their objects.
5618 Arm_relobj
<big_endian
>* arm_relobj
=
5619 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5620 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5624 while (prev_p
!= end
);
5627 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5628 // of stub groups. We grow a stub group by adding input section until the
5629 // size is just below GROUP_SIZE. The last input section will be converted
5630 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5631 // input section after the stub table, effectively double the group size.
5633 // This is similar to the group_sections() function in elf32-arm.c but is
5634 // implemented differently.
5636 template<bool big_endian
>
5638 Arm_output_section
<big_endian
>::group_sections(
5639 section_size_type group_size
,
5640 bool stubs_always_after_branch
,
5641 Target_arm
<big_endian
>* target
,
5644 // We only care about sections containing code.
5645 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5648 // States for grouping.
5651 // No group is being built.
5653 // A group is being built but the stub table is not found yet.
5654 // We keep group a stub group until the size is just under GROUP_SIZE.
5655 // The last input section in the group will be used as the stub table.
5656 FINDING_STUB_SECTION
,
5657 // A group is being built and we have already found a stub table.
5658 // We enter this state to grow a stub group by adding input section
5659 // after the stub table. This effectively doubles the group size.
5663 // Any newly created relaxed sections are stored here.
5664 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5666 State state
= NO_GROUP
;
5667 section_size_type off
= 0;
5668 section_size_type group_begin_offset
= 0;
5669 section_size_type group_end_offset
= 0;
5670 section_size_type stub_table_end_offset
= 0;
5671 Input_section_list::const_iterator group_begin
=
5672 this->input_sections().end();
5673 Input_section_list::const_iterator stub_table
=
5674 this->input_sections().end();
5675 Input_section_list::const_iterator group_end
= this->input_sections().end();
5676 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5677 p
!= this->input_sections().end();
5680 section_size_type section_begin_offset
=
5681 align_address(off
, p
->addralign());
5682 section_size_type section_end_offset
=
5683 section_begin_offset
+ p
->data_size();
5685 // Check to see if we should group the previously seen sections.
5691 case FINDING_STUB_SECTION
:
5692 // Adding this section makes the group larger than GROUP_SIZE.
5693 if (section_end_offset
- group_begin_offset
>= group_size
)
5695 if (stubs_always_after_branch
)
5697 gold_assert(group_end
!= this->input_sections().end());
5698 this->create_stub_group(group_begin
, group_end
, group_end
,
5699 target
, &new_relaxed_sections
,
5705 // But wait, there's more! Input sections up to
5706 // stub_group_size bytes after the stub table can be
5707 // handled by it too.
5708 state
= HAS_STUB_SECTION
;
5709 stub_table
= group_end
;
5710 stub_table_end_offset
= group_end_offset
;
5715 case HAS_STUB_SECTION
:
5716 // Adding this section makes the post stub-section group larger
5718 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5720 gold_assert(group_end
!= this->input_sections().end());
5721 this->create_stub_group(group_begin
, group_end
, stub_table
,
5722 target
, &new_relaxed_sections
, task
);
5731 // If we see an input section and currently there is no group, start
5732 // a new one. Skip any empty sections. We look at the data size
5733 // instead of calling p->relobj()->section_size() to avoid locking.
5734 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5735 && (p
->data_size() != 0))
5737 if (state
== NO_GROUP
)
5739 state
= FINDING_STUB_SECTION
;
5741 group_begin_offset
= section_begin_offset
;
5744 // Keep track of the last input section seen.
5746 group_end_offset
= section_end_offset
;
5749 off
= section_end_offset
;
5752 // Create a stub group for any ungrouped sections.
5753 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5755 gold_assert(group_end
!= this->input_sections().end());
5756 this->create_stub_group(group_begin
, group_end
,
5757 (state
== FINDING_STUB_SECTION
5760 target
, &new_relaxed_sections
, task
);
5763 // Convert input section into relaxed input section in a batch.
5764 if (!new_relaxed_sections
.empty())
5765 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5767 // Update the section offsets
5768 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5770 Arm_relobj
<big_endian
>* arm_relobj
=
5771 Arm_relobj
<big_endian
>::as_arm_relobj(
5772 new_relaxed_sections
[i
]->relobj());
5773 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5774 // Tell Arm_relobj that this input section is converted.
5775 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5779 // Append non empty text sections in this to LIST in ascending
5780 // order of their position in this.
5782 template<bool big_endian
>
5784 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5785 Text_section_list
* list
)
5787 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5789 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5790 p
!= this->input_sections().end();
5793 // We only care about plain or relaxed input sections. We also
5794 // ignore any merged sections.
5795 if (p
->is_input_section() || p
->is_relaxed_input_section())
5796 list
->push_back(Text_section_list::value_type(p
->relobj(),
5801 template<bool big_endian
>
5803 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5805 const Text_section_list
& sorted_text_sections
,
5806 Symbol_table
* symtab
,
5807 bool merge_exidx_entries
,
5810 // We should only do this for the EXIDX output section.
5811 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5813 // We don't want the relaxation loop to undo these changes, so we discard
5814 // the current saved states and take another one after the fix-up.
5815 this->discard_states();
5817 // Remove all input sections.
5818 uint64_t address
= this->address();
5819 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5820 Input_section_list input_sections
;
5821 this->reset_address_and_file_offset();
5822 this->get_input_sections(address
, std::string(""), &input_sections
);
5824 if (!this->input_sections().empty())
5825 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5827 // Go through all the known input sections and record them.
5828 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5829 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5830 Section_id_hash
> Text_to_exidx_map
;
5831 Text_to_exidx_map text_to_exidx_map
;
5832 for (Input_section_list::const_iterator p
= input_sections
.begin();
5833 p
!= input_sections
.end();
5836 // This should never happen. At this point, we should only see
5837 // plain EXIDX input sections.
5838 gold_assert(!p
->is_relaxed_input_section());
5839 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5842 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5844 // Go over the sorted text sections.
5845 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5846 Section_id_set processed_input_sections
;
5847 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5848 p
!= sorted_text_sections
.end();
5851 Relobj
* relobj
= p
->first
;
5852 unsigned int shndx
= p
->second
;
5854 Arm_relobj
<big_endian
>* arm_relobj
=
5855 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5856 const Arm_exidx_input_section
* exidx_input_section
=
5857 arm_relobj
->exidx_input_section_by_link(shndx
);
5859 // If this text section has no EXIDX section or if the EXIDX section
5860 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5861 // of the last seen EXIDX section.
5862 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5864 exidx_fixup
.add_exidx_cantunwind_as_needed();
5868 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5869 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5870 Section_id
sid(exidx_relobj
, exidx_shndx
);
5871 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5872 if (iter
== text_to_exidx_map
.end())
5874 // This is odd. We have not seen this EXIDX input section before.
5875 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5876 // issue a warning instead. We assume the user knows what he
5877 // or she is doing. Otherwise, this is an error.
5878 if (layout
->script_options()->saw_sections_clause())
5879 gold_warning(_("unwinding may not work because EXIDX input section"
5880 " %u of %s is not in EXIDX output section"),
5881 exidx_shndx
, exidx_relobj
->name().c_str());
5883 gold_error(_("unwinding may not work because EXIDX input section"
5884 " %u of %s is not in EXIDX output section"),
5885 exidx_shndx
, exidx_relobj
->name().c_str());
5887 exidx_fixup
.add_exidx_cantunwind_as_needed();
5891 // We need to access the contents of the EXIDX section, lock the
5893 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5894 section_size_type exidx_size
;
5895 const unsigned char* exidx_contents
=
5896 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5898 // Fix up coverage and append input section to output data list.
5899 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5900 uint32_t deleted_bytes
=
5901 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5904 §ion_offset_map
);
5906 if (deleted_bytes
== exidx_input_section
->size())
5908 // The whole EXIDX section got merged. Remove it from output.
5909 gold_assert(section_offset_map
== NULL
);
5910 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5912 // All local symbols defined in this input section will be dropped.
5913 // We need to adjust output local symbol count.
5914 arm_relobj
->set_output_local_symbol_count_needs_update();
5916 else if (deleted_bytes
> 0)
5918 // Some entries are merged. We need to convert this EXIDX input
5919 // section into a relaxed section.
5920 gold_assert(section_offset_map
!= NULL
);
5922 Arm_exidx_merged_section
* merged_section
=
5923 new Arm_exidx_merged_section(*exidx_input_section
,
5924 *section_offset_map
, deleted_bytes
);
5925 merged_section
->build_contents(exidx_contents
, exidx_size
);
5927 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
5928 this->add_relaxed_input_section(layout
, merged_section
, secname
);
5929 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5931 // All local symbols defined in discarded portions of this input
5932 // section will be dropped. We need to adjust output local symbol
5934 arm_relobj
->set_output_local_symbol_count_needs_update();
5938 // Just add back the EXIDX input section.
5939 gold_assert(section_offset_map
== NULL
);
5940 const Output_section::Input_section
* pis
= iter
->second
;
5941 gold_assert(pis
->is_input_section());
5942 this->add_script_input_section(*pis
);
5945 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5948 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5949 exidx_fixup
.add_exidx_cantunwind_as_needed();
5951 // Remove any known EXIDX input sections that are not processed.
5952 for (Input_section_list::const_iterator p
= input_sections
.begin();
5953 p
!= input_sections
.end();
5956 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5957 == processed_input_sections
.end())
5959 // We discard a known EXIDX section because its linked
5960 // text section has been folded by ICF. We also discard an
5961 // EXIDX section with error, the output does not matter in this
5962 // case. We do this to avoid triggering asserts.
5963 Arm_relobj
<big_endian
>* arm_relobj
=
5964 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5965 const Arm_exidx_input_section
* exidx_input_section
=
5966 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5967 gold_assert(exidx_input_section
!= NULL
);
5968 if (!exidx_input_section
->has_errors())
5970 unsigned int text_shndx
= exidx_input_section
->link();
5971 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5974 // Remove this from link. We also need to recount the
5976 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5977 arm_relobj
->set_output_local_symbol_count_needs_update();
5981 // Link exidx output section to the first seen output section and
5982 // set correct entry size.
5983 this->set_link_section(exidx_fixup
.first_output_text_section());
5984 this->set_entsize(8);
5986 // Make changes permanent.
5987 this->save_states();
5988 this->set_section_offsets_need_adjustment();
5991 // Link EXIDX output sections to text output sections.
5993 template<bool big_endian
>
5995 Arm_output_section
<big_endian
>::set_exidx_section_link()
5997 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5998 if (!this->input_sections().empty())
6000 Input_section_list::const_iterator p
= this->input_sections().begin();
6001 Arm_relobj
<big_endian
>* arm_relobj
=
6002 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6003 unsigned exidx_shndx
= p
->shndx();
6004 const Arm_exidx_input_section
* exidx_input_section
=
6005 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6006 gold_assert(exidx_input_section
!= NULL
);
6007 unsigned int text_shndx
= exidx_input_section
->link();
6008 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6009 this->set_link_section(os
);
6013 // Arm_relobj methods.
6015 // Determine if an input section is scannable for stub processing. SHDR is
6016 // the header of the section and SHNDX is the section index. OS is the output
6017 // section for the input section and SYMTAB is the global symbol table used to
6018 // look up ICF information.
6020 template<bool big_endian
>
6022 Arm_relobj
<big_endian
>::section_is_scannable(
6023 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6025 const Output_section
* os
,
6026 const Symbol_table
* symtab
)
6028 // Skip any empty sections, unallocated sections or sections whose
6029 // type are not SHT_PROGBITS.
6030 if (shdr
.get_sh_size() == 0
6031 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6032 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6035 // Skip any discarded or ICF'ed sections.
6036 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6039 // If this requires special offset handling, check to see if it is
6040 // a relaxed section. If this is not, then it is a merged section that
6041 // we cannot handle.
6042 if (this->is_output_section_offset_invalid(shndx
))
6044 const Output_relaxed_input_section
* poris
=
6045 os
->find_relaxed_input_section(this, shndx
);
6053 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6054 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6056 template<bool big_endian
>
6058 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6059 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6060 const Relobj::Output_sections
& out_sections
,
6061 const Symbol_table
* symtab
,
6062 const unsigned char* pshdrs
)
6064 unsigned int sh_type
= shdr
.get_sh_type();
6065 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6068 // Ignore empty section.
6069 off_t sh_size
= shdr
.get_sh_size();
6073 // Ignore reloc section with unexpected symbol table. The
6074 // error will be reported in the final link.
6075 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6078 unsigned int reloc_size
;
6079 if (sh_type
== elfcpp::SHT_REL
)
6080 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6082 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6084 // Ignore reloc section with unexpected entsize or uneven size.
6085 // The error will be reported in the final link.
6086 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6089 // Ignore reloc section with bad info. This error will be
6090 // reported in the final link.
6091 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6092 if (index
>= this->shnum())
6095 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6096 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6097 return this->section_is_scannable(text_shdr
, index
,
6098 out_sections
[index
], symtab
);
6101 // Return the output address of either a plain input section or a relaxed
6102 // input section. SHNDX is the section index. We define and use this
6103 // instead of calling Output_section::output_address because that is slow
6104 // for large output.
6106 template<bool big_endian
>
6108 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6112 if (this->is_output_section_offset_invalid(shndx
))
6114 const Output_relaxed_input_section
* poris
=
6115 os
->find_relaxed_input_section(this, shndx
);
6116 // We do not handle merged sections here.
6117 gold_assert(poris
!= NULL
);
6118 return poris
->address();
6121 return os
->address() + this->get_output_section_offset(shndx
);
6124 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6125 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6127 template<bool big_endian
>
6129 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6130 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6133 const Symbol_table
* symtab
)
6135 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6138 // If the section does not cross any 4K-boundaries, it does not need to
6140 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6141 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6147 // Scan a section for Cortex-A8 workaround.
6149 template<bool big_endian
>
6151 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6152 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6155 Target_arm
<big_endian
>* arm_target
)
6157 // Look for the first mapping symbol in this section. It should be
6159 Mapping_symbol_position
section_start(shndx
, 0);
6160 typename
Mapping_symbols_info::const_iterator p
=
6161 this->mapping_symbols_info_
.lower_bound(section_start
);
6163 // There are no mapping symbols for this section. Treat it as a data-only
6164 // section. Issue a warning if section is marked as containing
6166 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6168 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
6169 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6170 "erratum because it has no mapping symbols."),
6171 shndx
, this->name().c_str());
6175 Arm_address output_address
=
6176 this->simple_input_section_output_address(shndx
, os
);
6178 // Get the section contents.
6179 section_size_type input_view_size
= 0;
6180 const unsigned char* input_view
=
6181 this->section_contents(shndx
, &input_view_size
, false);
6183 // We need to go through the mapping symbols to determine what to
6184 // scan. There are two reasons. First, we should look at THUMB code and
6185 // THUMB code only. Second, we only want to look at the 4K-page boundary
6186 // to speed up the scanning.
6188 while (p
!= this->mapping_symbols_info_
.end()
6189 && p
->first
.first
== shndx
)
6191 typename
Mapping_symbols_info::const_iterator next
=
6192 this->mapping_symbols_info_
.upper_bound(p
->first
);
6194 // Only scan part of a section with THUMB code.
6195 if (p
->second
== 't')
6197 // Determine the end of this range.
6198 section_size_type span_start
=
6199 convert_to_section_size_type(p
->first
.second
);
6200 section_size_type span_end
;
6201 if (next
!= this->mapping_symbols_info_
.end()
6202 && next
->first
.first
== shndx
)
6203 span_end
= convert_to_section_size_type(next
->first
.second
);
6205 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6207 if (((span_start
+ output_address
) & ~0xfffUL
)
6208 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6210 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6211 span_start
, span_end
,
6221 // Scan relocations for stub generation.
6223 template<bool big_endian
>
6225 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6226 Target_arm
<big_endian
>* arm_target
,
6227 const Symbol_table
* symtab
,
6228 const Layout
* layout
)
6230 unsigned int shnum
= this->shnum();
6231 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6233 // Read the section headers.
6234 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6238 // To speed up processing, we set up hash tables for fast lookup of
6239 // input offsets to output addresses.
6240 this->initialize_input_to_output_maps();
6242 const Relobj::Output_sections
& out_sections(this->output_sections());
6244 Relocate_info
<32, big_endian
> relinfo
;
6245 relinfo
.symtab
= symtab
;
6246 relinfo
.layout
= layout
;
6247 relinfo
.object
= this;
6249 // Do relocation stubs scanning.
6250 const unsigned char* p
= pshdrs
+ shdr_size
;
6251 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6253 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6254 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6257 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6258 Arm_address output_offset
= this->get_output_section_offset(index
);
6259 Arm_address output_address
;
6260 if (output_offset
!= invalid_address
)
6261 output_address
= out_sections
[index
]->address() + output_offset
;
6264 // Currently this only happens for a relaxed section.
6265 const Output_relaxed_input_section
* poris
=
6266 out_sections
[index
]->find_relaxed_input_section(this, index
);
6267 gold_assert(poris
!= NULL
);
6268 output_address
= poris
->address();
6271 // Get the relocations.
6272 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6276 // Get the section contents. This does work for the case in which
6277 // we modify the contents of an input section. We need to pass the
6278 // output view under such circumstances.
6279 section_size_type input_view_size
= 0;
6280 const unsigned char* input_view
=
6281 this->section_contents(index
, &input_view_size
, false);
6283 relinfo
.reloc_shndx
= i
;
6284 relinfo
.data_shndx
= index
;
6285 unsigned int sh_type
= shdr
.get_sh_type();
6286 unsigned int reloc_size
;
6287 if (sh_type
== elfcpp::SHT_REL
)
6288 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6290 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6292 Output_section
* os
= out_sections
[index
];
6293 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6294 shdr
.get_sh_size() / reloc_size
,
6296 output_offset
== invalid_address
,
6297 input_view
, output_address
,
6302 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6303 // after its relocation section, if there is one, is processed for
6304 // relocation stubs. Merging this loop with the one above would have been
6305 // complicated since we would have had to make sure that relocation stub
6306 // scanning is done first.
6307 if (arm_target
->fix_cortex_a8())
6309 const unsigned char* p
= pshdrs
+ shdr_size
;
6310 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6312 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6313 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6316 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6321 // After we've done the relocations, we release the hash tables,
6322 // since we no longer need them.
6323 this->free_input_to_output_maps();
6326 // Count the local symbols. The ARM backend needs to know if a symbol
6327 // is a THUMB function or not. For global symbols, it is easy because
6328 // the Symbol object keeps the ELF symbol type. For local symbol it is
6329 // harder because we cannot access this information. So we override the
6330 // do_count_local_symbol in parent and scan local symbols to mark
6331 // THUMB functions. This is not the most efficient way but I do not want to
6332 // slow down other ports by calling a per symbol target hook inside
6333 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6335 template<bool big_endian
>
6337 Arm_relobj
<big_endian
>::do_count_local_symbols(
6338 Stringpool_template
<char>* pool
,
6339 Stringpool_template
<char>* dynpool
)
6341 // We need to fix-up the values of any local symbols whose type are
6344 // Ask parent to count the local symbols.
6345 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6346 const unsigned int loccount
= this->local_symbol_count();
6350 // Initialize the thumb function bit-vector.
6351 std::vector
<bool> empty_vector(loccount
, false);
6352 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6354 // Read the symbol table section header.
6355 const unsigned int symtab_shndx
= this->symtab_shndx();
6356 elfcpp::Shdr
<32, big_endian
>
6357 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6358 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6360 // Read the local symbols.
6361 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6362 gold_assert(loccount
== symtabshdr
.get_sh_info());
6363 off_t locsize
= loccount
* sym_size
;
6364 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6365 locsize
, true, true);
6367 // For mapping symbol processing, we need to read the symbol names.
6368 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6369 if (strtab_shndx
>= this->shnum())
6371 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6375 elfcpp::Shdr
<32, big_endian
>
6376 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6377 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6379 this->error(_("symbol table name section has wrong type: %u"),
6380 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6383 const char* pnames
=
6384 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6385 strtabshdr
.get_sh_size(),
6388 // Loop over the local symbols and mark any local symbols pointing
6389 // to THUMB functions.
6391 // Skip the first dummy symbol.
6393 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6394 this->local_values();
6395 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6397 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6398 elfcpp::STT st_type
= sym
.get_st_type();
6399 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6400 Arm_address input_value
= lv
.input_value();
6402 // Check to see if this is a mapping symbol.
6403 const char* sym_name
= pnames
+ sym
.get_st_name();
6404 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6407 unsigned int input_shndx
=
6408 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6409 gold_assert(is_ordinary
);
6411 // Strip of LSB in case this is a THUMB symbol.
6412 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6413 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6416 if (st_type
== elfcpp::STT_ARM_TFUNC
6417 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6419 // This is a THUMB function. Mark this and canonicalize the
6420 // symbol value by setting LSB.
6421 this->local_symbol_is_thumb_function_
[i
] = true;
6422 if ((input_value
& 1) == 0)
6423 lv
.set_input_value(input_value
| 1);
6428 // Relocate sections.
6429 template<bool big_endian
>
6431 Arm_relobj
<big_endian
>::do_relocate_sections(
6432 const Symbol_table
* symtab
,
6433 const Layout
* layout
,
6434 const unsigned char* pshdrs
,
6436 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6438 // Call parent to relocate sections.
6439 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6440 pshdrs
, of
, pviews
);
6442 // We do not generate stubs if doing a relocatable link.
6443 if (parameters
->options().relocatable())
6446 // Relocate stub tables.
6447 unsigned int shnum
= this->shnum();
6449 Target_arm
<big_endian
>* arm_target
=
6450 Target_arm
<big_endian
>::default_target();
6452 Relocate_info
<32, big_endian
> relinfo
;
6453 relinfo
.symtab
= symtab
;
6454 relinfo
.layout
= layout
;
6455 relinfo
.object
= this;
6457 for (unsigned int i
= 1; i
< shnum
; ++i
)
6459 Arm_input_section
<big_endian
>* arm_input_section
=
6460 arm_target
->find_arm_input_section(this, i
);
6462 if (arm_input_section
!= NULL
6463 && arm_input_section
->is_stub_table_owner()
6464 && !arm_input_section
->stub_table()->empty())
6466 // We cannot discard a section if it owns a stub table.
6467 Output_section
* os
= this->output_section(i
);
6468 gold_assert(os
!= NULL
);
6470 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6471 relinfo
.reloc_shdr
= NULL
;
6472 relinfo
.data_shndx
= i
;
6473 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6475 gold_assert((*pviews
)[i
].view
!= NULL
);
6477 // We are passed the output section view. Adjust it to cover the
6479 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6480 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6481 && ((stub_table
->address() + stub_table
->data_size())
6482 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6484 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6485 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6486 Arm_address address
= stub_table
->address();
6487 section_size_type view_size
= stub_table
->data_size();
6489 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6493 // Apply Cortex A8 workaround if applicable.
6494 if (this->section_has_cortex_a8_workaround(i
))
6496 unsigned char* view
= (*pviews
)[i
].view
;
6497 Arm_address view_address
= (*pviews
)[i
].address
;
6498 section_size_type view_size
= (*pviews
)[i
].view_size
;
6499 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6501 // Adjust view to cover section.
6502 Output_section
* os
= this->output_section(i
);
6503 gold_assert(os
!= NULL
);
6504 Arm_address section_address
=
6505 this->simple_input_section_output_address(i
, os
);
6506 uint64_t section_size
= this->section_size(i
);
6508 gold_assert(section_address
>= view_address
6509 && ((section_address
+ section_size
)
6510 <= (view_address
+ view_size
)));
6512 unsigned char* section_view
= view
+ (section_address
- view_address
);
6514 // Apply the Cortex-A8 workaround to the output address range
6515 // corresponding to this input section.
6516 stub_table
->apply_cortex_a8_workaround_to_address_range(
6525 // Find the linked text section of an EXIDX section by looking at the first
6526 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6527 // must be linked to its associated code section via the sh_link field of
6528 // its section header. However, some tools are broken and the link is not
6529 // always set. LD just drops such an EXIDX section silently, causing the
6530 // associated code not unwindabled. Here we try a little bit harder to
6531 // discover the linked code section.
6533 // PSHDR points to the section header of a relocation section of an EXIDX
6534 // section. If we can find a linked text section, return true and
6535 // store the text section index in the location PSHNDX. Otherwise
6538 template<bool big_endian
>
6540 Arm_relobj
<big_endian
>::find_linked_text_section(
6541 const unsigned char* pshdr
,
6542 const unsigned char* psyms
,
6543 unsigned int* pshndx
)
6545 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6547 // If there is no relocation, we cannot find the linked text section.
6549 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6550 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6552 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6553 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6555 // Get the relocations.
6556 const unsigned char* prelocs
=
6557 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6559 // Find the REL31 relocation for the first word of the first EXIDX entry.
6560 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6562 Arm_address r_offset
;
6563 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6564 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6566 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6567 r_info
= reloc
.get_r_info();
6568 r_offset
= reloc
.get_r_offset();
6572 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6573 r_info
= reloc
.get_r_info();
6574 r_offset
= reloc
.get_r_offset();
6577 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6578 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6581 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6583 || r_sym
>= this->local_symbol_count()
6587 // This is the relocation for the first word of the first EXIDX entry.
6588 // We expect to see a local section symbol.
6589 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6590 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6591 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6595 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6596 gold_assert(is_ordinary
);
6606 // Make an EXIDX input section object for an EXIDX section whose index is
6607 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6608 // is the section index of the linked text section.
6610 template<bool big_endian
>
6612 Arm_relobj
<big_endian
>::make_exidx_input_section(
6614 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6615 unsigned int text_shndx
,
6616 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6618 // Create an Arm_exidx_input_section object for this EXIDX section.
6619 Arm_exidx_input_section
* exidx_input_section
=
6620 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6621 shdr
.get_sh_addralign(),
6622 text_shdr
.get_sh_size());
6624 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6625 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6627 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6629 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6630 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6631 this->name().c_str());
6632 exidx_input_section
->set_has_errors();
6634 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6636 unsigned other_exidx_shndx
=
6637 this->exidx_section_map_
[text_shndx
]->shndx();
6638 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6640 this->section_name(shndx
).c_str(), shndx
,
6641 this->section_name(other_exidx_shndx
).c_str(),
6642 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6643 text_shndx
, this->name().c_str());
6644 exidx_input_section
->set_has_errors();
6647 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6649 // Check section flags of text section.
6650 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6652 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6654 this->section_name(shndx
).c_str(), shndx
,
6655 this->section_name(text_shndx
).c_str(), text_shndx
,
6656 this->name().c_str());
6657 exidx_input_section
->set_has_errors();
6659 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6660 // I would like to make this an error but currently ld just ignores
6662 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6664 this->section_name(shndx
).c_str(), shndx
,
6665 this->section_name(text_shndx
).c_str(), text_shndx
,
6666 this->name().c_str());
6669 // Read the symbol information.
6671 template<bool big_endian
>
6673 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6675 // Call parent class to read symbol information.
6676 Sized_relobj_file
<32, big_endian
>::do_read_symbols(sd
);
6678 // If this input file is a binary file, it has no processor
6679 // specific flags and attributes section.
6680 Input_file::Format format
= this->input_file()->format();
6681 if (format
!= Input_file::FORMAT_ELF
)
6683 gold_assert(format
== Input_file::FORMAT_BINARY
);
6684 this->merge_flags_and_attributes_
= false;
6688 // Read processor-specific flags in ELF file header.
6689 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6690 elfcpp::Elf_sizes
<32>::ehdr_size
,
6692 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6693 this->processor_specific_flags_
= ehdr
.get_e_flags();
6695 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6697 std::vector
<unsigned int> deferred_exidx_sections
;
6698 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6699 const unsigned char* pshdrs
= sd
->section_headers
->data();
6700 const unsigned char* ps
= pshdrs
+ shdr_size
;
6701 bool must_merge_flags_and_attributes
= false;
6702 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6704 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6706 // Sometimes an object has no contents except the section name string
6707 // table and an empty symbol table with the undefined symbol. We
6708 // don't want to merge processor-specific flags from such an object.
6709 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6711 // Symbol table is not empty.
6712 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6713 elfcpp::Elf_sizes
<32>::sym_size
;
6714 if (shdr
.get_sh_size() > sym_size
)
6715 must_merge_flags_and_attributes
= true;
6717 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6718 // If this is neither an empty symbol table nor a string table,
6720 must_merge_flags_and_attributes
= true;
6722 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6724 gold_assert(this->attributes_section_data_
== NULL
);
6725 section_offset_type section_offset
= shdr
.get_sh_offset();
6726 section_size_type section_size
=
6727 convert_to_section_size_type(shdr
.get_sh_size());
6728 const unsigned char* view
=
6729 this->get_view(section_offset
, section_size
, true, false);
6730 this->attributes_section_data_
=
6731 new Attributes_section_data(view
, section_size
);
6733 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6735 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6736 if (text_shndx
== elfcpp::SHN_UNDEF
)
6737 deferred_exidx_sections
.push_back(i
);
6740 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6741 + text_shndx
* shdr_size
);
6742 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6744 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6745 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6746 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6747 this->section_name(i
).c_str(), this->name().c_str());
6752 if (!must_merge_flags_and_attributes
)
6754 gold_assert(deferred_exidx_sections
.empty());
6755 this->merge_flags_and_attributes_
= false;
6759 // Some tools are broken and they do not set the link of EXIDX sections.
6760 // We look at the first relocation to figure out the linked sections.
6761 if (!deferred_exidx_sections
.empty())
6763 // We need to go over the section headers again to find the mapping
6764 // from sections being relocated to their relocation sections. This is
6765 // a bit inefficient as we could do that in the loop above. However,
6766 // we do not expect any deferred EXIDX sections normally. So we do not
6767 // want to slow down the most common path.
6768 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6769 Reloc_map reloc_map
;
6770 ps
= pshdrs
+ shdr_size
;
6771 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6773 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6774 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6775 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6777 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6778 if (info_shndx
>= this->shnum())
6779 gold_error(_("relocation section %u has invalid info %u"),
6781 Reloc_map::value_type
value(info_shndx
, i
);
6782 std::pair
<Reloc_map::iterator
, bool> result
=
6783 reloc_map
.insert(value
);
6785 gold_error(_("section %u has multiple relocation sections "
6787 info_shndx
, i
, reloc_map
[info_shndx
]);
6791 // Read the symbol table section header.
6792 const unsigned int symtab_shndx
= this->symtab_shndx();
6793 elfcpp::Shdr
<32, big_endian
>
6794 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6795 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6797 // Read the local symbols.
6798 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6799 const unsigned int loccount
= this->local_symbol_count();
6800 gold_assert(loccount
== symtabshdr
.get_sh_info());
6801 off_t locsize
= loccount
* sym_size
;
6802 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6803 locsize
, true, true);
6805 // Process the deferred EXIDX sections.
6806 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6808 unsigned int shndx
= deferred_exidx_sections
[i
];
6809 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6810 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6811 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6812 if (it
!= reloc_map
.end())
6813 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6814 psyms
, &text_shndx
);
6815 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6816 + text_shndx
* shdr_size
);
6817 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6822 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6823 // sections for unwinding. These sections are referenced implicitly by
6824 // text sections linked in the section headers. If we ignore these implicit
6825 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6826 // will be garbage-collected incorrectly. Hence we override the same function
6827 // in the base class to handle these implicit references.
6829 template<bool big_endian
>
6831 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6833 Read_relocs_data
* rd
)
6835 // First, call base class method to process relocations in this object.
6836 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6838 // If --gc-sections is not specified, there is nothing more to do.
6839 // This happens when --icf is used but --gc-sections is not.
6840 if (!parameters
->options().gc_sections())
6843 unsigned int shnum
= this->shnum();
6844 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6845 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6849 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6850 // to these from the linked text sections.
6851 const unsigned char* ps
= pshdrs
+ shdr_size
;
6852 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6854 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6855 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6857 // Found an .ARM.exidx section, add it to the set of reachable
6858 // sections from its linked text section.
6859 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6860 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6865 // Update output local symbol count. Owing to EXIDX entry merging, some local
6866 // symbols will be removed in output. Adjust output local symbol count
6867 // accordingly. We can only changed the static output local symbol count. It
6868 // is too late to change the dynamic symbols.
6870 template<bool big_endian
>
6872 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6874 // Caller should check that this needs updating. We want caller checking
6875 // because output_local_symbol_count_needs_update() is most likely inlined.
6876 gold_assert(this->output_local_symbol_count_needs_update_
);
6878 gold_assert(this->symtab_shndx() != -1U);
6879 if (this->symtab_shndx() == 0)
6881 // This object has no symbols. Weird but legal.
6885 // Read the symbol table section header.
6886 const unsigned int symtab_shndx
= this->symtab_shndx();
6887 elfcpp::Shdr
<32, big_endian
>
6888 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6889 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6891 // Read the local symbols.
6892 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6893 const unsigned int loccount
= this->local_symbol_count();
6894 gold_assert(loccount
== symtabshdr
.get_sh_info());
6895 off_t locsize
= loccount
* sym_size
;
6896 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6897 locsize
, true, true);
6899 // Loop over the local symbols.
6901 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6903 const Output_sections
& out_sections(this->output_sections());
6904 unsigned int shnum
= this->shnum();
6905 unsigned int count
= 0;
6906 // Skip the first, dummy, symbol.
6908 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6910 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6912 Symbol_value
<32>& lv((*this->local_values())[i
]);
6914 // This local symbol was already discarded by do_count_local_symbols.
6915 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6919 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6924 Output_section
* os
= out_sections
[shndx
];
6926 // This local symbol no longer has an output section. Discard it.
6929 lv
.set_no_output_symtab_entry();
6933 // Currently we only discard parts of EXIDX input sections.
6934 // We explicitly check for a merged EXIDX input section to avoid
6935 // calling Output_section_data::output_offset unless necessary.
6936 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6937 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6939 section_offset_type output_offset
=
6940 os
->output_offset(this, shndx
, lv
.input_value());
6941 if (output_offset
== -1)
6943 // This symbol is defined in a part of an EXIDX input section
6944 // that is discarded due to entry merging.
6945 lv
.set_no_output_symtab_entry();
6954 this->set_output_local_symbol_count(count
);
6955 this->output_local_symbol_count_needs_update_
= false;
6958 // Arm_dynobj methods.
6960 // Read the symbol information.
6962 template<bool big_endian
>
6964 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6966 // Call parent class to read symbol information.
6967 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6969 // Read processor-specific flags in ELF file header.
6970 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6971 elfcpp::Elf_sizes
<32>::ehdr_size
,
6973 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6974 this->processor_specific_flags_
= ehdr
.get_e_flags();
6976 // Read the attributes section if there is one.
6977 // We read from the end because gas seems to put it near the end of
6978 // the section headers.
6979 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6980 const unsigned char* ps
=
6981 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6982 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6984 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6985 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6987 section_offset_type section_offset
= shdr
.get_sh_offset();
6988 section_size_type section_size
=
6989 convert_to_section_size_type(shdr
.get_sh_size());
6990 const unsigned char* view
=
6991 this->get_view(section_offset
, section_size
, true, false);
6992 this->attributes_section_data_
=
6993 new Attributes_section_data(view
, section_size
);
6999 // Stub_addend_reader methods.
7001 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7003 template<bool big_endian
>
7004 elfcpp::Elf_types
<32>::Elf_Swxword
7005 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7006 unsigned int r_type
,
7007 const unsigned char* view
,
7008 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7010 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7014 case elfcpp::R_ARM_CALL
:
7015 case elfcpp::R_ARM_JUMP24
:
7016 case elfcpp::R_ARM_PLT32
:
7018 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7019 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7020 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7021 return Bits
<26>::sign_extend32(val
<< 2);
7024 case elfcpp::R_ARM_THM_CALL
:
7025 case elfcpp::R_ARM_THM_JUMP24
:
7026 case elfcpp::R_ARM_THM_XPC22
:
7028 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7029 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7030 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7031 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7032 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7035 case elfcpp::R_ARM_THM_JUMP19
:
7037 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7038 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7039 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7040 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7041 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7049 // Arm_output_data_got methods.
7051 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7052 // The first one is initialized to be 1, which is the module index for
7053 // the main executable and the second one 0. A reloc of the type
7054 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7055 // be applied by gold. GSYM is a global symbol.
7057 template<bool big_endian
>
7059 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7060 unsigned int got_type
,
7063 if (gsym
->has_got_offset(got_type
))
7066 // We are doing a static link. Just mark it as belong to module 1,
7068 unsigned int got_offset
= this->add_constant(1);
7069 gsym
->set_got_offset(got_type
, got_offset
);
7070 got_offset
= this->add_constant(0);
7071 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7072 elfcpp::R_ARM_TLS_DTPOFF32
,
7076 // Same as the above but for a local symbol.
7078 template<bool big_endian
>
7080 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7081 unsigned int got_type
,
7082 Sized_relobj_file
<32, big_endian
>* object
,
7085 if (object
->local_has_got_offset(index
, got_type
))
7088 // We are doing a static link. Just mark it as belong to module 1,
7090 unsigned int got_offset
= this->add_constant(1);
7091 object
->set_local_got_offset(index
, got_type
, got_offset
);
7092 got_offset
= this->add_constant(0);
7093 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7094 elfcpp::R_ARM_TLS_DTPOFF32
,
7098 template<bool big_endian
>
7100 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7102 // Call parent to write out GOT.
7103 Output_data_got
<32, big_endian
>::do_write(of
);
7105 // We are done if there is no fix up.
7106 if (this->static_relocs_
.empty())
7109 gold_assert(parameters
->doing_static_link());
7111 const off_t offset
= this->offset();
7112 const section_size_type oview_size
=
7113 convert_to_section_size_type(this->data_size());
7114 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7116 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7117 gold_assert(tls_segment
!= NULL
);
7119 // The thread pointer $tp points to the TCB, which is followed by the
7120 // TLS. So we need to adjust $tp relative addressing by this amount.
7121 Arm_address aligned_tcb_size
=
7122 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7124 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7126 Static_reloc
& reloc(this->static_relocs_
[i
]);
7129 if (!reloc
.symbol_is_global())
7131 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7132 const Symbol_value
<32>* psymval
=
7133 reloc
.relobj()->local_symbol(reloc
.index());
7135 // We are doing static linking. Issue an error and skip this
7136 // relocation if the symbol is undefined or in a discarded_section.
7138 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7139 if ((shndx
== elfcpp::SHN_UNDEF
)
7141 && shndx
!= elfcpp::SHN_UNDEF
7142 && !object
->is_section_included(shndx
)
7143 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7145 gold_error(_("undefined or discarded local symbol %u from "
7146 " object %s in GOT"),
7147 reloc
.index(), reloc
.relobj()->name().c_str());
7151 value
= psymval
->value(object
, 0);
7155 const Symbol
* gsym
= reloc
.symbol();
7156 gold_assert(gsym
!= NULL
);
7157 if (gsym
->is_forwarder())
7158 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7160 // We are doing static linking. Issue an error and skip this
7161 // relocation if the symbol is undefined or in a discarded_section
7162 // unless it is a weakly_undefined symbol.
7163 if ((gsym
->is_defined_in_discarded_section()
7164 || gsym
->is_undefined())
7165 && !gsym
->is_weak_undefined())
7167 gold_error(_("undefined or discarded symbol %s in GOT"),
7172 if (!gsym
->is_weak_undefined())
7174 const Sized_symbol
<32>* sym
=
7175 static_cast<const Sized_symbol
<32>*>(gsym
);
7176 value
= sym
->value();
7182 unsigned got_offset
= reloc
.got_offset();
7183 gold_assert(got_offset
< oview_size
);
7185 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7186 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7188 switch (reloc
.r_type())
7190 case elfcpp::R_ARM_TLS_DTPOFF32
:
7193 case elfcpp::R_ARM_TLS_TPOFF32
:
7194 x
= value
+ aligned_tcb_size
;
7199 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7202 of
->write_output_view(offset
, oview_size
, oview
);
7205 // A class to handle the PLT data.
7206 // This is an abstract base class that handles most of the linker details
7207 // but does not know the actual contents of PLT entries. The derived
7208 // classes below fill in those details.
7210 template<bool big_endian
>
7211 class Output_data_plt_arm
: public Output_section_data
7214 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7217 Output_data_plt_arm(Layout
*, uint64_t addralign
, Output_data_space
*);
7219 // Add an entry to the PLT.
7221 add_entry(Symbol
* gsym
);
7223 // Return the .rel.plt section data.
7224 const Reloc_section
*
7226 { return this->rel_
; }
7228 // Return the number of PLT entries.
7231 { return this->count_
; }
7233 // Return the offset of the first non-reserved PLT entry.
7235 first_plt_entry_offset() const
7236 { return this->do_first_plt_entry_offset(); }
7238 // Return the size of a PLT entry.
7240 get_plt_entry_size() const
7241 { return this->do_get_plt_entry_size(); }
7244 // Fill in the first PLT entry.
7246 fill_first_plt_entry(unsigned char* pov
,
7247 Arm_address got_address
,
7248 Arm_address plt_address
)
7249 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7252 fill_plt_entry(unsigned char* pov
,
7253 Arm_address got_address
,
7254 Arm_address plt_address
,
7255 unsigned int got_offset
,
7256 unsigned int plt_offset
)
7257 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7259 virtual unsigned int
7260 do_first_plt_entry_offset() const = 0;
7262 virtual unsigned int
7263 do_get_plt_entry_size() const = 0;
7266 do_fill_first_plt_entry(unsigned char* pov
,
7267 Arm_address got_address
,
7268 Arm_address plt_address
) = 0;
7271 do_fill_plt_entry(unsigned char* pov
,
7272 Arm_address got_address
,
7273 Arm_address plt_address
,
7274 unsigned int got_offset
,
7275 unsigned int plt_offset
) = 0;
7278 do_adjust_output_section(Output_section
* os
);
7280 // Write to a map file.
7282 do_print_to_mapfile(Mapfile
* mapfile
) const
7283 { mapfile
->print_output_data(this, _("** PLT")); }
7286 // Set the final size.
7288 set_final_data_size()
7290 this->set_data_size(this->first_plt_entry_offset()
7291 + this->count_
* this->get_plt_entry_size());
7294 // Write out the PLT data.
7296 do_write(Output_file
*);
7298 // The reloc section.
7299 Reloc_section
* rel_
;
7300 // The .got.plt section.
7301 Output_data_space
* got_plt_
;
7302 // The number of PLT entries.
7303 unsigned int count_
;
7306 // Create the PLT section. The ordinary .got section is an argument,
7307 // since we need to refer to the start. We also create our own .got
7308 // section just for PLT entries.
7310 template<bool big_endian
>
7311 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7313 Output_data_space
* got_plt
)
7314 : Output_section_data(addralign
), got_plt_(got_plt
), count_(0)
7316 this->rel_
= new Reloc_section(false);
7317 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7318 elfcpp::SHF_ALLOC
, this->rel_
,
7319 ORDER_DYNAMIC_PLT_RELOCS
, false);
7322 template<bool big_endian
>
7324 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7329 // Add an entry to the PLT.
7331 template<bool big_endian
>
7333 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7335 gold_assert(!gsym
->has_plt_offset());
7337 // Note that when setting the PLT offset we skip the initial
7338 // reserved PLT entry.
7339 gsym
->set_plt_offset((this->count_
) * this->get_plt_entry_size()
7340 + this->first_plt_entry_offset());
7344 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7346 // Every PLT entry needs a GOT entry which points back to the PLT
7347 // entry (this will be changed by the dynamic linker, normally
7348 // lazily when the function is called).
7349 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7351 // Every PLT entry needs a reloc.
7352 gsym
->set_needs_dynsym_entry();
7353 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7356 // Note that we don't need to save the symbol. The contents of the
7357 // PLT are independent of which symbols are used. The symbols only
7358 // appear in the relocations.
7361 template<bool big_endian
>
7362 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7365 Output_data_plt_arm_standard(Layout
* layout
, Output_data_space
* got_plt
)
7366 : Output_data_plt_arm
<big_endian
>(layout
, 4, got_plt
)
7370 // Return the offset of the first non-reserved PLT entry.
7371 virtual unsigned int
7372 do_first_plt_entry_offset() const
7373 { return sizeof(first_plt_entry
); }
7375 // Return the size of a PLT entry.
7376 virtual unsigned int
7377 do_get_plt_entry_size() const
7378 { return sizeof(plt_entry
); }
7381 do_fill_first_plt_entry(unsigned char* pov
,
7382 Arm_address got_address
,
7383 Arm_address plt_address
);
7386 do_fill_plt_entry(unsigned char* pov
,
7387 Arm_address got_address
,
7388 Arm_address plt_address
,
7389 unsigned int got_offset
,
7390 unsigned int plt_offset
);
7393 // Template for the first PLT entry.
7394 static const uint32_t first_plt_entry
[5];
7396 // Template for subsequent PLT entries.
7397 static const uint32_t plt_entry
[3];
7401 // FIXME: This is not very flexible. Right now this has only been tested
7402 // on armv5te. If we are to support additional architecture features like
7403 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7405 // The first entry in the PLT.
7406 template<bool big_endian
>
7407 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7409 0xe52de004, // str lr, [sp, #-4]!
7410 0xe59fe004, // ldr lr, [pc, #4]
7411 0xe08fe00e, // add lr, pc, lr
7412 0xe5bef008, // ldr pc, [lr, #8]!
7413 0x00000000, // &GOT[0] - .
7416 template<bool big_endian
>
7418 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7420 Arm_address got_address
,
7421 Arm_address plt_address
)
7423 // Write first PLT entry. All but the last word are constants.
7424 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7425 / sizeof(plt_entry
[0]));
7426 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7427 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7428 // Last word in first PLT entry is &GOT[0] - .
7429 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7430 got_address
- (plt_address
+ 16));
7433 // Subsequent entries in the PLT.
7435 template<bool big_endian
>
7436 const uint32_t Output_data_plt_arm_standard
<big_endian
>::plt_entry
[3] =
7438 0xe28fc600, // add ip, pc, #0xNN00000
7439 0xe28cca00, // add ip, ip, #0xNN000
7440 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7443 template<bool big_endian
>
7445 Output_data_plt_arm_standard
<big_endian
>::do_fill_plt_entry(
7447 Arm_address got_address
,
7448 Arm_address plt_address
,
7449 unsigned int got_offset
,
7450 unsigned int plt_offset
)
7452 int32_t offset
= ((got_address
+ got_offset
)
7453 - (plt_address
+ plt_offset
+ 8));
7455 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7456 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7457 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7458 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7459 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7460 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7461 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7464 // Write out the PLT. This uses the hand-coded instructions above,
7465 // and adjusts them as needed. This is all specified by the arm ELF
7466 // Processor Supplement.
7468 template<bool big_endian
>
7470 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7472 const off_t offset
= this->offset();
7473 const section_size_type oview_size
=
7474 convert_to_section_size_type(this->data_size());
7475 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7477 const off_t got_file_offset
= this->got_plt_
->offset();
7478 const section_size_type got_size
=
7479 convert_to_section_size_type(this->got_plt_
->data_size());
7480 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7482 unsigned char* pov
= oview
;
7484 Arm_address plt_address
= this->address();
7485 Arm_address got_address
= this->got_plt_
->address();
7487 // Write first PLT entry.
7488 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
7489 pov
+= this->first_plt_entry_offset();
7491 unsigned char* got_pov
= got_view
;
7493 memset(got_pov
, 0, 12);
7496 unsigned int plt_offset
= this->first_plt_entry_offset();
7497 unsigned int got_offset
= 12;
7498 const unsigned int count
= this->count_
;
7499 for (unsigned int i
= 0;
7502 pov
+= this->get_plt_entry_size(),
7504 plt_offset
+= this->get_plt_entry_size(),
7507 // Set and adjust the PLT entry itself.
7508 this->fill_plt_entry(pov
, got_address
, plt_address
,
7509 got_offset
, plt_offset
);
7511 // Set the entry in the GOT.
7512 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7515 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7516 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7518 of
->write_output_view(offset
, oview_size
, oview
);
7519 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7522 // Create a PLT entry for a global symbol.
7524 template<bool big_endian
>
7526 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7529 if (gsym
->has_plt_offset())
7532 if (this->plt_
== NULL
)
7534 // Create the GOT sections first.
7535 this->got_section(symtab
, layout
);
7537 this->plt_
= this->make_data_plt(layout
, this->got_plt_
);
7539 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7541 | elfcpp::SHF_EXECINSTR
),
7542 this->plt_
, ORDER_PLT
, false);
7544 this->plt_
->add_entry(gsym
);
7547 // Return the number of entries in the PLT.
7549 template<bool big_endian
>
7551 Target_arm
<big_endian
>::plt_entry_count() const
7553 if (this->plt_
== NULL
)
7555 return this->plt_
->entry_count();
7558 // Return the offset of the first non-reserved PLT entry.
7560 template<bool big_endian
>
7562 Target_arm
<big_endian
>::first_plt_entry_offset() const
7564 return this->plt_
->first_plt_entry_offset();
7567 // Return the size of each PLT entry.
7569 template<bool big_endian
>
7571 Target_arm
<big_endian
>::plt_entry_size() const
7573 return this->plt_
->get_plt_entry_size();
7576 // Get the section to use for TLS_DESC relocations.
7578 template<bool big_endian
>
7579 typename Target_arm
<big_endian
>::Reloc_section
*
7580 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7582 return this->plt_section()->rel_tls_desc(layout
);
7585 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7587 template<bool big_endian
>
7589 Target_arm
<big_endian
>::define_tls_base_symbol(
7590 Symbol_table
* symtab
,
7593 if (this->tls_base_symbol_defined_
)
7596 Output_segment
* tls_segment
= layout
->tls_segment();
7597 if (tls_segment
!= NULL
)
7599 bool is_exec
= parameters
->options().output_is_executable();
7600 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7601 Symbol_table::PREDEFINED
,
7605 elfcpp::STV_HIDDEN
, 0,
7607 ? Symbol::SEGMENT_END
7608 : Symbol::SEGMENT_START
),
7611 this->tls_base_symbol_defined_
= true;
7614 // Create a GOT entry for the TLS module index.
7616 template<bool big_endian
>
7618 Target_arm
<big_endian
>::got_mod_index_entry(
7619 Symbol_table
* symtab
,
7621 Sized_relobj_file
<32, big_endian
>* object
)
7623 if (this->got_mod_index_offset_
== -1U)
7625 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7626 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7627 unsigned int got_offset
;
7628 if (!parameters
->doing_static_link())
7630 got_offset
= got
->add_constant(0);
7631 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7632 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7637 // We are doing a static link. Just mark it as belong to module 1,
7639 got_offset
= got
->add_constant(1);
7642 got
->add_constant(0);
7643 this->got_mod_index_offset_
= got_offset
;
7645 return this->got_mod_index_offset_
;
7648 // Optimize the TLS relocation type based on what we know about the
7649 // symbol. IS_FINAL is true if the final address of this symbol is
7650 // known at link time.
7652 template<bool big_endian
>
7653 tls::Tls_optimization
7654 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7656 // FIXME: Currently we do not do any TLS optimization.
7657 return tls::TLSOPT_NONE
;
7660 // Get the Reference_flags for a particular relocation.
7662 template<bool big_endian
>
7664 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
7668 case elfcpp::R_ARM_NONE
:
7669 case elfcpp::R_ARM_V4BX
:
7670 case elfcpp::R_ARM_GNU_VTENTRY
:
7671 case elfcpp::R_ARM_GNU_VTINHERIT
:
7672 // No symbol reference.
7675 case elfcpp::R_ARM_ABS32
:
7676 case elfcpp::R_ARM_ABS16
:
7677 case elfcpp::R_ARM_ABS12
:
7678 case elfcpp::R_ARM_THM_ABS5
:
7679 case elfcpp::R_ARM_ABS8
:
7680 case elfcpp::R_ARM_BASE_ABS
:
7681 case elfcpp::R_ARM_MOVW_ABS_NC
:
7682 case elfcpp::R_ARM_MOVT_ABS
:
7683 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7684 case elfcpp::R_ARM_THM_MOVT_ABS
:
7685 case elfcpp::R_ARM_ABS32_NOI
:
7686 return Symbol::ABSOLUTE_REF
;
7688 case elfcpp::R_ARM_REL32
:
7689 case elfcpp::R_ARM_LDR_PC_G0
:
7690 case elfcpp::R_ARM_SBREL32
:
7691 case elfcpp::R_ARM_THM_PC8
:
7692 case elfcpp::R_ARM_BASE_PREL
:
7693 case elfcpp::R_ARM_MOVW_PREL_NC
:
7694 case elfcpp::R_ARM_MOVT_PREL
:
7695 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7696 case elfcpp::R_ARM_THM_MOVT_PREL
:
7697 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7698 case elfcpp::R_ARM_THM_PC12
:
7699 case elfcpp::R_ARM_REL32_NOI
:
7700 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7701 case elfcpp::R_ARM_ALU_PC_G0
:
7702 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7703 case elfcpp::R_ARM_ALU_PC_G1
:
7704 case elfcpp::R_ARM_ALU_PC_G2
:
7705 case elfcpp::R_ARM_LDR_PC_G1
:
7706 case elfcpp::R_ARM_LDR_PC_G2
:
7707 case elfcpp::R_ARM_LDRS_PC_G0
:
7708 case elfcpp::R_ARM_LDRS_PC_G1
:
7709 case elfcpp::R_ARM_LDRS_PC_G2
:
7710 case elfcpp::R_ARM_LDC_PC_G0
:
7711 case elfcpp::R_ARM_LDC_PC_G1
:
7712 case elfcpp::R_ARM_LDC_PC_G2
:
7713 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7714 case elfcpp::R_ARM_ALU_SB_G0
:
7715 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7716 case elfcpp::R_ARM_ALU_SB_G1
:
7717 case elfcpp::R_ARM_ALU_SB_G2
:
7718 case elfcpp::R_ARM_LDR_SB_G0
:
7719 case elfcpp::R_ARM_LDR_SB_G1
:
7720 case elfcpp::R_ARM_LDR_SB_G2
:
7721 case elfcpp::R_ARM_LDRS_SB_G0
:
7722 case elfcpp::R_ARM_LDRS_SB_G1
:
7723 case elfcpp::R_ARM_LDRS_SB_G2
:
7724 case elfcpp::R_ARM_LDC_SB_G0
:
7725 case elfcpp::R_ARM_LDC_SB_G1
:
7726 case elfcpp::R_ARM_LDC_SB_G2
:
7727 case elfcpp::R_ARM_MOVW_BREL_NC
:
7728 case elfcpp::R_ARM_MOVT_BREL
:
7729 case elfcpp::R_ARM_MOVW_BREL
:
7730 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7731 case elfcpp::R_ARM_THM_MOVT_BREL
:
7732 case elfcpp::R_ARM_THM_MOVW_BREL
:
7733 case elfcpp::R_ARM_GOTOFF32
:
7734 case elfcpp::R_ARM_GOTOFF12
:
7735 case elfcpp::R_ARM_SBREL31
:
7736 return Symbol::RELATIVE_REF
;
7738 case elfcpp::R_ARM_PLT32
:
7739 case elfcpp::R_ARM_CALL
:
7740 case elfcpp::R_ARM_JUMP24
:
7741 case elfcpp::R_ARM_THM_CALL
:
7742 case elfcpp::R_ARM_THM_JUMP24
:
7743 case elfcpp::R_ARM_THM_JUMP19
:
7744 case elfcpp::R_ARM_THM_JUMP6
:
7745 case elfcpp::R_ARM_THM_JUMP11
:
7746 case elfcpp::R_ARM_THM_JUMP8
:
7747 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7748 // in unwind tables. It may point to functions via PLTs.
7749 // So we treat it like call/jump relocations above.
7750 case elfcpp::R_ARM_PREL31
:
7751 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
7753 case elfcpp::R_ARM_GOT_BREL
:
7754 case elfcpp::R_ARM_GOT_ABS
:
7755 case elfcpp::R_ARM_GOT_PREL
:
7757 return Symbol::ABSOLUTE_REF
;
7759 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7760 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7761 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7762 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7763 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7764 return Symbol::TLS_REF
;
7766 case elfcpp::R_ARM_TARGET1
:
7767 case elfcpp::R_ARM_TARGET2
:
7768 case elfcpp::R_ARM_COPY
:
7769 case elfcpp::R_ARM_GLOB_DAT
:
7770 case elfcpp::R_ARM_JUMP_SLOT
:
7771 case elfcpp::R_ARM_RELATIVE
:
7772 case elfcpp::R_ARM_PC24
:
7773 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7774 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7775 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7777 // Not expected. We will give an error later.
7782 // Report an unsupported relocation against a local symbol.
7784 template<bool big_endian
>
7786 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7787 Sized_relobj_file
<32, big_endian
>* object
,
7788 unsigned int r_type
)
7790 gold_error(_("%s: unsupported reloc %u against local symbol"),
7791 object
->name().c_str(), r_type
);
7794 // We are about to emit a dynamic relocation of type R_TYPE. If the
7795 // dynamic linker does not support it, issue an error. The GNU linker
7796 // only issues a non-PIC error for an allocated read-only section.
7797 // Here we know the section is allocated, but we don't know that it is
7798 // read-only. But we check for all the relocation types which the
7799 // glibc dynamic linker supports, so it seems appropriate to issue an
7800 // error even if the section is not read-only.
7802 template<bool big_endian
>
7804 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7805 unsigned int r_type
)
7809 // These are the relocation types supported by glibc for ARM.
7810 case elfcpp::R_ARM_RELATIVE
:
7811 case elfcpp::R_ARM_COPY
:
7812 case elfcpp::R_ARM_GLOB_DAT
:
7813 case elfcpp::R_ARM_JUMP_SLOT
:
7814 case elfcpp::R_ARM_ABS32
:
7815 case elfcpp::R_ARM_ABS32_NOI
:
7816 case elfcpp::R_ARM_PC24
:
7817 // FIXME: The following 3 types are not supported by Android's dynamic
7819 case elfcpp::R_ARM_TLS_DTPMOD32
:
7820 case elfcpp::R_ARM_TLS_DTPOFF32
:
7821 case elfcpp::R_ARM_TLS_TPOFF32
:
7826 // This prevents us from issuing more than one error per reloc
7827 // section. But we can still wind up issuing more than one
7828 // error per object file.
7829 if (this->issued_non_pic_error_
)
7831 const Arm_reloc_property
* reloc_property
=
7832 arm_reloc_property_table
->get_reloc_property(r_type
);
7833 gold_assert(reloc_property
!= NULL
);
7834 object
->error(_("requires unsupported dynamic reloc %s; "
7835 "recompile with -fPIC"),
7836 reloc_property
->name().c_str());
7837 this->issued_non_pic_error_
= true;
7841 case elfcpp::R_ARM_NONE
:
7846 // Scan a relocation for a local symbol.
7847 // FIXME: This only handles a subset of relocation types used by Android
7848 // on ARM v5te devices.
7850 template<bool big_endian
>
7852 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7855 Sized_relobj_file
<32, big_endian
>* object
,
7856 unsigned int data_shndx
,
7857 Output_section
* output_section
,
7858 const elfcpp::Rel
<32, big_endian
>& reloc
,
7859 unsigned int r_type
,
7860 const elfcpp::Sym
<32, big_endian
>& lsym
)
7862 r_type
= get_real_reloc_type(r_type
);
7865 case elfcpp::R_ARM_NONE
:
7866 case elfcpp::R_ARM_V4BX
:
7867 case elfcpp::R_ARM_GNU_VTENTRY
:
7868 case elfcpp::R_ARM_GNU_VTINHERIT
:
7871 case elfcpp::R_ARM_ABS32
:
7872 case elfcpp::R_ARM_ABS32_NOI
:
7873 // If building a shared library (or a position-independent
7874 // executable), we need to create a dynamic relocation for
7875 // this location. The relocation applied at link time will
7876 // apply the link-time value, so we flag the location with
7877 // an R_ARM_RELATIVE relocation so the dynamic loader can
7878 // relocate it easily.
7879 if (parameters
->options().output_is_position_independent())
7881 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7882 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7883 // If we are to add more other reloc types than R_ARM_ABS32,
7884 // we need to add check_non_pic(object, r_type) here.
7885 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7886 output_section
, data_shndx
,
7887 reloc
.get_r_offset());
7891 case elfcpp::R_ARM_ABS16
:
7892 case elfcpp::R_ARM_ABS12
:
7893 case elfcpp::R_ARM_THM_ABS5
:
7894 case elfcpp::R_ARM_ABS8
:
7895 case elfcpp::R_ARM_BASE_ABS
:
7896 case elfcpp::R_ARM_MOVW_ABS_NC
:
7897 case elfcpp::R_ARM_MOVT_ABS
:
7898 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7899 case elfcpp::R_ARM_THM_MOVT_ABS
:
7900 // If building a shared library (or a position-independent
7901 // executable), we need to create a dynamic relocation for
7902 // this location. Because the addend needs to remain in the
7903 // data section, we need to be careful not to apply this
7904 // relocation statically.
7905 if (parameters
->options().output_is_position_independent())
7907 check_non_pic(object
, r_type
);
7908 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7909 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7910 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7911 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7912 data_shndx
, reloc
.get_r_offset());
7915 gold_assert(lsym
.get_st_value() == 0);
7916 unsigned int shndx
= lsym
.get_st_shndx();
7918 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7921 object
->error(_("section symbol %u has bad shndx %u"),
7924 rel_dyn
->add_local_section(object
, shndx
,
7925 r_type
, output_section
,
7926 data_shndx
, reloc
.get_r_offset());
7931 case elfcpp::R_ARM_REL32
:
7932 case elfcpp::R_ARM_LDR_PC_G0
:
7933 case elfcpp::R_ARM_SBREL32
:
7934 case elfcpp::R_ARM_THM_CALL
:
7935 case elfcpp::R_ARM_THM_PC8
:
7936 case elfcpp::R_ARM_BASE_PREL
:
7937 case elfcpp::R_ARM_PLT32
:
7938 case elfcpp::R_ARM_CALL
:
7939 case elfcpp::R_ARM_JUMP24
:
7940 case elfcpp::R_ARM_THM_JUMP24
:
7941 case elfcpp::R_ARM_SBREL31
:
7942 case elfcpp::R_ARM_PREL31
:
7943 case elfcpp::R_ARM_MOVW_PREL_NC
:
7944 case elfcpp::R_ARM_MOVT_PREL
:
7945 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7946 case elfcpp::R_ARM_THM_MOVT_PREL
:
7947 case elfcpp::R_ARM_THM_JUMP19
:
7948 case elfcpp::R_ARM_THM_JUMP6
:
7949 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7950 case elfcpp::R_ARM_THM_PC12
:
7951 case elfcpp::R_ARM_REL32_NOI
:
7952 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7953 case elfcpp::R_ARM_ALU_PC_G0
:
7954 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7955 case elfcpp::R_ARM_ALU_PC_G1
:
7956 case elfcpp::R_ARM_ALU_PC_G2
:
7957 case elfcpp::R_ARM_LDR_PC_G1
:
7958 case elfcpp::R_ARM_LDR_PC_G2
:
7959 case elfcpp::R_ARM_LDRS_PC_G0
:
7960 case elfcpp::R_ARM_LDRS_PC_G1
:
7961 case elfcpp::R_ARM_LDRS_PC_G2
:
7962 case elfcpp::R_ARM_LDC_PC_G0
:
7963 case elfcpp::R_ARM_LDC_PC_G1
:
7964 case elfcpp::R_ARM_LDC_PC_G2
:
7965 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7966 case elfcpp::R_ARM_ALU_SB_G0
:
7967 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7968 case elfcpp::R_ARM_ALU_SB_G1
:
7969 case elfcpp::R_ARM_ALU_SB_G2
:
7970 case elfcpp::R_ARM_LDR_SB_G0
:
7971 case elfcpp::R_ARM_LDR_SB_G1
:
7972 case elfcpp::R_ARM_LDR_SB_G2
:
7973 case elfcpp::R_ARM_LDRS_SB_G0
:
7974 case elfcpp::R_ARM_LDRS_SB_G1
:
7975 case elfcpp::R_ARM_LDRS_SB_G2
:
7976 case elfcpp::R_ARM_LDC_SB_G0
:
7977 case elfcpp::R_ARM_LDC_SB_G1
:
7978 case elfcpp::R_ARM_LDC_SB_G2
:
7979 case elfcpp::R_ARM_MOVW_BREL_NC
:
7980 case elfcpp::R_ARM_MOVT_BREL
:
7981 case elfcpp::R_ARM_MOVW_BREL
:
7982 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7983 case elfcpp::R_ARM_THM_MOVT_BREL
:
7984 case elfcpp::R_ARM_THM_MOVW_BREL
:
7985 case elfcpp::R_ARM_THM_JUMP11
:
7986 case elfcpp::R_ARM_THM_JUMP8
:
7987 // We don't need to do anything for a relative addressing relocation
7988 // against a local symbol if it does not reference the GOT.
7991 case elfcpp::R_ARM_GOTOFF32
:
7992 case elfcpp::R_ARM_GOTOFF12
:
7993 // We need a GOT section:
7994 target
->got_section(symtab
, layout
);
7997 case elfcpp::R_ARM_GOT_BREL
:
7998 case elfcpp::R_ARM_GOT_PREL
:
8000 // The symbol requires a GOT entry.
8001 Arm_output_data_got
<big_endian
>* got
=
8002 target
->got_section(symtab
, layout
);
8003 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8004 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8006 // If we are generating a shared object, we need to add a
8007 // dynamic RELATIVE relocation for this symbol's GOT entry.
8008 if (parameters
->options().output_is_position_independent())
8010 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8011 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8012 rel_dyn
->add_local_relative(
8013 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8014 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8020 case elfcpp::R_ARM_TARGET1
:
8021 case elfcpp::R_ARM_TARGET2
:
8022 // This should have been mapped to another type already.
8024 case elfcpp::R_ARM_COPY
:
8025 case elfcpp::R_ARM_GLOB_DAT
:
8026 case elfcpp::R_ARM_JUMP_SLOT
:
8027 case elfcpp::R_ARM_RELATIVE
:
8028 // These are relocations which should only be seen by the
8029 // dynamic linker, and should never be seen here.
8030 gold_error(_("%s: unexpected reloc %u in object file"),
8031 object
->name().c_str(), r_type
);
8035 // These are initial TLS relocs, which are expected when
8037 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8038 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8039 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8040 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8041 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8043 bool output_is_shared
= parameters
->options().shared();
8044 const tls::Tls_optimization optimized_type
8045 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8049 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8050 if (optimized_type
== tls::TLSOPT_NONE
)
8052 // Create a pair of GOT entries for the module index and
8053 // dtv-relative offset.
8054 Arm_output_data_got
<big_endian
>* got
8055 = target
->got_section(symtab
, layout
);
8056 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8057 unsigned int shndx
= lsym
.get_st_shndx();
8059 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8062 object
->error(_("local symbol %u has bad shndx %u"),
8067 if (!parameters
->doing_static_link())
8068 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8070 target
->rel_dyn_section(layout
),
8071 elfcpp::R_ARM_TLS_DTPMOD32
, 0);
8073 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8077 // FIXME: TLS optimization not supported yet.
8081 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8082 if (optimized_type
== tls::TLSOPT_NONE
)
8084 // Create a GOT entry for the module index.
8085 target
->got_mod_index_entry(symtab
, layout
, object
);
8088 // FIXME: TLS optimization not supported yet.
8092 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8095 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8096 layout
->set_has_static_tls();
8097 if (optimized_type
== tls::TLSOPT_NONE
)
8099 // Create a GOT entry for the tp-relative offset.
8100 Arm_output_data_got
<big_endian
>* got
8101 = target
->got_section(symtab
, layout
);
8102 unsigned int r_sym
=
8103 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8104 if (!parameters
->doing_static_link())
8105 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8106 target
->rel_dyn_section(layout
),
8107 elfcpp::R_ARM_TLS_TPOFF32
);
8108 else if (!object
->local_has_got_offset(r_sym
,
8109 GOT_TYPE_TLS_OFFSET
))
8111 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8112 unsigned int got_offset
=
8113 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8114 got
->add_static_reloc(got_offset
,
8115 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8120 // FIXME: TLS optimization not supported yet.
8124 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8125 layout
->set_has_static_tls();
8126 if (output_is_shared
)
8128 // We need to create a dynamic relocation.
8129 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8130 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8131 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8132 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8133 output_section
, data_shndx
,
8134 reloc
.get_r_offset());
8144 case elfcpp::R_ARM_PC24
:
8145 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8146 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8147 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8149 unsupported_reloc_local(object
, r_type
);
8154 // Report an unsupported relocation against a global symbol.
8156 template<bool big_endian
>
8158 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8159 Sized_relobj_file
<32, big_endian
>* object
,
8160 unsigned int r_type
,
8163 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8164 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8167 template<bool big_endian
>
8169 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8170 unsigned int r_type
)
8174 case elfcpp::R_ARM_PC24
:
8175 case elfcpp::R_ARM_THM_CALL
:
8176 case elfcpp::R_ARM_PLT32
:
8177 case elfcpp::R_ARM_CALL
:
8178 case elfcpp::R_ARM_JUMP24
:
8179 case elfcpp::R_ARM_THM_JUMP24
:
8180 case elfcpp::R_ARM_SBREL31
:
8181 case elfcpp::R_ARM_PREL31
:
8182 case elfcpp::R_ARM_THM_JUMP19
:
8183 case elfcpp::R_ARM_THM_JUMP6
:
8184 case elfcpp::R_ARM_THM_JUMP11
:
8185 case elfcpp::R_ARM_THM_JUMP8
:
8186 // All the relocations above are branches except SBREL31 and PREL31.
8190 // Be conservative and assume this is a function pointer.
8195 template<bool big_endian
>
8197 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8200 Target_arm
<big_endian
>* target
,
8201 Sized_relobj_file
<32, big_endian
>*,
8204 const elfcpp::Rel
<32, big_endian
>&,
8205 unsigned int r_type
,
8206 const elfcpp::Sym
<32, big_endian
>&)
8208 r_type
= target
->get_real_reloc_type(r_type
);
8209 return possible_function_pointer_reloc(r_type
);
8212 template<bool big_endian
>
8214 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8217 Target_arm
<big_endian
>* target
,
8218 Sized_relobj_file
<32, big_endian
>*,
8221 const elfcpp::Rel
<32, big_endian
>&,
8222 unsigned int r_type
,
8225 // GOT is not a function.
8226 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8229 r_type
= target
->get_real_reloc_type(r_type
);
8230 return possible_function_pointer_reloc(r_type
);
8233 // Scan a relocation for a global symbol.
8235 template<bool big_endian
>
8237 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8240 Sized_relobj_file
<32, big_endian
>* object
,
8241 unsigned int data_shndx
,
8242 Output_section
* output_section
,
8243 const elfcpp::Rel
<32, big_endian
>& reloc
,
8244 unsigned int r_type
,
8247 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8248 // section. We check here to avoid creating a dynamic reloc against
8249 // _GLOBAL_OFFSET_TABLE_.
8250 if (!target
->has_got_section()
8251 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8252 target
->got_section(symtab
, layout
);
8254 r_type
= get_real_reloc_type(r_type
);
8257 case elfcpp::R_ARM_NONE
:
8258 case elfcpp::R_ARM_V4BX
:
8259 case elfcpp::R_ARM_GNU_VTENTRY
:
8260 case elfcpp::R_ARM_GNU_VTINHERIT
:
8263 case elfcpp::R_ARM_ABS32
:
8264 case elfcpp::R_ARM_ABS16
:
8265 case elfcpp::R_ARM_ABS12
:
8266 case elfcpp::R_ARM_THM_ABS5
:
8267 case elfcpp::R_ARM_ABS8
:
8268 case elfcpp::R_ARM_BASE_ABS
:
8269 case elfcpp::R_ARM_MOVW_ABS_NC
:
8270 case elfcpp::R_ARM_MOVT_ABS
:
8271 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8272 case elfcpp::R_ARM_THM_MOVT_ABS
:
8273 case elfcpp::R_ARM_ABS32_NOI
:
8274 // Absolute addressing relocations.
8276 // Make a PLT entry if necessary.
8277 if (this->symbol_needs_plt_entry(gsym
))
8279 target
->make_plt_entry(symtab
, layout
, gsym
);
8280 // Since this is not a PC-relative relocation, we may be
8281 // taking the address of a function. In that case we need to
8282 // set the entry in the dynamic symbol table to the address of
8284 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8285 gsym
->set_needs_dynsym_value();
8287 // Make a dynamic relocation if necessary.
8288 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8290 if (gsym
->may_need_copy_reloc())
8292 target
->copy_reloc(symtab
, layout
, object
,
8293 data_shndx
, output_section
, gsym
, reloc
);
8295 else if ((r_type
== elfcpp::R_ARM_ABS32
8296 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8297 && gsym
->can_use_relative_reloc(false))
8299 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8300 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8301 output_section
, object
,
8302 data_shndx
, reloc
.get_r_offset());
8306 check_non_pic(object
, r_type
);
8307 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8308 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8309 data_shndx
, reloc
.get_r_offset());
8315 case elfcpp::R_ARM_GOTOFF32
:
8316 case elfcpp::R_ARM_GOTOFF12
:
8317 // We need a GOT section.
8318 target
->got_section(symtab
, layout
);
8321 case elfcpp::R_ARM_REL32
:
8322 case elfcpp::R_ARM_LDR_PC_G0
:
8323 case elfcpp::R_ARM_SBREL32
:
8324 case elfcpp::R_ARM_THM_PC8
:
8325 case elfcpp::R_ARM_BASE_PREL
:
8326 case elfcpp::R_ARM_MOVW_PREL_NC
:
8327 case elfcpp::R_ARM_MOVT_PREL
:
8328 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8329 case elfcpp::R_ARM_THM_MOVT_PREL
:
8330 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8331 case elfcpp::R_ARM_THM_PC12
:
8332 case elfcpp::R_ARM_REL32_NOI
:
8333 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8334 case elfcpp::R_ARM_ALU_PC_G0
:
8335 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8336 case elfcpp::R_ARM_ALU_PC_G1
:
8337 case elfcpp::R_ARM_ALU_PC_G2
:
8338 case elfcpp::R_ARM_LDR_PC_G1
:
8339 case elfcpp::R_ARM_LDR_PC_G2
:
8340 case elfcpp::R_ARM_LDRS_PC_G0
:
8341 case elfcpp::R_ARM_LDRS_PC_G1
:
8342 case elfcpp::R_ARM_LDRS_PC_G2
:
8343 case elfcpp::R_ARM_LDC_PC_G0
:
8344 case elfcpp::R_ARM_LDC_PC_G1
:
8345 case elfcpp::R_ARM_LDC_PC_G2
:
8346 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8347 case elfcpp::R_ARM_ALU_SB_G0
:
8348 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8349 case elfcpp::R_ARM_ALU_SB_G1
:
8350 case elfcpp::R_ARM_ALU_SB_G2
:
8351 case elfcpp::R_ARM_LDR_SB_G0
:
8352 case elfcpp::R_ARM_LDR_SB_G1
:
8353 case elfcpp::R_ARM_LDR_SB_G2
:
8354 case elfcpp::R_ARM_LDRS_SB_G0
:
8355 case elfcpp::R_ARM_LDRS_SB_G1
:
8356 case elfcpp::R_ARM_LDRS_SB_G2
:
8357 case elfcpp::R_ARM_LDC_SB_G0
:
8358 case elfcpp::R_ARM_LDC_SB_G1
:
8359 case elfcpp::R_ARM_LDC_SB_G2
:
8360 case elfcpp::R_ARM_MOVW_BREL_NC
:
8361 case elfcpp::R_ARM_MOVT_BREL
:
8362 case elfcpp::R_ARM_MOVW_BREL
:
8363 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8364 case elfcpp::R_ARM_THM_MOVT_BREL
:
8365 case elfcpp::R_ARM_THM_MOVW_BREL
:
8366 // Relative addressing relocations.
8368 // Make a dynamic relocation if necessary.
8369 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8371 if (target
->may_need_copy_reloc(gsym
))
8373 target
->copy_reloc(symtab
, layout
, object
,
8374 data_shndx
, output_section
, gsym
, reloc
);
8378 check_non_pic(object
, r_type
);
8379 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8380 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8381 data_shndx
, reloc
.get_r_offset());
8387 case elfcpp::R_ARM_THM_CALL
:
8388 case elfcpp::R_ARM_PLT32
:
8389 case elfcpp::R_ARM_CALL
:
8390 case elfcpp::R_ARM_JUMP24
:
8391 case elfcpp::R_ARM_THM_JUMP24
:
8392 case elfcpp::R_ARM_SBREL31
:
8393 case elfcpp::R_ARM_PREL31
:
8394 case elfcpp::R_ARM_THM_JUMP19
:
8395 case elfcpp::R_ARM_THM_JUMP6
:
8396 case elfcpp::R_ARM_THM_JUMP11
:
8397 case elfcpp::R_ARM_THM_JUMP8
:
8398 // All the relocation above are branches except for the PREL31 ones.
8399 // A PREL31 relocation can point to a personality function in a shared
8400 // library. In that case we want to use a PLT because we want to
8401 // call the personality routine and the dynamic linkers we care about
8402 // do not support dynamic PREL31 relocations. An REL31 relocation may
8403 // point to a function whose unwinding behaviour is being described but
8404 // we will not mistakenly generate a PLT for that because we should use
8405 // a local section symbol.
8407 // If the symbol is fully resolved, this is just a relative
8408 // local reloc. Otherwise we need a PLT entry.
8409 if (gsym
->final_value_is_known())
8411 // If building a shared library, we can also skip the PLT entry
8412 // if the symbol is defined in the output file and is protected
8414 if (gsym
->is_defined()
8415 && !gsym
->is_from_dynobj()
8416 && !gsym
->is_preemptible())
8418 target
->make_plt_entry(symtab
, layout
, gsym
);
8421 case elfcpp::R_ARM_GOT_BREL
:
8422 case elfcpp::R_ARM_GOT_ABS
:
8423 case elfcpp::R_ARM_GOT_PREL
:
8425 // The symbol requires a GOT entry.
8426 Arm_output_data_got
<big_endian
>* got
=
8427 target
->got_section(symtab
, layout
);
8428 if (gsym
->final_value_is_known())
8429 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
8432 // If this symbol is not fully resolved, we need to add a
8433 // GOT entry with a dynamic relocation.
8434 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8435 if (gsym
->is_from_dynobj()
8436 || gsym
->is_undefined()
8437 || gsym
->is_preemptible()
8438 || (gsym
->visibility() == elfcpp::STV_PROTECTED
8439 && parameters
->options().shared()))
8440 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
8441 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
8444 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
8445 rel_dyn
->add_global_relative(
8446 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
8447 gsym
->got_offset(GOT_TYPE_STANDARD
));
8453 case elfcpp::R_ARM_TARGET1
:
8454 case elfcpp::R_ARM_TARGET2
:
8455 // These should have been mapped to other types already.
8457 case elfcpp::R_ARM_COPY
:
8458 case elfcpp::R_ARM_GLOB_DAT
:
8459 case elfcpp::R_ARM_JUMP_SLOT
:
8460 case elfcpp::R_ARM_RELATIVE
:
8461 // These are relocations which should only be seen by the
8462 // dynamic linker, and should never be seen here.
8463 gold_error(_("%s: unexpected reloc %u in object file"),
8464 object
->name().c_str(), r_type
);
8467 // These are initial tls relocs, which are expected when
8469 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8470 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8471 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8472 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8473 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8475 const bool is_final
= gsym
->final_value_is_known();
8476 const tls::Tls_optimization optimized_type
8477 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8480 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8481 if (optimized_type
== tls::TLSOPT_NONE
)
8483 // Create a pair of GOT entries for the module index and
8484 // dtv-relative offset.
8485 Arm_output_data_got
<big_endian
>* got
8486 = target
->got_section(symtab
, layout
);
8487 if (!parameters
->doing_static_link())
8488 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
8489 target
->rel_dyn_section(layout
),
8490 elfcpp::R_ARM_TLS_DTPMOD32
,
8491 elfcpp::R_ARM_TLS_DTPOFF32
);
8493 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
8496 // FIXME: TLS optimization not supported yet.
8500 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8501 if (optimized_type
== tls::TLSOPT_NONE
)
8503 // Create a GOT entry for the module index.
8504 target
->got_mod_index_entry(symtab
, layout
, object
);
8507 // FIXME: TLS optimization not supported yet.
8511 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8514 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8515 layout
->set_has_static_tls();
8516 if (optimized_type
== tls::TLSOPT_NONE
)
8518 // Create a GOT entry for the tp-relative offset.
8519 Arm_output_data_got
<big_endian
>* got
8520 = target
->got_section(symtab
, layout
);
8521 if (!parameters
->doing_static_link())
8522 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
8523 target
->rel_dyn_section(layout
),
8524 elfcpp::R_ARM_TLS_TPOFF32
);
8525 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
8527 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
8528 unsigned int got_offset
=
8529 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
8530 got
->add_static_reloc(got_offset
,
8531 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
8535 // FIXME: TLS optimization not supported yet.
8539 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8540 layout
->set_has_static_tls();
8541 if (parameters
->options().shared())
8543 // We need to create a dynamic relocation.
8544 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8545 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8546 output_section
, object
,
8547 data_shndx
, reloc
.get_r_offset());
8557 case elfcpp::R_ARM_PC24
:
8558 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8559 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8560 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8562 unsupported_reloc_global(object
, r_type
, gsym
);
8567 // Process relocations for gc.
8569 template<bool big_endian
>
8571 Target_arm
<big_endian
>::gc_process_relocs(
8572 Symbol_table
* symtab
,
8574 Sized_relobj_file
<32, big_endian
>* object
,
8575 unsigned int data_shndx
,
8577 const unsigned char* prelocs
,
8579 Output_section
* output_section
,
8580 bool needs_special_offset_handling
,
8581 size_t local_symbol_count
,
8582 const unsigned char* plocal_symbols
)
8584 typedef Target_arm
<big_endian
> Arm
;
8585 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8587 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
8588 typename
Target_arm::Relocatable_size_for_reloc
>(
8597 needs_special_offset_handling
,
8602 // Scan relocations for a section.
8604 template<bool big_endian
>
8606 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8608 Sized_relobj_file
<32, big_endian
>* object
,
8609 unsigned int data_shndx
,
8610 unsigned int sh_type
,
8611 const unsigned char* prelocs
,
8613 Output_section
* output_section
,
8614 bool needs_special_offset_handling
,
8615 size_t local_symbol_count
,
8616 const unsigned char* plocal_symbols
)
8618 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8619 if (sh_type
== elfcpp::SHT_RELA
)
8621 gold_error(_("%s: unsupported RELA reloc section"),
8622 object
->name().c_str());
8626 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8635 needs_special_offset_handling
,
8640 // Finalize the sections.
8642 template<bool big_endian
>
8644 Target_arm
<big_endian
>::do_finalize_sections(
8646 const Input_objects
* input_objects
,
8649 bool merged_any_attributes
= false;
8650 // Merge processor-specific flags.
8651 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8652 p
!= input_objects
->relobj_end();
8655 Arm_relobj
<big_endian
>* arm_relobj
=
8656 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8657 if (arm_relobj
->merge_flags_and_attributes())
8659 this->merge_processor_specific_flags(
8661 arm_relobj
->processor_specific_flags());
8662 this->merge_object_attributes(arm_relobj
->name().c_str(),
8663 arm_relobj
->attributes_section_data());
8664 merged_any_attributes
= true;
8668 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8669 p
!= input_objects
->dynobj_end();
8672 Arm_dynobj
<big_endian
>* arm_dynobj
=
8673 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8674 this->merge_processor_specific_flags(
8676 arm_dynobj
->processor_specific_flags());
8677 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8678 arm_dynobj
->attributes_section_data());
8679 merged_any_attributes
= true;
8682 // Create an empty uninitialized attribute section if we still don't have it
8683 // at this moment. This happens if there is no attributes sections in all
8685 if (this->attributes_section_data_
== NULL
)
8686 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8688 const Object_attribute
* cpu_arch_attr
=
8689 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8690 // Check if we need to use Cortex-A8 workaround.
8691 if (parameters
->options().user_set_fix_cortex_a8())
8692 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8695 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8696 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8698 const Object_attribute
* cpu_arch_profile_attr
=
8699 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8700 this->fix_cortex_a8_
=
8701 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8702 && (cpu_arch_profile_attr
->int_value() == 'A'
8703 || cpu_arch_profile_attr
->int_value() == 0));
8706 // Check if we can use V4BX interworking.
8707 // The V4BX interworking stub contains BX instruction,
8708 // which is not specified for some profiles.
8709 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8710 && !this->may_use_v4t_interworking())
8711 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8712 "the target profile does not support BX instruction"));
8714 // Fill in some more dynamic tags.
8715 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8717 : this->plt_
->rel_plt());
8718 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8719 this->rel_dyn_
, true, false);
8721 // Emit any relocs we saved in an attempt to avoid generating COPY
8723 if (this->copy_relocs_
.any_saved_relocs())
8724 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8726 // Handle the .ARM.exidx section.
8727 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8729 if (!parameters
->options().relocatable())
8731 if (exidx_section
!= NULL
8732 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
8734 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8735 // the .ARM.exidx section.
8736 if (!layout
->script_options()->saw_phdrs_clause())
8738 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
8741 Output_segment
* exidx_segment
=
8742 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8743 exidx_segment
->add_output_section_to_nonload(exidx_section
,
8749 // Create an .ARM.attributes section if we have merged any attributes
8751 if (merged_any_attributes
)
8753 Output_attributes_section_data
* attributes_section
=
8754 new Output_attributes_section_data(*this->attributes_section_data_
);
8755 layout
->add_output_section_data(".ARM.attributes",
8756 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8757 attributes_section
, ORDER_INVALID
,
8761 // Fix up links in section EXIDX headers.
8762 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
8763 p
!= layout
->section_list().end();
8765 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
8767 Arm_output_section
<big_endian
>* os
=
8768 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
8769 os
->set_exidx_section_link();
8773 // Return whether a direct absolute static relocation needs to be applied.
8774 // In cases where Scan::local() or Scan::global() has created
8775 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8776 // of the relocation is carried in the data, and we must not
8777 // apply the static relocation.
8779 template<bool big_endian
>
8781 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8782 const Sized_symbol
<32>* gsym
,
8783 unsigned int r_type
,
8785 Output_section
* output_section
)
8787 // If the output section is not allocated, then we didn't call
8788 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8790 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8793 int ref_flags
= Scan::get_reference_flags(r_type
);
8795 // For local symbols, we will have created a non-RELATIVE dynamic
8796 // relocation only if (a) the output is position independent,
8797 // (b) the relocation is absolute (not pc- or segment-relative), and
8798 // (c) the relocation is not 32 bits wide.
8800 return !(parameters
->options().output_is_position_independent()
8801 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8804 // For global symbols, we use the same helper routines used in the
8805 // scan pass. If we did not create a dynamic relocation, or if we
8806 // created a RELATIVE dynamic relocation, we should apply the static
8808 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8809 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8810 && gsym
->can_use_relative_reloc(ref_flags
8811 & Symbol::FUNCTION_CALL
);
8812 return !has_dyn
|| is_rel
;
8815 // Perform a relocation.
8817 template<bool big_endian
>
8819 Target_arm
<big_endian
>::Relocate::relocate(
8820 const Relocate_info
<32, big_endian
>* relinfo
,
8822 Output_section
* output_section
,
8824 const elfcpp::Rel
<32, big_endian
>& rel
,
8825 unsigned int r_type
,
8826 const Sized_symbol
<32>* gsym
,
8827 const Symbol_value
<32>* psymval
,
8828 unsigned char* view
,
8829 Arm_address address
,
8830 section_size_type view_size
)
8832 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8834 r_type
= get_real_reloc_type(r_type
);
8835 const Arm_reloc_property
* reloc_property
=
8836 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8837 if (reloc_property
== NULL
)
8839 std::string reloc_name
=
8840 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8841 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8842 _("cannot relocate %s in object file"),
8843 reloc_name
.c_str());
8847 const Arm_relobj
<big_endian
>* object
=
8848 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8850 // If the final branch target of a relocation is THUMB instruction, this
8851 // is 1. Otherwise it is 0.
8852 Arm_address thumb_bit
= 0;
8853 Symbol_value
<32> symval
;
8854 bool is_weakly_undefined_without_plt
= false;
8855 bool have_got_offset
= false;
8856 unsigned int got_offset
= 0;
8858 // If the relocation uses the GOT entry of a symbol instead of the symbol
8859 // itself, we don't care about whether the symbol is defined or what kind
8861 if (reloc_property
->uses_got_entry())
8863 // Get the GOT offset.
8864 // The GOT pointer points to the end of the GOT section.
8865 // We need to subtract the size of the GOT section to get
8866 // the actual offset to use in the relocation.
8867 // TODO: We should move GOT offset computing code in TLS relocations
8871 case elfcpp::R_ARM_GOT_BREL
:
8872 case elfcpp::R_ARM_GOT_PREL
:
8875 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8876 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8877 - target
->got_size());
8881 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8882 gold_assert(object
->local_has_got_offset(r_sym
,
8883 GOT_TYPE_STANDARD
));
8884 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8885 - target
->got_size());
8887 have_got_offset
= true;
8894 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8898 // This is a global symbol. Determine if we use PLT and if the
8899 // final target is THUMB.
8900 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
8902 // This uses a PLT, change the symbol value.
8903 symval
.set_output_value(target
->plt_section()->address()
8904 + gsym
->plt_offset());
8907 else if (gsym
->is_weak_undefined())
8909 // This is a weakly undefined symbol and we do not use PLT
8910 // for this relocation. A branch targeting this symbol will
8911 // be converted into an NOP.
8912 is_weakly_undefined_without_plt
= true;
8914 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
8916 // This relocation uses the symbol value but the symbol is
8917 // undefined. Exit early and have the caller reporting an
8923 // Set thumb bit if symbol:
8924 // -Has type STT_ARM_TFUNC or
8925 // -Has type STT_FUNC, is defined and with LSB in value set.
8927 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8928 || (gsym
->type() == elfcpp::STT_FUNC
8929 && !gsym
->is_undefined()
8930 && ((psymval
->value(object
, 0) & 1) != 0)))
8937 // This is a local symbol. Determine if the final target is THUMB.
8938 // We saved this information when all the local symbols were read.
8939 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8940 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8941 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8946 // This is a fake relocation synthesized for a stub. It does not have
8947 // a real symbol. We just look at the LSB of the symbol value to
8948 // determine if the target is THUMB or not.
8949 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8952 // Strip LSB if this points to a THUMB target.
8954 && reloc_property
->uses_thumb_bit()
8955 && ((psymval
->value(object
, 0) & 1) != 0))
8957 Arm_address stripped_value
=
8958 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8959 symval
.set_output_value(stripped_value
);
8963 // To look up relocation stubs, we need to pass the symbol table index of
8965 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8967 // Get the addressing origin of the output segment defining the
8968 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8969 Arm_address sym_origin
= 0;
8970 if (reloc_property
->uses_symbol_base())
8972 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8973 // R_ARM_BASE_ABS with the NULL symbol will give the
8974 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8975 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8976 sym_origin
= target
->got_plt_section()->address();
8977 else if (gsym
== NULL
)
8979 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8980 sym_origin
= gsym
->output_segment()->vaddr();
8981 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
8982 sym_origin
= gsym
->output_data()->address();
8984 // TODO: Assumes the segment base to be zero for the global symbols
8985 // till the proper support for the segment-base-relative addressing
8986 // will be implemented. This is consistent with GNU ld.
8989 // For relative addressing relocation, find out the relative address base.
8990 Arm_address relative_address_base
= 0;
8991 switch(reloc_property
->relative_address_base())
8993 case Arm_reloc_property::RAB_NONE
:
8994 // Relocations with relative address bases RAB_TLS and RAB_tp are
8995 // handled by relocate_tls. So we do not need to do anything here.
8996 case Arm_reloc_property::RAB_TLS
:
8997 case Arm_reloc_property::RAB_tp
:
8999 case Arm_reloc_property::RAB_B_S
:
9000 relative_address_base
= sym_origin
;
9002 case Arm_reloc_property::RAB_GOT_ORG
:
9003 relative_address_base
= target
->got_plt_section()->address();
9005 case Arm_reloc_property::RAB_P
:
9006 relative_address_base
= address
;
9008 case Arm_reloc_property::RAB_Pa
:
9009 relative_address_base
= address
& 0xfffffffcU
;
9015 typename
Arm_relocate_functions::Status reloc_status
=
9016 Arm_relocate_functions::STATUS_OKAY
;
9017 bool check_overflow
= reloc_property
->checks_overflow();
9020 case elfcpp::R_ARM_NONE
:
9023 case elfcpp::R_ARM_ABS8
:
9024 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9025 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9028 case elfcpp::R_ARM_ABS12
:
9029 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9030 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9033 case elfcpp::R_ARM_ABS16
:
9034 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9035 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9038 case elfcpp::R_ARM_ABS32
:
9039 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9040 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9044 case elfcpp::R_ARM_ABS32_NOI
:
9045 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9046 // No thumb bit for this relocation: (S + A)
9047 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9051 case elfcpp::R_ARM_MOVW_ABS_NC
:
9052 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9053 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9058 case elfcpp::R_ARM_MOVT_ABS
:
9059 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9060 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9063 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9064 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9065 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9066 0, thumb_bit
, false);
9069 case elfcpp::R_ARM_THM_MOVT_ABS
:
9070 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9071 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9075 case elfcpp::R_ARM_MOVW_PREL_NC
:
9076 case elfcpp::R_ARM_MOVW_BREL_NC
:
9077 case elfcpp::R_ARM_MOVW_BREL
:
9079 Arm_relocate_functions::movw(view
, object
, psymval
,
9080 relative_address_base
, thumb_bit
,
9084 case elfcpp::R_ARM_MOVT_PREL
:
9085 case elfcpp::R_ARM_MOVT_BREL
:
9087 Arm_relocate_functions::movt(view
, object
, psymval
,
9088 relative_address_base
);
9091 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9092 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9093 case elfcpp::R_ARM_THM_MOVW_BREL
:
9095 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9096 relative_address_base
,
9097 thumb_bit
, check_overflow
);
9100 case elfcpp::R_ARM_THM_MOVT_PREL
:
9101 case elfcpp::R_ARM_THM_MOVT_BREL
:
9103 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9104 relative_address_base
);
9107 case elfcpp::R_ARM_REL32
:
9108 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9109 address
, thumb_bit
);
9112 case elfcpp::R_ARM_THM_ABS5
:
9113 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9114 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9117 // Thumb long branches.
9118 case elfcpp::R_ARM_THM_CALL
:
9119 case elfcpp::R_ARM_THM_XPC22
:
9120 case elfcpp::R_ARM_THM_JUMP24
:
9122 Arm_relocate_functions::thumb_branch_common(
9123 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9124 thumb_bit
, is_weakly_undefined_without_plt
);
9127 case elfcpp::R_ARM_GOTOFF32
:
9129 Arm_address got_origin
;
9130 got_origin
= target
->got_plt_section()->address();
9131 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9132 got_origin
, thumb_bit
);
9136 case elfcpp::R_ARM_BASE_PREL
:
9137 gold_assert(gsym
!= NULL
);
9139 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9142 case elfcpp::R_ARM_BASE_ABS
:
9143 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9144 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9147 case elfcpp::R_ARM_GOT_BREL
:
9148 gold_assert(have_got_offset
);
9149 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9152 case elfcpp::R_ARM_GOT_PREL
:
9153 gold_assert(have_got_offset
);
9154 // Get the address origin for GOT PLT, which is allocated right
9155 // after the GOT section, to calculate an absolute address of
9156 // the symbol GOT entry (got_origin + got_offset).
9157 Arm_address got_origin
;
9158 got_origin
= target
->got_plt_section()->address();
9159 reloc_status
= Arm_relocate_functions::got_prel(view
,
9160 got_origin
+ got_offset
,
9164 case elfcpp::R_ARM_PLT32
:
9165 case elfcpp::R_ARM_CALL
:
9166 case elfcpp::R_ARM_JUMP24
:
9167 case elfcpp::R_ARM_XPC25
:
9168 gold_assert(gsym
== NULL
9169 || gsym
->has_plt_offset()
9170 || gsym
->final_value_is_known()
9171 || (gsym
->is_defined()
9172 && !gsym
->is_from_dynobj()
9173 && !gsym
->is_preemptible()));
9175 Arm_relocate_functions::arm_branch_common(
9176 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9177 thumb_bit
, is_weakly_undefined_without_plt
);
9180 case elfcpp::R_ARM_THM_JUMP19
:
9182 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9186 case elfcpp::R_ARM_THM_JUMP6
:
9188 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9191 case elfcpp::R_ARM_THM_JUMP8
:
9193 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9196 case elfcpp::R_ARM_THM_JUMP11
:
9198 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9201 case elfcpp::R_ARM_PREL31
:
9202 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9203 address
, thumb_bit
);
9206 case elfcpp::R_ARM_V4BX
:
9207 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9209 const bool is_v4bx_interworking
=
9210 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9212 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9213 is_v4bx_interworking
);
9217 case elfcpp::R_ARM_THM_PC8
:
9219 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9222 case elfcpp::R_ARM_THM_PC12
:
9224 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9227 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9229 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9233 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9234 case elfcpp::R_ARM_ALU_PC_G0
:
9235 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9236 case elfcpp::R_ARM_ALU_PC_G1
:
9237 case elfcpp::R_ARM_ALU_PC_G2
:
9238 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9239 case elfcpp::R_ARM_ALU_SB_G0
:
9240 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9241 case elfcpp::R_ARM_ALU_SB_G1
:
9242 case elfcpp::R_ARM_ALU_SB_G2
:
9244 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9245 reloc_property
->group_index(),
9246 relative_address_base
,
9247 thumb_bit
, check_overflow
);
9250 case elfcpp::R_ARM_LDR_PC_G0
:
9251 case elfcpp::R_ARM_LDR_PC_G1
:
9252 case elfcpp::R_ARM_LDR_PC_G2
:
9253 case elfcpp::R_ARM_LDR_SB_G0
:
9254 case elfcpp::R_ARM_LDR_SB_G1
:
9255 case elfcpp::R_ARM_LDR_SB_G2
:
9257 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9258 reloc_property
->group_index(),
9259 relative_address_base
);
9262 case elfcpp::R_ARM_LDRS_PC_G0
:
9263 case elfcpp::R_ARM_LDRS_PC_G1
:
9264 case elfcpp::R_ARM_LDRS_PC_G2
:
9265 case elfcpp::R_ARM_LDRS_SB_G0
:
9266 case elfcpp::R_ARM_LDRS_SB_G1
:
9267 case elfcpp::R_ARM_LDRS_SB_G2
:
9269 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9270 reloc_property
->group_index(),
9271 relative_address_base
);
9274 case elfcpp::R_ARM_LDC_PC_G0
:
9275 case elfcpp::R_ARM_LDC_PC_G1
:
9276 case elfcpp::R_ARM_LDC_PC_G2
:
9277 case elfcpp::R_ARM_LDC_SB_G0
:
9278 case elfcpp::R_ARM_LDC_SB_G1
:
9279 case elfcpp::R_ARM_LDC_SB_G2
:
9281 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9282 reloc_property
->group_index(),
9283 relative_address_base
);
9286 // These are initial tls relocs, which are expected when
9288 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9289 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9290 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9291 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9292 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9294 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9295 view
, address
, view_size
);
9298 // The known and unknown unsupported and/or deprecated relocations.
9299 case elfcpp::R_ARM_PC24
:
9300 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9301 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9302 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9304 // Just silently leave the method. We should get an appropriate error
9305 // message in the scan methods.
9309 // Report any errors.
9310 switch (reloc_status
)
9312 case Arm_relocate_functions::STATUS_OKAY
:
9314 case Arm_relocate_functions::STATUS_OVERFLOW
:
9315 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9316 _("relocation overflow in %s"),
9317 reloc_property
->name().c_str());
9319 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9320 gold_error_at_location(
9324 _("unexpected opcode while processing relocation %s"),
9325 reloc_property
->name().c_str());
9334 // Perform a TLS relocation.
9336 template<bool big_endian
>
9337 inline typename Arm_relocate_functions
<big_endian
>::Status
9338 Target_arm
<big_endian
>::Relocate::relocate_tls(
9339 const Relocate_info
<32, big_endian
>* relinfo
,
9340 Target_arm
<big_endian
>* target
,
9342 const elfcpp::Rel
<32, big_endian
>& rel
,
9343 unsigned int r_type
,
9344 const Sized_symbol
<32>* gsym
,
9345 const Symbol_value
<32>* psymval
,
9346 unsigned char* view
,
9347 elfcpp::Elf_types
<32>::Elf_Addr address
,
9348 section_size_type
/*view_size*/ )
9350 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9351 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9352 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9354 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9356 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9358 const bool is_final
= (gsym
== NULL
9359 ? !parameters
->options().shared()
9360 : gsym
->final_value_is_known());
9361 const tls::Tls_optimization optimized_type
9362 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9365 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9367 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9368 unsigned int got_offset
;
9371 gold_assert(gsym
->has_got_offset(got_type
));
9372 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9376 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9377 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9378 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9379 - target
->got_size());
9381 if (optimized_type
== tls::TLSOPT_NONE
)
9383 Arm_address got_entry
=
9384 target
->got_plt_section()->address() + got_offset
;
9386 // Relocate the field with the PC relative offset of the pair of
9388 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9389 return ArmRelocFuncs::STATUS_OKAY
;
9394 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9395 if (optimized_type
== tls::TLSOPT_NONE
)
9397 // Relocate the field with the offset of the GOT entry for
9398 // the module index.
9399 unsigned int got_offset
;
9400 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9401 - target
->got_size());
9402 Arm_address got_entry
=
9403 target
->got_plt_section()->address() + got_offset
;
9405 // Relocate the field with the PC relative offset of the pair of
9407 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9408 return ArmRelocFuncs::STATUS_OKAY
;
9412 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9413 RelocFuncs::rel32_unaligned(view
, value
);
9414 return ArmRelocFuncs::STATUS_OKAY
;
9416 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9417 if (optimized_type
== tls::TLSOPT_NONE
)
9419 // Relocate the field with the offset of the GOT entry for
9420 // the tp-relative offset of the symbol.
9421 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
9422 unsigned int got_offset
;
9425 gold_assert(gsym
->has_got_offset(got_type
));
9426 got_offset
= gsym
->got_offset(got_type
);
9430 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9431 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9432 got_offset
= object
->local_got_offset(r_sym
, got_type
);
9435 // All GOT offsets are relative to the end of the GOT.
9436 got_offset
-= target
->got_size();
9438 Arm_address got_entry
=
9439 target
->got_plt_section()->address() + got_offset
;
9441 // Relocate the field with the PC relative offset of the GOT entry.
9442 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9443 return ArmRelocFuncs::STATUS_OKAY
;
9447 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9448 // If we're creating a shared library, a dynamic relocation will
9449 // have been created for this location, so do not apply it now.
9450 if (!parameters
->options().shared())
9452 gold_assert(tls_segment
!= NULL
);
9454 // $tp points to the TCB, which is followed by the TLS, so we
9455 // need to add TCB size to the offset.
9456 Arm_address aligned_tcb_size
=
9457 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
9458 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
9461 return ArmRelocFuncs::STATUS_OKAY
;
9467 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9468 _("unsupported reloc %u"),
9470 return ArmRelocFuncs::STATUS_BAD_RELOC
;
9473 // Relocate section data.
9475 template<bool big_endian
>
9477 Target_arm
<big_endian
>::relocate_section(
9478 const Relocate_info
<32, big_endian
>* relinfo
,
9479 unsigned int sh_type
,
9480 const unsigned char* prelocs
,
9482 Output_section
* output_section
,
9483 bool needs_special_offset_handling
,
9484 unsigned char* view
,
9485 Arm_address address
,
9486 section_size_type view_size
,
9487 const Reloc_symbol_changes
* reloc_symbol_changes
)
9489 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
9490 gold_assert(sh_type
== elfcpp::SHT_REL
);
9492 // See if we are relocating a relaxed input section. If so, the view
9493 // covers the whole output section and we need to adjust accordingly.
9494 if (needs_special_offset_handling
)
9496 const Output_relaxed_input_section
* poris
=
9497 output_section
->find_relaxed_input_section(relinfo
->object
,
9498 relinfo
->data_shndx
);
9501 Arm_address section_address
= poris
->address();
9502 section_size_type section_size
= poris
->data_size();
9504 gold_assert((section_address
>= address
)
9505 && ((section_address
+ section_size
)
9506 <= (address
+ view_size
)));
9508 off_t offset
= section_address
- address
;
9511 view_size
= section_size
;
9515 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
9522 needs_special_offset_handling
,
9526 reloc_symbol_changes
);
9529 // Return the size of a relocation while scanning during a relocatable
9532 template<bool big_endian
>
9534 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
9535 unsigned int r_type
,
9538 r_type
= get_real_reloc_type(r_type
);
9539 const Arm_reloc_property
* arp
=
9540 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9545 std::string reloc_name
=
9546 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9547 gold_error(_("%s: unexpected %s in object file"),
9548 object
->name().c_str(), reloc_name
.c_str());
9553 // Scan the relocs during a relocatable link.
9555 template<bool big_endian
>
9557 Target_arm
<big_endian
>::scan_relocatable_relocs(
9558 Symbol_table
* symtab
,
9560 Sized_relobj_file
<32, big_endian
>* object
,
9561 unsigned int data_shndx
,
9562 unsigned int sh_type
,
9563 const unsigned char* prelocs
,
9565 Output_section
* output_section
,
9566 bool needs_special_offset_handling
,
9567 size_t local_symbol_count
,
9568 const unsigned char* plocal_symbols
,
9569 Relocatable_relocs
* rr
)
9571 gold_assert(sh_type
== elfcpp::SHT_REL
);
9573 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9574 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9576 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9577 Scan_relocatable_relocs
>(
9585 needs_special_offset_handling
,
9591 // Emit relocations for a section.
9593 template<bool big_endian
>
9595 Target_arm
<big_endian
>::relocate_relocs(
9596 const Relocate_info
<32, big_endian
>* relinfo
,
9597 unsigned int sh_type
,
9598 const unsigned char* prelocs
,
9600 Output_section
* output_section
,
9601 off_t offset_in_output_section
,
9602 const Relocatable_relocs
* rr
,
9603 unsigned char* view
,
9604 Arm_address view_address
,
9605 section_size_type view_size
,
9606 unsigned char* reloc_view
,
9607 section_size_type reloc_view_size
)
9609 gold_assert(sh_type
== elfcpp::SHT_REL
);
9611 gold::relocate_relocs
<32, big_endian
, elfcpp::SHT_REL
>(
9616 offset_in_output_section
,
9625 // Perform target-specific processing in a relocatable link. This is
9626 // only used if we use the relocation strategy RELOC_SPECIAL.
9628 template<bool big_endian
>
9630 Target_arm
<big_endian
>::relocate_special_relocatable(
9631 const Relocate_info
<32, big_endian
>* relinfo
,
9632 unsigned int sh_type
,
9633 const unsigned char* preloc_in
,
9635 Output_section
* output_section
,
9636 off_t offset_in_output_section
,
9637 unsigned char* view
,
9638 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9640 unsigned char* preloc_out
)
9642 // We can only handle REL type relocation sections.
9643 gold_assert(sh_type
== elfcpp::SHT_REL
);
9645 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9646 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9648 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9650 const Arm_relobj
<big_endian
>* object
=
9651 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9652 const unsigned int local_count
= object
->local_symbol_count();
9654 Reltype
reloc(preloc_in
);
9655 Reltype_write
reloc_write(preloc_out
);
9657 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9658 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9659 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9661 const Arm_reloc_property
* arp
=
9662 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9663 gold_assert(arp
!= NULL
);
9665 // Get the new symbol index.
9666 // We only use RELOC_SPECIAL strategy in local relocations.
9667 gold_assert(r_sym
< local_count
);
9669 // We are adjusting a section symbol. We need to find
9670 // the symbol table index of the section symbol for
9671 // the output section corresponding to input section
9672 // in which this symbol is defined.
9674 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9675 gold_assert(is_ordinary
);
9676 Output_section
* os
= object
->output_section(shndx
);
9677 gold_assert(os
!= NULL
);
9678 gold_assert(os
->needs_symtab_index());
9679 unsigned int new_symndx
= os
->symtab_index();
9681 // Get the new offset--the location in the output section where
9682 // this relocation should be applied.
9684 Arm_address offset
= reloc
.get_r_offset();
9685 Arm_address new_offset
;
9686 if (offset_in_output_section
!= invalid_address
)
9687 new_offset
= offset
+ offset_in_output_section
;
9690 section_offset_type sot_offset
=
9691 convert_types
<section_offset_type
, Arm_address
>(offset
);
9692 section_offset_type new_sot_offset
=
9693 output_section
->output_offset(object
, relinfo
->data_shndx
,
9695 gold_assert(new_sot_offset
!= -1);
9696 new_offset
= new_sot_offset
;
9699 // In an object file, r_offset is an offset within the section.
9700 // In an executable or dynamic object, generated by
9701 // --emit-relocs, r_offset is an absolute address.
9702 if (!parameters
->options().relocatable())
9704 new_offset
+= view_address
;
9705 if (offset_in_output_section
!= invalid_address
)
9706 new_offset
-= offset_in_output_section
;
9709 reloc_write
.put_r_offset(new_offset
);
9710 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9712 // Handle the reloc addend.
9713 // The relocation uses a section symbol in the input file.
9714 // We are adjusting it to use a section symbol in the output
9715 // file. The input section symbol refers to some address in
9716 // the input section. We need the relocation in the output
9717 // file to refer to that same address. This adjustment to
9718 // the addend is the same calculation we use for a simple
9719 // absolute relocation for the input section symbol.
9721 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9723 // Handle THUMB bit.
9724 Symbol_value
<32> symval
;
9725 Arm_address thumb_bit
=
9726 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9728 && arp
->uses_thumb_bit()
9729 && ((psymval
->value(object
, 0) & 1) != 0))
9731 Arm_address stripped_value
=
9732 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9733 symval
.set_output_value(stripped_value
);
9737 unsigned char* paddend
= view
+ offset
;
9738 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9739 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9742 case elfcpp::R_ARM_ABS8
:
9743 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9747 case elfcpp::R_ARM_ABS12
:
9748 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9752 case elfcpp::R_ARM_ABS16
:
9753 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9757 case elfcpp::R_ARM_THM_ABS5
:
9758 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9763 case elfcpp::R_ARM_MOVW_ABS_NC
:
9764 case elfcpp::R_ARM_MOVW_PREL_NC
:
9765 case elfcpp::R_ARM_MOVW_BREL_NC
:
9766 case elfcpp::R_ARM_MOVW_BREL
:
9767 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9768 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9771 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9772 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9773 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9774 case elfcpp::R_ARM_THM_MOVW_BREL
:
9775 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9776 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9779 case elfcpp::R_ARM_THM_CALL
:
9780 case elfcpp::R_ARM_THM_XPC22
:
9781 case elfcpp::R_ARM_THM_JUMP24
:
9783 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9784 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9788 case elfcpp::R_ARM_PLT32
:
9789 case elfcpp::R_ARM_CALL
:
9790 case elfcpp::R_ARM_JUMP24
:
9791 case elfcpp::R_ARM_XPC25
:
9793 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9794 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9798 case elfcpp::R_ARM_THM_JUMP19
:
9800 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9801 psymval
, 0, thumb_bit
);
9804 case elfcpp::R_ARM_THM_JUMP6
:
9806 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9810 case elfcpp::R_ARM_THM_JUMP8
:
9812 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9816 case elfcpp::R_ARM_THM_JUMP11
:
9818 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9822 case elfcpp::R_ARM_PREL31
:
9824 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9828 case elfcpp::R_ARM_THM_PC8
:
9830 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9834 case elfcpp::R_ARM_THM_PC12
:
9836 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9840 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9842 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9846 // These relocation truncate relocation results so we cannot handle them
9847 // in a relocatable link.
9848 case elfcpp::R_ARM_MOVT_ABS
:
9849 case elfcpp::R_ARM_THM_MOVT_ABS
:
9850 case elfcpp::R_ARM_MOVT_PREL
:
9851 case elfcpp::R_ARM_MOVT_BREL
:
9852 case elfcpp::R_ARM_THM_MOVT_PREL
:
9853 case elfcpp::R_ARM_THM_MOVT_BREL
:
9854 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9855 case elfcpp::R_ARM_ALU_PC_G0
:
9856 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9857 case elfcpp::R_ARM_ALU_PC_G1
:
9858 case elfcpp::R_ARM_ALU_PC_G2
:
9859 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9860 case elfcpp::R_ARM_ALU_SB_G0
:
9861 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9862 case elfcpp::R_ARM_ALU_SB_G1
:
9863 case elfcpp::R_ARM_ALU_SB_G2
:
9864 case elfcpp::R_ARM_LDR_PC_G0
:
9865 case elfcpp::R_ARM_LDR_PC_G1
:
9866 case elfcpp::R_ARM_LDR_PC_G2
:
9867 case elfcpp::R_ARM_LDR_SB_G0
:
9868 case elfcpp::R_ARM_LDR_SB_G1
:
9869 case elfcpp::R_ARM_LDR_SB_G2
:
9870 case elfcpp::R_ARM_LDRS_PC_G0
:
9871 case elfcpp::R_ARM_LDRS_PC_G1
:
9872 case elfcpp::R_ARM_LDRS_PC_G2
:
9873 case elfcpp::R_ARM_LDRS_SB_G0
:
9874 case elfcpp::R_ARM_LDRS_SB_G1
:
9875 case elfcpp::R_ARM_LDRS_SB_G2
:
9876 case elfcpp::R_ARM_LDC_PC_G0
:
9877 case elfcpp::R_ARM_LDC_PC_G1
:
9878 case elfcpp::R_ARM_LDC_PC_G2
:
9879 case elfcpp::R_ARM_LDC_SB_G0
:
9880 case elfcpp::R_ARM_LDC_SB_G1
:
9881 case elfcpp::R_ARM_LDC_SB_G2
:
9882 gold_error(_("cannot handle %s in a relocatable link"),
9883 arp
->name().c_str());
9890 // Report any errors.
9891 switch (reloc_status
)
9893 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9895 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9896 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9897 _("relocation overflow in %s"),
9898 arp
->name().c_str());
9900 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9901 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9902 _("unexpected opcode while processing relocation %s"),
9903 arp
->name().c_str());
9910 // Return the value to use for a dynamic symbol which requires special
9911 // treatment. This is how we support equality comparisons of function
9912 // pointers across shared library boundaries, as described in the
9913 // processor specific ABI supplement.
9915 template<bool big_endian
>
9917 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9919 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9920 return this->plt_section()->address() + gsym
->plt_offset();
9923 // Map platform-specific relocs to real relocs
9925 template<bool big_endian
>
9927 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
9931 case elfcpp::R_ARM_TARGET1
:
9932 // This is either R_ARM_ABS32 or R_ARM_REL32;
9933 return elfcpp::R_ARM_ABS32
;
9935 case elfcpp::R_ARM_TARGET2
:
9936 // This can be any reloc type but usually is R_ARM_GOT_PREL
9937 return elfcpp::R_ARM_GOT_PREL
;
9944 // Whether if two EABI versions V1 and V2 are compatible.
9946 template<bool big_endian
>
9948 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9949 elfcpp::Elf_Word v1
,
9950 elfcpp::Elf_Word v2
)
9952 // v4 and v5 are the same spec before and after it was released,
9953 // so allow mixing them.
9954 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
9955 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9956 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9962 // Combine FLAGS from an input object called NAME and the processor-specific
9963 // flags in the ELF header of the output. Much of this is adapted from the
9964 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9965 // in bfd/elf32-arm.c.
9967 template<bool big_endian
>
9969 Target_arm
<big_endian
>::merge_processor_specific_flags(
9970 const std::string
& name
,
9971 elfcpp::Elf_Word flags
)
9973 if (this->are_processor_specific_flags_set())
9975 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9977 // Nothing to merge if flags equal to those in output.
9978 if (flags
== out_flags
)
9981 // Complain about various flag mismatches.
9982 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
9983 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
9984 if (!this->are_eabi_versions_compatible(version1
, version2
)
9985 && parameters
->options().warn_mismatch())
9986 gold_error(_("Source object %s has EABI version %d but output has "
9987 "EABI version %d."),
9989 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
9990 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
9994 // If the input is the default architecture and had the default
9995 // flags then do not bother setting the flags for the output
9996 // architecture, instead allow future merges to do this. If no
9997 // future merges ever set these flags then they will retain their
9998 // uninitialised values, which surprise surprise, correspond
9999 // to the default values.
10003 // This is the first time, just copy the flags.
10004 // We only copy the EABI version for now.
10005 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10009 // Adjust ELF file header.
10010 template<bool big_endian
>
10012 Target_arm
<big_endian
>::do_adjust_elf_header(
10013 unsigned char* view
,
10016 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10018 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10019 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10020 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10022 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
10023 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10024 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10026 e_ident
[elfcpp::EI_OSABI
] = 0;
10027 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10029 // FIXME: Do EF_ARM_BE8 adjustment.
10031 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10032 oehdr
.put_e_ident(e_ident
);
10035 // do_make_elf_object to override the same function in the base class.
10036 // We need to use a target-specific sub-class of
10037 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10038 // Hence we need to have our own ELF object creation.
10040 template<bool big_endian
>
10042 Target_arm
<big_endian
>::do_make_elf_object(
10043 const std::string
& name
,
10044 Input_file
* input_file
,
10045 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10047 int et
= ehdr
.get_e_type();
10048 // ET_EXEC files are valid input for --just-symbols/-R,
10049 // and we treat them as relocatable objects.
10050 if (et
== elfcpp::ET_REL
10051 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10053 Arm_relobj
<big_endian
>* obj
=
10054 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10058 else if (et
== elfcpp::ET_DYN
)
10060 Sized_dynobj
<32, big_endian
>* obj
=
10061 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10067 gold_error(_("%s: unsupported ELF file type %d"),
10073 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10074 // Returns -1 if no architecture could be read.
10075 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10077 template<bool big_endian
>
10079 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10080 const Attributes_section_data
* pasd
)
10082 const Object_attribute
* known_attributes
=
10083 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10085 // Note: the tag and its argument below are uleb128 values, though
10086 // currently-defined values fit in one byte for each.
10087 const std::string
& sv
=
10088 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10090 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10091 && (sv
.data()[1] & 128) != 128)
10092 return sv
.data()[1];
10094 // This tag is "safely ignorable", so don't complain if it looks funny.
10098 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10099 // The tag is removed if ARCH is -1.
10100 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10102 template<bool big_endian
>
10104 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10105 Attributes_section_data
* pasd
,
10108 Object_attribute
* known_attributes
=
10109 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10113 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10117 // Note: the tag and its argument below are uleb128 values, though
10118 // currently-defined values fit in one byte for each.
10120 sv
[0] = elfcpp::Tag_CPU_arch
;
10121 gold_assert(arch
!= 0);
10125 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10128 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10130 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10132 template<bool big_endian
>
10134 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10137 int* secondary_compat_out
,
10139 int secondary_compat
)
10141 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10142 static const int v6t2
[] =
10144 T(V6T2
), // PRE_V4.
10154 static const int v6k
[] =
10167 static const int v7
[] =
10181 static const int v6_m
[] =
10196 static const int v6s_m
[] =
10212 static const int v7e_m
[] =
10219 T(V7E_M
), // V5TEJ.
10226 T(V7E_M
), // V6S_M.
10229 static const int v4t_plus_v6_m
[] =
10236 T(V5TEJ
), // V5TEJ.
10243 T(V6S_M
), // V6S_M.
10244 T(V7E_M
), // V7E_M.
10245 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10247 static const int* comb
[] =
10255 // Pseudo-architecture.
10259 // Check we've not got a higher architecture than we know about.
10261 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10263 gold_error(_("%s: unknown CPU architecture"), name
);
10267 // Override old tag if we have a Tag_also_compatible_with on the output.
10269 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10270 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10271 oldtag
= T(V4T_PLUS_V6_M
);
10273 // And override the new tag if we have a Tag_also_compatible_with on the
10276 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10277 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10278 newtag
= T(V4T_PLUS_V6_M
);
10280 // Architectures before V6KZ add features monotonically.
10281 int tagh
= std::max(oldtag
, newtag
);
10282 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10285 int tagl
= std::min(oldtag
, newtag
);
10286 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10288 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10289 // as the canonical version.
10290 if (result
== T(V4T_PLUS_V6_M
))
10293 *secondary_compat_out
= T(V6_M
);
10296 *secondary_compat_out
= -1;
10300 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10301 name
, oldtag
, newtag
);
10309 // Helper to print AEABI enum tag value.
10311 template<bool big_endian
>
10313 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10315 static const char* aeabi_enum_names
[] =
10316 { "", "variable-size", "32-bit", "" };
10317 const size_t aeabi_enum_names_size
=
10318 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10320 if (value
< aeabi_enum_names_size
)
10321 return std::string(aeabi_enum_names
[value
]);
10325 sprintf(buffer
, "<unknown value %u>", value
);
10326 return std::string(buffer
);
10330 // Return the string value to store in TAG_CPU_name.
10332 template<bool big_endian
>
10334 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10336 static const char* name_table
[] = {
10337 // These aren't real CPU names, but we can't guess
10338 // that from the architecture version alone.
10354 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10356 if (value
< name_table_size
)
10357 return std::string(name_table
[value
]);
10361 sprintf(buffer
, "<unknown CPU value %u>", value
);
10362 return std::string(buffer
);
10366 // Merge object attributes from input file called NAME with those of the
10367 // output. The input object attributes are in the object pointed by PASD.
10369 template<bool big_endian
>
10371 Target_arm
<big_endian
>::merge_object_attributes(
10373 const Attributes_section_data
* pasd
)
10375 // Return if there is no attributes section data.
10379 // If output has no object attributes, just copy.
10380 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
10381 if (this->attributes_section_data_
== NULL
)
10383 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
10384 Object_attribute
* out_attr
=
10385 this->attributes_section_data_
->known_attributes(vendor
);
10387 // We do not output objects with Tag_MPextension_use_legacy - we move
10388 // the attribute's value to Tag_MPextension_use. */
10389 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
10391 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
10392 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
10393 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10395 gold_error(_("%s has both the current and legacy "
10396 "Tag_MPextension_use attributes"),
10400 out_attr
[elfcpp::Tag_MPextension_use
] =
10401 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
10402 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
10403 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
10409 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
10410 Object_attribute
* out_attr
=
10411 this->attributes_section_data_
->known_attributes(vendor
);
10413 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10414 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
10415 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
10417 // Ignore mismatches if the object doesn't use floating point. */
10418 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
10419 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
10420 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
10421 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
10422 && parameters
->options().warn_mismatch())
10423 gold_error(_("%s uses VFP register arguments, output does not"),
10427 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
10429 // Merge this attribute with existing attributes.
10432 case elfcpp::Tag_CPU_raw_name
:
10433 case elfcpp::Tag_CPU_name
:
10434 // These are merged after Tag_CPU_arch.
10437 case elfcpp::Tag_ABI_optimization_goals
:
10438 case elfcpp::Tag_ABI_FP_optimization_goals
:
10439 // Use the first value seen.
10442 case elfcpp::Tag_CPU_arch
:
10444 unsigned int saved_out_attr
= out_attr
->int_value();
10445 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10446 int secondary_compat
=
10447 this->get_secondary_compatible_arch(pasd
);
10448 int secondary_compat_out
=
10449 this->get_secondary_compatible_arch(
10450 this->attributes_section_data_
);
10451 out_attr
[i
].set_int_value(
10452 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
10453 &secondary_compat_out
,
10454 in_attr
[i
].int_value(),
10455 secondary_compat
));
10456 this->set_secondary_compatible_arch(this->attributes_section_data_
,
10457 secondary_compat_out
);
10459 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10460 if (out_attr
[i
].int_value() == saved_out_attr
)
10461 ; // Leave the names alone.
10462 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
10464 // The output architecture has been changed to match the
10465 // input architecture. Use the input names.
10466 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
10467 in_attr
[elfcpp::Tag_CPU_name
].string_value());
10468 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
10469 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
10473 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
10474 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
10477 // If we still don't have a value for Tag_CPU_name,
10478 // make one up now. Tag_CPU_raw_name remains blank.
10479 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
10481 const std::string cpu_name
=
10482 this->tag_cpu_name_value(out_attr
[i
].int_value());
10483 // FIXME: If we see an unknown CPU, this will be set
10484 // to "<unknown CPU n>", where n is the attribute value.
10485 // This is different from BFD, which leaves the name alone.
10486 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
10491 case elfcpp::Tag_ARM_ISA_use
:
10492 case elfcpp::Tag_THUMB_ISA_use
:
10493 case elfcpp::Tag_WMMX_arch
:
10494 case elfcpp::Tag_Advanced_SIMD_arch
:
10495 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10496 case elfcpp::Tag_ABI_FP_rounding
:
10497 case elfcpp::Tag_ABI_FP_exceptions
:
10498 case elfcpp::Tag_ABI_FP_user_exceptions
:
10499 case elfcpp::Tag_ABI_FP_number_model
:
10500 case elfcpp::Tag_VFP_HP_extension
:
10501 case elfcpp::Tag_CPU_unaligned_access
:
10502 case elfcpp::Tag_T2EE_use
:
10503 case elfcpp::Tag_Virtualization_use
:
10504 case elfcpp::Tag_MPextension_use
:
10505 // Use the largest value specified.
10506 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10507 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10510 case elfcpp::Tag_ABI_align8_preserved
:
10511 case elfcpp::Tag_ABI_PCS_RO_data
:
10512 // Use the smallest value specified.
10513 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10514 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10517 case elfcpp::Tag_ABI_align8_needed
:
10518 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
10519 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
10520 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
10523 // This error message should be enabled once all non-conforming
10524 // binaries in the toolchain have had the attributes set
10526 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10530 case elfcpp::Tag_ABI_FP_denormal
:
10531 case elfcpp::Tag_ABI_PCS_GOT_use
:
10533 // These tags have 0 = don't care, 1 = strong requirement,
10534 // 2 = weak requirement.
10535 static const int order_021
[3] = {0, 2, 1};
10537 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10538 // value if greater than 2 (for future-proofing).
10539 if ((in_attr
[i
].int_value() > 2
10540 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10541 || (in_attr
[i
].int_value() <= 2
10542 && out_attr
[i
].int_value() <= 2
10543 && (order_021
[in_attr
[i
].int_value()]
10544 > order_021
[out_attr
[i
].int_value()])))
10545 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10549 case elfcpp::Tag_CPU_arch_profile
:
10550 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
10552 // 0 will merge with anything.
10553 // 'A' and 'S' merge to 'A'.
10554 // 'R' and 'S' merge to 'R'.
10555 // 'M' and 'A|R|S' is an error.
10556 if (out_attr
[i
].int_value() == 0
10557 || (out_attr
[i
].int_value() == 'S'
10558 && (in_attr
[i
].int_value() == 'A'
10559 || in_attr
[i
].int_value() == 'R')))
10560 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10561 else if (in_attr
[i
].int_value() == 0
10562 || (in_attr
[i
].int_value() == 'S'
10563 && (out_attr
[i
].int_value() == 'A'
10564 || out_attr
[i
].int_value() == 'R')))
10566 else if (parameters
->options().warn_mismatch())
10569 (_("conflicting architecture profiles %c/%c"),
10570 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10571 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10575 case elfcpp::Tag_VFP_arch
:
10577 static const struct
10581 } vfp_versions
[7] =
10592 // Values greater than 6 aren't defined, so just pick the
10594 if (in_attr
[i
].int_value() > 6
10595 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10597 *out_attr
= *in_attr
;
10600 // The output uses the superset of input features
10601 // (ISA version) and registers.
10602 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10603 vfp_versions
[out_attr
[i
].int_value()].ver
);
10604 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10605 vfp_versions
[out_attr
[i
].int_value()].regs
);
10606 // This assumes all possible supersets are also a valid
10609 for (newval
= 6; newval
> 0; newval
--)
10611 if (regs
== vfp_versions
[newval
].regs
10612 && ver
== vfp_versions
[newval
].ver
)
10615 out_attr
[i
].set_int_value(newval
);
10618 case elfcpp::Tag_PCS_config
:
10619 if (out_attr
[i
].int_value() == 0)
10620 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10621 else if (in_attr
[i
].int_value() != 0
10622 && out_attr
[i
].int_value() != 0
10623 && parameters
->options().warn_mismatch())
10625 // It's sometimes ok to mix different configs, so this is only
10627 gold_warning(_("%s: conflicting platform configuration"), name
);
10630 case elfcpp::Tag_ABI_PCS_R9_use
:
10631 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10632 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10633 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10634 && parameters
->options().warn_mismatch())
10636 gold_error(_("%s: conflicting use of R9"), name
);
10638 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10639 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10641 case elfcpp::Tag_ABI_PCS_RW_data
:
10642 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10643 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10644 != elfcpp::AEABI_R9_SB
)
10645 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10646 != elfcpp::AEABI_R9_unused
)
10647 && parameters
->options().warn_mismatch())
10649 gold_error(_("%s: SB relative addressing conflicts with use "
10653 // Use the smallest value specified.
10654 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10655 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10657 case elfcpp::Tag_ABI_PCS_wchar_t
:
10658 if (out_attr
[i
].int_value()
10659 && in_attr
[i
].int_value()
10660 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10661 && parameters
->options().warn_mismatch()
10662 && parameters
->options().wchar_size_warning())
10664 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10665 "use %u-byte wchar_t; use of wchar_t values "
10666 "across objects may fail"),
10667 name
, in_attr
[i
].int_value(),
10668 out_attr
[i
].int_value());
10670 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10671 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10673 case elfcpp::Tag_ABI_enum_size
:
10674 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10676 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10677 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10679 // The existing object is compatible with anything.
10680 // Use whatever requirements the new object has.
10681 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10683 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10684 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10685 && parameters
->options().warn_mismatch()
10686 && parameters
->options().enum_size_warning())
10688 unsigned int in_value
= in_attr
[i
].int_value();
10689 unsigned int out_value
= out_attr
[i
].int_value();
10690 gold_warning(_("%s uses %s enums yet the output is to use "
10691 "%s enums; use of enum values across objects "
10694 this->aeabi_enum_name(in_value
).c_str(),
10695 this->aeabi_enum_name(out_value
).c_str());
10699 case elfcpp::Tag_ABI_VFP_args
:
10702 case elfcpp::Tag_ABI_WMMX_args
:
10703 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10704 && parameters
->options().warn_mismatch())
10706 gold_error(_("%s uses iWMMXt register arguments, output does "
10711 case Object_attribute::Tag_compatibility
:
10712 // Merged in target-independent code.
10714 case elfcpp::Tag_ABI_HardFP_use
:
10715 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10716 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10717 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10718 out_attr
[i
].set_int_value(3);
10719 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10720 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10722 case elfcpp::Tag_ABI_FP_16bit_format
:
10723 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10725 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10726 && parameters
->options().warn_mismatch())
10727 gold_error(_("fp16 format mismatch between %s and output"),
10730 if (in_attr
[i
].int_value() != 0)
10731 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10734 case elfcpp::Tag_DIV_use
:
10735 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10736 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10737 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10738 // CPU. We will merge as follows: If the input attribute's value
10739 // is one then the output attribute's value remains unchanged. If
10740 // the input attribute's value is zero or two then if the output
10741 // attribute's value is one the output value is set to the input
10742 // value, otherwise the output value must be the same as the
10744 if (in_attr
[i
].int_value() != 1 && out_attr
[i
].int_value() != 1)
10746 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
10748 gold_error(_("DIV usage mismatch between %s and output"),
10753 if (in_attr
[i
].int_value() != 1)
10754 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10758 case elfcpp::Tag_MPextension_use_legacy
:
10759 // We don't output objects with Tag_MPextension_use_legacy - we
10760 // move the value to Tag_MPextension_use.
10761 if (in_attr
[i
].int_value() != 0
10762 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10764 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10765 != in_attr
[i
].int_value())
10767 gold_error(_("%s has has both the current and legacy "
10768 "Tag_MPextension_use attributes"),
10773 if (in_attr
[i
].int_value()
10774 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10775 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10779 case elfcpp::Tag_nodefaults
:
10780 // This tag is set if it exists, but the value is unused (and is
10781 // typically zero). We don't actually need to do anything here -
10782 // the merge happens automatically when the type flags are merged
10785 case elfcpp::Tag_also_compatible_with
:
10786 // Already done in Tag_CPU_arch.
10788 case elfcpp::Tag_conformance
:
10789 // Keep the attribute if it matches. Throw it away otherwise.
10790 // No attribute means no claim to conform.
10791 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10792 out_attr
[i
].set_string_value("");
10797 const char* err_object
= NULL
;
10799 // The "known_obj_attributes" table does contain some undefined
10800 // attributes. Ensure that there are unused.
10801 if (out_attr
[i
].int_value() != 0
10802 || out_attr
[i
].string_value() != "")
10803 err_object
= "output";
10804 else if (in_attr
[i
].int_value() != 0
10805 || in_attr
[i
].string_value() != "")
10808 if (err_object
!= NULL
10809 && parameters
->options().warn_mismatch())
10811 // Attribute numbers >=64 (mod 128) can be safely ignored.
10812 if ((i
& 127) < 64)
10813 gold_error(_("%s: unknown mandatory EABI object attribute "
10817 gold_warning(_("%s: unknown EABI object attribute %d"),
10821 // Only pass on attributes that match in both inputs.
10822 if (!in_attr
[i
].matches(out_attr
[i
]))
10824 out_attr
[i
].set_int_value(0);
10825 out_attr
[i
].set_string_value("");
10830 // If out_attr was copied from in_attr then it won't have a type yet.
10831 if (in_attr
[i
].type() && !out_attr
[i
].type())
10832 out_attr
[i
].set_type(in_attr
[i
].type());
10835 // Merge Tag_compatibility attributes and any common GNU ones.
10836 this->attributes_section_data_
->merge(name
, pasd
);
10838 // Check for any attributes not known on ARM.
10839 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10840 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10841 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10842 Other_attributes
* out_other_attributes
=
10843 this->attributes_section_data_
->other_attributes(vendor
);
10844 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10846 while (in_iter
!= in_other_attributes
->end()
10847 || out_iter
!= out_other_attributes
->end())
10849 const char* err_object
= NULL
;
10852 // The tags for each list are in numerical order.
10853 // If the tags are equal, then merge.
10854 if (out_iter
!= out_other_attributes
->end()
10855 && (in_iter
== in_other_attributes
->end()
10856 || in_iter
->first
> out_iter
->first
))
10858 // This attribute only exists in output. We can't merge, and we
10859 // don't know what the tag means, so delete it.
10860 err_object
= "output";
10861 err_tag
= out_iter
->first
;
10862 int saved_tag
= out_iter
->first
;
10863 delete out_iter
->second
;
10864 out_other_attributes
->erase(out_iter
);
10865 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10867 else if (in_iter
!= in_other_attributes
->end()
10868 && (out_iter
!= out_other_attributes
->end()
10869 || in_iter
->first
< out_iter
->first
))
10871 // This attribute only exists in input. We can't merge, and we
10872 // don't know what the tag means, so ignore it.
10874 err_tag
= in_iter
->first
;
10877 else // The tags are equal.
10879 // As present, all attributes in the list are unknown, and
10880 // therefore can't be merged meaningfully.
10881 err_object
= "output";
10882 err_tag
= out_iter
->first
;
10884 // Only pass on attributes that match in both inputs.
10885 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10887 // No match. Delete the attribute.
10888 int saved_tag
= out_iter
->first
;
10889 delete out_iter
->second
;
10890 out_other_attributes
->erase(out_iter
);
10891 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10895 // Matched. Keep the attribute and move to the next.
10901 if (err_object
&& parameters
->options().warn_mismatch())
10903 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10904 if ((err_tag
& 127) < 64)
10906 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10907 err_object
, err_tag
);
10911 gold_warning(_("%s: unknown EABI object attribute %d"),
10912 err_object
, err_tag
);
10918 // Stub-generation methods for Target_arm.
10920 // Make a new Arm_input_section object.
10922 template<bool big_endian
>
10923 Arm_input_section
<big_endian
>*
10924 Target_arm
<big_endian
>::new_arm_input_section(
10926 unsigned int shndx
)
10928 Section_id
sid(relobj
, shndx
);
10930 Arm_input_section
<big_endian
>* arm_input_section
=
10931 new Arm_input_section
<big_endian
>(relobj
, shndx
);
10932 arm_input_section
->init();
10934 // Register new Arm_input_section in map for look-up.
10935 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
10936 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
10938 // Make sure that it we have not created another Arm_input_section
10939 // for this input section already.
10940 gold_assert(ins
.second
);
10942 return arm_input_section
;
10945 // Find the Arm_input_section object corresponding to the SHNDX-th input
10946 // section of RELOBJ.
10948 template<bool big_endian
>
10949 Arm_input_section
<big_endian
>*
10950 Target_arm
<big_endian
>::find_arm_input_section(
10952 unsigned int shndx
) const
10954 Section_id
sid(relobj
, shndx
);
10955 typename
Arm_input_section_map::const_iterator p
=
10956 this->arm_input_section_map_
.find(sid
);
10957 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
10960 // Make a new stub table.
10962 template<bool big_endian
>
10963 Stub_table
<big_endian
>*
10964 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
10966 Stub_table
<big_endian
>* stub_table
=
10967 new Stub_table
<big_endian
>(owner
);
10968 this->stub_tables_
.push_back(stub_table
);
10970 stub_table
->set_address(owner
->address() + owner
->data_size());
10971 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
10972 stub_table
->finalize_data_size();
10977 // Scan a relocation for stub generation.
10979 template<bool big_endian
>
10981 Target_arm
<big_endian
>::scan_reloc_for_stub(
10982 const Relocate_info
<32, big_endian
>* relinfo
,
10983 unsigned int r_type
,
10984 const Sized_symbol
<32>* gsym
,
10985 unsigned int r_sym
,
10986 const Symbol_value
<32>* psymval
,
10987 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
10988 Arm_address address
)
10990 const Arm_relobj
<big_endian
>* arm_relobj
=
10991 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10993 bool target_is_thumb
;
10994 Symbol_value
<32> symval
;
10997 // This is a global symbol. Determine if we use PLT and if the
10998 // final target is THUMB.
10999 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11001 // This uses a PLT, change the symbol value.
11002 symval
.set_output_value(this->plt_section()->address()
11003 + gsym
->plt_offset());
11005 target_is_thumb
= false;
11007 else if (gsym
->is_undefined())
11008 // There is no need to generate a stub symbol is undefined.
11013 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11014 || (gsym
->type() == elfcpp::STT_FUNC
11015 && !gsym
->is_undefined()
11016 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11021 // This is a local symbol. Determine if the final target is THUMB.
11022 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11025 // Strip LSB if this points to a THUMB target.
11026 const Arm_reloc_property
* reloc_property
=
11027 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11028 gold_assert(reloc_property
!= NULL
);
11029 if (target_is_thumb
11030 && reloc_property
->uses_thumb_bit()
11031 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11033 Arm_address stripped_value
=
11034 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11035 symval
.set_output_value(stripped_value
);
11039 // Get the symbol value.
11040 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11042 // Owing to pipelining, the PC relative branches below actually skip
11043 // two instructions when the branch offset is 0.
11044 Arm_address destination
;
11047 case elfcpp::R_ARM_CALL
:
11048 case elfcpp::R_ARM_JUMP24
:
11049 case elfcpp::R_ARM_PLT32
:
11051 destination
= value
+ addend
+ 8;
11053 case elfcpp::R_ARM_THM_CALL
:
11054 case elfcpp::R_ARM_THM_XPC22
:
11055 case elfcpp::R_ARM_THM_JUMP24
:
11056 case elfcpp::R_ARM_THM_JUMP19
:
11058 destination
= value
+ addend
+ 4;
11061 gold_unreachable();
11064 Reloc_stub
* stub
= NULL
;
11065 Stub_type stub_type
=
11066 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11068 if (stub_type
!= arm_stub_none
)
11070 // Try looking up an existing stub from a stub table.
11071 Stub_table
<big_endian
>* stub_table
=
11072 arm_relobj
->stub_table(relinfo
->data_shndx
);
11073 gold_assert(stub_table
!= NULL
);
11075 // Locate stub by destination.
11076 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11078 // Create a stub if there is not one already
11079 stub
= stub_table
->find_reloc_stub(stub_key
);
11082 // create a new stub and add it to stub table.
11083 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11084 stub_table
->add_reloc_stub(stub
, stub_key
);
11087 // Record the destination address.
11088 stub
->set_destination_address(destination
11089 | (target_is_thumb
? 1 : 0));
11092 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11093 if (this->fix_cortex_a8_
11094 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11095 || r_type
== elfcpp::R_ARM_THM_JUMP19
11096 || r_type
== elfcpp::R_ARM_THM_CALL
11097 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11098 && (address
& 0xfffU
) == 0xffeU
)
11100 // Found a candidate. Note we haven't checked the destination is
11101 // within 4K here: if we do so (and don't create a record) we can't
11102 // tell that a branch should have been relocated when scanning later.
11103 this->cortex_a8_relocs_info_
[address
] =
11104 new Cortex_a8_reloc(stub
, r_type
,
11105 destination
| (target_is_thumb
? 1 : 0));
11109 // This function scans a relocation sections for stub generation.
11110 // The template parameter Relocate must be a class type which provides
11111 // a single function, relocate(), which implements the machine
11112 // specific part of a relocation.
11114 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11115 // SHT_REL or SHT_RELA.
11117 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11118 // of relocs. OUTPUT_SECTION is the output section.
11119 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11120 // mapped to output offsets.
11122 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11123 // VIEW_SIZE is the size. These refer to the input section, unless
11124 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11125 // the output section.
11127 template<bool big_endian
>
11128 template<int sh_type
>
11130 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11131 const Relocate_info
<32, big_endian
>* relinfo
,
11132 const unsigned char* prelocs
,
11133 size_t reloc_count
,
11134 Output_section
* output_section
,
11135 bool needs_special_offset_handling
,
11136 const unsigned char* view
,
11137 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11140 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11141 const int reloc_size
=
11142 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11144 Arm_relobj
<big_endian
>* arm_object
=
11145 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11146 unsigned int local_count
= arm_object
->local_symbol_count();
11148 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11150 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11152 Reltype
reloc(prelocs
);
11154 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11155 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11156 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11158 r_type
= this->get_real_reloc_type(r_type
);
11160 // Only a few relocation types need stubs.
11161 if ((r_type
!= elfcpp::R_ARM_CALL
)
11162 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11163 && (r_type
!= elfcpp::R_ARM_PLT32
)
11164 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11165 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11166 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11167 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11168 && (r_type
!= elfcpp::R_ARM_V4BX
))
11171 section_offset_type offset
=
11172 convert_to_section_size_type(reloc
.get_r_offset());
11174 if (needs_special_offset_handling
)
11176 offset
= output_section
->output_offset(relinfo
->object
,
11177 relinfo
->data_shndx
,
11183 // Create a v4bx stub if --fix-v4bx-interworking is used.
11184 if (r_type
== elfcpp::R_ARM_V4BX
)
11186 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11188 // Get the BX instruction.
11189 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11190 const Valtype
* wv
=
11191 reinterpret_cast<const Valtype
*>(view
+ offset
);
11192 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11193 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11194 const uint32_t reg
= (insn
& 0xf);
11198 // Try looking up an existing stub from a stub table.
11199 Stub_table
<big_endian
>* stub_table
=
11200 arm_object
->stub_table(relinfo
->data_shndx
);
11201 gold_assert(stub_table
!= NULL
);
11203 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11205 // create a new stub and add it to stub table.
11206 Arm_v4bx_stub
* stub
=
11207 this->stub_factory().make_arm_v4bx_stub(reg
);
11208 gold_assert(stub
!= NULL
);
11209 stub_table
->add_arm_v4bx_stub(stub
);
11217 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11218 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11219 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11221 const Sized_symbol
<32>* sym
;
11223 Symbol_value
<32> symval
;
11224 const Symbol_value
<32> *psymval
;
11225 bool is_defined_in_discarded_section
;
11226 unsigned int shndx
;
11227 if (r_sym
< local_count
)
11230 psymval
= arm_object
->local_symbol(r_sym
);
11232 // If the local symbol belongs to a section we are discarding,
11233 // and that section is a debug section, try to find the
11234 // corresponding kept section and map this symbol to its
11235 // counterpart in the kept section. The symbol must not
11236 // correspond to a section we are folding.
11238 shndx
= psymval
->input_shndx(&is_ordinary
);
11239 is_defined_in_discarded_section
=
11241 && shndx
!= elfcpp::SHN_UNDEF
11242 && !arm_object
->is_section_included(shndx
)
11243 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11245 // We need to compute the would-be final value of this local
11247 if (!is_defined_in_discarded_section
)
11249 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11250 typename
ObjType::Compute_final_local_value_status status
=
11251 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11253 if (status
== ObjType::CFLV_OK
)
11255 // Currently we cannot handle a branch to a target in
11256 // a merged section. If this is the case, issue an error
11257 // and also free the merge symbol value.
11258 if (!symval
.has_output_value())
11260 const std::string
& section_name
=
11261 arm_object
->section_name(shndx
);
11262 arm_object
->error(_("cannot handle branch to local %u "
11263 "in a merged section %s"),
11264 r_sym
, section_name
.c_str());
11270 // We cannot determine the final value.
11277 const Symbol
* gsym
;
11278 gsym
= arm_object
->global_symbol(r_sym
);
11279 gold_assert(gsym
!= NULL
);
11280 if (gsym
->is_forwarder())
11281 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11283 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11284 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11285 symval
.set_output_symtab_index(sym
->symtab_index());
11287 symval
.set_no_output_symtab_entry();
11289 // We need to compute the would-be final value of this global
11291 const Symbol_table
* symtab
= relinfo
->symtab
;
11292 const Sized_symbol
<32>* sized_symbol
=
11293 symtab
->get_sized_symbol
<32>(gsym
);
11294 Symbol_table::Compute_final_value_status status
;
11295 Arm_address value
=
11296 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11298 // Skip this if the symbol has not output section.
11299 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11301 symval
.set_output_value(value
);
11303 if (gsym
->type() == elfcpp::STT_TLS
)
11304 symval
.set_is_tls_symbol();
11305 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11306 symval
.set_is_ifunc_symbol();
11309 is_defined_in_discarded_section
=
11310 (gsym
->is_defined_in_discarded_section()
11311 && gsym
->is_undefined());
11315 Symbol_value
<32> symval2
;
11316 if (is_defined_in_discarded_section
)
11318 if (comdat_behavior
== CB_UNDETERMINED
)
11320 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
11321 comdat_behavior
= get_comdat_behavior(name
.c_str());
11323 if (comdat_behavior
== CB_PRETEND
)
11325 // FIXME: This case does not work for global symbols.
11326 // We have no place to store the original section index.
11327 // Fortunately this does not matter for comdat sections,
11328 // only for sections explicitly discarded by a linker
11331 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
11332 arm_object
->map_to_kept_section(shndx
, &found
);
11334 symval2
.set_output_value(value
+ psymval
->input_value());
11336 symval2
.set_output_value(0);
11340 if (comdat_behavior
== CB_WARNING
)
11341 gold_warning_at_location(relinfo
, i
, offset
,
11342 _("relocation refers to discarded "
11344 symval2
.set_output_value(0);
11346 symval2
.set_no_output_symtab_entry();
11347 psymval
= &symval2
;
11350 // If symbol is a section symbol, we don't know the actual type of
11351 // destination. Give up.
11352 if (psymval
->is_section_symbol())
11355 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
11356 addend
, view_address
+ offset
);
11360 // Scan an input section for stub generation.
11362 template<bool big_endian
>
11364 Target_arm
<big_endian
>::scan_section_for_stubs(
11365 const Relocate_info
<32, big_endian
>* relinfo
,
11366 unsigned int sh_type
,
11367 const unsigned char* prelocs
,
11368 size_t reloc_count
,
11369 Output_section
* output_section
,
11370 bool needs_special_offset_handling
,
11371 const unsigned char* view
,
11372 Arm_address view_address
,
11373 section_size_type view_size
)
11375 if (sh_type
== elfcpp::SHT_REL
)
11376 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
11381 needs_special_offset_handling
,
11385 else if (sh_type
== elfcpp::SHT_RELA
)
11386 // We do not support RELA type relocations yet. This is provided for
11388 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
11393 needs_special_offset_handling
,
11398 gold_unreachable();
11401 // Group input sections for stub generation.
11403 // We group input sections in an output section so that the total size,
11404 // including any padding space due to alignment is smaller than GROUP_SIZE
11405 // unless the only input section in group is bigger than GROUP_SIZE already.
11406 // Then an ARM stub table is created to follow the last input section
11407 // in group. For each group an ARM stub table is created an is placed
11408 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11409 // extend the group after the stub table.
11411 template<bool big_endian
>
11413 Target_arm
<big_endian
>::group_sections(
11415 section_size_type group_size
,
11416 bool stubs_always_after_branch
,
11419 // Group input sections and insert stub table
11420 Layout::Section_list section_list
;
11421 layout
->get_allocated_sections(§ion_list
);
11422 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11423 p
!= section_list
.end();
11426 Arm_output_section
<big_endian
>* output_section
=
11427 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11428 output_section
->group_sections(group_size
, stubs_always_after_branch
,
11433 // Relaxation hook. This is where we do stub generation.
11435 template<bool big_endian
>
11437 Target_arm
<big_endian
>::do_relax(
11439 const Input_objects
* input_objects
,
11440 Symbol_table
* symtab
,
11444 // No need to generate stubs if this is a relocatable link.
11445 gold_assert(!parameters
->options().relocatable());
11447 // If this is the first pass, we need to group input sections into
11449 bool done_exidx_fixup
= false;
11450 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
11453 // Determine the stub group size. The group size is the absolute
11454 // value of the parameter --stub-group-size. If --stub-group-size
11455 // is passed a negative value, we restrict stubs to be always after
11456 // the stubbed branches.
11457 int32_t stub_group_size_param
=
11458 parameters
->options().stub_group_size();
11459 bool stubs_always_after_branch
= stub_group_size_param
< 0;
11460 section_size_type stub_group_size
= abs(stub_group_size_param
);
11462 if (stub_group_size
== 1)
11465 // Thumb branch range is +-4MB has to be used as the default
11466 // maximum size (a given section can contain both ARM and Thumb
11467 // code, so the worst case has to be taken into account). If we are
11468 // fixing cortex-a8 errata, the branch range has to be even smaller,
11469 // since wide conditional branch has a range of +-1MB only.
11471 // This value is 48K less than that, which allows for 4096
11472 // 12-byte stubs. If we exceed that, then we will fail to link.
11473 // The user will have to relink with an explicit group size
11475 stub_group_size
= 4145152;
11478 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11479 // page as the first half of a 32-bit branch straddling two 4K pages.
11480 // This is a crude way of enforcing that. In addition, long conditional
11481 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11482 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11483 // cortex-A8 stubs from long conditional branches.
11484 if (this->fix_cortex_a8_
)
11486 stubs_always_after_branch
= true;
11487 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
11488 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
11491 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
11493 // Also fix .ARM.exidx section coverage.
11494 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
11495 for (Layout::Section_list::const_iterator p
=
11496 layout
->section_list().begin();
11497 p
!= layout
->section_list().end();
11499 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
11501 if (exidx_output_section
== NULL
)
11502 exidx_output_section
=
11503 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11505 // We cannot handle this now.
11506 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11507 "non-relocatable link"),
11508 exidx_output_section
->name(),
11512 if (exidx_output_section
!= NULL
)
11514 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
11516 done_exidx_fixup
= true;
11521 // If this is not the first pass, addresses and file offsets have
11522 // been reset at this point, set them here.
11523 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11524 sp
!= this->stub_tables_
.end();
11527 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11528 off_t off
= align_address(owner
->original_size(),
11529 (*sp
)->addralign());
11530 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
11531 owner
->offset() + off
);
11535 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11536 // beginning of each relaxation pass, just blow away all the stubs.
11537 // Alternatively, we could selectively remove only the stubs and reloc
11538 // information for code sections that have moved since the last pass.
11539 // That would require more book-keeping.
11540 if (this->fix_cortex_a8_
)
11542 // Clear all Cortex-A8 reloc information.
11543 for (typename
Cortex_a8_relocs_info::const_iterator p
=
11544 this->cortex_a8_relocs_info_
.begin();
11545 p
!= this->cortex_a8_relocs_info_
.end();
11548 this->cortex_a8_relocs_info_
.clear();
11550 // Remove all Cortex-A8 stubs.
11551 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11552 sp
!= this->stub_tables_
.end();
11554 (*sp
)->remove_all_cortex_a8_stubs();
11557 // Scan relocs for relocation stubs
11558 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11559 op
!= input_objects
->relobj_end();
11562 Arm_relobj
<big_endian
>* arm_relobj
=
11563 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11564 // Lock the object so we can read from it. This is only called
11565 // single-threaded from Layout::finalize, so it is OK to lock.
11566 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11567 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
11570 // Check all stub tables to see if any of them have their data sizes
11571 // or addresses alignments changed. These are the only things that
11573 bool any_stub_table_changed
= false;
11574 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
11575 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11576 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11579 if ((*sp
)->update_data_size_and_addralign())
11581 // Update data size of stub table owner.
11582 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11583 uint64_t address
= owner
->address();
11584 off_t offset
= owner
->offset();
11585 owner
->reset_address_and_file_offset();
11586 owner
->set_address_and_file_offset(address
, offset
);
11588 sections_needing_adjustment
.insert(owner
->output_section());
11589 any_stub_table_changed
= true;
11593 // Output_section_data::output_section() returns a const pointer but we
11594 // need to update output sections, so we record all output sections needing
11595 // update above and scan the sections here to find out what sections need
11597 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
11598 p
!= layout
->section_list().end();
11601 if (sections_needing_adjustment
.find(*p
)
11602 != sections_needing_adjustment
.end())
11603 (*p
)->set_section_offsets_need_adjustment();
11606 // Stop relaxation if no EXIDX fix-up and no stub table change.
11607 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
11609 // Finalize the stubs in the last relaxation pass.
11610 if (!continue_relaxation
)
11612 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11613 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11615 (*sp
)->finalize_stubs();
11617 // Update output local symbol counts of objects if necessary.
11618 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11619 op
!= input_objects
->relobj_end();
11622 Arm_relobj
<big_endian
>* arm_relobj
=
11623 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11625 // Update output local symbol counts. We need to discard local
11626 // symbols defined in parts of input sections that are discarded by
11628 if (arm_relobj
->output_local_symbol_count_needs_update())
11630 // We need to lock the object's file to update it.
11631 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11632 arm_relobj
->update_output_local_symbol_count();
11637 return continue_relaxation
;
11640 // Relocate a stub.
11642 template<bool big_endian
>
11644 Target_arm
<big_endian
>::relocate_stub(
11646 const Relocate_info
<32, big_endian
>* relinfo
,
11647 Output_section
* output_section
,
11648 unsigned char* view
,
11649 Arm_address address
,
11650 section_size_type view_size
)
11653 const Stub_template
* stub_template
= stub
->stub_template();
11654 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11656 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11657 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11659 unsigned int r_type
= insn
->r_type();
11660 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11661 section_size_type reloc_size
= insn
->size();
11662 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11664 // This is the address of the stub destination.
11665 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11666 Symbol_value
<32> symval
;
11667 symval
.set_output_value(target
);
11669 // Synthesize a fake reloc just in case. We don't have a symbol so
11671 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11672 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11673 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11674 reloc_write
.put_r_offset(reloc_offset
);
11675 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11676 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11678 relocate
.relocate(relinfo
, this, output_section
,
11679 this->fake_relnum_for_stubs
, rel
, r_type
,
11680 NULL
, &symval
, view
+ reloc_offset
,
11681 address
+ reloc_offset
, reloc_size
);
11685 // Determine whether an object attribute tag takes an integer, a
11688 template<bool big_endian
>
11690 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11692 if (tag
== Object_attribute::Tag_compatibility
)
11693 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11694 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11695 else if (tag
== elfcpp::Tag_nodefaults
)
11696 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11697 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11698 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11699 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11701 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11703 return ((tag
& 1) != 0
11704 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11705 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11708 // Reorder attributes.
11710 // The ABI defines that Tag_conformance should be emitted first, and that
11711 // Tag_nodefaults should be second (if either is defined). This sets those
11712 // two positions, and bumps up the position of all the remaining tags to
11715 template<bool big_endian
>
11717 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11719 // Reorder the known object attributes in output. We want to move
11720 // Tag_conformance to position 4 and Tag_conformance to position 5
11721 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11723 return elfcpp::Tag_conformance
;
11725 return elfcpp::Tag_nodefaults
;
11726 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11728 if ((num
- 1) < elfcpp::Tag_conformance
)
11733 // Scan a span of THUMB code for Cortex-A8 erratum.
11735 template<bool big_endian
>
11737 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11738 Arm_relobj
<big_endian
>* arm_relobj
,
11739 unsigned int shndx
,
11740 section_size_type span_start
,
11741 section_size_type span_end
,
11742 const unsigned char* view
,
11743 Arm_address address
)
11745 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11747 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11748 // The branch target is in the same 4KB region as the
11749 // first half of the branch.
11750 // The instruction before the branch is a 32-bit
11751 // length non-branch instruction.
11752 section_size_type i
= span_start
;
11753 bool last_was_32bit
= false;
11754 bool last_was_branch
= false;
11755 while (i
< span_end
)
11757 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11758 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11759 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11760 bool is_blx
= false, is_b
= false;
11761 bool is_bl
= false, is_bcc
= false;
11763 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11766 // Load the rest of the insn (in manual-friendly order).
11767 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11769 // Encoding T4: B<c>.W.
11770 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11771 // Encoding T1: BL<c>.W.
11772 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11773 // Encoding T2: BLX<c>.W.
11774 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11775 // Encoding T3: B<c>.W (not permitted in IT block).
11776 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11777 && (insn
& 0x07f00000U
) != 0x03800000U
);
11780 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11782 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11783 // page boundary and it follows 32-bit non-branch instruction,
11784 // we need to work around.
11785 if (is_32bit_branch
11786 && ((address
+ i
) & 0xfffU
) == 0xffeU
11788 && !last_was_branch
)
11790 // Check to see if there is a relocation stub for this branch.
11791 bool force_target_arm
= false;
11792 bool force_target_thumb
= false;
11793 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11794 Cortex_a8_relocs_info::const_iterator p
=
11795 this->cortex_a8_relocs_info_
.find(address
+ i
);
11797 if (p
!= this->cortex_a8_relocs_info_
.end())
11799 cortex_a8_reloc
= p
->second
;
11800 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11802 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11803 && !target_is_thumb
)
11804 force_target_arm
= true;
11805 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11806 && target_is_thumb
)
11807 force_target_thumb
= true;
11811 Stub_type stub_type
= arm_stub_none
;
11813 // Check if we have an offending branch instruction.
11814 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11815 uint16_t lower_insn
= insn
& 0xffffU
;
11816 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
11818 if (cortex_a8_reloc
!= NULL
11819 && cortex_a8_reloc
->reloc_stub() != NULL
)
11820 // We've already made a stub for this instruction, e.g.
11821 // it's a long branch or a Thumb->ARM stub. Assume that
11822 // stub will suffice to work around the A8 erratum (see
11823 // setting of always_after_branch above).
11827 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11829 stub_type
= arm_stub_a8_veneer_b_cond
;
11831 else if (is_b
|| is_bl
|| is_blx
)
11833 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11838 stub_type
= (is_blx
11839 ? arm_stub_a8_veneer_blx
11841 ? arm_stub_a8_veneer_bl
11842 : arm_stub_a8_veneer_b
));
11845 if (stub_type
!= arm_stub_none
)
11847 Arm_address pc_for_insn
= address
+ i
+ 4;
11849 // The original instruction is a BL, but the target is
11850 // an ARM instruction. If we were not making a stub,
11851 // the BL would have been converted to a BLX. Use the
11852 // BLX stub instead in that case.
11853 if (this->may_use_v5t_interworking() && force_target_arm
11854 && stub_type
== arm_stub_a8_veneer_bl
)
11856 stub_type
= arm_stub_a8_veneer_blx
;
11860 // Conversely, if the original instruction was
11861 // BLX but the target is Thumb mode, use the BL stub.
11862 else if (force_target_thumb
11863 && stub_type
== arm_stub_a8_veneer_blx
)
11865 stub_type
= arm_stub_a8_veneer_bl
;
11873 // If we found a relocation, use the proper destination,
11874 // not the offset in the (unrelocated) instruction.
11875 // Note this is always done if we switched the stub type above.
11876 if (cortex_a8_reloc
!= NULL
)
11877 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11879 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11881 // Add a new stub if destination address in in the same page.
11882 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11884 Cortex_a8_stub
* stub
=
11885 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11889 Stub_table
<big_endian
>* stub_table
=
11890 arm_relobj
->stub_table(shndx
);
11891 gold_assert(stub_table
!= NULL
);
11892 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11897 i
+= insn_32bit
? 4 : 2;
11898 last_was_32bit
= insn_32bit
;
11899 last_was_branch
= is_32bit_branch
;
11903 // Apply the Cortex-A8 workaround.
11905 template<bool big_endian
>
11907 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11908 const Cortex_a8_stub
* stub
,
11909 Arm_address stub_address
,
11910 unsigned char* insn_view
,
11911 Arm_address insn_address
)
11913 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11914 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
11915 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11916 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11917 off_t branch_offset
= stub_address
- (insn_address
+ 4);
11919 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
11920 switch (stub
->stub_template()->type())
11922 case arm_stub_a8_veneer_b_cond
:
11923 // For a conditional branch, we re-write it to be an unconditional
11924 // branch to the stub. We use the THUMB-2 encoding here.
11925 upper_insn
= 0xf000U
;
11926 lower_insn
= 0xb800U
;
11928 case arm_stub_a8_veneer_b
:
11929 case arm_stub_a8_veneer_bl
:
11930 case arm_stub_a8_veneer_blx
:
11931 if ((lower_insn
& 0x5000U
) == 0x4000U
)
11932 // For a BLX instruction, make sure that the relocation is
11933 // rounded up to a word boundary. This follows the semantics of
11934 // the instruction which specifies that bit 1 of the target
11935 // address will come from bit 1 of the base address.
11936 branch_offset
= (branch_offset
+ 2) & ~3;
11938 // Put BRANCH_OFFSET back into the insn.
11939 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
11940 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
11941 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
11945 gold_unreachable();
11948 // Put the relocated value back in the object file:
11949 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
11950 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
11953 // Target selector for ARM. Note this is never instantiated directly.
11954 // It's only used in Target_selector_arm_nacl, below.
11956 template<bool big_endian
>
11957 class Target_selector_arm
: public Target_selector
11960 Target_selector_arm()
11961 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
11962 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
11963 (big_endian
? "armelfb" : "armelf"))
11967 do_instantiate_target()
11968 { return new Target_arm
<big_endian
>(); }
11971 // Fix .ARM.exidx section coverage.
11973 template<bool big_endian
>
11975 Target_arm
<big_endian
>::fix_exidx_coverage(
11977 const Input_objects
* input_objects
,
11978 Arm_output_section
<big_endian
>* exidx_section
,
11979 Symbol_table
* symtab
,
11982 // We need to look at all the input sections in output in ascending
11983 // order of of output address. We do that by building a sorted list
11984 // of output sections by addresses. Then we looks at the output sections
11985 // in order. The input sections in an output section are already sorted
11986 // by addresses within the output section.
11988 typedef std::set
<Output_section
*, output_section_address_less_than
>
11989 Sorted_output_section_list
;
11990 Sorted_output_section_list sorted_output_sections
;
11992 // Find out all the output sections of input sections pointed by
11993 // EXIDX input sections.
11994 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
11995 p
!= input_objects
->relobj_end();
11998 Arm_relobj
<big_endian
>* arm_relobj
=
11999 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12000 std::vector
<unsigned int> shndx_list
;
12001 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12002 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12004 const Arm_exidx_input_section
* exidx_input_section
=
12005 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12006 gold_assert(exidx_input_section
!= NULL
);
12007 if (!exidx_input_section
->has_errors())
12009 unsigned int text_shndx
= exidx_input_section
->link();
12010 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12011 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12012 sorted_output_sections
.insert(os
);
12017 // Go over the output sections in ascending order of output addresses.
12018 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12020 Text_section_list sorted_text_sections
;
12021 for (typename
Sorted_output_section_list::iterator p
=
12022 sorted_output_sections
.begin();
12023 p
!= sorted_output_sections
.end();
12026 Arm_output_section
<big_endian
>* arm_output_section
=
12027 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12028 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12031 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12032 merge_exidx_entries(), task
);
12035 template<bool big_endian
>
12037 Target_arm
<big_endian
>::do_define_standard_symbols(
12038 Symbol_table
* symtab
,
12041 // Handle the .ARM.exidx section.
12042 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12044 if (exidx_section
!= NULL
)
12046 // Create __exidx_start and __exidx_end symbols.
12047 symtab
->define_in_output_data("__exidx_start",
12049 Symbol_table::PREDEFINED
,
12053 elfcpp::STT_NOTYPE
,
12054 elfcpp::STB_GLOBAL
,
12055 elfcpp::STV_HIDDEN
,
12057 false, // offset_is_from_end
12058 true); // only_if_ref
12060 symtab
->define_in_output_data("__exidx_end",
12062 Symbol_table::PREDEFINED
,
12066 elfcpp::STT_NOTYPE
,
12067 elfcpp::STB_GLOBAL
,
12068 elfcpp::STV_HIDDEN
,
12070 true, // offset_is_from_end
12071 true); // only_if_ref
12075 // Define __exidx_start and __exidx_end even when .ARM.exidx
12076 // section is missing to match ld's behaviour.
12077 symtab
->define_as_constant("__exidx_start", NULL
,
12078 Symbol_table::PREDEFINED
,
12079 0, 0, elfcpp::STT_OBJECT
,
12080 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12082 symtab
->define_as_constant("__exidx_end", NULL
,
12083 Symbol_table::PREDEFINED
,
12084 0, 0, elfcpp::STT_OBJECT
,
12085 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12090 // NaCl variant. It uses different PLT contents.
12092 template<bool big_endian
>
12093 class Output_data_plt_arm_nacl
;
12095 template<bool big_endian
>
12096 class Target_arm_nacl
: public Target_arm
<big_endian
>
12100 : Target_arm
<big_endian
>(&arm_nacl_info
)
12104 virtual Output_data_plt_arm
<big_endian
>*
12105 do_make_data_plt(Layout
* layout
, Output_data_space
* got_plt
)
12106 { return new Output_data_plt_arm_nacl
<big_endian
>(layout
, got_plt
); }
12109 static const Target::Target_info arm_nacl_info
;
12112 template<bool big_endian
>
12113 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
12116 big_endian
, // is_big_endian
12117 elfcpp::EM_ARM
, // machine_code
12118 false, // has_make_symbol
12119 false, // has_resolve
12120 false, // has_code_fill
12121 true, // is_default_stack_executable
12122 false, // can_icf_inline_merge_sections
12124 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12125 0x20000, // default_text_segment_address
12126 0x10000, // abi_pagesize (overridable by -z max-page-size)
12127 0x10000, // common_pagesize (overridable by -z common-page-size)
12128 true, // isolate_execinstr
12129 0x10000000, // rosegment_gap
12130 elfcpp::SHN_UNDEF
, // small_common_shndx
12131 elfcpp::SHN_UNDEF
, // large_common_shndx
12132 0, // small_common_section_flags
12133 0, // large_common_section_flags
12134 ".ARM.attributes", // attributes_section
12135 "aeabi" // attributes_vendor
12138 template<bool big_endian
>
12139 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
12142 Output_data_plt_arm_nacl(Layout
* layout
, Output_data_space
* got_plt
)
12143 : Output_data_plt_arm
<big_endian
>(layout
, 16, got_plt
)
12147 // Return the offset of the first non-reserved PLT entry.
12148 virtual unsigned int
12149 do_first_plt_entry_offset() const
12150 { return sizeof(first_plt_entry
); }
12152 // Return the size of a PLT entry.
12153 virtual unsigned int
12154 do_get_plt_entry_size() const
12155 { return sizeof(plt_entry
); }
12158 do_fill_first_plt_entry(unsigned char* pov
,
12159 Arm_address got_address
,
12160 Arm_address plt_address
);
12163 do_fill_plt_entry(unsigned char* pov
,
12164 Arm_address got_address
,
12165 Arm_address plt_address
,
12166 unsigned int got_offset
,
12167 unsigned int plt_offset
);
12170 inline uint32_t arm_movw_immediate(uint32_t value
)
12172 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
12175 inline uint32_t arm_movt_immediate(uint32_t value
)
12177 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
12180 // Template for the first PLT entry.
12181 static const uint32_t first_plt_entry
[16];
12183 // Template for subsequent PLT entries.
12184 static const uint32_t plt_entry
[4];
12187 // The first entry in the PLT.
12188 template<bool big_endian
>
12189 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
12192 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12193 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12194 0xe08cc00f, // add ip, ip, pc
12195 0xe52dc008, // str ip, [sp, #-8]!
12197 0xe7dfcf1f, // bfc ip, #30, #2
12198 0xe59cc000, // ldr ip, [ip]
12199 0xe3ccc13f, // bic ip, ip, #0xc000000f
12200 0xe12fff1c, // bx ip
12206 0xe50dc004, // str ip, [sp, #-4]
12208 0xe7dfcf1f, // bfc ip, #30, #2
12209 0xe59cc000, // ldr ip, [ip]
12210 0xe3ccc13f, // bic ip, ip, #0xc000000f
12211 0xe12fff1c, // bx ip
12214 template<bool big_endian
>
12216 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
12217 unsigned char* pov
,
12218 Arm_address got_address
,
12219 Arm_address plt_address
)
12221 // Write first PLT entry. All but first two words are constants.
12222 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
12223 / sizeof(first_plt_entry
[0]));
12225 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
12227 elfcpp::Swap
<32, big_endian
>::writeval
12228 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
12229 elfcpp::Swap
<32, big_endian
>::writeval
12230 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
12232 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
12233 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
12236 // Subsequent entries in the PLT.
12238 template<bool big_endian
>
12239 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
12241 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12242 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12243 0xe08cc00f, // add ip, ip, pc
12244 0xea000000, // b .Lplt_tail
12247 template<bool big_endian
>
12249 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
12250 unsigned char* pov
,
12251 Arm_address got_address
,
12252 Arm_address plt_address
,
12253 unsigned int got_offset
,
12254 unsigned int plt_offset
)
12256 // Calculate the displacement between the PLT slot and the
12257 // common tail that's part of the special initial PLT slot.
12258 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
12259 - (plt_address
+ plt_offset
12260 + sizeof(plt_entry
) + sizeof(uint32_t)));
12261 gold_assert((tail_displacement
& 3) == 0);
12262 tail_displacement
>>= 2;
12264 gold_assert ((tail_displacement
& 0xff000000) == 0
12265 || (-tail_displacement
& 0xff000000) == 0);
12267 // Calculate the displacement between the PLT slot and the entry
12268 // in the GOT. The offset accounts for the value produced by
12269 // adding to pc in the penultimate instruction of the PLT stub.
12270 const int32_t got_displacement
= (got_address
+ got_offset
12271 - (plt_address
+ sizeof(plt_entry
)));
12273 elfcpp::Swap
<32, big_endian
>::writeval
12274 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
12275 elfcpp::Swap
<32, big_endian
>::writeval
12276 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
12277 elfcpp::Swap
<32, big_endian
>::writeval
12278 (pov
+ 8, plt_entry
[2]);
12279 elfcpp::Swap
<32, big_endian
>::writeval
12280 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
12283 // Target selectors.
12285 template<bool big_endian
>
12286 class Target_selector_arm_nacl
12287 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
12288 Target_arm_nacl
<big_endian
> >
12291 Target_selector_arm_nacl()
12292 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
12293 Target_arm_nacl
<big_endian
> >(
12295 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12296 big_endian
? "armelfb_nacl" : "armelf_nacl")
12300 Target_selector_arm_nacl
<false> target_selector_arm
;
12301 Target_selector_arm_nacl
<true> target_selector_armbe
;
12303 } // End anonymous namespace.