1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2015 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_short
;
67 template<bool big_endian
>
68 class Output_data_plt_arm_long
;
70 template<bool big_endian
>
73 template<bool big_endian
>
74 class Arm_input_section
;
76 class Arm_exidx_cantunwind
;
78 class Arm_exidx_merged_section
;
80 class Arm_exidx_fixup
;
82 template<bool big_endian
>
83 class Arm_output_section
;
85 class Arm_exidx_input_section
;
87 template<bool big_endian
>
90 template<bool big_endian
>
91 class Arm_relocate_functions
;
93 template<bool big_endian
>
94 class Arm_output_data_got
;
96 template<bool big_endian
>
100 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
102 // Maximum branch offsets for ARM, THUMB and THUMB2.
103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
105 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
106 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
110 // Thread Control Block size.
111 const size_t ARM_TCB_SIZE
= 8;
113 // The arm target class.
115 // This is a very simple port of gold for ARM-EABI. It is intended for
116 // supporting Android only for the time being.
119 // - Implement all static relocation types documented in arm-reloc.def.
120 // - Make PLTs more flexible for different architecture features like
122 // There are probably a lot more.
124 // Ideally we would like to avoid using global variables but this is used
125 // very in many places and sometimes in loops. If we use a function
126 // returning a static instance of Arm_reloc_property_table, it will be very
127 // slow in an threaded environment since the static instance needs to be
128 // locked. The pointer is below initialized in the
129 // Target::do_select_as_default_target() hook so that we do not spend time
130 // building the table if we are not linking ARM objects.
132 // An alternative is to to process the information in arm-reloc.def in
133 // compilation time and generate a representation of it in PODs only. That
134 // way we can avoid initialization when the linker starts.
136 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
138 // Instruction template class. This class is similar to the insn_sequence
139 // struct in bfd/elf32-arm.c.
144 // Types of instruction templates.
148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
149 // templates with class-specific semantics. Currently this is used
150 // only by the Cortex_a8_stub class for handling condition codes in
151 // conditional branches.
152 THUMB16_SPECIAL_TYPE
,
158 // Factory methods to create instruction templates in different formats.
160 static const Insn_template
161 thumb16_insn(uint32_t data
)
162 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
164 // A Thumb conditional branch, in which the proper condition is inserted
165 // when we build the stub.
166 static const Insn_template
167 thumb16_bcond_insn(uint32_t data
)
168 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
170 static const Insn_template
171 thumb32_insn(uint32_t data
)
172 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
174 static const Insn_template
175 thumb32_b_insn(uint32_t data
, int reloc_addend
)
177 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
181 static const Insn_template
182 arm_insn(uint32_t data
)
183 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
185 static const Insn_template
186 arm_rel_insn(unsigned data
, int reloc_addend
)
187 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
189 static const Insn_template
190 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
191 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
193 // Accessors. This class is used for read-only objects so no modifiers
198 { return this->data_
; }
200 // Return the instruction sequence type of this.
203 { return this->type_
; }
205 // Return the ARM relocation type of this.
208 { return this->r_type_
; }
212 { return this->reloc_addend_
; }
214 // Return size of instruction template in bytes.
218 // Return byte-alignment of instruction template.
223 // We make the constructor private to ensure that only the factory
226 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
227 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
230 // Instruction specific data. This is used to store information like
231 // some of the instruction bits.
233 // Instruction template type.
235 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
236 unsigned int r_type_
;
237 // Relocation addend.
238 int32_t reloc_addend_
;
241 // Macro for generating code to stub types. One entry per long/short
245 DEF_STUB(long_branch_any_any) \
246 DEF_STUB(long_branch_v4t_arm_thumb) \
247 DEF_STUB(long_branch_thumb_only) \
248 DEF_STUB(long_branch_v4t_thumb_thumb) \
249 DEF_STUB(long_branch_v4t_thumb_arm) \
250 DEF_STUB(short_branch_v4t_thumb_arm) \
251 DEF_STUB(long_branch_any_arm_pic) \
252 DEF_STUB(long_branch_any_thumb_pic) \
253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
256 DEF_STUB(long_branch_thumb_only_pic) \
257 DEF_STUB(a8_veneer_b_cond) \
258 DEF_STUB(a8_veneer_b) \
259 DEF_STUB(a8_veneer_bl) \
260 DEF_STUB(a8_veneer_blx) \
261 DEF_STUB(v4_veneer_bx)
265 #define DEF_STUB(x) arm_stub_##x,
271 // First reloc stub type.
272 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
273 // Last reloc stub type.
274 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
276 // First Cortex-A8 stub type.
277 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
278 // Last Cortex-A8 stub type.
279 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
282 arm_stub_type_last
= arm_stub_v4_veneer_bx
286 // Stub template class. Templates are meant to be read-only objects.
287 // A stub template for a stub type contains all read-only attributes
288 // common to all stubs of the same type.
293 Stub_template(Stub_type
, const Insn_template
*, size_t);
301 { return this->type_
; }
303 // Return an array of instruction templates.
306 { return this->insns_
; }
308 // Return size of template in number of instructions.
311 { return this->insn_count_
; }
313 // Return size of template in bytes.
316 { return this->size_
; }
318 // Return alignment of the stub template.
321 { return this->alignment_
; }
323 // Return whether entry point is in thumb mode.
325 entry_in_thumb_mode() const
326 { return this->entry_in_thumb_mode_
; }
328 // Return number of relocations in this template.
331 { return this->relocs_
.size(); }
333 // Return index of the I-th instruction with relocation.
335 reloc_insn_index(size_t i
) const
337 gold_assert(i
< this->relocs_
.size());
338 return this->relocs_
[i
].first
;
341 // Return the offset of the I-th instruction with relocation from the
342 // beginning of the stub.
344 reloc_offset(size_t i
) const
346 gold_assert(i
< this->relocs_
.size());
347 return this->relocs_
[i
].second
;
351 // This contains information about an instruction template with a relocation
352 // and its offset from start of stub.
353 typedef std::pair
<size_t, section_size_type
> Reloc
;
355 // A Stub_template may not be copied. We want to share templates as much
357 Stub_template(const Stub_template
&);
358 Stub_template
& operator=(const Stub_template
&);
362 // Points to an array of Insn_templates.
363 const Insn_template
* insns_
;
364 // Number of Insn_templates in insns_[].
366 // Size of templated instructions in bytes.
368 // Alignment of templated instructions.
370 // Flag to indicate if entry is in thumb mode.
371 bool entry_in_thumb_mode_
;
372 // A table of reloc instruction indices and offsets. We can find these by
373 // looking at the instruction templates but we pre-compute and then stash
374 // them here for speed.
375 std::vector
<Reloc
> relocs_
;
379 // A class for code stubs. This is a base class for different type of
380 // stubs used in the ARM target.
386 static const section_offset_type invalid_offset
=
387 static_cast<section_offset_type
>(-1);
390 Stub(const Stub_template
* stub_template
)
391 : stub_template_(stub_template
), offset_(invalid_offset
)
398 // Return the stub template.
400 stub_template() const
401 { return this->stub_template_
; }
403 // Return offset of code stub from beginning of its containing stub table.
407 gold_assert(this->offset_
!= invalid_offset
);
408 return this->offset_
;
411 // Set offset of code stub from beginning of its containing stub table.
413 set_offset(section_offset_type offset
)
414 { this->offset_
= offset
; }
416 // Return the relocation target address of the i-th relocation in the
417 // stub. This must be defined in a child class.
419 reloc_target(size_t i
)
420 { return this->do_reloc_target(i
); }
422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
424 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
425 { this->do_write(view
, view_size
, big_endian
); }
427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
428 // for the i-th instruction.
430 thumb16_special(size_t i
)
431 { return this->do_thumb16_special(i
); }
434 // This must be defined in the child class.
436 do_reloc_target(size_t) = 0;
438 // This may be overridden in the child class.
440 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
443 this->do_fixed_endian_write
<true>(view
, view_size
);
445 this->do_fixed_endian_write
<false>(view
, view_size
);
448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
449 // instruction template.
451 do_thumb16_special(size_t)
452 { gold_unreachable(); }
455 // A template to implement do_write.
456 template<bool big_endian
>
458 do_fixed_endian_write(unsigned char*, section_size_type
);
461 const Stub_template
* stub_template_
;
462 // Offset within the section of containing this stub.
463 section_offset_type offset_
;
466 // Reloc stub class. These are stubs we use to fix up relocation because
467 // of limited branch ranges.
469 class Reloc_stub
: public Stub
472 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
473 // We assume we never jump to this address.
474 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
476 // Return destination address.
478 destination_address() const
480 gold_assert(this->destination_address_
!= this->invalid_address
);
481 return this->destination_address_
;
484 // Set destination address.
486 set_destination_address(Arm_address address
)
488 gold_assert(address
!= this->invalid_address
);
489 this->destination_address_
= address
;
492 // Reset destination address.
494 reset_destination_address()
495 { this->destination_address_
= this->invalid_address
; }
497 // Determine stub type for a branch of a relocation of R_TYPE going
498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
499 // the branch target is a thumb instruction. TARGET is used for look
500 // up ARM-specific linker settings.
502 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
503 Arm_address branch_target
, bool target_is_thumb
);
505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
506 // and an addend. Since we treat global and local symbol differently, we
507 // use a Symbol object for a global symbol and a object-index pair for
512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
514 // and R_SYM must not be invalid_index.
515 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
516 unsigned int r_sym
, int32_t addend
)
517 : stub_type_(stub_type
), addend_(addend
)
521 this->r_sym_
= Reloc_stub::invalid_index
;
522 this->u_
.symbol
= symbol
;
526 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
527 this->r_sym_
= r_sym
;
528 this->u_
.relobj
= relobj
;
535 // Accessors: Keys are meant to be read-only object so no modifiers are
541 { return this->stub_type_
; }
543 // Return the local symbol index or invalid_index.
546 { return this->r_sym_
; }
548 // Return the symbol if there is one.
551 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
553 // Return the relobj if there is one.
556 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
558 // Whether this equals to another key k.
560 eq(const Key
& k
) const
562 return ((this->stub_type_
== k
.stub_type_
)
563 && (this->r_sym_
== k
.r_sym_
)
564 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
565 ? (this->u_
.relobj
== k
.u_
.relobj
)
566 : (this->u_
.symbol
== k
.u_
.symbol
))
567 && (this->addend_
== k
.addend_
));
570 // Return a hash value.
574 return (this->stub_type_
576 ^ gold::string_hash
<char>(
577 (this->r_sym_
!= Reloc_stub::invalid_index
)
578 ? this->u_
.relobj
->name().c_str()
579 : this->u_
.symbol
->name())
583 // Functors for STL associative containers.
587 operator()(const Key
& k
) const
588 { return k
.hash_value(); }
594 operator()(const Key
& k1
, const Key
& k2
) const
595 { return k1
.eq(k2
); }
598 // Name of key. This is mainly for debugging.
604 Stub_type stub_type_
;
605 // If this is a local symbol, this is the index in the defining object.
606 // Otherwise, it is invalid_index for a global symbol.
608 // If r_sym_ is an invalid index, this points to a global symbol.
609 // Otherwise, it points to a relobj. We used the unsized and target
610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
611 // Arm_relobj, in order to avoid making the stub class a template
612 // as most of the stub machinery is endianness-neutral. However, it
613 // may require a bit of casting done by users of this class.
616 const Symbol
* symbol
;
617 const Relobj
* relobj
;
619 // Addend associated with a reloc.
624 // Reloc_stubs are created via a stub factory. So these are protected.
625 Reloc_stub(const Stub_template
* stub_template
)
626 : Stub(stub_template
), destination_address_(invalid_address
)
632 friend class Stub_factory
;
634 // Return the relocation target address of the i-th relocation in the
637 do_reloc_target(size_t i
)
639 // All reloc stub have only one relocation.
641 return this->destination_address_
;
645 // Address of destination.
646 Arm_address destination_address_
;
649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
650 // THUMB branch that meets the following conditions:
652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
653 // branch address is 0xffe.
654 // 2. The branch target address is in the same page as the first word of the
656 // 3. The branch follows a 32-bit instruction which is not a branch.
658 // To do the fix up, we need to store the address of the branch instruction
659 // and its target at least. We also need to store the original branch
660 // instruction bits for the condition code in a conditional branch. The
661 // condition code is used in a special instruction template. We also want
662 // to identify input sections needing Cortex-A8 workaround quickly. We store
663 // extra information about object and section index of the code section
664 // containing a branch being fixed up. The information is used to mark
665 // the code section when we finalize the Cortex-A8 stubs.
668 class Cortex_a8_stub
: public Stub
674 // Return the object of the code section containing the branch being fixed
678 { return this->relobj_
; }
680 // Return the section index of the code section containing the branch being
684 { return this->shndx_
; }
686 // Return the source address of stub. This is the address of the original
687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
690 source_address() const
691 { return this->source_address_
; }
693 // Return the destination address of the stub. This is the branch taken
694 // address of the original branch instruction. LSB is 1 if it is a THUMB
695 // instruction address.
697 destination_address() const
698 { return this->destination_address_
; }
700 // Return the instruction being fixed up.
702 original_insn() const
703 { return this->original_insn_
; }
706 // Cortex_a8_stubs are created via a stub factory. So these are protected.
707 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
708 unsigned int shndx
, Arm_address source_address
,
709 Arm_address destination_address
, uint32_t original_insn
)
710 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
711 source_address_(source_address
| 1U),
712 destination_address_(destination_address
),
713 original_insn_(original_insn
)
716 friend class Stub_factory
;
718 // Return the relocation target address of the i-th relocation in the
721 do_reloc_target(size_t i
)
723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
725 // The conditional branch veneer has two relocations.
727 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
731 // All other Cortex-A8 stubs have only one relocation.
733 return this->destination_address_
;
737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
739 do_thumb16_special(size_t);
742 // Object of the code section containing the branch being fixed up.
744 // Section index of the code section containing the branch begin fixed up.
746 // Source address of original branch.
747 Arm_address source_address_
;
748 // Destination address of the original branch.
749 Arm_address destination_address_
;
750 // Original branch instruction. This is needed for copying the condition
751 // code from a condition branch to its stub.
752 uint32_t original_insn_
;
755 // ARMv4 BX Rx branch relocation stub class.
756 class Arm_v4bx_stub
: public Stub
762 // Return the associated register.
765 { return this->reg_
; }
768 // Arm V4BX stubs are created via a stub factory. So these are protected.
769 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
770 : Stub(stub_template
), reg_(reg
)
773 friend class Stub_factory
;
775 // Return the relocation target address of the i-th relocation in the
778 do_reloc_target(size_t)
779 { gold_unreachable(); }
781 // This may be overridden in the child class.
783 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
786 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
788 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
792 // A template to implement do_write.
793 template<bool big_endian
>
795 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
797 const Insn_template
* insns
= this->stub_template()->insns();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 + (this->reg_
<< 16)));
801 view
+= insns
[0].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[1].data() + this->reg_
));
804 view
+= insns
[1].size();
805 elfcpp::Swap
<32, big_endian
>::writeval(view
,
806 (insns
[2].data() + this->reg_
));
809 // A register index (r0-r14), which is associated with the stub.
813 // Stub factory class.
818 // Return the unique instance of this class.
819 static const Stub_factory
&
822 static Stub_factory singleton
;
826 // Make a relocation stub.
828 make_reloc_stub(Stub_type stub_type
) const
830 gold_assert(stub_type
>= arm_stub_reloc_first
831 && stub_type
<= arm_stub_reloc_last
);
832 return new Reloc_stub(this->stub_templates_
[stub_type
]);
835 // Make a Cortex-A8 stub.
837 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
838 Arm_address source
, Arm_address destination
,
839 uint32_t original_insn
) const
841 gold_assert(stub_type
>= arm_stub_cortex_a8_first
842 && stub_type
<= arm_stub_cortex_a8_last
);
843 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
844 source
, destination
, original_insn
);
847 // Make an ARM V4BX relocation stub.
848 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
850 make_arm_v4bx_stub(uint32_t reg
) const
852 gold_assert(reg
< 0xf);
853 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
858 // Constructor and destructor are protected since we only return a single
859 // instance created in Stub_factory::get_instance().
863 // A Stub_factory may not be copied since it is a singleton.
864 Stub_factory(const Stub_factory
&);
865 Stub_factory
& operator=(Stub_factory
&);
867 // Stub templates. These are initialized in the constructor.
868 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
871 // A class to hold stubs for the ARM target.
873 template<bool big_endian
>
874 class Stub_table
: public Output_data
877 Stub_table(Arm_input_section
<big_endian
>* owner
)
878 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
880 prev_data_size_(0), prev_addralign_(1)
886 // Owner of this stub table.
887 Arm_input_section
<big_endian
>*
889 { return this->owner_
; }
891 // Whether this stub table is empty.
895 return (this->reloc_stubs_
.empty()
896 && this->cortex_a8_stubs_
.empty()
897 && this->arm_v4bx_stubs_
.empty());
900 // Return the current data size.
902 current_data_size() const
903 { return this->current_data_size_for_child(); }
905 // Add a STUB using KEY. The caller is responsible for avoiding addition
906 // if a STUB with the same key has already been added.
908 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
910 const Stub_template
* stub_template
= stub
->stub_template();
911 gold_assert(stub_template
->type() == key
.stub_type());
912 this->reloc_stubs_
[key
] = stub
;
914 // Assign stub offset early. We can do this because we never remove
915 // reloc stubs and they are in the beginning of the stub table.
916 uint64_t align
= stub_template
->alignment();
917 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
918 stub
->set_offset(this->reloc_stubs_size_
);
919 this->reloc_stubs_size_
+= stub_template
->size();
920 this->reloc_stubs_addralign_
=
921 std::max(this->reloc_stubs_addralign_
, align
);
924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
925 // The caller is responsible for avoiding addition if a STUB with the same
926 // address has already been added.
928 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
930 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
931 this->cortex_a8_stubs_
.insert(value
);
934 // Add an ARM V4BX relocation stub. A register index will be retrieved
937 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
939 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
940 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
943 // Remove all Cortex-A8 stubs.
945 remove_all_cortex_a8_stubs();
947 // Look up a relocation stub using KEY. Return NULL if there is none.
949 find_reloc_stub(const Reloc_stub::Key
& key
) const
951 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
952 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
955 // Look up an arm v4bx relocation stub using the register index.
956 // Return NULL if there is none.
958 find_arm_v4bx_stub(const uint32_t reg
) const
960 gold_assert(reg
< 0xf);
961 return this->arm_v4bx_stubs_
[reg
];
964 // Relocate stubs in this stub table.
966 relocate_stubs(const Relocate_info
<32, big_endian
>*,
967 Target_arm
<big_endian
>*, Output_section
*,
968 unsigned char*, Arm_address
, section_size_type
);
970 // Update data size and alignment at the end of a relaxation pass. Return
971 // true if either data size or alignment is different from that of the
972 // previous relaxation pass.
974 update_data_size_and_addralign();
976 // Finalize stubs. Set the offsets of all stubs and mark input sections
977 // needing the Cortex-A8 workaround.
981 // Apply Cortex-A8 workaround to an address range.
983 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
984 unsigned char*, Arm_address
,
988 // Write out section contents.
990 do_write(Output_file
*);
992 // Return the required alignment.
995 { return this->prev_addralign_
; }
997 // Reset address and file offset.
999 do_reset_address_and_file_offset()
1000 { this->set_current_data_size_for_child(this->prev_data_size_
); }
1002 // Set final data size.
1004 set_final_data_size()
1005 { this->set_data_size(this->current_data_size()); }
1008 // Relocate one stub.
1010 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1011 Target_arm
<big_endian
>*, Output_section
*,
1012 unsigned char*, Arm_address
, section_size_type
);
1014 // Unordered map of relocation stubs.
1016 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1017 Reloc_stub::Key::equal_to
>
1020 // List of Cortex-A8 stubs ordered by addresses of branches being
1021 // fixed up in output.
1022 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1023 // List of Arm V4BX relocation stubs ordered by associated registers.
1024 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1026 // Owner of this stub table.
1027 Arm_input_section
<big_endian
>* owner_
;
1028 // The relocation stubs.
1029 Reloc_stub_map reloc_stubs_
;
1030 // Size of reloc stubs.
1031 off_t reloc_stubs_size_
;
1032 // Maximum address alignment of reloc stubs.
1033 uint64_t reloc_stubs_addralign_
;
1034 // The cortex_a8_stubs.
1035 Cortex_a8_stub_list cortex_a8_stubs_
;
1036 // The Arm V4BX relocation stubs.
1037 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1038 // data size of this in the previous pass.
1039 off_t prev_data_size_
;
1040 // address alignment of this in the previous pass.
1041 uint64_t prev_addralign_
;
1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1045 // we add to the end of an EXIDX input section that goes into the output.
1047 class Arm_exidx_cantunwind
: public Output_section_data
1050 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1051 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1054 // Return the object containing the section pointed by this.
1057 { return this->relobj_
; }
1059 // Return the section index of the section pointed by this.
1062 { return this->shndx_
; }
1066 do_write(Output_file
* of
)
1068 if (parameters
->target().is_big_endian())
1069 this->do_fixed_endian_write
<true>(of
);
1071 this->do_fixed_endian_write
<false>(of
);
1074 // Write to a map file.
1076 do_print_to_mapfile(Mapfile
* mapfile
) const
1077 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1080 // Implement do_write for a given endianness.
1081 template<bool big_endian
>
1083 do_fixed_endian_write(Output_file
*);
1085 // The object containing the section pointed by this.
1087 // The section index of the section pointed by this.
1088 unsigned int shndx_
;
1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1092 // Offset map is used to map input section offset within the EXIDX section
1093 // to the output offset from the start of this EXIDX section.
1095 typedef std::map
<section_offset_type
, section_offset_type
>
1096 Arm_exidx_section_offset_map
;
1098 // Arm_exidx_merged_section class. This represents an EXIDX input section
1099 // with some of its entries merged.
1101 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1104 // Constructor for Arm_exidx_merged_section.
1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1106 // SECTION_OFFSET_MAP points to a section offset map describing how
1107 // parts of the input section are mapped to output. DELETED_BYTES is
1108 // the number of bytes deleted from the EXIDX input section.
1109 Arm_exidx_merged_section(
1110 const Arm_exidx_input_section
& exidx_input_section
,
1111 const Arm_exidx_section_offset_map
& section_offset_map
,
1112 uint32_t deleted_bytes
);
1114 // Build output contents.
1116 build_contents(const unsigned char*, section_size_type
);
1118 // Return the original EXIDX input section.
1119 const Arm_exidx_input_section
&
1120 exidx_input_section() const
1121 { return this->exidx_input_section_
; }
1123 // Return the section offset map.
1124 const Arm_exidx_section_offset_map
&
1125 section_offset_map() const
1126 { return this->section_offset_map_
; }
1129 // Write merged section into file OF.
1131 do_write(Output_file
* of
);
1134 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1135 section_offset_type
*) const;
1138 // Original EXIDX input section.
1139 const Arm_exidx_input_section
& exidx_input_section_
;
1140 // Section offset map.
1141 const Arm_exidx_section_offset_map
& section_offset_map_
;
1142 // Merged section contents. We need to keep build the merged section
1143 // and save it here to avoid accessing the original EXIDX section when
1144 // we cannot lock the sections' object.
1145 unsigned char* section_contents_
;
1148 // A class to wrap an ordinary input section containing executable code.
1150 template<bool big_endian
>
1151 class Arm_input_section
: public Output_relaxed_input_section
1154 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1155 : Output_relaxed_input_section(relobj
, shndx
, 1),
1156 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1157 original_contents_(NULL
)
1160 ~Arm_input_section()
1161 { delete[] this->original_contents_
; }
1167 // Whether this is a stub table owner.
1169 is_stub_table_owner() const
1170 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1172 // Return the stub table.
1173 Stub_table
<big_endian
>*
1175 { return this->stub_table_
; }
1177 // Set the stub_table.
1179 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1180 { this->stub_table_
= stub_table
; }
1182 // Downcast a base pointer to an Arm_input_section pointer. This is
1183 // not type-safe but we only use Arm_input_section not the base class.
1184 static Arm_input_section
<big_endian
>*
1185 as_arm_input_section(Output_relaxed_input_section
* poris
)
1186 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1188 // Return the original size of the section.
1190 original_size() const
1191 { return this->original_size_
; }
1194 // Write data to output file.
1196 do_write(Output_file
*);
1198 // Return required alignment of this.
1200 do_addralign() const
1202 if (this->is_stub_table_owner())
1203 return std::max(this->stub_table_
->addralign(),
1204 static_cast<uint64_t>(this->original_addralign_
));
1206 return this->original_addralign_
;
1209 // Finalize data size.
1211 set_final_data_size();
1213 // Reset address and file offset.
1215 do_reset_address_and_file_offset();
1219 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1220 section_offset_type offset
,
1221 section_offset_type
* poutput
) const
1223 if ((object
== this->relobj())
1224 && (shndx
== this->shndx())
1227 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1237 // Copying is not allowed.
1238 Arm_input_section(const Arm_input_section
&);
1239 Arm_input_section
& operator=(const Arm_input_section
&);
1241 // Address alignment of the original input section.
1242 uint32_t original_addralign_
;
1243 // Section size of the original input section.
1244 uint32_t original_size_
;
1246 Stub_table
<big_endian
>* stub_table_
;
1247 // Original section contents. We have to make a copy here since the file
1248 // containing the original section may not be locked when we need to access
1250 unsigned char* original_contents_
;
1253 // Arm_exidx_fixup class. This is used to define a number of methods
1254 // and keep states for fixing up EXIDX coverage.
1256 class Arm_exidx_fixup
1259 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1260 bool merge_exidx_entries
= true)
1261 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1262 last_inlined_entry_(0), last_input_section_(NULL
),
1263 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1264 merge_exidx_entries_(merge_exidx_entries
)
1268 { delete this->section_offset_map_
; }
1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1272 // number of bytes to be deleted in output. If parts of the input EXIDX
1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1275 // responsible for releasing it.
1276 template<bool big_endian
>
1278 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1279 const unsigned char* section_contents
,
1280 section_size_type section_size
,
1281 Arm_exidx_section_offset_map
** psection_offset_map
);
1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1284 // input section, if there is not one already.
1286 add_exidx_cantunwind_as_needed();
1288 // Return the output section for the text section which is linked to the
1289 // first exidx input in output.
1291 first_output_text_section() const
1292 { return this->first_output_text_section_
; }
1295 // Copying is not allowed.
1296 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1297 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1299 // Type of EXIDX unwind entry.
1304 // EXIDX_CANTUNWIND.
1305 UT_EXIDX_CANTUNWIND
,
1312 // Process an EXIDX entry. We only care about the second word of the
1313 // entry. Return true if the entry can be deleted.
1315 process_exidx_entry(uint32_t second_word
);
1317 // Update the current section offset map during EXIDX section fix-up.
1318 // If there is no map, create one. INPUT_OFFSET is the offset of a
1319 // reference point, DELETED_BYTES is the number of deleted by in the
1320 // section so far. If DELETE_ENTRY is true, the reference point and
1321 // all offsets after the previous reference point are discarded.
1323 update_offset_map(section_offset_type input_offset
,
1324 section_size_type deleted_bytes
, bool delete_entry
);
1326 // EXIDX output section.
1327 Output_section
* exidx_output_section_
;
1328 // Unwind type of the last EXIDX entry processed.
1329 Unwind_type last_unwind_type_
;
1330 // Last seen inlined EXIDX entry.
1331 uint32_t last_inlined_entry_
;
1332 // Last processed EXIDX input section.
1333 const Arm_exidx_input_section
* last_input_section_
;
1334 // Section offset map created in process_exidx_section.
1335 Arm_exidx_section_offset_map
* section_offset_map_
;
1336 // Output section for the text section which is linked to the first exidx
1338 Output_section
* first_output_text_section_
;
1340 bool merge_exidx_entries_
;
1343 // Arm output section class. This is defined mainly to add a number of
1344 // stub generation methods.
1346 template<bool big_endian
>
1347 class Arm_output_section
: public Output_section
1350 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1353 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1354 elfcpp::Elf_Xword flags
)
1355 : Output_section(name
, type
,
1356 (type
== elfcpp::SHT_ARM_EXIDX
1357 ? flags
| elfcpp::SHF_LINK_ORDER
1360 if (type
== elfcpp::SHT_ARM_EXIDX
)
1361 this->set_always_keeps_input_sections();
1364 ~Arm_output_section()
1367 // Group input sections for stub generation.
1369 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1371 // Downcast a base pointer to an Arm_output_section pointer. This is
1372 // not type-safe but we only use Arm_output_section not the base class.
1373 static Arm_output_section
<big_endian
>*
1374 as_arm_output_section(Output_section
* os
)
1375 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1377 // Append all input text sections in this into LIST.
1379 append_text_sections_to_list(Text_section_list
* list
);
1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1382 // is a list of text input sections sorted in ascending order of their
1383 // output addresses.
1385 fix_exidx_coverage(Layout
* layout
,
1386 const Text_section_list
& sorted_text_section
,
1387 Symbol_table
* symtab
,
1388 bool merge_exidx_entries
,
1391 // Link an EXIDX section into its corresponding text section.
1393 set_exidx_section_link();
1397 typedef Output_section::Input_section Input_section
;
1398 typedef Output_section::Input_section_list Input_section_list
;
1400 // Create a stub group.
1401 void create_stub_group(Input_section_list::const_iterator
,
1402 Input_section_list::const_iterator
,
1403 Input_section_list::const_iterator
,
1404 Target_arm
<big_endian
>*,
1405 std::vector
<Output_relaxed_input_section
*>*,
1409 // Arm_exidx_input_section class. This represents an EXIDX input section.
1411 class Arm_exidx_input_section
1414 static const section_offset_type invalid_offset
=
1415 static_cast<section_offset_type
>(-1);
1417 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1418 unsigned int link
, uint32_t size
,
1419 uint32_t addralign
, uint32_t text_size
)
1420 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1421 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1424 ~Arm_exidx_input_section()
1427 // Accessors: This is a read-only class.
1429 // Return the object containing this EXIDX input section.
1432 { return this->relobj_
; }
1434 // Return the section index of this EXIDX input section.
1437 { return this->shndx_
; }
1439 // Return the section index of linked text section in the same object.
1442 { return this->link_
; }
1444 // Return size of the EXIDX input section.
1447 { return this->size_
; }
1449 // Return address alignment of EXIDX input section.
1452 { return this->addralign_
; }
1454 // Return size of the associated text input section.
1457 { return this->text_size_
; }
1459 // Whether there are any errors in the EXIDX input section.
1462 { return this->has_errors_
; }
1464 // Set has-errors flag.
1467 { this->has_errors_
= true; }
1470 // Object containing this.
1472 // Section index of this.
1473 unsigned int shndx_
;
1474 // text section linked to this in the same object.
1476 // Size of this. For ARM 32-bit is sufficient.
1478 // Address alignment of this. For ARM 32-bit is sufficient.
1479 uint32_t addralign_
;
1480 // Size of associated text section.
1481 uint32_t text_size_
;
1482 // Whether this has any errors.
1486 // Arm_relobj class.
1488 template<bool big_endian
>
1489 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1492 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1494 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1495 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1496 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1497 stub_tables_(), local_symbol_is_thumb_function_(),
1498 attributes_section_data_(NULL
), mapping_symbols_info_(),
1499 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1500 output_local_symbol_count_needs_update_(false),
1501 merge_flags_and_attributes_(true)
1505 { delete this->attributes_section_data_
; }
1507 // Return the stub table of the SHNDX-th section if there is one.
1508 Stub_table
<big_endian
>*
1509 stub_table(unsigned int shndx
) const
1511 gold_assert(shndx
< this->stub_tables_
.size());
1512 return this->stub_tables_
[shndx
];
1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1517 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1519 gold_assert(shndx
< this->stub_tables_
.size());
1520 this->stub_tables_
[shndx
] = stub_table
;
1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1524 // index. This is only valid after do_count_local_symbol is called.
1526 local_symbol_is_thumb_function(unsigned int r_sym
) const
1528 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1529 return this->local_symbol_is_thumb_function_
[r_sym
];
1532 // Scan all relocation sections for stub generation.
1534 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1537 // Convert regular input section with index SHNDX to a relaxed section.
1539 convert_input_section_to_relaxed_section(unsigned shndx
)
1541 // The stubs have relocations and we need to process them after writing
1542 // out the stubs. So relocation now must follow section write.
1543 this->set_section_offset(shndx
, -1ULL);
1544 this->set_relocs_must_follow_section_writes();
1547 // Downcast a base pointer to an Arm_relobj pointer. This is
1548 // not type-safe but we only use Arm_relobj not the base class.
1549 static Arm_relobj
<big_endian
>*
1550 as_arm_relobj(Relobj
* relobj
)
1551 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1553 // Processor-specific flags in ELF file header. This is valid only after
1556 processor_specific_flags() const
1557 { return this->processor_specific_flags_
; }
1559 // Attribute section data This is the contents of the .ARM.attribute section
1561 const Attributes_section_data
*
1562 attributes_section_data() const
1563 { return this->attributes_section_data_
; }
1565 // Mapping symbol location.
1566 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1568 // Functor for STL container.
1569 struct Mapping_symbol_position_less
1572 operator()(const Mapping_symbol_position
& p1
,
1573 const Mapping_symbol_position
& p2
) const
1575 return (p1
.first
< p2
.first
1576 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1580 // We only care about the first character of a mapping symbol, so
1581 // we only store that instead of the whole symbol name.
1582 typedef std::map
<Mapping_symbol_position
, char,
1583 Mapping_symbol_position_less
> Mapping_symbols_info
;
1585 // Whether a section contains any Cortex-A8 workaround.
1587 section_has_cortex_a8_workaround(unsigned int shndx
) const
1589 return (this->section_has_cortex_a8_workaround_
!= NULL
1590 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1593 // Mark a section that has Cortex-A8 workaround.
1595 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1597 if (this->section_has_cortex_a8_workaround_
== NULL
)
1598 this->section_has_cortex_a8_workaround_
=
1599 new std::vector
<bool>(this->shnum(), false);
1600 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1603 // Return the EXIDX section of an text section with index SHNDX or NULL
1604 // if the text section has no associated EXIDX section.
1605 const Arm_exidx_input_section
*
1606 exidx_input_section_by_link(unsigned int shndx
) const
1608 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1609 return ((p
!= this->exidx_section_map_
.end()
1610 && p
->second
->link() == shndx
)
1615 // Return the EXIDX section with index SHNDX or NULL if there is none.
1616 const Arm_exidx_input_section
*
1617 exidx_input_section_by_shndx(unsigned shndx
) const
1619 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1620 return ((p
!= this->exidx_section_map_
.end()
1621 && p
->second
->shndx() == shndx
)
1626 // Whether output local symbol count needs updating.
1628 output_local_symbol_count_needs_update() const
1629 { return this->output_local_symbol_count_needs_update_
; }
1631 // Set output_local_symbol_count_needs_update flag to be true.
1633 set_output_local_symbol_count_needs_update()
1634 { this->output_local_symbol_count_needs_update_
= true; }
1636 // Update output local symbol count at the end of relaxation.
1638 update_output_local_symbol_count();
1640 // Whether we want to merge processor-specific flags and attributes.
1642 merge_flags_and_attributes() const
1643 { return this->merge_flags_and_attributes_
; }
1645 // Export list of EXIDX section indices.
1647 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1650 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1651 p
!= this->exidx_section_map_
.end();
1654 if (p
->second
->shndx() == p
->first
)
1655 list
->push_back(p
->first
);
1657 // Sort list to make result independent of implementation of map.
1658 std::sort(list
->begin(), list
->end());
1662 // Post constructor setup.
1666 // Call parent's setup method.
1667 Sized_relobj_file
<32, big_endian
>::do_setup();
1669 // Initialize look-up tables.
1670 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1671 this->stub_tables_
.swap(empty_stub_table_list
);
1674 // Count the local symbols.
1676 do_count_local_symbols(Stringpool_template
<char>*,
1677 Stringpool_template
<char>*);
1680 do_relocate_sections(
1681 const Symbol_table
* symtab
, const Layout
* layout
,
1682 const unsigned char* pshdrs
, Output_file
* of
,
1683 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1685 // Read the symbol information.
1687 do_read_symbols(Read_symbols_data
* sd
);
1689 // Process relocs for garbage collection.
1691 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1695 // Whether a section needs to be scanned for relocation stubs.
1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1698 const Relobj::Output_sections
&,
1699 const Symbol_table
*, const unsigned char*);
1701 // Whether a section is a scannable text section.
1703 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1704 const Output_section
*, const Symbol_table
*);
1706 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1709 unsigned int, Output_section
*,
1710 const Symbol_table
*);
1712 // Scan a section for the Cortex-A8 erratum.
1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1715 unsigned int, Output_section
*,
1716 Target_arm
<big_endian
>*);
1718 // Find the linked text section of an EXIDX section by looking at the
1719 // first relocation of the EXIDX section. PSHDR points to the section
1720 // headers of a relocation section and PSYMS points to the local symbols.
1721 // PSHNDX points to a location storing the text section index if found.
1722 // Return whether we can find the linked section.
1724 find_linked_text_section(const unsigned char* pshdr
,
1725 const unsigned char* psyms
, unsigned int* pshndx
);
1728 // Make a new Arm_exidx_input_section object for EXIDX section with
1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1730 // index of the linked text section.
1732 make_exidx_input_section(unsigned int shndx
,
1733 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1734 unsigned int text_shndx
,
1735 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1737 // Return the output address of either a plain input section or a
1738 // relaxed input section. SHNDX is the section index.
1740 simple_input_section_output_address(unsigned int, Output_section
*);
1742 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1743 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1746 // List of stub tables.
1747 Stub_table_list stub_tables_
;
1748 // Bit vector to tell if a local symbol is a thumb function or not.
1749 // This is only valid after do_count_local_symbol is called.
1750 std::vector
<bool> local_symbol_is_thumb_function_
;
1751 // processor-specific flags in ELF file header.
1752 elfcpp::Elf_Word processor_specific_flags_
;
1753 // Object attributes if there is an .ARM.attributes section or NULL.
1754 Attributes_section_data
* attributes_section_data_
;
1755 // Mapping symbols information.
1756 Mapping_symbols_info mapping_symbols_info_
;
1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1758 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1759 // Map a text section to its associated .ARM.exidx section, if there is one.
1760 Exidx_section_map exidx_section_map_
;
1761 // Whether output local symbol count needs updating.
1762 bool output_local_symbol_count_needs_update_
;
1763 // Whether we merge processor flags and attributes of this object to
1765 bool merge_flags_and_attributes_
;
1768 // Arm_dynobj class.
1770 template<bool big_endian
>
1771 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1774 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1775 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1776 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1777 processor_specific_flags_(0), attributes_section_data_(NULL
)
1781 { delete this->attributes_section_data_
; }
1783 // Downcast a base pointer to an Arm_relobj pointer. This is
1784 // not type-safe but we only use Arm_relobj not the base class.
1785 static Arm_dynobj
<big_endian
>*
1786 as_arm_dynobj(Dynobj
* dynobj
)
1787 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1789 // Processor-specific flags in ELF file header. This is valid only after
1792 processor_specific_flags() const
1793 { return this->processor_specific_flags_
; }
1795 // Attributes section data.
1796 const Attributes_section_data
*
1797 attributes_section_data() const
1798 { return this->attributes_section_data_
; }
1801 // Read the symbol information.
1803 do_read_symbols(Read_symbols_data
* sd
);
1806 // processor-specific flags in ELF file header.
1807 elfcpp::Elf_Word processor_specific_flags_
;
1808 // Object attributes if there is an .ARM.attributes section or NULL.
1809 Attributes_section_data
* attributes_section_data_
;
1812 // Functor to read reloc addends during stub generation.
1814 template<int sh_type
, bool big_endian
>
1815 struct Stub_addend_reader
1817 // Return the addend for a relocation of a particular type. Depending
1818 // on whether this is a REL or RELA relocation, read the addend from a
1819 // view or from a Reloc object.
1820 elfcpp::Elf_types
<32>::Elf_Swxword
1822 unsigned int /* r_type */,
1823 const unsigned char* /* view */,
1824 const typename Reloc_types
<sh_type
,
1825 32, big_endian
>::Reloc
& /* reloc */) const;
1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1830 template<bool big_endian
>
1831 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1833 elfcpp::Elf_types
<32>::Elf_Swxword
1836 const unsigned char*,
1837 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1840 // Specialized Stub_addend_reader for RELA type relocation sections.
1841 // We currently do not handle RELA type relocation sections but it is trivial
1842 // to implement the addend reader. This is provided for completeness and to
1843 // make it easier to add support for RELA relocation sections in the future.
1845 template<bool big_endian
>
1846 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1848 elfcpp::Elf_types
<32>::Elf_Swxword
1851 const unsigned char*,
1852 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1853 big_endian
>::Reloc
& reloc
) const
1854 { return reloc
.get_r_addend(); }
1857 // Cortex_a8_reloc class. We keep record of relocation that may need
1858 // the Cortex-A8 erratum workaround.
1860 class Cortex_a8_reloc
1863 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1864 Arm_address destination
)
1865 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1871 // Accessors: This is a read-only class.
1873 // Return the relocation stub associated with this relocation if there is
1877 { return this->reloc_stub_
; }
1879 // Return the relocation type.
1882 { return this->r_type_
; }
1884 // Return the destination address of the relocation. LSB stores the THUMB
1888 { return this->destination_
; }
1891 // Associated relocation stub if there is one, or NULL.
1892 const Reloc_stub
* reloc_stub_
;
1894 unsigned int r_type_
;
1895 // Destination address of this relocation. LSB is used to distinguish
1897 Arm_address destination_
;
1900 // Arm_output_data_got class. We derive this from Output_data_got to add
1901 // extra methods to handle TLS relocations in a static link.
1903 template<bool big_endian
>
1904 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1907 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1908 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1913 // applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1916 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1920 // relocation that needs to be applied in a static link.
1922 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1923 Sized_relobj_file
<32, big_endian
>* relobj
,
1926 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1931 // The first one is initialized to be 1, which is the module index for
1932 // the main executable and the second one 0. A reloc of the type
1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1934 // be applied by gold. GSYM is a global symbol.
1936 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1938 // Same as the above but for a local symbol in OBJECT with INDEX.
1940 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1941 Sized_relobj_file
<32, big_endian
>* object
,
1942 unsigned int index
);
1945 // Write out the GOT table.
1947 do_write(Output_file
*);
1950 // This class represent dynamic relocations that need to be applied by
1951 // gold because we are using TLS relocations in a static link.
1955 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1956 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1957 { this->u_
.global
.symbol
= gsym
; }
1959 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1960 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1961 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1963 this->u_
.local
.relobj
= relobj
;
1964 this->u_
.local
.index
= index
;
1967 // Return the GOT offset.
1970 { return this->got_offset_
; }
1975 { return this->r_type_
; }
1977 // Whether the symbol is global or not.
1979 symbol_is_global() const
1980 { return this->symbol_is_global_
; }
1982 // For a relocation against a global symbol, the global symbol.
1986 gold_assert(this->symbol_is_global_
);
1987 return this->u_
.global
.symbol
;
1990 // For a relocation against a local symbol, the defining object.
1991 Sized_relobj_file
<32, big_endian
>*
1994 gold_assert(!this->symbol_is_global_
);
1995 return this->u_
.local
.relobj
;
1998 // For a relocation against a local symbol, the local symbol index.
2002 gold_assert(!this->symbol_is_global_
);
2003 return this->u_
.local
.index
;
2007 // GOT offset of the entry to which this relocation is applied.
2008 unsigned int got_offset_
;
2009 // Type of relocation.
2010 unsigned int r_type_
;
2011 // Whether this relocation is against a global symbol.
2012 bool symbol_is_global_
;
2013 // A global or local symbol.
2018 // For a global symbol, the symbol itself.
2023 // For a local symbol, the object defining object.
2024 Sized_relobj_file
<32, big_endian
>* relobj
;
2025 // For a local symbol, the symbol index.
2031 // Symbol table of the output object.
2032 Symbol_table
* symbol_table_
;
2033 // Layout of the output object.
2035 // Static relocs to be applied to the GOT.
2036 std::vector
<Static_reloc
> static_relocs_
;
2039 // The ARM target has many relocation types with odd-sizes or noncontiguous
2040 // bits. The default handling of relocatable relocation cannot process these
2041 // relocations. So we have to extend the default code.
2043 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2044 class Arm_scan_relocatable_relocs
:
2045 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2048 // Return the strategy to use for a local symbol which is a section
2049 // symbol, given the relocation type.
2050 inline Relocatable_relocs::Reloc_strategy
2051 local_section_strategy(unsigned int r_type
, Relobj
*)
2053 if (sh_type
== elfcpp::SHT_RELA
)
2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2057 if (r_type
== elfcpp::R_ARM_TARGET1
2058 || r_type
== elfcpp::R_ARM_TARGET2
)
2060 const Target_arm
<big_endian
>* arm_target
=
2061 Target_arm
<big_endian
>::default_target();
2062 r_type
= arm_target
->get_real_reloc_type(r_type
);
2067 // Relocations that write nothing. These exclude R_ARM_TARGET1
2068 // and R_ARM_TARGET2.
2069 case elfcpp::R_ARM_NONE
:
2070 case elfcpp::R_ARM_V4BX
:
2071 case elfcpp::R_ARM_TLS_GOTDESC
:
2072 case elfcpp::R_ARM_TLS_CALL
:
2073 case elfcpp::R_ARM_TLS_DESCSEQ
:
2074 case elfcpp::R_ARM_THM_TLS_CALL
:
2075 case elfcpp::R_ARM_GOTRELAX
:
2076 case elfcpp::R_ARM_GNU_VTENTRY
:
2077 case elfcpp::R_ARM_GNU_VTINHERIT
:
2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2081 // These should have been converted to something else above.
2082 case elfcpp::R_ARM_TARGET1
:
2083 case elfcpp::R_ARM_TARGET2
:
2085 // Relocations that write full 32 bits and
2086 // have alignment of 1.
2087 case elfcpp::R_ARM_ABS32
:
2088 case elfcpp::R_ARM_REL32
:
2089 case elfcpp::R_ARM_SBREL32
:
2090 case elfcpp::R_ARM_GOTOFF32
:
2091 case elfcpp::R_ARM_BASE_PREL
:
2092 case elfcpp::R_ARM_GOT_BREL
:
2093 case elfcpp::R_ARM_BASE_ABS
:
2094 case elfcpp::R_ARM_ABS32_NOI
:
2095 case elfcpp::R_ARM_REL32_NOI
:
2096 case elfcpp::R_ARM_PLT32_ABS
:
2097 case elfcpp::R_ARM_GOT_ABS
:
2098 case elfcpp::R_ARM_GOT_PREL
:
2099 case elfcpp::R_ARM_TLS_GD32
:
2100 case elfcpp::R_ARM_TLS_LDM32
:
2101 case elfcpp::R_ARM_TLS_LDO32
:
2102 case elfcpp::R_ARM_TLS_IE32
:
2103 case elfcpp::R_ARM_TLS_LE32
:
2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2106 // For all other static relocations, return RELOC_SPECIAL.
2107 return Relocatable_relocs::RELOC_SPECIAL
;
2113 template<bool big_endian
>
2114 class Target_arm
: public Sized_target
<32, big_endian
>
2117 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2120 // When were are relocating a stub, we pass this as the relocation number.
2121 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2123 Target_arm(const Target::Target_info
* info
= &arm_info
)
2124 : Sized_target
<32, big_endian
>(info
),
2125 got_(NULL
), plt_(NULL
), got_plt_(NULL
), got_irelative_(NULL
),
2126 rel_dyn_(NULL
), rel_irelative_(NULL
), copy_relocs_(elfcpp::R_ARM_COPY
),
2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2129 should_force_pic_veneer_(false),
2130 arm_input_section_map_(), attributes_section_data_(NULL
),
2131 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2134 // Whether we force PCI branch veneers.
2136 should_force_pic_veneer() const
2137 { return this->should_force_pic_veneer_
; }
2139 // Set PIC veneer flag.
2141 set_should_force_pic_veneer(bool value
)
2142 { this->should_force_pic_veneer_
= value
; }
2144 // Whether we use THUMB-2 instructions.
2146 using_thumb2() const
2148 Object_attribute
* attr
=
2149 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2150 int arch
= attr
->int_value();
2151 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2154 // Whether we use THUMB/THUMB-2 instructions only.
2156 using_thumb_only() const
2158 Object_attribute
* attr
=
2159 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2161 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2162 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2164 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2165 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2167 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2168 return attr
->int_value() == 'M';
2171 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2173 may_use_arm_nop() const
2175 Object_attribute
* attr
=
2176 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2177 int arch
= attr
->int_value();
2178 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2179 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2180 || arch
== elfcpp::TAG_CPU_ARCH_V7
2181 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2184 // Whether we have THUMB-2 NOP.W instruction.
2186 may_use_thumb2_nop() const
2188 Object_attribute
* attr
=
2189 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2190 int arch
= attr
->int_value();
2191 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2192 || arch
== elfcpp::TAG_CPU_ARCH_V7
2193 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2196 // Whether we have v4T interworking instructions available.
2198 may_use_v4t_interworking() const
2200 Object_attribute
* attr
=
2201 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2202 int arch
= attr
->int_value();
2203 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2204 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2207 // Whether we have v5T interworking instructions available.
2209 may_use_v5t_interworking() const
2211 Object_attribute
* attr
=
2212 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2213 int arch
= attr
->int_value();
2214 if (parameters
->options().fix_arm1176())
2215 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2216 || arch
== elfcpp::TAG_CPU_ARCH_V7
2217 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2218 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2219 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2221 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2222 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2223 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2226 // Process the relocations to determine unreferenced sections for
2227 // garbage collection.
2229 gc_process_relocs(Symbol_table
* symtab
,
2231 Sized_relobj_file
<32, big_endian
>* object
,
2232 unsigned int data_shndx
,
2233 unsigned int sh_type
,
2234 const unsigned char* prelocs
,
2236 Output_section
* output_section
,
2237 bool needs_special_offset_handling
,
2238 size_t local_symbol_count
,
2239 const unsigned char* plocal_symbols
);
2241 // Scan the relocations to look for symbol adjustments.
2243 scan_relocs(Symbol_table
* symtab
,
2245 Sized_relobj_file
<32, big_endian
>* object
,
2246 unsigned int data_shndx
,
2247 unsigned int sh_type
,
2248 const unsigned char* prelocs
,
2250 Output_section
* output_section
,
2251 bool needs_special_offset_handling
,
2252 size_t local_symbol_count
,
2253 const unsigned char* plocal_symbols
);
2255 // Finalize the sections.
2257 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2259 // Return the value to use for a dynamic symbol which requires special
2262 do_dynsym_value(const Symbol
*) const;
2264 // Return the plt address for globals. Since we have irelative plt entries,
2265 // address calculation is not as straightforward as plt_address + plt_offset.
2267 do_plt_address_for_global(const Symbol
* gsym
) const
2268 { return this->plt_section()->address_for_global(gsym
); }
2270 // Return the plt address for locals. Since we have irelative plt entries,
2271 // address calculation is not as straightforward as plt_address + plt_offset.
2273 do_plt_address_for_local(const Relobj
* relobj
, unsigned int symndx
) const
2274 { return this->plt_section()->address_for_local(relobj
, symndx
); }
2276 // Relocate a section.
2278 relocate_section(const Relocate_info
<32, big_endian
>*,
2279 unsigned int sh_type
,
2280 const unsigned char* prelocs
,
2282 Output_section
* output_section
,
2283 bool needs_special_offset_handling
,
2284 unsigned char* view
,
2285 Arm_address view_address
,
2286 section_size_type view_size
,
2287 const Reloc_symbol_changes
*);
2289 // Scan the relocs during a relocatable link.
2291 scan_relocatable_relocs(Symbol_table
* symtab
,
2293 Sized_relobj_file
<32, big_endian
>* object
,
2294 unsigned int data_shndx
,
2295 unsigned int sh_type
,
2296 const unsigned char* prelocs
,
2298 Output_section
* output_section
,
2299 bool needs_special_offset_handling
,
2300 size_t local_symbol_count
,
2301 const unsigned char* plocal_symbols
,
2302 Relocatable_relocs
*);
2304 // Emit relocations for a section.
2306 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2307 unsigned int sh_type
,
2308 const unsigned char* prelocs
,
2310 Output_section
* output_section
,
2311 typename
elfcpp::Elf_types
<32>::Elf_Off
2312 offset_in_output_section
,
2313 unsigned char* view
,
2314 Arm_address view_address
,
2315 section_size_type view_size
,
2316 unsigned char* reloc_view
,
2317 section_size_type reloc_view_size
);
2319 // Perform target-specific processing in a relocatable link. This is
2320 // only used if we use the relocation strategy RELOC_SPECIAL.
2322 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2323 unsigned int sh_type
,
2324 const unsigned char* preloc_in
,
2326 Output_section
* output_section
,
2327 typename
elfcpp::Elf_types
<32>::Elf_Off
2328 offset_in_output_section
,
2329 unsigned char* view
,
2330 typename
elfcpp::Elf_types
<32>::Elf_Addr
2332 section_size_type view_size
,
2333 unsigned char* preloc_out
);
2335 // Return whether SYM is defined by the ABI.
2337 do_is_defined_by_abi(const Symbol
* sym
) const
2338 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2340 // Return whether there is a GOT section.
2342 has_got_section() const
2343 { return this->got_
!= NULL
; }
2345 // Return the size of the GOT section.
2349 gold_assert(this->got_
!= NULL
);
2350 return this->got_
->data_size();
2353 // Return the number of entries in the GOT.
2355 got_entry_count() const
2357 if (!this->has_got_section())
2359 return this->got_size() / 4;
2362 // Return the number of entries in the PLT.
2364 plt_entry_count() const;
2366 // Return the offset of the first non-reserved PLT entry.
2368 first_plt_entry_offset() const;
2370 // Return the size of each PLT entry.
2372 plt_entry_size() const;
2374 // Get the section to use for IRELATIVE relocations, create it if necessary.
2376 rel_irelative_section(Layout
*);
2378 // Map platform-specific reloc types
2380 get_real_reloc_type(unsigned int r_type
);
2383 // Methods to support stub-generations.
2386 // Return the stub factory
2388 stub_factory() const
2389 { return this->stub_factory_
; }
2391 // Make a new Arm_input_section object.
2392 Arm_input_section
<big_endian
>*
2393 new_arm_input_section(Relobj
*, unsigned int);
2395 // Find the Arm_input_section object corresponding to the SHNDX-th input
2396 // section of RELOBJ.
2397 Arm_input_section
<big_endian
>*
2398 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2400 // Make a new Stub_table
2401 Stub_table
<big_endian
>*
2402 new_stub_table(Arm_input_section
<big_endian
>*);
2404 // Scan a section for stub generation.
2406 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2407 const unsigned char*, size_t, Output_section
*,
2408 bool, const unsigned char*, Arm_address
,
2413 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2414 Output_section
*, unsigned char*, Arm_address
,
2417 // Get the default ARM target.
2418 static Target_arm
<big_endian
>*
2421 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2422 && parameters
->target().is_big_endian() == big_endian
);
2423 return static_cast<Target_arm
<big_endian
>*>(
2424 parameters
->sized_target
<32, big_endian
>());
2427 // Whether NAME belongs to a mapping symbol.
2429 is_mapping_symbol_name(const char* name
)
2433 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2434 && (name
[2] == '\0' || name
[2] == '.'));
2437 // Whether we work around the Cortex-A8 erratum.
2439 fix_cortex_a8() const
2440 { return this->fix_cortex_a8_
; }
2442 // Whether we merge exidx entries in debuginfo.
2444 merge_exidx_entries() const
2445 { return parameters
->options().merge_exidx_entries(); }
2447 // Whether we fix R_ARM_V4BX relocation.
2449 // 1 - replace with MOV instruction (armv4 target)
2450 // 2 - make interworking veneer (>= armv4t targets only)
2451 General_options::Fix_v4bx
2453 { return parameters
->options().fix_v4bx(); }
2455 // Scan a span of THUMB code section for Cortex-A8 erratum.
2457 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2458 section_size_type
, section_size_type
,
2459 const unsigned char*, Arm_address
);
2461 // Apply Cortex-A8 workaround to a branch.
2463 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2464 unsigned char*, Arm_address
);
2467 // Make the PLT-generator object.
2468 Output_data_plt_arm
<big_endian
>*
2469 make_data_plt(Layout
* layout
,
2470 Arm_output_data_got
<big_endian
>* got
,
2471 Output_data_space
* got_plt
,
2472 Output_data_space
* got_irelative
)
2473 { return this->do_make_data_plt(layout
, got
, got_plt
, got_irelative
); }
2475 // Make an ELF object.
2477 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2478 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2481 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2482 const elfcpp::Ehdr
<32, !big_endian
>&)
2483 { gold_unreachable(); }
2486 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2487 const elfcpp::Ehdr
<64, false>&)
2488 { gold_unreachable(); }
2491 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2492 const elfcpp::Ehdr
<64, true>&)
2493 { gold_unreachable(); }
2495 // Make an output section.
2497 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2498 elfcpp::Elf_Xword flags
)
2499 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2502 do_adjust_elf_header(unsigned char* view
, int len
);
2504 // We only need to generate stubs, and hence perform relaxation if we are
2505 // not doing relocatable linking.
2507 do_may_relax() const
2508 { return !parameters
->options().relocatable(); }
2511 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2513 // Determine whether an object attribute tag takes an integer, a
2516 do_attribute_arg_type(int tag
) const;
2518 // Reorder tags during output.
2520 do_attributes_order(int num
) const;
2522 // This is called when the target is selected as the default.
2524 do_select_as_default_target()
2526 // No locking is required since there should only be one default target.
2527 // We cannot have both the big-endian and little-endian ARM targets
2529 gold_assert(arm_reloc_property_table
== NULL
);
2530 arm_reloc_property_table
= new Arm_reloc_property_table();
2533 // Virtual function which is set to return true by a target if
2534 // it can use relocation types to determine if a function's
2535 // pointer is taken.
2537 do_can_check_for_function_pointers() const
2540 // Whether a section called SECTION_NAME may have function pointers to
2541 // sections not eligible for safe ICF folding.
2543 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2545 return (!is_prefix_of(".ARM.exidx", section_name
)
2546 && !is_prefix_of(".ARM.extab", section_name
)
2547 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2551 do_define_standard_symbols(Symbol_table
*, Layout
*);
2553 virtual Output_data_plt_arm
<big_endian
>*
2554 do_make_data_plt(Layout
* layout
,
2555 Arm_output_data_got
<big_endian
>* got
,
2556 Output_data_space
* got_plt
,
2557 Output_data_space
* got_irelative
)
2559 gold_assert(got_plt
!= NULL
&& got_irelative
!= NULL
);
2560 if (parameters
->options().long_plt())
2561 return new Output_data_plt_arm_long
<big_endian
>(
2562 layout
, got
, got_plt
, got_irelative
);
2564 return new Output_data_plt_arm_short
<big_endian
>(
2565 layout
, got
, got_plt
, got_irelative
);
2569 // The class which scans relocations.
2574 : issued_non_pic_error_(false)
2578 get_reference_flags(unsigned int r_type
);
2581 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2582 Sized_relobj_file
<32, big_endian
>* object
,
2583 unsigned int data_shndx
,
2584 Output_section
* output_section
,
2585 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2586 const elfcpp::Sym
<32, big_endian
>& lsym
,
2590 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2591 Sized_relobj_file
<32, big_endian
>* object
,
2592 unsigned int data_shndx
,
2593 Output_section
* output_section
,
2594 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2598 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2599 Sized_relobj_file
<32, big_endian
>* ,
2602 const elfcpp::Rel
<32, big_endian
>& ,
2604 const elfcpp::Sym
<32, big_endian
>&);
2607 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2608 Sized_relobj_file
<32, big_endian
>* ,
2611 const elfcpp::Rel
<32, big_endian
>& ,
2612 unsigned int , Symbol
*);
2616 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2617 unsigned int r_type
);
2620 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2621 unsigned int r_type
, Symbol
*);
2624 check_non_pic(Relobj
*, unsigned int r_type
);
2626 // Almost identical to Symbol::needs_plt_entry except that it also
2627 // handles STT_ARM_TFUNC.
2629 symbol_needs_plt_entry(const Symbol
* sym
)
2631 // An undefined symbol from an executable does not need a PLT entry.
2632 if (sym
->is_undefined() && !parameters
->options().shared())
2635 if (sym
->type() == elfcpp::STT_GNU_IFUNC
)
2638 return (!parameters
->doing_static_link()
2639 && (sym
->type() == elfcpp::STT_FUNC
2640 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2641 && (sym
->is_from_dynobj()
2642 || sym
->is_undefined()
2643 || sym
->is_preemptible()));
2647 possible_function_pointer_reloc(unsigned int r_type
);
2649 // Whether a plt entry is needed for ifunc.
2651 reloc_needs_plt_for_ifunc(Sized_relobj_file
<32, big_endian
>*,
2652 unsigned int r_type
);
2654 // Whether we have issued an error about a non-PIC compilation.
2655 bool issued_non_pic_error_
;
2658 // The class which implements relocation.
2668 // Return whether the static relocation needs to be applied.
2670 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2671 unsigned int r_type
,
2673 Output_section
* output_section
);
2675 // Do a relocation. Return false if the caller should not issue
2676 // any warnings about this relocation.
2678 relocate(const Relocate_info
<32, big_endian
>*, unsigned int,
2679 Target_arm
*, Output_section
*, size_t, const unsigned char*,
2680 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2681 unsigned char*, Arm_address
, section_size_type
);
2683 // Return whether we want to pass flag NON_PIC_REF for this
2684 // reloc. This means the relocation type accesses a symbol not via
2687 reloc_is_non_pic(unsigned int r_type
)
2691 // These relocation types reference GOT or PLT entries explicitly.
2692 case elfcpp::R_ARM_GOT_BREL
:
2693 case elfcpp::R_ARM_GOT_ABS
:
2694 case elfcpp::R_ARM_GOT_PREL
:
2695 case elfcpp::R_ARM_GOT_BREL12
:
2696 case elfcpp::R_ARM_PLT32_ABS
:
2697 case elfcpp::R_ARM_TLS_GD32
:
2698 case elfcpp::R_ARM_TLS_LDM32
:
2699 case elfcpp::R_ARM_TLS_IE32
:
2700 case elfcpp::R_ARM_TLS_IE12GP
:
2702 // These relocate types may use PLT entries.
2703 case elfcpp::R_ARM_CALL
:
2704 case elfcpp::R_ARM_THM_CALL
:
2705 case elfcpp::R_ARM_JUMP24
:
2706 case elfcpp::R_ARM_THM_JUMP24
:
2707 case elfcpp::R_ARM_THM_JUMP19
:
2708 case elfcpp::R_ARM_PLT32
:
2709 case elfcpp::R_ARM_THM_XPC22
:
2710 case elfcpp::R_ARM_PREL31
:
2711 case elfcpp::R_ARM_SBREL31
:
2720 // Do a TLS relocation.
2721 inline typename Arm_relocate_functions
<big_endian
>::Status
2722 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2723 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2724 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2725 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2730 // A class which returns the size required for a relocation type,
2731 // used while scanning relocs during a relocatable link.
2732 class Relocatable_size_for_reloc
2736 get_size_for_reloc(unsigned int, Relobj
*);
2739 // Adjust TLS relocation type based on the options and whether this
2740 // is a local symbol.
2741 static tls::Tls_optimization
2742 optimize_tls_reloc(bool is_final
, int r_type
);
2744 // Get the GOT section, creating it if necessary.
2745 Arm_output_data_got
<big_endian
>*
2746 got_section(Symbol_table
*, Layout
*);
2748 // Get the GOT PLT section.
2750 got_plt_section() const
2752 gold_assert(this->got_plt_
!= NULL
);
2753 return this->got_plt_
;
2756 // Create the PLT section.
2758 make_plt_section(Symbol_table
* symtab
, Layout
* layout
);
2760 // Create a PLT entry for a global symbol.
2762 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2764 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2766 make_local_ifunc_plt_entry(Symbol_table
*, Layout
*,
2767 Sized_relobj_file
<32, big_endian
>* relobj
,
2768 unsigned int local_sym_index
);
2770 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2772 define_tls_base_symbol(Symbol_table
*, Layout
*);
2774 // Create a GOT entry for the TLS module index.
2776 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2777 Sized_relobj_file
<32, big_endian
>* object
);
2779 // Get the PLT section.
2780 const Output_data_plt_arm
<big_endian
>*
2783 gold_assert(this->plt_
!= NULL
);
2787 // Get the dynamic reloc section, creating it if necessary.
2789 rel_dyn_section(Layout
*);
2791 // Get the section to use for TLS_DESC relocations.
2793 rel_tls_desc_section(Layout
*) const;
2795 // Return true if the symbol may need a COPY relocation.
2796 // References from an executable object to non-function symbols
2797 // defined in a dynamic object may need a COPY relocation.
2799 may_need_copy_reloc(Symbol
* gsym
)
2801 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2802 && gsym
->may_need_copy_reloc());
2805 // Add a potential copy relocation.
2807 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2808 Sized_relobj_file
<32, big_endian
>* object
,
2809 unsigned int shndx
, Output_section
* output_section
,
2810 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2812 unsigned int r_type
= elfcpp::elf_r_type
<32>(reloc
.get_r_info());
2813 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2814 symtab
->get_sized_symbol
<32>(sym
),
2815 object
, shndx
, output_section
,
2816 r_type
, reloc
.get_r_offset(), 0,
2817 this->rel_dyn_section(layout
));
2820 // Whether two EABI versions are compatible.
2822 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2824 // Merge processor-specific flags from input object and those in the ELF
2825 // header of the output.
2827 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2829 // Get the secondary compatible architecture.
2831 get_secondary_compatible_arch(const Attributes_section_data
*);
2833 // Set the secondary compatible architecture.
2835 set_secondary_compatible_arch(Attributes_section_data
*, int);
2838 tag_cpu_arch_combine(const char*, int, int*, int, int);
2840 // Helper to print AEABI enum tag value.
2842 aeabi_enum_name(unsigned int);
2844 // Return string value for TAG_CPU_name.
2846 tag_cpu_name_value(unsigned int);
2848 // Query attributes object to see if integer divide instructions may be
2849 // present in an object.
2851 attributes_accept_div(int arch
, int profile
,
2852 const Object_attribute
* div_attr
);
2854 // Query attributes object to see if integer divide instructions are
2855 // forbidden to be in the object. This is not the inverse of
2856 // attributes_accept_div.
2858 attributes_forbid_div(const Object_attribute
* div_attr
);
2860 // Merge object attributes from input object and those in the output.
2862 merge_object_attributes(const char*, const Attributes_section_data
*);
2864 // Helper to get an AEABI object attribute
2866 get_aeabi_object_attribute(int tag
) const
2868 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2869 gold_assert(pasd
!= NULL
);
2870 Object_attribute
* attr
=
2871 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2872 gold_assert(attr
!= NULL
);
2877 // Methods to support stub-generations.
2880 // Group input sections for stub generation.
2882 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2884 // Scan a relocation for stub generation.
2886 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2887 const Sized_symbol
<32>*, unsigned int,
2888 const Symbol_value
<32>*,
2889 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2891 // Scan a relocation section for stub.
2892 template<int sh_type
>
2894 scan_reloc_section_for_stubs(
2895 const Relocate_info
<32, big_endian
>* relinfo
,
2896 const unsigned char* prelocs
,
2898 Output_section
* output_section
,
2899 bool needs_special_offset_handling
,
2900 const unsigned char* view
,
2901 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2904 // Fix .ARM.exidx section coverage.
2906 fix_exidx_coverage(Layout
*, const Input_objects
*,
2907 Arm_output_section
<big_endian
>*, Symbol_table
*,
2910 // Functors for STL set.
2911 struct output_section_address_less_than
2914 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2915 { return s1
->address() < s2
->address(); }
2918 // Information about this specific target which we pass to the
2919 // general Target structure.
2920 static const Target::Target_info arm_info
;
2922 // The types of GOT entries needed for this platform.
2923 // These values are exposed to the ABI in an incremental link.
2924 // Do not renumber existing values without changing the version
2925 // number of the .gnu_incremental_inputs section.
2928 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2929 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2930 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2931 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2932 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2935 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2937 // Map input section to Arm_input_section.
2938 typedef Unordered_map
<Section_id
,
2939 Arm_input_section
<big_endian
>*,
2941 Arm_input_section_map
;
2943 // Map output addresses to relocs for Cortex-A8 erratum.
2944 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2945 Cortex_a8_relocs_info
;
2948 Arm_output_data_got
<big_endian
>* got_
;
2950 Output_data_plt_arm
<big_endian
>* plt_
;
2951 // The GOT PLT section.
2952 Output_data_space
* got_plt_
;
2953 // The GOT section for IRELATIVE relocations.
2954 Output_data_space
* got_irelative_
;
2955 // The dynamic reloc section.
2956 Reloc_section
* rel_dyn_
;
2957 // The section to use for IRELATIVE relocs.
2958 Reloc_section
* rel_irelative_
;
2959 // Relocs saved to avoid a COPY reloc.
2960 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2961 // Offset of the GOT entry for the TLS module index.
2962 unsigned int got_mod_index_offset_
;
2963 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2964 bool tls_base_symbol_defined_
;
2965 // Vector of Stub_tables created.
2966 Stub_table_list stub_tables_
;
2968 const Stub_factory
&stub_factory_
;
2969 // Whether we force PIC branch veneers.
2970 bool should_force_pic_veneer_
;
2971 // Map for locating Arm_input_sections.
2972 Arm_input_section_map arm_input_section_map_
;
2973 // Attributes section data in output.
2974 Attributes_section_data
* attributes_section_data_
;
2975 // Whether we want to fix code for Cortex-A8 erratum.
2976 bool fix_cortex_a8_
;
2977 // Map addresses to relocs for Cortex-A8 erratum.
2978 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2981 template<bool big_endian
>
2982 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2985 big_endian
, // is_big_endian
2986 elfcpp::EM_ARM
, // machine_code
2987 false, // has_make_symbol
2988 false, // has_resolve
2989 false, // has_code_fill
2990 true, // is_default_stack_executable
2991 false, // can_icf_inline_merge_sections
2993 "/usr/lib/libc.so.1", // dynamic_linker
2994 0x8000, // default_text_segment_address
2995 0x1000, // abi_pagesize (overridable by -z max-page-size)
2996 0x1000, // common_pagesize (overridable by -z common-page-size)
2997 false, // isolate_execinstr
2999 elfcpp::SHN_UNDEF
, // small_common_shndx
3000 elfcpp::SHN_UNDEF
, // large_common_shndx
3001 0, // small_common_section_flags
3002 0, // large_common_section_flags
3003 ".ARM.attributes", // attributes_section
3004 "aeabi", // attributes_vendor
3005 "_start", // entry_symbol_name
3006 32, // hash_entry_size
3009 // Arm relocate functions class
3012 template<bool big_endian
>
3013 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
3018 STATUS_OKAY
, // No error during relocation.
3019 STATUS_OVERFLOW
, // Relocation overflow.
3020 STATUS_BAD_RELOC
// Relocation cannot be applied.
3024 typedef Relocate_functions
<32, big_endian
> Base
;
3025 typedef Arm_relocate_functions
<big_endian
> This
;
3027 // Encoding of imm16 argument for movt and movw ARM instructions
3030 // imm16 := imm4 | imm12
3032 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3033 // +-------+---------------+-------+-------+-----------------------+
3034 // | | |imm4 | |imm12 |
3035 // +-------+---------------+-------+-------+-----------------------+
3037 // Extract the relocation addend from VAL based on the ARM
3038 // instruction encoding described above.
3039 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3040 extract_arm_movw_movt_addend(
3041 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3043 // According to the Elf ABI for ARM Architecture the immediate
3044 // field is sign-extended to form the addend.
3045 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
3048 // Insert X into VAL based on the ARM instruction encoding described
3050 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3051 insert_val_arm_movw_movt(
3052 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3053 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3057 val
|= (x
& 0xf000) << 4;
3061 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3064 // imm16 := imm4 | i | imm3 | imm8
3066 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3067 // +---------+-+-----------+-------++-+-----+-------+---------------+
3068 // | |i| |imm4 || |imm3 | |imm8 |
3069 // +---------+-+-----------+-------++-+-----+-------+---------------+
3071 // Extract the relocation addend from VAL based on the Thumb2
3072 // instruction encoding described above.
3073 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3074 extract_thumb_movw_movt_addend(
3075 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3077 // According to the Elf ABI for ARM Architecture the immediate
3078 // field is sign-extended to form the addend.
3079 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3080 | ((val
>> 15) & 0x0800)
3081 | ((val
>> 4) & 0x0700)
3085 // Insert X into VAL based on the Thumb2 instruction encoding
3087 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3088 insert_val_thumb_movw_movt(
3089 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3090 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3093 val
|= (x
& 0xf000) << 4;
3094 val
|= (x
& 0x0800) << 15;
3095 val
|= (x
& 0x0700) << 4;
3096 val
|= (x
& 0x00ff);
3100 // Calculate the smallest constant Kn for the specified residual.
3101 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3103 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3109 // Determine the most significant bit in the residual and
3110 // align the resulting value to a 2-bit boundary.
3111 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3113 // The desired shift is now (msb - 6), or zero, whichever
3115 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3118 // Calculate the final residual for the specified group index.
3119 // If the passed group index is less than zero, the method will return
3120 // the value of the specified residual without any change.
3121 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3122 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3123 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3126 for (int n
= 0; n
<= group
; n
++)
3128 // Calculate which part of the value to mask.
3129 uint32_t shift
= calc_grp_kn(residual
);
3130 // Calculate the residual for the next time around.
3131 residual
&= ~(residual
& (0xff << shift
));
3137 // Calculate the value of Gn for the specified group index.
3138 // We return it in the form of an encoded constant-and-rotation.
3139 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3140 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3141 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3144 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3147 for (int n
= 0; n
<= group
; n
++)
3149 // Calculate which part of the value to mask.
3150 shift
= calc_grp_kn(residual
);
3151 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3152 gn
= residual
& (0xff << shift
);
3153 // Calculate the residual for the next time around.
3156 // Return Gn in the form of an encoded constant-and-rotation.
3157 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3161 // Handle ARM long branches.
3162 static typename
This::Status
3163 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3164 unsigned char*, const Sized_symbol
<32>*,
3165 const Arm_relobj
<big_endian
>*, unsigned int,
3166 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3168 // Handle THUMB long branches.
3169 static typename
This::Status
3170 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3171 unsigned char*, const Sized_symbol
<32>*,
3172 const Arm_relobj
<big_endian
>*, unsigned int,
3173 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3176 // Return the branch offset of a 32-bit THUMB branch.
3177 static inline int32_t
3178 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3180 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3181 // involving the J1 and J2 bits.
3182 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3183 uint32_t upper
= upper_insn
& 0x3ffU
;
3184 uint32_t lower
= lower_insn
& 0x7ffU
;
3185 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3186 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3187 uint32_t i1
= j1
^ s
? 0 : 1;
3188 uint32_t i2
= j2
^ s
? 0 : 1;
3190 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3191 | (upper
<< 12) | (lower
<< 1));
3194 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3195 // UPPER_INSN is the original upper instruction of the branch. Caller is
3196 // responsible for overflow checking and BLX offset adjustment.
3197 static inline uint16_t
3198 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3200 uint32_t s
= offset
< 0 ? 1 : 0;
3201 uint32_t bits
= static_cast<uint32_t>(offset
);
3202 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3205 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3206 // LOWER_INSN is the original lower instruction of the branch. Caller is
3207 // responsible for overflow checking and BLX offset adjustment.
3208 static inline uint16_t
3209 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3211 uint32_t s
= offset
< 0 ? 1 : 0;
3212 uint32_t bits
= static_cast<uint32_t>(offset
);
3213 return ((lower_insn
& ~0x2fffU
)
3214 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3215 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3216 | ((bits
>> 1) & 0x7ffU
));
3219 // Return the branch offset of a 32-bit THUMB conditional branch.
3220 static inline int32_t
3221 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3223 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3224 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3225 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3226 uint32_t lower
= (lower_insn
& 0x07ffU
);
3227 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3229 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3232 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3233 // instruction. UPPER_INSN is the original upper instruction of the branch.
3234 // Caller is responsible for overflow checking.
3235 static inline uint16_t
3236 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3238 uint32_t s
= offset
< 0 ? 1 : 0;
3239 uint32_t bits
= static_cast<uint32_t>(offset
);
3240 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3243 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3244 // instruction. LOWER_INSN is the original lower instruction of the branch.
3245 // The caller is responsible for overflow checking.
3246 static inline uint16_t
3247 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3249 uint32_t bits
= static_cast<uint32_t>(offset
);
3250 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3251 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3252 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3254 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3257 // R_ARM_ABS8: S + A
3258 static inline typename
This::Status
3259 abs8(unsigned char* view
,
3260 const Sized_relobj_file
<32, big_endian
>* object
,
3261 const Symbol_value
<32>* psymval
)
3263 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3264 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3265 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3266 int32_t addend
= Bits
<8>::sign_extend32(val
);
3267 Arm_address x
= psymval
->value(object
, addend
);
3268 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3269 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3271 // R_ARM_ABS8 permits signed or unsigned results.
3272 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3273 ? This::STATUS_OVERFLOW
3274 : This::STATUS_OKAY
);
3277 // R_ARM_THM_ABS5: S + A
3278 static inline typename
This::Status
3279 thm_abs5(unsigned char* view
,
3280 const Sized_relobj_file
<32, big_endian
>* object
,
3281 const Symbol_value
<32>* psymval
)
3283 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3284 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3285 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3286 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3287 Reltype addend
= (val
& 0x7e0U
) >> 6;
3288 Reltype x
= psymval
->value(object
, addend
);
3289 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3290 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3291 return (Bits
<5>::has_overflow32(x
)
3292 ? This::STATUS_OVERFLOW
3293 : This::STATUS_OKAY
);
3296 // R_ARM_ABS12: S + A
3297 static inline typename
This::Status
3298 abs12(unsigned char* view
,
3299 const Sized_relobj_file
<32, big_endian
>* object
,
3300 const Symbol_value
<32>* psymval
)
3302 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3303 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3304 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3305 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3306 Reltype addend
= val
& 0x0fffU
;
3307 Reltype x
= psymval
->value(object
, addend
);
3308 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3309 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3310 return (Bits
<12>::has_overflow32(x
)
3311 ? This::STATUS_OVERFLOW
3312 : This::STATUS_OKAY
);
3315 // R_ARM_ABS16: S + A
3316 static inline typename
This::Status
3317 abs16(unsigned char* view
,
3318 const Sized_relobj_file
<32, big_endian
>* object
,
3319 const Symbol_value
<32>* psymval
)
3321 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3322 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3323 int32_t addend
= Bits
<16>::sign_extend32(val
);
3324 Arm_address x
= psymval
->value(object
, addend
);
3325 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3326 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3328 // R_ARM_ABS16 permits signed or unsigned results.
3329 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3330 ? This::STATUS_OVERFLOW
3331 : This::STATUS_OKAY
);
3334 // R_ARM_ABS32: (S + A) | T
3335 static inline typename
This::Status
3336 abs32(unsigned char* view
,
3337 const Sized_relobj_file
<32, big_endian
>* object
,
3338 const Symbol_value
<32>* psymval
,
3339 Arm_address thumb_bit
)
3341 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3342 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3343 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3344 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3345 return This::STATUS_OKAY
;
3348 // R_ARM_REL32: (S + A) | T - P
3349 static inline typename
This::Status
3350 rel32(unsigned char* view
,
3351 const Sized_relobj_file
<32, big_endian
>* object
,
3352 const Symbol_value
<32>* psymval
,
3353 Arm_address address
,
3354 Arm_address thumb_bit
)
3356 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3357 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3358 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3359 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3360 return This::STATUS_OKAY
;
3363 // R_ARM_THM_JUMP24: (S + A) | T - P
3364 static typename
This::Status
3365 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3366 const Symbol_value
<32>* psymval
, Arm_address address
,
3367 Arm_address thumb_bit
);
3369 // R_ARM_THM_JUMP6: S + A – P
3370 static inline typename
This::Status
3371 thm_jump6(unsigned char* view
,
3372 const Sized_relobj_file
<32, big_endian
>* object
,
3373 const Symbol_value
<32>* psymval
,
3374 Arm_address address
)
3376 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3377 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3378 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3379 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3380 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3381 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3382 Reltype x
= (psymval
->value(object
, addend
) - address
);
3383 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3384 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3385 // CZB does only forward jumps.
3386 return ((x
> 0x007e)
3387 ? This::STATUS_OVERFLOW
3388 : This::STATUS_OKAY
);
3391 // R_ARM_THM_JUMP8: S + A – P
3392 static inline typename
This::Status
3393 thm_jump8(unsigned char* view
,
3394 const Sized_relobj_file
<32, big_endian
>* object
,
3395 const Symbol_value
<32>* psymval
,
3396 Arm_address address
)
3398 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3399 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3400 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3401 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3402 int32_t x
= (psymval
->value(object
, addend
) - address
);
3403 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3404 | ((x
& 0x01fe) >> 1)));
3405 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3406 return (Bits
<9>::has_overflow32(x
)
3407 ? This::STATUS_OVERFLOW
3408 : This::STATUS_OKAY
);
3411 // R_ARM_THM_JUMP11: S + A – P
3412 static inline typename
This::Status
3413 thm_jump11(unsigned char* view
,
3414 const Sized_relobj_file
<32, big_endian
>* object
,
3415 const Symbol_value
<32>* psymval
,
3416 Arm_address address
)
3418 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3419 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3420 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3421 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3422 int32_t x
= (psymval
->value(object
, addend
) - address
);
3423 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3424 | ((x
& 0x0ffe) >> 1)));
3425 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3426 return (Bits
<12>::has_overflow32(x
)
3427 ? This::STATUS_OVERFLOW
3428 : This::STATUS_OKAY
);
3431 // R_ARM_BASE_PREL: B(S) + A - P
3432 static inline typename
This::Status
3433 base_prel(unsigned char* view
,
3435 Arm_address address
)
3437 Base::rel32(view
, origin
- address
);
3441 // R_ARM_BASE_ABS: B(S) + A
3442 static inline typename
This::Status
3443 base_abs(unsigned char* view
,
3446 Base::rel32(view
, origin
);
3450 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3451 static inline typename
This::Status
3452 got_brel(unsigned char* view
,
3453 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3455 Base::rel32(view
, got_offset
);
3456 return This::STATUS_OKAY
;
3459 // R_ARM_GOT_PREL: GOT(S) + A - P
3460 static inline typename
This::Status
3461 got_prel(unsigned char* view
,
3462 Arm_address got_entry
,
3463 Arm_address address
)
3465 Base::rel32(view
, got_entry
- address
);
3466 return This::STATUS_OKAY
;
3469 // R_ARM_PREL: (S + A) | T - P
3470 static inline typename
This::Status
3471 prel31(unsigned char* view
,
3472 const Sized_relobj_file
<32, big_endian
>* object
,
3473 const Symbol_value
<32>* psymval
,
3474 Arm_address address
,
3475 Arm_address thumb_bit
)
3477 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3478 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3479 Valtype addend
= Bits
<31>::sign_extend32(val
);
3480 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3481 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3482 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3483 return (Bits
<31>::has_overflow32(x
)
3484 ? This::STATUS_OVERFLOW
3485 : This::STATUS_OKAY
);
3488 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3489 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3490 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3491 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3492 static inline typename
This::Status
3493 movw(unsigned char* view
,
3494 const Sized_relobj_file
<32, big_endian
>* object
,
3495 const Symbol_value
<32>* psymval
,
3496 Arm_address relative_address_base
,
3497 Arm_address thumb_bit
,
3498 bool check_overflow
)
3500 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3501 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3502 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3503 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3504 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3505 - relative_address_base
);
3506 val
= This::insert_val_arm_movw_movt(val
, x
);
3507 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3508 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3509 ? This::STATUS_OVERFLOW
3510 : This::STATUS_OKAY
);
3513 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3514 // R_ARM_MOVT_PREL: S + A - P
3515 // R_ARM_MOVT_BREL: S + A - B(S)
3516 static inline typename
This::Status
3517 movt(unsigned char* view
,
3518 const Sized_relobj_file
<32, big_endian
>* object
,
3519 const Symbol_value
<32>* psymval
,
3520 Arm_address relative_address_base
)
3522 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3523 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3524 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3525 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3526 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3527 val
= This::insert_val_arm_movw_movt(val
, x
);
3528 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3529 // FIXME: IHI0044D says that we should check for overflow.
3530 return This::STATUS_OKAY
;
3533 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3534 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3535 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3536 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3537 static inline typename
This::Status
3538 thm_movw(unsigned char* view
,
3539 const Sized_relobj_file
<32, big_endian
>* object
,
3540 const Symbol_value
<32>* psymval
,
3541 Arm_address relative_address_base
,
3542 Arm_address thumb_bit
,
3543 bool check_overflow
)
3545 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3546 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3547 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3548 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3549 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3550 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3552 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3553 val
= This::insert_val_thumb_movw_movt(val
, x
);
3554 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3555 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3556 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3557 ? This::STATUS_OVERFLOW
3558 : This::STATUS_OKAY
);
3561 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3562 // R_ARM_THM_MOVT_PREL: S + A - P
3563 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3564 static inline typename
This::Status
3565 thm_movt(unsigned char* view
,
3566 const Sized_relobj_file
<32, big_endian
>* object
,
3567 const Symbol_value
<32>* psymval
,
3568 Arm_address relative_address_base
)
3570 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3571 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3572 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3573 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3574 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3575 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3576 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3577 val
= This::insert_val_thumb_movw_movt(val
, x
);
3578 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3579 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3580 return This::STATUS_OKAY
;
3583 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3584 static inline typename
This::Status
3585 thm_alu11(unsigned char* view
,
3586 const Sized_relobj_file
<32, big_endian
>* object
,
3587 const Symbol_value
<32>* psymval
,
3588 Arm_address address
,
3589 Arm_address thumb_bit
)
3591 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3592 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3593 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3594 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3595 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3597 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3598 // -----------------------------------------------------------------------
3599 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3600 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3601 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3602 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3603 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3604 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3606 // Determine a sign for the addend.
3607 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3608 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3609 // Thumb2 addend encoding:
3610 // imm12 := i | imm3 | imm8
3611 int32_t addend
= (insn
& 0xff)
3612 | ((insn
& 0x00007000) >> 4)
3613 | ((insn
& 0x04000000) >> 15);
3614 // Apply a sign to the added.
3617 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3618 - (address
& 0xfffffffc);
3619 Reltype val
= abs(x
);
3620 // Mask out the value and a distinct part of the ADD/SUB opcode
3621 // (bits 7:5 of opword).
3622 insn
= (insn
& 0xfb0f8f00)
3624 | ((val
& 0x700) << 4)
3625 | ((val
& 0x800) << 15);
3626 // Set the opcode according to whether the value to go in the
3627 // place is negative.
3631 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3632 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3633 return ((val
> 0xfff) ?
3634 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3637 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3638 static inline typename
This::Status
3639 thm_pc8(unsigned char* view
,
3640 const Sized_relobj_file
<32, big_endian
>* object
,
3641 const Symbol_value
<32>* psymval
,
3642 Arm_address address
)
3644 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3645 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3646 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3647 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3648 Reltype addend
= ((insn
& 0x00ff) << 2);
3649 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3650 Reltype val
= abs(x
);
3651 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3653 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3654 return ((val
> 0x03fc)
3655 ? This::STATUS_OVERFLOW
3656 : This::STATUS_OKAY
);
3659 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3660 static inline typename
This::Status
3661 thm_pc12(unsigned char* view
,
3662 const Sized_relobj_file
<32, big_endian
>* object
,
3663 const Symbol_value
<32>* psymval
,
3664 Arm_address address
)
3666 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3667 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3668 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3669 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3670 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3671 // Determine a sign for the addend (positive if the U bit is 1).
3672 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3673 int32_t addend
= (insn
& 0xfff);
3674 // Apply a sign to the added.
3677 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3678 Reltype val
= abs(x
);
3679 // Mask out and apply the value and the U bit.
3680 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3681 // Set the U bit according to whether the value to go in the
3682 // place is positive.
3686 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3687 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3688 return ((val
> 0xfff) ?
3689 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3693 static inline typename
This::Status
3694 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3695 unsigned char* view
,
3696 const Arm_relobj
<big_endian
>* object
,
3697 const Arm_address address
,
3698 const bool is_interworking
)
3701 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3702 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3703 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3705 // Ensure that we have a BX instruction.
3706 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3707 const uint32_t reg
= (val
& 0xf);
3708 if (is_interworking
&& reg
!= 0xf)
3710 Stub_table
<big_endian
>* stub_table
=
3711 object
->stub_table(relinfo
->data_shndx
);
3712 gold_assert(stub_table
!= NULL
);
3714 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3715 gold_assert(stub
!= NULL
);
3717 int32_t veneer_address
=
3718 stub_table
->address() + stub
->offset() - 8 - address
;
3719 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3720 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3721 // Replace with a branch to veneer (B <addr>)
3722 val
= (val
& 0xf0000000) | 0x0a000000
3723 | ((veneer_address
>> 2) & 0x00ffffff);
3727 // Preserve Rm (lowest four bits) and the condition code
3728 // (highest four bits). Other bits encode MOV PC,Rm.
3729 val
= (val
& 0xf000000f) | 0x01a0f000;
3731 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3732 return This::STATUS_OKAY
;
3735 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3736 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3737 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3738 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3739 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3740 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3741 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3742 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3743 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3744 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3745 static inline typename
This::Status
3746 arm_grp_alu(unsigned char* view
,
3747 const Sized_relobj_file
<32, big_endian
>* object
,
3748 const Symbol_value
<32>* psymval
,
3750 Arm_address address
,
3751 Arm_address thumb_bit
,
3752 bool check_overflow
)
3754 gold_assert(group
>= 0 && group
< 3);
3755 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3756 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3757 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3759 // ALU group relocations are allowed only for the ADD/SUB instructions.
3760 // (0x00800000 - ADD, 0x00400000 - SUB)
3761 const Valtype opcode
= insn
& 0x01e00000;
3762 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3763 return This::STATUS_BAD_RELOC
;
3765 // Determine a sign for the addend.
3766 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3767 // shifter = rotate_imm * 2
3768 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3769 // Initial addend value.
3770 int32_t addend
= insn
& 0xff;
3771 // Rotate addend right by shifter.
3772 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3773 // Apply a sign to the added.
3776 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3777 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3778 // Check for overflow if required
3780 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3781 return This::STATUS_OVERFLOW
;
3783 // Mask out the value and the ADD/SUB part of the opcode; take care
3784 // not to destroy the S bit.
3786 // Set the opcode according to whether the value to go in the
3787 // place is negative.
3788 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3789 // Encode the offset (encoded Gn).
3792 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3793 return This::STATUS_OKAY
;
3796 // R_ARM_LDR_PC_G0: S + A - P
3797 // R_ARM_LDR_PC_G1: S + A - P
3798 // R_ARM_LDR_PC_G2: S + A - P
3799 // R_ARM_LDR_SB_G0: S + A - B(S)
3800 // R_ARM_LDR_SB_G1: S + A - B(S)
3801 // R_ARM_LDR_SB_G2: S + A - B(S)
3802 static inline typename
This::Status
3803 arm_grp_ldr(unsigned char* view
,
3804 const Sized_relobj_file
<32, big_endian
>* object
,
3805 const Symbol_value
<32>* psymval
,
3807 Arm_address address
)
3809 gold_assert(group
>= 0 && group
< 3);
3810 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3811 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3812 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3814 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3815 int32_t addend
= (insn
& 0xfff) * sign
;
3816 int32_t x
= (psymval
->value(object
, addend
) - address
);
3817 // Calculate the relevant G(n-1) value to obtain this stage residual.
3819 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3820 if (residual
>= 0x1000)
3821 return This::STATUS_OVERFLOW
;
3823 // Mask out the value and U bit.
3825 // Set the U bit for non-negative values.
3830 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3831 return This::STATUS_OKAY
;
3834 // R_ARM_LDRS_PC_G0: S + A - P
3835 // R_ARM_LDRS_PC_G1: S + A - P
3836 // R_ARM_LDRS_PC_G2: S + A - P
3837 // R_ARM_LDRS_SB_G0: S + A - B(S)
3838 // R_ARM_LDRS_SB_G1: S + A - B(S)
3839 // R_ARM_LDRS_SB_G2: S + A - B(S)
3840 static inline typename
This::Status
3841 arm_grp_ldrs(unsigned char* view
,
3842 const Sized_relobj_file
<32, big_endian
>* object
,
3843 const Symbol_value
<32>* psymval
,
3845 Arm_address address
)
3847 gold_assert(group
>= 0 && group
< 3);
3848 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3849 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3850 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3852 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3853 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3854 int32_t x
= (psymval
->value(object
, addend
) - address
);
3855 // Calculate the relevant G(n-1) value to obtain this stage residual.
3857 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3858 if (residual
>= 0x100)
3859 return This::STATUS_OVERFLOW
;
3861 // Mask out the value and U bit.
3863 // Set the U bit for non-negative values.
3866 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3868 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3869 return This::STATUS_OKAY
;
3872 // R_ARM_LDC_PC_G0: S + A - P
3873 // R_ARM_LDC_PC_G1: S + A - P
3874 // R_ARM_LDC_PC_G2: S + A - P
3875 // R_ARM_LDC_SB_G0: S + A - B(S)
3876 // R_ARM_LDC_SB_G1: S + A - B(S)
3877 // R_ARM_LDC_SB_G2: S + A - B(S)
3878 static inline typename
This::Status
3879 arm_grp_ldc(unsigned char* view
,
3880 const Sized_relobj_file
<32, big_endian
>* object
,
3881 const Symbol_value
<32>* psymval
,
3883 Arm_address address
)
3885 gold_assert(group
>= 0 && group
< 3);
3886 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3887 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3888 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3890 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3891 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3892 int32_t x
= (psymval
->value(object
, addend
) - address
);
3893 // Calculate the relevant G(n-1) value to obtain this stage residual.
3895 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3896 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3897 return This::STATUS_OVERFLOW
;
3899 // Mask out the value and U bit.
3901 // Set the U bit for non-negative values.
3904 insn
|= (residual
>> 2);
3906 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3907 return This::STATUS_OKAY
;
3911 // Relocate ARM long branches. This handles relocation types
3912 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3913 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3914 // undefined and we do not use PLT in this relocation. In such a case,
3915 // the branch is converted into an NOP.
3917 template<bool big_endian
>
3918 typename Arm_relocate_functions
<big_endian
>::Status
3919 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3920 unsigned int r_type
,
3921 const Relocate_info
<32, big_endian
>* relinfo
,
3922 unsigned char* view
,
3923 const Sized_symbol
<32>* gsym
,
3924 const Arm_relobj
<big_endian
>* object
,
3926 const Symbol_value
<32>* psymval
,
3927 Arm_address address
,
3928 Arm_address thumb_bit
,
3929 bool is_weakly_undefined_without_plt
)
3931 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3932 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3933 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3935 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3936 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3937 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3938 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3939 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3940 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3941 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3943 // Check that the instruction is valid.
3944 if (r_type
== elfcpp::R_ARM_CALL
)
3946 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3947 return This::STATUS_BAD_RELOC
;
3949 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3951 if (!insn_is_b
&& !insn_is_cond_bl
)
3952 return This::STATUS_BAD_RELOC
;
3954 else if (r_type
== elfcpp::R_ARM_PLT32
)
3956 if (!insn_is_any_branch
)
3957 return This::STATUS_BAD_RELOC
;
3959 else if (r_type
== elfcpp::R_ARM_XPC25
)
3961 // FIXME: AAELF document IH0044C does not say much about it other
3962 // than it being obsolete.
3963 if (!insn_is_any_branch
)
3964 return This::STATUS_BAD_RELOC
;
3969 // A branch to an undefined weak symbol is turned into a jump to
3970 // the next instruction unless a PLT entry will be created.
3971 // Do the same for local undefined symbols.
3972 // The jump to the next instruction is optimized as a NOP depending
3973 // on the architecture.
3974 const Target_arm
<big_endian
>* arm_target
=
3975 Target_arm
<big_endian
>::default_target();
3976 if (is_weakly_undefined_without_plt
)
3978 gold_assert(!parameters
->options().relocatable());
3979 Valtype cond
= val
& 0xf0000000U
;
3980 if (arm_target
->may_use_arm_nop())
3981 val
= cond
| 0x0320f000;
3983 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3984 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3985 return This::STATUS_OKAY
;
3988 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
3989 Valtype branch_target
= psymval
->value(object
, addend
);
3990 int32_t branch_offset
= branch_target
- address
;
3992 // We need a stub if the branch offset is too large or if we need
3994 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
3995 Reloc_stub
* stub
= NULL
;
3997 if (!parameters
->options().relocatable()
3998 && (Bits
<26>::has_overflow32(branch_offset
)
3999 || ((thumb_bit
!= 0)
4000 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
4002 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
4004 Stub_type stub_type
=
4005 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4006 unadjusted_branch_target
,
4008 if (stub_type
!= arm_stub_none
)
4010 Stub_table
<big_endian
>* stub_table
=
4011 object
->stub_table(relinfo
->data_shndx
);
4012 gold_assert(stub_table
!= NULL
);
4014 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4015 stub
= stub_table
->find_reloc_stub(stub_key
);
4016 gold_assert(stub
!= NULL
);
4017 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4018 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4019 branch_offset
= branch_target
- address
;
4020 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
4024 // At this point, if we still need to switch mode, the instruction
4025 // must either be a BLX or a BL that can be converted to a BLX.
4029 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
4030 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
4033 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
4034 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4035 return (Bits
<26>::has_overflow32(branch_offset
)
4036 ? This::STATUS_OVERFLOW
4037 : This::STATUS_OKAY
);
4040 // Relocate THUMB long branches. This handles relocation types
4041 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4042 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4043 // undefined and we do not use PLT in this relocation. In such a case,
4044 // the branch is converted into an NOP.
4046 template<bool big_endian
>
4047 typename Arm_relocate_functions
<big_endian
>::Status
4048 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
4049 unsigned int r_type
,
4050 const Relocate_info
<32, big_endian
>* relinfo
,
4051 unsigned char* view
,
4052 const Sized_symbol
<32>* gsym
,
4053 const Arm_relobj
<big_endian
>* object
,
4055 const Symbol_value
<32>* psymval
,
4056 Arm_address address
,
4057 Arm_address thumb_bit
,
4058 bool is_weakly_undefined_without_plt
)
4060 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4061 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4062 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4063 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4065 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4067 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4068 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4070 // Check that the instruction is valid.
4071 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4073 if (!is_bl_insn
&& !is_blx_insn
)
4074 return This::STATUS_BAD_RELOC
;
4076 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4078 // This cannot be a BLX.
4080 return This::STATUS_BAD_RELOC
;
4082 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4084 // Check for Thumb to Thumb call.
4086 return This::STATUS_BAD_RELOC
;
4089 gold_warning(_("%s: Thumb BLX instruction targets "
4090 "thumb function '%s'."),
4091 object
->name().c_str(),
4092 (gsym
? gsym
->name() : "(local)"));
4093 // Convert BLX to BL.
4094 lower_insn
|= 0x1000U
;
4100 // A branch to an undefined weak symbol is turned into a jump to
4101 // the next instruction unless a PLT entry will be created.
4102 // The jump to the next instruction is optimized as a NOP.W for
4103 // Thumb-2 enabled architectures.
4104 const Target_arm
<big_endian
>* arm_target
=
4105 Target_arm
<big_endian
>::default_target();
4106 if (is_weakly_undefined_without_plt
)
4108 gold_assert(!parameters
->options().relocatable());
4109 if (arm_target
->may_use_thumb2_nop())
4111 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4112 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4116 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4117 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4119 return This::STATUS_OKAY
;
4122 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4123 Arm_address branch_target
= psymval
->value(object
, addend
);
4125 // For BLX, bit 1 of target address comes from bit 1 of base address.
4126 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4127 if (thumb_bit
== 0 && may_use_blx
)
4128 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4130 int32_t branch_offset
= branch_target
- address
;
4132 // We need a stub if the branch offset is too large or if we need
4134 bool thumb2
= arm_target
->using_thumb2();
4135 if (!parameters
->options().relocatable()
4136 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4137 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4138 || ((thumb_bit
== 0)
4139 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4140 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4142 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4144 Stub_type stub_type
=
4145 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4146 unadjusted_branch_target
,
4149 if (stub_type
!= arm_stub_none
)
4151 Stub_table
<big_endian
>* stub_table
=
4152 object
->stub_table(relinfo
->data_shndx
);
4153 gold_assert(stub_table
!= NULL
);
4155 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4156 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4157 gold_assert(stub
!= NULL
);
4158 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4159 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4160 if (thumb_bit
== 0 && may_use_blx
)
4161 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4162 branch_offset
= branch_target
- address
;
4166 // At this point, if we still need to switch mode, the instruction
4167 // must either be a BLX or a BL that can be converted to a BLX.
4170 gold_assert(may_use_blx
4171 && (r_type
== elfcpp::R_ARM_THM_CALL
4172 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4173 // Make sure this is a BLX.
4174 lower_insn
&= ~0x1000U
;
4178 // Make sure this is a BL.
4179 lower_insn
|= 0x1000U
;
4182 // For a BLX instruction, make sure that the relocation is rounded up
4183 // to a word boundary. This follows the semantics of the instruction
4184 // which specifies that bit 1 of the target address will come from bit
4185 // 1 of the base address.
4186 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4187 gold_assert((branch_offset
& 3) == 0);
4189 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4190 // We use the Thumb-2 encoding, which is safe even if dealing with
4191 // a Thumb-1 instruction by virtue of our overflow check above. */
4192 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4193 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4195 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4196 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4198 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4201 ? Bits
<25>::has_overflow32(branch_offset
)
4202 : Bits
<23>::has_overflow32(branch_offset
))
4203 ? This::STATUS_OVERFLOW
4204 : This::STATUS_OKAY
);
4207 // Relocate THUMB-2 long conditional branches.
4208 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4209 // undefined and we do not use PLT in this relocation. In such a case,
4210 // the branch is converted into an NOP.
4212 template<bool big_endian
>
4213 typename Arm_relocate_functions
<big_endian
>::Status
4214 Arm_relocate_functions
<big_endian
>::thm_jump19(
4215 unsigned char* view
,
4216 const Arm_relobj
<big_endian
>* object
,
4217 const Symbol_value
<32>* psymval
,
4218 Arm_address address
,
4219 Arm_address thumb_bit
)
4221 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4222 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4223 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4224 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4225 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4227 Arm_address branch_target
= psymval
->value(object
, addend
);
4228 int32_t branch_offset
= branch_target
- address
;
4230 // ??? Should handle interworking? GCC might someday try to
4231 // use this for tail calls.
4232 // FIXME: We do support thumb entry to PLT yet.
4235 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4236 return This::STATUS_BAD_RELOC
;
4239 // Put RELOCATION back into the insn.
4240 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4241 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4243 // Put the relocated value back in the object file:
4244 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4245 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4247 return (Bits
<21>::has_overflow32(branch_offset
)
4248 ? This::STATUS_OVERFLOW
4249 : This::STATUS_OKAY
);
4252 // Get the GOT section, creating it if necessary.
4254 template<bool big_endian
>
4255 Arm_output_data_got
<big_endian
>*
4256 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4258 if (this->got_
== NULL
)
4260 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4262 // When using -z now, we can treat .got as a relro section.
4263 // Without -z now, it is modified after program startup by lazy
4265 bool is_got_relro
= parameters
->options().now();
4266 Output_section_order got_order
= (is_got_relro
4270 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4271 // .got.plt sections in output. The output .got section contains both
4272 // PLT and non-PLT GOT entries.
4273 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4275 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4276 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4277 this->got_
, got_order
, is_got_relro
);
4279 // The old GNU linker creates a .got.plt section. We just
4280 // create another set of data in the .got section. Note that we
4281 // always create a PLT if we create a GOT, although the PLT
4283 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4284 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4285 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4286 this->got_plt_
, got_order
, is_got_relro
);
4288 // The first three entries are reserved.
4289 this->got_plt_
->set_current_data_size(3 * 4);
4291 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4292 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4293 Symbol_table::PREDEFINED
,
4295 0, 0, elfcpp::STT_OBJECT
,
4297 elfcpp::STV_HIDDEN
, 0,
4300 // If there are any IRELATIVE relocations, they get GOT entries
4301 // in .got.plt after the jump slot entries.
4302 this->got_irelative_
= new Output_data_space(4, "** GOT IRELATIVE PLT");
4303 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4304 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4305 this->got_irelative_
,
4306 got_order
, is_got_relro
);
4312 // Get the dynamic reloc section, creating it if necessary.
4314 template<bool big_endian
>
4315 typename Target_arm
<big_endian
>::Reloc_section
*
4316 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4318 if (this->rel_dyn_
== NULL
)
4320 gold_assert(layout
!= NULL
);
4321 // Create both relocation sections in the same place, so as to ensure
4322 // their relative order in the output section.
4323 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4324 this->rel_irelative_
= new Reloc_section(false);
4325 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4326 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4327 ORDER_DYNAMIC_RELOCS
, false);
4328 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4329 elfcpp::SHF_ALLOC
, this->rel_irelative_
,
4330 ORDER_DYNAMIC_RELOCS
, false);
4332 return this->rel_dyn_
;
4336 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4337 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4338 // follow the other dynamic relocations so that they can refer to global
4339 // variables initialized by those relocs.
4341 template<bool big_endian
>
4342 typename Target_arm
<big_endian
>::Reloc_section
*
4343 Target_arm
<big_endian
>::rel_irelative_section(Layout
* layout
)
4345 if (this->rel_irelative_
== NULL
)
4347 // Delegate the creation to rel_dyn_section so as to ensure their order in
4348 // the output section.
4349 this->rel_dyn_section(layout
);
4350 gold_assert(this->rel_irelative_
!= NULL
4351 && (this->rel_dyn_
->output_section()
4352 == this->rel_irelative_
->output_section()));
4354 return this->rel_irelative_
;
4358 // Insn_template methods.
4360 // Return byte size of an instruction template.
4363 Insn_template::size() const
4365 switch (this->type())
4368 case THUMB16_SPECIAL_TYPE
:
4379 // Return alignment of an instruction template.
4382 Insn_template::alignment() const
4384 switch (this->type())
4387 case THUMB16_SPECIAL_TYPE
:
4398 // Stub_template methods.
4400 Stub_template::Stub_template(
4401 Stub_type type
, const Insn_template
* insns
,
4403 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4404 entry_in_thumb_mode_(false), relocs_()
4408 // Compute byte size and alignment of stub template.
4409 for (size_t i
= 0; i
< insn_count
; i
++)
4411 unsigned insn_alignment
= insns
[i
].alignment();
4412 size_t insn_size
= insns
[i
].size();
4413 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4414 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4415 switch (insns
[i
].type())
4417 case Insn_template::THUMB16_TYPE
:
4418 case Insn_template::THUMB16_SPECIAL_TYPE
:
4420 this->entry_in_thumb_mode_
= true;
4423 case Insn_template::THUMB32_TYPE
:
4424 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4425 this->relocs_
.push_back(Reloc(i
, offset
));
4427 this->entry_in_thumb_mode_
= true;
4430 case Insn_template::ARM_TYPE
:
4431 // Handle cases where the target is encoded within the
4433 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4434 this->relocs_
.push_back(Reloc(i
, offset
));
4437 case Insn_template::DATA_TYPE
:
4438 // Entry point cannot be data.
4439 gold_assert(i
!= 0);
4440 this->relocs_
.push_back(Reloc(i
, offset
));
4446 offset
+= insn_size
;
4448 this->size_
= offset
;
4453 // Template to implement do_write for a specific target endianness.
4455 template<bool big_endian
>
4457 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4459 const Stub_template
* stub_template
= this->stub_template();
4460 const Insn_template
* insns
= stub_template
->insns();
4462 // FIXME: We do not handle BE8 encoding yet.
4463 unsigned char* pov
= view
;
4464 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4466 switch (insns
[i
].type())
4468 case Insn_template::THUMB16_TYPE
:
4469 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4471 case Insn_template::THUMB16_SPECIAL_TYPE
:
4472 elfcpp::Swap
<16, big_endian
>::writeval(
4474 this->thumb16_special(i
));
4476 case Insn_template::THUMB32_TYPE
:
4478 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4479 uint32_t lo
= insns
[i
].data() & 0xffff;
4480 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4481 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4484 case Insn_template::ARM_TYPE
:
4485 case Insn_template::DATA_TYPE
:
4486 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4491 pov
+= insns
[i
].size();
4493 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4496 // Reloc_stub::Key methods.
4498 // Dump a Key as a string for debugging.
4501 Reloc_stub::Key::name() const
4503 if (this->r_sym_
== invalid_index
)
4505 // Global symbol key name
4506 // <stub-type>:<symbol name>:<addend>.
4507 const std::string sym_name
= this->u_
.symbol
->name();
4508 // We need to print two hex number and two colons. So just add 100 bytes
4509 // to the symbol name size.
4510 size_t len
= sym_name
.size() + 100;
4511 char* buffer
= new char[len
];
4512 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4513 sym_name
.c_str(), this->addend_
);
4514 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4516 return std::string(buffer
);
4520 // local symbol key name
4521 // <stub-type>:<object>:<r_sym>:<addend>.
4522 const size_t len
= 200;
4524 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4525 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4526 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4527 return std::string(buffer
);
4531 // Reloc_stub methods.
4533 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4534 // LOCATION to DESTINATION.
4535 // This code is based on the arm_type_of_stub function in
4536 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4540 Reloc_stub::stub_type_for_reloc(
4541 unsigned int r_type
,
4542 Arm_address location
,
4543 Arm_address destination
,
4544 bool target_is_thumb
)
4546 Stub_type stub_type
= arm_stub_none
;
4548 // This is a bit ugly but we want to avoid using a templated class for
4549 // big and little endianities.
4551 bool should_force_pic_veneer
= parameters
->options().pic_veneer();
4554 if (parameters
->target().is_big_endian())
4556 const Target_arm
<true>* big_endian_target
=
4557 Target_arm
<true>::default_target();
4558 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4559 should_force_pic_veneer
|= big_endian_target
->should_force_pic_veneer();
4560 thumb2
= big_endian_target
->using_thumb2();
4561 thumb_only
= big_endian_target
->using_thumb_only();
4565 const Target_arm
<false>* little_endian_target
=
4566 Target_arm
<false>::default_target();
4567 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4568 should_force_pic_veneer
|=
4569 little_endian_target
->should_force_pic_veneer();
4570 thumb2
= little_endian_target
->using_thumb2();
4571 thumb_only
= little_endian_target
->using_thumb_only();
4574 int64_t branch_offset
;
4575 bool output_is_position_independent
=
4576 parameters
->options().output_is_position_independent();
4577 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4579 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4580 // base address (instruction address + 4).
4581 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4582 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4583 branch_offset
= static_cast<int64_t>(destination
) - location
;
4585 // Handle cases where:
4586 // - this call goes too far (different Thumb/Thumb2 max
4588 // - it's a Thumb->Arm call and blx is not available, or it's a
4589 // Thumb->Arm branch (not bl). A stub is needed in this case.
4591 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4592 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4594 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4595 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4596 || ((!target_is_thumb
)
4597 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4598 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4600 if (target_is_thumb
)
4605 stub_type
= (output_is_position_independent
4606 || should_force_pic_veneer
)
4609 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4610 // V5T and above. Stub starts with ARM code, so
4611 // we must be able to switch mode before
4612 // reaching it, which is only possible for 'bl'
4613 // (ie R_ARM_THM_CALL relocation).
4614 ? arm_stub_long_branch_any_thumb_pic
4615 // On V4T, use Thumb code only.
4616 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4620 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4621 ? arm_stub_long_branch_any_any
// V5T and above.
4622 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4626 stub_type
= (output_is_position_independent
4627 || should_force_pic_veneer
)
4628 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4629 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4636 // FIXME: We should check that the input section is from an
4637 // object that has interwork enabled.
4639 stub_type
= (output_is_position_independent
4640 || should_force_pic_veneer
)
4643 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4644 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4645 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4649 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4650 ? arm_stub_long_branch_any_any
// V5T and above.
4651 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4653 // Handle v4t short branches.
4654 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4655 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4656 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4657 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4661 else if (r_type
== elfcpp::R_ARM_CALL
4662 || r_type
== elfcpp::R_ARM_JUMP24
4663 || r_type
== elfcpp::R_ARM_PLT32
)
4665 branch_offset
= static_cast<int64_t>(destination
) - location
;
4666 if (target_is_thumb
)
4670 // FIXME: We should check that the input section is from an
4671 // object that has interwork enabled.
4673 // We have an extra 2-bytes reach because of
4674 // the mode change (bit 24 (H) of BLX encoding).
4675 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4676 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4677 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4678 || (r_type
== elfcpp::R_ARM_JUMP24
)
4679 || (r_type
== elfcpp::R_ARM_PLT32
))
4681 stub_type
= (output_is_position_independent
4682 || should_force_pic_veneer
)
4685 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4686 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4690 ? arm_stub_long_branch_any_any
// V5T and above.
4691 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4697 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4698 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4700 stub_type
= (output_is_position_independent
4701 || should_force_pic_veneer
)
4702 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4703 : arm_stub_long_branch_any_any
; /// non-PIC.
4711 // Cortex_a8_stub methods.
4713 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4714 // I is the position of the instruction template in the stub template.
4717 Cortex_a8_stub::do_thumb16_special(size_t i
)
4719 // The only use of this is to copy condition code from a conditional
4720 // branch being worked around to the corresponding conditional branch in
4722 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4724 uint16_t data
= this->stub_template()->insns()[i
].data();
4725 gold_assert((data
& 0xff00U
) == 0xd000U
);
4726 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4730 // Stub_factory methods.
4732 Stub_factory::Stub_factory()
4734 // The instruction template sequences are declared as static
4735 // objects and initialized first time the constructor runs.
4737 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4738 // to reach the stub if necessary.
4739 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4741 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4742 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4743 // dcd R_ARM_ABS32(X)
4746 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4748 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4750 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4751 Insn_template::arm_insn(0xe12fff1c), // bx ip
4752 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4753 // dcd R_ARM_ABS32(X)
4756 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4757 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4759 Insn_template::thumb16_insn(0xb401), // push {r0}
4760 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4761 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4762 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4763 Insn_template::thumb16_insn(0x4760), // bx ip
4764 Insn_template::thumb16_insn(0xbf00), // nop
4765 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4766 // dcd R_ARM_ABS32(X)
4769 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4771 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4773 Insn_template::thumb16_insn(0x4778), // bx pc
4774 Insn_template::thumb16_insn(0x46c0), // nop
4775 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4776 Insn_template::arm_insn(0xe12fff1c), // bx ip
4777 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4778 // dcd R_ARM_ABS32(X)
4781 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4783 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4785 Insn_template::thumb16_insn(0x4778), // bx pc
4786 Insn_template::thumb16_insn(0x46c0), // nop
4787 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4788 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4789 // dcd R_ARM_ABS32(X)
4792 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4793 // one, when the destination is close enough.
4794 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4796 Insn_template::thumb16_insn(0x4778), // bx pc
4797 Insn_template::thumb16_insn(0x46c0), // nop
4798 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4801 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4802 // blx to reach the stub if necessary.
4803 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4805 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4806 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4807 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4808 // dcd R_ARM_REL32(X-4)
4811 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4812 // blx to reach the stub if necessary. We can not add into pc;
4813 // it is not guaranteed to mode switch (different in ARMv6 and
4815 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4817 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4818 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4819 Insn_template::arm_insn(0xe12fff1c), // bx ip
4820 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4821 // dcd R_ARM_REL32(X)
4824 // V4T ARM -> ARM long branch stub, PIC.
4825 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4827 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4828 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4829 Insn_template::arm_insn(0xe12fff1c), // bx ip
4830 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4831 // dcd R_ARM_REL32(X)
4834 // V4T Thumb -> ARM long branch stub, PIC.
4835 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4837 Insn_template::thumb16_insn(0x4778), // bx pc
4838 Insn_template::thumb16_insn(0x46c0), // nop
4839 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4840 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4841 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4842 // dcd R_ARM_REL32(X)
4845 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4847 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4849 Insn_template::thumb16_insn(0xb401), // push {r0}
4850 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4851 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4852 Insn_template::thumb16_insn(0x4484), // add ip, r0
4853 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4854 Insn_template::thumb16_insn(0x4760), // bx ip
4855 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4856 // dcd R_ARM_REL32(X)
4859 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4861 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4863 Insn_template::thumb16_insn(0x4778), // bx pc
4864 Insn_template::thumb16_insn(0x46c0), // nop
4865 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4866 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4867 Insn_template::arm_insn(0xe12fff1c), // bx ip
4868 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4869 // dcd R_ARM_REL32(X)
4872 // Cortex-A8 erratum-workaround stubs.
4874 // Stub used for conditional branches (which may be beyond +/-1MB away,
4875 // so we can't use a conditional branch to reach this stub).
4882 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4884 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4885 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4886 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4890 // Stub used for b.w and bl.w instructions.
4892 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4894 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4897 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4899 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4902 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4903 // instruction (which switches to ARM mode) to point to this stub. Jump to
4904 // the real destination using an ARM-mode branch.
4905 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4907 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4910 // Stub used to provide an interworking for R_ARM_V4BX relocation
4911 // (bx r[n] instruction).
4912 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4914 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4915 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4916 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4919 // Fill in the stub template look-up table. Stub templates are constructed
4920 // per instance of Stub_factory for fast look-up without locking
4921 // in a thread-enabled environment.
4923 this->stub_templates_
[arm_stub_none
] =
4924 new Stub_template(arm_stub_none
, NULL
, 0);
4926 #define DEF_STUB(x) \
4930 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4931 Stub_type type = arm_stub_##x; \
4932 this->stub_templates_[type] = \
4933 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4941 // Stub_table methods.
4943 // Remove all Cortex-A8 stub.
4945 template<bool big_endian
>
4947 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4949 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4950 p
!= this->cortex_a8_stubs_
.end();
4953 this->cortex_a8_stubs_
.clear();
4956 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4958 template<bool big_endian
>
4960 Stub_table
<big_endian
>::relocate_stub(
4962 const Relocate_info
<32, big_endian
>* relinfo
,
4963 Target_arm
<big_endian
>* arm_target
,
4964 Output_section
* output_section
,
4965 unsigned char* view
,
4966 Arm_address address
,
4967 section_size_type view_size
)
4969 const Stub_template
* stub_template
= stub
->stub_template();
4970 if (stub_template
->reloc_count() != 0)
4972 // Adjust view to cover the stub only.
4973 section_size_type offset
= stub
->offset();
4974 section_size_type stub_size
= stub_template
->size();
4975 gold_assert(offset
+ stub_size
<= view_size
);
4977 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4978 address
+ offset
, stub_size
);
4982 // Relocate all stubs in this stub table.
4984 template<bool big_endian
>
4986 Stub_table
<big_endian
>::relocate_stubs(
4987 const Relocate_info
<32, big_endian
>* relinfo
,
4988 Target_arm
<big_endian
>* arm_target
,
4989 Output_section
* output_section
,
4990 unsigned char* view
,
4991 Arm_address address
,
4992 section_size_type view_size
)
4994 // If we are passed a view bigger than the stub table's. we need to
4996 gold_assert(address
== this->address()
4998 == static_cast<section_size_type
>(this->data_size())));
5000 // Relocate all relocation stubs.
5001 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5002 p
!= this->reloc_stubs_
.end();
5004 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5005 address
, view_size
);
5007 // Relocate all Cortex-A8 stubs.
5008 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5009 p
!= this->cortex_a8_stubs_
.end();
5011 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5012 address
, view_size
);
5014 // Relocate all ARM V4BX stubs.
5015 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
5016 p
!= this->arm_v4bx_stubs_
.end();
5020 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
5021 address
, view_size
);
5025 // Write out the stubs to file.
5027 template<bool big_endian
>
5029 Stub_table
<big_endian
>::do_write(Output_file
* of
)
5031 off_t offset
= this->offset();
5032 const section_size_type oview_size
=
5033 convert_to_section_size_type(this->data_size());
5034 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5036 // Write relocation stubs.
5037 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5038 p
!= this->reloc_stubs_
.end();
5041 Reloc_stub
* stub
= p
->second
;
5042 Arm_address address
= this->address() + stub
->offset();
5044 == align_address(address
,
5045 stub
->stub_template()->alignment()));
5046 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5050 // Write Cortex-A8 stubs.
5051 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5052 p
!= this->cortex_a8_stubs_
.end();
5055 Cortex_a8_stub
* stub
= p
->second
;
5056 Arm_address address
= this->address() + stub
->offset();
5058 == align_address(address
,
5059 stub
->stub_template()->alignment()));
5060 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5064 // Write ARM V4BX relocation stubs.
5065 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5066 p
!= this->arm_v4bx_stubs_
.end();
5072 Arm_address address
= this->address() + (*p
)->offset();
5074 == align_address(address
,
5075 (*p
)->stub_template()->alignment()));
5076 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
5080 of
->write_output_view(this->offset(), oview_size
, oview
);
5083 // Update the data size and address alignment of the stub table at the end
5084 // of a relaxation pass. Return true if either the data size or the
5085 // alignment changed in this relaxation pass.
5087 template<bool big_endian
>
5089 Stub_table
<big_endian
>::update_data_size_and_addralign()
5091 // Go over all stubs in table to compute data size and address alignment.
5092 off_t size
= this->reloc_stubs_size_
;
5093 unsigned addralign
= this->reloc_stubs_addralign_
;
5095 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5096 p
!= this->cortex_a8_stubs_
.end();
5099 const Stub_template
* stub_template
= p
->second
->stub_template();
5100 addralign
= std::max(addralign
, stub_template
->alignment());
5101 size
= (align_address(size
, stub_template
->alignment())
5102 + stub_template
->size());
5105 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5106 p
!= this->arm_v4bx_stubs_
.end();
5112 const Stub_template
* stub_template
= (*p
)->stub_template();
5113 addralign
= std::max(addralign
, stub_template
->alignment());
5114 size
= (align_address(size
, stub_template
->alignment())
5115 + stub_template
->size());
5118 // Check if either data size or alignment changed in this pass.
5119 // Update prev_data_size_ and prev_addralign_. These will be used
5120 // as the current data size and address alignment for the next pass.
5121 bool changed
= size
!= this->prev_data_size_
;
5122 this->prev_data_size_
= size
;
5124 if (addralign
!= this->prev_addralign_
)
5126 this->prev_addralign_
= addralign
;
5131 // Finalize the stubs. This sets the offsets of the stubs within the stub
5132 // table. It also marks all input sections needing Cortex-A8 workaround.
5134 template<bool big_endian
>
5136 Stub_table
<big_endian
>::finalize_stubs()
5138 off_t off
= this->reloc_stubs_size_
;
5139 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5140 p
!= this->cortex_a8_stubs_
.end();
5143 Cortex_a8_stub
* stub
= p
->second
;
5144 const Stub_template
* stub_template
= stub
->stub_template();
5145 uint64_t stub_addralign
= stub_template
->alignment();
5146 off
= align_address(off
, stub_addralign
);
5147 stub
->set_offset(off
);
5148 off
+= stub_template
->size();
5150 // Mark input section so that we can determine later if a code section
5151 // needs the Cortex-A8 workaround quickly.
5152 Arm_relobj
<big_endian
>* arm_relobj
=
5153 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5154 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5157 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5158 p
!= this->arm_v4bx_stubs_
.end();
5164 const Stub_template
* stub_template
= (*p
)->stub_template();
5165 uint64_t stub_addralign
= stub_template
->alignment();
5166 off
= align_address(off
, stub_addralign
);
5167 (*p
)->set_offset(off
);
5168 off
+= stub_template
->size();
5171 gold_assert(off
<= this->prev_data_size_
);
5174 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5175 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5176 // of the address range seen by the linker.
5178 template<bool big_endian
>
5180 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5181 Target_arm
<big_endian
>* arm_target
,
5182 unsigned char* view
,
5183 Arm_address view_address
,
5184 section_size_type view_size
)
5186 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5187 for (Cortex_a8_stub_list::const_iterator p
=
5188 this->cortex_a8_stubs_
.lower_bound(view_address
);
5189 ((p
!= this->cortex_a8_stubs_
.end())
5190 && (p
->first
< (view_address
+ view_size
)));
5193 // We do not store the THUMB bit in the LSB of either the branch address
5194 // or the stub offset. There is no need to strip the LSB.
5195 Arm_address branch_address
= p
->first
;
5196 const Cortex_a8_stub
* stub
= p
->second
;
5197 Arm_address stub_address
= this->address() + stub
->offset();
5199 // Offset of the branch instruction relative to this view.
5200 section_size_type offset
=
5201 convert_to_section_size_type(branch_address
- view_address
);
5202 gold_assert((offset
+ 4) <= view_size
);
5204 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5205 view
+ offset
, branch_address
);
5209 // Arm_input_section methods.
5211 // Initialize an Arm_input_section.
5213 template<bool big_endian
>
5215 Arm_input_section
<big_endian
>::init()
5217 Relobj
* relobj
= this->relobj();
5218 unsigned int shndx
= this->shndx();
5220 // We have to cache original size, alignment and contents to avoid locking
5221 // the original file.
5222 this->original_addralign_
=
5223 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5225 // This is not efficient but we expect only a small number of relaxed
5226 // input sections for stubs.
5227 section_size_type section_size
;
5228 const unsigned char* section_contents
=
5229 relobj
->section_contents(shndx
, §ion_size
, false);
5230 this->original_size_
=
5231 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5233 gold_assert(this->original_contents_
== NULL
);
5234 this->original_contents_
= new unsigned char[section_size
];
5235 memcpy(this->original_contents_
, section_contents
, section_size
);
5237 // We want to make this look like the original input section after
5238 // output sections are finalized.
5239 Output_section
* os
= relobj
->output_section(shndx
);
5240 off_t offset
= relobj
->output_section_offset(shndx
);
5241 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5242 this->set_address(os
->address() + offset
);
5243 this->set_file_offset(os
->offset() + offset
);
5245 this->set_current_data_size(this->original_size_
);
5246 this->finalize_data_size();
5249 template<bool big_endian
>
5251 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5253 // We have to write out the original section content.
5254 gold_assert(this->original_contents_
!= NULL
);
5255 of
->write(this->offset(), this->original_contents_
,
5256 this->original_size_
);
5258 // If this owns a stub table and it is not empty, write it.
5259 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5260 this->stub_table_
->write(of
);
5263 // Finalize data size.
5265 template<bool big_endian
>
5267 Arm_input_section
<big_endian
>::set_final_data_size()
5269 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5271 if (this->is_stub_table_owner())
5273 this->stub_table_
->finalize_data_size();
5274 off
= align_address(off
, this->stub_table_
->addralign());
5275 off
+= this->stub_table_
->data_size();
5277 this->set_data_size(off
);
5280 // Reset address and file offset.
5282 template<bool big_endian
>
5284 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5286 // Size of the original input section contents.
5287 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5289 // If this is a stub table owner, account for the stub table size.
5290 if (this->is_stub_table_owner())
5292 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5294 // Reset the stub table's address and file offset. The
5295 // current data size for child will be updated after that.
5296 stub_table_
->reset_address_and_file_offset();
5297 off
= align_address(off
, stub_table_
->addralign());
5298 off
+= stub_table
->current_data_size();
5301 this->set_current_data_size(off
);
5304 // Arm_exidx_cantunwind methods.
5306 // Write this to Output file OF for a fixed endianness.
5308 template<bool big_endian
>
5310 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5312 off_t offset
= this->offset();
5313 const section_size_type oview_size
= 8;
5314 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5316 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5317 gold_assert(os
!= NULL
);
5319 Arm_relobj
<big_endian
>* arm_relobj
=
5320 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5321 Arm_address output_offset
=
5322 arm_relobj
->get_output_section_offset(this->shndx_
);
5323 Arm_address section_start
;
5324 section_size_type section_size
;
5326 // Find out the end of the text section referred by this.
5327 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5329 section_start
= os
->address() + output_offset
;
5330 const Arm_exidx_input_section
* exidx_input_section
=
5331 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5332 gold_assert(exidx_input_section
!= NULL
);
5334 convert_to_section_size_type(exidx_input_section
->text_size());
5338 // Currently this only happens for a relaxed section.
5339 const Output_relaxed_input_section
* poris
=
5340 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5341 gold_assert(poris
!= NULL
);
5342 section_start
= poris
->address();
5343 section_size
= convert_to_section_size_type(poris
->data_size());
5346 // We always append this to the end of an EXIDX section.
5347 Arm_address output_address
= section_start
+ section_size
;
5349 // Write out the entry. The first word either points to the beginning
5350 // or after the end of a text section. The second word is the special
5351 // EXIDX_CANTUNWIND value.
5352 uint32_t prel31_offset
= output_address
- this->address();
5353 if (Bits
<31>::has_overflow32(offset
))
5354 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5355 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5356 prel31_offset
& 0x7fffffffU
);
5357 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5358 elfcpp::EXIDX_CANTUNWIND
);
5360 of
->write_output_view(this->offset(), oview_size
, oview
);
5363 // Arm_exidx_merged_section methods.
5365 // Constructor for Arm_exidx_merged_section.
5366 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5367 // SECTION_OFFSET_MAP points to a section offset map describing how
5368 // parts of the input section are mapped to output. DELETED_BYTES is
5369 // the number of bytes deleted from the EXIDX input section.
5371 Arm_exidx_merged_section::Arm_exidx_merged_section(
5372 const Arm_exidx_input_section
& exidx_input_section
,
5373 const Arm_exidx_section_offset_map
& section_offset_map
,
5374 uint32_t deleted_bytes
)
5375 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5376 exidx_input_section
.shndx(),
5377 exidx_input_section
.addralign()),
5378 exidx_input_section_(exidx_input_section
),
5379 section_offset_map_(section_offset_map
)
5381 // If we retain or discard the whole EXIDX input section, we would
5383 gold_assert(deleted_bytes
!= 0
5384 && deleted_bytes
!= this->exidx_input_section_
.size());
5386 // Fix size here so that we do not need to implement set_final_data_size.
5387 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5388 this->set_data_size(size
);
5389 this->fix_data_size();
5391 // Allocate buffer for section contents and build contents.
5392 this->section_contents_
= new unsigned char[size
];
5395 // Build the contents of a merged EXIDX output section.
5398 Arm_exidx_merged_section::build_contents(
5399 const unsigned char* original_contents
,
5400 section_size_type original_size
)
5402 // Go over spans of input offsets and write only those that are not
5404 section_offset_type in_start
= 0;
5405 section_offset_type out_start
= 0;
5406 section_offset_type in_max
=
5407 convert_types
<section_offset_type
>(original_size
);
5408 section_offset_type out_max
=
5409 convert_types
<section_offset_type
>(this->data_size());
5410 for (Arm_exidx_section_offset_map::const_iterator p
=
5411 this->section_offset_map_
.begin();
5412 p
!= this->section_offset_map_
.end();
5415 section_offset_type in_end
= p
->first
;
5416 gold_assert(in_end
>= in_start
);
5417 section_offset_type out_end
= p
->second
;
5418 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5421 size_t out_chunk_size
=
5422 convert_types
<size_t>(out_end
- out_start
+ 1);
5424 gold_assert(out_chunk_size
== in_chunk_size
5425 && in_end
< in_max
&& out_end
< out_max
);
5427 memcpy(this->section_contents_
+ out_start
,
5428 original_contents
+ in_start
,
5430 out_start
+= out_chunk_size
;
5432 in_start
+= in_chunk_size
;
5436 // Given an input OBJECT, an input section index SHNDX within that
5437 // object, and an OFFSET relative to the start of that input
5438 // section, return whether or not the corresponding offset within
5439 // the output section is known. If this function returns true, it
5440 // sets *POUTPUT to the output offset. The value -1 indicates that
5441 // this input offset is being discarded.
5444 Arm_exidx_merged_section::do_output_offset(
5445 const Relobj
* relobj
,
5447 section_offset_type offset
,
5448 section_offset_type
* poutput
) const
5450 // We only handle offsets for the original EXIDX input section.
5451 if (relobj
!= this->exidx_input_section_
.relobj()
5452 || shndx
!= this->exidx_input_section_
.shndx())
5455 section_offset_type section_size
=
5456 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5457 if (offset
< 0 || offset
>= section_size
)
5458 // Input offset is out of valid range.
5462 // We need to look up the section offset map to determine the output
5463 // offset. Find the reference point in map that is first offset
5464 // bigger than or equal to this offset.
5465 Arm_exidx_section_offset_map::const_iterator p
=
5466 this->section_offset_map_
.lower_bound(offset
);
5468 // The section offset maps are build such that this should not happen if
5469 // input offset is in the valid range.
5470 gold_assert(p
!= this->section_offset_map_
.end());
5472 // We need to check if this is dropped.
5473 section_offset_type ref
= p
->first
;
5474 section_offset_type mapped_ref
= p
->second
;
5476 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5477 // Offset is present in output.
5478 *poutput
= mapped_ref
+ (offset
- ref
);
5480 // Offset is discarded owing to EXIDX entry merging.
5487 // Write this to output file OF.
5490 Arm_exidx_merged_section::do_write(Output_file
* of
)
5492 off_t offset
= this->offset();
5493 const section_size_type oview_size
= this->data_size();
5494 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5496 Output_section
* os
= this->relobj()->output_section(this->shndx());
5497 gold_assert(os
!= NULL
);
5499 memcpy(oview
, this->section_contents_
, oview_size
);
5500 of
->write_output_view(this->offset(), oview_size
, oview
);
5503 // Arm_exidx_fixup methods.
5505 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5506 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5507 // points to the end of the last seen EXIDX section.
5510 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5512 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5513 && this->last_input_section_
!= NULL
)
5515 Relobj
* relobj
= this->last_input_section_
->relobj();
5516 unsigned int text_shndx
= this->last_input_section_
->link();
5517 Arm_exidx_cantunwind
* cantunwind
=
5518 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5519 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5520 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5524 // Process an EXIDX section entry in input. Return whether this entry
5525 // can be deleted in the output. SECOND_WORD in the second word of the
5529 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5532 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5534 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5535 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5536 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5538 else if ((second_word
& 0x80000000) != 0)
5540 // Inlined unwinding data. Merge if equal to previous.
5541 delete_entry
= (merge_exidx_entries_
5542 && this->last_unwind_type_
== UT_INLINED_ENTRY
5543 && this->last_inlined_entry_
== second_word
);
5544 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5545 this->last_inlined_entry_
= second_word
;
5549 // Normal table entry. In theory we could merge these too,
5550 // but duplicate entries are likely to be much less common.
5551 delete_entry
= false;
5552 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5554 return delete_entry
;
5557 // Update the current section offset map during EXIDX section fix-up.
5558 // If there is no map, create one. INPUT_OFFSET is the offset of a
5559 // reference point, DELETED_BYTES is the number of deleted by in the
5560 // section so far. If DELETE_ENTRY is true, the reference point and
5561 // all offsets after the previous reference point are discarded.
5564 Arm_exidx_fixup::update_offset_map(
5565 section_offset_type input_offset
,
5566 section_size_type deleted_bytes
,
5569 if (this->section_offset_map_
== NULL
)
5570 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5571 section_offset_type output_offset
;
5573 output_offset
= Arm_exidx_input_section::invalid_offset
;
5575 output_offset
= input_offset
- deleted_bytes
;
5576 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5579 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5580 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5581 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5582 // If some entries are merged, also store a pointer to a newly created
5583 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5584 // owns the map and is responsible for releasing it after use.
5586 template<bool big_endian
>
5588 Arm_exidx_fixup::process_exidx_section(
5589 const Arm_exidx_input_section
* exidx_input_section
,
5590 const unsigned char* section_contents
,
5591 section_size_type section_size
,
5592 Arm_exidx_section_offset_map
** psection_offset_map
)
5594 Relobj
* relobj
= exidx_input_section
->relobj();
5595 unsigned shndx
= exidx_input_section
->shndx();
5597 if ((section_size
% 8) != 0)
5599 // Something is wrong with this section. Better not touch it.
5600 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5601 relobj
->name().c_str(), shndx
);
5602 this->last_input_section_
= exidx_input_section
;
5603 this->last_unwind_type_
= UT_NONE
;
5607 uint32_t deleted_bytes
= 0;
5608 bool prev_delete_entry
= false;
5609 gold_assert(this->section_offset_map_
== NULL
);
5611 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5613 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5615 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5616 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5618 bool delete_entry
= this->process_exidx_entry(second_word
);
5620 // Entry deletion causes changes in output offsets. We use a std::map
5621 // to record these. And entry (x, y) means input offset x
5622 // is mapped to output offset y. If y is invalid_offset, then x is
5623 // dropped in the output. Because of the way std::map::lower_bound
5624 // works, we record the last offset in a region w.r.t to keeping or
5625 // dropping. If there is no entry (x0, y0) for an input offset x0,
5626 // the output offset y0 of it is determined by the output offset y1 of
5627 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5628 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5630 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5631 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5633 // Update total deleted bytes for this entry.
5637 prev_delete_entry
= delete_entry
;
5640 // If section offset map is not NULL, make an entry for the end of
5642 if (this->section_offset_map_
!= NULL
)
5643 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5645 *psection_offset_map
= this->section_offset_map_
;
5646 this->section_offset_map_
= NULL
;
5647 this->last_input_section_
= exidx_input_section
;
5649 // Set the first output text section so that we can link the EXIDX output
5650 // section to it. Ignore any EXIDX input section that is completely merged.
5651 if (this->first_output_text_section_
== NULL
5652 && deleted_bytes
!= section_size
)
5654 unsigned int link
= exidx_input_section
->link();
5655 Output_section
* os
= relobj
->output_section(link
);
5656 gold_assert(os
!= NULL
);
5657 this->first_output_text_section_
= os
;
5660 return deleted_bytes
;
5663 // Arm_output_section methods.
5665 // Create a stub group for input sections from BEGIN to END. OWNER
5666 // points to the input section to be the owner a new stub table.
5668 template<bool big_endian
>
5670 Arm_output_section
<big_endian
>::create_stub_group(
5671 Input_section_list::const_iterator begin
,
5672 Input_section_list::const_iterator end
,
5673 Input_section_list::const_iterator owner
,
5674 Target_arm
<big_endian
>* target
,
5675 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5678 // We use a different kind of relaxed section in an EXIDX section.
5679 // The static casting from Output_relaxed_input_section to
5680 // Arm_input_section is invalid in an EXIDX section. We are okay
5681 // because we should not be calling this for an EXIDX section.
5682 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5684 // Currently we convert ordinary input sections into relaxed sections only
5685 // at this point but we may want to support creating relaxed input section
5686 // very early. So we check here to see if owner is already a relaxed
5689 Arm_input_section
<big_endian
>* arm_input_section
;
5690 if (owner
->is_relaxed_input_section())
5693 Arm_input_section
<big_endian
>::as_arm_input_section(
5694 owner
->relaxed_input_section());
5698 gold_assert(owner
->is_input_section());
5699 // Create a new relaxed input section. We need to lock the original
5701 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5703 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5704 new_relaxed_sections
->push_back(arm_input_section
);
5707 // Create a stub table.
5708 Stub_table
<big_endian
>* stub_table
=
5709 target
->new_stub_table(arm_input_section
);
5711 arm_input_section
->set_stub_table(stub_table
);
5713 Input_section_list::const_iterator p
= begin
;
5714 Input_section_list::const_iterator prev_p
;
5716 // Look for input sections or relaxed input sections in [begin ... end].
5719 if (p
->is_input_section() || p
->is_relaxed_input_section())
5721 // The stub table information for input sections live
5722 // in their objects.
5723 Arm_relobj
<big_endian
>* arm_relobj
=
5724 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5725 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5729 while (prev_p
!= end
);
5732 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5733 // of stub groups. We grow a stub group by adding input section until the
5734 // size is just below GROUP_SIZE. The last input section will be converted
5735 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5736 // input section after the stub table, effectively double the group size.
5738 // This is similar to the group_sections() function in elf32-arm.c but is
5739 // implemented differently.
5741 template<bool big_endian
>
5743 Arm_output_section
<big_endian
>::group_sections(
5744 section_size_type group_size
,
5745 bool stubs_always_after_branch
,
5746 Target_arm
<big_endian
>* target
,
5749 // States for grouping.
5752 // No group is being built.
5754 // A group is being built but the stub table is not found yet.
5755 // We keep group a stub group until the size is just under GROUP_SIZE.
5756 // The last input section in the group will be used as the stub table.
5757 FINDING_STUB_SECTION
,
5758 // A group is being built and we have already found a stub table.
5759 // We enter this state to grow a stub group by adding input section
5760 // after the stub table. This effectively doubles the group size.
5764 // Any newly created relaxed sections are stored here.
5765 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5767 State state
= NO_GROUP
;
5768 section_size_type off
= 0;
5769 section_size_type group_begin_offset
= 0;
5770 section_size_type group_end_offset
= 0;
5771 section_size_type stub_table_end_offset
= 0;
5772 Input_section_list::const_iterator group_begin
=
5773 this->input_sections().end();
5774 Input_section_list::const_iterator stub_table
=
5775 this->input_sections().end();
5776 Input_section_list::const_iterator group_end
= this->input_sections().end();
5777 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5778 p
!= this->input_sections().end();
5781 section_size_type section_begin_offset
=
5782 align_address(off
, p
->addralign());
5783 section_size_type section_end_offset
=
5784 section_begin_offset
+ p
->data_size();
5786 // Check to see if we should group the previously seen sections.
5792 case FINDING_STUB_SECTION
:
5793 // Adding this section makes the group larger than GROUP_SIZE.
5794 if (section_end_offset
- group_begin_offset
>= group_size
)
5796 if (stubs_always_after_branch
)
5798 gold_assert(group_end
!= this->input_sections().end());
5799 this->create_stub_group(group_begin
, group_end
, group_end
,
5800 target
, &new_relaxed_sections
,
5806 // But wait, there's more! Input sections up to
5807 // stub_group_size bytes after the stub table can be
5808 // handled by it too.
5809 state
= HAS_STUB_SECTION
;
5810 stub_table
= group_end
;
5811 stub_table_end_offset
= group_end_offset
;
5816 case HAS_STUB_SECTION
:
5817 // Adding this section makes the post stub-section group larger
5819 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5821 gold_assert(group_end
!= this->input_sections().end());
5822 this->create_stub_group(group_begin
, group_end
, stub_table
,
5823 target
, &new_relaxed_sections
, task
);
5832 // If we see an input section and currently there is no group, start
5833 // a new one. Skip any empty sections. We look at the data size
5834 // instead of calling p->relobj()->section_size() to avoid locking.
5835 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5836 && (p
->data_size() != 0))
5838 if (state
== NO_GROUP
)
5840 state
= FINDING_STUB_SECTION
;
5842 group_begin_offset
= section_begin_offset
;
5845 // Keep track of the last input section seen.
5847 group_end_offset
= section_end_offset
;
5850 off
= section_end_offset
;
5853 // Create a stub group for any ungrouped sections.
5854 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5856 gold_assert(group_end
!= this->input_sections().end());
5857 this->create_stub_group(group_begin
, group_end
,
5858 (state
== FINDING_STUB_SECTION
5861 target
, &new_relaxed_sections
, task
);
5864 // Convert input section into relaxed input section in a batch.
5865 if (!new_relaxed_sections
.empty())
5866 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5868 // Update the section offsets
5869 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5871 Arm_relobj
<big_endian
>* arm_relobj
=
5872 Arm_relobj
<big_endian
>::as_arm_relobj(
5873 new_relaxed_sections
[i
]->relobj());
5874 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5875 // Tell Arm_relobj that this input section is converted.
5876 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5880 // Append non empty text sections in this to LIST in ascending
5881 // order of their position in this.
5883 template<bool big_endian
>
5885 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5886 Text_section_list
* list
)
5888 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5890 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5891 p
!= this->input_sections().end();
5894 // We only care about plain or relaxed input sections. We also
5895 // ignore any merged sections.
5896 if (p
->is_input_section() || p
->is_relaxed_input_section())
5897 list
->push_back(Text_section_list::value_type(p
->relobj(),
5902 template<bool big_endian
>
5904 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5906 const Text_section_list
& sorted_text_sections
,
5907 Symbol_table
* symtab
,
5908 bool merge_exidx_entries
,
5911 // We should only do this for the EXIDX output section.
5912 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5914 // We don't want the relaxation loop to undo these changes, so we discard
5915 // the current saved states and take another one after the fix-up.
5916 this->discard_states();
5918 // Remove all input sections.
5919 uint64_t address
= this->address();
5920 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5921 Input_section_list input_sections
;
5922 this->reset_address_and_file_offset();
5923 this->get_input_sections(address
, std::string(""), &input_sections
);
5925 if (!this->input_sections().empty())
5926 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5928 // Go through all the known input sections and record them.
5929 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5930 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5931 Section_id_hash
> Text_to_exidx_map
;
5932 Text_to_exidx_map text_to_exidx_map
;
5933 for (Input_section_list::const_iterator p
= input_sections
.begin();
5934 p
!= input_sections
.end();
5937 // This should never happen. At this point, we should only see
5938 // plain EXIDX input sections.
5939 gold_assert(!p
->is_relaxed_input_section());
5940 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5943 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5945 // Go over the sorted text sections.
5946 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5947 Section_id_set processed_input_sections
;
5948 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5949 p
!= sorted_text_sections
.end();
5952 Relobj
* relobj
= p
->first
;
5953 unsigned int shndx
= p
->second
;
5955 Arm_relobj
<big_endian
>* arm_relobj
=
5956 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5957 const Arm_exidx_input_section
* exidx_input_section
=
5958 arm_relobj
->exidx_input_section_by_link(shndx
);
5960 // If this text section has no EXIDX section or if the EXIDX section
5961 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5962 // of the last seen EXIDX section.
5963 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5965 exidx_fixup
.add_exidx_cantunwind_as_needed();
5969 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5970 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5971 Section_id
sid(exidx_relobj
, exidx_shndx
);
5972 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5973 if (iter
== text_to_exidx_map
.end())
5975 // This is odd. We have not seen this EXIDX input section before.
5976 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5977 // issue a warning instead. We assume the user knows what he
5978 // or she is doing. Otherwise, this is an error.
5979 if (layout
->script_options()->saw_sections_clause())
5980 gold_warning(_("unwinding may not work because EXIDX input section"
5981 " %u of %s is not in EXIDX output section"),
5982 exidx_shndx
, exidx_relobj
->name().c_str());
5984 gold_error(_("unwinding may not work because EXIDX input section"
5985 " %u of %s is not in EXIDX output section"),
5986 exidx_shndx
, exidx_relobj
->name().c_str());
5988 exidx_fixup
.add_exidx_cantunwind_as_needed();
5992 // We need to access the contents of the EXIDX section, lock the
5994 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5995 section_size_type exidx_size
;
5996 const unsigned char* exidx_contents
=
5997 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5999 // Fix up coverage and append input section to output data list.
6000 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
6001 uint32_t deleted_bytes
=
6002 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
6005 §ion_offset_map
);
6007 if (deleted_bytes
== exidx_input_section
->size())
6009 // The whole EXIDX section got merged. Remove it from output.
6010 gold_assert(section_offset_map
== NULL
);
6011 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
6013 // All local symbols defined in this input section will be dropped.
6014 // We need to adjust output local symbol count.
6015 arm_relobj
->set_output_local_symbol_count_needs_update();
6017 else if (deleted_bytes
> 0)
6019 // Some entries are merged. We need to convert this EXIDX input
6020 // section into a relaxed section.
6021 gold_assert(section_offset_map
!= NULL
);
6023 Arm_exidx_merged_section
* merged_section
=
6024 new Arm_exidx_merged_section(*exidx_input_section
,
6025 *section_offset_map
, deleted_bytes
);
6026 merged_section
->build_contents(exidx_contents
, exidx_size
);
6028 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
6029 this->add_relaxed_input_section(layout
, merged_section
, secname
);
6030 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
6032 // All local symbols defined in discarded portions of this input
6033 // section will be dropped. We need to adjust output local symbol
6035 arm_relobj
->set_output_local_symbol_count_needs_update();
6039 // Just add back the EXIDX input section.
6040 gold_assert(section_offset_map
== NULL
);
6041 const Output_section::Input_section
* pis
= iter
->second
;
6042 gold_assert(pis
->is_input_section());
6043 this->add_script_input_section(*pis
);
6046 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
6049 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6050 exidx_fixup
.add_exidx_cantunwind_as_needed();
6052 // Remove any known EXIDX input sections that are not processed.
6053 for (Input_section_list::const_iterator p
= input_sections
.begin();
6054 p
!= input_sections
.end();
6057 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
6058 == processed_input_sections
.end())
6060 // We discard a known EXIDX section because its linked
6061 // text section has been folded by ICF. We also discard an
6062 // EXIDX section with error, the output does not matter in this
6063 // case. We do this to avoid triggering asserts.
6064 Arm_relobj
<big_endian
>* arm_relobj
=
6065 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6066 const Arm_exidx_input_section
* exidx_input_section
=
6067 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
6068 gold_assert(exidx_input_section
!= NULL
);
6069 if (!exidx_input_section
->has_errors())
6071 unsigned int text_shndx
= exidx_input_section
->link();
6072 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
6075 // Remove this from link. We also need to recount the
6077 p
->relobj()->set_output_section(p
->shndx(), NULL
);
6078 arm_relobj
->set_output_local_symbol_count_needs_update();
6082 // Link exidx output section to the first seen output section and
6083 // set correct entry size.
6084 this->set_link_section(exidx_fixup
.first_output_text_section());
6085 this->set_entsize(8);
6087 // Make changes permanent.
6088 this->save_states();
6089 this->set_section_offsets_need_adjustment();
6092 // Link EXIDX output sections to text output sections.
6094 template<bool big_endian
>
6096 Arm_output_section
<big_endian
>::set_exidx_section_link()
6098 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6099 if (!this->input_sections().empty())
6101 Input_section_list::const_iterator p
= this->input_sections().begin();
6102 Arm_relobj
<big_endian
>* arm_relobj
=
6103 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6104 unsigned exidx_shndx
= p
->shndx();
6105 const Arm_exidx_input_section
* exidx_input_section
=
6106 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6107 gold_assert(exidx_input_section
!= NULL
);
6108 unsigned int text_shndx
= exidx_input_section
->link();
6109 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6110 this->set_link_section(os
);
6114 // Arm_relobj methods.
6116 // Determine if an input section is scannable for stub processing. SHDR is
6117 // the header of the section and SHNDX is the section index. OS is the output
6118 // section for the input section and SYMTAB is the global symbol table used to
6119 // look up ICF information.
6121 template<bool big_endian
>
6123 Arm_relobj
<big_endian
>::section_is_scannable(
6124 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6126 const Output_section
* os
,
6127 const Symbol_table
* symtab
)
6129 // Skip any empty sections, unallocated sections or sections whose
6130 // type are not SHT_PROGBITS.
6131 if (shdr
.get_sh_size() == 0
6132 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6133 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6136 // Skip any discarded or ICF'ed sections.
6137 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6140 // If this requires special offset handling, check to see if it is
6141 // a relaxed section. If this is not, then it is a merged section that
6142 // we cannot handle.
6143 if (this->is_output_section_offset_invalid(shndx
))
6145 const Output_relaxed_input_section
* poris
=
6146 os
->find_relaxed_input_section(this, shndx
);
6154 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6155 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6157 template<bool big_endian
>
6159 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6160 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6161 const Relobj::Output_sections
& out_sections
,
6162 const Symbol_table
* symtab
,
6163 const unsigned char* pshdrs
)
6165 unsigned int sh_type
= shdr
.get_sh_type();
6166 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6169 // Ignore empty section.
6170 off_t sh_size
= shdr
.get_sh_size();
6174 // Ignore reloc section with unexpected symbol table. The
6175 // error will be reported in the final link.
6176 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6179 unsigned int reloc_size
;
6180 if (sh_type
== elfcpp::SHT_REL
)
6181 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6183 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6185 // Ignore reloc section with unexpected entsize or uneven size.
6186 // The error will be reported in the final link.
6187 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6190 // Ignore reloc section with bad info. This error will be
6191 // reported in the final link.
6192 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6193 if (index
>= this->shnum())
6196 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6197 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6198 return this->section_is_scannable(text_shdr
, index
,
6199 out_sections
[index
], symtab
);
6202 // Return the output address of either a plain input section or a relaxed
6203 // input section. SHNDX is the section index. We define and use this
6204 // instead of calling Output_section::output_address because that is slow
6205 // for large output.
6207 template<bool big_endian
>
6209 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6213 if (this->is_output_section_offset_invalid(shndx
))
6215 const Output_relaxed_input_section
* poris
=
6216 os
->find_relaxed_input_section(this, shndx
);
6217 // We do not handle merged sections here.
6218 gold_assert(poris
!= NULL
);
6219 return poris
->address();
6222 return os
->address() + this->get_output_section_offset(shndx
);
6225 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6226 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6228 template<bool big_endian
>
6230 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6231 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6234 const Symbol_table
* symtab
)
6236 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6239 // If the section does not cross any 4K-boundaries, it does not need to
6241 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6242 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6248 // Scan a section for Cortex-A8 workaround.
6250 template<bool big_endian
>
6252 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6253 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6256 Target_arm
<big_endian
>* arm_target
)
6258 // Look for the first mapping symbol in this section. It should be
6260 Mapping_symbol_position
section_start(shndx
, 0);
6261 typename
Mapping_symbols_info::const_iterator p
=
6262 this->mapping_symbols_info_
.lower_bound(section_start
);
6264 // There are no mapping symbols for this section. Treat it as a data-only
6266 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6269 Arm_address output_address
=
6270 this->simple_input_section_output_address(shndx
, os
);
6272 // Get the section contents.
6273 section_size_type input_view_size
= 0;
6274 const unsigned char* input_view
=
6275 this->section_contents(shndx
, &input_view_size
, false);
6277 // We need to go through the mapping symbols to determine what to
6278 // scan. There are two reasons. First, we should look at THUMB code and
6279 // THUMB code only. Second, we only want to look at the 4K-page boundary
6280 // to speed up the scanning.
6282 while (p
!= this->mapping_symbols_info_
.end()
6283 && p
->first
.first
== shndx
)
6285 typename
Mapping_symbols_info::const_iterator next
=
6286 this->mapping_symbols_info_
.upper_bound(p
->first
);
6288 // Only scan part of a section with THUMB code.
6289 if (p
->second
== 't')
6291 // Determine the end of this range.
6292 section_size_type span_start
=
6293 convert_to_section_size_type(p
->first
.second
);
6294 section_size_type span_end
;
6295 if (next
!= this->mapping_symbols_info_
.end()
6296 && next
->first
.first
== shndx
)
6297 span_end
= convert_to_section_size_type(next
->first
.second
);
6299 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6301 if (((span_start
+ output_address
) & ~0xfffUL
)
6302 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6304 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6305 span_start
, span_end
,
6315 // Scan relocations for stub generation.
6317 template<bool big_endian
>
6319 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6320 Target_arm
<big_endian
>* arm_target
,
6321 const Symbol_table
* symtab
,
6322 const Layout
* layout
)
6324 unsigned int shnum
= this->shnum();
6325 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6327 // Read the section headers.
6328 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6332 // To speed up processing, we set up hash tables for fast lookup of
6333 // input offsets to output addresses.
6334 this->initialize_input_to_output_maps();
6336 const Relobj::Output_sections
& out_sections(this->output_sections());
6338 Relocate_info
<32, big_endian
> relinfo
;
6339 relinfo
.symtab
= symtab
;
6340 relinfo
.layout
= layout
;
6341 relinfo
.object
= this;
6343 // Do relocation stubs scanning.
6344 const unsigned char* p
= pshdrs
+ shdr_size
;
6345 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6347 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6348 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6351 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6352 Arm_address output_offset
= this->get_output_section_offset(index
);
6353 Arm_address output_address
;
6354 if (output_offset
!= invalid_address
)
6355 output_address
= out_sections
[index
]->address() + output_offset
;
6358 // Currently this only happens for a relaxed section.
6359 const Output_relaxed_input_section
* poris
=
6360 out_sections
[index
]->find_relaxed_input_section(this, index
);
6361 gold_assert(poris
!= NULL
);
6362 output_address
= poris
->address();
6365 // Get the relocations.
6366 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6370 // Get the section contents. This does work for the case in which
6371 // we modify the contents of an input section. We need to pass the
6372 // output view under such circumstances.
6373 section_size_type input_view_size
= 0;
6374 const unsigned char* input_view
=
6375 this->section_contents(index
, &input_view_size
, false);
6377 relinfo
.reloc_shndx
= i
;
6378 relinfo
.data_shndx
= index
;
6379 unsigned int sh_type
= shdr
.get_sh_type();
6380 unsigned int reloc_size
;
6381 if (sh_type
== elfcpp::SHT_REL
)
6382 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6384 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6386 Output_section
* os
= out_sections
[index
];
6387 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6388 shdr
.get_sh_size() / reloc_size
,
6390 output_offset
== invalid_address
,
6391 input_view
, output_address
,
6396 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6397 // after its relocation section, if there is one, is processed for
6398 // relocation stubs. Merging this loop with the one above would have been
6399 // complicated since we would have had to make sure that relocation stub
6400 // scanning is done first.
6401 if (arm_target
->fix_cortex_a8())
6403 const unsigned char* p
= pshdrs
+ shdr_size
;
6404 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6406 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6407 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6410 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6415 // After we've done the relocations, we release the hash tables,
6416 // since we no longer need them.
6417 this->free_input_to_output_maps();
6420 // Count the local symbols. The ARM backend needs to know if a symbol
6421 // is a THUMB function or not. For global symbols, it is easy because
6422 // the Symbol object keeps the ELF symbol type. For local symbol it is
6423 // harder because we cannot access this information. So we override the
6424 // do_count_local_symbol in parent and scan local symbols to mark
6425 // THUMB functions. This is not the most efficient way but I do not want to
6426 // slow down other ports by calling a per symbol target hook inside
6427 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6429 template<bool big_endian
>
6431 Arm_relobj
<big_endian
>::do_count_local_symbols(
6432 Stringpool_template
<char>* pool
,
6433 Stringpool_template
<char>* dynpool
)
6435 // We need to fix-up the values of any local symbols whose type are
6438 // Ask parent to count the local symbols.
6439 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6440 const unsigned int loccount
= this->local_symbol_count();
6444 // Initialize the thumb function bit-vector.
6445 std::vector
<bool> empty_vector(loccount
, false);
6446 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6448 // Read the symbol table section header.
6449 const unsigned int symtab_shndx
= this->symtab_shndx();
6450 elfcpp::Shdr
<32, big_endian
>
6451 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6452 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6454 // Read the local symbols.
6455 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6456 gold_assert(loccount
== symtabshdr
.get_sh_info());
6457 off_t locsize
= loccount
* sym_size
;
6458 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6459 locsize
, true, true);
6461 // For mapping symbol processing, we need to read the symbol names.
6462 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6463 if (strtab_shndx
>= this->shnum())
6465 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6469 elfcpp::Shdr
<32, big_endian
>
6470 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6471 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6473 this->error(_("symbol table name section has wrong type: %u"),
6474 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6477 const char* pnames
=
6478 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6479 strtabshdr
.get_sh_size(),
6482 // Loop over the local symbols and mark any local symbols pointing
6483 // to THUMB functions.
6485 // Skip the first dummy symbol.
6487 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6488 this->local_values();
6489 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6491 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6492 elfcpp::STT st_type
= sym
.get_st_type();
6493 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6494 Arm_address input_value
= lv
.input_value();
6496 // Check to see if this is a mapping symbol.
6497 const char* sym_name
= pnames
+ sym
.get_st_name();
6498 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6501 unsigned int input_shndx
=
6502 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6503 gold_assert(is_ordinary
);
6505 // Strip of LSB in case this is a THUMB symbol.
6506 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6507 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6510 if (st_type
== elfcpp::STT_ARM_TFUNC
6511 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6513 // This is a THUMB function. Mark this and canonicalize the
6514 // symbol value by setting LSB.
6515 this->local_symbol_is_thumb_function_
[i
] = true;
6516 if ((input_value
& 1) == 0)
6517 lv
.set_input_value(input_value
| 1);
6522 // Relocate sections.
6523 template<bool big_endian
>
6525 Arm_relobj
<big_endian
>::do_relocate_sections(
6526 const Symbol_table
* symtab
,
6527 const Layout
* layout
,
6528 const unsigned char* pshdrs
,
6530 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6532 // Call parent to relocate sections.
6533 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6534 pshdrs
, of
, pviews
);
6536 // We do not generate stubs if doing a relocatable link.
6537 if (parameters
->options().relocatable())
6540 // Relocate stub tables.
6541 unsigned int shnum
= this->shnum();
6543 Target_arm
<big_endian
>* arm_target
=
6544 Target_arm
<big_endian
>::default_target();
6546 Relocate_info
<32, big_endian
> relinfo
;
6547 relinfo
.symtab
= symtab
;
6548 relinfo
.layout
= layout
;
6549 relinfo
.object
= this;
6551 for (unsigned int i
= 1; i
< shnum
; ++i
)
6553 Arm_input_section
<big_endian
>* arm_input_section
=
6554 arm_target
->find_arm_input_section(this, i
);
6556 if (arm_input_section
!= NULL
6557 && arm_input_section
->is_stub_table_owner()
6558 && !arm_input_section
->stub_table()->empty())
6560 // We cannot discard a section if it owns a stub table.
6561 Output_section
* os
= this->output_section(i
);
6562 gold_assert(os
!= NULL
);
6564 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6565 relinfo
.reloc_shdr
= NULL
;
6566 relinfo
.data_shndx
= i
;
6567 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6569 gold_assert((*pviews
)[i
].view
!= NULL
);
6571 // We are passed the output section view. Adjust it to cover the
6573 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6574 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6575 && ((stub_table
->address() + stub_table
->data_size())
6576 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6578 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6579 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6580 Arm_address address
= stub_table
->address();
6581 section_size_type view_size
= stub_table
->data_size();
6583 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6587 // Apply Cortex A8 workaround if applicable.
6588 if (this->section_has_cortex_a8_workaround(i
))
6590 unsigned char* view
= (*pviews
)[i
].view
;
6591 Arm_address view_address
= (*pviews
)[i
].address
;
6592 section_size_type view_size
= (*pviews
)[i
].view_size
;
6593 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6595 // Adjust view to cover section.
6596 Output_section
* os
= this->output_section(i
);
6597 gold_assert(os
!= NULL
);
6598 Arm_address section_address
=
6599 this->simple_input_section_output_address(i
, os
);
6600 uint64_t section_size
= this->section_size(i
);
6602 gold_assert(section_address
>= view_address
6603 && ((section_address
+ section_size
)
6604 <= (view_address
+ view_size
)));
6606 unsigned char* section_view
= view
+ (section_address
- view_address
);
6608 // Apply the Cortex-A8 workaround to the output address range
6609 // corresponding to this input section.
6610 stub_table
->apply_cortex_a8_workaround_to_address_range(
6619 // Find the linked text section of an EXIDX section by looking at the first
6620 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6621 // must be linked to its associated code section via the sh_link field of
6622 // its section header. However, some tools are broken and the link is not
6623 // always set. LD just drops such an EXIDX section silently, causing the
6624 // associated code not unwindabled. Here we try a little bit harder to
6625 // discover the linked code section.
6627 // PSHDR points to the section header of a relocation section of an EXIDX
6628 // section. If we can find a linked text section, return true and
6629 // store the text section index in the location PSHNDX. Otherwise
6632 template<bool big_endian
>
6634 Arm_relobj
<big_endian
>::find_linked_text_section(
6635 const unsigned char* pshdr
,
6636 const unsigned char* psyms
,
6637 unsigned int* pshndx
)
6639 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6641 // If there is no relocation, we cannot find the linked text section.
6643 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6644 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6646 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6647 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6649 // Get the relocations.
6650 const unsigned char* prelocs
=
6651 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6653 // Find the REL31 relocation for the first word of the first EXIDX entry.
6654 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6656 Arm_address r_offset
;
6657 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6658 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6660 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6661 r_info
= reloc
.get_r_info();
6662 r_offset
= reloc
.get_r_offset();
6666 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6667 r_info
= reloc
.get_r_info();
6668 r_offset
= reloc
.get_r_offset();
6671 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6672 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6675 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6677 || r_sym
>= this->local_symbol_count()
6681 // This is the relocation for the first word of the first EXIDX entry.
6682 // We expect to see a local section symbol.
6683 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6684 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6685 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6689 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6690 gold_assert(is_ordinary
);
6700 // Make an EXIDX input section object for an EXIDX section whose index is
6701 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6702 // is the section index of the linked text section.
6704 template<bool big_endian
>
6706 Arm_relobj
<big_endian
>::make_exidx_input_section(
6708 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6709 unsigned int text_shndx
,
6710 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6712 // Create an Arm_exidx_input_section object for this EXIDX section.
6713 Arm_exidx_input_section
* exidx_input_section
=
6714 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6715 shdr
.get_sh_addralign(),
6716 text_shdr
.get_sh_size());
6718 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6719 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6721 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6723 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6724 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6725 this->name().c_str());
6726 exidx_input_section
->set_has_errors();
6728 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6730 unsigned other_exidx_shndx
=
6731 this->exidx_section_map_
[text_shndx
]->shndx();
6732 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6734 this->section_name(shndx
).c_str(), shndx
,
6735 this->section_name(other_exidx_shndx
).c_str(),
6736 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6737 text_shndx
, this->name().c_str());
6738 exidx_input_section
->set_has_errors();
6741 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6743 // Check section flags of text section.
6744 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6746 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6748 this->section_name(shndx
).c_str(), shndx
,
6749 this->section_name(text_shndx
).c_str(), text_shndx
,
6750 this->name().c_str());
6751 exidx_input_section
->set_has_errors();
6753 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6754 // I would like to make this an error but currently ld just ignores
6756 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6758 this->section_name(shndx
).c_str(), shndx
,
6759 this->section_name(text_shndx
).c_str(), text_shndx
,
6760 this->name().c_str());
6763 // Read the symbol information.
6765 template<bool big_endian
>
6767 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6769 // Call parent class to read symbol information.
6770 this->base_read_symbols(sd
);
6772 // If this input file is a binary file, it has no processor
6773 // specific flags and attributes section.
6774 Input_file::Format format
= this->input_file()->format();
6775 if (format
!= Input_file::FORMAT_ELF
)
6777 gold_assert(format
== Input_file::FORMAT_BINARY
);
6778 this->merge_flags_and_attributes_
= false;
6782 // Read processor-specific flags in ELF file header.
6783 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6784 elfcpp::Elf_sizes
<32>::ehdr_size
,
6786 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6787 this->processor_specific_flags_
= ehdr
.get_e_flags();
6789 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6791 std::vector
<unsigned int> deferred_exidx_sections
;
6792 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6793 const unsigned char* pshdrs
= sd
->section_headers
->data();
6794 const unsigned char* ps
= pshdrs
+ shdr_size
;
6795 bool must_merge_flags_and_attributes
= false;
6796 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6798 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6800 // Sometimes an object has no contents except the section name string
6801 // table and an empty symbol table with the undefined symbol. We
6802 // don't want to merge processor-specific flags from such an object.
6803 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6805 // Symbol table is not empty.
6806 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6807 elfcpp::Elf_sizes
<32>::sym_size
;
6808 if (shdr
.get_sh_size() > sym_size
)
6809 must_merge_flags_and_attributes
= true;
6811 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6812 // If this is neither an empty symbol table nor a string table,
6814 must_merge_flags_and_attributes
= true;
6816 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6818 gold_assert(this->attributes_section_data_
== NULL
);
6819 section_offset_type section_offset
= shdr
.get_sh_offset();
6820 section_size_type section_size
=
6821 convert_to_section_size_type(shdr
.get_sh_size());
6822 const unsigned char* view
=
6823 this->get_view(section_offset
, section_size
, true, false);
6824 this->attributes_section_data_
=
6825 new Attributes_section_data(view
, section_size
);
6827 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6829 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6830 if (text_shndx
== elfcpp::SHN_UNDEF
)
6831 deferred_exidx_sections
.push_back(i
);
6834 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6835 + text_shndx
* shdr_size
);
6836 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6838 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6839 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6840 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6841 this->section_name(i
).c_str(), this->name().c_str());
6846 if (!must_merge_flags_and_attributes
)
6848 gold_assert(deferred_exidx_sections
.empty());
6849 this->merge_flags_and_attributes_
= false;
6853 // Some tools are broken and they do not set the link of EXIDX sections.
6854 // We look at the first relocation to figure out the linked sections.
6855 if (!deferred_exidx_sections
.empty())
6857 // We need to go over the section headers again to find the mapping
6858 // from sections being relocated to their relocation sections. This is
6859 // a bit inefficient as we could do that in the loop above. However,
6860 // we do not expect any deferred EXIDX sections normally. So we do not
6861 // want to slow down the most common path.
6862 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6863 Reloc_map reloc_map
;
6864 ps
= pshdrs
+ shdr_size
;
6865 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6867 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6868 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6869 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6871 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6872 if (info_shndx
>= this->shnum())
6873 gold_error(_("relocation section %u has invalid info %u"),
6875 Reloc_map::value_type
value(info_shndx
, i
);
6876 std::pair
<Reloc_map::iterator
, bool> result
=
6877 reloc_map
.insert(value
);
6879 gold_error(_("section %u has multiple relocation sections "
6881 info_shndx
, i
, reloc_map
[info_shndx
]);
6885 // Read the symbol table section header.
6886 const unsigned int symtab_shndx
= this->symtab_shndx();
6887 elfcpp::Shdr
<32, big_endian
>
6888 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6889 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6891 // Read the local symbols.
6892 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6893 const unsigned int loccount
= this->local_symbol_count();
6894 gold_assert(loccount
== symtabshdr
.get_sh_info());
6895 off_t locsize
= loccount
* sym_size
;
6896 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6897 locsize
, true, true);
6899 // Process the deferred EXIDX sections.
6900 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6902 unsigned int shndx
= deferred_exidx_sections
[i
];
6903 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6904 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6905 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6906 if (it
!= reloc_map
.end())
6907 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6908 psyms
, &text_shndx
);
6909 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6910 + text_shndx
* shdr_size
);
6911 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6916 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6917 // sections for unwinding. These sections are referenced implicitly by
6918 // text sections linked in the section headers. If we ignore these implicit
6919 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6920 // will be garbage-collected incorrectly. Hence we override the same function
6921 // in the base class to handle these implicit references.
6923 template<bool big_endian
>
6925 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6927 Read_relocs_data
* rd
)
6929 // First, call base class method to process relocations in this object.
6930 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6932 // If --gc-sections is not specified, there is nothing more to do.
6933 // This happens when --icf is used but --gc-sections is not.
6934 if (!parameters
->options().gc_sections())
6937 unsigned int shnum
= this->shnum();
6938 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6939 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6943 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6944 // to these from the linked text sections.
6945 const unsigned char* ps
= pshdrs
+ shdr_size
;
6946 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6948 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6949 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6951 // Found an .ARM.exidx section, add it to the set of reachable
6952 // sections from its linked text section.
6953 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6954 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6959 // Update output local symbol count. Owing to EXIDX entry merging, some local
6960 // symbols will be removed in output. Adjust output local symbol count
6961 // accordingly. We can only changed the static output local symbol count. It
6962 // is too late to change the dynamic symbols.
6964 template<bool big_endian
>
6966 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6968 // Caller should check that this needs updating. We want caller checking
6969 // because output_local_symbol_count_needs_update() is most likely inlined.
6970 gold_assert(this->output_local_symbol_count_needs_update_
);
6972 gold_assert(this->symtab_shndx() != -1U);
6973 if (this->symtab_shndx() == 0)
6975 // This object has no symbols. Weird but legal.
6979 // Read the symbol table section header.
6980 const unsigned int symtab_shndx
= this->symtab_shndx();
6981 elfcpp::Shdr
<32, big_endian
>
6982 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6983 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6985 // Read the local symbols.
6986 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6987 const unsigned int loccount
= this->local_symbol_count();
6988 gold_assert(loccount
== symtabshdr
.get_sh_info());
6989 off_t locsize
= loccount
* sym_size
;
6990 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6991 locsize
, true, true);
6993 // Loop over the local symbols.
6995 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6997 const Output_sections
& out_sections(this->output_sections());
6998 unsigned int shnum
= this->shnum();
6999 unsigned int count
= 0;
7000 // Skip the first, dummy, symbol.
7002 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
7004 elfcpp::Sym
<32, big_endian
> sym(psyms
);
7006 Symbol_value
<32>& lv((*this->local_values())[i
]);
7008 // This local symbol was already discarded by do_count_local_symbols.
7009 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
7013 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
7018 Output_section
* os
= out_sections
[shndx
];
7020 // This local symbol no longer has an output section. Discard it.
7023 lv
.set_no_output_symtab_entry();
7027 // Currently we only discard parts of EXIDX input sections.
7028 // We explicitly check for a merged EXIDX input section to avoid
7029 // calling Output_section_data::output_offset unless necessary.
7030 if ((this->get_output_section_offset(shndx
) == invalid_address
)
7031 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
7033 section_offset_type output_offset
=
7034 os
->output_offset(this, shndx
, lv
.input_value());
7035 if (output_offset
== -1)
7037 // This symbol is defined in a part of an EXIDX input section
7038 // that is discarded due to entry merging.
7039 lv
.set_no_output_symtab_entry();
7048 this->set_output_local_symbol_count(count
);
7049 this->output_local_symbol_count_needs_update_
= false;
7052 // Arm_dynobj methods.
7054 // Read the symbol information.
7056 template<bool big_endian
>
7058 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
7060 // Call parent class to read symbol information.
7061 this->base_read_symbols(sd
);
7063 // Read processor-specific flags in ELF file header.
7064 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
7065 elfcpp::Elf_sizes
<32>::ehdr_size
,
7067 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
7068 this->processor_specific_flags_
= ehdr
.get_e_flags();
7070 // Read the attributes section if there is one.
7071 // We read from the end because gas seems to put it near the end of
7072 // the section headers.
7073 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7074 const unsigned char* ps
=
7075 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
7076 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
7078 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7079 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
7081 section_offset_type section_offset
= shdr
.get_sh_offset();
7082 section_size_type section_size
=
7083 convert_to_section_size_type(shdr
.get_sh_size());
7084 const unsigned char* view
=
7085 this->get_view(section_offset
, section_size
, true, false);
7086 this->attributes_section_data_
=
7087 new Attributes_section_data(view
, section_size
);
7093 // Stub_addend_reader methods.
7095 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7097 template<bool big_endian
>
7098 elfcpp::Elf_types
<32>::Elf_Swxword
7099 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7100 unsigned int r_type
,
7101 const unsigned char* view
,
7102 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7104 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7108 case elfcpp::R_ARM_CALL
:
7109 case elfcpp::R_ARM_JUMP24
:
7110 case elfcpp::R_ARM_PLT32
:
7112 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7113 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7114 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7115 return Bits
<26>::sign_extend32(val
<< 2);
7118 case elfcpp::R_ARM_THM_CALL
:
7119 case elfcpp::R_ARM_THM_JUMP24
:
7120 case elfcpp::R_ARM_THM_XPC22
:
7122 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7123 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7124 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7125 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7126 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7129 case elfcpp::R_ARM_THM_JUMP19
:
7131 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7132 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7133 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7134 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7135 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7143 // Arm_output_data_got methods.
7145 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7146 // The first one is initialized to be 1, which is the module index for
7147 // the main executable and the second one 0. A reloc of the type
7148 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7149 // be applied by gold. GSYM is a global symbol.
7151 template<bool big_endian
>
7153 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7154 unsigned int got_type
,
7157 if (gsym
->has_got_offset(got_type
))
7160 // We are doing a static link. Just mark it as belong to module 1,
7162 unsigned int got_offset
= this->add_constant(1);
7163 gsym
->set_got_offset(got_type
, got_offset
);
7164 got_offset
= this->add_constant(0);
7165 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7166 elfcpp::R_ARM_TLS_DTPOFF32
,
7170 // Same as the above but for a local symbol.
7172 template<bool big_endian
>
7174 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7175 unsigned int got_type
,
7176 Sized_relobj_file
<32, big_endian
>* object
,
7179 if (object
->local_has_got_offset(index
, got_type
))
7182 // We are doing a static link. Just mark it as belong to module 1,
7184 unsigned int got_offset
= this->add_constant(1);
7185 object
->set_local_got_offset(index
, got_type
, got_offset
);
7186 got_offset
= this->add_constant(0);
7187 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7188 elfcpp::R_ARM_TLS_DTPOFF32
,
7192 template<bool big_endian
>
7194 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7196 // Call parent to write out GOT.
7197 Output_data_got
<32, big_endian
>::do_write(of
);
7199 // We are done if there is no fix up.
7200 if (this->static_relocs_
.empty())
7203 gold_assert(parameters
->doing_static_link());
7205 const off_t offset
= this->offset();
7206 const section_size_type oview_size
=
7207 convert_to_section_size_type(this->data_size());
7208 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7210 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7211 gold_assert(tls_segment
!= NULL
);
7213 // The thread pointer $tp points to the TCB, which is followed by the
7214 // TLS. So we need to adjust $tp relative addressing by this amount.
7215 Arm_address aligned_tcb_size
=
7216 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7218 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7220 Static_reloc
& reloc(this->static_relocs_
[i
]);
7223 if (!reloc
.symbol_is_global())
7225 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7226 const Symbol_value
<32>* psymval
=
7227 reloc
.relobj()->local_symbol(reloc
.index());
7229 // We are doing static linking. Issue an error and skip this
7230 // relocation if the symbol is undefined or in a discarded_section.
7232 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7233 if ((shndx
== elfcpp::SHN_UNDEF
)
7235 && shndx
!= elfcpp::SHN_UNDEF
7236 && !object
->is_section_included(shndx
)
7237 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7239 gold_error(_("undefined or discarded local symbol %u from "
7240 " object %s in GOT"),
7241 reloc
.index(), reloc
.relobj()->name().c_str());
7245 value
= psymval
->value(object
, 0);
7249 const Symbol
* gsym
= reloc
.symbol();
7250 gold_assert(gsym
!= NULL
);
7251 if (gsym
->is_forwarder())
7252 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7254 // We are doing static linking. Issue an error and skip this
7255 // relocation if the symbol is undefined or in a discarded_section
7256 // unless it is a weakly_undefined symbol.
7257 if ((gsym
->is_defined_in_discarded_section()
7258 || gsym
->is_undefined())
7259 && !gsym
->is_weak_undefined())
7261 gold_error(_("undefined or discarded symbol %s in GOT"),
7266 if (!gsym
->is_weak_undefined())
7268 const Sized_symbol
<32>* sym
=
7269 static_cast<const Sized_symbol
<32>*>(gsym
);
7270 value
= sym
->value();
7276 unsigned got_offset
= reloc
.got_offset();
7277 gold_assert(got_offset
< oview_size
);
7279 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7280 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7282 switch (reloc
.r_type())
7284 case elfcpp::R_ARM_TLS_DTPOFF32
:
7287 case elfcpp::R_ARM_TLS_TPOFF32
:
7288 x
= value
+ aligned_tcb_size
;
7293 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7296 of
->write_output_view(offset
, oview_size
, oview
);
7299 // A class to handle the PLT data.
7300 // This is an abstract base class that handles most of the linker details
7301 // but does not know the actual contents of PLT entries. The derived
7302 // classes below fill in those details.
7304 template<bool big_endian
>
7305 class Output_data_plt_arm
: public Output_section_data
7308 // Unlike aarch64, which records symbol value in "addend" field of relocations
7309 // and could be done at the same time an IRelative reloc is created for the
7310 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7311 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7312 // to keep necessary symbol information for later use in do_write. We usually
7313 // have only a very limited number of ifuncs, so the extra data required here
7316 struct IRelative_data
7318 IRelative_data(Sized_symbol
<32>* sized_symbol
)
7319 : symbol_is_global_(true)
7321 u_
.global
= sized_symbol
;
7324 IRelative_data(Sized_relobj_file
<32, big_endian
>* relobj
,
7326 : symbol_is_global_(false)
7328 u_
.local
.relobj
= relobj
;
7329 u_
.local
.index
= index
;
7334 Sized_symbol
<32>* global
;
7338 Sized_relobj_file
<32, big_endian
>* relobj
;
7343 bool symbol_is_global_
;
7346 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7349 Output_data_plt_arm(Layout
* layout
, uint64_t addralign
,
7350 Arm_output_data_got
<big_endian
>* got
,
7351 Output_data_space
* got_plt
,
7352 Output_data_space
* got_irelative
);
7354 // Add an entry to the PLT.
7356 add_entry(Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
);
7358 // Add the relocation for a plt entry.
7360 add_relocation(Symbol_table
* symtab
, Layout
* layout
,
7361 Symbol
* gsym
, unsigned int got_offset
);
7363 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7365 add_local_ifunc_entry(Symbol_table
* symtab
, Layout
*,
7366 Sized_relobj_file
<32, big_endian
>* relobj
,
7367 unsigned int local_sym_index
);
7369 // Return the .rel.plt section data.
7370 const Reloc_section
*
7372 { return this->rel_
; }
7374 // Return the PLT relocation container for IRELATIVE.
7376 rel_irelative(Symbol_table
*, Layout
*);
7378 // Return the number of PLT entries.
7381 { return this->count_
+ this->irelative_count_
; }
7383 // Return the offset of the first non-reserved PLT entry.
7385 first_plt_entry_offset() const
7386 { return this->do_first_plt_entry_offset(); }
7388 // Return the size of a PLT entry.
7390 get_plt_entry_size() const
7391 { return this->do_get_plt_entry_size(); }
7393 // Return the PLT address for globals.
7395 address_for_global(const Symbol
*) const;
7397 // Return the PLT address for locals.
7399 address_for_local(const Relobj
*, unsigned int symndx
) const;
7402 // Fill in the first PLT entry.
7404 fill_first_plt_entry(unsigned char* pov
,
7405 Arm_address got_address
,
7406 Arm_address plt_address
)
7407 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7410 fill_plt_entry(unsigned char* pov
,
7411 Arm_address got_address
,
7412 Arm_address plt_address
,
7413 unsigned int got_offset
,
7414 unsigned int plt_offset
)
7415 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7417 virtual unsigned int
7418 do_first_plt_entry_offset() const = 0;
7420 virtual unsigned int
7421 do_get_plt_entry_size() const = 0;
7424 do_fill_first_plt_entry(unsigned char* pov
,
7425 Arm_address got_address
,
7426 Arm_address plt_address
) = 0;
7429 do_fill_plt_entry(unsigned char* pov
,
7430 Arm_address got_address
,
7431 Arm_address plt_address
,
7432 unsigned int got_offset
,
7433 unsigned int plt_offset
) = 0;
7436 do_adjust_output_section(Output_section
* os
);
7438 // Write to a map file.
7440 do_print_to_mapfile(Mapfile
* mapfile
) const
7441 { mapfile
->print_output_data(this, _("** PLT")); }
7444 // Set the final size.
7446 set_final_data_size()
7448 this->set_data_size(this->first_plt_entry_offset()
7449 + ((this->count_
+ this->irelative_count_
)
7450 * this->get_plt_entry_size()));
7453 // Write out the PLT data.
7455 do_write(Output_file
*);
7457 // Record irelative symbol data.
7458 void insert_irelative_data(const IRelative_data
& idata
)
7459 { irelative_data_vec_
.push_back(idata
); }
7461 // The reloc section.
7462 Reloc_section
* rel_
;
7463 // The IRELATIVE relocs, if necessary. These must follow the
7464 // regular PLT relocations.
7465 Reloc_section
* irelative_rel_
;
7466 // The .got section.
7467 Arm_output_data_got
<big_endian
>* got_
;
7468 // The .got.plt section.
7469 Output_data_space
* got_plt_
;
7470 // The part of the .got.plt section used for IRELATIVE relocs.
7471 Output_data_space
* got_irelative_
;
7472 // The number of PLT entries.
7473 unsigned int count_
;
7474 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7475 // follow the regular PLT entries.
7476 unsigned int irelative_count_
;
7477 // Vector for irelative data.
7478 typedef std::vector
<IRelative_data
> IRelative_data_vec
;
7479 IRelative_data_vec irelative_data_vec_
;
7482 // Create the PLT section. The ordinary .got section is an argument,
7483 // since we need to refer to the start. We also create our own .got
7484 // section just for PLT entries.
7486 template<bool big_endian
>
7487 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(
7488 Layout
* layout
, uint64_t addralign
,
7489 Arm_output_data_got
<big_endian
>* got
,
7490 Output_data_space
* got_plt
,
7491 Output_data_space
* got_irelative
)
7492 : Output_section_data(addralign
), irelative_rel_(NULL
),
7493 got_(got
), got_plt_(got_plt
), got_irelative_(got_irelative
),
7494 count_(0), irelative_count_(0)
7496 this->rel_
= new Reloc_section(false);
7497 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7498 elfcpp::SHF_ALLOC
, this->rel_
,
7499 ORDER_DYNAMIC_PLT_RELOCS
, false);
7502 template<bool big_endian
>
7504 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7509 // Add an entry to the PLT.
7511 template<bool big_endian
>
7513 Output_data_plt_arm
<big_endian
>::add_entry(Symbol_table
* symtab
,
7517 gold_assert(!gsym
->has_plt_offset());
7519 unsigned int* entry_count
;
7520 Output_section_data_build
* got
;
7522 // We have 2 different types of plt entry here, normal and ifunc.
7524 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7525 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7527 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7528 // second 12, third 24 ... etc.
7530 // IFunc plt entries *always* come after *normal* plt entries.
7532 // Notice, when computing the plt address of a certain symbol, "plt_address +
7533 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7534 // target->plt_address_for_local() instead.
7536 int begin_offset
= 0;
7537 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7538 && gsym
->can_use_relative_reloc(false))
7540 entry_count
= &this->irelative_count_
;
7541 got
= this->got_irelative_
;
7542 // For irelative plt entries, offset is relative to the end of normal plt
7543 // entries, so it starts from 0.
7545 // Record symbol information.
7546 this->insert_irelative_data(
7547 IRelative_data(symtab
->get_sized_symbol
<32>(gsym
)));
7551 entry_count
= &this->count_
;
7552 got
= this->got_plt_
;
7553 // Note that for normal plt entries, when setting the PLT offset we skip
7554 // the initial reserved PLT entry.
7555 begin_offset
= this->first_plt_entry_offset();
7558 gsym
->set_plt_offset(begin_offset
7559 + (*entry_count
) * this->get_plt_entry_size());
7563 section_offset_type got_offset
= got
->current_data_size();
7565 // Every PLT entry needs a GOT entry which points back to the PLT
7566 // entry (this will be changed by the dynamic linker, normally
7567 // lazily when the function is called).
7568 got
->set_current_data_size(got_offset
+ 4);
7570 // Every PLT entry needs a reloc.
7571 this->add_relocation(symtab
, layout
, gsym
, got_offset
);
7573 // Note that we don't need to save the symbol. The contents of the
7574 // PLT are independent of which symbols are used. The symbols only
7575 // appear in the relocations.
7578 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7581 template<bool big_endian
>
7583 Output_data_plt_arm
<big_endian
>::add_local_ifunc_entry(
7584 Symbol_table
* symtab
,
7586 Sized_relobj_file
<32, big_endian
>* relobj
,
7587 unsigned int local_sym_index
)
7589 this->insert_irelative_data(IRelative_data(relobj
, local_sym_index
));
7591 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7592 // no longer correct. Use target->plt_address_for_local() instead.
7593 unsigned int plt_offset
= this->irelative_count_
* this->get_plt_entry_size();
7594 ++this->irelative_count_
;
7596 section_offset_type got_offset
= this->got_irelative_
->current_data_size();
7598 // Every PLT entry needs a GOT entry which points back to the PLT
7600 this->got_irelative_
->set_current_data_size(got_offset
+ 4);
7603 // Every PLT entry needs a reloc.
7604 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7605 rel
->add_symbolless_local_addend(relobj
, local_sym_index
,
7606 elfcpp::R_ARM_IRELATIVE
,
7607 this->got_irelative_
, got_offset
);
7612 // Add the relocation for a PLT entry.
7614 template<bool big_endian
>
7616 Output_data_plt_arm
<big_endian
>::add_relocation(
7617 Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
, unsigned int got_offset
)
7619 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7620 && gsym
->can_use_relative_reloc(false))
7622 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7623 rel
->add_symbolless_global_addend(gsym
, elfcpp::R_ARM_IRELATIVE
,
7624 this->got_irelative_
, got_offset
);
7628 gsym
->set_needs_dynsym_entry();
7629 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7635 // Create the irelative relocation data.
7637 template<bool big_endian
>
7638 typename Output_data_plt_arm
<big_endian
>::Reloc_section
*
7639 Output_data_plt_arm
<big_endian
>::rel_irelative(Symbol_table
* symtab
,
7642 if (this->irelative_rel_
== NULL
)
7644 // Since irelative relocations goes into 'rel.dyn', we delegate the
7645 // creation of irelative_rel_ to where rel_dyn section gets created.
7646 Target_arm
<big_endian
>* arm_target
=
7647 Target_arm
<big_endian
>::default_target();
7648 this->irelative_rel_
= arm_target
->rel_irelative_section(layout
);
7650 // Make sure we have a place for the TLSDESC relocations, in
7651 // case we see any later on.
7652 // this->rel_tlsdesc(layout);
7653 if (parameters
->doing_static_link())
7655 // A statically linked executable will only have a .rel.plt section to
7656 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7657 // will use these symbols to locate the IRELATIVE relocs at program
7659 symtab
->define_in_output_data("__rel_iplt_start", NULL
,
7660 Symbol_table::PREDEFINED
,
7661 this->irelative_rel_
, 0, 0,
7662 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7663 elfcpp::STV_HIDDEN
, 0, false, true);
7664 symtab
->define_in_output_data("__rel_iplt_end", NULL
,
7665 Symbol_table::PREDEFINED
,
7666 this->irelative_rel_
, 0, 0,
7667 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7668 elfcpp::STV_HIDDEN
, 0, true, true);
7671 return this->irelative_rel_
;
7675 // Return the PLT address for a global symbol.
7677 template<bool big_endian
>
7679 Output_data_plt_arm
<big_endian
>::address_for_global(const Symbol
* gsym
) const
7681 uint64_t begin_offset
= 0;
7682 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7683 && gsym
->can_use_relative_reloc(false))
7685 begin_offset
= (this->first_plt_entry_offset() +
7686 this->count_
* this->get_plt_entry_size());
7688 return this->address() + begin_offset
+ gsym
->plt_offset();
7692 // Return the PLT address for a local symbol. These are always
7693 // IRELATIVE relocs.
7695 template<bool big_endian
>
7697 Output_data_plt_arm
<big_endian
>::address_for_local(
7698 const Relobj
* object
,
7699 unsigned int r_sym
) const
7701 return (this->address()
7702 + this->first_plt_entry_offset()
7703 + this->count_
* this->get_plt_entry_size()
7704 + object
->local_plt_offset(r_sym
));
7708 template<bool big_endian
>
7709 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7712 Output_data_plt_arm_standard(Layout
* layout
,
7713 Arm_output_data_got
<big_endian
>* got
,
7714 Output_data_space
* got_plt
,
7715 Output_data_space
* got_irelative
)
7716 : Output_data_plt_arm
<big_endian
>(layout
, 4, got
, got_plt
, got_irelative
)
7720 // Return the offset of the first non-reserved PLT entry.
7721 virtual unsigned int
7722 do_first_plt_entry_offset() const
7723 { return sizeof(first_plt_entry
); }
7726 do_fill_first_plt_entry(unsigned char* pov
,
7727 Arm_address got_address
,
7728 Arm_address plt_address
);
7731 // Template for the first PLT entry.
7732 static const uint32_t first_plt_entry
[5];
7736 // FIXME: This is not very flexible. Right now this has only been tested
7737 // on armv5te. If we are to support additional architecture features like
7738 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7740 // The first entry in the PLT.
7741 template<bool big_endian
>
7742 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7744 0xe52de004, // str lr, [sp, #-4]!
7745 0xe59fe004, // ldr lr, [pc, #4]
7746 0xe08fe00e, // add lr, pc, lr
7747 0xe5bef008, // ldr pc, [lr, #8]!
7748 0x00000000, // &GOT[0] - .
7751 template<bool big_endian
>
7753 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7755 Arm_address got_address
,
7756 Arm_address plt_address
)
7758 // Write first PLT entry. All but the last word are constants.
7759 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7760 / sizeof(first_plt_entry
[0]));
7761 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7762 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7763 // Last word in first PLT entry is &GOT[0] - .
7764 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7765 got_address
- (plt_address
+ 16));
7768 // Subsequent entries in the PLT.
7769 // This class generates short (12-byte) entries, for displacements up to 2^28.
7771 template<bool big_endian
>
7772 class Output_data_plt_arm_short
: public Output_data_plt_arm_standard
<big_endian
>
7775 Output_data_plt_arm_short(Layout
* layout
,
7776 Arm_output_data_got
<big_endian
>* got
,
7777 Output_data_space
* got_plt
,
7778 Output_data_space
* got_irelative
)
7779 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7783 // Return the size of a PLT entry.
7784 virtual unsigned int
7785 do_get_plt_entry_size() const
7786 { return sizeof(plt_entry
); }
7789 do_fill_plt_entry(unsigned char* pov
,
7790 Arm_address got_address
,
7791 Arm_address plt_address
,
7792 unsigned int got_offset
,
7793 unsigned int plt_offset
);
7796 // Template for subsequent PLT entries.
7797 static const uint32_t plt_entry
[3];
7800 template<bool big_endian
>
7801 const uint32_t Output_data_plt_arm_short
<big_endian
>::plt_entry
[3] =
7803 0xe28fc600, // add ip, pc, #0xNN00000
7804 0xe28cca00, // add ip, ip, #0xNN000
7805 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7808 template<bool big_endian
>
7810 Output_data_plt_arm_short
<big_endian
>::do_fill_plt_entry(
7812 Arm_address got_address
,
7813 Arm_address plt_address
,
7814 unsigned int got_offset
,
7815 unsigned int plt_offset
)
7817 int32_t offset
= ((got_address
+ got_offset
)
7818 - (plt_address
+ plt_offset
+ 8));
7819 if (offset
< 0 || offset
> 0x0fffffff)
7820 gold_error(_("PLT offset too large, try linking with --long-plt"));
7822 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7823 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7824 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7825 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7826 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7827 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7830 // This class generates long (16-byte) entries, for arbitrary displacements.
7832 template<bool big_endian
>
7833 class Output_data_plt_arm_long
: public Output_data_plt_arm_standard
<big_endian
>
7836 Output_data_plt_arm_long(Layout
* layout
,
7837 Arm_output_data_got
<big_endian
>* got
,
7838 Output_data_space
* got_plt
,
7839 Output_data_space
* got_irelative
)
7840 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7844 // Return the size of a PLT entry.
7845 virtual unsigned int
7846 do_get_plt_entry_size() const
7847 { return sizeof(plt_entry
); }
7850 do_fill_plt_entry(unsigned char* pov
,
7851 Arm_address got_address
,
7852 Arm_address plt_address
,
7853 unsigned int got_offset
,
7854 unsigned int plt_offset
);
7857 // Template for subsequent PLT entries.
7858 static const uint32_t plt_entry
[4];
7861 template<bool big_endian
>
7862 const uint32_t Output_data_plt_arm_long
<big_endian
>::plt_entry
[4] =
7864 0xe28fc200, // add ip, pc, #0xN0000000
7865 0xe28cc600, // add ip, ip, #0xNN00000
7866 0xe28cca00, // add ip, ip, #0xNN000
7867 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7870 template<bool big_endian
>
7872 Output_data_plt_arm_long
<big_endian
>::do_fill_plt_entry(
7874 Arm_address got_address
,
7875 Arm_address plt_address
,
7876 unsigned int got_offset
,
7877 unsigned int plt_offset
)
7879 int32_t offset
= ((got_address
+ got_offset
)
7880 - (plt_address
+ plt_offset
+ 8));
7882 uint32_t plt_insn0
= plt_entry
[0] | (offset
>> 28);
7883 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7884 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 20) & 0xff);
7885 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7886 uint32_t plt_insn2
= plt_entry
[2] | ((offset
>> 12) & 0xff);
7887 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7888 uint32_t plt_insn3
= plt_entry
[3] | (offset
& 0xfff);
7889 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 12, plt_insn3
);
7892 // Write out the PLT. This uses the hand-coded instructions above,
7893 // and adjusts them as needed. This is all specified by the arm ELF
7894 // Processor Supplement.
7896 template<bool big_endian
>
7898 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7900 const off_t offset
= this->offset();
7901 const section_size_type oview_size
=
7902 convert_to_section_size_type(this->data_size());
7903 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7905 const off_t got_file_offset
= this->got_plt_
->offset();
7906 gold_assert(got_file_offset
+ this->got_plt_
->data_size()
7907 == this->got_irelative_
->offset());
7908 const section_size_type got_size
=
7909 convert_to_section_size_type(this->got_plt_
->data_size()
7910 + this->got_irelative_
->data_size());
7911 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7913 unsigned char* pov
= oview
;
7915 Arm_address plt_address
= this->address();
7916 Arm_address got_address
= this->got_plt_
->address();
7918 // Write first PLT entry.
7919 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
7920 pov
+= this->first_plt_entry_offset();
7922 unsigned char* got_pov
= got_view
;
7924 memset(got_pov
, 0, 12);
7927 unsigned int plt_offset
= this->first_plt_entry_offset();
7928 unsigned int got_offset
= 12;
7929 const unsigned int count
= this->count_
+ this->irelative_count_
;
7930 gold_assert(this->irelative_count_
== this->irelative_data_vec_
.size());
7931 for (unsigned int i
= 0;
7934 pov
+= this->get_plt_entry_size(),
7936 plt_offset
+= this->get_plt_entry_size(),
7939 // Set and adjust the PLT entry itself.
7940 this->fill_plt_entry(pov
, got_address
, plt_address
,
7941 got_offset
, plt_offset
);
7944 if (i
< this->count_
)
7946 // For non-irelative got entries, the value is the beginning of plt.
7947 value
= plt_address
;
7951 // For irelative got entries, the value is the (global/local) symbol
7953 const IRelative_data
& idata
=
7954 this->irelative_data_vec_
[i
- this->count_
];
7955 if (idata
.symbol_is_global_
)
7957 // Set the entry in the GOT for irelative symbols. The content is
7958 // the address of the ifunc, not the address of plt start.
7959 const Sized_symbol
<32>* sized_symbol
= idata
.u_
.global
;
7960 gold_assert(sized_symbol
->type() == elfcpp::STT_GNU_IFUNC
);
7961 value
= sized_symbol
->value();
7965 value
= idata
.u_
.local
.relobj
->local_symbol_value(
7966 idata
.u_
.local
.index
, 0);
7969 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, value
);
7972 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7973 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7975 of
->write_output_view(offset
, oview_size
, oview
);
7976 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7980 // Create a PLT entry for a global symbol.
7982 template<bool big_endian
>
7984 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7987 if (gsym
->has_plt_offset())
7990 if (this->plt_
== NULL
)
7991 this->make_plt_section(symtab
, layout
);
7993 this->plt_
->add_entry(symtab
, layout
, gsym
);
7997 // Create the PLT section.
7998 template<bool big_endian
>
8000 Target_arm
<big_endian
>::make_plt_section(
8001 Symbol_table
* symtab
, Layout
* layout
)
8003 if (this->plt_
== NULL
)
8005 // Create the GOT section first.
8006 this->got_section(symtab
, layout
);
8008 // GOT for irelatives is create along with got.plt.
8009 gold_assert(this->got_
!= NULL
8010 && this->got_plt_
!= NULL
8011 && this->got_irelative_
!= NULL
);
8012 this->plt_
= this->make_data_plt(layout
, this->got_
, this->got_plt_
,
8013 this->got_irelative_
);
8015 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
8017 | elfcpp::SHF_EXECINSTR
),
8018 this->plt_
, ORDER_PLT
, false);
8019 symtab
->define_in_output_data("$a", NULL
,
8020 Symbol_table::PREDEFINED
,
8022 0, 0, elfcpp::STT_NOTYPE
,
8024 elfcpp::STV_DEFAULT
, 0,
8030 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
8032 template<bool big_endian
>
8034 Target_arm
<big_endian
>::make_local_ifunc_plt_entry(
8035 Symbol_table
* symtab
, Layout
* layout
,
8036 Sized_relobj_file
<32, big_endian
>* relobj
,
8037 unsigned int local_sym_index
)
8039 if (relobj
->local_has_plt_offset(local_sym_index
))
8041 if (this->plt_
== NULL
)
8042 this->make_plt_section(symtab
, layout
);
8043 unsigned int plt_offset
= this->plt_
->add_local_ifunc_entry(symtab
, layout
,
8046 relobj
->set_local_plt_offset(local_sym_index
, plt_offset
);
8050 // Return the number of entries in the PLT.
8052 template<bool big_endian
>
8054 Target_arm
<big_endian
>::plt_entry_count() const
8056 if (this->plt_
== NULL
)
8058 return this->plt_
->entry_count();
8061 // Return the offset of the first non-reserved PLT entry.
8063 template<bool big_endian
>
8065 Target_arm
<big_endian
>::first_plt_entry_offset() const
8067 return this->plt_
->first_plt_entry_offset();
8070 // Return the size of each PLT entry.
8072 template<bool big_endian
>
8074 Target_arm
<big_endian
>::plt_entry_size() const
8076 return this->plt_
->get_plt_entry_size();
8079 // Get the section to use for TLS_DESC relocations.
8081 template<bool big_endian
>
8082 typename Target_arm
<big_endian
>::Reloc_section
*
8083 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
8085 return this->plt_section()->rel_tls_desc(layout
);
8088 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8090 template<bool big_endian
>
8092 Target_arm
<big_endian
>::define_tls_base_symbol(
8093 Symbol_table
* symtab
,
8096 if (this->tls_base_symbol_defined_
)
8099 Output_segment
* tls_segment
= layout
->tls_segment();
8100 if (tls_segment
!= NULL
)
8102 bool is_exec
= parameters
->options().output_is_executable();
8103 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
8104 Symbol_table::PREDEFINED
,
8108 elfcpp::STV_HIDDEN
, 0,
8110 ? Symbol::SEGMENT_END
8111 : Symbol::SEGMENT_START
),
8114 this->tls_base_symbol_defined_
= true;
8117 // Create a GOT entry for the TLS module index.
8119 template<bool big_endian
>
8121 Target_arm
<big_endian
>::got_mod_index_entry(
8122 Symbol_table
* symtab
,
8124 Sized_relobj_file
<32, big_endian
>* object
)
8126 if (this->got_mod_index_offset_
== -1U)
8128 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
8129 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
8130 unsigned int got_offset
;
8131 if (!parameters
->doing_static_link())
8133 got_offset
= got
->add_constant(0);
8134 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
8135 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
8140 // We are doing a static link. Just mark it as belong to module 1,
8142 got_offset
= got
->add_constant(1);
8145 got
->add_constant(0);
8146 this->got_mod_index_offset_
= got_offset
;
8148 return this->got_mod_index_offset_
;
8151 // Optimize the TLS relocation type based on what we know about the
8152 // symbol. IS_FINAL is true if the final address of this symbol is
8153 // known at link time.
8155 template<bool big_endian
>
8156 tls::Tls_optimization
8157 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
8159 // FIXME: Currently we do not do any TLS optimization.
8160 return tls::TLSOPT_NONE
;
8163 // Get the Reference_flags for a particular relocation.
8165 template<bool big_endian
>
8167 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
8171 case elfcpp::R_ARM_NONE
:
8172 case elfcpp::R_ARM_V4BX
:
8173 case elfcpp::R_ARM_GNU_VTENTRY
:
8174 case elfcpp::R_ARM_GNU_VTINHERIT
:
8175 // No symbol reference.
8178 case elfcpp::R_ARM_ABS32
:
8179 case elfcpp::R_ARM_ABS16
:
8180 case elfcpp::R_ARM_ABS12
:
8181 case elfcpp::R_ARM_THM_ABS5
:
8182 case elfcpp::R_ARM_ABS8
:
8183 case elfcpp::R_ARM_BASE_ABS
:
8184 case elfcpp::R_ARM_MOVW_ABS_NC
:
8185 case elfcpp::R_ARM_MOVT_ABS
:
8186 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8187 case elfcpp::R_ARM_THM_MOVT_ABS
:
8188 case elfcpp::R_ARM_ABS32_NOI
:
8189 return Symbol::ABSOLUTE_REF
;
8191 case elfcpp::R_ARM_REL32
:
8192 case elfcpp::R_ARM_LDR_PC_G0
:
8193 case elfcpp::R_ARM_SBREL32
:
8194 case elfcpp::R_ARM_THM_PC8
:
8195 case elfcpp::R_ARM_BASE_PREL
:
8196 case elfcpp::R_ARM_MOVW_PREL_NC
:
8197 case elfcpp::R_ARM_MOVT_PREL
:
8198 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8199 case elfcpp::R_ARM_THM_MOVT_PREL
:
8200 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8201 case elfcpp::R_ARM_THM_PC12
:
8202 case elfcpp::R_ARM_REL32_NOI
:
8203 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8204 case elfcpp::R_ARM_ALU_PC_G0
:
8205 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8206 case elfcpp::R_ARM_ALU_PC_G1
:
8207 case elfcpp::R_ARM_ALU_PC_G2
:
8208 case elfcpp::R_ARM_LDR_PC_G1
:
8209 case elfcpp::R_ARM_LDR_PC_G2
:
8210 case elfcpp::R_ARM_LDRS_PC_G0
:
8211 case elfcpp::R_ARM_LDRS_PC_G1
:
8212 case elfcpp::R_ARM_LDRS_PC_G2
:
8213 case elfcpp::R_ARM_LDC_PC_G0
:
8214 case elfcpp::R_ARM_LDC_PC_G1
:
8215 case elfcpp::R_ARM_LDC_PC_G2
:
8216 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8217 case elfcpp::R_ARM_ALU_SB_G0
:
8218 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8219 case elfcpp::R_ARM_ALU_SB_G1
:
8220 case elfcpp::R_ARM_ALU_SB_G2
:
8221 case elfcpp::R_ARM_LDR_SB_G0
:
8222 case elfcpp::R_ARM_LDR_SB_G1
:
8223 case elfcpp::R_ARM_LDR_SB_G2
:
8224 case elfcpp::R_ARM_LDRS_SB_G0
:
8225 case elfcpp::R_ARM_LDRS_SB_G1
:
8226 case elfcpp::R_ARM_LDRS_SB_G2
:
8227 case elfcpp::R_ARM_LDC_SB_G0
:
8228 case elfcpp::R_ARM_LDC_SB_G1
:
8229 case elfcpp::R_ARM_LDC_SB_G2
:
8230 case elfcpp::R_ARM_MOVW_BREL_NC
:
8231 case elfcpp::R_ARM_MOVT_BREL
:
8232 case elfcpp::R_ARM_MOVW_BREL
:
8233 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8234 case elfcpp::R_ARM_THM_MOVT_BREL
:
8235 case elfcpp::R_ARM_THM_MOVW_BREL
:
8236 case elfcpp::R_ARM_GOTOFF32
:
8237 case elfcpp::R_ARM_GOTOFF12
:
8238 case elfcpp::R_ARM_SBREL31
:
8239 return Symbol::RELATIVE_REF
;
8241 case elfcpp::R_ARM_PLT32
:
8242 case elfcpp::R_ARM_CALL
:
8243 case elfcpp::R_ARM_JUMP24
:
8244 case elfcpp::R_ARM_THM_CALL
:
8245 case elfcpp::R_ARM_THM_JUMP24
:
8246 case elfcpp::R_ARM_THM_JUMP19
:
8247 case elfcpp::R_ARM_THM_JUMP6
:
8248 case elfcpp::R_ARM_THM_JUMP11
:
8249 case elfcpp::R_ARM_THM_JUMP8
:
8250 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8251 // in unwind tables. It may point to functions via PLTs.
8252 // So we treat it like call/jump relocations above.
8253 case elfcpp::R_ARM_PREL31
:
8254 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
8256 case elfcpp::R_ARM_GOT_BREL
:
8257 case elfcpp::R_ARM_GOT_ABS
:
8258 case elfcpp::R_ARM_GOT_PREL
:
8260 return Symbol::ABSOLUTE_REF
;
8262 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8263 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8264 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8265 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8266 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8267 return Symbol::TLS_REF
;
8269 case elfcpp::R_ARM_TARGET1
:
8270 case elfcpp::R_ARM_TARGET2
:
8271 case elfcpp::R_ARM_COPY
:
8272 case elfcpp::R_ARM_GLOB_DAT
:
8273 case elfcpp::R_ARM_JUMP_SLOT
:
8274 case elfcpp::R_ARM_RELATIVE
:
8275 case elfcpp::R_ARM_PC24
:
8276 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8277 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8278 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8280 // Not expected. We will give an error later.
8285 // Report an unsupported relocation against a local symbol.
8287 template<bool big_endian
>
8289 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
8290 Sized_relobj_file
<32, big_endian
>* object
,
8291 unsigned int r_type
)
8293 gold_error(_("%s: unsupported reloc %u against local symbol"),
8294 object
->name().c_str(), r_type
);
8297 // We are about to emit a dynamic relocation of type R_TYPE. If the
8298 // dynamic linker does not support it, issue an error. The GNU linker
8299 // only issues a non-PIC error for an allocated read-only section.
8300 // Here we know the section is allocated, but we don't know that it is
8301 // read-only. But we check for all the relocation types which the
8302 // glibc dynamic linker supports, so it seems appropriate to issue an
8303 // error even if the section is not read-only.
8305 template<bool big_endian
>
8307 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
8308 unsigned int r_type
)
8312 // These are the relocation types supported by glibc for ARM.
8313 case elfcpp::R_ARM_RELATIVE
:
8314 case elfcpp::R_ARM_COPY
:
8315 case elfcpp::R_ARM_GLOB_DAT
:
8316 case elfcpp::R_ARM_JUMP_SLOT
:
8317 case elfcpp::R_ARM_ABS32
:
8318 case elfcpp::R_ARM_ABS32_NOI
:
8319 case elfcpp::R_ARM_IRELATIVE
:
8320 case elfcpp::R_ARM_PC24
:
8321 // FIXME: The following 3 types are not supported by Android's dynamic
8323 case elfcpp::R_ARM_TLS_DTPMOD32
:
8324 case elfcpp::R_ARM_TLS_DTPOFF32
:
8325 case elfcpp::R_ARM_TLS_TPOFF32
:
8330 // This prevents us from issuing more than one error per reloc
8331 // section. But we can still wind up issuing more than one
8332 // error per object file.
8333 if (this->issued_non_pic_error_
)
8335 const Arm_reloc_property
* reloc_property
=
8336 arm_reloc_property_table
->get_reloc_property(r_type
);
8337 gold_assert(reloc_property
!= NULL
);
8338 object
->error(_("requires unsupported dynamic reloc %s; "
8339 "recompile with -fPIC"),
8340 reloc_property
->name().c_str());
8341 this->issued_non_pic_error_
= true;
8345 case elfcpp::R_ARM_NONE
:
8351 // Return whether we need to make a PLT entry for a relocation of the
8352 // given type against a STT_GNU_IFUNC symbol.
8354 template<bool big_endian
>
8356 Target_arm
<big_endian
>::Scan::reloc_needs_plt_for_ifunc(
8357 Sized_relobj_file
<32, big_endian
>* object
,
8358 unsigned int r_type
)
8360 int flags
= Scan::get_reference_flags(r_type
);
8361 if (flags
& Symbol::TLS_REF
)
8363 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8364 object
->name().c_str(), r_type
);
8371 // Scan a relocation for a local symbol.
8372 // FIXME: This only handles a subset of relocation types used by Android
8373 // on ARM v5te devices.
8375 template<bool big_endian
>
8377 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
8380 Sized_relobj_file
<32, big_endian
>* object
,
8381 unsigned int data_shndx
,
8382 Output_section
* output_section
,
8383 const elfcpp::Rel
<32, big_endian
>& reloc
,
8384 unsigned int r_type
,
8385 const elfcpp::Sym
<32, big_endian
>& lsym
,
8391 r_type
= get_real_reloc_type(r_type
);
8393 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8394 bool is_ifunc
= lsym
.get_st_type() == elfcpp::STT_GNU_IFUNC
;
8395 if (is_ifunc
&& this->reloc_needs_plt_for_ifunc(object
, r_type
))
8397 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8398 target
->make_local_ifunc_plt_entry(symtab
, layout
, object
, r_sym
);
8403 case elfcpp::R_ARM_NONE
:
8404 case elfcpp::R_ARM_V4BX
:
8405 case elfcpp::R_ARM_GNU_VTENTRY
:
8406 case elfcpp::R_ARM_GNU_VTINHERIT
:
8409 case elfcpp::R_ARM_ABS32
:
8410 case elfcpp::R_ARM_ABS32_NOI
:
8411 // If building a shared library (or a position-independent
8412 // executable), we need to create a dynamic relocation for
8413 // this location. The relocation applied at link time will
8414 // apply the link-time value, so we flag the location with
8415 // an R_ARM_RELATIVE relocation so the dynamic loader can
8416 // relocate it easily.
8417 if (parameters
->options().output_is_position_independent())
8419 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8420 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8421 // If we are to add more other reloc types than R_ARM_ABS32,
8422 // we need to add check_non_pic(object, r_type) here.
8423 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
8424 output_section
, data_shndx
,
8425 reloc
.get_r_offset(), is_ifunc
);
8429 case elfcpp::R_ARM_ABS16
:
8430 case elfcpp::R_ARM_ABS12
:
8431 case elfcpp::R_ARM_THM_ABS5
:
8432 case elfcpp::R_ARM_ABS8
:
8433 case elfcpp::R_ARM_BASE_ABS
:
8434 case elfcpp::R_ARM_MOVW_ABS_NC
:
8435 case elfcpp::R_ARM_MOVT_ABS
:
8436 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8437 case elfcpp::R_ARM_THM_MOVT_ABS
:
8438 // If building a shared library (or a position-independent
8439 // executable), we need to create a dynamic relocation for
8440 // this location. Because the addend needs to remain in the
8441 // data section, we need to be careful not to apply this
8442 // relocation statically.
8443 if (parameters
->options().output_is_position_independent())
8445 check_non_pic(object
, r_type
);
8446 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8447 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8448 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
8449 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
8450 data_shndx
, reloc
.get_r_offset());
8453 gold_assert(lsym
.get_st_value() == 0);
8454 unsigned int shndx
= lsym
.get_st_shndx();
8456 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
8459 object
->error(_("section symbol %u has bad shndx %u"),
8462 rel_dyn
->add_local_section(object
, shndx
,
8463 r_type
, output_section
,
8464 data_shndx
, reloc
.get_r_offset());
8469 case elfcpp::R_ARM_REL32
:
8470 case elfcpp::R_ARM_LDR_PC_G0
:
8471 case elfcpp::R_ARM_SBREL32
:
8472 case elfcpp::R_ARM_THM_CALL
:
8473 case elfcpp::R_ARM_THM_PC8
:
8474 case elfcpp::R_ARM_BASE_PREL
:
8475 case elfcpp::R_ARM_PLT32
:
8476 case elfcpp::R_ARM_CALL
:
8477 case elfcpp::R_ARM_JUMP24
:
8478 case elfcpp::R_ARM_THM_JUMP24
:
8479 case elfcpp::R_ARM_SBREL31
:
8480 case elfcpp::R_ARM_PREL31
:
8481 case elfcpp::R_ARM_MOVW_PREL_NC
:
8482 case elfcpp::R_ARM_MOVT_PREL
:
8483 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8484 case elfcpp::R_ARM_THM_MOVT_PREL
:
8485 case elfcpp::R_ARM_THM_JUMP19
:
8486 case elfcpp::R_ARM_THM_JUMP6
:
8487 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8488 case elfcpp::R_ARM_THM_PC12
:
8489 case elfcpp::R_ARM_REL32_NOI
:
8490 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8491 case elfcpp::R_ARM_ALU_PC_G0
:
8492 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8493 case elfcpp::R_ARM_ALU_PC_G1
:
8494 case elfcpp::R_ARM_ALU_PC_G2
:
8495 case elfcpp::R_ARM_LDR_PC_G1
:
8496 case elfcpp::R_ARM_LDR_PC_G2
:
8497 case elfcpp::R_ARM_LDRS_PC_G0
:
8498 case elfcpp::R_ARM_LDRS_PC_G1
:
8499 case elfcpp::R_ARM_LDRS_PC_G2
:
8500 case elfcpp::R_ARM_LDC_PC_G0
:
8501 case elfcpp::R_ARM_LDC_PC_G1
:
8502 case elfcpp::R_ARM_LDC_PC_G2
:
8503 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8504 case elfcpp::R_ARM_ALU_SB_G0
:
8505 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8506 case elfcpp::R_ARM_ALU_SB_G1
:
8507 case elfcpp::R_ARM_ALU_SB_G2
:
8508 case elfcpp::R_ARM_LDR_SB_G0
:
8509 case elfcpp::R_ARM_LDR_SB_G1
:
8510 case elfcpp::R_ARM_LDR_SB_G2
:
8511 case elfcpp::R_ARM_LDRS_SB_G0
:
8512 case elfcpp::R_ARM_LDRS_SB_G1
:
8513 case elfcpp::R_ARM_LDRS_SB_G2
:
8514 case elfcpp::R_ARM_LDC_SB_G0
:
8515 case elfcpp::R_ARM_LDC_SB_G1
:
8516 case elfcpp::R_ARM_LDC_SB_G2
:
8517 case elfcpp::R_ARM_MOVW_BREL_NC
:
8518 case elfcpp::R_ARM_MOVT_BREL
:
8519 case elfcpp::R_ARM_MOVW_BREL
:
8520 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8521 case elfcpp::R_ARM_THM_MOVT_BREL
:
8522 case elfcpp::R_ARM_THM_MOVW_BREL
:
8523 case elfcpp::R_ARM_THM_JUMP11
:
8524 case elfcpp::R_ARM_THM_JUMP8
:
8525 // We don't need to do anything for a relative addressing relocation
8526 // against a local symbol if it does not reference the GOT.
8529 case elfcpp::R_ARM_GOTOFF32
:
8530 case elfcpp::R_ARM_GOTOFF12
:
8531 // We need a GOT section:
8532 target
->got_section(symtab
, layout
);
8535 case elfcpp::R_ARM_GOT_BREL
:
8536 case elfcpp::R_ARM_GOT_PREL
:
8538 // The symbol requires a GOT entry.
8539 Arm_output_data_got
<big_endian
>* got
=
8540 target
->got_section(symtab
, layout
);
8541 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8542 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8544 // If we are generating a shared object, we need to add a
8545 // dynamic RELATIVE relocation for this symbol's GOT entry.
8546 if (parameters
->options().output_is_position_independent())
8548 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8549 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8550 rel_dyn
->add_local_relative(
8551 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8552 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8558 case elfcpp::R_ARM_TARGET1
:
8559 case elfcpp::R_ARM_TARGET2
:
8560 // This should have been mapped to another type already.
8562 case elfcpp::R_ARM_COPY
:
8563 case elfcpp::R_ARM_GLOB_DAT
:
8564 case elfcpp::R_ARM_JUMP_SLOT
:
8565 case elfcpp::R_ARM_RELATIVE
:
8566 // These are relocations which should only be seen by the
8567 // dynamic linker, and should never be seen here.
8568 gold_error(_("%s: unexpected reloc %u in object file"),
8569 object
->name().c_str(), r_type
);
8573 // These are initial TLS relocs, which are expected when
8575 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8576 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8577 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8578 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8579 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8581 bool output_is_shared
= parameters
->options().shared();
8582 const tls::Tls_optimization optimized_type
8583 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8587 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8588 if (optimized_type
== tls::TLSOPT_NONE
)
8590 // Create a pair of GOT entries for the module index and
8591 // dtv-relative offset.
8592 Arm_output_data_got
<big_endian
>* got
8593 = target
->got_section(symtab
, layout
);
8594 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8595 unsigned int shndx
= lsym
.get_st_shndx();
8597 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8600 object
->error(_("local symbol %u has bad shndx %u"),
8605 if (!parameters
->doing_static_link())
8606 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8608 target
->rel_dyn_section(layout
),
8609 elfcpp::R_ARM_TLS_DTPMOD32
);
8611 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8615 // FIXME: TLS optimization not supported yet.
8619 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8620 if (optimized_type
== tls::TLSOPT_NONE
)
8622 // Create a GOT entry for the module index.
8623 target
->got_mod_index_entry(symtab
, layout
, object
);
8626 // FIXME: TLS optimization not supported yet.
8630 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8633 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8634 layout
->set_has_static_tls();
8635 if (optimized_type
== tls::TLSOPT_NONE
)
8637 // Create a GOT entry for the tp-relative offset.
8638 Arm_output_data_got
<big_endian
>* got
8639 = target
->got_section(symtab
, layout
);
8640 unsigned int r_sym
=
8641 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8642 if (!parameters
->doing_static_link())
8643 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8644 target
->rel_dyn_section(layout
),
8645 elfcpp::R_ARM_TLS_TPOFF32
);
8646 else if (!object
->local_has_got_offset(r_sym
,
8647 GOT_TYPE_TLS_OFFSET
))
8649 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8650 unsigned int got_offset
=
8651 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8652 got
->add_static_reloc(got_offset
,
8653 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8658 // FIXME: TLS optimization not supported yet.
8662 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8663 layout
->set_has_static_tls();
8664 if (output_is_shared
)
8666 // We need to create a dynamic relocation.
8667 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8668 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8669 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8670 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8671 output_section
, data_shndx
,
8672 reloc
.get_r_offset());
8682 case elfcpp::R_ARM_PC24
:
8683 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8684 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8685 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8687 unsupported_reloc_local(object
, r_type
);
8692 // Report an unsupported relocation against a global symbol.
8694 template<bool big_endian
>
8696 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8697 Sized_relobj_file
<32, big_endian
>* object
,
8698 unsigned int r_type
,
8701 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8702 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8705 template<bool big_endian
>
8707 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8708 unsigned int r_type
)
8712 case elfcpp::R_ARM_PC24
:
8713 case elfcpp::R_ARM_THM_CALL
:
8714 case elfcpp::R_ARM_PLT32
:
8715 case elfcpp::R_ARM_CALL
:
8716 case elfcpp::R_ARM_JUMP24
:
8717 case elfcpp::R_ARM_THM_JUMP24
:
8718 case elfcpp::R_ARM_SBREL31
:
8719 case elfcpp::R_ARM_PREL31
:
8720 case elfcpp::R_ARM_THM_JUMP19
:
8721 case elfcpp::R_ARM_THM_JUMP6
:
8722 case elfcpp::R_ARM_THM_JUMP11
:
8723 case elfcpp::R_ARM_THM_JUMP8
:
8724 // All the relocations above are branches except SBREL31 and PREL31.
8728 // Be conservative and assume this is a function pointer.
8733 template<bool big_endian
>
8735 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8738 Target_arm
<big_endian
>* target
,
8739 Sized_relobj_file
<32, big_endian
>*,
8742 const elfcpp::Rel
<32, big_endian
>&,
8743 unsigned int r_type
,
8744 const elfcpp::Sym
<32, big_endian
>&)
8746 r_type
= target
->get_real_reloc_type(r_type
);
8747 return possible_function_pointer_reloc(r_type
);
8750 template<bool big_endian
>
8752 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8755 Target_arm
<big_endian
>* target
,
8756 Sized_relobj_file
<32, big_endian
>*,
8759 const elfcpp::Rel
<32, big_endian
>&,
8760 unsigned int r_type
,
8763 // GOT is not a function.
8764 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8767 r_type
= target
->get_real_reloc_type(r_type
);
8768 return possible_function_pointer_reloc(r_type
);
8771 // Scan a relocation for a global symbol.
8773 template<bool big_endian
>
8775 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8778 Sized_relobj_file
<32, big_endian
>* object
,
8779 unsigned int data_shndx
,
8780 Output_section
* output_section
,
8781 const elfcpp::Rel
<32, big_endian
>& reloc
,
8782 unsigned int r_type
,
8785 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8786 // section. We check here to avoid creating a dynamic reloc against
8787 // _GLOBAL_OFFSET_TABLE_.
8788 if (!target
->has_got_section()
8789 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8790 target
->got_section(symtab
, layout
);
8792 // A STT_GNU_IFUNC symbol may require a PLT entry.
8793 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
8794 && this->reloc_needs_plt_for_ifunc(object
, r_type
))
8795 target
->make_plt_entry(symtab
, layout
, gsym
);
8797 r_type
= get_real_reloc_type(r_type
);
8800 case elfcpp::R_ARM_NONE
:
8801 case elfcpp::R_ARM_V4BX
:
8802 case elfcpp::R_ARM_GNU_VTENTRY
:
8803 case elfcpp::R_ARM_GNU_VTINHERIT
:
8806 case elfcpp::R_ARM_ABS32
:
8807 case elfcpp::R_ARM_ABS16
:
8808 case elfcpp::R_ARM_ABS12
:
8809 case elfcpp::R_ARM_THM_ABS5
:
8810 case elfcpp::R_ARM_ABS8
:
8811 case elfcpp::R_ARM_BASE_ABS
:
8812 case elfcpp::R_ARM_MOVW_ABS_NC
:
8813 case elfcpp::R_ARM_MOVT_ABS
:
8814 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8815 case elfcpp::R_ARM_THM_MOVT_ABS
:
8816 case elfcpp::R_ARM_ABS32_NOI
:
8817 // Absolute addressing relocations.
8819 // Make a PLT entry if necessary.
8820 if (this->symbol_needs_plt_entry(gsym
))
8822 target
->make_plt_entry(symtab
, layout
, gsym
);
8823 // Since this is not a PC-relative relocation, we may be
8824 // taking the address of a function. In that case we need to
8825 // set the entry in the dynamic symbol table to the address of
8827 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8828 gsym
->set_needs_dynsym_value();
8830 // Make a dynamic relocation if necessary.
8831 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8833 if (!parameters
->options().output_is_position_independent()
8834 && gsym
->may_need_copy_reloc())
8836 target
->copy_reloc(symtab
, layout
, object
,
8837 data_shndx
, output_section
, gsym
, reloc
);
8839 else if ((r_type
== elfcpp::R_ARM_ABS32
8840 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8841 && gsym
->type() == elfcpp::STT_GNU_IFUNC
8842 && gsym
->can_use_relative_reloc(false)
8843 && !gsym
->is_from_dynobj()
8844 && !gsym
->is_undefined()
8845 && !gsym
->is_preemptible())
8847 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8848 // symbol. This makes a function address in a PIE executable
8849 // match the address in a shared library that it links against.
8850 Reloc_section
* rel_irelative
=
8851 target
->rel_irelative_section(layout
);
8852 unsigned int r_type
= elfcpp::R_ARM_IRELATIVE
;
8853 rel_irelative
->add_symbolless_global_addend(
8854 gsym
, r_type
, output_section
, object
,
8855 data_shndx
, reloc
.get_r_offset());
8857 else if ((r_type
== elfcpp::R_ARM_ABS32
8858 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8859 && gsym
->can_use_relative_reloc(false))
8861 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8862 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8863 output_section
, object
,
8864 data_shndx
, reloc
.get_r_offset());
8868 check_non_pic(object
, r_type
);
8869 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8870 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8871 data_shndx
, reloc
.get_r_offset());
8877 case elfcpp::R_ARM_GOTOFF32
:
8878 case elfcpp::R_ARM_GOTOFF12
:
8879 // We need a GOT section.
8880 target
->got_section(symtab
, layout
);
8883 case elfcpp::R_ARM_REL32
:
8884 case elfcpp::R_ARM_LDR_PC_G0
:
8885 case elfcpp::R_ARM_SBREL32
:
8886 case elfcpp::R_ARM_THM_PC8
:
8887 case elfcpp::R_ARM_BASE_PREL
:
8888 case elfcpp::R_ARM_MOVW_PREL_NC
:
8889 case elfcpp::R_ARM_MOVT_PREL
:
8890 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8891 case elfcpp::R_ARM_THM_MOVT_PREL
:
8892 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8893 case elfcpp::R_ARM_THM_PC12
:
8894 case elfcpp::R_ARM_REL32_NOI
:
8895 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8896 case elfcpp::R_ARM_ALU_PC_G0
:
8897 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8898 case elfcpp::R_ARM_ALU_PC_G1
:
8899 case elfcpp::R_ARM_ALU_PC_G2
:
8900 case elfcpp::R_ARM_LDR_PC_G1
:
8901 case elfcpp::R_ARM_LDR_PC_G2
:
8902 case elfcpp::R_ARM_LDRS_PC_G0
:
8903 case elfcpp::R_ARM_LDRS_PC_G1
:
8904 case elfcpp::R_ARM_LDRS_PC_G2
:
8905 case elfcpp::R_ARM_LDC_PC_G0
:
8906 case elfcpp::R_ARM_LDC_PC_G1
:
8907 case elfcpp::R_ARM_LDC_PC_G2
:
8908 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8909 case elfcpp::R_ARM_ALU_SB_G0
:
8910 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8911 case elfcpp::R_ARM_ALU_SB_G1
:
8912 case elfcpp::R_ARM_ALU_SB_G2
:
8913 case elfcpp::R_ARM_LDR_SB_G0
:
8914 case elfcpp::R_ARM_LDR_SB_G1
:
8915 case elfcpp::R_ARM_LDR_SB_G2
:
8916 case elfcpp::R_ARM_LDRS_SB_G0
:
8917 case elfcpp::R_ARM_LDRS_SB_G1
:
8918 case elfcpp::R_ARM_LDRS_SB_G2
:
8919 case elfcpp::R_ARM_LDC_SB_G0
:
8920 case elfcpp::R_ARM_LDC_SB_G1
:
8921 case elfcpp::R_ARM_LDC_SB_G2
:
8922 case elfcpp::R_ARM_MOVW_BREL_NC
:
8923 case elfcpp::R_ARM_MOVT_BREL
:
8924 case elfcpp::R_ARM_MOVW_BREL
:
8925 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8926 case elfcpp::R_ARM_THM_MOVT_BREL
:
8927 case elfcpp::R_ARM_THM_MOVW_BREL
:
8928 // Relative addressing relocations.
8930 // Make a dynamic relocation if necessary.
8931 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8933 if (parameters
->options().output_is_executable()
8934 && target
->may_need_copy_reloc(gsym
))
8936 target
->copy_reloc(symtab
, layout
, object
,
8937 data_shndx
, output_section
, gsym
, reloc
);
8941 check_non_pic(object
, r_type
);
8942 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8943 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8944 data_shndx
, reloc
.get_r_offset());
8950 case elfcpp::R_ARM_THM_CALL
:
8951 case elfcpp::R_ARM_PLT32
:
8952 case elfcpp::R_ARM_CALL
:
8953 case elfcpp::R_ARM_JUMP24
:
8954 case elfcpp::R_ARM_THM_JUMP24
:
8955 case elfcpp::R_ARM_SBREL31
:
8956 case elfcpp::R_ARM_PREL31
:
8957 case elfcpp::R_ARM_THM_JUMP19
:
8958 case elfcpp::R_ARM_THM_JUMP6
:
8959 case elfcpp::R_ARM_THM_JUMP11
:
8960 case elfcpp::R_ARM_THM_JUMP8
:
8961 // All the relocation above are branches except for the PREL31 ones.
8962 // A PREL31 relocation can point to a personality function in a shared
8963 // library. In that case we want to use a PLT because we want to
8964 // call the personality routine and the dynamic linkers we care about
8965 // do not support dynamic PREL31 relocations. An REL31 relocation may
8966 // point to a function whose unwinding behaviour is being described but
8967 // we will not mistakenly generate a PLT for that because we should use
8968 // a local section symbol.
8970 // If the symbol is fully resolved, this is just a relative
8971 // local reloc. Otherwise we need a PLT entry.
8972 if (gsym
->final_value_is_known())
8974 // If building a shared library, we can also skip the PLT entry
8975 // if the symbol is defined in the output file and is protected
8977 if (gsym
->is_defined()
8978 && !gsym
->is_from_dynobj()
8979 && !gsym
->is_preemptible())
8981 target
->make_plt_entry(symtab
, layout
, gsym
);
8984 case elfcpp::R_ARM_GOT_BREL
:
8985 case elfcpp::R_ARM_GOT_ABS
:
8986 case elfcpp::R_ARM_GOT_PREL
:
8988 // The symbol requires a GOT entry.
8989 Arm_output_data_got
<big_endian
>* got
=
8990 target
->got_section(symtab
, layout
);
8991 if (gsym
->final_value_is_known())
8993 // For a STT_GNU_IFUNC symbol we want the PLT address.
8994 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
8995 got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
8997 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9001 // If this symbol is not fully resolved, we need to add a
9002 // GOT entry with a dynamic relocation.
9003 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9004 if (gsym
->is_from_dynobj()
9005 || gsym
->is_undefined()
9006 || gsym
->is_preemptible()
9007 || (gsym
->visibility() == elfcpp::STV_PROTECTED
9008 && parameters
->options().shared())
9009 || (gsym
->type() == elfcpp::STT_GNU_IFUNC
9010 && parameters
->options().output_is_position_independent()))
9011 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
9012 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
9015 // For a STT_GNU_IFUNC symbol we want to write the PLT
9016 // offset into the GOT, so that function pointer
9017 // comparisons work correctly.
9019 if (gsym
->type() != elfcpp::STT_GNU_IFUNC
)
9020 is_new
= got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9023 is_new
= got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9024 // Tell the dynamic linker to use the PLT address
9025 // when resolving relocations.
9026 if (gsym
->is_from_dynobj()
9027 && !parameters
->options().shared())
9028 gsym
->set_needs_dynsym_value();
9031 rel_dyn
->add_global_relative(
9032 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
9033 gsym
->got_offset(GOT_TYPE_STANDARD
));
9039 case elfcpp::R_ARM_TARGET1
:
9040 case elfcpp::R_ARM_TARGET2
:
9041 // These should have been mapped to other types already.
9043 case elfcpp::R_ARM_COPY
:
9044 case elfcpp::R_ARM_GLOB_DAT
:
9045 case elfcpp::R_ARM_JUMP_SLOT
:
9046 case elfcpp::R_ARM_RELATIVE
:
9047 // These are relocations which should only be seen by the
9048 // dynamic linker, and should never be seen here.
9049 gold_error(_("%s: unexpected reloc %u in object file"),
9050 object
->name().c_str(), r_type
);
9053 // These are initial tls relocs, which are expected when
9055 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9056 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9057 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9058 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9059 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9061 const bool is_final
= gsym
->final_value_is_known();
9062 const tls::Tls_optimization optimized_type
9063 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9066 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9067 if (optimized_type
== tls::TLSOPT_NONE
)
9069 // Create a pair of GOT entries for the module index and
9070 // dtv-relative offset.
9071 Arm_output_data_got
<big_endian
>* got
9072 = target
->got_section(symtab
, layout
);
9073 if (!parameters
->doing_static_link())
9074 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
9075 target
->rel_dyn_section(layout
),
9076 elfcpp::R_ARM_TLS_DTPMOD32
,
9077 elfcpp::R_ARM_TLS_DTPOFF32
);
9079 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
9082 // FIXME: TLS optimization not supported yet.
9086 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9087 if (optimized_type
== tls::TLSOPT_NONE
)
9089 // Create a GOT entry for the module index.
9090 target
->got_mod_index_entry(symtab
, layout
, object
);
9093 // FIXME: TLS optimization not supported yet.
9097 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9100 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9101 layout
->set_has_static_tls();
9102 if (optimized_type
== tls::TLSOPT_NONE
)
9104 // Create a GOT entry for the tp-relative offset.
9105 Arm_output_data_got
<big_endian
>* got
9106 = target
->got_section(symtab
, layout
);
9107 if (!parameters
->doing_static_link())
9108 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
9109 target
->rel_dyn_section(layout
),
9110 elfcpp::R_ARM_TLS_TPOFF32
);
9111 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
9113 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
9114 unsigned int got_offset
=
9115 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
9116 got
->add_static_reloc(got_offset
,
9117 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
9121 // FIXME: TLS optimization not supported yet.
9125 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9126 layout
->set_has_static_tls();
9127 if (parameters
->options().shared())
9129 // We need to create a dynamic relocation.
9130 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9131 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
9132 output_section
, object
,
9133 data_shndx
, reloc
.get_r_offset());
9143 case elfcpp::R_ARM_PC24
:
9144 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9145 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9146 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9148 unsupported_reloc_global(object
, r_type
, gsym
);
9153 // Process relocations for gc.
9155 template<bool big_endian
>
9157 Target_arm
<big_endian
>::gc_process_relocs(
9158 Symbol_table
* symtab
,
9160 Sized_relobj_file
<32, big_endian
>* object
,
9161 unsigned int data_shndx
,
9163 const unsigned char* prelocs
,
9165 Output_section
* output_section
,
9166 bool needs_special_offset_handling
,
9167 size_t local_symbol_count
,
9168 const unsigned char* plocal_symbols
)
9170 typedef Target_arm
<big_endian
> Arm
;
9171 typedef typename Target_arm
<big_endian
>::Scan Scan
;
9173 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
9174 typename
Target_arm::Relocatable_size_for_reloc
>(
9183 needs_special_offset_handling
,
9188 // Scan relocations for a section.
9190 template<bool big_endian
>
9192 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
9194 Sized_relobj_file
<32, big_endian
>* object
,
9195 unsigned int data_shndx
,
9196 unsigned int sh_type
,
9197 const unsigned char* prelocs
,
9199 Output_section
* output_section
,
9200 bool needs_special_offset_handling
,
9201 size_t local_symbol_count
,
9202 const unsigned char* plocal_symbols
)
9204 typedef typename Target_arm
<big_endian
>::Scan Scan
;
9205 if (sh_type
== elfcpp::SHT_RELA
)
9207 gold_error(_("%s: unsupported RELA reloc section"),
9208 object
->name().c_str());
9212 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
9221 needs_special_offset_handling
,
9226 // Finalize the sections.
9228 template<bool big_endian
>
9230 Target_arm
<big_endian
>::do_finalize_sections(
9232 const Input_objects
* input_objects
,
9235 bool merged_any_attributes
= false;
9236 // Merge processor-specific flags.
9237 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
9238 p
!= input_objects
->relobj_end();
9241 Arm_relobj
<big_endian
>* arm_relobj
=
9242 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
9243 if (arm_relobj
->merge_flags_and_attributes())
9245 this->merge_processor_specific_flags(
9247 arm_relobj
->processor_specific_flags());
9248 this->merge_object_attributes(arm_relobj
->name().c_str(),
9249 arm_relobj
->attributes_section_data());
9250 merged_any_attributes
= true;
9254 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
9255 p
!= input_objects
->dynobj_end();
9258 Arm_dynobj
<big_endian
>* arm_dynobj
=
9259 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
9260 this->merge_processor_specific_flags(
9262 arm_dynobj
->processor_specific_flags());
9263 this->merge_object_attributes(arm_dynobj
->name().c_str(),
9264 arm_dynobj
->attributes_section_data());
9265 merged_any_attributes
= true;
9268 // Create an empty uninitialized attribute section if we still don't have it
9269 // at this moment. This happens if there is no attributes sections in all
9271 if (this->attributes_section_data_
== NULL
)
9272 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
9274 const Object_attribute
* cpu_arch_attr
=
9275 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
9276 // Check if we need to use Cortex-A8 workaround.
9277 if (parameters
->options().user_set_fix_cortex_a8())
9278 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
9281 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9282 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9284 const Object_attribute
* cpu_arch_profile_attr
=
9285 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
9286 this->fix_cortex_a8_
=
9287 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
9288 && (cpu_arch_profile_attr
->int_value() == 'A'
9289 || cpu_arch_profile_attr
->int_value() == 0));
9292 // Check if we can use V4BX interworking.
9293 // The V4BX interworking stub contains BX instruction,
9294 // which is not specified for some profiles.
9295 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9296 && !this->may_use_v4t_interworking())
9297 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9298 "the target profile does not support BX instruction"));
9300 // Fill in some more dynamic tags.
9301 const Reloc_section
* rel_plt
= (this->plt_
== NULL
9303 : this->plt_
->rel_plt());
9304 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
9305 this->rel_dyn_
, true, false);
9307 // Emit any relocs we saved in an attempt to avoid generating COPY
9309 if (this->copy_relocs_
.any_saved_relocs())
9310 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
9312 // Handle the .ARM.exidx section.
9313 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
9315 if (!parameters
->options().relocatable())
9317 if (exidx_section
!= NULL
9318 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
9320 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9321 // the .ARM.exidx section.
9322 if (!layout
->script_options()->saw_phdrs_clause())
9324 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
9327 Output_segment
* exidx_segment
=
9328 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
9329 exidx_segment
->add_output_section_to_nonload(exidx_section
,
9335 // Create an .ARM.attributes section if we have merged any attributes
9337 if (merged_any_attributes
)
9339 Output_attributes_section_data
* attributes_section
=
9340 new Output_attributes_section_data(*this->attributes_section_data_
);
9341 layout
->add_output_section_data(".ARM.attributes",
9342 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
9343 attributes_section
, ORDER_INVALID
,
9347 // Fix up links in section EXIDX headers.
9348 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9349 p
!= layout
->section_list().end();
9351 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
9353 Arm_output_section
<big_endian
>* os
=
9354 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9355 os
->set_exidx_section_link();
9359 // Return whether a direct absolute static relocation needs to be applied.
9360 // In cases where Scan::local() or Scan::global() has created
9361 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9362 // of the relocation is carried in the data, and we must not
9363 // apply the static relocation.
9365 template<bool big_endian
>
9367 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
9368 const Sized_symbol
<32>* gsym
,
9369 unsigned int r_type
,
9371 Output_section
* output_section
)
9373 // If the output section is not allocated, then we didn't call
9374 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9376 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
9379 int ref_flags
= Scan::get_reference_flags(r_type
);
9381 // For local symbols, we will have created a non-RELATIVE dynamic
9382 // relocation only if (a) the output is position independent,
9383 // (b) the relocation is absolute (not pc- or segment-relative), and
9384 // (c) the relocation is not 32 bits wide.
9386 return !(parameters
->options().output_is_position_independent()
9387 && (ref_flags
& Symbol::ABSOLUTE_REF
)
9390 // For global symbols, we use the same helper routines used in the
9391 // scan pass. If we did not create a dynamic relocation, or if we
9392 // created a RELATIVE dynamic relocation, we should apply the static
9394 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
9395 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
9396 && gsym
->can_use_relative_reloc(ref_flags
9397 & Symbol::FUNCTION_CALL
);
9398 return !has_dyn
|| is_rel
;
9401 // Perform a relocation.
9403 template<bool big_endian
>
9405 Target_arm
<big_endian
>::Relocate::relocate(
9406 const Relocate_info
<32, big_endian
>* relinfo
,
9409 Output_section
* output_section
,
9411 const unsigned char* preloc
,
9412 const Sized_symbol
<32>* gsym
,
9413 const Symbol_value
<32>* psymval
,
9414 unsigned char* view
,
9415 Arm_address address
,
9416 section_size_type view_size
)
9421 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
9423 const elfcpp::Rel
<32, big_endian
> rel(preloc
);
9424 unsigned int r_type
= elfcpp::elf_r_type
<32>(rel
.get_r_info());
9425 r_type
= get_real_reloc_type(r_type
);
9426 const Arm_reloc_property
* reloc_property
=
9427 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9428 if (reloc_property
== NULL
)
9430 std::string reloc_name
=
9431 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9432 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9433 _("cannot relocate %s in object file"),
9434 reloc_name
.c_str());
9438 const Arm_relobj
<big_endian
>* object
=
9439 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9441 // If the final branch target of a relocation is THUMB instruction, this
9442 // is 1. Otherwise it is 0.
9443 Arm_address thumb_bit
= 0;
9444 Symbol_value
<32> symval
;
9445 bool is_weakly_undefined_without_plt
= false;
9446 bool have_got_offset
= false;
9447 unsigned int got_offset
= 0;
9449 // If the relocation uses the GOT entry of a symbol instead of the symbol
9450 // itself, we don't care about whether the symbol is defined or what kind
9452 if (reloc_property
->uses_got_entry())
9454 // Get the GOT offset.
9455 // The GOT pointer points to the end of the GOT section.
9456 // We need to subtract the size of the GOT section to get
9457 // the actual offset to use in the relocation.
9458 // TODO: We should move GOT offset computing code in TLS relocations
9462 case elfcpp::R_ARM_GOT_BREL
:
9463 case elfcpp::R_ARM_GOT_PREL
:
9466 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
9467 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
9468 - target
->got_size());
9472 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9473 gold_assert(object
->local_has_got_offset(r_sym
,
9474 GOT_TYPE_STANDARD
));
9475 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
9476 - target
->got_size());
9478 have_got_offset
= true;
9485 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
9489 // This is a global symbol. Determine if we use PLT and if the
9490 // final target is THUMB.
9491 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
9493 // This uses a PLT, change the symbol value.
9494 symval
.set_output_value(target
->plt_address_for_global(gsym
));
9497 else if (gsym
->is_weak_undefined())
9499 // This is a weakly undefined symbol and we do not use PLT
9500 // for this relocation. A branch targeting this symbol will
9501 // be converted into an NOP.
9502 is_weakly_undefined_without_plt
= true;
9504 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
9506 // This relocation uses the symbol value but the symbol is
9507 // undefined. Exit early and have the caller reporting an
9513 // Set thumb bit if symbol:
9514 // -Has type STT_ARM_TFUNC or
9515 // -Has type STT_FUNC, is defined and with LSB in value set.
9517 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9518 || (gsym
->type() == elfcpp::STT_FUNC
9519 && !gsym
->is_undefined()
9520 && ((psymval
->value(object
, 0) & 1) != 0)))
9527 // This is a local symbol. Determine if the final target is THUMB.
9528 // We saved this information when all the local symbols were read.
9529 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
9530 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9531 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9533 if (psymval
->is_ifunc_symbol() && object
->local_has_plt_offset(r_sym
))
9535 symval
.set_output_value(
9536 target
->plt_address_for_local(object
, r_sym
));
9543 // This is a fake relocation synthesized for a stub. It does not have
9544 // a real symbol. We just look at the LSB of the symbol value to
9545 // determine if the target is THUMB or not.
9546 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
9549 // Strip LSB if this points to a THUMB target.
9551 && reloc_property
->uses_thumb_bit()
9552 && ((psymval
->value(object
, 0) & 1) != 0))
9554 Arm_address stripped_value
=
9555 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9556 symval
.set_output_value(stripped_value
);
9560 // To look up relocation stubs, we need to pass the symbol table index of
9562 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9564 // Get the addressing origin of the output segment defining the
9565 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9566 Arm_address sym_origin
= 0;
9567 if (reloc_property
->uses_symbol_base())
9569 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
9570 // R_ARM_BASE_ABS with the NULL symbol will give the
9571 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9572 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9573 sym_origin
= target
->got_plt_section()->address();
9574 else if (gsym
== NULL
)
9576 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
9577 sym_origin
= gsym
->output_segment()->vaddr();
9578 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
9579 sym_origin
= gsym
->output_data()->address();
9581 // TODO: Assumes the segment base to be zero for the global symbols
9582 // till the proper support for the segment-base-relative addressing
9583 // will be implemented. This is consistent with GNU ld.
9586 // For relative addressing relocation, find out the relative address base.
9587 Arm_address relative_address_base
= 0;
9588 switch(reloc_property
->relative_address_base())
9590 case Arm_reloc_property::RAB_NONE
:
9591 // Relocations with relative address bases RAB_TLS and RAB_tp are
9592 // handled by relocate_tls. So we do not need to do anything here.
9593 case Arm_reloc_property::RAB_TLS
:
9594 case Arm_reloc_property::RAB_tp
:
9596 case Arm_reloc_property::RAB_B_S
:
9597 relative_address_base
= sym_origin
;
9599 case Arm_reloc_property::RAB_GOT_ORG
:
9600 relative_address_base
= target
->got_plt_section()->address();
9602 case Arm_reloc_property::RAB_P
:
9603 relative_address_base
= address
;
9605 case Arm_reloc_property::RAB_Pa
:
9606 relative_address_base
= address
& 0xfffffffcU
;
9612 typename
Arm_relocate_functions::Status reloc_status
=
9613 Arm_relocate_functions::STATUS_OKAY
;
9614 bool check_overflow
= reloc_property
->checks_overflow();
9617 case elfcpp::R_ARM_NONE
:
9620 case elfcpp::R_ARM_ABS8
:
9621 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9622 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9625 case elfcpp::R_ARM_ABS12
:
9626 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9627 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9630 case elfcpp::R_ARM_ABS16
:
9631 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9632 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9635 case elfcpp::R_ARM_ABS32
:
9636 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9637 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9641 case elfcpp::R_ARM_ABS32_NOI
:
9642 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9643 // No thumb bit for this relocation: (S + A)
9644 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9648 case elfcpp::R_ARM_MOVW_ABS_NC
:
9649 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9650 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9655 case elfcpp::R_ARM_MOVT_ABS
:
9656 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9657 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9660 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9661 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9662 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9663 0, thumb_bit
, false);
9666 case elfcpp::R_ARM_THM_MOVT_ABS
:
9667 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9668 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9672 case elfcpp::R_ARM_MOVW_PREL_NC
:
9673 case elfcpp::R_ARM_MOVW_BREL_NC
:
9674 case elfcpp::R_ARM_MOVW_BREL
:
9676 Arm_relocate_functions::movw(view
, object
, psymval
,
9677 relative_address_base
, thumb_bit
,
9681 case elfcpp::R_ARM_MOVT_PREL
:
9682 case elfcpp::R_ARM_MOVT_BREL
:
9684 Arm_relocate_functions::movt(view
, object
, psymval
,
9685 relative_address_base
);
9688 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9689 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9690 case elfcpp::R_ARM_THM_MOVW_BREL
:
9692 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9693 relative_address_base
,
9694 thumb_bit
, check_overflow
);
9697 case elfcpp::R_ARM_THM_MOVT_PREL
:
9698 case elfcpp::R_ARM_THM_MOVT_BREL
:
9700 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9701 relative_address_base
);
9704 case elfcpp::R_ARM_REL32
:
9705 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9706 address
, thumb_bit
);
9709 case elfcpp::R_ARM_THM_ABS5
:
9710 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9711 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9714 // Thumb long branches.
9715 case elfcpp::R_ARM_THM_CALL
:
9716 case elfcpp::R_ARM_THM_XPC22
:
9717 case elfcpp::R_ARM_THM_JUMP24
:
9719 Arm_relocate_functions::thumb_branch_common(
9720 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9721 thumb_bit
, is_weakly_undefined_without_plt
);
9724 case elfcpp::R_ARM_GOTOFF32
:
9726 Arm_address got_origin
;
9727 got_origin
= target
->got_plt_section()->address();
9728 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9729 got_origin
, thumb_bit
);
9733 case elfcpp::R_ARM_BASE_PREL
:
9734 gold_assert(gsym
!= NULL
);
9736 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9739 case elfcpp::R_ARM_BASE_ABS
:
9740 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9741 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9744 case elfcpp::R_ARM_GOT_BREL
:
9745 gold_assert(have_got_offset
);
9746 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9749 case elfcpp::R_ARM_GOT_PREL
:
9750 gold_assert(have_got_offset
);
9751 // Get the address origin for GOT PLT, which is allocated right
9752 // after the GOT section, to calculate an absolute address of
9753 // the symbol GOT entry (got_origin + got_offset).
9754 Arm_address got_origin
;
9755 got_origin
= target
->got_plt_section()->address();
9756 reloc_status
= Arm_relocate_functions::got_prel(view
,
9757 got_origin
+ got_offset
,
9761 case elfcpp::R_ARM_PLT32
:
9762 case elfcpp::R_ARM_CALL
:
9763 case elfcpp::R_ARM_JUMP24
:
9764 case elfcpp::R_ARM_XPC25
:
9765 gold_assert(gsym
== NULL
9766 || gsym
->has_plt_offset()
9767 || gsym
->final_value_is_known()
9768 || (gsym
->is_defined()
9769 && !gsym
->is_from_dynobj()
9770 && !gsym
->is_preemptible()));
9772 Arm_relocate_functions::arm_branch_common(
9773 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9774 thumb_bit
, is_weakly_undefined_without_plt
);
9777 case elfcpp::R_ARM_THM_JUMP19
:
9779 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9783 case elfcpp::R_ARM_THM_JUMP6
:
9785 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9788 case elfcpp::R_ARM_THM_JUMP8
:
9790 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9793 case elfcpp::R_ARM_THM_JUMP11
:
9795 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9798 case elfcpp::R_ARM_PREL31
:
9799 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9800 address
, thumb_bit
);
9803 case elfcpp::R_ARM_V4BX
:
9804 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9806 const bool is_v4bx_interworking
=
9807 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9809 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9810 is_v4bx_interworking
);
9814 case elfcpp::R_ARM_THM_PC8
:
9816 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9819 case elfcpp::R_ARM_THM_PC12
:
9821 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9824 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9826 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9830 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9831 case elfcpp::R_ARM_ALU_PC_G0
:
9832 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9833 case elfcpp::R_ARM_ALU_PC_G1
:
9834 case elfcpp::R_ARM_ALU_PC_G2
:
9835 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9836 case elfcpp::R_ARM_ALU_SB_G0
:
9837 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9838 case elfcpp::R_ARM_ALU_SB_G1
:
9839 case elfcpp::R_ARM_ALU_SB_G2
:
9841 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9842 reloc_property
->group_index(),
9843 relative_address_base
,
9844 thumb_bit
, check_overflow
);
9847 case elfcpp::R_ARM_LDR_PC_G0
:
9848 case elfcpp::R_ARM_LDR_PC_G1
:
9849 case elfcpp::R_ARM_LDR_PC_G2
:
9850 case elfcpp::R_ARM_LDR_SB_G0
:
9851 case elfcpp::R_ARM_LDR_SB_G1
:
9852 case elfcpp::R_ARM_LDR_SB_G2
:
9854 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9855 reloc_property
->group_index(),
9856 relative_address_base
);
9859 case elfcpp::R_ARM_LDRS_PC_G0
:
9860 case elfcpp::R_ARM_LDRS_PC_G1
:
9861 case elfcpp::R_ARM_LDRS_PC_G2
:
9862 case elfcpp::R_ARM_LDRS_SB_G0
:
9863 case elfcpp::R_ARM_LDRS_SB_G1
:
9864 case elfcpp::R_ARM_LDRS_SB_G2
:
9866 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9867 reloc_property
->group_index(),
9868 relative_address_base
);
9871 case elfcpp::R_ARM_LDC_PC_G0
:
9872 case elfcpp::R_ARM_LDC_PC_G1
:
9873 case elfcpp::R_ARM_LDC_PC_G2
:
9874 case elfcpp::R_ARM_LDC_SB_G0
:
9875 case elfcpp::R_ARM_LDC_SB_G1
:
9876 case elfcpp::R_ARM_LDC_SB_G2
:
9878 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9879 reloc_property
->group_index(),
9880 relative_address_base
);
9883 // These are initial tls relocs, which are expected when
9885 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9886 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9887 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9888 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9889 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9891 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9892 view
, address
, view_size
);
9895 // The known and unknown unsupported and/or deprecated relocations.
9896 case elfcpp::R_ARM_PC24
:
9897 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9898 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9899 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9901 // Just silently leave the method. We should get an appropriate error
9902 // message in the scan methods.
9906 // Report any errors.
9907 switch (reloc_status
)
9909 case Arm_relocate_functions::STATUS_OKAY
:
9911 case Arm_relocate_functions::STATUS_OVERFLOW
:
9912 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9913 _("relocation overflow in %s"),
9914 reloc_property
->name().c_str());
9916 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9917 gold_error_at_location(
9921 _("unexpected opcode while processing relocation %s"),
9922 reloc_property
->name().c_str());
9931 // Perform a TLS relocation.
9933 template<bool big_endian
>
9934 inline typename Arm_relocate_functions
<big_endian
>::Status
9935 Target_arm
<big_endian
>::Relocate::relocate_tls(
9936 const Relocate_info
<32, big_endian
>* relinfo
,
9937 Target_arm
<big_endian
>* target
,
9939 const elfcpp::Rel
<32, big_endian
>& rel
,
9940 unsigned int r_type
,
9941 const Sized_symbol
<32>* gsym
,
9942 const Symbol_value
<32>* psymval
,
9943 unsigned char* view
,
9944 elfcpp::Elf_types
<32>::Elf_Addr address
,
9945 section_size_type
/*view_size*/ )
9947 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9948 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9949 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9951 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9953 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9955 const bool is_final
= (gsym
== NULL
9956 ? !parameters
->options().shared()
9957 : gsym
->final_value_is_known());
9958 const tls::Tls_optimization optimized_type
9959 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9962 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9964 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9965 unsigned int got_offset
;
9968 gold_assert(gsym
->has_got_offset(got_type
));
9969 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9973 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9974 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9975 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9976 - target
->got_size());
9978 if (optimized_type
== tls::TLSOPT_NONE
)
9980 Arm_address got_entry
=
9981 target
->got_plt_section()->address() + got_offset
;
9983 // Relocate the field with the PC relative offset of the pair of
9985 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9986 return ArmRelocFuncs::STATUS_OKAY
;
9991 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9992 if (optimized_type
== tls::TLSOPT_NONE
)
9994 // Relocate the field with the offset of the GOT entry for
9995 // the module index.
9996 unsigned int got_offset
;
9997 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9998 - target
->got_size());
9999 Arm_address got_entry
=
10000 target
->got_plt_section()->address() + got_offset
;
10002 // Relocate the field with the PC relative offset of the pair of
10004 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10005 return ArmRelocFuncs::STATUS_OKAY
;
10009 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10010 RelocFuncs::rel32_unaligned(view
, value
);
10011 return ArmRelocFuncs::STATUS_OKAY
;
10013 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10014 if (optimized_type
== tls::TLSOPT_NONE
)
10016 // Relocate the field with the offset of the GOT entry for
10017 // the tp-relative offset of the symbol.
10018 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
10019 unsigned int got_offset
;
10022 gold_assert(gsym
->has_got_offset(got_type
));
10023 got_offset
= gsym
->got_offset(got_type
);
10027 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10028 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10029 got_offset
= object
->local_got_offset(r_sym
, got_type
);
10032 // All GOT offsets are relative to the end of the GOT.
10033 got_offset
-= target
->got_size();
10035 Arm_address got_entry
=
10036 target
->got_plt_section()->address() + got_offset
;
10038 // Relocate the field with the PC relative offset of the GOT entry.
10039 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10040 return ArmRelocFuncs::STATUS_OKAY
;
10044 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10045 // If we're creating a shared library, a dynamic relocation will
10046 // have been created for this location, so do not apply it now.
10047 if (!parameters
->options().shared())
10049 gold_assert(tls_segment
!= NULL
);
10051 // $tp points to the TCB, which is followed by the TLS, so we
10052 // need to add TCB size to the offset.
10053 Arm_address aligned_tcb_size
=
10054 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
10055 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
10058 return ArmRelocFuncs::STATUS_OKAY
;
10061 gold_unreachable();
10064 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10065 _("unsupported reloc %u"),
10067 return ArmRelocFuncs::STATUS_BAD_RELOC
;
10070 // Relocate section data.
10072 template<bool big_endian
>
10074 Target_arm
<big_endian
>::relocate_section(
10075 const Relocate_info
<32, big_endian
>* relinfo
,
10076 unsigned int sh_type
,
10077 const unsigned char* prelocs
,
10078 size_t reloc_count
,
10079 Output_section
* output_section
,
10080 bool needs_special_offset_handling
,
10081 unsigned char* view
,
10082 Arm_address address
,
10083 section_size_type view_size
,
10084 const Reloc_symbol_changes
* reloc_symbol_changes
)
10086 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
10087 gold_assert(sh_type
== elfcpp::SHT_REL
);
10089 // See if we are relocating a relaxed input section. If so, the view
10090 // covers the whole output section and we need to adjust accordingly.
10091 if (needs_special_offset_handling
)
10093 const Output_relaxed_input_section
* poris
=
10094 output_section
->find_relaxed_input_section(relinfo
->object
,
10095 relinfo
->data_shndx
);
10098 Arm_address section_address
= poris
->address();
10099 section_size_type section_size
= poris
->data_size();
10101 gold_assert((section_address
>= address
)
10102 && ((section_address
+ section_size
)
10103 <= (address
+ view_size
)));
10105 off_t offset
= section_address
- address
;
10108 view_size
= section_size
;
10112 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
10113 Arm_relocate
, gold::Default_comdat_behavior
>(
10119 needs_special_offset_handling
,
10123 reloc_symbol_changes
);
10126 // Return the size of a relocation while scanning during a relocatable
10129 template<bool big_endian
>
10131 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
10132 unsigned int r_type
,
10135 r_type
= get_real_reloc_type(r_type
);
10136 const Arm_reloc_property
* arp
=
10137 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10139 return arp
->size();
10142 std::string reloc_name
=
10143 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
10144 gold_error(_("%s: unexpected %s in object file"),
10145 object
->name().c_str(), reloc_name
.c_str());
10150 // Scan the relocs during a relocatable link.
10152 template<bool big_endian
>
10154 Target_arm
<big_endian
>::scan_relocatable_relocs(
10155 Symbol_table
* symtab
,
10157 Sized_relobj_file
<32, big_endian
>* object
,
10158 unsigned int data_shndx
,
10159 unsigned int sh_type
,
10160 const unsigned char* prelocs
,
10161 size_t reloc_count
,
10162 Output_section
* output_section
,
10163 bool needs_special_offset_handling
,
10164 size_t local_symbol_count
,
10165 const unsigned char* plocal_symbols
,
10166 Relocatable_relocs
* rr
)
10168 gold_assert(sh_type
== elfcpp::SHT_REL
);
10170 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
10171 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
10173 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
10174 Scan_relocatable_relocs
>(
10182 needs_special_offset_handling
,
10183 local_symbol_count
,
10188 // Emit relocations for a section.
10190 template<bool big_endian
>
10192 Target_arm
<big_endian
>::relocate_relocs(
10193 const Relocate_info
<32, big_endian
>* relinfo
,
10194 unsigned int sh_type
,
10195 const unsigned char* prelocs
,
10196 size_t reloc_count
,
10197 Output_section
* output_section
,
10198 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10199 unsigned char* view
,
10200 Arm_address view_address
,
10201 section_size_type view_size
,
10202 unsigned char* reloc_view
,
10203 section_size_type reloc_view_size
)
10205 gold_assert(sh_type
== elfcpp::SHT_REL
);
10207 gold::relocate_relocs
<32, big_endian
, elfcpp::SHT_REL
>(
10212 offset_in_output_section
,
10220 // Perform target-specific processing in a relocatable link. This is
10221 // only used if we use the relocation strategy RELOC_SPECIAL.
10223 template<bool big_endian
>
10225 Target_arm
<big_endian
>::relocate_special_relocatable(
10226 const Relocate_info
<32, big_endian
>* relinfo
,
10227 unsigned int sh_type
,
10228 const unsigned char* preloc_in
,
10230 Output_section
* output_section
,
10231 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10232 unsigned char* view
,
10233 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
10235 unsigned char* preloc_out
)
10237 // We can only handle REL type relocation sections.
10238 gold_assert(sh_type
== elfcpp::SHT_REL
);
10240 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
10241 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
10243 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
10245 const Arm_relobj
<big_endian
>* object
=
10246 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10247 const unsigned int local_count
= object
->local_symbol_count();
10249 Reltype
reloc(preloc_in
);
10250 Reltype_write
reloc_write(preloc_out
);
10252 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
10253 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
10254 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
10256 const Arm_reloc_property
* arp
=
10257 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10258 gold_assert(arp
!= NULL
);
10260 // Get the new symbol index.
10261 // We only use RELOC_SPECIAL strategy in local relocations.
10262 gold_assert(r_sym
< local_count
);
10264 // We are adjusting a section symbol. We need to find
10265 // the symbol table index of the section symbol for
10266 // the output section corresponding to input section
10267 // in which this symbol is defined.
10269 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
10270 gold_assert(is_ordinary
);
10271 Output_section
* os
= object
->output_section(shndx
);
10272 gold_assert(os
!= NULL
);
10273 gold_assert(os
->needs_symtab_index());
10274 unsigned int new_symndx
= os
->symtab_index();
10276 // Get the new offset--the location in the output section where
10277 // this relocation should be applied.
10279 Arm_address offset
= reloc
.get_r_offset();
10280 Arm_address new_offset
;
10281 if (offset_in_output_section
!= invalid_address
)
10282 new_offset
= offset
+ offset_in_output_section
;
10285 section_offset_type sot_offset
=
10286 convert_types
<section_offset_type
, Arm_address
>(offset
);
10287 section_offset_type new_sot_offset
=
10288 output_section
->output_offset(object
, relinfo
->data_shndx
,
10290 gold_assert(new_sot_offset
!= -1);
10291 new_offset
= new_sot_offset
;
10294 // In an object file, r_offset is an offset within the section.
10295 // In an executable or dynamic object, generated by
10296 // --emit-relocs, r_offset is an absolute address.
10297 if (!parameters
->options().relocatable())
10299 new_offset
+= view_address
;
10300 if (offset_in_output_section
!= invalid_address
)
10301 new_offset
-= offset_in_output_section
;
10304 reloc_write
.put_r_offset(new_offset
);
10305 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
10307 // Handle the reloc addend.
10308 // The relocation uses a section symbol in the input file.
10309 // We are adjusting it to use a section symbol in the output
10310 // file. The input section symbol refers to some address in
10311 // the input section. We need the relocation in the output
10312 // file to refer to that same address. This adjustment to
10313 // the addend is the same calculation we use for a simple
10314 // absolute relocation for the input section symbol.
10316 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
10318 // Handle THUMB bit.
10319 Symbol_value
<32> symval
;
10320 Arm_address thumb_bit
=
10321 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
10323 && arp
->uses_thumb_bit()
10324 && ((psymval
->value(object
, 0) & 1) != 0))
10326 Arm_address stripped_value
=
10327 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
10328 symval
.set_output_value(stripped_value
);
10332 unsigned char* paddend
= view
+ offset
;
10333 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
10334 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
10337 case elfcpp::R_ARM_ABS8
:
10338 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
10342 case elfcpp::R_ARM_ABS12
:
10343 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
10347 case elfcpp::R_ARM_ABS16
:
10348 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
10352 case elfcpp::R_ARM_THM_ABS5
:
10353 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
10358 case elfcpp::R_ARM_MOVW_ABS_NC
:
10359 case elfcpp::R_ARM_MOVW_PREL_NC
:
10360 case elfcpp::R_ARM_MOVW_BREL_NC
:
10361 case elfcpp::R_ARM_MOVW_BREL
:
10362 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
10363 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10366 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
10367 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
10368 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
10369 case elfcpp::R_ARM_THM_MOVW_BREL
:
10370 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
10371 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10374 case elfcpp::R_ARM_THM_CALL
:
10375 case elfcpp::R_ARM_THM_XPC22
:
10376 case elfcpp::R_ARM_THM_JUMP24
:
10378 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
10379 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10383 case elfcpp::R_ARM_PLT32
:
10384 case elfcpp::R_ARM_CALL
:
10385 case elfcpp::R_ARM_JUMP24
:
10386 case elfcpp::R_ARM_XPC25
:
10388 Arm_relocate_functions
<big_endian
>::arm_branch_common(
10389 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10393 case elfcpp::R_ARM_THM_JUMP19
:
10395 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
10396 psymval
, 0, thumb_bit
);
10399 case elfcpp::R_ARM_THM_JUMP6
:
10401 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
10405 case elfcpp::R_ARM_THM_JUMP8
:
10407 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
10411 case elfcpp::R_ARM_THM_JUMP11
:
10413 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
10417 case elfcpp::R_ARM_PREL31
:
10419 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
10423 case elfcpp::R_ARM_THM_PC8
:
10425 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
10429 case elfcpp::R_ARM_THM_PC12
:
10431 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
10435 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
10437 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
10441 // These relocation truncate relocation results so we cannot handle them
10442 // in a relocatable link.
10443 case elfcpp::R_ARM_MOVT_ABS
:
10444 case elfcpp::R_ARM_THM_MOVT_ABS
:
10445 case elfcpp::R_ARM_MOVT_PREL
:
10446 case elfcpp::R_ARM_MOVT_BREL
:
10447 case elfcpp::R_ARM_THM_MOVT_PREL
:
10448 case elfcpp::R_ARM_THM_MOVT_BREL
:
10449 case elfcpp::R_ARM_ALU_PC_G0_NC
:
10450 case elfcpp::R_ARM_ALU_PC_G0
:
10451 case elfcpp::R_ARM_ALU_PC_G1_NC
:
10452 case elfcpp::R_ARM_ALU_PC_G1
:
10453 case elfcpp::R_ARM_ALU_PC_G2
:
10454 case elfcpp::R_ARM_ALU_SB_G0_NC
:
10455 case elfcpp::R_ARM_ALU_SB_G0
:
10456 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10457 case elfcpp::R_ARM_ALU_SB_G1
:
10458 case elfcpp::R_ARM_ALU_SB_G2
:
10459 case elfcpp::R_ARM_LDR_PC_G0
:
10460 case elfcpp::R_ARM_LDR_PC_G1
:
10461 case elfcpp::R_ARM_LDR_PC_G2
:
10462 case elfcpp::R_ARM_LDR_SB_G0
:
10463 case elfcpp::R_ARM_LDR_SB_G1
:
10464 case elfcpp::R_ARM_LDR_SB_G2
:
10465 case elfcpp::R_ARM_LDRS_PC_G0
:
10466 case elfcpp::R_ARM_LDRS_PC_G1
:
10467 case elfcpp::R_ARM_LDRS_PC_G2
:
10468 case elfcpp::R_ARM_LDRS_SB_G0
:
10469 case elfcpp::R_ARM_LDRS_SB_G1
:
10470 case elfcpp::R_ARM_LDRS_SB_G2
:
10471 case elfcpp::R_ARM_LDC_PC_G0
:
10472 case elfcpp::R_ARM_LDC_PC_G1
:
10473 case elfcpp::R_ARM_LDC_PC_G2
:
10474 case elfcpp::R_ARM_LDC_SB_G0
:
10475 case elfcpp::R_ARM_LDC_SB_G1
:
10476 case elfcpp::R_ARM_LDC_SB_G2
:
10477 gold_error(_("cannot handle %s in a relocatable link"),
10478 arp
->name().c_str());
10482 gold_unreachable();
10485 // Report any errors.
10486 switch (reloc_status
)
10488 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
10490 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
10491 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10492 _("relocation overflow in %s"),
10493 arp
->name().c_str());
10495 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
10496 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10497 _("unexpected opcode while processing relocation %s"),
10498 arp
->name().c_str());
10501 gold_unreachable();
10505 // Return the value to use for a dynamic symbol which requires special
10506 // treatment. This is how we support equality comparisons of function
10507 // pointers across shared library boundaries, as described in the
10508 // processor specific ABI supplement.
10510 template<bool big_endian
>
10512 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
10514 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
10515 return this->plt_address_for_global(gsym
);
10518 // Map platform-specific relocs to real relocs
10520 template<bool big_endian
>
10522 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
10526 case elfcpp::R_ARM_TARGET1
:
10527 // This is either R_ARM_ABS32 or R_ARM_REL32;
10528 return elfcpp::R_ARM_ABS32
;
10530 case elfcpp::R_ARM_TARGET2
:
10531 // This can be any reloc type but usually is R_ARM_GOT_PREL
10532 return elfcpp::R_ARM_GOT_PREL
;
10539 // Whether if two EABI versions V1 and V2 are compatible.
10541 template<bool big_endian
>
10543 Target_arm
<big_endian
>::are_eabi_versions_compatible(
10544 elfcpp::Elf_Word v1
,
10545 elfcpp::Elf_Word v2
)
10547 // v4 and v5 are the same spec before and after it was released,
10548 // so allow mixing them.
10549 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
10550 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
10551 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
10557 // Combine FLAGS from an input object called NAME and the processor-specific
10558 // flags in the ELF header of the output. Much of this is adapted from the
10559 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10560 // in bfd/elf32-arm.c.
10562 template<bool big_endian
>
10564 Target_arm
<big_endian
>::merge_processor_specific_flags(
10565 const std::string
& name
,
10566 elfcpp::Elf_Word flags
)
10568 if (this->are_processor_specific_flags_set())
10570 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
10572 // Nothing to merge if flags equal to those in output.
10573 if (flags
== out_flags
)
10576 // Complain about various flag mismatches.
10577 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
10578 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
10579 if (!this->are_eabi_versions_compatible(version1
, version2
)
10580 && parameters
->options().warn_mismatch())
10581 gold_error(_("Source object %s has EABI version %d but output has "
10582 "EABI version %d."),
10584 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
10585 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
10589 // If the input is the default architecture and had the default
10590 // flags then do not bother setting the flags for the output
10591 // architecture, instead allow future merges to do this. If no
10592 // future merges ever set these flags then they will retain their
10593 // uninitialised values, which surprise surprise, correspond
10594 // to the default values.
10598 // This is the first time, just copy the flags.
10599 // We only copy the EABI version for now.
10600 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10604 // Adjust ELF file header.
10605 template<bool big_endian
>
10607 Target_arm
<big_endian
>::do_adjust_elf_header(
10608 unsigned char* view
,
10611 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10613 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10614 elfcpp::Elf_Word flags
= this->processor_specific_flags();
10615 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10616 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10618 if (elfcpp::arm_eabi_version(flags
)
10619 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10620 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10622 e_ident
[elfcpp::EI_OSABI
] = 0;
10623 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10625 // FIXME: Do EF_ARM_BE8 adjustment.
10627 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10629 if (elfcpp::arm_eabi_version(flags
) == elfcpp::EF_ARM_EABI_VER5
)
10631 elfcpp::Elf_Half type
= ehdr
.get_e_type();
10632 if (type
== elfcpp::ET_EXEC
|| type
== elfcpp::ET_DYN
)
10634 Object_attribute
* attr
= this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args
);
10635 if (attr
->int_value() == elfcpp::AEABI_VFP_args_vfp
)
10636 flags
|= elfcpp::EF_ARM_ABI_FLOAT_HARD
;
10638 flags
|= elfcpp::EF_ARM_ABI_FLOAT_SOFT
;
10639 this->set_processor_specific_flags(flags
);
10642 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10643 oehdr
.put_e_ident(e_ident
);
10644 oehdr
.put_e_flags(this->processor_specific_flags());
10647 // do_make_elf_object to override the same function in the base class.
10648 // We need to use a target-specific sub-class of
10649 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10650 // Hence we need to have our own ELF object creation.
10652 template<bool big_endian
>
10654 Target_arm
<big_endian
>::do_make_elf_object(
10655 const std::string
& name
,
10656 Input_file
* input_file
,
10657 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10659 int et
= ehdr
.get_e_type();
10660 // ET_EXEC files are valid input for --just-symbols/-R,
10661 // and we treat them as relocatable objects.
10662 if (et
== elfcpp::ET_REL
10663 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10665 Arm_relobj
<big_endian
>* obj
=
10666 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10670 else if (et
== elfcpp::ET_DYN
)
10672 Sized_dynobj
<32, big_endian
>* obj
=
10673 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10679 gold_error(_("%s: unsupported ELF file type %d"),
10685 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10686 // Returns -1 if no architecture could be read.
10687 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10689 template<bool big_endian
>
10691 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10692 const Attributes_section_data
* pasd
)
10694 const Object_attribute
* known_attributes
=
10695 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10697 // Note: the tag and its argument below are uleb128 values, though
10698 // currently-defined values fit in one byte for each.
10699 const std::string
& sv
=
10700 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10702 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10703 && (sv
.data()[1] & 128) != 128)
10704 return sv
.data()[1];
10706 // This tag is "safely ignorable", so don't complain if it looks funny.
10710 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10711 // The tag is removed if ARCH is -1.
10712 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10714 template<bool big_endian
>
10716 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10717 Attributes_section_data
* pasd
,
10720 Object_attribute
* known_attributes
=
10721 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10725 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10729 // Note: the tag and its argument below are uleb128 values, though
10730 // currently-defined values fit in one byte for each.
10732 sv
[0] = elfcpp::Tag_CPU_arch
;
10733 gold_assert(arch
!= 0);
10737 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10740 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10742 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10744 template<bool big_endian
>
10746 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10749 int* secondary_compat_out
,
10751 int secondary_compat
)
10753 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10754 static const int v6t2
[] =
10756 T(V6T2
), // PRE_V4.
10766 static const int v6k
[] =
10779 static const int v7
[] =
10793 static const int v6_m
[] =
10808 static const int v6s_m
[] =
10824 static const int v7e_m
[] =
10831 T(V7E_M
), // V5TEJ.
10838 T(V7E_M
), // V6S_M.
10841 static const int v8
[] =
10859 static const int v4t_plus_v6_m
[] =
10866 T(V5TEJ
), // V5TEJ.
10873 T(V6S_M
), // V6S_M.
10874 T(V7E_M
), // V7E_M.
10876 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10878 static const int* comb
[] =
10887 // Pseudo-architecture.
10891 // Check we've not got a higher architecture than we know about.
10893 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10895 gold_error(_("%s: unknown CPU architecture"), name
);
10899 // Override old tag if we have a Tag_also_compatible_with on the output.
10901 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10902 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10903 oldtag
= T(V4T_PLUS_V6_M
);
10905 // And override the new tag if we have a Tag_also_compatible_with on the
10908 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10909 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10910 newtag
= T(V4T_PLUS_V6_M
);
10912 // Architectures before V6KZ add features monotonically.
10913 int tagh
= std::max(oldtag
, newtag
);
10914 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10917 int tagl
= std::min(oldtag
, newtag
);
10918 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10920 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10921 // as the canonical version.
10922 if (result
== T(V4T_PLUS_V6_M
))
10925 *secondary_compat_out
= T(V6_M
);
10928 *secondary_compat_out
= -1;
10932 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10933 name
, oldtag
, newtag
);
10941 // Helper to print AEABI enum tag value.
10943 template<bool big_endian
>
10945 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10947 static const char* aeabi_enum_names
[] =
10948 { "", "variable-size", "32-bit", "" };
10949 const size_t aeabi_enum_names_size
=
10950 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10952 if (value
< aeabi_enum_names_size
)
10953 return std::string(aeabi_enum_names
[value
]);
10957 sprintf(buffer
, "<unknown value %u>", value
);
10958 return std::string(buffer
);
10962 // Return the string value to store in TAG_CPU_name.
10964 template<bool big_endian
>
10966 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10968 static const char* name_table
[] = {
10969 // These aren't real CPU names, but we can't guess
10970 // that from the architecture version alone.
10987 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10989 if (value
< name_table_size
)
10990 return std::string(name_table
[value
]);
10994 sprintf(buffer
, "<unknown CPU value %u>", value
);
10995 return std::string(buffer
);
10999 // Query attributes object to see if integer divide instructions may be
11000 // present in an object.
11002 template<bool big_endian
>
11004 Target_arm
<big_endian
>::attributes_accept_div(int arch
, int profile
,
11005 const Object_attribute
* div_attr
)
11007 switch (div_attr
->int_value())
11010 // Integer divide allowed if instruction contained in
11012 if (arch
== elfcpp::TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
11014 else if (arch
>= elfcpp::TAG_CPU_ARCH_V7E_M
)
11020 // Integer divide explicitly prohibited.
11024 // Unrecognised case - treat as allowing divide everywhere.
11026 // Integer divide allowed in ARM state.
11031 // Query attributes object to see if integer divide instructions are
11032 // forbidden to be in the object. This is not the inverse of
11033 // attributes_accept_div.
11035 template<bool big_endian
>
11037 Target_arm
<big_endian
>::attributes_forbid_div(const Object_attribute
* div_attr
)
11039 return div_attr
->int_value() == 1;
11042 // Merge object attributes from input file called NAME with those of the
11043 // output. The input object attributes are in the object pointed by PASD.
11045 template<bool big_endian
>
11047 Target_arm
<big_endian
>::merge_object_attributes(
11049 const Attributes_section_data
* pasd
)
11051 // Return if there is no attributes section data.
11055 // If output has no object attributes, just copy.
11056 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
11057 if (this->attributes_section_data_
== NULL
)
11059 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
11060 Object_attribute
* out_attr
=
11061 this->attributes_section_data_
->known_attributes(vendor
);
11063 // We do not output objects with Tag_MPextension_use_legacy - we move
11064 // the attribute's value to Tag_MPextension_use. */
11065 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
11067 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
11068 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
11069 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11071 gold_error(_("%s has both the current and legacy "
11072 "Tag_MPextension_use attributes"),
11076 out_attr
[elfcpp::Tag_MPextension_use
] =
11077 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
11078 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
11079 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
11085 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
11086 Object_attribute
* out_attr
=
11087 this->attributes_section_data_
->known_attributes(vendor
);
11089 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11090 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11091 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
11093 // Ignore mismatches if the object doesn't use floating point. */
11094 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11095 == elfcpp::AEABI_FP_number_model_none
11096 || (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11097 != elfcpp::AEABI_FP_number_model_none
11098 && out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11099 == elfcpp::AEABI_VFP_args_compatible
))
11100 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
11101 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
11102 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11103 != elfcpp::AEABI_FP_number_model_none
11104 && in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11105 != elfcpp::AEABI_VFP_args_compatible
11106 && parameters
->options().warn_mismatch())
11107 gold_error(_("%s uses VFP register arguments, output does not"),
11111 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
11113 // Merge this attribute with existing attributes.
11116 case elfcpp::Tag_CPU_raw_name
:
11117 case elfcpp::Tag_CPU_name
:
11118 // These are merged after Tag_CPU_arch.
11121 case elfcpp::Tag_ABI_optimization_goals
:
11122 case elfcpp::Tag_ABI_FP_optimization_goals
:
11123 // Use the first value seen.
11126 case elfcpp::Tag_CPU_arch
:
11128 unsigned int saved_out_attr
= out_attr
->int_value();
11129 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11130 int secondary_compat
=
11131 this->get_secondary_compatible_arch(pasd
);
11132 int secondary_compat_out
=
11133 this->get_secondary_compatible_arch(
11134 this->attributes_section_data_
);
11135 out_attr
[i
].set_int_value(
11136 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
11137 &secondary_compat_out
,
11138 in_attr
[i
].int_value(),
11139 secondary_compat
));
11140 this->set_secondary_compatible_arch(this->attributes_section_data_
,
11141 secondary_compat_out
);
11143 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11144 if (out_attr
[i
].int_value() == saved_out_attr
)
11145 ; // Leave the names alone.
11146 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
11148 // The output architecture has been changed to match the
11149 // input architecture. Use the input names.
11150 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
11151 in_attr
[elfcpp::Tag_CPU_name
].string_value());
11152 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
11153 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
11157 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
11158 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
11161 // If we still don't have a value for Tag_CPU_name,
11162 // make one up now. Tag_CPU_raw_name remains blank.
11163 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
11165 const std::string cpu_name
=
11166 this->tag_cpu_name_value(out_attr
[i
].int_value());
11167 // FIXME: If we see an unknown CPU, this will be set
11168 // to "<unknown CPU n>", where n is the attribute value.
11169 // This is different from BFD, which leaves the name alone.
11170 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
11175 case elfcpp::Tag_ARM_ISA_use
:
11176 case elfcpp::Tag_THUMB_ISA_use
:
11177 case elfcpp::Tag_WMMX_arch
:
11178 case elfcpp::Tag_Advanced_SIMD_arch
:
11179 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11180 case elfcpp::Tag_ABI_FP_rounding
:
11181 case elfcpp::Tag_ABI_FP_exceptions
:
11182 case elfcpp::Tag_ABI_FP_user_exceptions
:
11183 case elfcpp::Tag_ABI_FP_number_model
:
11184 case elfcpp::Tag_VFP_HP_extension
:
11185 case elfcpp::Tag_CPU_unaligned_access
:
11186 case elfcpp::Tag_T2EE_use
:
11187 case elfcpp::Tag_Virtualization_use
:
11188 case elfcpp::Tag_MPextension_use
:
11189 // Use the largest value specified.
11190 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11191 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11194 case elfcpp::Tag_ABI_align8_preserved
:
11195 case elfcpp::Tag_ABI_PCS_RO_data
:
11196 // Use the smallest value specified.
11197 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11198 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11201 case elfcpp::Tag_ABI_align8_needed
:
11202 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
11203 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
11204 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
11207 // This error message should be enabled once all non-conforming
11208 // binaries in the toolchain have had the attributes set
11210 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11214 case elfcpp::Tag_ABI_FP_denormal
:
11215 case elfcpp::Tag_ABI_PCS_GOT_use
:
11217 // These tags have 0 = don't care, 1 = strong requirement,
11218 // 2 = weak requirement.
11219 static const int order_021
[3] = {0, 2, 1};
11221 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11222 // value if greater than 2 (for future-proofing).
11223 if ((in_attr
[i
].int_value() > 2
11224 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11225 || (in_attr
[i
].int_value() <= 2
11226 && out_attr
[i
].int_value() <= 2
11227 && (order_021
[in_attr
[i
].int_value()]
11228 > order_021
[out_attr
[i
].int_value()])))
11229 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11233 case elfcpp::Tag_CPU_arch_profile
:
11234 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
11236 // 0 will merge with anything.
11237 // 'A' and 'S' merge to 'A'.
11238 // 'R' and 'S' merge to 'R'.
11239 // 'M' and 'A|R|S' is an error.
11240 if (out_attr
[i
].int_value() == 0
11241 || (out_attr
[i
].int_value() == 'S'
11242 && (in_attr
[i
].int_value() == 'A'
11243 || in_attr
[i
].int_value() == 'R')))
11244 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11245 else if (in_attr
[i
].int_value() == 0
11246 || (in_attr
[i
].int_value() == 'S'
11247 && (out_attr
[i
].int_value() == 'A'
11248 || out_attr
[i
].int_value() == 'R')))
11250 else if (parameters
->options().warn_mismatch())
11253 (_("conflicting architecture profiles %c/%c"),
11254 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
11255 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
11259 case elfcpp::Tag_VFP_arch
:
11261 static const struct
11265 } vfp_versions
[7] =
11276 // Values greater than 6 aren't defined, so just pick the
11278 if (in_attr
[i
].int_value() > 6
11279 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11281 *out_attr
= *in_attr
;
11284 // The output uses the superset of input features
11285 // (ISA version) and registers.
11286 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
11287 vfp_versions
[out_attr
[i
].int_value()].ver
);
11288 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
11289 vfp_versions
[out_attr
[i
].int_value()].regs
);
11290 // This assumes all possible supersets are also a valid
11293 for (newval
= 6; newval
> 0; newval
--)
11295 if (regs
== vfp_versions
[newval
].regs
11296 && ver
== vfp_versions
[newval
].ver
)
11299 out_attr
[i
].set_int_value(newval
);
11302 case elfcpp::Tag_PCS_config
:
11303 if (out_attr
[i
].int_value() == 0)
11304 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11305 else if (in_attr
[i
].int_value() != 0
11306 && out_attr
[i
].int_value() != 0
11307 && parameters
->options().warn_mismatch())
11309 // It's sometimes ok to mix different configs, so this is only
11311 gold_warning(_("%s: conflicting platform configuration"), name
);
11314 case elfcpp::Tag_ABI_PCS_R9_use
:
11315 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11316 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11317 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11318 && parameters
->options().warn_mismatch())
11320 gold_error(_("%s: conflicting use of R9"), name
);
11322 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
11323 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11325 case elfcpp::Tag_ABI_PCS_RW_data
:
11326 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11327 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11328 != elfcpp::AEABI_R9_SB
)
11329 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11330 != elfcpp::AEABI_R9_unused
)
11331 && parameters
->options().warn_mismatch())
11333 gold_error(_("%s: SB relative addressing conflicts with use "
11337 // Use the smallest value specified.
11338 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11339 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11341 case elfcpp::Tag_ABI_PCS_wchar_t
:
11342 if (out_attr
[i
].int_value()
11343 && in_attr
[i
].int_value()
11344 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11345 && parameters
->options().warn_mismatch()
11346 && parameters
->options().wchar_size_warning())
11348 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11349 "use %u-byte wchar_t; use of wchar_t values "
11350 "across objects may fail"),
11351 name
, in_attr
[i
].int_value(),
11352 out_attr
[i
].int_value());
11354 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
11355 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11357 case elfcpp::Tag_ABI_enum_size
:
11358 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
11360 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
11361 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
11363 // The existing object is compatible with anything.
11364 // Use whatever requirements the new object has.
11365 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11367 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
11368 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11369 && parameters
->options().warn_mismatch()
11370 && parameters
->options().enum_size_warning())
11372 unsigned int in_value
= in_attr
[i
].int_value();
11373 unsigned int out_value
= out_attr
[i
].int_value();
11374 gold_warning(_("%s uses %s enums yet the output is to use "
11375 "%s enums; use of enum values across objects "
11378 this->aeabi_enum_name(in_value
).c_str(),
11379 this->aeabi_enum_name(out_value
).c_str());
11383 case elfcpp::Tag_ABI_VFP_args
:
11386 case elfcpp::Tag_ABI_WMMX_args
:
11387 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11388 && parameters
->options().warn_mismatch())
11390 gold_error(_("%s uses iWMMXt register arguments, output does "
11395 case Object_attribute::Tag_compatibility
:
11396 // Merged in target-independent code.
11398 case elfcpp::Tag_ABI_HardFP_use
:
11399 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11400 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
11401 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
11402 out_attr
[i
].set_int_value(3);
11403 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11404 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11406 case elfcpp::Tag_ABI_FP_16bit_format
:
11407 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
11409 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11410 && parameters
->options().warn_mismatch())
11411 gold_error(_("fp16 format mismatch between %s and output"),
11414 if (in_attr
[i
].int_value() != 0)
11415 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11418 case elfcpp::Tag_DIV_use
:
11420 // A value of zero on input means that the divide
11421 // instruction may be used if available in the base
11422 // architecture as specified via Tag_CPU_arch and
11423 // Tag_CPU_arch_profile. A value of 1 means that the user
11424 // did not want divide instructions. A value of 2
11425 // explicitly means that divide instructions were allowed
11426 // in ARM and Thumb state.
11428 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
)->
11430 int profile
= this->
11431 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
)->
11433 if (in_attr
[i
].int_value() == out_attr
[i
].int_value())
11437 else if (attributes_forbid_div(&in_attr
[i
])
11438 && !attributes_accept_div(arch
, profile
, &out_attr
[i
]))
11439 out_attr
[i
].set_int_value(1);
11440 else if (attributes_forbid_div(&out_attr
[i
])
11441 && attributes_accept_div(arch
, profile
, &in_attr
[i
]))
11442 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11443 else if (in_attr
[i
].int_value() == 2)
11444 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11448 case elfcpp::Tag_MPextension_use_legacy
:
11449 // We don't output objects with Tag_MPextension_use_legacy - we
11450 // move the value to Tag_MPextension_use.
11451 if (in_attr
[i
].int_value() != 0
11452 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
11454 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
11455 != in_attr
[i
].int_value())
11457 gold_error(_("%s has has both the current and legacy "
11458 "Tag_MPextension_use attributes"),
11463 if (in_attr
[i
].int_value()
11464 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11465 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
11469 case elfcpp::Tag_nodefaults
:
11470 // This tag is set if it exists, but the value is unused (and is
11471 // typically zero). We don't actually need to do anything here -
11472 // the merge happens automatically when the type flags are merged
11475 case elfcpp::Tag_also_compatible_with
:
11476 // Already done in Tag_CPU_arch.
11478 case elfcpp::Tag_conformance
:
11479 // Keep the attribute if it matches. Throw it away otherwise.
11480 // No attribute means no claim to conform.
11481 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
11482 out_attr
[i
].set_string_value("");
11487 const char* err_object
= NULL
;
11489 // The "known_obj_attributes" table does contain some undefined
11490 // attributes. Ensure that there are unused.
11491 if (out_attr
[i
].int_value() != 0
11492 || out_attr
[i
].string_value() != "")
11493 err_object
= "output";
11494 else if (in_attr
[i
].int_value() != 0
11495 || in_attr
[i
].string_value() != "")
11498 if (err_object
!= NULL
11499 && parameters
->options().warn_mismatch())
11501 // Attribute numbers >=64 (mod 128) can be safely ignored.
11502 if ((i
& 127) < 64)
11503 gold_error(_("%s: unknown mandatory EABI object attribute "
11507 gold_warning(_("%s: unknown EABI object attribute %d"),
11511 // Only pass on attributes that match in both inputs.
11512 if (!in_attr
[i
].matches(out_attr
[i
]))
11514 out_attr
[i
].set_int_value(0);
11515 out_attr
[i
].set_string_value("");
11520 // If out_attr was copied from in_attr then it won't have a type yet.
11521 if (in_attr
[i
].type() && !out_attr
[i
].type())
11522 out_attr
[i
].set_type(in_attr
[i
].type());
11525 // Merge Tag_compatibility attributes and any common GNU ones.
11526 this->attributes_section_data_
->merge(name
, pasd
);
11528 // Check for any attributes not known on ARM.
11529 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
11530 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
11531 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
11532 Other_attributes
* out_other_attributes
=
11533 this->attributes_section_data_
->other_attributes(vendor
);
11534 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
11536 while (in_iter
!= in_other_attributes
->end()
11537 || out_iter
!= out_other_attributes
->end())
11539 const char* err_object
= NULL
;
11542 // The tags for each list are in numerical order.
11543 // If the tags are equal, then merge.
11544 if (out_iter
!= out_other_attributes
->end()
11545 && (in_iter
== in_other_attributes
->end()
11546 || in_iter
->first
> out_iter
->first
))
11548 // This attribute only exists in output. We can't merge, and we
11549 // don't know what the tag means, so delete it.
11550 err_object
= "output";
11551 err_tag
= out_iter
->first
;
11552 int saved_tag
= out_iter
->first
;
11553 delete out_iter
->second
;
11554 out_other_attributes
->erase(out_iter
);
11555 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11557 else if (in_iter
!= in_other_attributes
->end()
11558 && (out_iter
!= out_other_attributes
->end()
11559 || in_iter
->first
< out_iter
->first
))
11561 // This attribute only exists in input. We can't merge, and we
11562 // don't know what the tag means, so ignore it.
11564 err_tag
= in_iter
->first
;
11567 else // The tags are equal.
11569 // As present, all attributes in the list are unknown, and
11570 // therefore can't be merged meaningfully.
11571 err_object
= "output";
11572 err_tag
= out_iter
->first
;
11574 // Only pass on attributes that match in both inputs.
11575 if (!in_iter
->second
->matches(*(out_iter
->second
)))
11577 // No match. Delete the attribute.
11578 int saved_tag
= out_iter
->first
;
11579 delete out_iter
->second
;
11580 out_other_attributes
->erase(out_iter
);
11581 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11585 // Matched. Keep the attribute and move to the next.
11591 if (err_object
&& parameters
->options().warn_mismatch())
11593 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11594 if ((err_tag
& 127) < 64)
11596 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11597 err_object
, err_tag
);
11601 gold_warning(_("%s: unknown EABI object attribute %d"),
11602 err_object
, err_tag
);
11608 // Stub-generation methods for Target_arm.
11610 // Make a new Arm_input_section object.
11612 template<bool big_endian
>
11613 Arm_input_section
<big_endian
>*
11614 Target_arm
<big_endian
>::new_arm_input_section(
11616 unsigned int shndx
)
11618 Section_id
sid(relobj
, shndx
);
11620 Arm_input_section
<big_endian
>* arm_input_section
=
11621 new Arm_input_section
<big_endian
>(relobj
, shndx
);
11622 arm_input_section
->init();
11624 // Register new Arm_input_section in map for look-up.
11625 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
11626 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
11628 // Make sure that it we have not created another Arm_input_section
11629 // for this input section already.
11630 gold_assert(ins
.second
);
11632 return arm_input_section
;
11635 // Find the Arm_input_section object corresponding to the SHNDX-th input
11636 // section of RELOBJ.
11638 template<bool big_endian
>
11639 Arm_input_section
<big_endian
>*
11640 Target_arm
<big_endian
>::find_arm_input_section(
11642 unsigned int shndx
) const
11644 Section_id
sid(relobj
, shndx
);
11645 typename
Arm_input_section_map::const_iterator p
=
11646 this->arm_input_section_map_
.find(sid
);
11647 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
11650 // Make a new stub table.
11652 template<bool big_endian
>
11653 Stub_table
<big_endian
>*
11654 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
11656 Stub_table
<big_endian
>* stub_table
=
11657 new Stub_table
<big_endian
>(owner
);
11658 this->stub_tables_
.push_back(stub_table
);
11660 stub_table
->set_address(owner
->address() + owner
->data_size());
11661 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
11662 stub_table
->finalize_data_size();
11667 // Scan a relocation for stub generation.
11669 template<bool big_endian
>
11671 Target_arm
<big_endian
>::scan_reloc_for_stub(
11672 const Relocate_info
<32, big_endian
>* relinfo
,
11673 unsigned int r_type
,
11674 const Sized_symbol
<32>* gsym
,
11675 unsigned int r_sym
,
11676 const Symbol_value
<32>* psymval
,
11677 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
11678 Arm_address address
)
11680 const Arm_relobj
<big_endian
>* arm_relobj
=
11681 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11683 bool target_is_thumb
;
11684 Symbol_value
<32> symval
;
11687 // This is a global symbol. Determine if we use PLT and if the
11688 // final target is THUMB.
11689 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11691 // This uses a PLT, change the symbol value.
11692 symval
.set_output_value(this->plt_address_for_global(gsym
));
11694 target_is_thumb
= false;
11696 else if (gsym
->is_undefined())
11697 // There is no need to generate a stub symbol is undefined.
11702 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11703 || (gsym
->type() == elfcpp::STT_FUNC
11704 && !gsym
->is_undefined()
11705 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11710 // This is a local symbol. Determine if the final target is THUMB.
11711 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11714 // Strip LSB if this points to a THUMB target.
11715 const Arm_reloc_property
* reloc_property
=
11716 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11717 gold_assert(reloc_property
!= NULL
);
11718 if (target_is_thumb
11719 && reloc_property
->uses_thumb_bit()
11720 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11722 Arm_address stripped_value
=
11723 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11724 symval
.set_output_value(stripped_value
);
11728 // Get the symbol value.
11729 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11731 // Owing to pipelining, the PC relative branches below actually skip
11732 // two instructions when the branch offset is 0.
11733 Arm_address destination
;
11736 case elfcpp::R_ARM_CALL
:
11737 case elfcpp::R_ARM_JUMP24
:
11738 case elfcpp::R_ARM_PLT32
:
11740 destination
= value
+ addend
+ 8;
11742 case elfcpp::R_ARM_THM_CALL
:
11743 case elfcpp::R_ARM_THM_XPC22
:
11744 case elfcpp::R_ARM_THM_JUMP24
:
11745 case elfcpp::R_ARM_THM_JUMP19
:
11747 destination
= value
+ addend
+ 4;
11750 gold_unreachable();
11753 Reloc_stub
* stub
= NULL
;
11754 Stub_type stub_type
=
11755 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11757 if (stub_type
!= arm_stub_none
)
11759 // Try looking up an existing stub from a stub table.
11760 Stub_table
<big_endian
>* stub_table
=
11761 arm_relobj
->stub_table(relinfo
->data_shndx
);
11762 gold_assert(stub_table
!= NULL
);
11764 // Locate stub by destination.
11765 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11767 // Create a stub if there is not one already
11768 stub
= stub_table
->find_reloc_stub(stub_key
);
11771 // create a new stub and add it to stub table.
11772 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11773 stub_table
->add_reloc_stub(stub
, stub_key
);
11776 // Record the destination address.
11777 stub
->set_destination_address(destination
11778 | (target_is_thumb
? 1 : 0));
11781 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11782 if (this->fix_cortex_a8_
11783 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11784 || r_type
== elfcpp::R_ARM_THM_JUMP19
11785 || r_type
== elfcpp::R_ARM_THM_CALL
11786 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11787 && (address
& 0xfffU
) == 0xffeU
)
11789 // Found a candidate. Note we haven't checked the destination is
11790 // within 4K here: if we do so (and don't create a record) we can't
11791 // tell that a branch should have been relocated when scanning later.
11792 this->cortex_a8_relocs_info_
[address
] =
11793 new Cortex_a8_reloc(stub
, r_type
,
11794 destination
| (target_is_thumb
? 1 : 0));
11798 // This function scans a relocation sections for stub generation.
11799 // The template parameter Relocate must be a class type which provides
11800 // a single function, relocate(), which implements the machine
11801 // specific part of a relocation.
11803 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11804 // SHT_REL or SHT_RELA.
11806 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11807 // of relocs. OUTPUT_SECTION is the output section.
11808 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11809 // mapped to output offsets.
11811 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11812 // VIEW_SIZE is the size. These refer to the input section, unless
11813 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11814 // the output section.
11816 template<bool big_endian
>
11817 template<int sh_type
>
11819 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11820 const Relocate_info
<32, big_endian
>* relinfo
,
11821 const unsigned char* prelocs
,
11822 size_t reloc_count
,
11823 Output_section
* output_section
,
11824 bool needs_special_offset_handling
,
11825 const unsigned char* view
,
11826 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11829 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11830 const int reloc_size
=
11831 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11833 Arm_relobj
<big_endian
>* arm_object
=
11834 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11835 unsigned int local_count
= arm_object
->local_symbol_count();
11837 gold::Default_comdat_behavior default_comdat_behavior
;
11838 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11840 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11842 Reltype
reloc(prelocs
);
11844 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11845 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11846 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11848 r_type
= this->get_real_reloc_type(r_type
);
11850 // Only a few relocation types need stubs.
11851 if ((r_type
!= elfcpp::R_ARM_CALL
)
11852 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11853 && (r_type
!= elfcpp::R_ARM_PLT32
)
11854 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11855 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11856 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11857 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11858 && (r_type
!= elfcpp::R_ARM_V4BX
))
11861 section_offset_type offset
=
11862 convert_to_section_size_type(reloc
.get_r_offset());
11864 if (needs_special_offset_handling
)
11866 offset
= output_section
->output_offset(relinfo
->object
,
11867 relinfo
->data_shndx
,
11873 // Create a v4bx stub if --fix-v4bx-interworking is used.
11874 if (r_type
== elfcpp::R_ARM_V4BX
)
11876 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11878 // Get the BX instruction.
11879 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11880 const Valtype
* wv
=
11881 reinterpret_cast<const Valtype
*>(view
+ offset
);
11882 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11883 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11884 const uint32_t reg
= (insn
& 0xf);
11888 // Try looking up an existing stub from a stub table.
11889 Stub_table
<big_endian
>* stub_table
=
11890 arm_object
->stub_table(relinfo
->data_shndx
);
11891 gold_assert(stub_table
!= NULL
);
11893 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11895 // create a new stub and add it to stub table.
11896 Arm_v4bx_stub
* stub
=
11897 this->stub_factory().make_arm_v4bx_stub(reg
);
11898 gold_assert(stub
!= NULL
);
11899 stub_table
->add_arm_v4bx_stub(stub
);
11907 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11908 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11909 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11911 const Sized_symbol
<32>* sym
;
11913 Symbol_value
<32> symval
;
11914 const Symbol_value
<32> *psymval
;
11915 bool is_defined_in_discarded_section
;
11916 unsigned int shndx
;
11917 if (r_sym
< local_count
)
11920 psymval
= arm_object
->local_symbol(r_sym
);
11922 // If the local symbol belongs to a section we are discarding,
11923 // and that section is a debug section, try to find the
11924 // corresponding kept section and map this symbol to its
11925 // counterpart in the kept section. The symbol must not
11926 // correspond to a section we are folding.
11928 shndx
= psymval
->input_shndx(&is_ordinary
);
11929 is_defined_in_discarded_section
=
11931 && shndx
!= elfcpp::SHN_UNDEF
11932 && !arm_object
->is_section_included(shndx
)
11933 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11935 // We need to compute the would-be final value of this local
11937 if (!is_defined_in_discarded_section
)
11939 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11940 typename
ObjType::Compute_final_local_value_status status
=
11941 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11943 if (status
== ObjType::CFLV_OK
)
11945 // Currently we cannot handle a branch to a target in
11946 // a merged section. If this is the case, issue an error
11947 // and also free the merge symbol value.
11948 if (!symval
.has_output_value())
11950 const std::string
& section_name
=
11951 arm_object
->section_name(shndx
);
11952 arm_object
->error(_("cannot handle branch to local %u "
11953 "in a merged section %s"),
11954 r_sym
, section_name
.c_str());
11960 // We cannot determine the final value.
11967 const Symbol
* gsym
;
11968 gsym
= arm_object
->global_symbol(r_sym
);
11969 gold_assert(gsym
!= NULL
);
11970 if (gsym
->is_forwarder())
11971 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11973 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11974 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11975 symval
.set_output_symtab_index(sym
->symtab_index());
11977 symval
.set_no_output_symtab_entry();
11979 // We need to compute the would-be final value of this global
11981 const Symbol_table
* symtab
= relinfo
->symtab
;
11982 const Sized_symbol
<32>* sized_symbol
=
11983 symtab
->get_sized_symbol
<32>(gsym
);
11984 Symbol_table::Compute_final_value_status status
;
11985 Arm_address value
=
11986 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11988 // Skip this if the symbol has not output section.
11989 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11991 symval
.set_output_value(value
);
11993 if (gsym
->type() == elfcpp::STT_TLS
)
11994 symval
.set_is_tls_symbol();
11995 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11996 symval
.set_is_ifunc_symbol();
11999 is_defined_in_discarded_section
=
12000 (gsym
->is_defined_in_discarded_section()
12001 && gsym
->is_undefined());
12005 Symbol_value
<32> symval2
;
12006 if (is_defined_in_discarded_section
)
12008 if (comdat_behavior
== CB_UNDETERMINED
)
12010 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
12011 comdat_behavior
= default_comdat_behavior
.get(name
.c_str());
12013 if (comdat_behavior
== CB_PRETEND
)
12015 // FIXME: This case does not work for global symbols.
12016 // We have no place to store the original section index.
12017 // Fortunately this does not matter for comdat sections,
12018 // only for sections explicitly discarded by a linker
12021 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
12022 arm_object
->map_to_kept_section(shndx
, &found
);
12024 symval2
.set_output_value(value
+ psymval
->input_value());
12026 symval2
.set_output_value(0);
12030 if (comdat_behavior
== CB_WARNING
)
12031 gold_warning_at_location(relinfo
, i
, offset
,
12032 _("relocation refers to discarded "
12034 symval2
.set_output_value(0);
12036 symval2
.set_no_output_symtab_entry();
12037 psymval
= &symval2
;
12040 // If symbol is a section symbol, we don't know the actual type of
12041 // destination. Give up.
12042 if (psymval
->is_section_symbol())
12045 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
12046 addend
, view_address
+ offset
);
12050 // Scan an input section for stub generation.
12052 template<bool big_endian
>
12054 Target_arm
<big_endian
>::scan_section_for_stubs(
12055 const Relocate_info
<32, big_endian
>* relinfo
,
12056 unsigned int sh_type
,
12057 const unsigned char* prelocs
,
12058 size_t reloc_count
,
12059 Output_section
* output_section
,
12060 bool needs_special_offset_handling
,
12061 const unsigned char* view
,
12062 Arm_address view_address
,
12063 section_size_type view_size
)
12065 if (sh_type
== elfcpp::SHT_REL
)
12066 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
12071 needs_special_offset_handling
,
12075 else if (sh_type
== elfcpp::SHT_RELA
)
12076 // We do not support RELA type relocations yet. This is provided for
12078 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
12083 needs_special_offset_handling
,
12088 gold_unreachable();
12091 // Group input sections for stub generation.
12093 // We group input sections in an output section so that the total size,
12094 // including any padding space due to alignment is smaller than GROUP_SIZE
12095 // unless the only input section in group is bigger than GROUP_SIZE already.
12096 // Then an ARM stub table is created to follow the last input section
12097 // in group. For each group an ARM stub table is created an is placed
12098 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12099 // extend the group after the stub table.
12101 template<bool big_endian
>
12103 Target_arm
<big_endian
>::group_sections(
12105 section_size_type group_size
,
12106 bool stubs_always_after_branch
,
12109 // Group input sections and insert stub table
12110 Layout::Section_list section_list
;
12111 layout
->get_executable_sections(§ion_list
);
12112 for (Layout::Section_list::const_iterator p
= section_list
.begin();
12113 p
!= section_list
.end();
12116 Arm_output_section
<big_endian
>* output_section
=
12117 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12118 output_section
->group_sections(group_size
, stubs_always_after_branch
,
12123 // Relaxation hook. This is where we do stub generation.
12125 template<bool big_endian
>
12127 Target_arm
<big_endian
>::do_relax(
12129 const Input_objects
* input_objects
,
12130 Symbol_table
* symtab
,
12134 // No need to generate stubs if this is a relocatable link.
12135 gold_assert(!parameters
->options().relocatable());
12137 // If this is the first pass, we need to group input sections into
12139 bool done_exidx_fixup
= false;
12140 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
12143 // Determine the stub group size. The group size is the absolute
12144 // value of the parameter --stub-group-size. If --stub-group-size
12145 // is passed a negative value, we restrict stubs to be always after
12146 // the stubbed branches.
12147 int32_t stub_group_size_param
=
12148 parameters
->options().stub_group_size();
12149 bool stubs_always_after_branch
= stub_group_size_param
< 0;
12150 section_size_type stub_group_size
= abs(stub_group_size_param
);
12152 if (stub_group_size
== 1)
12155 // Thumb branch range is +-4MB has to be used as the default
12156 // maximum size (a given section can contain both ARM and Thumb
12157 // code, so the worst case has to be taken into account). If we are
12158 // fixing cortex-a8 errata, the branch range has to be even smaller,
12159 // since wide conditional branch has a range of +-1MB only.
12161 // This value is 48K less than that, which allows for 4096
12162 // 12-byte stubs. If we exceed that, then we will fail to link.
12163 // The user will have to relink with an explicit group size
12165 stub_group_size
= 4145152;
12168 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12169 // page as the first half of a 32-bit branch straddling two 4K pages.
12170 // This is a crude way of enforcing that. In addition, long conditional
12171 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12172 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12173 // cortex-A8 stubs from long conditional branches.
12174 if (this->fix_cortex_a8_
)
12176 stubs_always_after_branch
= true;
12177 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
12178 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
12181 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
12183 // Also fix .ARM.exidx section coverage.
12184 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
12185 for (Layout::Section_list::const_iterator p
=
12186 layout
->section_list().begin();
12187 p
!= layout
->section_list().end();
12189 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
12191 if (exidx_output_section
== NULL
)
12192 exidx_output_section
=
12193 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12195 // We cannot handle this now.
12196 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12197 "non-relocatable link"),
12198 exidx_output_section
->name(),
12202 if (exidx_output_section
!= NULL
)
12204 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
12206 done_exidx_fixup
= true;
12211 // If this is not the first pass, addresses and file offsets have
12212 // been reset at this point, set them here.
12213 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12214 sp
!= this->stub_tables_
.end();
12217 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12218 off_t off
= align_address(owner
->original_size(),
12219 (*sp
)->addralign());
12220 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
12221 owner
->offset() + off
);
12225 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12226 // beginning of each relaxation pass, just blow away all the stubs.
12227 // Alternatively, we could selectively remove only the stubs and reloc
12228 // information for code sections that have moved since the last pass.
12229 // That would require more book-keeping.
12230 if (this->fix_cortex_a8_
)
12232 // Clear all Cortex-A8 reloc information.
12233 for (typename
Cortex_a8_relocs_info::const_iterator p
=
12234 this->cortex_a8_relocs_info_
.begin();
12235 p
!= this->cortex_a8_relocs_info_
.end();
12238 this->cortex_a8_relocs_info_
.clear();
12240 // Remove all Cortex-A8 stubs.
12241 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12242 sp
!= this->stub_tables_
.end();
12244 (*sp
)->remove_all_cortex_a8_stubs();
12247 // Scan relocs for relocation stubs
12248 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12249 op
!= input_objects
->relobj_end();
12252 Arm_relobj
<big_endian
>* arm_relobj
=
12253 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12254 // Lock the object so we can read from it. This is only called
12255 // single-threaded from Layout::finalize, so it is OK to lock.
12256 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12257 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
12260 // Check all stub tables to see if any of them have their data sizes
12261 // or addresses alignments changed. These are the only things that
12263 bool any_stub_table_changed
= false;
12264 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
12265 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12266 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12269 if ((*sp
)->update_data_size_and_addralign())
12271 // Update data size of stub table owner.
12272 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12273 uint64_t address
= owner
->address();
12274 off_t offset
= owner
->offset();
12275 owner
->reset_address_and_file_offset();
12276 owner
->set_address_and_file_offset(address
, offset
);
12278 sections_needing_adjustment
.insert(owner
->output_section());
12279 any_stub_table_changed
= true;
12283 // Output_section_data::output_section() returns a const pointer but we
12284 // need to update output sections, so we record all output sections needing
12285 // update above and scan the sections here to find out what sections need
12287 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
12288 p
!= layout
->section_list().end();
12291 if (sections_needing_adjustment
.find(*p
)
12292 != sections_needing_adjustment
.end())
12293 (*p
)->set_section_offsets_need_adjustment();
12296 // Stop relaxation if no EXIDX fix-up and no stub table change.
12297 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
12299 // Finalize the stubs in the last relaxation pass.
12300 if (!continue_relaxation
)
12302 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12303 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12305 (*sp
)->finalize_stubs();
12307 // Update output local symbol counts of objects if necessary.
12308 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12309 op
!= input_objects
->relobj_end();
12312 Arm_relobj
<big_endian
>* arm_relobj
=
12313 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12315 // Update output local symbol counts. We need to discard local
12316 // symbols defined in parts of input sections that are discarded by
12318 if (arm_relobj
->output_local_symbol_count_needs_update())
12320 // We need to lock the object's file to update it.
12321 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12322 arm_relobj
->update_output_local_symbol_count();
12327 return continue_relaxation
;
12330 // Relocate a stub.
12332 template<bool big_endian
>
12334 Target_arm
<big_endian
>::relocate_stub(
12336 const Relocate_info
<32, big_endian
>* relinfo
,
12337 Output_section
* output_section
,
12338 unsigned char* view
,
12339 Arm_address address
,
12340 section_size_type view_size
)
12343 const Stub_template
* stub_template
= stub
->stub_template();
12344 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
12346 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
12347 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
12349 unsigned int r_type
= insn
->r_type();
12350 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
12351 section_size_type reloc_size
= insn
->size();
12352 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
12354 // This is the address of the stub destination.
12355 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
12356 Symbol_value
<32> symval
;
12357 symval
.set_output_value(target
);
12359 // Synthesize a fake reloc just in case. We don't have a symbol so
12361 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
12362 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
12363 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
12364 reloc_write
.put_r_offset(reloc_offset
);
12365 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
12367 relocate
.relocate(relinfo
, elfcpp::SHT_REL
, this, output_section
,
12368 this->fake_relnum_for_stubs
, reloc_buffer
,
12369 NULL
, &symval
, view
+ reloc_offset
,
12370 address
+ reloc_offset
, reloc_size
);
12374 // Determine whether an object attribute tag takes an integer, a
12377 template<bool big_endian
>
12379 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
12381 if (tag
== Object_attribute::Tag_compatibility
)
12382 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12383 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
12384 else if (tag
== elfcpp::Tag_nodefaults
)
12385 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12386 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
12387 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
12388 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
12390 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
12392 return ((tag
& 1) != 0
12393 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12394 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
12397 // Reorder attributes.
12399 // The ABI defines that Tag_conformance should be emitted first, and that
12400 // Tag_nodefaults should be second (if either is defined). This sets those
12401 // two positions, and bumps up the position of all the remaining tags to
12404 template<bool big_endian
>
12406 Target_arm
<big_endian
>::do_attributes_order(int num
) const
12408 // Reorder the known object attributes in output. We want to move
12409 // Tag_conformance to position 4 and Tag_conformance to position 5
12410 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12412 return elfcpp::Tag_conformance
;
12414 return elfcpp::Tag_nodefaults
;
12415 if ((num
- 2) < elfcpp::Tag_nodefaults
)
12417 if ((num
- 1) < elfcpp::Tag_conformance
)
12422 // Scan a span of THUMB code for Cortex-A8 erratum.
12424 template<bool big_endian
>
12426 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
12427 Arm_relobj
<big_endian
>* arm_relobj
,
12428 unsigned int shndx
,
12429 section_size_type span_start
,
12430 section_size_type span_end
,
12431 const unsigned char* view
,
12432 Arm_address address
)
12434 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12436 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12437 // The branch target is in the same 4KB region as the
12438 // first half of the branch.
12439 // The instruction before the branch is a 32-bit
12440 // length non-branch instruction.
12441 section_size_type i
= span_start
;
12442 bool last_was_32bit
= false;
12443 bool last_was_branch
= false;
12444 while (i
< span_end
)
12446 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12447 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
12448 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12449 bool is_blx
= false, is_b
= false;
12450 bool is_bl
= false, is_bcc
= false;
12452 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
12455 // Load the rest of the insn (in manual-friendly order).
12456 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12458 // Encoding T4: B<c>.W.
12459 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
12460 // Encoding T1: BL<c>.W.
12461 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
12462 // Encoding T2: BLX<c>.W.
12463 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
12464 // Encoding T3: B<c>.W (not permitted in IT block).
12465 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
12466 && (insn
& 0x07f00000U
) != 0x03800000U
);
12469 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
12471 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12472 // page boundary and it follows 32-bit non-branch instruction,
12473 // we need to work around.
12474 if (is_32bit_branch
12475 && ((address
+ i
) & 0xfffU
) == 0xffeU
12477 && !last_was_branch
)
12479 // Check to see if there is a relocation stub for this branch.
12480 bool force_target_arm
= false;
12481 bool force_target_thumb
= false;
12482 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
12483 Cortex_a8_relocs_info::const_iterator p
=
12484 this->cortex_a8_relocs_info_
.find(address
+ i
);
12486 if (p
!= this->cortex_a8_relocs_info_
.end())
12488 cortex_a8_reloc
= p
->second
;
12489 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
12491 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12492 && !target_is_thumb
)
12493 force_target_arm
= true;
12494 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12495 && target_is_thumb
)
12496 force_target_thumb
= true;
12500 Stub_type stub_type
= arm_stub_none
;
12502 // Check if we have an offending branch instruction.
12503 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
12504 uint16_t lower_insn
= insn
& 0xffffU
;
12505 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12507 if (cortex_a8_reloc
!= NULL
12508 && cortex_a8_reloc
->reloc_stub() != NULL
)
12509 // We've already made a stub for this instruction, e.g.
12510 // it's a long branch or a Thumb->ARM stub. Assume that
12511 // stub will suffice to work around the A8 erratum (see
12512 // setting of always_after_branch above).
12516 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
12518 stub_type
= arm_stub_a8_veneer_b_cond
;
12520 else if (is_b
|| is_bl
|| is_blx
)
12522 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
12527 stub_type
= (is_blx
12528 ? arm_stub_a8_veneer_blx
12530 ? arm_stub_a8_veneer_bl
12531 : arm_stub_a8_veneer_b
));
12534 if (stub_type
!= arm_stub_none
)
12536 Arm_address pc_for_insn
= address
+ i
+ 4;
12538 // The original instruction is a BL, but the target is
12539 // an ARM instruction. If we were not making a stub,
12540 // the BL would have been converted to a BLX. Use the
12541 // BLX stub instead in that case.
12542 if (this->may_use_v5t_interworking() && force_target_arm
12543 && stub_type
== arm_stub_a8_veneer_bl
)
12545 stub_type
= arm_stub_a8_veneer_blx
;
12549 // Conversely, if the original instruction was
12550 // BLX but the target is Thumb mode, use the BL stub.
12551 else if (force_target_thumb
12552 && stub_type
== arm_stub_a8_veneer_blx
)
12554 stub_type
= arm_stub_a8_veneer_bl
;
12562 // If we found a relocation, use the proper destination,
12563 // not the offset in the (unrelocated) instruction.
12564 // Note this is always done if we switched the stub type above.
12565 if (cortex_a8_reloc
!= NULL
)
12566 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
12568 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
12570 // Add a new stub if destination address in in the same page.
12571 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
12573 Cortex_a8_stub
* stub
=
12574 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
12578 Stub_table
<big_endian
>* stub_table
=
12579 arm_relobj
->stub_table(shndx
);
12580 gold_assert(stub_table
!= NULL
);
12581 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
12586 i
+= insn_32bit
? 4 : 2;
12587 last_was_32bit
= insn_32bit
;
12588 last_was_branch
= is_32bit_branch
;
12592 // Apply the Cortex-A8 workaround.
12594 template<bool big_endian
>
12596 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
12597 const Cortex_a8_stub
* stub
,
12598 Arm_address stub_address
,
12599 unsigned char* insn_view
,
12600 Arm_address insn_address
)
12602 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12603 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
12604 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12605 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12606 off_t branch_offset
= stub_address
- (insn_address
+ 4);
12608 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12609 switch (stub
->stub_template()->type())
12611 case arm_stub_a8_veneer_b_cond
:
12612 // For a conditional branch, we re-write it to be an unconditional
12613 // branch to the stub. We use the THUMB-2 encoding here.
12614 upper_insn
= 0xf000U
;
12615 lower_insn
= 0xb800U
;
12617 case arm_stub_a8_veneer_b
:
12618 case arm_stub_a8_veneer_bl
:
12619 case arm_stub_a8_veneer_blx
:
12620 if ((lower_insn
& 0x5000U
) == 0x4000U
)
12621 // For a BLX instruction, make sure that the relocation is
12622 // rounded up to a word boundary. This follows the semantics of
12623 // the instruction which specifies that bit 1 of the target
12624 // address will come from bit 1 of the base address.
12625 branch_offset
= (branch_offset
+ 2) & ~3;
12627 // Put BRANCH_OFFSET back into the insn.
12628 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
12629 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
12630 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
12634 gold_unreachable();
12637 // Put the relocated value back in the object file:
12638 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
12639 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
12642 // Target selector for ARM. Note this is never instantiated directly.
12643 // It's only used in Target_selector_arm_nacl, below.
12645 template<bool big_endian
>
12646 class Target_selector_arm
: public Target_selector
12649 Target_selector_arm()
12650 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
12651 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
12652 (big_endian
? "armelfb" : "armelf"))
12656 do_instantiate_target()
12657 { return new Target_arm
<big_endian
>(); }
12660 // Fix .ARM.exidx section coverage.
12662 template<bool big_endian
>
12664 Target_arm
<big_endian
>::fix_exidx_coverage(
12666 const Input_objects
* input_objects
,
12667 Arm_output_section
<big_endian
>* exidx_section
,
12668 Symbol_table
* symtab
,
12671 // We need to look at all the input sections in output in ascending
12672 // order of of output address. We do that by building a sorted list
12673 // of output sections by addresses. Then we looks at the output sections
12674 // in order. The input sections in an output section are already sorted
12675 // by addresses within the output section.
12677 typedef std::set
<Output_section
*, output_section_address_less_than
>
12678 Sorted_output_section_list
;
12679 Sorted_output_section_list sorted_output_sections
;
12681 // Find out all the output sections of input sections pointed by
12682 // EXIDX input sections.
12683 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
12684 p
!= input_objects
->relobj_end();
12687 Arm_relobj
<big_endian
>* arm_relobj
=
12688 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12689 std::vector
<unsigned int> shndx_list
;
12690 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12691 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12693 const Arm_exidx_input_section
* exidx_input_section
=
12694 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12695 gold_assert(exidx_input_section
!= NULL
);
12696 if (!exidx_input_section
->has_errors())
12698 unsigned int text_shndx
= exidx_input_section
->link();
12699 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12700 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12701 sorted_output_sections
.insert(os
);
12706 // Go over the output sections in ascending order of output addresses.
12707 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12709 Text_section_list sorted_text_sections
;
12710 for (typename
Sorted_output_section_list::iterator p
=
12711 sorted_output_sections
.begin();
12712 p
!= sorted_output_sections
.end();
12715 Arm_output_section
<big_endian
>* arm_output_section
=
12716 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12717 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12720 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12721 merge_exidx_entries(), task
);
12724 template<bool big_endian
>
12726 Target_arm
<big_endian
>::do_define_standard_symbols(
12727 Symbol_table
* symtab
,
12730 // Handle the .ARM.exidx section.
12731 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12733 if (exidx_section
!= NULL
)
12735 // Create __exidx_start and __exidx_end symbols.
12736 symtab
->define_in_output_data("__exidx_start",
12738 Symbol_table::PREDEFINED
,
12742 elfcpp::STT_NOTYPE
,
12743 elfcpp::STB_GLOBAL
,
12744 elfcpp::STV_HIDDEN
,
12746 false, // offset_is_from_end
12747 true); // only_if_ref
12749 symtab
->define_in_output_data("__exidx_end",
12751 Symbol_table::PREDEFINED
,
12755 elfcpp::STT_NOTYPE
,
12756 elfcpp::STB_GLOBAL
,
12757 elfcpp::STV_HIDDEN
,
12759 true, // offset_is_from_end
12760 true); // only_if_ref
12764 // Define __exidx_start and __exidx_end even when .ARM.exidx
12765 // section is missing to match ld's behaviour.
12766 symtab
->define_as_constant("__exidx_start", NULL
,
12767 Symbol_table::PREDEFINED
,
12768 0, 0, elfcpp::STT_OBJECT
,
12769 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12771 symtab
->define_as_constant("__exidx_end", NULL
,
12772 Symbol_table::PREDEFINED
,
12773 0, 0, elfcpp::STT_OBJECT
,
12774 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12779 // NaCl variant. It uses different PLT contents.
12781 template<bool big_endian
>
12782 class Output_data_plt_arm_nacl
;
12784 template<bool big_endian
>
12785 class Target_arm_nacl
: public Target_arm
<big_endian
>
12789 : Target_arm
<big_endian
>(&arm_nacl_info
)
12793 virtual Output_data_plt_arm
<big_endian
>*
12796 Arm_output_data_got
<big_endian
>* got
,
12797 Output_data_space
* got_plt
,
12798 Output_data_space
* got_irelative
)
12799 { return new Output_data_plt_arm_nacl
<big_endian
>(
12800 layout
, got
, got_plt
, got_irelative
); }
12803 static const Target::Target_info arm_nacl_info
;
12806 template<bool big_endian
>
12807 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
12810 big_endian
, // is_big_endian
12811 elfcpp::EM_ARM
, // machine_code
12812 false, // has_make_symbol
12813 false, // has_resolve
12814 false, // has_code_fill
12815 true, // is_default_stack_executable
12816 false, // can_icf_inline_merge_sections
12818 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12819 0x20000, // default_text_segment_address
12820 0x10000, // abi_pagesize (overridable by -z max-page-size)
12821 0x10000, // common_pagesize (overridable by -z common-page-size)
12822 true, // isolate_execinstr
12823 0x10000000, // rosegment_gap
12824 elfcpp::SHN_UNDEF
, // small_common_shndx
12825 elfcpp::SHN_UNDEF
, // large_common_shndx
12826 0, // small_common_section_flags
12827 0, // large_common_section_flags
12828 ".ARM.attributes", // attributes_section
12829 "aeabi", // attributes_vendor
12830 "_start", // entry_symbol_name
12831 32, // hash_entry_size
12834 template<bool big_endian
>
12835 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
12838 Output_data_plt_arm_nacl(
12840 Arm_output_data_got
<big_endian
>* got
,
12841 Output_data_space
* got_plt
,
12842 Output_data_space
* got_irelative
)
12843 : Output_data_plt_arm
<big_endian
>(layout
, 16, got
, got_plt
, got_irelative
)
12847 // Return the offset of the first non-reserved PLT entry.
12848 virtual unsigned int
12849 do_first_plt_entry_offset() const
12850 { return sizeof(first_plt_entry
); }
12852 // Return the size of a PLT entry.
12853 virtual unsigned int
12854 do_get_plt_entry_size() const
12855 { return sizeof(plt_entry
); }
12858 do_fill_first_plt_entry(unsigned char* pov
,
12859 Arm_address got_address
,
12860 Arm_address plt_address
);
12863 do_fill_plt_entry(unsigned char* pov
,
12864 Arm_address got_address
,
12865 Arm_address plt_address
,
12866 unsigned int got_offset
,
12867 unsigned int plt_offset
);
12870 inline uint32_t arm_movw_immediate(uint32_t value
)
12872 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
12875 inline uint32_t arm_movt_immediate(uint32_t value
)
12877 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
12880 // Template for the first PLT entry.
12881 static const uint32_t first_plt_entry
[16];
12883 // Template for subsequent PLT entries.
12884 static const uint32_t plt_entry
[4];
12887 // The first entry in the PLT.
12888 template<bool big_endian
>
12889 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
12892 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12893 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12894 0xe08cc00f, // add ip, ip, pc
12895 0xe52dc008, // str ip, [sp, #-8]!
12897 0xe3ccc103, // bic ip, ip, #0xc0000000
12898 0xe59cc000, // ldr ip, [ip]
12899 0xe3ccc13f, // bic ip, ip, #0xc000000f
12900 0xe12fff1c, // bx ip
12906 0xe50dc004, // str ip, [sp, #-4]
12908 0xe3ccc103, // bic ip, ip, #0xc0000000
12909 0xe59cc000, // ldr ip, [ip]
12910 0xe3ccc13f, // bic ip, ip, #0xc000000f
12911 0xe12fff1c, // bx ip
12914 template<bool big_endian
>
12916 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
12917 unsigned char* pov
,
12918 Arm_address got_address
,
12919 Arm_address plt_address
)
12921 // Write first PLT entry. All but first two words are constants.
12922 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
12923 / sizeof(first_plt_entry
[0]));
12925 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
12927 elfcpp::Swap
<32, big_endian
>::writeval
12928 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
12929 elfcpp::Swap
<32, big_endian
>::writeval
12930 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
12932 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
12933 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
12936 // Subsequent entries in the PLT.
12938 template<bool big_endian
>
12939 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
12941 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12942 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12943 0xe08cc00f, // add ip, ip, pc
12944 0xea000000, // b .Lplt_tail
12947 template<bool big_endian
>
12949 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
12950 unsigned char* pov
,
12951 Arm_address got_address
,
12952 Arm_address plt_address
,
12953 unsigned int got_offset
,
12954 unsigned int plt_offset
)
12956 // Calculate the displacement between the PLT slot and the
12957 // common tail that's part of the special initial PLT slot.
12958 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
12959 - (plt_address
+ plt_offset
12960 + sizeof(plt_entry
) + sizeof(uint32_t)));
12961 gold_assert((tail_displacement
& 3) == 0);
12962 tail_displacement
>>= 2;
12964 gold_assert ((tail_displacement
& 0xff000000) == 0
12965 || (-tail_displacement
& 0xff000000) == 0);
12967 // Calculate the displacement between the PLT slot and the entry
12968 // in the GOT. The offset accounts for the value produced by
12969 // adding to pc in the penultimate instruction of the PLT stub.
12970 const int32_t got_displacement
= (got_address
+ got_offset
12971 - (plt_address
+ sizeof(plt_entry
)));
12973 elfcpp::Swap
<32, big_endian
>::writeval
12974 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
12975 elfcpp::Swap
<32, big_endian
>::writeval
12976 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
12977 elfcpp::Swap
<32, big_endian
>::writeval
12978 (pov
+ 8, plt_entry
[2]);
12979 elfcpp::Swap
<32, big_endian
>::writeval
12980 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
12983 // Target selectors.
12985 template<bool big_endian
>
12986 class Target_selector_arm_nacl
12987 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
12988 Target_arm_nacl
<big_endian
> >
12991 Target_selector_arm_nacl()
12992 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
12993 Target_arm_nacl
<big_endian
> >(
12995 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12996 big_endian
? "armelfb_nacl" : "armelf_nacl")
13000 Target_selector_arm_nacl
<false> target_selector_arm
;
13001 Target_selector_arm_nacl
<true> target_selector_armbe
;
13003 } // End anonymous namespace.