1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian
>
61 class Output_data_plt_arm
;
63 template<bool big_endian
>
66 template<bool big_endian
>
67 class Arm_input_section
;
69 class Arm_exidx_cantunwind
;
71 class Arm_exidx_merged_section
;
73 class Arm_exidx_fixup
;
75 template<bool big_endian
>
76 class Arm_output_section
;
78 class Arm_exidx_input_section
;
80 template<bool big_endian
>
83 template<bool big_endian
>
84 class Arm_relocate_functions
;
86 template<bool big_endian
>
87 class Arm_output_data_got
;
89 template<bool big_endian
>
93 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
95 // Maximum branch offsets for ARM, THUMB and THUMB2.
96 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
97 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
98 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
99 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
100 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
101 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
103 // Thread Control Block size.
104 const size_t ARM_TCB_SIZE
= 8;
106 // The arm target class.
108 // This is a very simple port of gold for ARM-EABI. It is intended for
109 // supporting Android only for the time being.
112 // - Implement all static relocation types documented in arm-reloc.def.
113 // - Make PLTs more flexible for different architecture features like
115 // There are probably a lot more.
117 // Ideally we would like to avoid using global variables but this is used
118 // very in many places and sometimes in loops. If we use a function
119 // returning a static instance of Arm_reloc_property_table, it will be very
120 // slow in an threaded environment since the static instance needs to be
121 // locked. The pointer is below initialized in the
122 // Target::do_select_as_default_target() hook so that we do not spend time
123 // building the table if we are not linking ARM objects.
125 // An alternative is to to process the information in arm-reloc.def in
126 // compilation time and generate a representation of it in PODs only. That
127 // way we can avoid initialization when the linker starts.
129 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
131 // Instruction template class. This class is similar to the insn_sequence
132 // struct in bfd/elf32-arm.c.
137 // Types of instruction templates.
141 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
142 // templates with class-specific semantics. Currently this is used
143 // only by the Cortex_a8_stub class for handling condition codes in
144 // conditional branches.
145 THUMB16_SPECIAL_TYPE
,
151 // Factory methods to create instruction templates in different formats.
153 static const Insn_template
154 thumb16_insn(uint32_t data
)
155 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
157 // A Thumb conditional branch, in which the proper condition is inserted
158 // when we build the stub.
159 static const Insn_template
160 thumb16_bcond_insn(uint32_t data
)
161 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
163 static const Insn_template
164 thumb32_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
167 static const Insn_template
168 thumb32_b_insn(uint32_t data
, int reloc_addend
)
170 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
174 static const Insn_template
175 arm_insn(uint32_t data
)
176 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
178 static const Insn_template
179 arm_rel_insn(unsigned data
, int reloc_addend
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
182 static const Insn_template
183 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
184 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
186 // Accessors. This class is used for read-only objects so no modifiers
191 { return this->data_
; }
193 // Return the instruction sequence type of this.
196 { return this->type_
; }
198 // Return the ARM relocation type of this.
201 { return this->r_type_
; }
205 { return this->reloc_addend_
; }
207 // Return size of instruction template in bytes.
211 // Return byte-alignment of instruction template.
216 // We make the constructor private to ensure that only the factory
219 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
220 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
223 // Instruction specific data. This is used to store information like
224 // some of the instruction bits.
226 // Instruction template type.
228 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
229 unsigned int r_type_
;
230 // Relocation addend.
231 int32_t reloc_addend_
;
234 // Macro for generating code to stub types. One entry per long/short
238 DEF_STUB(long_branch_any_any) \
239 DEF_STUB(long_branch_v4t_arm_thumb) \
240 DEF_STUB(long_branch_thumb_only) \
241 DEF_STUB(long_branch_v4t_thumb_thumb) \
242 DEF_STUB(long_branch_v4t_thumb_arm) \
243 DEF_STUB(short_branch_v4t_thumb_arm) \
244 DEF_STUB(long_branch_any_arm_pic) \
245 DEF_STUB(long_branch_any_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
247 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
248 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
249 DEF_STUB(long_branch_thumb_only_pic) \
250 DEF_STUB(a8_veneer_b_cond) \
251 DEF_STUB(a8_veneer_b) \
252 DEF_STUB(a8_veneer_bl) \
253 DEF_STUB(a8_veneer_blx) \
254 DEF_STUB(v4_veneer_bx)
258 #define DEF_STUB(x) arm_stub_##x,
264 // First reloc stub type.
265 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
266 // Last reloc stub type.
267 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
269 // First Cortex-A8 stub type.
270 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
271 // Last Cortex-A8 stub type.
272 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
275 arm_stub_type_last
= arm_stub_v4_veneer_bx
279 // Stub template class. Templates are meant to be read-only objects.
280 // A stub template for a stub type contains all read-only attributes
281 // common to all stubs of the same type.
286 Stub_template(Stub_type
, const Insn_template
*, size_t);
294 { return this->type_
; }
296 // Return an array of instruction templates.
299 { return this->insns_
; }
301 // Return size of template in number of instructions.
304 { return this->insn_count_
; }
306 // Return size of template in bytes.
309 { return this->size_
; }
311 // Return alignment of the stub template.
314 { return this->alignment_
; }
316 // Return whether entry point is in thumb mode.
318 entry_in_thumb_mode() const
319 { return this->entry_in_thumb_mode_
; }
321 // Return number of relocations in this template.
324 { return this->relocs_
.size(); }
326 // Return index of the I-th instruction with relocation.
328 reloc_insn_index(size_t i
) const
330 gold_assert(i
< this->relocs_
.size());
331 return this->relocs_
[i
].first
;
334 // Return the offset of the I-th instruction with relocation from the
335 // beginning of the stub.
337 reloc_offset(size_t i
) const
339 gold_assert(i
< this->relocs_
.size());
340 return this->relocs_
[i
].second
;
344 // This contains information about an instruction template with a relocation
345 // and its offset from start of stub.
346 typedef std::pair
<size_t, section_size_type
> Reloc
;
348 // A Stub_template may not be copied. We want to share templates as much
350 Stub_template(const Stub_template
&);
351 Stub_template
& operator=(const Stub_template
&);
355 // Points to an array of Insn_templates.
356 const Insn_template
* insns_
;
357 // Number of Insn_templates in insns_[].
359 // Size of templated instructions in bytes.
361 // Alignment of templated instructions.
363 // Flag to indicate if entry is in thumb mode.
364 bool entry_in_thumb_mode_
;
365 // A table of reloc instruction indices and offsets. We can find these by
366 // looking at the instruction templates but we pre-compute and then stash
367 // them here for speed.
368 std::vector
<Reloc
> relocs_
;
372 // A class for code stubs. This is a base class for different type of
373 // stubs used in the ARM target.
379 static const section_offset_type invalid_offset
=
380 static_cast<section_offset_type
>(-1);
383 Stub(const Stub_template
* stub_template
)
384 : stub_template_(stub_template
), offset_(invalid_offset
)
391 // Return the stub template.
393 stub_template() const
394 { return this->stub_template_
; }
396 // Return offset of code stub from beginning of its containing stub table.
400 gold_assert(this->offset_
!= invalid_offset
);
401 return this->offset_
;
404 // Set offset of code stub from beginning of its containing stub table.
406 set_offset(section_offset_type offset
)
407 { this->offset_
= offset
; }
409 // Return the relocation target address of the i-th relocation in the
410 // stub. This must be defined in a child class.
412 reloc_target(size_t i
)
413 { return this->do_reloc_target(i
); }
415 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
417 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
418 { this->do_write(view
, view_size
, big_endian
); }
420 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
421 // for the i-th instruction.
423 thumb16_special(size_t i
)
424 { return this->do_thumb16_special(i
); }
427 // This must be defined in the child class.
429 do_reloc_target(size_t) = 0;
431 // This may be overridden in the child class.
433 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
436 this->do_fixed_endian_write
<true>(view
, view_size
);
438 this->do_fixed_endian_write
<false>(view
, view_size
);
441 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
442 // instruction template.
444 do_thumb16_special(size_t)
445 { gold_unreachable(); }
448 // A template to implement do_write.
449 template<bool big_endian
>
451 do_fixed_endian_write(unsigned char*, section_size_type
);
454 const Stub_template
* stub_template_
;
455 // Offset within the section of containing this stub.
456 section_offset_type offset_
;
459 // Reloc stub class. These are stubs we use to fix up relocation because
460 // of limited branch ranges.
462 class Reloc_stub
: public Stub
465 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
466 // We assume we never jump to this address.
467 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
469 // Return destination address.
471 destination_address() const
473 gold_assert(this->destination_address_
!= this->invalid_address
);
474 return this->destination_address_
;
477 // Set destination address.
479 set_destination_address(Arm_address address
)
481 gold_assert(address
!= this->invalid_address
);
482 this->destination_address_
= address
;
485 // Reset destination address.
487 reset_destination_address()
488 { this->destination_address_
= this->invalid_address
; }
490 // Determine stub type for a branch of a relocation of R_TYPE going
491 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
492 // the branch target is a thumb instruction. TARGET is used for look
493 // up ARM-specific linker settings.
495 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
496 Arm_address branch_target
, bool target_is_thumb
);
498 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
499 // and an addend. Since we treat global and local symbol differently, we
500 // use a Symbol object for a global symbol and a object-index pair for
505 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
506 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
507 // and R_SYM must not be invalid_index.
508 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
509 unsigned int r_sym
, int32_t addend
)
510 : stub_type_(stub_type
), addend_(addend
)
514 this->r_sym_
= Reloc_stub::invalid_index
;
515 this->u_
.symbol
= symbol
;
519 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
520 this->r_sym_
= r_sym
;
521 this->u_
.relobj
= relobj
;
528 // Accessors: Keys are meant to be read-only object so no modifiers are
534 { return this->stub_type_
; }
536 // Return the local symbol index or invalid_index.
539 { return this->r_sym_
; }
541 // Return the symbol if there is one.
544 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
546 // Return the relobj if there is one.
549 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
551 // Whether this equals to another key k.
553 eq(const Key
& k
) const
555 return ((this->stub_type_
== k
.stub_type_
)
556 && (this->r_sym_
== k
.r_sym_
)
557 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
558 ? (this->u_
.relobj
== k
.u_
.relobj
)
559 : (this->u_
.symbol
== k
.u_
.symbol
))
560 && (this->addend_
== k
.addend_
));
563 // Return a hash value.
567 return (this->stub_type_
569 ^ gold::string_hash
<char>(
570 (this->r_sym_
!= Reloc_stub::invalid_index
)
571 ? this->u_
.relobj
->name().c_str()
572 : this->u_
.symbol
->name())
576 // Functors for STL associative containers.
580 operator()(const Key
& k
) const
581 { return k
.hash_value(); }
587 operator()(const Key
& k1
, const Key
& k2
) const
588 { return k1
.eq(k2
); }
591 // Name of key. This is mainly for debugging.
597 Stub_type stub_type_
;
598 // If this is a local symbol, this is the index in the defining object.
599 // Otherwise, it is invalid_index for a global symbol.
601 // If r_sym_ is an invalid index, this points to a global symbol.
602 // Otherwise, it points to a relobj. We used the unsized and target
603 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
604 // Arm_relobj, in order to avoid making the stub class a template
605 // as most of the stub machinery is endianness-neutral. However, it
606 // may require a bit of casting done by users of this class.
609 const Symbol
* symbol
;
610 const Relobj
* relobj
;
612 // Addend associated with a reloc.
617 // Reloc_stubs are created via a stub factory. So these are protected.
618 Reloc_stub(const Stub_template
* stub_template
)
619 : Stub(stub_template
), destination_address_(invalid_address
)
625 friend class Stub_factory
;
627 // Return the relocation target address of the i-th relocation in the
630 do_reloc_target(size_t i
)
632 // All reloc stub have only one relocation.
634 return this->destination_address_
;
638 // Address of destination.
639 Arm_address destination_address_
;
642 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
643 // THUMB branch that meets the following conditions:
645 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
646 // branch address is 0xffe.
647 // 2. The branch target address is in the same page as the first word of the
649 // 3. The branch follows a 32-bit instruction which is not a branch.
651 // To do the fix up, we need to store the address of the branch instruction
652 // and its target at least. We also need to store the original branch
653 // instruction bits for the condition code in a conditional branch. The
654 // condition code is used in a special instruction template. We also want
655 // to identify input sections needing Cortex-A8 workaround quickly. We store
656 // extra information about object and section index of the code section
657 // containing a branch being fixed up. The information is used to mark
658 // the code section when we finalize the Cortex-A8 stubs.
661 class Cortex_a8_stub
: public Stub
667 // Return the object of the code section containing the branch being fixed
671 { return this->relobj_
; }
673 // Return the section index of the code section containing the branch being
677 { return this->shndx_
; }
679 // Return the source address of stub. This is the address of the original
680 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
683 source_address() const
684 { return this->source_address_
; }
686 // Return the destination address of the stub. This is the branch taken
687 // address of the original branch instruction. LSB is 1 if it is a THUMB
688 // instruction address.
690 destination_address() const
691 { return this->destination_address_
; }
693 // Return the instruction being fixed up.
695 original_insn() const
696 { return this->original_insn_
; }
699 // Cortex_a8_stubs are created via a stub factory. So these are protected.
700 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
701 unsigned int shndx
, Arm_address source_address
,
702 Arm_address destination_address
, uint32_t original_insn
)
703 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
704 source_address_(source_address
| 1U),
705 destination_address_(destination_address
),
706 original_insn_(original_insn
)
709 friend class Stub_factory
;
711 // Return the relocation target address of the i-th relocation in the
714 do_reloc_target(size_t i
)
716 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
718 // The conditional branch veneer has two relocations.
720 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
724 // All other Cortex-A8 stubs have only one relocation.
726 return this->destination_address_
;
730 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
732 do_thumb16_special(size_t);
735 // Object of the code section containing the branch being fixed up.
737 // Section index of the code section containing the branch begin fixed up.
739 // Source address of original branch.
740 Arm_address source_address_
;
741 // Destination address of the original branch.
742 Arm_address destination_address_
;
743 // Original branch instruction. This is needed for copying the condition
744 // code from a condition branch to its stub.
745 uint32_t original_insn_
;
748 // ARMv4 BX Rx branch relocation stub class.
749 class Arm_v4bx_stub
: public Stub
755 // Return the associated register.
758 { return this->reg_
; }
761 // Arm V4BX stubs are created via a stub factory. So these are protected.
762 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
763 : Stub(stub_template
), reg_(reg
)
766 friend class Stub_factory
;
768 // Return the relocation target address of the i-th relocation in the
771 do_reloc_target(size_t)
772 { gold_unreachable(); }
774 // This may be overridden in the child class.
776 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
779 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
781 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
785 // A template to implement do_write.
786 template<bool big_endian
>
788 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
790 const Insn_template
* insns
= this->stub_template()->insns();
791 elfcpp::Swap
<32, big_endian
>::writeval(view
,
793 + (this->reg_
<< 16)));
794 view
+= insns
[0].size();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
796 (insns
[1].data() + this->reg_
));
797 view
+= insns
[1].size();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
799 (insns
[2].data() + this->reg_
));
802 // A register index (r0-r14), which is associated with the stub.
806 // Stub factory class.
811 // Return the unique instance of this class.
812 static const Stub_factory
&
815 static Stub_factory singleton
;
819 // Make a relocation stub.
821 make_reloc_stub(Stub_type stub_type
) const
823 gold_assert(stub_type
>= arm_stub_reloc_first
824 && stub_type
<= arm_stub_reloc_last
);
825 return new Reloc_stub(this->stub_templates_
[stub_type
]);
828 // Make a Cortex-A8 stub.
830 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
831 Arm_address source
, Arm_address destination
,
832 uint32_t original_insn
) const
834 gold_assert(stub_type
>= arm_stub_cortex_a8_first
835 && stub_type
<= arm_stub_cortex_a8_last
);
836 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
837 source
, destination
, original_insn
);
840 // Make an ARM V4BX relocation stub.
841 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
843 make_arm_v4bx_stub(uint32_t reg
) const
845 gold_assert(reg
< 0xf);
846 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
851 // Constructor and destructor are protected since we only return a single
852 // instance created in Stub_factory::get_instance().
856 // A Stub_factory may not be copied since it is a singleton.
857 Stub_factory(const Stub_factory
&);
858 Stub_factory
& operator=(Stub_factory
&);
860 // Stub templates. These are initialized in the constructor.
861 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
864 // A class to hold stubs for the ARM target.
866 template<bool big_endian
>
867 class Stub_table
: public Output_data
870 Stub_table(Arm_input_section
<big_endian
>* owner
)
871 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
872 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
873 prev_data_size_(0), prev_addralign_(1)
879 // Owner of this stub table.
880 Arm_input_section
<big_endian
>*
882 { return this->owner_
; }
884 // Whether this stub table is empty.
888 return (this->reloc_stubs_
.empty()
889 && this->cortex_a8_stubs_
.empty()
890 && this->arm_v4bx_stubs_
.empty());
893 // Return the current data size.
895 current_data_size() const
896 { return this->current_data_size_for_child(); }
898 // Add a STUB using KEY. The caller is responsible for avoiding addition
899 // if a STUB with the same key has already been added.
901 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
903 const Stub_template
* stub_template
= stub
->stub_template();
904 gold_assert(stub_template
->type() == key
.stub_type());
905 this->reloc_stubs_
[key
] = stub
;
907 // Assign stub offset early. We can do this because we never remove
908 // reloc stubs and they are in the beginning of the stub table.
909 uint64_t align
= stub_template
->alignment();
910 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
911 stub
->set_offset(this->reloc_stubs_size_
);
912 this->reloc_stubs_size_
+= stub_template
->size();
913 this->reloc_stubs_addralign_
=
914 std::max(this->reloc_stubs_addralign_
, align
);
917 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
918 // The caller is responsible for avoiding addition if a STUB with the same
919 // address has already been added.
921 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
923 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
924 this->cortex_a8_stubs_
.insert(value
);
927 // Add an ARM V4BX relocation stub. A register index will be retrieved
930 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
932 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
933 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
936 // Remove all Cortex-A8 stubs.
938 remove_all_cortex_a8_stubs();
940 // Look up a relocation stub using KEY. Return NULL if there is none.
942 find_reloc_stub(const Reloc_stub::Key
& key
) const
944 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
945 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
948 // Look up an arm v4bx relocation stub using the register index.
949 // Return NULL if there is none.
951 find_arm_v4bx_stub(const uint32_t reg
) const
953 gold_assert(reg
< 0xf);
954 return this->arm_v4bx_stubs_
[reg
];
957 // Relocate stubs in this stub table.
959 relocate_stubs(const Relocate_info
<32, big_endian
>*,
960 Target_arm
<big_endian
>*, Output_section
*,
961 unsigned char*, Arm_address
, section_size_type
);
963 // Update data size and alignment at the end of a relaxation pass. Return
964 // true if either data size or alignment is different from that of the
965 // previous relaxation pass.
967 update_data_size_and_addralign();
969 // Finalize stubs. Set the offsets of all stubs and mark input sections
970 // needing the Cortex-A8 workaround.
974 // Apply Cortex-A8 workaround to an address range.
976 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
977 unsigned char*, Arm_address
,
981 // Write out section contents.
983 do_write(Output_file
*);
985 // Return the required alignment.
988 { return this->prev_addralign_
; }
990 // Reset address and file offset.
992 do_reset_address_and_file_offset()
993 { this->set_current_data_size_for_child(this->prev_data_size_
); }
995 // Set final data size.
997 set_final_data_size()
998 { this->set_data_size(this->current_data_size()); }
1001 // Relocate one stub.
1003 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1004 Target_arm
<big_endian
>*, Output_section
*,
1005 unsigned char*, Arm_address
, section_size_type
);
1007 // Unordered map of relocation stubs.
1009 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1010 Reloc_stub::Key::equal_to
>
1013 // List of Cortex-A8 stubs ordered by addresses of branches being
1014 // fixed up in output.
1015 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1016 // List of Arm V4BX relocation stubs ordered by associated registers.
1017 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1019 // Owner of this stub table.
1020 Arm_input_section
<big_endian
>* owner_
;
1021 // The relocation stubs.
1022 Reloc_stub_map reloc_stubs_
;
1023 // Size of reloc stubs.
1024 off_t reloc_stubs_size_
;
1025 // Maximum address alignment of reloc stubs.
1026 uint64_t reloc_stubs_addralign_
;
1027 // The cortex_a8_stubs.
1028 Cortex_a8_stub_list cortex_a8_stubs_
;
1029 // The Arm V4BX relocation stubs.
1030 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1031 // data size of this in the previous pass.
1032 off_t prev_data_size_
;
1033 // address alignment of this in the previous pass.
1034 uint64_t prev_addralign_
;
1037 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1038 // we add to the end of an EXIDX input section that goes into the output.
1040 class Arm_exidx_cantunwind
: public Output_section_data
1043 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1044 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1047 // Return the object containing the section pointed by this.
1050 { return this->relobj_
; }
1052 // Return the section index of the section pointed by this.
1055 { return this->shndx_
; }
1059 do_write(Output_file
* of
)
1061 if (parameters
->target().is_big_endian())
1062 this->do_fixed_endian_write
<true>(of
);
1064 this->do_fixed_endian_write
<false>(of
);
1067 // Write to a map file.
1069 do_print_to_mapfile(Mapfile
* mapfile
) const
1070 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1073 // Implement do_write for a given endianness.
1074 template<bool big_endian
>
1076 do_fixed_endian_write(Output_file
*);
1078 // The object containing the section pointed by this.
1080 // The section index of the section pointed by this.
1081 unsigned int shndx_
;
1084 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1085 // Offset map is used to map input section offset within the EXIDX section
1086 // to the output offset from the start of this EXIDX section.
1088 typedef std::map
<section_offset_type
, section_offset_type
>
1089 Arm_exidx_section_offset_map
;
1091 // Arm_exidx_merged_section class. This represents an EXIDX input section
1092 // with some of its entries merged.
1094 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1097 // Constructor for Arm_exidx_merged_section.
1098 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1099 // SECTION_OFFSET_MAP points to a section offset map describing how
1100 // parts of the input section are mapped to output. DELETED_BYTES is
1101 // the number of bytes deleted from the EXIDX input section.
1102 Arm_exidx_merged_section(
1103 const Arm_exidx_input_section
& exidx_input_section
,
1104 const Arm_exidx_section_offset_map
& section_offset_map
,
1105 uint32_t deleted_bytes
);
1107 // Build output contents.
1109 build_contents(const unsigned char*, section_size_type
);
1111 // Return the original EXIDX input section.
1112 const Arm_exidx_input_section
&
1113 exidx_input_section() const
1114 { return this->exidx_input_section_
; }
1116 // Return the section offset map.
1117 const Arm_exidx_section_offset_map
&
1118 section_offset_map() const
1119 { return this->section_offset_map_
; }
1122 // Write merged section into file OF.
1124 do_write(Output_file
* of
);
1127 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1128 section_offset_type
*) const;
1131 // Original EXIDX input section.
1132 const Arm_exidx_input_section
& exidx_input_section_
;
1133 // Section offset map.
1134 const Arm_exidx_section_offset_map
& section_offset_map_
;
1135 // Merged section contents. We need to keep build the merged section
1136 // and save it here to avoid accessing the original EXIDX section when
1137 // we cannot lock the sections' object.
1138 unsigned char* section_contents_
;
1141 // A class to wrap an ordinary input section containing executable code.
1143 template<bool big_endian
>
1144 class Arm_input_section
: public Output_relaxed_input_section
1147 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1148 : Output_relaxed_input_section(relobj
, shndx
, 1),
1149 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1150 original_contents_(NULL
)
1153 ~Arm_input_section()
1154 { delete[] this->original_contents_
; }
1160 // Whether this is a stub table owner.
1162 is_stub_table_owner() const
1163 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1165 // Return the stub table.
1166 Stub_table
<big_endian
>*
1168 { return this->stub_table_
; }
1170 // Set the stub_table.
1172 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1173 { this->stub_table_
= stub_table
; }
1175 // Downcast a base pointer to an Arm_input_section pointer. This is
1176 // not type-safe but we only use Arm_input_section not the base class.
1177 static Arm_input_section
<big_endian
>*
1178 as_arm_input_section(Output_relaxed_input_section
* poris
)
1179 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1181 // Return the original size of the section.
1183 original_size() const
1184 { return this->original_size_
; }
1187 // Write data to output file.
1189 do_write(Output_file
*);
1191 // Return required alignment of this.
1193 do_addralign() const
1195 if (this->is_stub_table_owner())
1196 return std::max(this->stub_table_
->addralign(),
1197 static_cast<uint64_t>(this->original_addralign_
));
1199 return this->original_addralign_
;
1202 // Finalize data size.
1204 set_final_data_size();
1206 // Reset address and file offset.
1208 do_reset_address_and_file_offset();
1212 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1213 section_offset_type offset
,
1214 section_offset_type
* poutput
) const
1216 if ((object
== this->relobj())
1217 && (shndx
== this->shndx())
1220 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1230 // Copying is not allowed.
1231 Arm_input_section(const Arm_input_section
&);
1232 Arm_input_section
& operator=(const Arm_input_section
&);
1234 // Address alignment of the original input section.
1235 uint32_t original_addralign_
;
1236 // Section size of the original input section.
1237 uint32_t original_size_
;
1239 Stub_table
<big_endian
>* stub_table_
;
1240 // Original section contents. We have to make a copy here since the file
1241 // containing the original section may not be locked when we need to access
1243 unsigned char* original_contents_
;
1246 // Arm_exidx_fixup class. This is used to define a number of methods
1247 // and keep states for fixing up EXIDX coverage.
1249 class Arm_exidx_fixup
1252 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1253 bool merge_exidx_entries
= true)
1254 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1255 last_inlined_entry_(0), last_input_section_(NULL
),
1256 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1257 merge_exidx_entries_(merge_exidx_entries
)
1261 { delete this->section_offset_map_
; }
1263 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1264 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1265 // number of bytes to be deleted in output. If parts of the input EXIDX
1266 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1267 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1268 // responsible for releasing it.
1269 template<bool big_endian
>
1271 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1272 const unsigned char* section_contents
,
1273 section_size_type section_size
,
1274 Arm_exidx_section_offset_map
** psection_offset_map
);
1276 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1277 // input section, if there is not one already.
1279 add_exidx_cantunwind_as_needed();
1281 // Return the output section for the text section which is linked to the
1282 // first exidx input in output.
1284 first_output_text_section() const
1285 { return this->first_output_text_section_
; }
1288 // Copying is not allowed.
1289 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1290 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1292 // Type of EXIDX unwind entry.
1297 // EXIDX_CANTUNWIND.
1298 UT_EXIDX_CANTUNWIND
,
1305 // Process an EXIDX entry. We only care about the second word of the
1306 // entry. Return true if the entry can be deleted.
1308 process_exidx_entry(uint32_t second_word
);
1310 // Update the current section offset map during EXIDX section fix-up.
1311 // If there is no map, create one. INPUT_OFFSET is the offset of a
1312 // reference point, DELETED_BYTES is the number of deleted by in the
1313 // section so far. If DELETE_ENTRY is true, the reference point and
1314 // all offsets after the previous reference point are discarded.
1316 update_offset_map(section_offset_type input_offset
,
1317 section_size_type deleted_bytes
, bool delete_entry
);
1319 // EXIDX output section.
1320 Output_section
* exidx_output_section_
;
1321 // Unwind type of the last EXIDX entry processed.
1322 Unwind_type last_unwind_type_
;
1323 // Last seen inlined EXIDX entry.
1324 uint32_t last_inlined_entry_
;
1325 // Last processed EXIDX input section.
1326 const Arm_exidx_input_section
* last_input_section_
;
1327 // Section offset map created in process_exidx_section.
1328 Arm_exidx_section_offset_map
* section_offset_map_
;
1329 // Output section for the text section which is linked to the first exidx
1331 Output_section
* first_output_text_section_
;
1333 bool merge_exidx_entries_
;
1336 // Arm output section class. This is defined mainly to add a number of
1337 // stub generation methods.
1339 template<bool big_endian
>
1340 class Arm_output_section
: public Output_section
1343 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1345 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1346 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1347 elfcpp::Elf_Xword flags
)
1348 : Output_section(name
, type
,
1349 (type
== elfcpp::SHT_ARM_EXIDX
1350 ? flags
| elfcpp::SHF_LINK_ORDER
1353 if (type
== elfcpp::SHT_ARM_EXIDX
)
1354 this->set_always_keeps_input_sections();
1357 ~Arm_output_section()
1360 // Group input sections for stub generation.
1362 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1364 // Downcast a base pointer to an Arm_output_section pointer. This is
1365 // not type-safe but we only use Arm_output_section not the base class.
1366 static Arm_output_section
<big_endian
>*
1367 as_arm_output_section(Output_section
* os
)
1368 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1370 // Append all input text sections in this into LIST.
1372 append_text_sections_to_list(Text_section_list
* list
);
1374 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1375 // is a list of text input sections sorted in ascending order of their
1376 // output addresses.
1378 fix_exidx_coverage(Layout
* layout
,
1379 const Text_section_list
& sorted_text_section
,
1380 Symbol_table
* symtab
,
1381 bool merge_exidx_entries
,
1384 // Link an EXIDX section into its corresponding text section.
1386 set_exidx_section_link();
1390 typedef Output_section::Input_section Input_section
;
1391 typedef Output_section::Input_section_list Input_section_list
;
1393 // Create a stub group.
1394 void create_stub_group(Input_section_list::const_iterator
,
1395 Input_section_list::const_iterator
,
1396 Input_section_list::const_iterator
,
1397 Target_arm
<big_endian
>*,
1398 std::vector
<Output_relaxed_input_section
*>*,
1402 // Arm_exidx_input_section class. This represents an EXIDX input section.
1404 class Arm_exidx_input_section
1407 static const section_offset_type invalid_offset
=
1408 static_cast<section_offset_type
>(-1);
1410 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1411 unsigned int link
, uint32_t size
,
1412 uint32_t addralign
, uint32_t text_size
)
1413 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1414 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1417 ~Arm_exidx_input_section()
1420 // Accessors: This is a read-only class.
1422 // Return the object containing this EXIDX input section.
1425 { return this->relobj_
; }
1427 // Return the section index of this EXIDX input section.
1430 { return this->shndx_
; }
1432 // Return the section index of linked text section in the same object.
1435 { return this->link_
; }
1437 // Return size of the EXIDX input section.
1440 { return this->size_
; }
1442 // Return address alignment of EXIDX input section.
1445 { return this->addralign_
; }
1447 // Return size of the associated text input section.
1450 { return this->text_size_
; }
1452 // Whether there are any errors in the EXIDX input section.
1455 { return this->has_errors_
; }
1457 // Set has-errors flag.
1460 { this->has_errors_
= true; }
1463 // Object containing this.
1465 // Section index of this.
1466 unsigned int shndx_
;
1467 // text section linked to this in the same object.
1469 // Size of this. For ARM 32-bit is sufficient.
1471 // Address alignment of this. For ARM 32-bit is sufficient.
1472 uint32_t addralign_
;
1473 // Size of associated text section.
1474 uint32_t text_size_
;
1475 // Whether this has any errors.
1479 // Arm_relobj class.
1481 template<bool big_endian
>
1482 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1485 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1487 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1488 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1489 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1490 stub_tables_(), local_symbol_is_thumb_function_(),
1491 attributes_section_data_(NULL
), mapping_symbols_info_(),
1492 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1493 output_local_symbol_count_needs_update_(false),
1494 merge_flags_and_attributes_(true)
1498 { delete this->attributes_section_data_
; }
1500 // Return the stub table of the SHNDX-th section if there is one.
1501 Stub_table
<big_endian
>*
1502 stub_table(unsigned int shndx
) const
1504 gold_assert(shndx
< this->stub_tables_
.size());
1505 return this->stub_tables_
[shndx
];
1508 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1510 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1512 gold_assert(shndx
< this->stub_tables_
.size());
1513 this->stub_tables_
[shndx
] = stub_table
;
1516 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1517 // index. This is only valid after do_count_local_symbol is called.
1519 local_symbol_is_thumb_function(unsigned int r_sym
) const
1521 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1522 return this->local_symbol_is_thumb_function_
[r_sym
];
1525 // Scan all relocation sections for stub generation.
1527 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1530 // Convert regular input section with index SHNDX to a relaxed section.
1532 convert_input_section_to_relaxed_section(unsigned shndx
)
1534 // The stubs have relocations and we need to process them after writing
1535 // out the stubs. So relocation now must follow section write.
1536 this->set_section_offset(shndx
, -1ULL);
1537 this->set_relocs_must_follow_section_writes();
1540 // Downcast a base pointer to an Arm_relobj pointer. This is
1541 // not type-safe but we only use Arm_relobj not the base class.
1542 static Arm_relobj
<big_endian
>*
1543 as_arm_relobj(Relobj
* relobj
)
1544 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1546 // Processor-specific flags in ELF file header. This is valid only after
1549 processor_specific_flags() const
1550 { return this->processor_specific_flags_
; }
1552 // Attribute section data This is the contents of the .ARM.attribute section
1554 const Attributes_section_data
*
1555 attributes_section_data() const
1556 { return this->attributes_section_data_
; }
1558 // Mapping symbol location.
1559 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1561 // Functor for STL container.
1562 struct Mapping_symbol_position_less
1565 operator()(const Mapping_symbol_position
& p1
,
1566 const Mapping_symbol_position
& p2
) const
1568 return (p1
.first
< p2
.first
1569 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1573 // We only care about the first character of a mapping symbol, so
1574 // we only store that instead of the whole symbol name.
1575 typedef std::map
<Mapping_symbol_position
, char,
1576 Mapping_symbol_position_less
> Mapping_symbols_info
;
1578 // Whether a section contains any Cortex-A8 workaround.
1580 section_has_cortex_a8_workaround(unsigned int shndx
) const
1582 return (this->section_has_cortex_a8_workaround_
!= NULL
1583 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1586 // Mark a section that has Cortex-A8 workaround.
1588 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1590 if (this->section_has_cortex_a8_workaround_
== NULL
)
1591 this->section_has_cortex_a8_workaround_
=
1592 new std::vector
<bool>(this->shnum(), false);
1593 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1596 // Return the EXIDX section of an text section with index SHNDX or NULL
1597 // if the text section has no associated EXIDX section.
1598 const Arm_exidx_input_section
*
1599 exidx_input_section_by_link(unsigned int shndx
) const
1601 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1602 return ((p
!= this->exidx_section_map_
.end()
1603 && p
->second
->link() == shndx
)
1608 // Return the EXIDX section with index SHNDX or NULL if there is none.
1609 const Arm_exidx_input_section
*
1610 exidx_input_section_by_shndx(unsigned shndx
) const
1612 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1613 return ((p
!= this->exidx_section_map_
.end()
1614 && p
->second
->shndx() == shndx
)
1619 // Whether output local symbol count needs updating.
1621 output_local_symbol_count_needs_update() const
1622 { return this->output_local_symbol_count_needs_update_
; }
1624 // Set output_local_symbol_count_needs_update flag to be true.
1626 set_output_local_symbol_count_needs_update()
1627 { this->output_local_symbol_count_needs_update_
= true; }
1629 // Update output local symbol count at the end of relaxation.
1631 update_output_local_symbol_count();
1633 // Whether we want to merge processor-specific flags and attributes.
1635 merge_flags_and_attributes() const
1636 { return this->merge_flags_and_attributes_
; }
1638 // Export list of EXIDX section indices.
1640 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1643 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1644 p
!= this->exidx_section_map_
.end();
1647 if (p
->second
->shndx() == p
->first
)
1648 list
->push_back(p
->first
);
1650 // Sort list to make result independent of implementation of map.
1651 std::sort(list
->begin(), list
->end());
1655 // Post constructor setup.
1659 // Call parent's setup method.
1660 Sized_relobj_file
<32, big_endian
>::do_setup();
1662 // Initialize look-up tables.
1663 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1664 this->stub_tables_
.swap(empty_stub_table_list
);
1667 // Count the local symbols.
1669 do_count_local_symbols(Stringpool_template
<char>*,
1670 Stringpool_template
<char>*);
1673 do_relocate_sections(
1674 const Symbol_table
* symtab
, const Layout
* layout
,
1675 const unsigned char* pshdrs
, Output_file
* of
,
1676 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1678 // Read the symbol information.
1680 do_read_symbols(Read_symbols_data
* sd
);
1682 // Process relocs for garbage collection.
1684 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1688 // Whether a section needs to be scanned for relocation stubs.
1690 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1691 const Relobj::Output_sections
&,
1692 const Symbol_table
*, const unsigned char*);
1694 // Whether a section is a scannable text section.
1696 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1697 const Output_section
*, const Symbol_table
*);
1699 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1701 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1702 unsigned int, Output_section
*,
1703 const Symbol_table
*);
1705 // Scan a section for the Cortex-A8 erratum.
1707 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1708 unsigned int, Output_section
*,
1709 Target_arm
<big_endian
>*);
1711 // Find the linked text section of an EXIDX section by looking at the
1712 // first relocation of the EXIDX section. PSHDR points to the section
1713 // headers of a relocation section and PSYMS points to the local symbols.
1714 // PSHNDX points to a location storing the text section index if found.
1715 // Return whether we can find the linked section.
1717 find_linked_text_section(const unsigned char* pshdr
,
1718 const unsigned char* psyms
, unsigned int* pshndx
);
1721 // Make a new Arm_exidx_input_section object for EXIDX section with
1722 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1723 // index of the linked text section.
1725 make_exidx_input_section(unsigned int shndx
,
1726 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1727 unsigned int text_shndx
,
1728 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1730 // Return the output address of either a plain input section or a
1731 // relaxed input section. SHNDX is the section index.
1733 simple_input_section_output_address(unsigned int, Output_section
*);
1735 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1736 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1739 // List of stub tables.
1740 Stub_table_list stub_tables_
;
1741 // Bit vector to tell if a local symbol is a thumb function or not.
1742 // This is only valid after do_count_local_symbol is called.
1743 std::vector
<bool> local_symbol_is_thumb_function_
;
1744 // processor-specific flags in ELF file header.
1745 elfcpp::Elf_Word processor_specific_flags_
;
1746 // Object attributes if there is an .ARM.attributes section or NULL.
1747 Attributes_section_data
* attributes_section_data_
;
1748 // Mapping symbols information.
1749 Mapping_symbols_info mapping_symbols_info_
;
1750 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1751 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1752 // Map a text section to its associated .ARM.exidx section, if there is one.
1753 Exidx_section_map exidx_section_map_
;
1754 // Whether output local symbol count needs updating.
1755 bool output_local_symbol_count_needs_update_
;
1756 // Whether we merge processor flags and attributes of this object to
1758 bool merge_flags_and_attributes_
;
1761 // Arm_dynobj class.
1763 template<bool big_endian
>
1764 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1767 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1768 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1769 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1770 processor_specific_flags_(0), attributes_section_data_(NULL
)
1774 { delete this->attributes_section_data_
; }
1776 // Downcast a base pointer to an Arm_relobj pointer. This is
1777 // not type-safe but we only use Arm_relobj not the base class.
1778 static Arm_dynobj
<big_endian
>*
1779 as_arm_dynobj(Dynobj
* dynobj
)
1780 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1782 // Processor-specific flags in ELF file header. This is valid only after
1785 processor_specific_flags() const
1786 { return this->processor_specific_flags_
; }
1788 // Attributes section data.
1789 const Attributes_section_data
*
1790 attributes_section_data() const
1791 { return this->attributes_section_data_
; }
1794 // Read the symbol information.
1796 do_read_symbols(Read_symbols_data
* sd
);
1799 // processor-specific flags in ELF file header.
1800 elfcpp::Elf_Word processor_specific_flags_
;
1801 // Object attributes if there is an .ARM.attributes section or NULL.
1802 Attributes_section_data
* attributes_section_data_
;
1805 // Functor to read reloc addends during stub generation.
1807 template<int sh_type
, bool big_endian
>
1808 struct Stub_addend_reader
1810 // Return the addend for a relocation of a particular type. Depending
1811 // on whether this is a REL or RELA relocation, read the addend from a
1812 // view or from a Reloc object.
1813 elfcpp::Elf_types
<32>::Elf_Swxword
1815 unsigned int /* r_type */,
1816 const unsigned char* /* view */,
1817 const typename Reloc_types
<sh_type
,
1818 32, big_endian
>::Reloc
& /* reloc */) const;
1821 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1823 template<bool big_endian
>
1824 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1826 elfcpp::Elf_types
<32>::Elf_Swxword
1829 const unsigned char*,
1830 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1833 // Specialized Stub_addend_reader for RELA type relocation sections.
1834 // We currently do not handle RELA type relocation sections but it is trivial
1835 // to implement the addend reader. This is provided for completeness and to
1836 // make it easier to add support for RELA relocation sections in the future.
1838 template<bool big_endian
>
1839 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1841 elfcpp::Elf_types
<32>::Elf_Swxword
1844 const unsigned char*,
1845 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1846 big_endian
>::Reloc
& reloc
) const
1847 { return reloc
.get_r_addend(); }
1850 // Cortex_a8_reloc class. We keep record of relocation that may need
1851 // the Cortex-A8 erratum workaround.
1853 class Cortex_a8_reloc
1856 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1857 Arm_address destination
)
1858 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1864 // Accessors: This is a read-only class.
1866 // Return the relocation stub associated with this relocation if there is
1870 { return this->reloc_stub_
; }
1872 // Return the relocation type.
1875 { return this->r_type_
; }
1877 // Return the destination address of the relocation. LSB stores the THUMB
1881 { return this->destination_
; }
1884 // Associated relocation stub if there is one, or NULL.
1885 const Reloc_stub
* reloc_stub_
;
1887 unsigned int r_type_
;
1888 // Destination address of this relocation. LSB is used to distinguish
1890 Arm_address destination_
;
1893 // Arm_output_data_got class. We derive this from Output_data_got to add
1894 // extra methods to handle TLS relocations in a static link.
1896 template<bool big_endian
>
1897 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1900 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1901 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1904 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1905 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1906 // applied in a static link.
1908 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1909 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1911 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1912 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1913 // relocation that needs to be applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1916 Sized_relobj_file
<32, big_endian
>* relobj
,
1919 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1923 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1924 // The first one is initialized to be 1, which is the module index for
1925 // the main executable and the second one 0. A reloc of the type
1926 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1927 // be applied by gold. GSYM is a global symbol.
1929 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1931 // Same as the above but for a local symbol in OBJECT with INDEX.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1934 Sized_relobj_file
<32, big_endian
>* object
,
1935 unsigned int index
);
1938 // Write out the GOT table.
1940 do_write(Output_file
*);
1943 // This class represent dynamic relocations that need to be applied by
1944 // gold because we are using TLS relocations in a static link.
1948 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1949 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1950 { this->u_
.global
.symbol
= gsym
; }
1952 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1953 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1954 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1956 this->u_
.local
.relobj
= relobj
;
1957 this->u_
.local
.index
= index
;
1960 // Return the GOT offset.
1963 { return this->got_offset_
; }
1968 { return this->r_type_
; }
1970 // Whether the symbol is global or not.
1972 symbol_is_global() const
1973 { return this->symbol_is_global_
; }
1975 // For a relocation against a global symbol, the global symbol.
1979 gold_assert(this->symbol_is_global_
);
1980 return this->u_
.global
.symbol
;
1983 // For a relocation against a local symbol, the defining object.
1984 Sized_relobj_file
<32, big_endian
>*
1987 gold_assert(!this->symbol_is_global_
);
1988 return this->u_
.local
.relobj
;
1991 // For a relocation against a local symbol, the local symbol index.
1995 gold_assert(!this->symbol_is_global_
);
1996 return this->u_
.local
.index
;
2000 // GOT offset of the entry to which this relocation is applied.
2001 unsigned int got_offset_
;
2002 // Type of relocation.
2003 unsigned int r_type_
;
2004 // Whether this relocation is against a global symbol.
2005 bool symbol_is_global_
;
2006 // A global or local symbol.
2011 // For a global symbol, the symbol itself.
2016 // For a local symbol, the object defining object.
2017 Sized_relobj_file
<32, big_endian
>* relobj
;
2018 // For a local symbol, the symbol index.
2024 // Symbol table of the output object.
2025 Symbol_table
* symbol_table_
;
2026 // Layout of the output object.
2028 // Static relocs to be applied to the GOT.
2029 std::vector
<Static_reloc
> static_relocs_
;
2032 // The ARM target has many relocation types with odd-sizes or noncontiguous
2033 // bits. The default handling of relocatable relocation cannot process these
2034 // relocations. So we have to extend the default code.
2036 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2037 class Arm_scan_relocatable_relocs
:
2038 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2041 // Return the strategy to use for a local symbol which is a section
2042 // symbol, given the relocation type.
2043 inline Relocatable_relocs::Reloc_strategy
2044 local_section_strategy(unsigned int r_type
, Relobj
*)
2046 if (sh_type
== elfcpp::SHT_RELA
)
2047 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2050 if (r_type
== elfcpp::R_ARM_TARGET1
2051 || r_type
== elfcpp::R_ARM_TARGET2
)
2053 const Target_arm
<big_endian
>* arm_target
=
2054 Target_arm
<big_endian
>::default_target();
2055 r_type
= arm_target
->get_real_reloc_type(r_type
);
2060 // Relocations that write nothing. These exclude R_ARM_TARGET1
2061 // and R_ARM_TARGET2.
2062 case elfcpp::R_ARM_NONE
:
2063 case elfcpp::R_ARM_V4BX
:
2064 case elfcpp::R_ARM_TLS_GOTDESC
:
2065 case elfcpp::R_ARM_TLS_CALL
:
2066 case elfcpp::R_ARM_TLS_DESCSEQ
:
2067 case elfcpp::R_ARM_THM_TLS_CALL
:
2068 case elfcpp::R_ARM_GOTRELAX
:
2069 case elfcpp::R_ARM_GNU_VTENTRY
:
2070 case elfcpp::R_ARM_GNU_VTINHERIT
:
2071 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2072 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2073 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2074 // These should have been converted to something else above.
2075 case elfcpp::R_ARM_TARGET1
:
2076 case elfcpp::R_ARM_TARGET2
:
2078 // Relocations that write full 32 bits.
2079 case elfcpp::R_ARM_ABS32
:
2080 case elfcpp::R_ARM_REL32
:
2081 case elfcpp::R_ARM_SBREL32
:
2082 case elfcpp::R_ARM_GOTOFF32
:
2083 case elfcpp::R_ARM_BASE_PREL
:
2084 case elfcpp::R_ARM_GOT_BREL
:
2085 case elfcpp::R_ARM_BASE_ABS
:
2086 case elfcpp::R_ARM_ABS32_NOI
:
2087 case elfcpp::R_ARM_REL32_NOI
:
2088 case elfcpp::R_ARM_PLT32_ABS
:
2089 case elfcpp::R_ARM_GOT_ABS
:
2090 case elfcpp::R_ARM_GOT_PREL
:
2091 case elfcpp::R_ARM_TLS_GD32
:
2092 case elfcpp::R_ARM_TLS_LDM32
:
2093 case elfcpp::R_ARM_TLS_LDO32
:
2094 case elfcpp::R_ARM_TLS_IE32
:
2095 case elfcpp::R_ARM_TLS_LE32
:
2096 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4
;
2098 // For all other static relocations, return RELOC_SPECIAL.
2099 return Relocatable_relocs::RELOC_SPECIAL
;
2105 // Utilities for manipulating integers of up to 32-bits
2109 // Sign extend an n-bit unsigned integer stored in an uint32_t into
2110 // an int32_t. NO_BITS must be between 1 to 32.
2111 template<int no_bits
>
2112 static inline int32_t
2113 sign_extend(uint32_t bits
)
2115 gold_assert(no_bits
>= 0 && no_bits
<= 32);
2117 return static_cast<int32_t>(bits
);
2118 uint32_t mask
= (~((uint32_t) 0)) >> (32 - no_bits
);
2120 uint32_t top_bit
= 1U << (no_bits
- 1);
2121 int32_t as_signed
= static_cast<int32_t>(bits
);
2122 return (bits
& top_bit
) ? as_signed
+ (-top_bit
* 2) : as_signed
;
2125 // Detects overflow of an NO_BITS integer stored in a uint32_t.
2126 template<int no_bits
>
2128 has_overflow(uint32_t bits
)
2130 gold_assert(no_bits
>= 0 && no_bits
<= 32);
2133 int32_t max
= (1 << (no_bits
- 1)) - 1;
2134 int32_t min
= -(1 << (no_bits
- 1));
2135 int32_t as_signed
= static_cast<int32_t>(bits
);
2136 return as_signed
> max
|| as_signed
< min
;
2139 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
2140 // fits in the given number of bits as either a signed or unsigned value.
2141 // For example, has_signed_unsigned_overflow<8> would check
2142 // -128 <= bits <= 255
2143 template<int no_bits
>
2145 has_signed_unsigned_overflow(uint32_t bits
)
2147 gold_assert(no_bits
>= 2 && no_bits
<= 32);
2150 int32_t max
= static_cast<int32_t>((1U << no_bits
) - 1);
2151 int32_t min
= -(1 << (no_bits
- 1));
2152 int32_t as_signed
= static_cast<int32_t>(bits
);
2153 return as_signed
> max
|| as_signed
< min
;
2156 // Select bits from A and B using bits in MASK. For each n in [0..31],
2157 // the n-th bit in the result is chosen from the n-th bits of A and B.
2158 // A zero selects A and a one selects B.
2159 static inline uint32_t
2160 bit_select(uint32_t a
, uint32_t b
, uint32_t mask
)
2161 { return (a
& ~mask
) | (b
& mask
); }
2164 template<bool big_endian
>
2165 class Target_arm
: public Sized_target
<32, big_endian
>
2168 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2171 // When were are relocating a stub, we pass this as the relocation number.
2172 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2175 : Sized_target
<32, big_endian
>(&arm_info
),
2176 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2177 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
),
2178 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2179 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2180 may_use_blx_(false), should_force_pic_veneer_(false),
2181 arm_input_section_map_(), attributes_section_data_(NULL
),
2182 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2185 // Virtual function which is set to return true by a target if
2186 // it can use relocation types to determine if a function's
2187 // pointer is taken.
2189 can_check_for_function_pointers() const
2192 // Whether a section called SECTION_NAME may have function pointers to
2193 // sections not eligible for safe ICF folding.
2195 section_may_have_icf_unsafe_pointers(const char* section_name
) const
2197 return (!is_prefix_of(".ARM.exidx", section_name
)
2198 && !is_prefix_of(".ARM.extab", section_name
)
2199 && Target::section_may_have_icf_unsafe_pointers(section_name
));
2202 // Whether we can use BLX.
2205 { return this->may_use_blx_
; }
2207 // Set use-BLX flag.
2209 set_may_use_blx(bool value
)
2210 { this->may_use_blx_
= value
; }
2212 // Whether we force PCI branch veneers.
2214 should_force_pic_veneer() const
2215 { return this->should_force_pic_veneer_
; }
2217 // Set PIC veneer flag.
2219 set_should_force_pic_veneer(bool value
)
2220 { this->should_force_pic_veneer_
= value
; }
2222 // Whether we use THUMB-2 instructions.
2224 using_thumb2() const
2226 Object_attribute
* attr
=
2227 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2228 int arch
= attr
->int_value();
2229 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2232 // Whether we use THUMB/THUMB-2 instructions only.
2234 using_thumb_only() const
2236 Object_attribute
* attr
=
2237 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2239 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2240 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2242 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2243 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2245 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2246 return attr
->int_value() == 'M';
2249 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2251 may_use_arm_nop() const
2253 Object_attribute
* attr
=
2254 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2255 int arch
= attr
->int_value();
2256 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2257 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2258 || arch
== elfcpp::TAG_CPU_ARCH_V7
2259 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2262 // Whether we have THUMB-2 NOP.W instruction.
2264 may_use_thumb2_nop() const
2266 Object_attribute
* attr
=
2267 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2268 int arch
= attr
->int_value();
2269 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2270 || arch
== elfcpp::TAG_CPU_ARCH_V7
2271 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2274 // Process the relocations to determine unreferenced sections for
2275 // garbage collection.
2277 gc_process_relocs(Symbol_table
* symtab
,
2279 Sized_relobj_file
<32, big_endian
>* object
,
2280 unsigned int data_shndx
,
2281 unsigned int sh_type
,
2282 const unsigned char* prelocs
,
2284 Output_section
* output_section
,
2285 bool needs_special_offset_handling
,
2286 size_t local_symbol_count
,
2287 const unsigned char* plocal_symbols
);
2289 // Scan the relocations to look for symbol adjustments.
2291 scan_relocs(Symbol_table
* symtab
,
2293 Sized_relobj_file
<32, big_endian
>* object
,
2294 unsigned int data_shndx
,
2295 unsigned int sh_type
,
2296 const unsigned char* prelocs
,
2298 Output_section
* output_section
,
2299 bool needs_special_offset_handling
,
2300 size_t local_symbol_count
,
2301 const unsigned char* plocal_symbols
);
2303 // Finalize the sections.
2305 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2307 // Return the value to use for a dynamic symbol which requires special
2310 do_dynsym_value(const Symbol
*) const;
2312 // Relocate a section.
2314 relocate_section(const Relocate_info
<32, big_endian
>*,
2315 unsigned int sh_type
,
2316 const unsigned char* prelocs
,
2318 Output_section
* output_section
,
2319 bool needs_special_offset_handling
,
2320 unsigned char* view
,
2321 Arm_address view_address
,
2322 section_size_type view_size
,
2323 const Reloc_symbol_changes
*);
2325 // Scan the relocs during a relocatable link.
2327 scan_relocatable_relocs(Symbol_table
* symtab
,
2329 Sized_relobj_file
<32, big_endian
>* object
,
2330 unsigned int data_shndx
,
2331 unsigned int sh_type
,
2332 const unsigned char* prelocs
,
2334 Output_section
* output_section
,
2335 bool needs_special_offset_handling
,
2336 size_t local_symbol_count
,
2337 const unsigned char* plocal_symbols
,
2338 Relocatable_relocs
*);
2340 // Relocate a section during a relocatable link.
2342 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
2343 unsigned int sh_type
,
2344 const unsigned char* prelocs
,
2346 Output_section
* output_section
,
2347 off_t offset_in_output_section
,
2348 const Relocatable_relocs
*,
2349 unsigned char* view
,
2350 Arm_address view_address
,
2351 section_size_type view_size
,
2352 unsigned char* reloc_view
,
2353 section_size_type reloc_view_size
);
2355 // Perform target-specific processing in a relocatable link. This is
2356 // only used if we use the relocation strategy RELOC_SPECIAL.
2358 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2359 unsigned int sh_type
,
2360 const unsigned char* preloc_in
,
2362 Output_section
* output_section
,
2363 off_t offset_in_output_section
,
2364 unsigned char* view
,
2365 typename
elfcpp::Elf_types
<32>::Elf_Addr
2367 section_size_type view_size
,
2368 unsigned char* preloc_out
);
2370 // Return whether SYM is defined by the ABI.
2372 do_is_defined_by_abi(Symbol
* sym
) const
2373 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2375 // Return whether there is a GOT section.
2377 has_got_section() const
2378 { return this->got_
!= NULL
; }
2380 // Return the size of the GOT section.
2384 gold_assert(this->got_
!= NULL
);
2385 return this->got_
->data_size();
2388 // Return the number of entries in the GOT.
2390 got_entry_count() const
2392 if (!this->has_got_section())
2394 return this->got_size() / 4;
2397 // Return the number of entries in the PLT.
2399 plt_entry_count() const;
2401 // Return the offset of the first non-reserved PLT entry.
2403 first_plt_entry_offset() const;
2405 // Return the size of each PLT entry.
2407 plt_entry_size() const;
2409 // Map platform-specific reloc types
2411 get_real_reloc_type(unsigned int r_type
);
2414 // Methods to support stub-generations.
2417 // Return the stub factory
2419 stub_factory() const
2420 { return this->stub_factory_
; }
2422 // Make a new Arm_input_section object.
2423 Arm_input_section
<big_endian
>*
2424 new_arm_input_section(Relobj
*, unsigned int);
2426 // Find the Arm_input_section object corresponding to the SHNDX-th input
2427 // section of RELOBJ.
2428 Arm_input_section
<big_endian
>*
2429 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2431 // Make a new Stub_table
2432 Stub_table
<big_endian
>*
2433 new_stub_table(Arm_input_section
<big_endian
>*);
2435 // Scan a section for stub generation.
2437 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2438 const unsigned char*, size_t, Output_section
*,
2439 bool, const unsigned char*, Arm_address
,
2444 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2445 Output_section
*, unsigned char*, Arm_address
,
2448 // Get the default ARM target.
2449 static Target_arm
<big_endian
>*
2452 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2453 && parameters
->target().is_big_endian() == big_endian
);
2454 return static_cast<Target_arm
<big_endian
>*>(
2455 parameters
->sized_target
<32, big_endian
>());
2458 // Whether NAME belongs to a mapping symbol.
2460 is_mapping_symbol_name(const char* name
)
2464 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2465 && (name
[2] == '\0' || name
[2] == '.'));
2468 // Whether we work around the Cortex-A8 erratum.
2470 fix_cortex_a8() const
2471 { return this->fix_cortex_a8_
; }
2473 // Whether we merge exidx entries in debuginfo.
2475 merge_exidx_entries() const
2476 { return parameters
->options().merge_exidx_entries(); }
2478 // Whether we fix R_ARM_V4BX relocation.
2480 // 1 - replace with MOV instruction (armv4 target)
2481 // 2 - make interworking veneer (>= armv4t targets only)
2482 General_options::Fix_v4bx
2484 { return parameters
->options().fix_v4bx(); }
2486 // Scan a span of THUMB code section for Cortex-A8 erratum.
2488 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2489 section_size_type
, section_size_type
,
2490 const unsigned char*, Arm_address
);
2492 // Apply Cortex-A8 workaround to a branch.
2494 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2495 unsigned char*, Arm_address
);
2498 // Make an ELF object.
2500 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2501 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2504 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2505 const elfcpp::Ehdr
<32, !big_endian
>&)
2506 { gold_unreachable(); }
2509 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2510 const elfcpp::Ehdr
<64, false>&)
2511 { gold_unreachable(); }
2514 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2515 const elfcpp::Ehdr
<64, true>&)
2516 { gold_unreachable(); }
2518 // Make an output section.
2520 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2521 elfcpp::Elf_Xword flags
)
2522 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2525 do_adjust_elf_header(unsigned char* view
, int len
) const;
2527 // We only need to generate stubs, and hence perform relaxation if we are
2528 // not doing relocatable linking.
2530 do_may_relax() const
2531 { return !parameters
->options().relocatable(); }
2534 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2536 // Determine whether an object attribute tag takes an integer, a
2539 do_attribute_arg_type(int tag
) const;
2541 // Reorder tags during output.
2543 do_attributes_order(int num
) const;
2545 // This is called when the target is selected as the default.
2547 do_select_as_default_target()
2549 // No locking is required since there should only be one default target.
2550 // We cannot have both the big-endian and little-endian ARM targets
2552 gold_assert(arm_reloc_property_table
== NULL
);
2553 arm_reloc_property_table
= new Arm_reloc_property_table();
2557 // The class which scans relocations.
2562 : issued_non_pic_error_(false)
2566 get_reference_flags(unsigned int r_type
);
2569 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2570 Sized_relobj_file
<32, big_endian
>* object
,
2571 unsigned int data_shndx
,
2572 Output_section
* output_section
,
2573 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2574 const elfcpp::Sym
<32, big_endian
>& lsym
);
2577 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2578 Sized_relobj_file
<32, big_endian
>* object
,
2579 unsigned int data_shndx
,
2580 Output_section
* output_section
,
2581 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2585 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2586 Sized_relobj_file
<32, big_endian
>* ,
2589 const elfcpp::Rel
<32, big_endian
>& ,
2591 const elfcpp::Sym
<32, big_endian
>&);
2594 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2595 Sized_relobj_file
<32, big_endian
>* ,
2598 const elfcpp::Rel
<32, big_endian
>& ,
2599 unsigned int , Symbol
*);
2603 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2604 unsigned int r_type
);
2607 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2608 unsigned int r_type
, Symbol
*);
2611 check_non_pic(Relobj
*, unsigned int r_type
);
2613 // Almost identical to Symbol::needs_plt_entry except that it also
2614 // handles STT_ARM_TFUNC.
2616 symbol_needs_plt_entry(const Symbol
* sym
)
2618 // An undefined symbol from an executable does not need a PLT entry.
2619 if (sym
->is_undefined() && !parameters
->options().shared())
2622 return (!parameters
->doing_static_link()
2623 && (sym
->type() == elfcpp::STT_FUNC
2624 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2625 && (sym
->is_from_dynobj()
2626 || sym
->is_undefined()
2627 || sym
->is_preemptible()));
2631 possible_function_pointer_reloc(unsigned int r_type
);
2633 // Whether we have issued an error about a non-PIC compilation.
2634 bool issued_non_pic_error_
;
2637 // The class which implements relocation.
2647 // Return whether the static relocation needs to be applied.
2649 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2650 unsigned int r_type
,
2652 Output_section
* output_section
);
2654 // Do a relocation. Return false if the caller should not issue
2655 // any warnings about this relocation.
2657 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2658 Output_section
*, size_t relnum
,
2659 const elfcpp::Rel
<32, big_endian
>&,
2660 unsigned int r_type
, const Sized_symbol
<32>*,
2661 const Symbol_value
<32>*,
2662 unsigned char*, Arm_address
,
2665 // Return whether we want to pass flag NON_PIC_REF for this
2666 // reloc. This means the relocation type accesses a symbol not via
2669 reloc_is_non_pic(unsigned int r_type
)
2673 // These relocation types reference GOT or PLT entries explicitly.
2674 case elfcpp::R_ARM_GOT_BREL
:
2675 case elfcpp::R_ARM_GOT_ABS
:
2676 case elfcpp::R_ARM_GOT_PREL
:
2677 case elfcpp::R_ARM_GOT_BREL12
:
2678 case elfcpp::R_ARM_PLT32_ABS
:
2679 case elfcpp::R_ARM_TLS_GD32
:
2680 case elfcpp::R_ARM_TLS_LDM32
:
2681 case elfcpp::R_ARM_TLS_IE32
:
2682 case elfcpp::R_ARM_TLS_IE12GP
:
2684 // These relocate types may use PLT entries.
2685 case elfcpp::R_ARM_CALL
:
2686 case elfcpp::R_ARM_THM_CALL
:
2687 case elfcpp::R_ARM_JUMP24
:
2688 case elfcpp::R_ARM_THM_JUMP24
:
2689 case elfcpp::R_ARM_THM_JUMP19
:
2690 case elfcpp::R_ARM_PLT32
:
2691 case elfcpp::R_ARM_THM_XPC22
:
2692 case elfcpp::R_ARM_PREL31
:
2693 case elfcpp::R_ARM_SBREL31
:
2702 // Do a TLS relocation.
2703 inline typename Arm_relocate_functions
<big_endian
>::Status
2704 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2705 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2706 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2707 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2712 // A class which returns the size required for a relocation type,
2713 // used while scanning relocs during a relocatable link.
2714 class Relocatable_size_for_reloc
2718 get_size_for_reloc(unsigned int, Relobj
*);
2721 // Adjust TLS relocation type based on the options and whether this
2722 // is a local symbol.
2723 static tls::Tls_optimization
2724 optimize_tls_reloc(bool is_final
, int r_type
);
2726 // Get the GOT section, creating it if necessary.
2727 Arm_output_data_got
<big_endian
>*
2728 got_section(Symbol_table
*, Layout
*);
2730 // Get the GOT PLT section.
2732 got_plt_section() const
2734 gold_assert(this->got_plt_
!= NULL
);
2735 return this->got_plt_
;
2738 // Create a PLT entry for a global symbol.
2740 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2742 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2744 define_tls_base_symbol(Symbol_table
*, Layout
*);
2746 // Create a GOT entry for the TLS module index.
2748 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2749 Sized_relobj_file
<32, big_endian
>* object
);
2751 // Get the PLT section.
2752 const Output_data_plt_arm
<big_endian
>*
2755 gold_assert(this->plt_
!= NULL
);
2759 // Get the dynamic reloc section, creating it if necessary.
2761 rel_dyn_section(Layout
*);
2763 // Get the section to use for TLS_DESC relocations.
2765 rel_tls_desc_section(Layout
*) const;
2767 // Return true if the symbol may need a COPY relocation.
2768 // References from an executable object to non-function symbols
2769 // defined in a dynamic object may need a COPY relocation.
2771 may_need_copy_reloc(Symbol
* gsym
)
2773 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2774 && gsym
->may_need_copy_reloc());
2777 // Add a potential copy relocation.
2779 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2780 Sized_relobj_file
<32, big_endian
>* object
,
2781 unsigned int shndx
, Output_section
* output_section
,
2782 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2784 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2785 symtab
->get_sized_symbol
<32>(sym
),
2786 object
, shndx
, output_section
, reloc
,
2787 this->rel_dyn_section(layout
));
2790 // Whether two EABI versions are compatible.
2792 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2794 // Merge processor-specific flags from input object and those in the ELF
2795 // header of the output.
2797 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2799 // Get the secondary compatible architecture.
2801 get_secondary_compatible_arch(const Attributes_section_data
*);
2803 // Set the secondary compatible architecture.
2805 set_secondary_compatible_arch(Attributes_section_data
*, int);
2808 tag_cpu_arch_combine(const char*, int, int*, int, int);
2810 // Helper to print AEABI enum tag value.
2812 aeabi_enum_name(unsigned int);
2814 // Return string value for TAG_CPU_name.
2816 tag_cpu_name_value(unsigned int);
2818 // Merge object attributes from input object and those in the output.
2820 merge_object_attributes(const char*, const Attributes_section_data
*);
2822 // Helper to get an AEABI object attribute
2824 get_aeabi_object_attribute(int tag
) const
2826 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2827 gold_assert(pasd
!= NULL
);
2828 Object_attribute
* attr
=
2829 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2830 gold_assert(attr
!= NULL
);
2835 // Methods to support stub-generations.
2838 // Group input sections for stub generation.
2840 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2842 // Scan a relocation for stub generation.
2844 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2845 const Sized_symbol
<32>*, unsigned int,
2846 const Symbol_value
<32>*,
2847 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2849 // Scan a relocation section for stub.
2850 template<int sh_type
>
2852 scan_reloc_section_for_stubs(
2853 const Relocate_info
<32, big_endian
>* relinfo
,
2854 const unsigned char* prelocs
,
2856 Output_section
* output_section
,
2857 bool needs_special_offset_handling
,
2858 const unsigned char* view
,
2859 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2862 // Fix .ARM.exidx section coverage.
2864 fix_exidx_coverage(Layout
*, const Input_objects
*,
2865 Arm_output_section
<big_endian
>*, Symbol_table
*,
2868 // Functors for STL set.
2869 struct output_section_address_less_than
2872 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2873 { return s1
->address() < s2
->address(); }
2876 // Information about this specific target which we pass to the
2877 // general Target structure.
2878 static const Target::Target_info arm_info
;
2880 // The types of GOT entries needed for this platform.
2881 // These values are exposed to the ABI in an incremental link.
2882 // Do not renumber existing values without changing the version
2883 // number of the .gnu_incremental_inputs section.
2886 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2887 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2888 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2889 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2890 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2893 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2895 // Map input section to Arm_input_section.
2896 typedef Unordered_map
<Section_id
,
2897 Arm_input_section
<big_endian
>*,
2899 Arm_input_section_map
;
2901 // Map output addresses to relocs for Cortex-A8 erratum.
2902 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2903 Cortex_a8_relocs_info
;
2906 Arm_output_data_got
<big_endian
>* got_
;
2908 Output_data_plt_arm
<big_endian
>* plt_
;
2909 // The GOT PLT section.
2910 Output_data_space
* got_plt_
;
2911 // The dynamic reloc section.
2912 Reloc_section
* rel_dyn_
;
2913 // Relocs saved to avoid a COPY reloc.
2914 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2915 // Space for variables copied with a COPY reloc.
2916 Output_data_space
* dynbss_
;
2917 // Offset of the GOT entry for the TLS module index.
2918 unsigned int got_mod_index_offset_
;
2919 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2920 bool tls_base_symbol_defined_
;
2921 // Vector of Stub_tables created.
2922 Stub_table_list stub_tables_
;
2924 const Stub_factory
&stub_factory_
;
2925 // Whether we can use BLX.
2927 // Whether we force PIC branch veneers.
2928 bool should_force_pic_veneer_
;
2929 // Map for locating Arm_input_sections.
2930 Arm_input_section_map arm_input_section_map_
;
2931 // Attributes section data in output.
2932 Attributes_section_data
* attributes_section_data_
;
2933 // Whether we want to fix code for Cortex-A8 erratum.
2934 bool fix_cortex_a8_
;
2935 // Map addresses to relocs for Cortex-A8 erratum.
2936 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2939 template<bool big_endian
>
2940 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2943 big_endian
, // is_big_endian
2944 elfcpp::EM_ARM
, // machine_code
2945 false, // has_make_symbol
2946 false, // has_resolve
2947 false, // has_code_fill
2948 true, // is_default_stack_executable
2950 "/usr/lib/libc.so.1", // dynamic_linker
2951 0x8000, // default_text_segment_address
2952 0x1000, // abi_pagesize (overridable by -z max-page-size)
2953 0x1000, // common_pagesize (overridable by -z common-page-size)
2954 elfcpp::SHN_UNDEF
, // small_common_shndx
2955 elfcpp::SHN_UNDEF
, // large_common_shndx
2956 0, // small_common_section_flags
2957 0, // large_common_section_flags
2958 ".ARM.attributes", // attributes_section
2959 "aeabi" // attributes_vendor
2962 // Arm relocate functions class
2965 template<bool big_endian
>
2966 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2971 STATUS_OKAY
, // No error during relocation.
2972 STATUS_OVERFLOW
, // Relocation overflow.
2973 STATUS_BAD_RELOC
// Relocation cannot be applied.
2977 typedef Relocate_functions
<32, big_endian
> Base
;
2978 typedef Arm_relocate_functions
<big_endian
> This
;
2980 // Encoding of imm16 argument for movt and movw ARM instructions
2983 // imm16 := imm4 | imm12
2985 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2986 // +-------+---------------+-------+-------+-----------------------+
2987 // | | |imm4 | |imm12 |
2988 // +-------+---------------+-------+-------+-----------------------+
2990 // Extract the relocation addend from VAL based on the ARM
2991 // instruction encoding described above.
2992 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2993 extract_arm_movw_movt_addend(
2994 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2996 // According to the Elf ABI for ARM Architecture the immediate
2997 // field is sign-extended to form the addend.
2998 return utils::sign_extend
<16>(((val
>> 4) & 0xf000) | (val
& 0xfff));
3001 // Insert X into VAL based on the ARM instruction encoding described
3003 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3004 insert_val_arm_movw_movt(
3005 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3006 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3010 val
|= (x
& 0xf000) << 4;
3014 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3017 // imm16 := imm4 | i | imm3 | imm8
3019 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3020 // +---------+-+-----------+-------++-+-----+-------+---------------+
3021 // | |i| |imm4 || |imm3 | |imm8 |
3022 // +---------+-+-----------+-------++-+-----+-------+---------------+
3024 // Extract the relocation addend from VAL based on the Thumb2
3025 // instruction encoding described above.
3026 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3027 extract_thumb_movw_movt_addend(
3028 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3030 // According to the Elf ABI for ARM Architecture the immediate
3031 // field is sign-extended to form the addend.
3032 return utils::sign_extend
<16>(((val
>> 4) & 0xf000)
3033 | ((val
>> 15) & 0x0800)
3034 | ((val
>> 4) & 0x0700)
3038 // Insert X into VAL based on the Thumb2 instruction encoding
3040 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3041 insert_val_thumb_movw_movt(
3042 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3043 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3046 val
|= (x
& 0xf000) << 4;
3047 val
|= (x
& 0x0800) << 15;
3048 val
|= (x
& 0x0700) << 4;
3049 val
|= (x
& 0x00ff);
3053 // Calculate the smallest constant Kn for the specified residual.
3054 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3056 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3062 // Determine the most significant bit in the residual and
3063 // align the resulting value to a 2-bit boundary.
3064 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3066 // The desired shift is now (msb - 6), or zero, whichever
3068 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3071 // Calculate the final residual for the specified group index.
3072 // If the passed group index is less than zero, the method will return
3073 // the value of the specified residual without any change.
3074 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3075 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3076 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3079 for (int n
= 0; n
<= group
; n
++)
3081 // Calculate which part of the value to mask.
3082 uint32_t shift
= calc_grp_kn(residual
);
3083 // Calculate the residual for the next time around.
3084 residual
&= ~(residual
& (0xff << shift
));
3090 // Calculate the value of Gn for the specified group index.
3091 // We return it in the form of an encoded constant-and-rotation.
3092 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3093 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3094 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3097 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3100 for (int n
= 0; n
<= group
; n
++)
3102 // Calculate which part of the value to mask.
3103 shift
= calc_grp_kn(residual
);
3104 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3105 gn
= residual
& (0xff << shift
);
3106 // Calculate the residual for the next time around.
3109 // Return Gn in the form of an encoded constant-and-rotation.
3110 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3114 // Handle ARM long branches.
3115 static typename
This::Status
3116 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3117 unsigned char*, const Sized_symbol
<32>*,
3118 const Arm_relobj
<big_endian
>*, unsigned int,
3119 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3121 // Handle THUMB long branches.
3122 static typename
This::Status
3123 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3124 unsigned char*, const Sized_symbol
<32>*,
3125 const Arm_relobj
<big_endian
>*, unsigned int,
3126 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3129 // Return the branch offset of a 32-bit THUMB branch.
3130 static inline int32_t
3131 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3133 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3134 // involving the J1 and J2 bits.
3135 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3136 uint32_t upper
= upper_insn
& 0x3ffU
;
3137 uint32_t lower
= lower_insn
& 0x7ffU
;
3138 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3139 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3140 uint32_t i1
= j1
^ s
? 0 : 1;
3141 uint32_t i2
= j2
^ s
? 0 : 1;
3143 return utils::sign_extend
<25>((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3144 | (upper
<< 12) | (lower
<< 1));
3147 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3148 // UPPER_INSN is the original upper instruction of the branch. Caller is
3149 // responsible for overflow checking and BLX offset adjustment.
3150 static inline uint16_t
3151 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3153 uint32_t s
= offset
< 0 ? 1 : 0;
3154 uint32_t bits
= static_cast<uint32_t>(offset
);
3155 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3158 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3159 // LOWER_INSN is the original lower instruction of the branch. Caller is
3160 // responsible for overflow checking and BLX offset adjustment.
3161 static inline uint16_t
3162 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3164 uint32_t s
= offset
< 0 ? 1 : 0;
3165 uint32_t bits
= static_cast<uint32_t>(offset
);
3166 return ((lower_insn
& ~0x2fffU
)
3167 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3168 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3169 | ((bits
>> 1) & 0x7ffU
));
3172 // Return the branch offset of a 32-bit THUMB conditional branch.
3173 static inline int32_t
3174 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3176 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3177 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3178 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3179 uint32_t lower
= (lower_insn
& 0x07ffU
);
3180 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3182 return utils::sign_extend
<21>((upper
<< 12) | (lower
<< 1));
3185 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3186 // instruction. UPPER_INSN is the original upper instruction of the branch.
3187 // Caller is responsible for overflow checking.
3188 static inline uint16_t
3189 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3191 uint32_t s
= offset
< 0 ? 1 : 0;
3192 uint32_t bits
= static_cast<uint32_t>(offset
);
3193 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3196 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3197 // instruction. LOWER_INSN is the original lower instruction of the branch.
3198 // The caller is responsible for overflow checking.
3199 static inline uint16_t
3200 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3202 uint32_t bits
= static_cast<uint32_t>(offset
);
3203 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3204 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3205 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3207 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3210 // R_ARM_ABS8: S + A
3211 static inline typename
This::Status
3212 abs8(unsigned char* view
,
3213 const Sized_relobj_file
<32, big_endian
>* object
,
3214 const Symbol_value
<32>* psymval
)
3216 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3217 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3218 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3219 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3220 Reltype addend
= utils::sign_extend
<8>(val
);
3221 Reltype x
= psymval
->value(object
, addend
);
3222 val
= utils::bit_select(val
, x
, 0xffU
);
3223 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3225 // R_ARM_ABS8 permits signed or unsigned results.
3226 int signed_x
= static_cast<int32_t>(x
);
3227 return ((signed_x
< -128 || signed_x
> 255)
3228 ? This::STATUS_OVERFLOW
3229 : This::STATUS_OKAY
);
3232 // R_ARM_THM_ABS5: S + A
3233 static inline typename
This::Status
3234 thm_abs5(unsigned char* view
,
3235 const Sized_relobj_file
<32, big_endian
>* object
,
3236 const Symbol_value
<32>* psymval
)
3238 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3239 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3240 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3241 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3242 Reltype addend
= (val
& 0x7e0U
) >> 6;
3243 Reltype x
= psymval
->value(object
, addend
);
3244 val
= utils::bit_select(val
, x
<< 6, 0x7e0U
);
3245 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3247 // R_ARM_ABS16 permits signed or unsigned results.
3248 int signed_x
= static_cast<int32_t>(x
);
3249 return ((signed_x
< -32768 || signed_x
> 65535)
3250 ? This::STATUS_OVERFLOW
3251 : This::STATUS_OKAY
);
3254 // R_ARM_ABS12: S + A
3255 static inline typename
This::Status
3256 abs12(unsigned char* view
,
3257 const Sized_relobj_file
<32, big_endian
>* object
,
3258 const Symbol_value
<32>* psymval
)
3260 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3261 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3262 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3263 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3264 Reltype addend
= val
& 0x0fffU
;
3265 Reltype x
= psymval
->value(object
, addend
);
3266 val
= utils::bit_select(val
, x
, 0x0fffU
);
3267 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3268 return (utils::has_overflow
<12>(x
)
3269 ? This::STATUS_OVERFLOW
3270 : This::STATUS_OKAY
);
3273 // R_ARM_ABS16: S + A
3274 static inline typename
This::Status
3275 abs16(unsigned char* view
,
3276 const Sized_relobj_file
<32, big_endian
>* object
,
3277 const Symbol_value
<32>* psymval
)
3279 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3280 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3281 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3282 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3283 Reltype addend
= utils::sign_extend
<16>(val
);
3284 Reltype x
= psymval
->value(object
, addend
);
3285 val
= utils::bit_select(val
, x
, 0xffffU
);
3286 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3287 return (utils::has_signed_unsigned_overflow
<16>(x
)
3288 ? This::STATUS_OVERFLOW
3289 : This::STATUS_OKAY
);
3292 // R_ARM_ABS32: (S + A) | T
3293 static inline typename
This::Status
3294 abs32(unsigned char* view
,
3295 const Sized_relobj_file
<32, big_endian
>* object
,
3296 const Symbol_value
<32>* psymval
,
3297 Arm_address thumb_bit
)
3299 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3300 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3301 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3302 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3303 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
3304 return This::STATUS_OKAY
;
3307 // R_ARM_REL32: (S + A) | T - P
3308 static inline typename
This::Status
3309 rel32(unsigned char* view
,
3310 const Sized_relobj_file
<32, big_endian
>* object
,
3311 const Symbol_value
<32>* psymval
,
3312 Arm_address address
,
3313 Arm_address thumb_bit
)
3315 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3316 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3317 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3318 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3319 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
3320 return This::STATUS_OKAY
;
3323 // R_ARM_THM_JUMP24: (S + A) | T - P
3324 static typename
This::Status
3325 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3326 const Symbol_value
<32>* psymval
, Arm_address address
,
3327 Arm_address thumb_bit
);
3329 // R_ARM_THM_JUMP6: S + A – P
3330 static inline typename
This::Status
3331 thm_jump6(unsigned char* view
,
3332 const Sized_relobj_file
<32, big_endian
>* object
,
3333 const Symbol_value
<32>* psymval
,
3334 Arm_address address
)
3336 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3337 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3338 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3339 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3340 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3341 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3342 Reltype x
= (psymval
->value(object
, addend
) - address
);
3343 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3344 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3345 // CZB does only forward jumps.
3346 return ((x
> 0x007e)
3347 ? This::STATUS_OVERFLOW
3348 : This::STATUS_OKAY
);
3351 // R_ARM_THM_JUMP8: S + A – P
3352 static inline typename
This::Status
3353 thm_jump8(unsigned char* view
,
3354 const Sized_relobj_file
<32, big_endian
>* object
,
3355 const Symbol_value
<32>* psymval
,
3356 Arm_address address
)
3358 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3359 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3360 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3361 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3362 Reltype addend
= utils::sign_extend
<8>((val
& 0x00ff) << 1);
3363 Reltype x
= (psymval
->value(object
, addend
) - address
);
3364 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xff00) | ((x
& 0x01fe) >> 1));
3365 return (utils::has_overflow
<8>(x
)
3366 ? This::STATUS_OVERFLOW
3367 : This::STATUS_OKAY
);
3370 // R_ARM_THM_JUMP11: S + A – P
3371 static inline typename
This::Status
3372 thm_jump11(unsigned char* view
,
3373 const Sized_relobj_file
<32, big_endian
>* object
,
3374 const Symbol_value
<32>* psymval
,
3375 Arm_address address
)
3377 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3378 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3379 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3380 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3381 Reltype addend
= utils::sign_extend
<11>((val
& 0x07ff) << 1);
3382 Reltype x
= (psymval
->value(object
, addend
) - address
);
3383 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xf800) | ((x
& 0x0ffe) >> 1));
3384 return (utils::has_overflow
<11>(x
)
3385 ? This::STATUS_OVERFLOW
3386 : This::STATUS_OKAY
);
3389 // R_ARM_BASE_PREL: B(S) + A - P
3390 static inline typename
This::Status
3391 base_prel(unsigned char* view
,
3393 Arm_address address
)
3395 Base::rel32(view
, origin
- address
);
3399 // R_ARM_BASE_ABS: B(S) + A
3400 static inline typename
This::Status
3401 base_abs(unsigned char* view
,
3404 Base::rel32(view
, origin
);
3408 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3409 static inline typename
This::Status
3410 got_brel(unsigned char* view
,
3411 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3413 Base::rel32(view
, got_offset
);
3414 return This::STATUS_OKAY
;
3417 // R_ARM_GOT_PREL: GOT(S) + A - P
3418 static inline typename
This::Status
3419 got_prel(unsigned char* view
,
3420 Arm_address got_entry
,
3421 Arm_address address
)
3423 Base::rel32(view
, got_entry
- address
);
3424 return This::STATUS_OKAY
;
3427 // R_ARM_PREL: (S + A) | T - P
3428 static inline typename
This::Status
3429 prel31(unsigned char* view
,
3430 const Sized_relobj_file
<32, big_endian
>* object
,
3431 const Symbol_value
<32>* psymval
,
3432 Arm_address address
,
3433 Arm_address thumb_bit
)
3435 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3436 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3437 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3438 Valtype addend
= utils::sign_extend
<31>(val
);
3439 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3440 val
= utils::bit_select(val
, x
, 0x7fffffffU
);
3441 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3442 return (utils::has_overflow
<31>(x
) ?
3443 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3446 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3447 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3448 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3449 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3450 static inline typename
This::Status
3451 movw(unsigned char* view
,
3452 const Sized_relobj_file
<32, big_endian
>* object
,
3453 const Symbol_value
<32>* psymval
,
3454 Arm_address relative_address_base
,
3455 Arm_address thumb_bit
,
3456 bool check_overflow
)
3458 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3459 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3460 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3461 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3462 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3463 - relative_address_base
);
3464 val
= This::insert_val_arm_movw_movt(val
, x
);
3465 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3466 return ((check_overflow
&& utils::has_overflow
<16>(x
))
3467 ? This::STATUS_OVERFLOW
3468 : This::STATUS_OKAY
);
3471 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3472 // R_ARM_MOVT_PREL: S + A - P
3473 // R_ARM_MOVT_BREL: S + A - B(S)
3474 static inline typename
This::Status
3475 movt(unsigned char* view
,
3476 const Sized_relobj_file
<32, big_endian
>* object
,
3477 const Symbol_value
<32>* psymval
,
3478 Arm_address relative_address_base
)
3480 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3481 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3482 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3483 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3484 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3485 val
= This::insert_val_arm_movw_movt(val
, x
);
3486 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3487 // FIXME: IHI0044D says that we should check for overflow.
3488 return This::STATUS_OKAY
;
3491 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3492 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3493 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3494 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3495 static inline typename
This::Status
3496 thm_movw(unsigned char* view
,
3497 const Sized_relobj_file
<32, big_endian
>* object
,
3498 const Symbol_value
<32>* psymval
,
3499 Arm_address relative_address_base
,
3500 Arm_address thumb_bit
,
3501 bool check_overflow
)
3503 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3504 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3505 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3506 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3507 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3508 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3510 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3511 val
= This::insert_val_thumb_movw_movt(val
, x
);
3512 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3513 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3514 return ((check_overflow
&& utils::has_overflow
<16>(x
))
3515 ? This::STATUS_OVERFLOW
3516 : This::STATUS_OKAY
);
3519 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3520 // R_ARM_THM_MOVT_PREL: S + A - P
3521 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3522 static inline typename
This::Status
3523 thm_movt(unsigned char* view
,
3524 const Sized_relobj_file
<32, big_endian
>* object
,
3525 const Symbol_value
<32>* psymval
,
3526 Arm_address relative_address_base
)
3528 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3529 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3530 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3531 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3532 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3533 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3534 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3535 val
= This::insert_val_thumb_movw_movt(val
, x
);
3536 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3537 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3538 return This::STATUS_OKAY
;
3541 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3542 static inline typename
This::Status
3543 thm_alu11(unsigned char* view
,
3544 const Sized_relobj_file
<32, big_endian
>* object
,
3545 const Symbol_value
<32>* psymval
,
3546 Arm_address address
,
3547 Arm_address thumb_bit
)
3549 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3550 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3551 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3552 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3553 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3555 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3556 // -----------------------------------------------------------------------
3557 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3558 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3559 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3560 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3561 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3562 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3564 // Determine a sign for the addend.
3565 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3566 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3567 // Thumb2 addend encoding:
3568 // imm12 := i | imm3 | imm8
3569 int32_t addend
= (insn
& 0xff)
3570 | ((insn
& 0x00007000) >> 4)
3571 | ((insn
& 0x04000000) >> 15);
3572 // Apply a sign to the added.
3575 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3576 - (address
& 0xfffffffc);
3577 Reltype val
= abs(x
);
3578 // Mask out the value and a distinct part of the ADD/SUB opcode
3579 // (bits 7:5 of opword).
3580 insn
= (insn
& 0xfb0f8f00)
3582 | ((val
& 0x700) << 4)
3583 | ((val
& 0x800) << 15);
3584 // Set the opcode according to whether the value to go in the
3585 // place is negative.
3589 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3590 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3591 return ((val
> 0xfff) ?
3592 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3595 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3596 static inline typename
This::Status
3597 thm_pc8(unsigned char* view
,
3598 const Sized_relobj_file
<32, big_endian
>* object
,
3599 const Symbol_value
<32>* psymval
,
3600 Arm_address address
)
3602 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3603 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3604 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3605 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3606 Reltype addend
= ((insn
& 0x00ff) << 2);
3607 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3608 Reltype val
= abs(x
);
3609 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3611 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3612 return ((val
> 0x03fc)
3613 ? This::STATUS_OVERFLOW
3614 : This::STATUS_OKAY
);
3617 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3618 static inline typename
This::Status
3619 thm_pc12(unsigned char* view
,
3620 const Sized_relobj_file
<32, big_endian
>* object
,
3621 const Symbol_value
<32>* psymval
,
3622 Arm_address address
)
3624 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3625 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3626 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3627 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3628 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3629 // Determine a sign for the addend (positive if the U bit is 1).
3630 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3631 int32_t addend
= (insn
& 0xfff);
3632 // Apply a sign to the added.
3635 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3636 Reltype val
= abs(x
);
3637 // Mask out and apply the value and the U bit.
3638 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3639 // Set the U bit according to whether the value to go in the
3640 // place is positive.
3644 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3645 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3646 return ((val
> 0xfff) ?
3647 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3651 static inline typename
This::Status
3652 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3653 unsigned char* view
,
3654 const Arm_relobj
<big_endian
>* object
,
3655 const Arm_address address
,
3656 const bool is_interworking
)
3659 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3660 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3661 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3663 // Ensure that we have a BX instruction.
3664 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3665 const uint32_t reg
= (val
& 0xf);
3666 if (is_interworking
&& reg
!= 0xf)
3668 Stub_table
<big_endian
>* stub_table
=
3669 object
->stub_table(relinfo
->data_shndx
);
3670 gold_assert(stub_table
!= NULL
);
3672 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3673 gold_assert(stub
!= NULL
);
3675 int32_t veneer_address
=
3676 stub_table
->address() + stub
->offset() - 8 - address
;
3677 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3678 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3679 // Replace with a branch to veneer (B <addr>)
3680 val
= (val
& 0xf0000000) | 0x0a000000
3681 | ((veneer_address
>> 2) & 0x00ffffff);
3685 // Preserve Rm (lowest four bits) and the condition code
3686 // (highest four bits). Other bits encode MOV PC,Rm.
3687 val
= (val
& 0xf000000f) | 0x01a0f000;
3689 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3690 return This::STATUS_OKAY
;
3693 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3694 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3695 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3696 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3697 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3698 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3699 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3700 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3701 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3702 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3703 static inline typename
This::Status
3704 arm_grp_alu(unsigned char* view
,
3705 const Sized_relobj_file
<32, big_endian
>* object
,
3706 const Symbol_value
<32>* psymval
,
3708 Arm_address address
,
3709 Arm_address thumb_bit
,
3710 bool check_overflow
)
3712 gold_assert(group
>= 0 && group
< 3);
3713 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3714 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3715 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3717 // ALU group relocations are allowed only for the ADD/SUB instructions.
3718 // (0x00800000 - ADD, 0x00400000 - SUB)
3719 const Valtype opcode
= insn
& 0x01e00000;
3720 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3721 return This::STATUS_BAD_RELOC
;
3723 // Determine a sign for the addend.
3724 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3725 // shifter = rotate_imm * 2
3726 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3727 // Initial addend value.
3728 int32_t addend
= insn
& 0xff;
3729 // Rotate addend right by shifter.
3730 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3731 // Apply a sign to the added.
3734 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3735 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3736 // Check for overflow if required
3738 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3739 return This::STATUS_OVERFLOW
;
3741 // Mask out the value and the ADD/SUB part of the opcode; take care
3742 // not to destroy the S bit.
3744 // Set the opcode according to whether the value to go in the
3745 // place is negative.
3746 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3747 // Encode the offset (encoded Gn).
3750 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3751 return This::STATUS_OKAY
;
3754 // R_ARM_LDR_PC_G0: S + A - P
3755 // R_ARM_LDR_PC_G1: S + A - P
3756 // R_ARM_LDR_PC_G2: S + A - P
3757 // R_ARM_LDR_SB_G0: S + A - B(S)
3758 // R_ARM_LDR_SB_G1: S + A - B(S)
3759 // R_ARM_LDR_SB_G2: S + A - B(S)
3760 static inline typename
This::Status
3761 arm_grp_ldr(unsigned char* view
,
3762 const Sized_relobj_file
<32, big_endian
>* object
,
3763 const Symbol_value
<32>* psymval
,
3765 Arm_address address
)
3767 gold_assert(group
>= 0 && group
< 3);
3768 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3769 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3770 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3772 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3773 int32_t addend
= (insn
& 0xfff) * sign
;
3774 int32_t x
= (psymval
->value(object
, addend
) - address
);
3775 // Calculate the relevant G(n-1) value to obtain this stage residual.
3777 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3778 if (residual
>= 0x1000)
3779 return This::STATUS_OVERFLOW
;
3781 // Mask out the value and U bit.
3783 // Set the U bit for non-negative values.
3788 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3789 return This::STATUS_OKAY
;
3792 // R_ARM_LDRS_PC_G0: S + A - P
3793 // R_ARM_LDRS_PC_G1: S + A - P
3794 // R_ARM_LDRS_PC_G2: S + A - P
3795 // R_ARM_LDRS_SB_G0: S + A - B(S)
3796 // R_ARM_LDRS_SB_G1: S + A - B(S)
3797 // R_ARM_LDRS_SB_G2: S + A - B(S)
3798 static inline typename
This::Status
3799 arm_grp_ldrs(unsigned char* view
,
3800 const Sized_relobj_file
<32, big_endian
>* object
,
3801 const Symbol_value
<32>* psymval
,
3803 Arm_address address
)
3805 gold_assert(group
>= 0 && group
< 3);
3806 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3807 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3808 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3810 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3811 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3812 int32_t x
= (psymval
->value(object
, addend
) - address
);
3813 // Calculate the relevant G(n-1) value to obtain this stage residual.
3815 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3816 if (residual
>= 0x100)
3817 return This::STATUS_OVERFLOW
;
3819 // Mask out the value and U bit.
3821 // Set the U bit for non-negative values.
3824 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3826 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3827 return This::STATUS_OKAY
;
3830 // R_ARM_LDC_PC_G0: S + A - P
3831 // R_ARM_LDC_PC_G1: S + A - P
3832 // R_ARM_LDC_PC_G2: S + A - P
3833 // R_ARM_LDC_SB_G0: S + A - B(S)
3834 // R_ARM_LDC_SB_G1: S + A - B(S)
3835 // R_ARM_LDC_SB_G2: S + A - B(S)
3836 static inline typename
This::Status
3837 arm_grp_ldc(unsigned char* view
,
3838 const Sized_relobj_file
<32, big_endian
>* object
,
3839 const Symbol_value
<32>* psymval
,
3841 Arm_address address
)
3843 gold_assert(group
>= 0 && group
< 3);
3844 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3845 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3846 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3848 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3849 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3850 int32_t x
= (psymval
->value(object
, addend
) - address
);
3851 // Calculate the relevant G(n-1) value to obtain this stage residual.
3853 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3854 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3855 return This::STATUS_OVERFLOW
;
3857 // Mask out the value and U bit.
3859 // Set the U bit for non-negative values.
3862 insn
|= (residual
>> 2);
3864 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3865 return This::STATUS_OKAY
;
3869 // Relocate ARM long branches. This handles relocation types
3870 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3871 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3872 // undefined and we do not use PLT in this relocation. In such a case,
3873 // the branch is converted into an NOP.
3875 template<bool big_endian
>
3876 typename Arm_relocate_functions
<big_endian
>::Status
3877 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3878 unsigned int r_type
,
3879 const Relocate_info
<32, big_endian
>* relinfo
,
3880 unsigned char* view
,
3881 const Sized_symbol
<32>* gsym
,
3882 const Arm_relobj
<big_endian
>* object
,
3884 const Symbol_value
<32>* psymval
,
3885 Arm_address address
,
3886 Arm_address thumb_bit
,
3887 bool is_weakly_undefined_without_plt
)
3889 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3890 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3891 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3893 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3894 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3895 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3896 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3897 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3898 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3899 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3901 // Check that the instruction is valid.
3902 if (r_type
== elfcpp::R_ARM_CALL
)
3904 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3905 return This::STATUS_BAD_RELOC
;
3907 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3909 if (!insn_is_b
&& !insn_is_cond_bl
)
3910 return This::STATUS_BAD_RELOC
;
3912 else if (r_type
== elfcpp::R_ARM_PLT32
)
3914 if (!insn_is_any_branch
)
3915 return This::STATUS_BAD_RELOC
;
3917 else if (r_type
== elfcpp::R_ARM_XPC25
)
3919 // FIXME: AAELF document IH0044C does not say much about it other
3920 // than it being obsolete.
3921 if (!insn_is_any_branch
)
3922 return This::STATUS_BAD_RELOC
;
3927 // A branch to an undefined weak symbol is turned into a jump to
3928 // the next instruction unless a PLT entry will be created.
3929 // Do the same for local undefined symbols.
3930 // The jump to the next instruction is optimized as a NOP depending
3931 // on the architecture.
3932 const Target_arm
<big_endian
>* arm_target
=
3933 Target_arm
<big_endian
>::default_target();
3934 if (is_weakly_undefined_without_plt
)
3936 gold_assert(!parameters
->options().relocatable());
3937 Valtype cond
= val
& 0xf0000000U
;
3938 if (arm_target
->may_use_arm_nop())
3939 val
= cond
| 0x0320f000;
3941 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3942 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3943 return This::STATUS_OKAY
;
3946 Valtype addend
= utils::sign_extend
<26>(val
<< 2);
3947 Valtype branch_target
= psymval
->value(object
, addend
);
3948 int32_t branch_offset
= branch_target
- address
;
3950 // We need a stub if the branch offset is too large or if we need
3952 bool may_use_blx
= arm_target
->may_use_blx();
3953 Reloc_stub
* stub
= NULL
;
3955 if (!parameters
->options().relocatable()
3956 && (utils::has_overflow
<26>(branch_offset
)
3957 || ((thumb_bit
!= 0)
3958 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3960 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3962 Stub_type stub_type
=
3963 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3964 unadjusted_branch_target
,
3966 if (stub_type
!= arm_stub_none
)
3968 Stub_table
<big_endian
>* stub_table
=
3969 object
->stub_table(relinfo
->data_shndx
);
3970 gold_assert(stub_table
!= NULL
);
3972 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3973 stub
= stub_table
->find_reloc_stub(stub_key
);
3974 gold_assert(stub
!= NULL
);
3975 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3976 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3977 branch_offset
= branch_target
- address
;
3978 gold_assert(!utils::has_overflow
<26>(branch_offset
));
3982 // At this point, if we still need to switch mode, the instruction
3983 // must either be a BLX or a BL that can be converted to a BLX.
3987 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3988 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3991 val
= utils::bit_select(val
, (branch_offset
>> 2), 0xffffffUL
);
3992 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3993 return (utils::has_overflow
<26>(branch_offset
)
3994 ? This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3997 // Relocate THUMB long branches. This handles relocation types
3998 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3999 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4000 // undefined and we do not use PLT in this relocation. In such a case,
4001 // the branch is converted into an NOP.
4003 template<bool big_endian
>
4004 typename Arm_relocate_functions
<big_endian
>::Status
4005 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
4006 unsigned int r_type
,
4007 const Relocate_info
<32, big_endian
>* relinfo
,
4008 unsigned char* view
,
4009 const Sized_symbol
<32>* gsym
,
4010 const Arm_relobj
<big_endian
>* object
,
4012 const Symbol_value
<32>* psymval
,
4013 Arm_address address
,
4014 Arm_address thumb_bit
,
4015 bool is_weakly_undefined_without_plt
)
4017 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4018 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4019 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4020 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4022 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4024 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4025 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4027 // Check that the instruction is valid.
4028 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4030 if (!is_bl_insn
&& !is_blx_insn
)
4031 return This::STATUS_BAD_RELOC
;
4033 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4035 // This cannot be a BLX.
4037 return This::STATUS_BAD_RELOC
;
4039 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4041 // Check for Thumb to Thumb call.
4043 return This::STATUS_BAD_RELOC
;
4046 gold_warning(_("%s: Thumb BLX instruction targets "
4047 "thumb function '%s'."),
4048 object
->name().c_str(),
4049 (gsym
? gsym
->name() : "(local)"));
4050 // Convert BLX to BL.
4051 lower_insn
|= 0x1000U
;
4057 // A branch to an undefined weak symbol is turned into a jump to
4058 // the next instruction unless a PLT entry will be created.
4059 // The jump to the next instruction is optimized as a NOP.W for
4060 // Thumb-2 enabled architectures.
4061 const Target_arm
<big_endian
>* arm_target
=
4062 Target_arm
<big_endian
>::default_target();
4063 if (is_weakly_undefined_without_plt
)
4065 gold_assert(!parameters
->options().relocatable());
4066 if (arm_target
->may_use_thumb2_nop())
4068 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4069 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4073 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4074 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4076 return This::STATUS_OKAY
;
4079 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4080 Arm_address branch_target
= psymval
->value(object
, addend
);
4082 // For BLX, bit 1 of target address comes from bit 1 of base address.
4083 bool may_use_blx
= arm_target
->may_use_blx();
4084 if (thumb_bit
== 0 && may_use_blx
)
4085 branch_target
= utils::bit_select(branch_target
, address
, 0x2);
4087 int32_t branch_offset
= branch_target
- address
;
4089 // We need a stub if the branch offset is too large or if we need
4091 bool thumb2
= arm_target
->using_thumb2();
4092 if (!parameters
->options().relocatable()
4093 && ((!thumb2
&& utils::has_overflow
<23>(branch_offset
))
4094 || (thumb2
&& utils::has_overflow
<25>(branch_offset
))
4095 || ((thumb_bit
== 0)
4096 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4097 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4099 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4101 Stub_type stub_type
=
4102 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4103 unadjusted_branch_target
,
4106 if (stub_type
!= arm_stub_none
)
4108 Stub_table
<big_endian
>* stub_table
=
4109 object
->stub_table(relinfo
->data_shndx
);
4110 gold_assert(stub_table
!= NULL
);
4112 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4113 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4114 gold_assert(stub
!= NULL
);
4115 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4116 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4117 if (thumb_bit
== 0 && may_use_blx
)
4118 branch_target
= utils::bit_select(branch_target
, address
, 0x2);
4119 branch_offset
= branch_target
- address
;
4123 // At this point, if we still need to switch mode, the instruction
4124 // must either be a BLX or a BL that can be converted to a BLX.
4127 gold_assert(may_use_blx
4128 && (r_type
== elfcpp::R_ARM_THM_CALL
4129 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4130 // Make sure this is a BLX.
4131 lower_insn
&= ~0x1000U
;
4135 // Make sure this is a BL.
4136 lower_insn
|= 0x1000U
;
4139 // For a BLX instruction, make sure that the relocation is rounded up
4140 // to a word boundary. This follows the semantics of the instruction
4141 // which specifies that bit 1 of the target address will come from bit
4142 // 1 of the base address.
4143 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4144 gold_assert((branch_offset
& 3) == 0);
4146 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4147 // We use the Thumb-2 encoding, which is safe even if dealing with
4148 // a Thumb-1 instruction by virtue of our overflow check above. */
4149 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4150 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4152 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4153 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4155 gold_assert(!utils::has_overflow
<25>(branch_offset
));
4158 ? utils::has_overflow
<25>(branch_offset
)
4159 : utils::has_overflow
<23>(branch_offset
))
4160 ? This::STATUS_OVERFLOW
4161 : This::STATUS_OKAY
);
4164 // Relocate THUMB-2 long conditional branches.
4165 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4166 // undefined and we do not use PLT in this relocation. In such a case,
4167 // the branch is converted into an NOP.
4169 template<bool big_endian
>
4170 typename Arm_relocate_functions
<big_endian
>::Status
4171 Arm_relocate_functions
<big_endian
>::thm_jump19(
4172 unsigned char* view
,
4173 const Arm_relobj
<big_endian
>* object
,
4174 const Symbol_value
<32>* psymval
,
4175 Arm_address address
,
4176 Arm_address thumb_bit
)
4178 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4179 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4180 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4181 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4182 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4184 Arm_address branch_target
= psymval
->value(object
, addend
);
4185 int32_t branch_offset
= branch_target
- address
;
4187 // ??? Should handle interworking? GCC might someday try to
4188 // use this for tail calls.
4189 // FIXME: We do support thumb entry to PLT yet.
4192 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4193 return This::STATUS_BAD_RELOC
;
4196 // Put RELOCATION back into the insn.
4197 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4198 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4200 // Put the relocated value back in the object file:
4201 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4202 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4204 return (utils::has_overflow
<21>(branch_offset
)
4205 ? This::STATUS_OVERFLOW
4206 : This::STATUS_OKAY
);
4209 // Get the GOT section, creating it if necessary.
4211 template<bool big_endian
>
4212 Arm_output_data_got
<big_endian
>*
4213 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4215 if (this->got_
== NULL
)
4217 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4219 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4221 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4222 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4223 this->got_
, ORDER_DATA
, false);
4225 // The old GNU linker creates a .got.plt section. We just
4226 // create another set of data in the .got section. Note that we
4227 // always create a PLT if we create a GOT, although the PLT
4229 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4230 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4231 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4232 this->got_plt_
, ORDER_DATA
, false);
4234 // The first three entries are reserved.
4235 this->got_plt_
->set_current_data_size(3 * 4);
4237 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4238 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4239 Symbol_table::PREDEFINED
,
4241 0, 0, elfcpp::STT_OBJECT
,
4243 elfcpp::STV_HIDDEN
, 0,
4249 // Get the dynamic reloc section, creating it if necessary.
4251 template<bool big_endian
>
4252 typename Target_arm
<big_endian
>::Reloc_section
*
4253 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4255 if (this->rel_dyn_
== NULL
)
4257 gold_assert(layout
!= NULL
);
4258 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4259 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4260 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4261 ORDER_DYNAMIC_RELOCS
, false);
4263 return this->rel_dyn_
;
4266 // Insn_template methods.
4268 // Return byte size of an instruction template.
4271 Insn_template::size() const
4273 switch (this->type())
4276 case THUMB16_SPECIAL_TYPE
:
4287 // Return alignment of an instruction template.
4290 Insn_template::alignment() const
4292 switch (this->type())
4295 case THUMB16_SPECIAL_TYPE
:
4306 // Stub_template methods.
4308 Stub_template::Stub_template(
4309 Stub_type type
, const Insn_template
* insns
,
4311 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4312 entry_in_thumb_mode_(false), relocs_()
4316 // Compute byte size and alignment of stub template.
4317 for (size_t i
= 0; i
< insn_count
; i
++)
4319 unsigned insn_alignment
= insns
[i
].alignment();
4320 size_t insn_size
= insns
[i
].size();
4321 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4322 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4323 switch (insns
[i
].type())
4325 case Insn_template::THUMB16_TYPE
:
4326 case Insn_template::THUMB16_SPECIAL_TYPE
:
4328 this->entry_in_thumb_mode_
= true;
4331 case Insn_template::THUMB32_TYPE
:
4332 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4333 this->relocs_
.push_back(Reloc(i
, offset
));
4335 this->entry_in_thumb_mode_
= true;
4338 case Insn_template::ARM_TYPE
:
4339 // Handle cases where the target is encoded within the
4341 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4342 this->relocs_
.push_back(Reloc(i
, offset
));
4345 case Insn_template::DATA_TYPE
:
4346 // Entry point cannot be data.
4347 gold_assert(i
!= 0);
4348 this->relocs_
.push_back(Reloc(i
, offset
));
4354 offset
+= insn_size
;
4356 this->size_
= offset
;
4361 // Template to implement do_write for a specific target endianness.
4363 template<bool big_endian
>
4365 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4367 const Stub_template
* stub_template
= this->stub_template();
4368 const Insn_template
* insns
= stub_template
->insns();
4370 // FIXME: We do not handle BE8 encoding yet.
4371 unsigned char* pov
= view
;
4372 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4374 switch (insns
[i
].type())
4376 case Insn_template::THUMB16_TYPE
:
4377 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4379 case Insn_template::THUMB16_SPECIAL_TYPE
:
4380 elfcpp::Swap
<16, big_endian
>::writeval(
4382 this->thumb16_special(i
));
4384 case Insn_template::THUMB32_TYPE
:
4386 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4387 uint32_t lo
= insns
[i
].data() & 0xffff;
4388 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4389 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4392 case Insn_template::ARM_TYPE
:
4393 case Insn_template::DATA_TYPE
:
4394 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4399 pov
+= insns
[i
].size();
4401 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4404 // Reloc_stub::Key methods.
4406 // Dump a Key as a string for debugging.
4409 Reloc_stub::Key::name() const
4411 if (this->r_sym_
== invalid_index
)
4413 // Global symbol key name
4414 // <stub-type>:<symbol name>:<addend>.
4415 const std::string sym_name
= this->u_
.symbol
->name();
4416 // We need to print two hex number and two colons. So just add 100 bytes
4417 // to the symbol name size.
4418 size_t len
= sym_name
.size() + 100;
4419 char* buffer
= new char[len
];
4420 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4421 sym_name
.c_str(), this->addend_
);
4422 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4424 return std::string(buffer
);
4428 // local symbol key name
4429 // <stub-type>:<object>:<r_sym>:<addend>.
4430 const size_t len
= 200;
4432 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4433 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4434 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4435 return std::string(buffer
);
4439 // Reloc_stub methods.
4441 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4442 // LOCATION to DESTINATION.
4443 // This code is based on the arm_type_of_stub function in
4444 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4448 Reloc_stub::stub_type_for_reloc(
4449 unsigned int r_type
,
4450 Arm_address location
,
4451 Arm_address destination
,
4452 bool target_is_thumb
)
4454 Stub_type stub_type
= arm_stub_none
;
4456 // This is a bit ugly but we want to avoid using a templated class for
4457 // big and little endianities.
4459 bool should_force_pic_veneer
;
4462 if (parameters
->target().is_big_endian())
4464 const Target_arm
<true>* big_endian_target
=
4465 Target_arm
<true>::default_target();
4466 may_use_blx
= big_endian_target
->may_use_blx();
4467 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4468 thumb2
= big_endian_target
->using_thumb2();
4469 thumb_only
= big_endian_target
->using_thumb_only();
4473 const Target_arm
<false>* little_endian_target
=
4474 Target_arm
<false>::default_target();
4475 may_use_blx
= little_endian_target
->may_use_blx();
4476 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4477 thumb2
= little_endian_target
->using_thumb2();
4478 thumb_only
= little_endian_target
->using_thumb_only();
4481 int64_t branch_offset
;
4482 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4484 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4485 // base address (instruction address + 4).
4486 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4487 destination
= utils::bit_select(destination
, location
, 0x2);
4488 branch_offset
= static_cast<int64_t>(destination
) - location
;
4490 // Handle cases where:
4491 // - this call goes too far (different Thumb/Thumb2 max
4493 // - it's a Thumb->Arm call and blx is not available, or it's a
4494 // Thumb->Arm branch (not bl). A stub is needed in this case.
4496 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4497 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4499 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4500 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4501 || ((!target_is_thumb
)
4502 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4503 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4505 if (target_is_thumb
)
4510 stub_type
= (parameters
->options().shared()
4511 || should_force_pic_veneer
)
4514 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4515 // V5T and above. Stub starts with ARM code, so
4516 // we must be able to switch mode before
4517 // reaching it, which is only possible for 'bl'
4518 // (ie R_ARM_THM_CALL relocation).
4519 ? arm_stub_long_branch_any_thumb_pic
4520 // On V4T, use Thumb code only.
4521 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4525 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4526 ? arm_stub_long_branch_any_any
// V5T and above.
4527 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4531 stub_type
= (parameters
->options().shared()
4532 || should_force_pic_veneer
)
4533 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4534 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4541 // FIXME: We should check that the input section is from an
4542 // object that has interwork enabled.
4544 stub_type
= (parameters
->options().shared()
4545 || should_force_pic_veneer
)
4548 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4549 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4550 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4554 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4555 ? arm_stub_long_branch_any_any
// V5T and above.
4556 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4558 // Handle v4t short branches.
4559 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4560 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4561 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4562 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4566 else if (r_type
== elfcpp::R_ARM_CALL
4567 || r_type
== elfcpp::R_ARM_JUMP24
4568 || r_type
== elfcpp::R_ARM_PLT32
)
4570 branch_offset
= static_cast<int64_t>(destination
) - location
;
4571 if (target_is_thumb
)
4575 // FIXME: We should check that the input section is from an
4576 // object that has interwork enabled.
4578 // We have an extra 2-bytes reach because of
4579 // the mode change (bit 24 (H) of BLX encoding).
4580 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4581 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4582 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4583 || (r_type
== elfcpp::R_ARM_JUMP24
)
4584 || (r_type
== elfcpp::R_ARM_PLT32
))
4586 stub_type
= (parameters
->options().shared()
4587 || should_force_pic_veneer
)
4590 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4591 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4595 ? arm_stub_long_branch_any_any
// V5T and above.
4596 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4602 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4603 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4605 stub_type
= (parameters
->options().shared()
4606 || should_force_pic_veneer
)
4607 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4608 : arm_stub_long_branch_any_any
; /// non-PIC.
4616 // Cortex_a8_stub methods.
4618 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4619 // I is the position of the instruction template in the stub template.
4622 Cortex_a8_stub::do_thumb16_special(size_t i
)
4624 // The only use of this is to copy condition code from a conditional
4625 // branch being worked around to the corresponding conditional branch in
4627 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4629 uint16_t data
= this->stub_template()->insns()[i
].data();
4630 gold_assert((data
& 0xff00U
) == 0xd000U
);
4631 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4635 // Stub_factory methods.
4637 Stub_factory::Stub_factory()
4639 // The instruction template sequences are declared as static
4640 // objects and initialized first time the constructor runs.
4642 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4643 // to reach the stub if necessary.
4644 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4646 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4647 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4648 // dcd R_ARM_ABS32(X)
4651 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4653 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4655 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4656 Insn_template::arm_insn(0xe12fff1c), // bx ip
4657 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4658 // dcd R_ARM_ABS32(X)
4661 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4662 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4664 Insn_template::thumb16_insn(0xb401), // push {r0}
4665 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4666 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4667 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4668 Insn_template::thumb16_insn(0x4760), // bx ip
4669 Insn_template::thumb16_insn(0xbf00), // nop
4670 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4671 // dcd R_ARM_ABS32(X)
4674 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4676 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4678 Insn_template::thumb16_insn(0x4778), // bx pc
4679 Insn_template::thumb16_insn(0x46c0), // nop
4680 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4681 Insn_template::arm_insn(0xe12fff1c), // bx ip
4682 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4683 // dcd R_ARM_ABS32(X)
4686 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4688 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4690 Insn_template::thumb16_insn(0x4778), // bx pc
4691 Insn_template::thumb16_insn(0x46c0), // nop
4692 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4693 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4694 // dcd R_ARM_ABS32(X)
4697 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4698 // one, when the destination is close enough.
4699 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4701 Insn_template::thumb16_insn(0x4778), // bx pc
4702 Insn_template::thumb16_insn(0x46c0), // nop
4703 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4706 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4707 // blx to reach the stub if necessary.
4708 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4710 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4711 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4712 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4713 // dcd R_ARM_REL32(X-4)
4716 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4717 // blx to reach the stub if necessary. We can not add into pc;
4718 // it is not guaranteed to mode switch (different in ARMv6 and
4720 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4722 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4723 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4724 Insn_template::arm_insn(0xe12fff1c), // bx ip
4725 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4726 // dcd R_ARM_REL32(X)
4729 // V4T ARM -> ARM long branch stub, PIC.
4730 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4732 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4733 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4734 Insn_template::arm_insn(0xe12fff1c), // bx ip
4735 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4736 // dcd R_ARM_REL32(X)
4739 // V4T Thumb -> ARM long branch stub, PIC.
4740 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4742 Insn_template::thumb16_insn(0x4778), // bx pc
4743 Insn_template::thumb16_insn(0x46c0), // nop
4744 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4745 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4746 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4747 // dcd R_ARM_REL32(X)
4750 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4752 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4754 Insn_template::thumb16_insn(0xb401), // push {r0}
4755 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4756 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4757 Insn_template::thumb16_insn(0x4484), // add ip, r0
4758 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4759 Insn_template::thumb16_insn(0x4760), // bx ip
4760 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4761 // dcd R_ARM_REL32(X)
4764 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4766 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4768 Insn_template::thumb16_insn(0x4778), // bx pc
4769 Insn_template::thumb16_insn(0x46c0), // nop
4770 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4771 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4772 Insn_template::arm_insn(0xe12fff1c), // bx ip
4773 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4774 // dcd R_ARM_REL32(X)
4777 // Cortex-A8 erratum-workaround stubs.
4779 // Stub used for conditional branches (which may be beyond +/-1MB away,
4780 // so we can't use a conditional branch to reach this stub).
4787 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4789 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4790 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4791 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4795 // Stub used for b.w and bl.w instructions.
4797 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4799 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4802 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4804 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4807 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4808 // instruction (which switches to ARM mode) to point to this stub. Jump to
4809 // the real destination using an ARM-mode branch.
4810 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4812 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4815 // Stub used to provide an interworking for R_ARM_V4BX relocation
4816 // (bx r[n] instruction).
4817 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4819 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4820 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4821 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4824 // Fill in the stub template look-up table. Stub templates are constructed
4825 // per instance of Stub_factory for fast look-up without locking
4826 // in a thread-enabled environment.
4828 this->stub_templates_
[arm_stub_none
] =
4829 new Stub_template(arm_stub_none
, NULL
, 0);
4831 #define DEF_STUB(x) \
4835 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4836 Stub_type type = arm_stub_##x; \
4837 this->stub_templates_[type] = \
4838 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4846 // Stub_table methods.
4848 // Remove all Cortex-A8 stub.
4850 template<bool big_endian
>
4852 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4854 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4855 p
!= this->cortex_a8_stubs_
.end();
4858 this->cortex_a8_stubs_
.clear();
4861 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4863 template<bool big_endian
>
4865 Stub_table
<big_endian
>::relocate_stub(
4867 const Relocate_info
<32, big_endian
>* relinfo
,
4868 Target_arm
<big_endian
>* arm_target
,
4869 Output_section
* output_section
,
4870 unsigned char* view
,
4871 Arm_address address
,
4872 section_size_type view_size
)
4874 const Stub_template
* stub_template
= stub
->stub_template();
4875 if (stub_template
->reloc_count() != 0)
4877 // Adjust view to cover the stub only.
4878 section_size_type offset
= stub
->offset();
4879 section_size_type stub_size
= stub_template
->size();
4880 gold_assert(offset
+ stub_size
<= view_size
);
4882 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4883 address
+ offset
, stub_size
);
4887 // Relocate all stubs in this stub table.
4889 template<bool big_endian
>
4891 Stub_table
<big_endian
>::relocate_stubs(
4892 const Relocate_info
<32, big_endian
>* relinfo
,
4893 Target_arm
<big_endian
>* arm_target
,
4894 Output_section
* output_section
,
4895 unsigned char* view
,
4896 Arm_address address
,
4897 section_size_type view_size
)
4899 // If we are passed a view bigger than the stub table's. we need to
4901 gold_assert(address
== this->address()
4903 == static_cast<section_size_type
>(this->data_size())));
4905 // Relocate all relocation stubs.
4906 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4907 p
!= this->reloc_stubs_
.end();
4909 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4910 address
, view_size
);
4912 // Relocate all Cortex-A8 stubs.
4913 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4914 p
!= this->cortex_a8_stubs_
.end();
4916 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4917 address
, view_size
);
4919 // Relocate all ARM V4BX stubs.
4920 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4921 p
!= this->arm_v4bx_stubs_
.end();
4925 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4926 address
, view_size
);
4930 // Write out the stubs to file.
4932 template<bool big_endian
>
4934 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4936 off_t offset
= this->offset();
4937 const section_size_type oview_size
=
4938 convert_to_section_size_type(this->data_size());
4939 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4941 // Write relocation stubs.
4942 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4943 p
!= this->reloc_stubs_
.end();
4946 Reloc_stub
* stub
= p
->second
;
4947 Arm_address address
= this->address() + stub
->offset();
4949 == align_address(address
,
4950 stub
->stub_template()->alignment()));
4951 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4955 // Write Cortex-A8 stubs.
4956 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4957 p
!= this->cortex_a8_stubs_
.end();
4960 Cortex_a8_stub
* stub
= p
->second
;
4961 Arm_address address
= this->address() + stub
->offset();
4963 == align_address(address
,
4964 stub
->stub_template()->alignment()));
4965 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4969 // Write ARM V4BX relocation stubs.
4970 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4971 p
!= this->arm_v4bx_stubs_
.end();
4977 Arm_address address
= this->address() + (*p
)->offset();
4979 == align_address(address
,
4980 (*p
)->stub_template()->alignment()));
4981 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4985 of
->write_output_view(this->offset(), oview_size
, oview
);
4988 // Update the data size and address alignment of the stub table at the end
4989 // of a relaxation pass. Return true if either the data size or the
4990 // alignment changed in this relaxation pass.
4992 template<bool big_endian
>
4994 Stub_table
<big_endian
>::update_data_size_and_addralign()
4996 // Go over all stubs in table to compute data size and address alignment.
4997 off_t size
= this->reloc_stubs_size_
;
4998 unsigned addralign
= this->reloc_stubs_addralign_
;
5000 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5001 p
!= this->cortex_a8_stubs_
.end();
5004 const Stub_template
* stub_template
= p
->second
->stub_template();
5005 addralign
= std::max(addralign
, stub_template
->alignment());
5006 size
= (align_address(size
, stub_template
->alignment())
5007 + stub_template
->size());
5010 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5011 p
!= this->arm_v4bx_stubs_
.end();
5017 const Stub_template
* stub_template
= (*p
)->stub_template();
5018 addralign
= std::max(addralign
, stub_template
->alignment());
5019 size
= (align_address(size
, stub_template
->alignment())
5020 + stub_template
->size());
5023 // Check if either data size or alignment changed in this pass.
5024 // Update prev_data_size_ and prev_addralign_. These will be used
5025 // as the current data size and address alignment for the next pass.
5026 bool changed
= size
!= this->prev_data_size_
;
5027 this->prev_data_size_
= size
;
5029 if (addralign
!= this->prev_addralign_
)
5031 this->prev_addralign_
= addralign
;
5036 // Finalize the stubs. This sets the offsets of the stubs within the stub
5037 // table. It also marks all input sections needing Cortex-A8 workaround.
5039 template<bool big_endian
>
5041 Stub_table
<big_endian
>::finalize_stubs()
5043 off_t off
= this->reloc_stubs_size_
;
5044 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5045 p
!= this->cortex_a8_stubs_
.end();
5048 Cortex_a8_stub
* stub
= p
->second
;
5049 const Stub_template
* stub_template
= stub
->stub_template();
5050 uint64_t stub_addralign
= stub_template
->alignment();
5051 off
= align_address(off
, stub_addralign
);
5052 stub
->set_offset(off
);
5053 off
+= stub_template
->size();
5055 // Mark input section so that we can determine later if a code section
5056 // needs the Cortex-A8 workaround quickly.
5057 Arm_relobj
<big_endian
>* arm_relobj
=
5058 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5059 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5062 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5063 p
!= this->arm_v4bx_stubs_
.end();
5069 const Stub_template
* stub_template
= (*p
)->stub_template();
5070 uint64_t stub_addralign
= stub_template
->alignment();
5071 off
= align_address(off
, stub_addralign
);
5072 (*p
)->set_offset(off
);
5073 off
+= stub_template
->size();
5076 gold_assert(off
<= this->prev_data_size_
);
5079 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5080 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5081 // of the address range seen by the linker.
5083 template<bool big_endian
>
5085 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5086 Target_arm
<big_endian
>* arm_target
,
5087 unsigned char* view
,
5088 Arm_address view_address
,
5089 section_size_type view_size
)
5091 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5092 for (Cortex_a8_stub_list::const_iterator p
=
5093 this->cortex_a8_stubs_
.lower_bound(view_address
);
5094 ((p
!= this->cortex_a8_stubs_
.end())
5095 && (p
->first
< (view_address
+ view_size
)));
5098 // We do not store the THUMB bit in the LSB of either the branch address
5099 // or the stub offset. There is no need to strip the LSB.
5100 Arm_address branch_address
= p
->first
;
5101 const Cortex_a8_stub
* stub
= p
->second
;
5102 Arm_address stub_address
= this->address() + stub
->offset();
5104 // Offset of the branch instruction relative to this view.
5105 section_size_type offset
=
5106 convert_to_section_size_type(branch_address
- view_address
);
5107 gold_assert((offset
+ 4) <= view_size
);
5109 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5110 view
+ offset
, branch_address
);
5114 // Arm_input_section methods.
5116 // Initialize an Arm_input_section.
5118 template<bool big_endian
>
5120 Arm_input_section
<big_endian
>::init()
5122 Relobj
* relobj
= this->relobj();
5123 unsigned int shndx
= this->shndx();
5125 // We have to cache original size, alignment and contents to avoid locking
5126 // the original file.
5127 this->original_addralign_
=
5128 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5130 // This is not efficient but we expect only a small number of relaxed
5131 // input sections for stubs.
5132 section_size_type section_size
;
5133 const unsigned char* section_contents
=
5134 relobj
->section_contents(shndx
, §ion_size
, false);
5135 this->original_size_
=
5136 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5138 gold_assert(this->original_contents_
== NULL
);
5139 this->original_contents_
= new unsigned char[section_size
];
5140 memcpy(this->original_contents_
, section_contents
, section_size
);
5142 // We want to make this look like the original input section after
5143 // output sections are finalized.
5144 Output_section
* os
= relobj
->output_section(shndx
);
5145 off_t offset
= relobj
->output_section_offset(shndx
);
5146 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5147 this->set_address(os
->address() + offset
);
5148 this->set_file_offset(os
->offset() + offset
);
5150 this->set_current_data_size(this->original_size_
);
5151 this->finalize_data_size();
5154 template<bool big_endian
>
5156 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5158 // We have to write out the original section content.
5159 gold_assert(this->original_contents_
!= NULL
);
5160 of
->write(this->offset(), this->original_contents_
,
5161 this->original_size_
);
5163 // If this owns a stub table and it is not empty, write it.
5164 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5165 this->stub_table_
->write(of
);
5168 // Finalize data size.
5170 template<bool big_endian
>
5172 Arm_input_section
<big_endian
>::set_final_data_size()
5174 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5176 if (this->is_stub_table_owner())
5178 this->stub_table_
->finalize_data_size();
5179 off
= align_address(off
, this->stub_table_
->addralign());
5180 off
+= this->stub_table_
->data_size();
5182 this->set_data_size(off
);
5185 // Reset address and file offset.
5187 template<bool big_endian
>
5189 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5191 // Size of the original input section contents.
5192 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5194 // If this is a stub table owner, account for the stub table size.
5195 if (this->is_stub_table_owner())
5197 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5199 // Reset the stub table's address and file offset. The
5200 // current data size for child will be updated after that.
5201 stub_table_
->reset_address_and_file_offset();
5202 off
= align_address(off
, stub_table_
->addralign());
5203 off
+= stub_table
->current_data_size();
5206 this->set_current_data_size(off
);
5209 // Arm_exidx_cantunwind methods.
5211 // Write this to Output file OF for a fixed endianness.
5213 template<bool big_endian
>
5215 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5217 off_t offset
= this->offset();
5218 const section_size_type oview_size
= 8;
5219 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5221 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5222 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
);
5224 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5225 gold_assert(os
!= NULL
);
5227 Arm_relobj
<big_endian
>* arm_relobj
=
5228 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5229 Arm_address output_offset
=
5230 arm_relobj
->get_output_section_offset(this->shndx_
);
5231 Arm_address section_start
;
5232 section_size_type section_size
;
5234 // Find out the end of the text section referred by this.
5235 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5237 section_start
= os
->address() + output_offset
;
5238 const Arm_exidx_input_section
* exidx_input_section
=
5239 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5240 gold_assert(exidx_input_section
!= NULL
);
5242 convert_to_section_size_type(exidx_input_section
->text_size());
5246 // Currently this only happens for a relaxed section.
5247 const Output_relaxed_input_section
* poris
=
5248 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5249 gold_assert(poris
!= NULL
);
5250 section_start
= poris
->address();
5251 section_size
= convert_to_section_size_type(poris
->data_size());
5254 // We always append this to the end of an EXIDX section.
5255 Arm_address output_address
= section_start
+ section_size
;
5257 // Write out the entry. The first word either points to the beginning
5258 // or after the end of a text section. The second word is the special
5259 // EXIDX_CANTUNWIND value.
5260 uint32_t prel31_offset
= output_address
- this->address();
5261 if (utils::has_overflow
<31>(offset
))
5262 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5263 elfcpp::Swap
<32, big_endian
>::writeval(wv
, prel31_offset
& 0x7fffffffU
);
5264 elfcpp::Swap
<32, big_endian
>::writeval(wv
+ 1, elfcpp::EXIDX_CANTUNWIND
);
5266 of
->write_output_view(this->offset(), oview_size
, oview
);
5269 // Arm_exidx_merged_section methods.
5271 // Constructor for Arm_exidx_merged_section.
5272 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5273 // SECTION_OFFSET_MAP points to a section offset map describing how
5274 // parts of the input section are mapped to output. DELETED_BYTES is
5275 // the number of bytes deleted from the EXIDX input section.
5277 Arm_exidx_merged_section::Arm_exidx_merged_section(
5278 const Arm_exidx_input_section
& exidx_input_section
,
5279 const Arm_exidx_section_offset_map
& section_offset_map
,
5280 uint32_t deleted_bytes
)
5281 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5282 exidx_input_section
.shndx(),
5283 exidx_input_section
.addralign()),
5284 exidx_input_section_(exidx_input_section
),
5285 section_offset_map_(section_offset_map
)
5287 // If we retain or discard the whole EXIDX input section, we would
5289 gold_assert(deleted_bytes
!= 0
5290 && deleted_bytes
!= this->exidx_input_section_
.size());
5292 // Fix size here so that we do not need to implement set_final_data_size.
5293 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5294 this->set_data_size(size
);
5295 this->fix_data_size();
5297 // Allocate buffer for section contents and build contents.
5298 this->section_contents_
= new unsigned char[size
];
5301 // Build the contents of a merged EXIDX output section.
5304 Arm_exidx_merged_section::build_contents(
5305 const unsigned char* original_contents
,
5306 section_size_type original_size
)
5308 // Go over spans of input offsets and write only those that are not
5310 section_offset_type in_start
= 0;
5311 section_offset_type out_start
= 0;
5312 section_offset_type in_max
=
5313 convert_types
<section_offset_type
>(original_size
);
5314 section_offset_type out_max
=
5315 convert_types
<section_offset_type
>(this->data_size());
5316 for (Arm_exidx_section_offset_map::const_iterator p
=
5317 this->section_offset_map_
.begin();
5318 p
!= this->section_offset_map_
.end();
5321 section_offset_type in_end
= p
->first
;
5322 gold_assert(in_end
>= in_start
);
5323 section_offset_type out_end
= p
->second
;
5324 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5327 size_t out_chunk_size
=
5328 convert_types
<size_t>(out_end
- out_start
+ 1);
5330 gold_assert(out_chunk_size
== in_chunk_size
5331 && in_end
< in_max
&& out_end
< out_max
);
5333 memcpy(this->section_contents_
+ out_start
,
5334 original_contents
+ in_start
,
5336 out_start
+= out_chunk_size
;
5338 in_start
+= in_chunk_size
;
5342 // Given an input OBJECT, an input section index SHNDX within that
5343 // object, and an OFFSET relative to the start of that input
5344 // section, return whether or not the corresponding offset within
5345 // the output section is known. If this function returns true, it
5346 // sets *POUTPUT to the output offset. The value -1 indicates that
5347 // this input offset is being discarded.
5350 Arm_exidx_merged_section::do_output_offset(
5351 const Relobj
* relobj
,
5353 section_offset_type offset
,
5354 section_offset_type
* poutput
) const
5356 // We only handle offsets for the original EXIDX input section.
5357 if (relobj
!= this->exidx_input_section_
.relobj()
5358 || shndx
!= this->exidx_input_section_
.shndx())
5361 section_offset_type section_size
=
5362 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5363 if (offset
< 0 || offset
>= section_size
)
5364 // Input offset is out of valid range.
5368 // We need to look up the section offset map to determine the output
5369 // offset. Find the reference point in map that is first offset
5370 // bigger than or equal to this offset.
5371 Arm_exidx_section_offset_map::const_iterator p
=
5372 this->section_offset_map_
.lower_bound(offset
);
5374 // The section offset maps are build such that this should not happen if
5375 // input offset is in the valid range.
5376 gold_assert(p
!= this->section_offset_map_
.end());
5378 // We need to check if this is dropped.
5379 section_offset_type ref
= p
->first
;
5380 section_offset_type mapped_ref
= p
->second
;
5382 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5383 // Offset is present in output.
5384 *poutput
= mapped_ref
+ (offset
- ref
);
5386 // Offset is discarded owing to EXIDX entry merging.
5393 // Write this to output file OF.
5396 Arm_exidx_merged_section::do_write(Output_file
* of
)
5398 off_t offset
= this->offset();
5399 const section_size_type oview_size
= this->data_size();
5400 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5402 Output_section
* os
= this->relobj()->output_section(this->shndx());
5403 gold_assert(os
!= NULL
);
5405 memcpy(oview
, this->section_contents_
, oview_size
);
5406 of
->write_output_view(this->offset(), oview_size
, oview
);
5409 // Arm_exidx_fixup methods.
5411 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5412 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5413 // points to the end of the last seen EXIDX section.
5416 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5418 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5419 && this->last_input_section_
!= NULL
)
5421 Relobj
* relobj
= this->last_input_section_
->relobj();
5422 unsigned int text_shndx
= this->last_input_section_
->link();
5423 Arm_exidx_cantunwind
* cantunwind
=
5424 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5425 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5426 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5430 // Process an EXIDX section entry in input. Return whether this entry
5431 // can be deleted in the output. SECOND_WORD in the second word of the
5435 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5438 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5440 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5441 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5442 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5444 else if ((second_word
& 0x80000000) != 0)
5446 // Inlined unwinding data. Merge if equal to previous.
5447 delete_entry
= (merge_exidx_entries_
5448 && this->last_unwind_type_
== UT_INLINED_ENTRY
5449 && this->last_inlined_entry_
== second_word
);
5450 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5451 this->last_inlined_entry_
= second_word
;
5455 // Normal table entry. In theory we could merge these too,
5456 // but duplicate entries are likely to be much less common.
5457 delete_entry
= false;
5458 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5460 return delete_entry
;
5463 // Update the current section offset map during EXIDX section fix-up.
5464 // If there is no map, create one. INPUT_OFFSET is the offset of a
5465 // reference point, DELETED_BYTES is the number of deleted by in the
5466 // section so far. If DELETE_ENTRY is true, the reference point and
5467 // all offsets after the previous reference point are discarded.
5470 Arm_exidx_fixup::update_offset_map(
5471 section_offset_type input_offset
,
5472 section_size_type deleted_bytes
,
5475 if (this->section_offset_map_
== NULL
)
5476 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5477 section_offset_type output_offset
;
5479 output_offset
= Arm_exidx_input_section::invalid_offset
;
5481 output_offset
= input_offset
- deleted_bytes
;
5482 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5485 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5486 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5487 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5488 // If some entries are merged, also store a pointer to a newly created
5489 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5490 // owns the map and is responsible for releasing it after use.
5492 template<bool big_endian
>
5494 Arm_exidx_fixup::process_exidx_section(
5495 const Arm_exidx_input_section
* exidx_input_section
,
5496 const unsigned char* section_contents
,
5497 section_size_type section_size
,
5498 Arm_exidx_section_offset_map
** psection_offset_map
)
5500 Relobj
* relobj
= exidx_input_section
->relobj();
5501 unsigned shndx
= exidx_input_section
->shndx();
5503 if ((section_size
% 8) != 0)
5505 // Something is wrong with this section. Better not touch it.
5506 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5507 relobj
->name().c_str(), shndx
);
5508 this->last_input_section_
= exidx_input_section
;
5509 this->last_unwind_type_
= UT_NONE
;
5513 uint32_t deleted_bytes
= 0;
5514 bool prev_delete_entry
= false;
5515 gold_assert(this->section_offset_map_
== NULL
);
5517 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5519 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5521 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5522 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5524 bool delete_entry
= this->process_exidx_entry(second_word
);
5526 // Entry deletion causes changes in output offsets. We use a std::map
5527 // to record these. And entry (x, y) means input offset x
5528 // is mapped to output offset y. If y is invalid_offset, then x is
5529 // dropped in the output. Because of the way std::map::lower_bound
5530 // works, we record the last offset in a region w.r.t to keeping or
5531 // dropping. If there is no entry (x0, y0) for an input offset x0,
5532 // the output offset y0 of it is determined by the output offset y1 of
5533 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5534 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5536 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5537 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5539 // Update total deleted bytes for this entry.
5543 prev_delete_entry
= delete_entry
;
5546 // If section offset map is not NULL, make an entry for the end of
5548 if (this->section_offset_map_
!= NULL
)
5549 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5551 *psection_offset_map
= this->section_offset_map_
;
5552 this->section_offset_map_
= NULL
;
5553 this->last_input_section_
= exidx_input_section
;
5555 // Set the first output text section so that we can link the EXIDX output
5556 // section to it. Ignore any EXIDX input section that is completely merged.
5557 if (this->first_output_text_section_
== NULL
5558 && deleted_bytes
!= section_size
)
5560 unsigned int link
= exidx_input_section
->link();
5561 Output_section
* os
= relobj
->output_section(link
);
5562 gold_assert(os
!= NULL
);
5563 this->first_output_text_section_
= os
;
5566 return deleted_bytes
;
5569 // Arm_output_section methods.
5571 // Create a stub group for input sections from BEGIN to END. OWNER
5572 // points to the input section to be the owner a new stub table.
5574 template<bool big_endian
>
5576 Arm_output_section
<big_endian
>::create_stub_group(
5577 Input_section_list::const_iterator begin
,
5578 Input_section_list::const_iterator end
,
5579 Input_section_list::const_iterator owner
,
5580 Target_arm
<big_endian
>* target
,
5581 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5584 // We use a different kind of relaxed section in an EXIDX section.
5585 // The static casting from Output_relaxed_input_section to
5586 // Arm_input_section is invalid in an EXIDX section. We are okay
5587 // because we should not be calling this for an EXIDX section.
5588 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5590 // Currently we convert ordinary input sections into relaxed sections only
5591 // at this point but we may want to support creating relaxed input section
5592 // very early. So we check here to see if owner is already a relaxed
5595 Arm_input_section
<big_endian
>* arm_input_section
;
5596 if (owner
->is_relaxed_input_section())
5599 Arm_input_section
<big_endian
>::as_arm_input_section(
5600 owner
->relaxed_input_section());
5604 gold_assert(owner
->is_input_section());
5605 // Create a new relaxed input section. We need to lock the original
5607 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5609 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5610 new_relaxed_sections
->push_back(arm_input_section
);
5613 // Create a stub table.
5614 Stub_table
<big_endian
>* stub_table
=
5615 target
->new_stub_table(arm_input_section
);
5617 arm_input_section
->set_stub_table(stub_table
);
5619 Input_section_list::const_iterator p
= begin
;
5620 Input_section_list::const_iterator prev_p
;
5622 // Look for input sections or relaxed input sections in [begin ... end].
5625 if (p
->is_input_section() || p
->is_relaxed_input_section())
5627 // The stub table information for input sections live
5628 // in their objects.
5629 Arm_relobj
<big_endian
>* arm_relobj
=
5630 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5631 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5635 while (prev_p
!= end
);
5638 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5639 // of stub groups. We grow a stub group by adding input section until the
5640 // size is just below GROUP_SIZE. The last input section will be converted
5641 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5642 // input section after the stub table, effectively double the group size.
5644 // This is similar to the group_sections() function in elf32-arm.c but is
5645 // implemented differently.
5647 template<bool big_endian
>
5649 Arm_output_section
<big_endian
>::group_sections(
5650 section_size_type group_size
,
5651 bool stubs_always_after_branch
,
5652 Target_arm
<big_endian
>* target
,
5655 // We only care about sections containing code.
5656 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5659 // States for grouping.
5662 // No group is being built.
5664 // A group is being built but the stub table is not found yet.
5665 // We keep group a stub group until the size is just under GROUP_SIZE.
5666 // The last input section in the group will be used as the stub table.
5667 FINDING_STUB_SECTION
,
5668 // A group is being built and we have already found a stub table.
5669 // We enter this state to grow a stub group by adding input section
5670 // after the stub table. This effectively doubles the group size.
5674 // Any newly created relaxed sections are stored here.
5675 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5677 State state
= NO_GROUP
;
5678 section_size_type off
= 0;
5679 section_size_type group_begin_offset
= 0;
5680 section_size_type group_end_offset
= 0;
5681 section_size_type stub_table_end_offset
= 0;
5682 Input_section_list::const_iterator group_begin
=
5683 this->input_sections().end();
5684 Input_section_list::const_iterator stub_table
=
5685 this->input_sections().end();
5686 Input_section_list::const_iterator group_end
= this->input_sections().end();
5687 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5688 p
!= this->input_sections().end();
5691 section_size_type section_begin_offset
=
5692 align_address(off
, p
->addralign());
5693 section_size_type section_end_offset
=
5694 section_begin_offset
+ p
->data_size();
5696 // Check to see if we should group the previously seen sections.
5702 case FINDING_STUB_SECTION
:
5703 // Adding this section makes the group larger than GROUP_SIZE.
5704 if (section_end_offset
- group_begin_offset
>= group_size
)
5706 if (stubs_always_after_branch
)
5708 gold_assert(group_end
!= this->input_sections().end());
5709 this->create_stub_group(group_begin
, group_end
, group_end
,
5710 target
, &new_relaxed_sections
,
5716 // But wait, there's more! Input sections up to
5717 // stub_group_size bytes after the stub table can be
5718 // handled by it too.
5719 state
= HAS_STUB_SECTION
;
5720 stub_table
= group_end
;
5721 stub_table_end_offset
= group_end_offset
;
5726 case HAS_STUB_SECTION
:
5727 // Adding this section makes the post stub-section group larger
5729 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5731 gold_assert(group_end
!= this->input_sections().end());
5732 this->create_stub_group(group_begin
, group_end
, stub_table
,
5733 target
, &new_relaxed_sections
, task
);
5742 // If we see an input section and currently there is no group, start
5743 // a new one. Skip any empty sections. We look at the data size
5744 // instead of calling p->relobj()->section_size() to avoid locking.
5745 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5746 && (p
->data_size() != 0))
5748 if (state
== NO_GROUP
)
5750 state
= FINDING_STUB_SECTION
;
5752 group_begin_offset
= section_begin_offset
;
5755 // Keep track of the last input section seen.
5757 group_end_offset
= section_end_offset
;
5760 off
= section_end_offset
;
5763 // Create a stub group for any ungrouped sections.
5764 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5766 gold_assert(group_end
!= this->input_sections().end());
5767 this->create_stub_group(group_begin
, group_end
,
5768 (state
== FINDING_STUB_SECTION
5771 target
, &new_relaxed_sections
, task
);
5774 // Convert input section into relaxed input section in a batch.
5775 if (!new_relaxed_sections
.empty())
5776 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5778 // Update the section offsets
5779 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5781 Arm_relobj
<big_endian
>* arm_relobj
=
5782 Arm_relobj
<big_endian
>::as_arm_relobj(
5783 new_relaxed_sections
[i
]->relobj());
5784 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5785 // Tell Arm_relobj that this input section is converted.
5786 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5790 // Append non empty text sections in this to LIST in ascending
5791 // order of their position in this.
5793 template<bool big_endian
>
5795 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5796 Text_section_list
* list
)
5798 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5800 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5801 p
!= this->input_sections().end();
5804 // We only care about plain or relaxed input sections. We also
5805 // ignore any merged sections.
5806 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5807 && p
->data_size() != 0)
5808 list
->push_back(Text_section_list::value_type(p
->relobj(),
5813 template<bool big_endian
>
5815 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5817 const Text_section_list
& sorted_text_sections
,
5818 Symbol_table
* symtab
,
5819 bool merge_exidx_entries
,
5822 // We should only do this for the EXIDX output section.
5823 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5825 // We don't want the relaxation loop to undo these changes, so we discard
5826 // the current saved states and take another one after the fix-up.
5827 this->discard_states();
5829 // Remove all input sections.
5830 uint64_t address
= this->address();
5831 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5832 Input_section_list input_sections
;
5833 this->reset_address_and_file_offset();
5834 this->get_input_sections(address
, std::string(""), &input_sections
);
5836 if (!this->input_sections().empty())
5837 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5839 // Go through all the known input sections and record them.
5840 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5841 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5842 Section_id_hash
> Text_to_exidx_map
;
5843 Text_to_exidx_map text_to_exidx_map
;
5844 for (Input_section_list::const_iterator p
= input_sections
.begin();
5845 p
!= input_sections
.end();
5848 // This should never happen. At this point, we should only see
5849 // plain EXIDX input sections.
5850 gold_assert(!p
->is_relaxed_input_section());
5851 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5854 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5856 // Go over the sorted text sections.
5857 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5858 Section_id_set processed_input_sections
;
5859 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5860 p
!= sorted_text_sections
.end();
5863 Relobj
* relobj
= p
->first
;
5864 unsigned int shndx
= p
->second
;
5866 Arm_relobj
<big_endian
>* arm_relobj
=
5867 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5868 const Arm_exidx_input_section
* exidx_input_section
=
5869 arm_relobj
->exidx_input_section_by_link(shndx
);
5871 // If this text section has no EXIDX section or if the EXIDX section
5872 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5873 // of the last seen EXIDX section.
5874 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5876 exidx_fixup
.add_exidx_cantunwind_as_needed();
5880 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5881 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5882 Section_id
sid(exidx_relobj
, exidx_shndx
);
5883 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5884 if (iter
== text_to_exidx_map
.end())
5886 // This is odd. We have not seen this EXIDX input section before.
5887 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5888 // issue a warning instead. We assume the user knows what he
5889 // or she is doing. Otherwise, this is an error.
5890 if (layout
->script_options()->saw_sections_clause())
5891 gold_warning(_("unwinding may not work because EXIDX input section"
5892 " %u of %s is not in EXIDX output section"),
5893 exidx_shndx
, exidx_relobj
->name().c_str());
5895 gold_error(_("unwinding may not work because EXIDX input section"
5896 " %u of %s is not in EXIDX output section"),
5897 exidx_shndx
, exidx_relobj
->name().c_str());
5899 exidx_fixup
.add_exidx_cantunwind_as_needed();
5903 // We need to access the contents of the EXIDX section, lock the
5905 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5906 section_size_type exidx_size
;
5907 const unsigned char* exidx_contents
=
5908 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5910 // Fix up coverage and append input section to output data list.
5911 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5912 uint32_t deleted_bytes
=
5913 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5916 §ion_offset_map
);
5918 if (deleted_bytes
== exidx_input_section
->size())
5920 // The whole EXIDX section got merged. Remove it from output.
5921 gold_assert(section_offset_map
== NULL
);
5922 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5924 // All local symbols defined in this input section will be dropped.
5925 // We need to adjust output local symbol count.
5926 arm_relobj
->set_output_local_symbol_count_needs_update();
5928 else if (deleted_bytes
> 0)
5930 // Some entries are merged. We need to convert this EXIDX input
5931 // section into a relaxed section.
5932 gold_assert(section_offset_map
!= NULL
);
5934 Arm_exidx_merged_section
* merged_section
=
5935 new Arm_exidx_merged_section(*exidx_input_section
,
5936 *section_offset_map
, deleted_bytes
);
5937 merged_section
->build_contents(exidx_contents
, exidx_size
);
5939 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
5940 this->add_relaxed_input_section(layout
, merged_section
, secname
);
5941 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5943 // All local symbols defined in discarded portions of this input
5944 // section will be dropped. We need to adjust output local symbol
5946 arm_relobj
->set_output_local_symbol_count_needs_update();
5950 // Just add back the EXIDX input section.
5951 gold_assert(section_offset_map
== NULL
);
5952 const Output_section::Input_section
* pis
= iter
->second
;
5953 gold_assert(pis
->is_input_section());
5954 this->add_script_input_section(*pis
);
5957 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5960 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5961 exidx_fixup
.add_exidx_cantunwind_as_needed();
5963 // Remove any known EXIDX input sections that are not processed.
5964 for (Input_section_list::const_iterator p
= input_sections
.begin();
5965 p
!= input_sections
.end();
5968 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5969 == processed_input_sections
.end())
5971 // We discard a known EXIDX section because its linked
5972 // text section has been folded by ICF. We also discard an
5973 // EXIDX section with error, the output does not matter in this
5974 // case. We do this to avoid triggering asserts.
5975 Arm_relobj
<big_endian
>* arm_relobj
=
5976 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5977 const Arm_exidx_input_section
* exidx_input_section
=
5978 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5979 gold_assert(exidx_input_section
!= NULL
);
5980 if (!exidx_input_section
->has_errors())
5982 unsigned int text_shndx
= exidx_input_section
->link();
5983 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5986 // Remove this from link. We also need to recount the
5988 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5989 arm_relobj
->set_output_local_symbol_count_needs_update();
5993 // Link exidx output section to the first seen output section and
5994 // set correct entry size.
5995 this->set_link_section(exidx_fixup
.first_output_text_section());
5996 this->set_entsize(8);
5998 // Make changes permanent.
5999 this->save_states();
6000 this->set_section_offsets_need_adjustment();
6003 // Link EXIDX output sections to text output sections.
6005 template<bool big_endian
>
6007 Arm_output_section
<big_endian
>::set_exidx_section_link()
6009 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6010 if (!this->input_sections().empty())
6012 Input_section_list::const_iterator p
= this->input_sections().begin();
6013 Arm_relobj
<big_endian
>* arm_relobj
=
6014 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6015 unsigned exidx_shndx
= p
->shndx();
6016 const Arm_exidx_input_section
* exidx_input_section
=
6017 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6018 gold_assert(exidx_input_section
!= NULL
);
6019 unsigned int text_shndx
= exidx_input_section
->link();
6020 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6021 this->set_link_section(os
);
6025 // Arm_relobj methods.
6027 // Determine if an input section is scannable for stub processing. SHDR is
6028 // the header of the section and SHNDX is the section index. OS is the output
6029 // section for the input section and SYMTAB is the global symbol table used to
6030 // look up ICF information.
6032 template<bool big_endian
>
6034 Arm_relobj
<big_endian
>::section_is_scannable(
6035 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6037 const Output_section
* os
,
6038 const Symbol_table
* symtab
)
6040 // Skip any empty sections, unallocated sections or sections whose
6041 // type are not SHT_PROGBITS.
6042 if (shdr
.get_sh_size() == 0
6043 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6044 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6047 // Skip any discarded or ICF'ed sections.
6048 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6051 // If this requires special offset handling, check to see if it is
6052 // a relaxed section. If this is not, then it is a merged section that
6053 // we cannot handle.
6054 if (this->is_output_section_offset_invalid(shndx
))
6056 const Output_relaxed_input_section
* poris
=
6057 os
->find_relaxed_input_section(this, shndx
);
6065 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6066 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6068 template<bool big_endian
>
6070 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6071 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6072 const Relobj::Output_sections
& out_sections
,
6073 const Symbol_table
* symtab
,
6074 const unsigned char* pshdrs
)
6076 unsigned int sh_type
= shdr
.get_sh_type();
6077 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6080 // Ignore empty section.
6081 off_t sh_size
= shdr
.get_sh_size();
6085 // Ignore reloc section with unexpected symbol table. The
6086 // error will be reported in the final link.
6087 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6090 unsigned int reloc_size
;
6091 if (sh_type
== elfcpp::SHT_REL
)
6092 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6094 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6096 // Ignore reloc section with unexpected entsize or uneven size.
6097 // The error will be reported in the final link.
6098 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6101 // Ignore reloc section with bad info. This error will be
6102 // reported in the final link.
6103 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6104 if (index
>= this->shnum())
6107 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6108 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6109 return this->section_is_scannable(text_shdr
, index
,
6110 out_sections
[index
], symtab
);
6113 // Return the output address of either a plain input section or a relaxed
6114 // input section. SHNDX is the section index. We define and use this
6115 // instead of calling Output_section::output_address because that is slow
6116 // for large output.
6118 template<bool big_endian
>
6120 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6124 if (this->is_output_section_offset_invalid(shndx
))
6126 const Output_relaxed_input_section
* poris
=
6127 os
->find_relaxed_input_section(this, shndx
);
6128 // We do not handle merged sections here.
6129 gold_assert(poris
!= NULL
);
6130 return poris
->address();
6133 return os
->address() + this->get_output_section_offset(shndx
);
6136 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6137 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6139 template<bool big_endian
>
6141 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6142 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6145 const Symbol_table
* symtab
)
6147 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6150 // If the section does not cross any 4K-boundaries, it does not need to
6152 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6153 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6159 // Scan a section for Cortex-A8 workaround.
6161 template<bool big_endian
>
6163 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6164 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6167 Target_arm
<big_endian
>* arm_target
)
6169 // Look for the first mapping symbol in this section. It should be
6171 Mapping_symbol_position
section_start(shndx
, 0);
6172 typename
Mapping_symbols_info::const_iterator p
=
6173 this->mapping_symbols_info_
.lower_bound(section_start
);
6175 // There are no mapping symbols for this section. Treat it as a data-only
6176 // section. Issue a warning if section is marked as containing
6178 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6180 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
6181 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6182 "erratum because it has no mapping symbols."),
6183 shndx
, this->name().c_str());
6187 Arm_address output_address
=
6188 this->simple_input_section_output_address(shndx
, os
);
6190 // Get the section contents.
6191 section_size_type input_view_size
= 0;
6192 const unsigned char* input_view
=
6193 this->section_contents(shndx
, &input_view_size
, false);
6195 // We need to go through the mapping symbols to determine what to
6196 // scan. There are two reasons. First, we should look at THUMB code and
6197 // THUMB code only. Second, we only want to look at the 4K-page boundary
6198 // to speed up the scanning.
6200 while (p
!= this->mapping_symbols_info_
.end()
6201 && p
->first
.first
== shndx
)
6203 typename
Mapping_symbols_info::const_iterator next
=
6204 this->mapping_symbols_info_
.upper_bound(p
->first
);
6206 // Only scan part of a section with THUMB code.
6207 if (p
->second
== 't')
6209 // Determine the end of this range.
6210 section_size_type span_start
=
6211 convert_to_section_size_type(p
->first
.second
);
6212 section_size_type span_end
;
6213 if (next
!= this->mapping_symbols_info_
.end()
6214 && next
->first
.first
== shndx
)
6215 span_end
= convert_to_section_size_type(next
->first
.second
);
6217 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6219 if (((span_start
+ output_address
) & ~0xfffUL
)
6220 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6222 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6223 span_start
, span_end
,
6233 // Scan relocations for stub generation.
6235 template<bool big_endian
>
6237 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6238 Target_arm
<big_endian
>* arm_target
,
6239 const Symbol_table
* symtab
,
6240 const Layout
* layout
)
6242 unsigned int shnum
= this->shnum();
6243 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6245 // Read the section headers.
6246 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6250 // To speed up processing, we set up hash tables for fast lookup of
6251 // input offsets to output addresses.
6252 this->initialize_input_to_output_maps();
6254 const Relobj::Output_sections
& out_sections(this->output_sections());
6256 Relocate_info
<32, big_endian
> relinfo
;
6257 relinfo
.symtab
= symtab
;
6258 relinfo
.layout
= layout
;
6259 relinfo
.object
= this;
6261 // Do relocation stubs scanning.
6262 const unsigned char* p
= pshdrs
+ shdr_size
;
6263 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6265 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6266 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6269 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6270 Arm_address output_offset
= this->get_output_section_offset(index
);
6271 Arm_address output_address
;
6272 if (output_offset
!= invalid_address
)
6273 output_address
= out_sections
[index
]->address() + output_offset
;
6276 // Currently this only happens for a relaxed section.
6277 const Output_relaxed_input_section
* poris
=
6278 out_sections
[index
]->find_relaxed_input_section(this, index
);
6279 gold_assert(poris
!= NULL
);
6280 output_address
= poris
->address();
6283 // Get the relocations.
6284 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6288 // Get the section contents. This does work for the case in which
6289 // we modify the contents of an input section. We need to pass the
6290 // output view under such circumstances.
6291 section_size_type input_view_size
= 0;
6292 const unsigned char* input_view
=
6293 this->section_contents(index
, &input_view_size
, false);
6295 relinfo
.reloc_shndx
= i
;
6296 relinfo
.data_shndx
= index
;
6297 unsigned int sh_type
= shdr
.get_sh_type();
6298 unsigned int reloc_size
;
6299 if (sh_type
== elfcpp::SHT_REL
)
6300 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6302 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6304 Output_section
* os
= out_sections
[index
];
6305 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6306 shdr
.get_sh_size() / reloc_size
,
6308 output_offset
== invalid_address
,
6309 input_view
, output_address
,
6314 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6315 // after its relocation section, if there is one, is processed for
6316 // relocation stubs. Merging this loop with the one above would have been
6317 // complicated since we would have had to make sure that relocation stub
6318 // scanning is done first.
6319 if (arm_target
->fix_cortex_a8())
6321 const unsigned char* p
= pshdrs
+ shdr_size
;
6322 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6324 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6325 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6328 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6333 // After we've done the relocations, we release the hash tables,
6334 // since we no longer need them.
6335 this->free_input_to_output_maps();
6338 // Count the local symbols. The ARM backend needs to know if a symbol
6339 // is a THUMB function or not. For global symbols, it is easy because
6340 // the Symbol object keeps the ELF symbol type. For local symbol it is
6341 // harder because we cannot access this information. So we override the
6342 // do_count_local_symbol in parent and scan local symbols to mark
6343 // THUMB functions. This is not the most efficient way but I do not want to
6344 // slow down other ports by calling a per symbol target hook inside
6345 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6347 template<bool big_endian
>
6349 Arm_relobj
<big_endian
>::do_count_local_symbols(
6350 Stringpool_template
<char>* pool
,
6351 Stringpool_template
<char>* dynpool
)
6353 // We need to fix-up the values of any local symbols whose type are
6356 // Ask parent to count the local symbols.
6357 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6358 const unsigned int loccount
= this->local_symbol_count();
6362 // Initialize the thumb function bit-vector.
6363 std::vector
<bool> empty_vector(loccount
, false);
6364 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6366 // Read the symbol table section header.
6367 const unsigned int symtab_shndx
= this->symtab_shndx();
6368 elfcpp::Shdr
<32, big_endian
>
6369 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6370 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6372 // Read the local symbols.
6373 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6374 gold_assert(loccount
== symtabshdr
.get_sh_info());
6375 off_t locsize
= loccount
* sym_size
;
6376 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6377 locsize
, true, true);
6379 // For mapping symbol processing, we need to read the symbol names.
6380 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6381 if (strtab_shndx
>= this->shnum())
6383 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6387 elfcpp::Shdr
<32, big_endian
>
6388 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6389 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6391 this->error(_("symbol table name section has wrong type: %u"),
6392 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6395 const char* pnames
=
6396 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6397 strtabshdr
.get_sh_size(),
6400 // Loop over the local symbols and mark any local symbols pointing
6401 // to THUMB functions.
6403 // Skip the first dummy symbol.
6405 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6406 this->local_values();
6407 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6409 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6410 elfcpp::STT st_type
= sym
.get_st_type();
6411 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6412 Arm_address input_value
= lv
.input_value();
6414 // Check to see if this is a mapping symbol.
6415 const char* sym_name
= pnames
+ sym
.get_st_name();
6416 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6419 unsigned int input_shndx
=
6420 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6421 gold_assert(is_ordinary
);
6423 // Strip of LSB in case this is a THUMB symbol.
6424 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6425 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6428 if (st_type
== elfcpp::STT_ARM_TFUNC
6429 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6431 // This is a THUMB function. Mark this and canonicalize the
6432 // symbol value by setting LSB.
6433 this->local_symbol_is_thumb_function_
[i
] = true;
6434 if ((input_value
& 1) == 0)
6435 lv
.set_input_value(input_value
| 1);
6440 // Relocate sections.
6441 template<bool big_endian
>
6443 Arm_relobj
<big_endian
>::do_relocate_sections(
6444 const Symbol_table
* symtab
,
6445 const Layout
* layout
,
6446 const unsigned char* pshdrs
,
6448 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6450 // Call parent to relocate sections.
6451 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6452 pshdrs
, of
, pviews
);
6454 // We do not generate stubs if doing a relocatable link.
6455 if (parameters
->options().relocatable())
6458 // Relocate stub tables.
6459 unsigned int shnum
= this->shnum();
6461 Target_arm
<big_endian
>* arm_target
=
6462 Target_arm
<big_endian
>::default_target();
6464 Relocate_info
<32, big_endian
> relinfo
;
6465 relinfo
.symtab
= symtab
;
6466 relinfo
.layout
= layout
;
6467 relinfo
.object
= this;
6469 for (unsigned int i
= 1; i
< shnum
; ++i
)
6471 Arm_input_section
<big_endian
>* arm_input_section
=
6472 arm_target
->find_arm_input_section(this, i
);
6474 if (arm_input_section
!= NULL
6475 && arm_input_section
->is_stub_table_owner()
6476 && !arm_input_section
->stub_table()->empty())
6478 // We cannot discard a section if it owns a stub table.
6479 Output_section
* os
= this->output_section(i
);
6480 gold_assert(os
!= NULL
);
6482 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6483 relinfo
.reloc_shdr
= NULL
;
6484 relinfo
.data_shndx
= i
;
6485 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6487 gold_assert((*pviews
)[i
].view
!= NULL
);
6489 // We are passed the output section view. Adjust it to cover the
6491 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6492 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6493 && ((stub_table
->address() + stub_table
->data_size())
6494 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6496 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6497 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6498 Arm_address address
= stub_table
->address();
6499 section_size_type view_size
= stub_table
->data_size();
6501 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6505 // Apply Cortex A8 workaround if applicable.
6506 if (this->section_has_cortex_a8_workaround(i
))
6508 unsigned char* view
= (*pviews
)[i
].view
;
6509 Arm_address view_address
= (*pviews
)[i
].address
;
6510 section_size_type view_size
= (*pviews
)[i
].view_size
;
6511 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6513 // Adjust view to cover section.
6514 Output_section
* os
= this->output_section(i
);
6515 gold_assert(os
!= NULL
);
6516 Arm_address section_address
=
6517 this->simple_input_section_output_address(i
, os
);
6518 uint64_t section_size
= this->section_size(i
);
6520 gold_assert(section_address
>= view_address
6521 && ((section_address
+ section_size
)
6522 <= (view_address
+ view_size
)));
6524 unsigned char* section_view
= view
+ (section_address
- view_address
);
6526 // Apply the Cortex-A8 workaround to the output address range
6527 // corresponding to this input section.
6528 stub_table
->apply_cortex_a8_workaround_to_address_range(
6537 // Find the linked text section of an EXIDX section by looking at the first
6538 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6539 // must be linked to its associated code section via the sh_link field of
6540 // its section header. However, some tools are broken and the link is not
6541 // always set. LD just drops such an EXIDX section silently, causing the
6542 // associated code not unwindabled. Here we try a little bit harder to
6543 // discover the linked code section.
6545 // PSHDR points to the section header of a relocation section of an EXIDX
6546 // section. If we can find a linked text section, return true and
6547 // store the text section index in the location PSHNDX. Otherwise
6550 template<bool big_endian
>
6552 Arm_relobj
<big_endian
>::find_linked_text_section(
6553 const unsigned char* pshdr
,
6554 const unsigned char* psyms
,
6555 unsigned int* pshndx
)
6557 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6559 // If there is no relocation, we cannot find the linked text section.
6561 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6562 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6564 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6565 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6567 // Get the relocations.
6568 const unsigned char* prelocs
=
6569 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6571 // Find the REL31 relocation for the first word of the first EXIDX entry.
6572 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6574 Arm_address r_offset
;
6575 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6576 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6578 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6579 r_info
= reloc
.get_r_info();
6580 r_offset
= reloc
.get_r_offset();
6584 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6585 r_info
= reloc
.get_r_info();
6586 r_offset
= reloc
.get_r_offset();
6589 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6590 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6593 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6595 || r_sym
>= this->local_symbol_count()
6599 // This is the relocation for the first word of the first EXIDX entry.
6600 // We expect to see a local section symbol.
6601 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6602 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6603 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6607 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6608 gold_assert(is_ordinary
);
6618 // Make an EXIDX input section object for an EXIDX section whose index is
6619 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6620 // is the section index of the linked text section.
6622 template<bool big_endian
>
6624 Arm_relobj
<big_endian
>::make_exidx_input_section(
6626 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6627 unsigned int text_shndx
,
6628 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6630 // Create an Arm_exidx_input_section object for this EXIDX section.
6631 Arm_exidx_input_section
* exidx_input_section
=
6632 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6633 shdr
.get_sh_addralign(),
6634 text_shdr
.get_sh_size());
6636 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6637 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6639 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6641 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6642 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6643 this->name().c_str());
6644 exidx_input_section
->set_has_errors();
6646 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6648 unsigned other_exidx_shndx
=
6649 this->exidx_section_map_
[text_shndx
]->shndx();
6650 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6652 this->section_name(shndx
).c_str(), shndx
,
6653 this->section_name(other_exidx_shndx
).c_str(),
6654 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6655 text_shndx
, this->name().c_str());
6656 exidx_input_section
->set_has_errors();
6659 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6661 // Check section flags of text section.
6662 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6664 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6666 this->section_name(shndx
).c_str(), shndx
,
6667 this->section_name(text_shndx
).c_str(), text_shndx
,
6668 this->name().c_str());
6669 exidx_input_section
->set_has_errors();
6671 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6672 // I would like to make this an error but currently ld just ignores
6674 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6676 this->section_name(shndx
).c_str(), shndx
,
6677 this->section_name(text_shndx
).c_str(), text_shndx
,
6678 this->name().c_str());
6681 // Read the symbol information.
6683 template<bool big_endian
>
6685 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6687 // Call parent class to read symbol information.
6688 Sized_relobj_file
<32, big_endian
>::do_read_symbols(sd
);
6690 // If this input file is a binary file, it has no processor
6691 // specific flags and attributes section.
6692 Input_file::Format format
= this->input_file()->format();
6693 if (format
!= Input_file::FORMAT_ELF
)
6695 gold_assert(format
== Input_file::FORMAT_BINARY
);
6696 this->merge_flags_and_attributes_
= false;
6700 // Read processor-specific flags in ELF file header.
6701 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6702 elfcpp::Elf_sizes
<32>::ehdr_size
,
6704 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6705 this->processor_specific_flags_
= ehdr
.get_e_flags();
6707 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6709 std::vector
<unsigned int> deferred_exidx_sections
;
6710 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6711 const unsigned char* pshdrs
= sd
->section_headers
->data();
6712 const unsigned char* ps
= pshdrs
+ shdr_size
;
6713 bool must_merge_flags_and_attributes
= false;
6714 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6716 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6718 // Sometimes an object has no contents except the section name string
6719 // table and an empty symbol table with the undefined symbol. We
6720 // don't want to merge processor-specific flags from such an object.
6721 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6723 // Symbol table is not empty.
6724 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6725 elfcpp::Elf_sizes
<32>::sym_size
;
6726 if (shdr
.get_sh_size() > sym_size
)
6727 must_merge_flags_and_attributes
= true;
6729 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6730 // If this is neither an empty symbol table nor a string table,
6732 must_merge_flags_and_attributes
= true;
6734 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6736 gold_assert(this->attributes_section_data_
== NULL
);
6737 section_offset_type section_offset
= shdr
.get_sh_offset();
6738 section_size_type section_size
=
6739 convert_to_section_size_type(shdr
.get_sh_size());
6740 const unsigned char* view
=
6741 this->get_view(section_offset
, section_size
, true, false);
6742 this->attributes_section_data_
=
6743 new Attributes_section_data(view
, section_size
);
6745 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6747 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6748 if (text_shndx
== elfcpp::SHN_UNDEF
)
6749 deferred_exidx_sections
.push_back(i
);
6752 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6753 + text_shndx
* shdr_size
);
6754 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6756 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6757 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6758 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6759 this->section_name(i
).c_str(), this->name().c_str());
6764 if (!must_merge_flags_and_attributes
)
6766 gold_assert(deferred_exidx_sections
.empty());
6767 this->merge_flags_and_attributes_
= false;
6771 // Some tools are broken and they do not set the link of EXIDX sections.
6772 // We look at the first relocation to figure out the linked sections.
6773 if (!deferred_exidx_sections
.empty())
6775 // We need to go over the section headers again to find the mapping
6776 // from sections being relocated to their relocation sections. This is
6777 // a bit inefficient as we could do that in the loop above. However,
6778 // we do not expect any deferred EXIDX sections normally. So we do not
6779 // want to slow down the most common path.
6780 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6781 Reloc_map reloc_map
;
6782 ps
= pshdrs
+ shdr_size
;
6783 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6785 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6786 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6787 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6789 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6790 if (info_shndx
>= this->shnum())
6791 gold_error(_("relocation section %u has invalid info %u"),
6793 Reloc_map::value_type
value(info_shndx
, i
);
6794 std::pair
<Reloc_map::iterator
, bool> result
=
6795 reloc_map
.insert(value
);
6797 gold_error(_("section %u has multiple relocation sections "
6799 info_shndx
, i
, reloc_map
[info_shndx
]);
6803 // Read the symbol table section header.
6804 const unsigned int symtab_shndx
= this->symtab_shndx();
6805 elfcpp::Shdr
<32, big_endian
>
6806 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6807 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6809 // Read the local symbols.
6810 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6811 const unsigned int loccount
= this->local_symbol_count();
6812 gold_assert(loccount
== symtabshdr
.get_sh_info());
6813 off_t locsize
= loccount
* sym_size
;
6814 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6815 locsize
, true, true);
6817 // Process the deferred EXIDX sections.
6818 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6820 unsigned int shndx
= deferred_exidx_sections
[i
];
6821 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6822 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6823 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6824 if (it
!= reloc_map
.end())
6825 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6826 psyms
, &text_shndx
);
6827 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6828 + text_shndx
* shdr_size
);
6829 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6834 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6835 // sections for unwinding. These sections are referenced implicitly by
6836 // text sections linked in the section headers. If we ignore these implicit
6837 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6838 // will be garbage-collected incorrectly. Hence we override the same function
6839 // in the base class to handle these implicit references.
6841 template<bool big_endian
>
6843 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6845 Read_relocs_data
* rd
)
6847 // First, call base class method to process relocations in this object.
6848 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6850 // If --gc-sections is not specified, there is nothing more to do.
6851 // This happens when --icf is used but --gc-sections is not.
6852 if (!parameters
->options().gc_sections())
6855 unsigned int shnum
= this->shnum();
6856 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6857 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6861 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6862 // to these from the linked text sections.
6863 const unsigned char* ps
= pshdrs
+ shdr_size
;
6864 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6866 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6867 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6869 // Found an .ARM.exidx section, add it to the set of reachable
6870 // sections from its linked text section.
6871 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6872 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6877 // Update output local symbol count. Owing to EXIDX entry merging, some local
6878 // symbols will be removed in output. Adjust output local symbol count
6879 // accordingly. We can only changed the static output local symbol count. It
6880 // is too late to change the dynamic symbols.
6882 template<bool big_endian
>
6884 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6886 // Caller should check that this needs updating. We want caller checking
6887 // because output_local_symbol_count_needs_update() is most likely inlined.
6888 gold_assert(this->output_local_symbol_count_needs_update_
);
6890 gold_assert(this->symtab_shndx() != -1U);
6891 if (this->symtab_shndx() == 0)
6893 // This object has no symbols. Weird but legal.
6897 // Read the symbol table section header.
6898 const unsigned int symtab_shndx
= this->symtab_shndx();
6899 elfcpp::Shdr
<32, big_endian
>
6900 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6901 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6903 // Read the local symbols.
6904 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6905 const unsigned int loccount
= this->local_symbol_count();
6906 gold_assert(loccount
== symtabshdr
.get_sh_info());
6907 off_t locsize
= loccount
* sym_size
;
6908 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6909 locsize
, true, true);
6911 // Loop over the local symbols.
6913 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6915 const Output_sections
& out_sections(this->output_sections());
6916 unsigned int shnum
= this->shnum();
6917 unsigned int count
= 0;
6918 // Skip the first, dummy, symbol.
6920 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6922 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6924 Symbol_value
<32>& lv((*this->local_values())[i
]);
6926 // This local symbol was already discarded by do_count_local_symbols.
6927 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6931 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6936 Output_section
* os
= out_sections
[shndx
];
6938 // This local symbol no longer has an output section. Discard it.
6941 lv
.set_no_output_symtab_entry();
6945 // Currently we only discard parts of EXIDX input sections.
6946 // We explicitly check for a merged EXIDX input section to avoid
6947 // calling Output_section_data::output_offset unless necessary.
6948 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6949 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6951 section_offset_type output_offset
=
6952 os
->output_offset(this, shndx
, lv
.input_value());
6953 if (output_offset
== -1)
6955 // This symbol is defined in a part of an EXIDX input section
6956 // that is discarded due to entry merging.
6957 lv
.set_no_output_symtab_entry();
6966 this->set_output_local_symbol_count(count
);
6967 this->output_local_symbol_count_needs_update_
= false;
6970 // Arm_dynobj methods.
6972 // Read the symbol information.
6974 template<bool big_endian
>
6976 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6978 // Call parent class to read symbol information.
6979 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6981 // Read processor-specific flags in ELF file header.
6982 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6983 elfcpp::Elf_sizes
<32>::ehdr_size
,
6985 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6986 this->processor_specific_flags_
= ehdr
.get_e_flags();
6988 // Read the attributes section if there is one.
6989 // We read from the end because gas seems to put it near the end of
6990 // the section headers.
6991 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6992 const unsigned char* ps
=
6993 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6994 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6996 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6997 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6999 section_offset_type section_offset
= shdr
.get_sh_offset();
7000 section_size_type section_size
=
7001 convert_to_section_size_type(shdr
.get_sh_size());
7002 const unsigned char* view
=
7003 this->get_view(section_offset
, section_size
, true, false);
7004 this->attributes_section_data_
=
7005 new Attributes_section_data(view
, section_size
);
7011 // Stub_addend_reader methods.
7013 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7015 template<bool big_endian
>
7016 elfcpp::Elf_types
<32>::Elf_Swxword
7017 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7018 unsigned int r_type
,
7019 const unsigned char* view
,
7020 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7022 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
7026 case elfcpp::R_ARM_CALL
:
7027 case elfcpp::R_ARM_JUMP24
:
7028 case elfcpp::R_ARM_PLT32
:
7030 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7031 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7032 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7033 return utils::sign_extend
<26>(val
<< 2);
7036 case elfcpp::R_ARM_THM_CALL
:
7037 case elfcpp::R_ARM_THM_JUMP24
:
7038 case elfcpp::R_ARM_THM_XPC22
:
7040 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7041 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7042 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7043 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7044 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7047 case elfcpp::R_ARM_THM_JUMP19
:
7049 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7050 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7051 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7052 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7053 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7061 // Arm_output_data_got methods.
7063 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7064 // The first one is initialized to be 1, which is the module index for
7065 // the main executable and the second one 0. A reloc of the type
7066 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7067 // be applied by gold. GSYM is a global symbol.
7069 template<bool big_endian
>
7071 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7072 unsigned int got_type
,
7075 if (gsym
->has_got_offset(got_type
))
7078 // We are doing a static link. Just mark it as belong to module 1,
7080 unsigned int got_offset
= this->add_constant(1);
7081 gsym
->set_got_offset(got_type
, got_offset
);
7082 got_offset
= this->add_constant(0);
7083 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7084 elfcpp::R_ARM_TLS_DTPOFF32
,
7088 // Same as the above but for a local symbol.
7090 template<bool big_endian
>
7092 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7093 unsigned int got_type
,
7094 Sized_relobj_file
<32, big_endian
>* object
,
7097 if (object
->local_has_got_offset(index
, got_type
))
7100 // We are doing a static link. Just mark it as belong to module 1,
7102 unsigned int got_offset
= this->add_constant(1);
7103 object
->set_local_got_offset(index
, got_type
, got_offset
);
7104 got_offset
= this->add_constant(0);
7105 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7106 elfcpp::R_ARM_TLS_DTPOFF32
,
7110 template<bool big_endian
>
7112 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7114 // Call parent to write out GOT.
7115 Output_data_got
<32, big_endian
>::do_write(of
);
7117 // We are done if there is no fix up.
7118 if (this->static_relocs_
.empty())
7121 gold_assert(parameters
->doing_static_link());
7123 const off_t offset
= this->offset();
7124 const section_size_type oview_size
=
7125 convert_to_section_size_type(this->data_size());
7126 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7128 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7129 gold_assert(tls_segment
!= NULL
);
7131 // The thread pointer $tp points to the TCB, which is followed by the
7132 // TLS. So we need to adjust $tp relative addressing by this amount.
7133 Arm_address aligned_tcb_size
=
7134 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7136 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7138 Static_reloc
& reloc(this->static_relocs_
[i
]);
7141 if (!reloc
.symbol_is_global())
7143 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7144 const Symbol_value
<32>* psymval
=
7145 reloc
.relobj()->local_symbol(reloc
.index());
7147 // We are doing static linking. Issue an error and skip this
7148 // relocation if the symbol is undefined or in a discarded_section.
7150 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7151 if ((shndx
== elfcpp::SHN_UNDEF
)
7153 && shndx
!= elfcpp::SHN_UNDEF
7154 && !object
->is_section_included(shndx
)
7155 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7157 gold_error(_("undefined or discarded local symbol %u from "
7158 " object %s in GOT"),
7159 reloc
.index(), reloc
.relobj()->name().c_str());
7163 value
= psymval
->value(object
, 0);
7167 const Symbol
* gsym
= reloc
.symbol();
7168 gold_assert(gsym
!= NULL
);
7169 if (gsym
->is_forwarder())
7170 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7172 // We are doing static linking. Issue an error and skip this
7173 // relocation if the symbol is undefined or in a discarded_section
7174 // unless it is a weakly_undefined symbol.
7175 if ((gsym
->is_defined_in_discarded_section()
7176 || gsym
->is_undefined())
7177 && !gsym
->is_weak_undefined())
7179 gold_error(_("undefined or discarded symbol %s in GOT"),
7184 if (!gsym
->is_weak_undefined())
7186 const Sized_symbol
<32>* sym
=
7187 static_cast<const Sized_symbol
<32>*>(gsym
);
7188 value
= sym
->value();
7194 unsigned got_offset
= reloc
.got_offset();
7195 gold_assert(got_offset
< oview_size
);
7197 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7198 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7200 switch (reloc
.r_type())
7202 case elfcpp::R_ARM_TLS_DTPOFF32
:
7205 case elfcpp::R_ARM_TLS_TPOFF32
:
7206 x
= value
+ aligned_tcb_size
;
7211 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7214 of
->write_output_view(offset
, oview_size
, oview
);
7217 // A class to handle the PLT data.
7219 template<bool big_endian
>
7220 class Output_data_plt_arm
: public Output_section_data
7223 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7226 Output_data_plt_arm(Layout
*, Output_data_space
*);
7228 // Add an entry to the PLT.
7230 add_entry(Symbol
* gsym
);
7232 // Return the .rel.plt section data.
7233 const Reloc_section
*
7235 { return this->rel_
; }
7237 // Return the number of PLT entries.
7240 { return this->count_
; }
7242 // Return the offset of the first non-reserved PLT entry.
7244 first_plt_entry_offset()
7245 { return sizeof(first_plt_entry
); }
7247 // Return the size of a PLT entry.
7249 get_plt_entry_size()
7250 { return sizeof(plt_entry
); }
7254 do_adjust_output_section(Output_section
* os
);
7256 // Write to a map file.
7258 do_print_to_mapfile(Mapfile
* mapfile
) const
7259 { mapfile
->print_output_data(this, _("** PLT")); }
7262 // Template for the first PLT entry.
7263 static const uint32_t first_plt_entry
[5];
7265 // Template for subsequent PLT entries.
7266 static const uint32_t plt_entry
[3];
7268 // Set the final size.
7270 set_final_data_size()
7272 this->set_data_size(sizeof(first_plt_entry
)
7273 + this->count_
* sizeof(plt_entry
));
7276 // Write out the PLT data.
7278 do_write(Output_file
*);
7280 // The reloc section.
7281 Reloc_section
* rel_
;
7282 // The .got.plt section.
7283 Output_data_space
* got_plt_
;
7284 // The number of PLT entries.
7285 unsigned int count_
;
7288 // Create the PLT section. The ordinary .got section is an argument,
7289 // since we need to refer to the start. We also create our own .got
7290 // section just for PLT entries.
7292 template<bool big_endian
>
7293 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7294 Output_data_space
* got_plt
)
7295 : Output_section_data(4), got_plt_(got_plt
), count_(0)
7297 this->rel_
= new Reloc_section(false);
7298 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7299 elfcpp::SHF_ALLOC
, this->rel_
,
7300 ORDER_DYNAMIC_PLT_RELOCS
, false);
7303 template<bool big_endian
>
7305 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7310 // Add an entry to the PLT.
7312 template<bool big_endian
>
7314 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7316 gold_assert(!gsym
->has_plt_offset());
7318 // Note that when setting the PLT offset we skip the initial
7319 // reserved PLT entry.
7320 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
7321 + sizeof(first_plt_entry
));
7325 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7327 // Every PLT entry needs a GOT entry which points back to the PLT
7328 // entry (this will be changed by the dynamic linker, normally
7329 // lazily when the function is called).
7330 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7332 // Every PLT entry needs a reloc.
7333 gsym
->set_needs_dynsym_entry();
7334 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7337 // Note that we don't need to save the symbol. The contents of the
7338 // PLT are independent of which symbols are used. The symbols only
7339 // appear in the relocations.
7343 // FIXME: This is not very flexible. Right now this has only been tested
7344 // on armv5te. If we are to support additional architecture features like
7345 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7347 // The first entry in the PLT.
7348 template<bool big_endian
>
7349 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
7351 0xe52de004, // str lr, [sp, #-4]!
7352 0xe59fe004, // ldr lr, [pc, #4]
7353 0xe08fe00e, // add lr, pc, lr
7354 0xe5bef008, // ldr pc, [lr, #8]!
7355 0x00000000, // &GOT[0] - .
7358 // Subsequent entries in the PLT.
7360 template<bool big_endian
>
7361 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
7363 0xe28fc600, // add ip, pc, #0xNN00000
7364 0xe28cca00, // add ip, ip, #0xNN000
7365 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7368 // Write out the PLT. This uses the hand-coded instructions above,
7369 // and adjusts them as needed. This is all specified by the arm ELF
7370 // Processor Supplement.
7372 template<bool big_endian
>
7374 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7376 const off_t offset
= this->offset();
7377 const section_size_type oview_size
=
7378 convert_to_section_size_type(this->data_size());
7379 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7381 const off_t got_file_offset
= this->got_plt_
->offset();
7382 const section_size_type got_size
=
7383 convert_to_section_size_type(this->got_plt_
->data_size());
7384 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7386 unsigned char* pov
= oview
;
7388 Arm_address plt_address
= this->address();
7389 Arm_address got_address
= this->got_plt_
->address();
7391 // Write first PLT entry. All but the last word are constants.
7392 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7393 / sizeof(plt_entry
[0]));
7394 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7395 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7396 // Last word in first PLT entry is &GOT[0] - .
7397 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7398 got_address
- (plt_address
+ 16));
7399 pov
+= sizeof(first_plt_entry
);
7401 unsigned char* got_pov
= got_view
;
7403 memset(got_pov
, 0, 12);
7406 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
7407 unsigned int plt_offset
= sizeof(first_plt_entry
);
7408 unsigned int plt_rel_offset
= 0;
7409 unsigned int got_offset
= 12;
7410 const unsigned int count
= this->count_
;
7411 for (unsigned int i
= 0;
7414 pov
+= sizeof(plt_entry
),
7416 plt_offset
+= sizeof(plt_entry
),
7417 plt_rel_offset
+= rel_size
,
7420 // Set and adjust the PLT entry itself.
7421 int32_t offset
= ((got_address
+ got_offset
)
7422 - (plt_address
+ plt_offset
+ 8));
7424 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7425 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7426 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7427 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7428 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7429 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7430 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7432 // Set the entry in the GOT.
7433 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7436 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7437 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7439 of
->write_output_view(offset
, oview_size
, oview
);
7440 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7443 // Create a PLT entry for a global symbol.
7445 template<bool big_endian
>
7447 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7450 if (gsym
->has_plt_offset())
7453 if (this->plt_
== NULL
)
7455 // Create the GOT sections first.
7456 this->got_section(symtab
, layout
);
7458 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
7459 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7461 | elfcpp::SHF_EXECINSTR
),
7462 this->plt_
, ORDER_PLT
, false);
7464 this->plt_
->add_entry(gsym
);
7467 // Return the number of entries in the PLT.
7469 template<bool big_endian
>
7471 Target_arm
<big_endian
>::plt_entry_count() const
7473 if (this->plt_
== NULL
)
7475 return this->plt_
->entry_count();
7478 // Return the offset of the first non-reserved PLT entry.
7480 template<bool big_endian
>
7482 Target_arm
<big_endian
>::first_plt_entry_offset() const
7484 return Output_data_plt_arm
<big_endian
>::first_plt_entry_offset();
7487 // Return the size of each PLT entry.
7489 template<bool big_endian
>
7491 Target_arm
<big_endian
>::plt_entry_size() const
7493 return Output_data_plt_arm
<big_endian
>::get_plt_entry_size();
7496 // Get the section to use for TLS_DESC relocations.
7498 template<bool big_endian
>
7499 typename Target_arm
<big_endian
>::Reloc_section
*
7500 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7502 return this->plt_section()->rel_tls_desc(layout
);
7505 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7507 template<bool big_endian
>
7509 Target_arm
<big_endian
>::define_tls_base_symbol(
7510 Symbol_table
* symtab
,
7513 if (this->tls_base_symbol_defined_
)
7516 Output_segment
* tls_segment
= layout
->tls_segment();
7517 if (tls_segment
!= NULL
)
7519 bool is_exec
= parameters
->options().output_is_executable();
7520 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7521 Symbol_table::PREDEFINED
,
7525 elfcpp::STV_HIDDEN
, 0,
7527 ? Symbol::SEGMENT_END
7528 : Symbol::SEGMENT_START
),
7531 this->tls_base_symbol_defined_
= true;
7534 // Create a GOT entry for the TLS module index.
7536 template<bool big_endian
>
7538 Target_arm
<big_endian
>::got_mod_index_entry(
7539 Symbol_table
* symtab
,
7541 Sized_relobj_file
<32, big_endian
>* object
)
7543 if (this->got_mod_index_offset_
== -1U)
7545 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7546 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7547 unsigned int got_offset
;
7548 if (!parameters
->doing_static_link())
7550 got_offset
= got
->add_constant(0);
7551 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7552 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7557 // We are doing a static link. Just mark it as belong to module 1,
7559 got_offset
= got
->add_constant(1);
7562 got
->add_constant(0);
7563 this->got_mod_index_offset_
= got_offset
;
7565 return this->got_mod_index_offset_
;
7568 // Optimize the TLS relocation type based on what we know about the
7569 // symbol. IS_FINAL is true if the final address of this symbol is
7570 // known at link time.
7572 template<bool big_endian
>
7573 tls::Tls_optimization
7574 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7576 // FIXME: Currently we do not do any TLS optimization.
7577 return tls::TLSOPT_NONE
;
7580 // Get the Reference_flags for a particular relocation.
7582 template<bool big_endian
>
7584 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
7588 case elfcpp::R_ARM_NONE
:
7589 case elfcpp::R_ARM_V4BX
:
7590 case elfcpp::R_ARM_GNU_VTENTRY
:
7591 case elfcpp::R_ARM_GNU_VTINHERIT
:
7592 // No symbol reference.
7595 case elfcpp::R_ARM_ABS32
:
7596 case elfcpp::R_ARM_ABS16
:
7597 case elfcpp::R_ARM_ABS12
:
7598 case elfcpp::R_ARM_THM_ABS5
:
7599 case elfcpp::R_ARM_ABS8
:
7600 case elfcpp::R_ARM_BASE_ABS
:
7601 case elfcpp::R_ARM_MOVW_ABS_NC
:
7602 case elfcpp::R_ARM_MOVT_ABS
:
7603 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7604 case elfcpp::R_ARM_THM_MOVT_ABS
:
7605 case elfcpp::R_ARM_ABS32_NOI
:
7606 return Symbol::ABSOLUTE_REF
;
7608 case elfcpp::R_ARM_REL32
:
7609 case elfcpp::R_ARM_LDR_PC_G0
:
7610 case elfcpp::R_ARM_SBREL32
:
7611 case elfcpp::R_ARM_THM_PC8
:
7612 case elfcpp::R_ARM_BASE_PREL
:
7613 case elfcpp::R_ARM_MOVW_PREL_NC
:
7614 case elfcpp::R_ARM_MOVT_PREL
:
7615 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7616 case elfcpp::R_ARM_THM_MOVT_PREL
:
7617 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7618 case elfcpp::R_ARM_THM_PC12
:
7619 case elfcpp::R_ARM_REL32_NOI
:
7620 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7621 case elfcpp::R_ARM_ALU_PC_G0
:
7622 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7623 case elfcpp::R_ARM_ALU_PC_G1
:
7624 case elfcpp::R_ARM_ALU_PC_G2
:
7625 case elfcpp::R_ARM_LDR_PC_G1
:
7626 case elfcpp::R_ARM_LDR_PC_G2
:
7627 case elfcpp::R_ARM_LDRS_PC_G0
:
7628 case elfcpp::R_ARM_LDRS_PC_G1
:
7629 case elfcpp::R_ARM_LDRS_PC_G2
:
7630 case elfcpp::R_ARM_LDC_PC_G0
:
7631 case elfcpp::R_ARM_LDC_PC_G1
:
7632 case elfcpp::R_ARM_LDC_PC_G2
:
7633 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7634 case elfcpp::R_ARM_ALU_SB_G0
:
7635 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7636 case elfcpp::R_ARM_ALU_SB_G1
:
7637 case elfcpp::R_ARM_ALU_SB_G2
:
7638 case elfcpp::R_ARM_LDR_SB_G0
:
7639 case elfcpp::R_ARM_LDR_SB_G1
:
7640 case elfcpp::R_ARM_LDR_SB_G2
:
7641 case elfcpp::R_ARM_LDRS_SB_G0
:
7642 case elfcpp::R_ARM_LDRS_SB_G1
:
7643 case elfcpp::R_ARM_LDRS_SB_G2
:
7644 case elfcpp::R_ARM_LDC_SB_G0
:
7645 case elfcpp::R_ARM_LDC_SB_G1
:
7646 case elfcpp::R_ARM_LDC_SB_G2
:
7647 case elfcpp::R_ARM_MOVW_BREL_NC
:
7648 case elfcpp::R_ARM_MOVT_BREL
:
7649 case elfcpp::R_ARM_MOVW_BREL
:
7650 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7651 case elfcpp::R_ARM_THM_MOVT_BREL
:
7652 case elfcpp::R_ARM_THM_MOVW_BREL
:
7653 case elfcpp::R_ARM_GOTOFF32
:
7654 case elfcpp::R_ARM_GOTOFF12
:
7655 case elfcpp::R_ARM_SBREL31
:
7656 return Symbol::RELATIVE_REF
;
7658 case elfcpp::R_ARM_PLT32
:
7659 case elfcpp::R_ARM_CALL
:
7660 case elfcpp::R_ARM_JUMP24
:
7661 case elfcpp::R_ARM_THM_CALL
:
7662 case elfcpp::R_ARM_THM_JUMP24
:
7663 case elfcpp::R_ARM_THM_JUMP19
:
7664 case elfcpp::R_ARM_THM_JUMP6
:
7665 case elfcpp::R_ARM_THM_JUMP11
:
7666 case elfcpp::R_ARM_THM_JUMP8
:
7667 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7668 // in unwind tables. It may point to functions via PLTs.
7669 // So we treat it like call/jump relocations above.
7670 case elfcpp::R_ARM_PREL31
:
7671 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
7673 case elfcpp::R_ARM_GOT_BREL
:
7674 case elfcpp::R_ARM_GOT_ABS
:
7675 case elfcpp::R_ARM_GOT_PREL
:
7677 return Symbol::ABSOLUTE_REF
;
7679 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7680 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7681 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7682 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7683 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7684 return Symbol::TLS_REF
;
7686 case elfcpp::R_ARM_TARGET1
:
7687 case elfcpp::R_ARM_TARGET2
:
7688 case elfcpp::R_ARM_COPY
:
7689 case elfcpp::R_ARM_GLOB_DAT
:
7690 case elfcpp::R_ARM_JUMP_SLOT
:
7691 case elfcpp::R_ARM_RELATIVE
:
7692 case elfcpp::R_ARM_PC24
:
7693 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7694 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7695 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7697 // Not expected. We will give an error later.
7702 // Report an unsupported relocation against a local symbol.
7704 template<bool big_endian
>
7706 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7707 Sized_relobj_file
<32, big_endian
>* object
,
7708 unsigned int r_type
)
7710 gold_error(_("%s: unsupported reloc %u against local symbol"),
7711 object
->name().c_str(), r_type
);
7714 // We are about to emit a dynamic relocation of type R_TYPE. If the
7715 // dynamic linker does not support it, issue an error. The GNU linker
7716 // only issues a non-PIC error for an allocated read-only section.
7717 // Here we know the section is allocated, but we don't know that it is
7718 // read-only. But we check for all the relocation types which the
7719 // glibc dynamic linker supports, so it seems appropriate to issue an
7720 // error even if the section is not read-only.
7722 template<bool big_endian
>
7724 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7725 unsigned int r_type
)
7729 // These are the relocation types supported by glibc for ARM.
7730 case elfcpp::R_ARM_RELATIVE
:
7731 case elfcpp::R_ARM_COPY
:
7732 case elfcpp::R_ARM_GLOB_DAT
:
7733 case elfcpp::R_ARM_JUMP_SLOT
:
7734 case elfcpp::R_ARM_ABS32
:
7735 case elfcpp::R_ARM_ABS32_NOI
:
7736 case elfcpp::R_ARM_PC24
:
7737 // FIXME: The following 3 types are not supported by Android's dynamic
7739 case elfcpp::R_ARM_TLS_DTPMOD32
:
7740 case elfcpp::R_ARM_TLS_DTPOFF32
:
7741 case elfcpp::R_ARM_TLS_TPOFF32
:
7746 // This prevents us from issuing more than one error per reloc
7747 // section. But we can still wind up issuing more than one
7748 // error per object file.
7749 if (this->issued_non_pic_error_
)
7751 const Arm_reloc_property
* reloc_property
=
7752 arm_reloc_property_table
->get_reloc_property(r_type
);
7753 gold_assert(reloc_property
!= NULL
);
7754 object
->error(_("requires unsupported dynamic reloc %s; "
7755 "recompile with -fPIC"),
7756 reloc_property
->name().c_str());
7757 this->issued_non_pic_error_
= true;
7761 case elfcpp::R_ARM_NONE
:
7766 // Scan a relocation for a local symbol.
7767 // FIXME: This only handles a subset of relocation types used by Android
7768 // on ARM v5te devices.
7770 template<bool big_endian
>
7772 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7775 Sized_relobj_file
<32, big_endian
>* object
,
7776 unsigned int data_shndx
,
7777 Output_section
* output_section
,
7778 const elfcpp::Rel
<32, big_endian
>& reloc
,
7779 unsigned int r_type
,
7780 const elfcpp::Sym
<32, big_endian
>& lsym
)
7782 r_type
= get_real_reloc_type(r_type
);
7785 case elfcpp::R_ARM_NONE
:
7786 case elfcpp::R_ARM_V4BX
:
7787 case elfcpp::R_ARM_GNU_VTENTRY
:
7788 case elfcpp::R_ARM_GNU_VTINHERIT
:
7791 case elfcpp::R_ARM_ABS32
:
7792 case elfcpp::R_ARM_ABS32_NOI
:
7793 // If building a shared library (or a position-independent
7794 // executable), we need to create a dynamic relocation for
7795 // this location. The relocation applied at link time will
7796 // apply the link-time value, so we flag the location with
7797 // an R_ARM_RELATIVE relocation so the dynamic loader can
7798 // relocate it easily.
7799 if (parameters
->options().output_is_position_independent())
7801 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7802 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7803 // If we are to add more other reloc types than R_ARM_ABS32,
7804 // we need to add check_non_pic(object, r_type) here.
7805 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7806 output_section
, data_shndx
,
7807 reloc
.get_r_offset());
7811 case elfcpp::R_ARM_ABS16
:
7812 case elfcpp::R_ARM_ABS12
:
7813 case elfcpp::R_ARM_THM_ABS5
:
7814 case elfcpp::R_ARM_ABS8
:
7815 case elfcpp::R_ARM_BASE_ABS
:
7816 case elfcpp::R_ARM_MOVW_ABS_NC
:
7817 case elfcpp::R_ARM_MOVT_ABS
:
7818 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7819 case elfcpp::R_ARM_THM_MOVT_ABS
:
7820 // If building a shared library (or a position-independent
7821 // executable), we need to create a dynamic relocation for
7822 // this location. Because the addend needs to remain in the
7823 // data section, we need to be careful not to apply this
7824 // relocation statically.
7825 if (parameters
->options().output_is_position_independent())
7827 check_non_pic(object
, r_type
);
7828 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7829 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7830 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7831 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7832 data_shndx
, reloc
.get_r_offset());
7835 gold_assert(lsym
.get_st_value() == 0);
7836 unsigned int shndx
= lsym
.get_st_shndx();
7838 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7841 object
->error(_("section symbol %u has bad shndx %u"),
7844 rel_dyn
->add_local_section(object
, shndx
,
7845 r_type
, output_section
,
7846 data_shndx
, reloc
.get_r_offset());
7851 case elfcpp::R_ARM_REL32
:
7852 case elfcpp::R_ARM_LDR_PC_G0
:
7853 case elfcpp::R_ARM_SBREL32
:
7854 case elfcpp::R_ARM_THM_CALL
:
7855 case elfcpp::R_ARM_THM_PC8
:
7856 case elfcpp::R_ARM_BASE_PREL
:
7857 case elfcpp::R_ARM_PLT32
:
7858 case elfcpp::R_ARM_CALL
:
7859 case elfcpp::R_ARM_JUMP24
:
7860 case elfcpp::R_ARM_THM_JUMP24
:
7861 case elfcpp::R_ARM_SBREL31
:
7862 case elfcpp::R_ARM_PREL31
:
7863 case elfcpp::R_ARM_MOVW_PREL_NC
:
7864 case elfcpp::R_ARM_MOVT_PREL
:
7865 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7866 case elfcpp::R_ARM_THM_MOVT_PREL
:
7867 case elfcpp::R_ARM_THM_JUMP19
:
7868 case elfcpp::R_ARM_THM_JUMP6
:
7869 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7870 case elfcpp::R_ARM_THM_PC12
:
7871 case elfcpp::R_ARM_REL32_NOI
:
7872 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7873 case elfcpp::R_ARM_ALU_PC_G0
:
7874 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7875 case elfcpp::R_ARM_ALU_PC_G1
:
7876 case elfcpp::R_ARM_ALU_PC_G2
:
7877 case elfcpp::R_ARM_LDR_PC_G1
:
7878 case elfcpp::R_ARM_LDR_PC_G2
:
7879 case elfcpp::R_ARM_LDRS_PC_G0
:
7880 case elfcpp::R_ARM_LDRS_PC_G1
:
7881 case elfcpp::R_ARM_LDRS_PC_G2
:
7882 case elfcpp::R_ARM_LDC_PC_G0
:
7883 case elfcpp::R_ARM_LDC_PC_G1
:
7884 case elfcpp::R_ARM_LDC_PC_G2
:
7885 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7886 case elfcpp::R_ARM_ALU_SB_G0
:
7887 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7888 case elfcpp::R_ARM_ALU_SB_G1
:
7889 case elfcpp::R_ARM_ALU_SB_G2
:
7890 case elfcpp::R_ARM_LDR_SB_G0
:
7891 case elfcpp::R_ARM_LDR_SB_G1
:
7892 case elfcpp::R_ARM_LDR_SB_G2
:
7893 case elfcpp::R_ARM_LDRS_SB_G0
:
7894 case elfcpp::R_ARM_LDRS_SB_G1
:
7895 case elfcpp::R_ARM_LDRS_SB_G2
:
7896 case elfcpp::R_ARM_LDC_SB_G0
:
7897 case elfcpp::R_ARM_LDC_SB_G1
:
7898 case elfcpp::R_ARM_LDC_SB_G2
:
7899 case elfcpp::R_ARM_MOVW_BREL_NC
:
7900 case elfcpp::R_ARM_MOVT_BREL
:
7901 case elfcpp::R_ARM_MOVW_BREL
:
7902 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7903 case elfcpp::R_ARM_THM_MOVT_BREL
:
7904 case elfcpp::R_ARM_THM_MOVW_BREL
:
7905 case elfcpp::R_ARM_THM_JUMP11
:
7906 case elfcpp::R_ARM_THM_JUMP8
:
7907 // We don't need to do anything for a relative addressing relocation
7908 // against a local symbol if it does not reference the GOT.
7911 case elfcpp::R_ARM_GOTOFF32
:
7912 case elfcpp::R_ARM_GOTOFF12
:
7913 // We need a GOT section:
7914 target
->got_section(symtab
, layout
);
7917 case elfcpp::R_ARM_GOT_BREL
:
7918 case elfcpp::R_ARM_GOT_PREL
:
7920 // The symbol requires a GOT entry.
7921 Arm_output_data_got
<big_endian
>* got
=
7922 target
->got_section(symtab
, layout
);
7923 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7924 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
7926 // If we are generating a shared object, we need to add a
7927 // dynamic RELATIVE relocation for this symbol's GOT entry.
7928 if (parameters
->options().output_is_position_independent())
7930 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7931 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7932 rel_dyn
->add_local_relative(
7933 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
7934 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7940 case elfcpp::R_ARM_TARGET1
:
7941 case elfcpp::R_ARM_TARGET2
:
7942 // This should have been mapped to another type already.
7944 case elfcpp::R_ARM_COPY
:
7945 case elfcpp::R_ARM_GLOB_DAT
:
7946 case elfcpp::R_ARM_JUMP_SLOT
:
7947 case elfcpp::R_ARM_RELATIVE
:
7948 // These are relocations which should only be seen by the
7949 // dynamic linker, and should never be seen here.
7950 gold_error(_("%s: unexpected reloc %u in object file"),
7951 object
->name().c_str(), r_type
);
7955 // These are initial TLS relocs, which are expected when
7957 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7958 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7959 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7960 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7961 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7963 bool output_is_shared
= parameters
->options().shared();
7964 const tls::Tls_optimization optimized_type
7965 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
7969 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7970 if (optimized_type
== tls::TLSOPT_NONE
)
7972 // Create a pair of GOT entries for the module index and
7973 // dtv-relative offset.
7974 Arm_output_data_got
<big_endian
>* got
7975 = target
->got_section(symtab
, layout
);
7976 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7977 unsigned int shndx
= lsym
.get_st_shndx();
7979 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
7982 object
->error(_("local symbol %u has bad shndx %u"),
7987 if (!parameters
->doing_static_link())
7988 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
7990 target
->rel_dyn_section(layout
),
7991 elfcpp::R_ARM_TLS_DTPMOD32
, 0);
7993 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
7997 // FIXME: TLS optimization not supported yet.
8001 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8002 if (optimized_type
== tls::TLSOPT_NONE
)
8004 // Create a GOT entry for the module index.
8005 target
->got_mod_index_entry(symtab
, layout
, object
);
8008 // FIXME: TLS optimization not supported yet.
8012 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8015 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8016 layout
->set_has_static_tls();
8017 if (optimized_type
== tls::TLSOPT_NONE
)
8019 // Create a GOT entry for the tp-relative offset.
8020 Arm_output_data_got
<big_endian
>* got
8021 = target
->got_section(symtab
, layout
);
8022 unsigned int r_sym
=
8023 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8024 if (!parameters
->doing_static_link())
8025 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8026 target
->rel_dyn_section(layout
),
8027 elfcpp::R_ARM_TLS_TPOFF32
);
8028 else if (!object
->local_has_got_offset(r_sym
,
8029 GOT_TYPE_TLS_OFFSET
))
8031 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8032 unsigned int got_offset
=
8033 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8034 got
->add_static_reloc(got_offset
,
8035 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8040 // FIXME: TLS optimization not supported yet.
8044 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8045 layout
->set_has_static_tls();
8046 if (output_is_shared
)
8048 // We need to create a dynamic relocation.
8049 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8050 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8051 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8052 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8053 output_section
, data_shndx
,
8054 reloc
.get_r_offset());
8064 case elfcpp::R_ARM_PC24
:
8065 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8066 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8067 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8069 unsupported_reloc_local(object
, r_type
);
8074 // Report an unsupported relocation against a global symbol.
8076 template<bool big_endian
>
8078 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8079 Sized_relobj_file
<32, big_endian
>* object
,
8080 unsigned int r_type
,
8083 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8084 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8087 template<bool big_endian
>
8089 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8090 unsigned int r_type
)
8094 case elfcpp::R_ARM_PC24
:
8095 case elfcpp::R_ARM_THM_CALL
:
8096 case elfcpp::R_ARM_PLT32
:
8097 case elfcpp::R_ARM_CALL
:
8098 case elfcpp::R_ARM_JUMP24
:
8099 case elfcpp::R_ARM_THM_JUMP24
:
8100 case elfcpp::R_ARM_SBREL31
:
8101 case elfcpp::R_ARM_PREL31
:
8102 case elfcpp::R_ARM_THM_JUMP19
:
8103 case elfcpp::R_ARM_THM_JUMP6
:
8104 case elfcpp::R_ARM_THM_JUMP11
:
8105 case elfcpp::R_ARM_THM_JUMP8
:
8106 // All the relocations above are branches except SBREL31 and PREL31.
8110 // Be conservative and assume this is a function pointer.
8115 template<bool big_endian
>
8117 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8120 Target_arm
<big_endian
>* target
,
8121 Sized_relobj_file
<32, big_endian
>*,
8124 const elfcpp::Rel
<32, big_endian
>&,
8125 unsigned int r_type
,
8126 const elfcpp::Sym
<32, big_endian
>&)
8128 r_type
= target
->get_real_reloc_type(r_type
);
8129 return possible_function_pointer_reloc(r_type
);
8132 template<bool big_endian
>
8134 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8137 Target_arm
<big_endian
>* target
,
8138 Sized_relobj_file
<32, big_endian
>*,
8141 const elfcpp::Rel
<32, big_endian
>&,
8142 unsigned int r_type
,
8145 // GOT is not a function.
8146 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8149 r_type
= target
->get_real_reloc_type(r_type
);
8150 return possible_function_pointer_reloc(r_type
);
8153 // Scan a relocation for a global symbol.
8155 template<bool big_endian
>
8157 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8160 Sized_relobj_file
<32, big_endian
>* object
,
8161 unsigned int data_shndx
,
8162 Output_section
* output_section
,
8163 const elfcpp::Rel
<32, big_endian
>& reloc
,
8164 unsigned int r_type
,
8167 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8168 // section. We check here to avoid creating a dynamic reloc against
8169 // _GLOBAL_OFFSET_TABLE_.
8170 if (!target
->has_got_section()
8171 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8172 target
->got_section(symtab
, layout
);
8174 r_type
= get_real_reloc_type(r_type
);
8177 case elfcpp::R_ARM_NONE
:
8178 case elfcpp::R_ARM_V4BX
:
8179 case elfcpp::R_ARM_GNU_VTENTRY
:
8180 case elfcpp::R_ARM_GNU_VTINHERIT
:
8183 case elfcpp::R_ARM_ABS32
:
8184 case elfcpp::R_ARM_ABS16
:
8185 case elfcpp::R_ARM_ABS12
:
8186 case elfcpp::R_ARM_THM_ABS5
:
8187 case elfcpp::R_ARM_ABS8
:
8188 case elfcpp::R_ARM_BASE_ABS
:
8189 case elfcpp::R_ARM_MOVW_ABS_NC
:
8190 case elfcpp::R_ARM_MOVT_ABS
:
8191 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8192 case elfcpp::R_ARM_THM_MOVT_ABS
:
8193 case elfcpp::R_ARM_ABS32_NOI
:
8194 // Absolute addressing relocations.
8196 // Make a PLT entry if necessary.
8197 if (this->symbol_needs_plt_entry(gsym
))
8199 target
->make_plt_entry(symtab
, layout
, gsym
);
8200 // Since this is not a PC-relative relocation, we may be
8201 // taking the address of a function. In that case we need to
8202 // set the entry in the dynamic symbol table to the address of
8204 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8205 gsym
->set_needs_dynsym_value();
8207 // Make a dynamic relocation if necessary.
8208 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8210 if (gsym
->may_need_copy_reloc())
8212 target
->copy_reloc(symtab
, layout
, object
,
8213 data_shndx
, output_section
, gsym
, reloc
);
8215 else if ((r_type
== elfcpp::R_ARM_ABS32
8216 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8217 && gsym
->can_use_relative_reloc(false))
8219 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8220 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8221 output_section
, object
,
8222 data_shndx
, reloc
.get_r_offset());
8226 check_non_pic(object
, r_type
);
8227 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8228 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8229 data_shndx
, reloc
.get_r_offset());
8235 case elfcpp::R_ARM_GOTOFF32
:
8236 case elfcpp::R_ARM_GOTOFF12
:
8237 // We need a GOT section.
8238 target
->got_section(symtab
, layout
);
8241 case elfcpp::R_ARM_REL32
:
8242 case elfcpp::R_ARM_LDR_PC_G0
:
8243 case elfcpp::R_ARM_SBREL32
:
8244 case elfcpp::R_ARM_THM_PC8
:
8245 case elfcpp::R_ARM_BASE_PREL
:
8246 case elfcpp::R_ARM_MOVW_PREL_NC
:
8247 case elfcpp::R_ARM_MOVT_PREL
:
8248 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8249 case elfcpp::R_ARM_THM_MOVT_PREL
:
8250 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8251 case elfcpp::R_ARM_THM_PC12
:
8252 case elfcpp::R_ARM_REL32_NOI
:
8253 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8254 case elfcpp::R_ARM_ALU_PC_G0
:
8255 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8256 case elfcpp::R_ARM_ALU_PC_G1
:
8257 case elfcpp::R_ARM_ALU_PC_G2
:
8258 case elfcpp::R_ARM_LDR_PC_G1
:
8259 case elfcpp::R_ARM_LDR_PC_G2
:
8260 case elfcpp::R_ARM_LDRS_PC_G0
:
8261 case elfcpp::R_ARM_LDRS_PC_G1
:
8262 case elfcpp::R_ARM_LDRS_PC_G2
:
8263 case elfcpp::R_ARM_LDC_PC_G0
:
8264 case elfcpp::R_ARM_LDC_PC_G1
:
8265 case elfcpp::R_ARM_LDC_PC_G2
:
8266 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8267 case elfcpp::R_ARM_ALU_SB_G0
:
8268 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8269 case elfcpp::R_ARM_ALU_SB_G1
:
8270 case elfcpp::R_ARM_ALU_SB_G2
:
8271 case elfcpp::R_ARM_LDR_SB_G0
:
8272 case elfcpp::R_ARM_LDR_SB_G1
:
8273 case elfcpp::R_ARM_LDR_SB_G2
:
8274 case elfcpp::R_ARM_LDRS_SB_G0
:
8275 case elfcpp::R_ARM_LDRS_SB_G1
:
8276 case elfcpp::R_ARM_LDRS_SB_G2
:
8277 case elfcpp::R_ARM_LDC_SB_G0
:
8278 case elfcpp::R_ARM_LDC_SB_G1
:
8279 case elfcpp::R_ARM_LDC_SB_G2
:
8280 case elfcpp::R_ARM_MOVW_BREL_NC
:
8281 case elfcpp::R_ARM_MOVT_BREL
:
8282 case elfcpp::R_ARM_MOVW_BREL
:
8283 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8284 case elfcpp::R_ARM_THM_MOVT_BREL
:
8285 case elfcpp::R_ARM_THM_MOVW_BREL
:
8286 // Relative addressing relocations.
8288 // Make a dynamic relocation if necessary.
8289 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8291 if (target
->may_need_copy_reloc(gsym
))
8293 target
->copy_reloc(symtab
, layout
, object
,
8294 data_shndx
, output_section
, gsym
, reloc
);
8298 check_non_pic(object
, r_type
);
8299 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8300 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8301 data_shndx
, reloc
.get_r_offset());
8307 case elfcpp::R_ARM_THM_CALL
:
8308 case elfcpp::R_ARM_PLT32
:
8309 case elfcpp::R_ARM_CALL
:
8310 case elfcpp::R_ARM_JUMP24
:
8311 case elfcpp::R_ARM_THM_JUMP24
:
8312 case elfcpp::R_ARM_SBREL31
:
8313 case elfcpp::R_ARM_PREL31
:
8314 case elfcpp::R_ARM_THM_JUMP19
:
8315 case elfcpp::R_ARM_THM_JUMP6
:
8316 case elfcpp::R_ARM_THM_JUMP11
:
8317 case elfcpp::R_ARM_THM_JUMP8
:
8318 // All the relocation above are branches except for the PREL31 ones.
8319 // A PREL31 relocation can point to a personality function in a shared
8320 // library. In that case we want to use a PLT because we want to
8321 // call the personality routine and the dynamic linkers we care about
8322 // do not support dynamic PREL31 relocations. An REL31 relocation may
8323 // point to a function whose unwinding behaviour is being described but
8324 // we will not mistakenly generate a PLT for that because we should use
8325 // a local section symbol.
8327 // If the symbol is fully resolved, this is just a relative
8328 // local reloc. Otherwise we need a PLT entry.
8329 if (gsym
->final_value_is_known())
8331 // If building a shared library, we can also skip the PLT entry
8332 // if the symbol is defined in the output file and is protected
8334 if (gsym
->is_defined()
8335 && !gsym
->is_from_dynobj()
8336 && !gsym
->is_preemptible())
8338 target
->make_plt_entry(symtab
, layout
, gsym
);
8341 case elfcpp::R_ARM_GOT_BREL
:
8342 case elfcpp::R_ARM_GOT_ABS
:
8343 case elfcpp::R_ARM_GOT_PREL
:
8345 // The symbol requires a GOT entry.
8346 Arm_output_data_got
<big_endian
>* got
=
8347 target
->got_section(symtab
, layout
);
8348 if (gsym
->final_value_is_known())
8349 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
8352 // If this symbol is not fully resolved, we need to add a
8353 // GOT entry with a dynamic relocation.
8354 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8355 if (gsym
->is_from_dynobj()
8356 || gsym
->is_undefined()
8357 || gsym
->is_preemptible())
8358 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
8359 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
8362 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
8363 rel_dyn
->add_global_relative(
8364 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
8365 gsym
->got_offset(GOT_TYPE_STANDARD
));
8371 case elfcpp::R_ARM_TARGET1
:
8372 case elfcpp::R_ARM_TARGET2
:
8373 // These should have been mapped to other types already.
8375 case elfcpp::R_ARM_COPY
:
8376 case elfcpp::R_ARM_GLOB_DAT
:
8377 case elfcpp::R_ARM_JUMP_SLOT
:
8378 case elfcpp::R_ARM_RELATIVE
:
8379 // These are relocations which should only be seen by the
8380 // dynamic linker, and should never be seen here.
8381 gold_error(_("%s: unexpected reloc %u in object file"),
8382 object
->name().c_str(), r_type
);
8385 // These are initial tls relocs, which are expected when
8387 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8388 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8389 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8390 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8391 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8393 const bool is_final
= gsym
->final_value_is_known();
8394 const tls::Tls_optimization optimized_type
8395 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8398 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8399 if (optimized_type
== tls::TLSOPT_NONE
)
8401 // Create a pair of GOT entries for the module index and
8402 // dtv-relative offset.
8403 Arm_output_data_got
<big_endian
>* got
8404 = target
->got_section(symtab
, layout
);
8405 if (!parameters
->doing_static_link())
8406 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
8407 target
->rel_dyn_section(layout
),
8408 elfcpp::R_ARM_TLS_DTPMOD32
,
8409 elfcpp::R_ARM_TLS_DTPOFF32
);
8411 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
8414 // FIXME: TLS optimization not supported yet.
8418 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8419 if (optimized_type
== tls::TLSOPT_NONE
)
8421 // Create a GOT entry for the module index.
8422 target
->got_mod_index_entry(symtab
, layout
, object
);
8425 // FIXME: TLS optimization not supported yet.
8429 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8432 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8433 layout
->set_has_static_tls();
8434 if (optimized_type
== tls::TLSOPT_NONE
)
8436 // Create a GOT entry for the tp-relative offset.
8437 Arm_output_data_got
<big_endian
>* got
8438 = target
->got_section(symtab
, layout
);
8439 if (!parameters
->doing_static_link())
8440 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
8441 target
->rel_dyn_section(layout
),
8442 elfcpp::R_ARM_TLS_TPOFF32
);
8443 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
8445 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
8446 unsigned int got_offset
=
8447 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
8448 got
->add_static_reloc(got_offset
,
8449 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
8453 // FIXME: TLS optimization not supported yet.
8457 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8458 layout
->set_has_static_tls();
8459 if (parameters
->options().shared())
8461 // We need to create a dynamic relocation.
8462 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8463 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8464 output_section
, object
,
8465 data_shndx
, reloc
.get_r_offset());
8475 case elfcpp::R_ARM_PC24
:
8476 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8477 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8478 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8480 unsupported_reloc_global(object
, r_type
, gsym
);
8485 // Process relocations for gc.
8487 template<bool big_endian
>
8489 Target_arm
<big_endian
>::gc_process_relocs(
8490 Symbol_table
* symtab
,
8492 Sized_relobj_file
<32, big_endian
>* object
,
8493 unsigned int data_shndx
,
8495 const unsigned char* prelocs
,
8497 Output_section
* output_section
,
8498 bool needs_special_offset_handling
,
8499 size_t local_symbol_count
,
8500 const unsigned char* plocal_symbols
)
8502 typedef Target_arm
<big_endian
> Arm
;
8503 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8505 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
8506 typename
Target_arm::Relocatable_size_for_reloc
>(
8515 needs_special_offset_handling
,
8520 // Scan relocations for a section.
8522 template<bool big_endian
>
8524 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8526 Sized_relobj_file
<32, big_endian
>* object
,
8527 unsigned int data_shndx
,
8528 unsigned int sh_type
,
8529 const unsigned char* prelocs
,
8531 Output_section
* output_section
,
8532 bool needs_special_offset_handling
,
8533 size_t local_symbol_count
,
8534 const unsigned char* plocal_symbols
)
8536 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8537 if (sh_type
== elfcpp::SHT_RELA
)
8539 gold_error(_("%s: unsupported RELA reloc section"),
8540 object
->name().c_str());
8544 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8553 needs_special_offset_handling
,
8558 // Finalize the sections.
8560 template<bool big_endian
>
8562 Target_arm
<big_endian
>::do_finalize_sections(
8564 const Input_objects
* input_objects
,
8565 Symbol_table
* symtab
)
8567 bool merged_any_attributes
= false;
8568 // Merge processor-specific flags.
8569 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8570 p
!= input_objects
->relobj_end();
8573 Arm_relobj
<big_endian
>* arm_relobj
=
8574 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8575 if (arm_relobj
->merge_flags_and_attributes())
8577 this->merge_processor_specific_flags(
8579 arm_relobj
->processor_specific_flags());
8580 this->merge_object_attributes(arm_relobj
->name().c_str(),
8581 arm_relobj
->attributes_section_data());
8582 merged_any_attributes
= true;
8586 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8587 p
!= input_objects
->dynobj_end();
8590 Arm_dynobj
<big_endian
>* arm_dynobj
=
8591 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8592 this->merge_processor_specific_flags(
8594 arm_dynobj
->processor_specific_flags());
8595 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8596 arm_dynobj
->attributes_section_data());
8597 merged_any_attributes
= true;
8600 // Create an empty uninitialized attribute section if we still don't have it
8601 // at this moment. This happens if there is no attributes sections in all
8603 if (this->attributes_section_data_
== NULL
)
8604 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8607 const Object_attribute
* cpu_arch_attr
=
8608 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8609 if (cpu_arch_attr
->int_value() > elfcpp::TAG_CPU_ARCH_V4
)
8610 this->set_may_use_blx(true);
8612 // Check if we need to use Cortex-A8 workaround.
8613 if (parameters
->options().user_set_fix_cortex_a8())
8614 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8617 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8618 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8620 const Object_attribute
* cpu_arch_profile_attr
=
8621 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8622 this->fix_cortex_a8_
=
8623 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8624 && (cpu_arch_profile_attr
->int_value() == 'A'
8625 || cpu_arch_profile_attr
->int_value() == 0));
8628 // Check if we can use V4BX interworking.
8629 // The V4BX interworking stub contains BX instruction,
8630 // which is not specified for some profiles.
8631 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8632 && !this->may_use_blx())
8633 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8634 "the target profile does not support BX instruction"));
8636 // Fill in some more dynamic tags.
8637 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8639 : this->plt_
->rel_plt());
8640 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8641 this->rel_dyn_
, true, false);
8643 // Emit any relocs we saved in an attempt to avoid generating COPY
8645 if (this->copy_relocs_
.any_saved_relocs())
8646 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8648 // Handle the .ARM.exidx section.
8649 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8651 if (!parameters
->options().relocatable())
8653 if (exidx_section
!= NULL
8654 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
8656 // Create __exidx_start and __exidx_end symbols.
8657 symtab
->define_in_output_data("__exidx_start", NULL
,
8658 Symbol_table::PREDEFINED
,
8659 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8660 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
,
8662 symtab
->define_in_output_data("__exidx_end", NULL
,
8663 Symbol_table::PREDEFINED
,
8664 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8665 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
,
8668 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8669 // the .ARM.exidx section.
8670 if (!layout
->script_options()->saw_phdrs_clause())
8672 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
8675 Output_segment
* exidx_segment
=
8676 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8677 exidx_segment
->add_output_section_to_nonload(exidx_section
,
8683 symtab
->define_as_constant("__exidx_start", NULL
,
8684 Symbol_table::PREDEFINED
,
8685 0, 0, elfcpp::STT_OBJECT
,
8686 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8688 symtab
->define_as_constant("__exidx_end", NULL
,
8689 Symbol_table::PREDEFINED
,
8690 0, 0, elfcpp::STT_OBJECT
,
8691 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8696 // Create an .ARM.attributes section if we have merged any attributes
8698 if (merged_any_attributes
)
8700 Output_attributes_section_data
* attributes_section
=
8701 new Output_attributes_section_data(*this->attributes_section_data_
);
8702 layout
->add_output_section_data(".ARM.attributes",
8703 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8704 attributes_section
, ORDER_INVALID
,
8708 // Fix up links in section EXIDX headers.
8709 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
8710 p
!= layout
->section_list().end();
8712 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
8714 Arm_output_section
<big_endian
>* os
=
8715 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
8716 os
->set_exidx_section_link();
8720 // Return whether a direct absolute static relocation needs to be applied.
8721 // In cases where Scan::local() or Scan::global() has created
8722 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8723 // of the relocation is carried in the data, and we must not
8724 // apply the static relocation.
8726 template<bool big_endian
>
8728 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8729 const Sized_symbol
<32>* gsym
,
8730 unsigned int r_type
,
8732 Output_section
* output_section
)
8734 // If the output section is not allocated, then we didn't call
8735 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8737 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8740 int ref_flags
= Scan::get_reference_flags(r_type
);
8742 // For local symbols, we will have created a non-RELATIVE dynamic
8743 // relocation only if (a) the output is position independent,
8744 // (b) the relocation is absolute (not pc- or segment-relative), and
8745 // (c) the relocation is not 32 bits wide.
8747 return !(parameters
->options().output_is_position_independent()
8748 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8751 // For global symbols, we use the same helper routines used in the
8752 // scan pass. If we did not create a dynamic relocation, or if we
8753 // created a RELATIVE dynamic relocation, we should apply the static
8755 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8756 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8757 && gsym
->can_use_relative_reloc(ref_flags
8758 & Symbol::FUNCTION_CALL
);
8759 return !has_dyn
|| is_rel
;
8762 // Perform a relocation.
8764 template<bool big_endian
>
8766 Target_arm
<big_endian
>::Relocate::relocate(
8767 const Relocate_info
<32, big_endian
>* relinfo
,
8769 Output_section
* output_section
,
8771 const elfcpp::Rel
<32, big_endian
>& rel
,
8772 unsigned int r_type
,
8773 const Sized_symbol
<32>* gsym
,
8774 const Symbol_value
<32>* psymval
,
8775 unsigned char* view
,
8776 Arm_address address
,
8777 section_size_type view_size
)
8779 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8781 r_type
= get_real_reloc_type(r_type
);
8782 const Arm_reloc_property
* reloc_property
=
8783 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8784 if (reloc_property
== NULL
)
8786 std::string reloc_name
=
8787 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8788 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8789 _("cannot relocate %s in object file"),
8790 reloc_name
.c_str());
8794 const Arm_relobj
<big_endian
>* object
=
8795 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8797 // If the final branch target of a relocation is THUMB instruction, this
8798 // is 1. Otherwise it is 0.
8799 Arm_address thumb_bit
= 0;
8800 Symbol_value
<32> symval
;
8801 bool is_weakly_undefined_without_plt
= false;
8802 bool have_got_offset
= false;
8803 unsigned int got_offset
= 0;
8805 // If the relocation uses the GOT entry of a symbol instead of the symbol
8806 // itself, we don't care about whether the symbol is defined or what kind
8808 if (reloc_property
->uses_got_entry())
8810 // Get the GOT offset.
8811 // The GOT pointer points to the end of the GOT section.
8812 // We need to subtract the size of the GOT section to get
8813 // the actual offset to use in the relocation.
8814 // TODO: We should move GOT offset computing code in TLS relocations
8818 case elfcpp::R_ARM_GOT_BREL
:
8819 case elfcpp::R_ARM_GOT_PREL
:
8822 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8823 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8824 - target
->got_size());
8828 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8829 gold_assert(object
->local_has_got_offset(r_sym
,
8830 GOT_TYPE_STANDARD
));
8831 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8832 - target
->got_size());
8834 have_got_offset
= true;
8841 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8845 // This is a global symbol. Determine if we use PLT and if the
8846 // final target is THUMB.
8847 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
8849 // This uses a PLT, change the symbol value.
8850 symval
.set_output_value(target
->plt_section()->address()
8851 + gsym
->plt_offset());
8854 else if (gsym
->is_weak_undefined())
8856 // This is a weakly undefined symbol and we do not use PLT
8857 // for this relocation. A branch targeting this symbol will
8858 // be converted into an NOP.
8859 is_weakly_undefined_without_plt
= true;
8861 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
8863 // This relocation uses the symbol value but the symbol is
8864 // undefined. Exit early and have the caller reporting an
8870 // Set thumb bit if symbol:
8871 // -Has type STT_ARM_TFUNC or
8872 // -Has type STT_FUNC, is defined and with LSB in value set.
8874 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8875 || (gsym
->type() == elfcpp::STT_FUNC
8876 && !gsym
->is_undefined()
8877 && ((psymval
->value(object
, 0) & 1) != 0)))
8884 // This is a local symbol. Determine if the final target is THUMB.
8885 // We saved this information when all the local symbols were read.
8886 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8887 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8888 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8893 // This is a fake relocation synthesized for a stub. It does not have
8894 // a real symbol. We just look at the LSB of the symbol value to
8895 // determine if the target is THUMB or not.
8896 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8899 // Strip LSB if this points to a THUMB target.
8901 && reloc_property
->uses_thumb_bit()
8902 && ((psymval
->value(object
, 0) & 1) != 0))
8904 Arm_address stripped_value
=
8905 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8906 symval
.set_output_value(stripped_value
);
8910 // To look up relocation stubs, we need to pass the symbol table index of
8912 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8914 // Get the addressing origin of the output segment defining the
8915 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8916 Arm_address sym_origin
= 0;
8917 if (reloc_property
->uses_symbol_base())
8919 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8920 // R_ARM_BASE_ABS with the NULL symbol will give the
8921 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8922 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8923 sym_origin
= target
->got_plt_section()->address();
8924 else if (gsym
== NULL
)
8926 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8927 sym_origin
= gsym
->output_segment()->vaddr();
8928 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
8929 sym_origin
= gsym
->output_data()->address();
8931 // TODO: Assumes the segment base to be zero for the global symbols
8932 // till the proper support for the segment-base-relative addressing
8933 // will be implemented. This is consistent with GNU ld.
8936 // For relative addressing relocation, find out the relative address base.
8937 Arm_address relative_address_base
= 0;
8938 switch(reloc_property
->relative_address_base())
8940 case Arm_reloc_property::RAB_NONE
:
8941 // Relocations with relative address bases RAB_TLS and RAB_tp are
8942 // handled by relocate_tls. So we do not need to do anything here.
8943 case Arm_reloc_property::RAB_TLS
:
8944 case Arm_reloc_property::RAB_tp
:
8946 case Arm_reloc_property::RAB_B_S
:
8947 relative_address_base
= sym_origin
;
8949 case Arm_reloc_property::RAB_GOT_ORG
:
8950 relative_address_base
= target
->got_plt_section()->address();
8952 case Arm_reloc_property::RAB_P
:
8953 relative_address_base
= address
;
8955 case Arm_reloc_property::RAB_Pa
:
8956 relative_address_base
= address
& 0xfffffffcU
;
8962 typename
Arm_relocate_functions::Status reloc_status
=
8963 Arm_relocate_functions::STATUS_OKAY
;
8964 bool check_overflow
= reloc_property
->checks_overflow();
8967 case elfcpp::R_ARM_NONE
:
8970 case elfcpp::R_ARM_ABS8
:
8971 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8972 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
8975 case elfcpp::R_ARM_ABS12
:
8976 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8977 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
8980 case elfcpp::R_ARM_ABS16
:
8981 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8982 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
8985 case elfcpp::R_ARM_ABS32
:
8986 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8987 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8991 case elfcpp::R_ARM_ABS32_NOI
:
8992 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8993 // No thumb bit for this relocation: (S + A)
8994 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8998 case elfcpp::R_ARM_MOVW_ABS_NC
:
8999 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9000 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9005 case elfcpp::R_ARM_MOVT_ABS
:
9006 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9007 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9010 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9011 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9012 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9013 0, thumb_bit
, false);
9016 case elfcpp::R_ARM_THM_MOVT_ABS
:
9017 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9018 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9022 case elfcpp::R_ARM_MOVW_PREL_NC
:
9023 case elfcpp::R_ARM_MOVW_BREL_NC
:
9024 case elfcpp::R_ARM_MOVW_BREL
:
9026 Arm_relocate_functions::movw(view
, object
, psymval
,
9027 relative_address_base
, thumb_bit
,
9031 case elfcpp::R_ARM_MOVT_PREL
:
9032 case elfcpp::R_ARM_MOVT_BREL
:
9034 Arm_relocate_functions::movt(view
, object
, psymval
,
9035 relative_address_base
);
9038 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9039 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9040 case elfcpp::R_ARM_THM_MOVW_BREL
:
9042 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9043 relative_address_base
,
9044 thumb_bit
, check_overflow
);
9047 case elfcpp::R_ARM_THM_MOVT_PREL
:
9048 case elfcpp::R_ARM_THM_MOVT_BREL
:
9050 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9051 relative_address_base
);
9054 case elfcpp::R_ARM_REL32
:
9055 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9056 address
, thumb_bit
);
9059 case elfcpp::R_ARM_THM_ABS5
:
9060 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9061 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9064 // Thumb long branches.
9065 case elfcpp::R_ARM_THM_CALL
:
9066 case elfcpp::R_ARM_THM_XPC22
:
9067 case elfcpp::R_ARM_THM_JUMP24
:
9069 Arm_relocate_functions::thumb_branch_common(
9070 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9071 thumb_bit
, is_weakly_undefined_without_plt
);
9074 case elfcpp::R_ARM_GOTOFF32
:
9076 Arm_address got_origin
;
9077 got_origin
= target
->got_plt_section()->address();
9078 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9079 got_origin
, thumb_bit
);
9083 case elfcpp::R_ARM_BASE_PREL
:
9084 gold_assert(gsym
!= NULL
);
9086 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9089 case elfcpp::R_ARM_BASE_ABS
:
9090 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9091 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9094 case elfcpp::R_ARM_GOT_BREL
:
9095 gold_assert(have_got_offset
);
9096 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9099 case elfcpp::R_ARM_GOT_PREL
:
9100 gold_assert(have_got_offset
);
9101 // Get the address origin for GOT PLT, which is allocated right
9102 // after the GOT section, to calculate an absolute address of
9103 // the symbol GOT entry (got_origin + got_offset).
9104 Arm_address got_origin
;
9105 got_origin
= target
->got_plt_section()->address();
9106 reloc_status
= Arm_relocate_functions::got_prel(view
,
9107 got_origin
+ got_offset
,
9111 case elfcpp::R_ARM_PLT32
:
9112 case elfcpp::R_ARM_CALL
:
9113 case elfcpp::R_ARM_JUMP24
:
9114 case elfcpp::R_ARM_XPC25
:
9115 gold_assert(gsym
== NULL
9116 || gsym
->has_plt_offset()
9117 || gsym
->final_value_is_known()
9118 || (gsym
->is_defined()
9119 && !gsym
->is_from_dynobj()
9120 && !gsym
->is_preemptible()));
9122 Arm_relocate_functions::arm_branch_common(
9123 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9124 thumb_bit
, is_weakly_undefined_without_plt
);
9127 case elfcpp::R_ARM_THM_JUMP19
:
9129 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9133 case elfcpp::R_ARM_THM_JUMP6
:
9135 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9138 case elfcpp::R_ARM_THM_JUMP8
:
9140 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9143 case elfcpp::R_ARM_THM_JUMP11
:
9145 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9148 case elfcpp::R_ARM_PREL31
:
9149 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9150 address
, thumb_bit
);
9153 case elfcpp::R_ARM_V4BX
:
9154 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9156 const bool is_v4bx_interworking
=
9157 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9159 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9160 is_v4bx_interworking
);
9164 case elfcpp::R_ARM_THM_PC8
:
9166 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9169 case elfcpp::R_ARM_THM_PC12
:
9171 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9174 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9176 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9180 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9181 case elfcpp::R_ARM_ALU_PC_G0
:
9182 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9183 case elfcpp::R_ARM_ALU_PC_G1
:
9184 case elfcpp::R_ARM_ALU_PC_G2
:
9185 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9186 case elfcpp::R_ARM_ALU_SB_G0
:
9187 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9188 case elfcpp::R_ARM_ALU_SB_G1
:
9189 case elfcpp::R_ARM_ALU_SB_G2
:
9191 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9192 reloc_property
->group_index(),
9193 relative_address_base
,
9194 thumb_bit
, check_overflow
);
9197 case elfcpp::R_ARM_LDR_PC_G0
:
9198 case elfcpp::R_ARM_LDR_PC_G1
:
9199 case elfcpp::R_ARM_LDR_PC_G2
:
9200 case elfcpp::R_ARM_LDR_SB_G0
:
9201 case elfcpp::R_ARM_LDR_SB_G1
:
9202 case elfcpp::R_ARM_LDR_SB_G2
:
9204 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9205 reloc_property
->group_index(),
9206 relative_address_base
);
9209 case elfcpp::R_ARM_LDRS_PC_G0
:
9210 case elfcpp::R_ARM_LDRS_PC_G1
:
9211 case elfcpp::R_ARM_LDRS_PC_G2
:
9212 case elfcpp::R_ARM_LDRS_SB_G0
:
9213 case elfcpp::R_ARM_LDRS_SB_G1
:
9214 case elfcpp::R_ARM_LDRS_SB_G2
:
9216 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9217 reloc_property
->group_index(),
9218 relative_address_base
);
9221 case elfcpp::R_ARM_LDC_PC_G0
:
9222 case elfcpp::R_ARM_LDC_PC_G1
:
9223 case elfcpp::R_ARM_LDC_PC_G2
:
9224 case elfcpp::R_ARM_LDC_SB_G0
:
9225 case elfcpp::R_ARM_LDC_SB_G1
:
9226 case elfcpp::R_ARM_LDC_SB_G2
:
9228 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9229 reloc_property
->group_index(),
9230 relative_address_base
);
9233 // These are initial tls relocs, which are expected when
9235 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9236 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9237 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9238 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9239 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9241 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9242 view
, address
, view_size
);
9245 // The known and unknown unsupported and/or deprecated relocations.
9246 case elfcpp::R_ARM_PC24
:
9247 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9248 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9249 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9251 // Just silently leave the method. We should get an appropriate error
9252 // message in the scan methods.
9256 // Report any errors.
9257 switch (reloc_status
)
9259 case Arm_relocate_functions::STATUS_OKAY
:
9261 case Arm_relocate_functions::STATUS_OVERFLOW
:
9262 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9263 _("relocation overflow in %s"),
9264 reloc_property
->name().c_str());
9266 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9267 gold_error_at_location(
9271 _("unexpected opcode while processing relocation %s"),
9272 reloc_property
->name().c_str());
9281 // Perform a TLS relocation.
9283 template<bool big_endian
>
9284 inline typename Arm_relocate_functions
<big_endian
>::Status
9285 Target_arm
<big_endian
>::Relocate::relocate_tls(
9286 const Relocate_info
<32, big_endian
>* relinfo
,
9287 Target_arm
<big_endian
>* target
,
9289 const elfcpp::Rel
<32, big_endian
>& rel
,
9290 unsigned int r_type
,
9291 const Sized_symbol
<32>* gsym
,
9292 const Symbol_value
<32>* psymval
,
9293 unsigned char* view
,
9294 elfcpp::Elf_types
<32>::Elf_Addr address
,
9295 section_size_type
/*view_size*/ )
9297 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9298 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9299 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9301 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9303 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9305 const bool is_final
= (gsym
== NULL
9306 ? !parameters
->options().shared()
9307 : gsym
->final_value_is_known());
9308 const tls::Tls_optimization optimized_type
9309 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9312 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9314 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9315 unsigned int got_offset
;
9318 gold_assert(gsym
->has_got_offset(got_type
));
9319 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9323 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9324 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9325 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9326 - target
->got_size());
9328 if (optimized_type
== tls::TLSOPT_NONE
)
9330 Arm_address got_entry
=
9331 target
->got_plt_section()->address() + got_offset
;
9333 // Relocate the field with the PC relative offset of the pair of
9335 RelocFuncs::pcrel32(view
, got_entry
, address
);
9336 return ArmRelocFuncs::STATUS_OKAY
;
9341 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9342 if (optimized_type
== tls::TLSOPT_NONE
)
9344 // Relocate the field with the offset of the GOT entry for
9345 // the module index.
9346 unsigned int got_offset
;
9347 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9348 - target
->got_size());
9349 Arm_address got_entry
=
9350 target
->got_plt_section()->address() + got_offset
;
9352 // Relocate the field with the PC relative offset of the pair of
9354 RelocFuncs::pcrel32(view
, got_entry
, address
);
9355 return ArmRelocFuncs::STATUS_OKAY
;
9359 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9360 RelocFuncs::rel32(view
, value
);
9361 return ArmRelocFuncs::STATUS_OKAY
;
9363 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9364 if (optimized_type
== tls::TLSOPT_NONE
)
9366 // Relocate the field with the offset of the GOT entry for
9367 // the tp-relative offset of the symbol.
9368 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
9369 unsigned int got_offset
;
9372 gold_assert(gsym
->has_got_offset(got_type
));
9373 got_offset
= gsym
->got_offset(got_type
);
9377 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9378 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9379 got_offset
= object
->local_got_offset(r_sym
, got_type
);
9382 // All GOT offsets are relative to the end of the GOT.
9383 got_offset
-= target
->got_size();
9385 Arm_address got_entry
=
9386 target
->got_plt_section()->address() + got_offset
;
9388 // Relocate the field with the PC relative offset of the GOT entry.
9389 RelocFuncs::pcrel32(view
, got_entry
, address
);
9390 return ArmRelocFuncs::STATUS_OKAY
;
9394 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9395 // If we're creating a shared library, a dynamic relocation will
9396 // have been created for this location, so do not apply it now.
9397 if (!parameters
->options().shared())
9399 gold_assert(tls_segment
!= NULL
);
9401 // $tp points to the TCB, which is followed by the TLS, so we
9402 // need to add TCB size to the offset.
9403 Arm_address aligned_tcb_size
=
9404 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
9405 RelocFuncs::rel32(view
, value
+ aligned_tcb_size
);
9408 return ArmRelocFuncs::STATUS_OKAY
;
9414 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9415 _("unsupported reloc %u"),
9417 return ArmRelocFuncs::STATUS_BAD_RELOC
;
9420 // Relocate section data.
9422 template<bool big_endian
>
9424 Target_arm
<big_endian
>::relocate_section(
9425 const Relocate_info
<32, big_endian
>* relinfo
,
9426 unsigned int sh_type
,
9427 const unsigned char* prelocs
,
9429 Output_section
* output_section
,
9430 bool needs_special_offset_handling
,
9431 unsigned char* view
,
9432 Arm_address address
,
9433 section_size_type view_size
,
9434 const Reloc_symbol_changes
* reloc_symbol_changes
)
9436 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
9437 gold_assert(sh_type
== elfcpp::SHT_REL
);
9439 // See if we are relocating a relaxed input section. If so, the view
9440 // covers the whole output section and we need to adjust accordingly.
9441 if (needs_special_offset_handling
)
9443 const Output_relaxed_input_section
* poris
=
9444 output_section
->find_relaxed_input_section(relinfo
->object
,
9445 relinfo
->data_shndx
);
9448 Arm_address section_address
= poris
->address();
9449 section_size_type section_size
= poris
->data_size();
9451 gold_assert((section_address
>= address
)
9452 && ((section_address
+ section_size
)
9453 <= (address
+ view_size
)));
9455 off_t offset
= section_address
- address
;
9458 view_size
= section_size
;
9462 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
9469 needs_special_offset_handling
,
9473 reloc_symbol_changes
);
9476 // Return the size of a relocation while scanning during a relocatable
9479 template<bool big_endian
>
9481 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
9482 unsigned int r_type
,
9485 r_type
= get_real_reloc_type(r_type
);
9486 const Arm_reloc_property
* arp
=
9487 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9492 std::string reloc_name
=
9493 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9494 gold_error(_("%s: unexpected %s in object file"),
9495 object
->name().c_str(), reloc_name
.c_str());
9500 // Scan the relocs during a relocatable link.
9502 template<bool big_endian
>
9504 Target_arm
<big_endian
>::scan_relocatable_relocs(
9505 Symbol_table
* symtab
,
9507 Sized_relobj_file
<32, big_endian
>* object
,
9508 unsigned int data_shndx
,
9509 unsigned int sh_type
,
9510 const unsigned char* prelocs
,
9512 Output_section
* output_section
,
9513 bool needs_special_offset_handling
,
9514 size_t local_symbol_count
,
9515 const unsigned char* plocal_symbols
,
9516 Relocatable_relocs
* rr
)
9518 gold_assert(sh_type
== elfcpp::SHT_REL
);
9520 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9521 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9523 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9524 Scan_relocatable_relocs
>(
9532 needs_special_offset_handling
,
9538 // Relocate a section during a relocatable link.
9540 template<bool big_endian
>
9542 Target_arm
<big_endian
>::relocate_for_relocatable(
9543 const Relocate_info
<32, big_endian
>* relinfo
,
9544 unsigned int sh_type
,
9545 const unsigned char* prelocs
,
9547 Output_section
* output_section
,
9548 off_t offset_in_output_section
,
9549 const Relocatable_relocs
* rr
,
9550 unsigned char* view
,
9551 Arm_address view_address
,
9552 section_size_type view_size
,
9553 unsigned char* reloc_view
,
9554 section_size_type reloc_view_size
)
9556 gold_assert(sh_type
== elfcpp::SHT_REL
);
9558 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
9563 offset_in_output_section
,
9572 // Perform target-specific processing in a relocatable link. This is
9573 // only used if we use the relocation strategy RELOC_SPECIAL.
9575 template<bool big_endian
>
9577 Target_arm
<big_endian
>::relocate_special_relocatable(
9578 const Relocate_info
<32, big_endian
>* relinfo
,
9579 unsigned int sh_type
,
9580 const unsigned char* preloc_in
,
9582 Output_section
* output_section
,
9583 off_t offset_in_output_section
,
9584 unsigned char* view
,
9585 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9587 unsigned char* preloc_out
)
9589 // We can only handle REL type relocation sections.
9590 gold_assert(sh_type
== elfcpp::SHT_REL
);
9592 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9593 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9595 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9597 const Arm_relobj
<big_endian
>* object
=
9598 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9599 const unsigned int local_count
= object
->local_symbol_count();
9601 Reltype
reloc(preloc_in
);
9602 Reltype_write
reloc_write(preloc_out
);
9604 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9605 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9606 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9608 const Arm_reloc_property
* arp
=
9609 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9610 gold_assert(arp
!= NULL
);
9612 // Get the new symbol index.
9613 // We only use RELOC_SPECIAL strategy in local relocations.
9614 gold_assert(r_sym
< local_count
);
9616 // We are adjusting a section symbol. We need to find
9617 // the symbol table index of the section symbol for
9618 // the output section corresponding to input section
9619 // in which this symbol is defined.
9621 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9622 gold_assert(is_ordinary
);
9623 Output_section
* os
= object
->output_section(shndx
);
9624 gold_assert(os
!= NULL
);
9625 gold_assert(os
->needs_symtab_index());
9626 unsigned int new_symndx
= os
->symtab_index();
9628 // Get the new offset--the location in the output section where
9629 // this relocation should be applied.
9631 Arm_address offset
= reloc
.get_r_offset();
9632 Arm_address new_offset
;
9633 if (offset_in_output_section
!= invalid_address
)
9634 new_offset
= offset
+ offset_in_output_section
;
9637 section_offset_type sot_offset
=
9638 convert_types
<section_offset_type
, Arm_address
>(offset
);
9639 section_offset_type new_sot_offset
=
9640 output_section
->output_offset(object
, relinfo
->data_shndx
,
9642 gold_assert(new_sot_offset
!= -1);
9643 new_offset
= new_sot_offset
;
9646 // In an object file, r_offset is an offset within the section.
9647 // In an executable or dynamic object, generated by
9648 // --emit-relocs, r_offset is an absolute address.
9649 if (!parameters
->options().relocatable())
9651 new_offset
+= view_address
;
9652 if (offset_in_output_section
!= invalid_address
)
9653 new_offset
-= offset_in_output_section
;
9656 reloc_write
.put_r_offset(new_offset
);
9657 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9659 // Handle the reloc addend.
9660 // The relocation uses a section symbol in the input file.
9661 // We are adjusting it to use a section symbol in the output
9662 // file. The input section symbol refers to some address in
9663 // the input section. We need the relocation in the output
9664 // file to refer to that same address. This adjustment to
9665 // the addend is the same calculation we use for a simple
9666 // absolute relocation for the input section symbol.
9668 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9670 // Handle THUMB bit.
9671 Symbol_value
<32> symval
;
9672 Arm_address thumb_bit
=
9673 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9675 && arp
->uses_thumb_bit()
9676 && ((psymval
->value(object
, 0) & 1) != 0))
9678 Arm_address stripped_value
=
9679 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9680 symval
.set_output_value(stripped_value
);
9684 unsigned char* paddend
= view
+ offset
;
9685 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9686 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9689 case elfcpp::R_ARM_ABS8
:
9690 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9694 case elfcpp::R_ARM_ABS12
:
9695 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9699 case elfcpp::R_ARM_ABS16
:
9700 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9704 case elfcpp::R_ARM_THM_ABS5
:
9705 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9710 case elfcpp::R_ARM_MOVW_ABS_NC
:
9711 case elfcpp::R_ARM_MOVW_PREL_NC
:
9712 case elfcpp::R_ARM_MOVW_BREL_NC
:
9713 case elfcpp::R_ARM_MOVW_BREL
:
9714 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9715 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9718 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9719 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9720 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9721 case elfcpp::R_ARM_THM_MOVW_BREL
:
9722 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9723 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9726 case elfcpp::R_ARM_THM_CALL
:
9727 case elfcpp::R_ARM_THM_XPC22
:
9728 case elfcpp::R_ARM_THM_JUMP24
:
9730 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9731 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9735 case elfcpp::R_ARM_PLT32
:
9736 case elfcpp::R_ARM_CALL
:
9737 case elfcpp::R_ARM_JUMP24
:
9738 case elfcpp::R_ARM_XPC25
:
9740 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9741 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9745 case elfcpp::R_ARM_THM_JUMP19
:
9747 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9748 psymval
, 0, thumb_bit
);
9751 case elfcpp::R_ARM_THM_JUMP6
:
9753 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9757 case elfcpp::R_ARM_THM_JUMP8
:
9759 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9763 case elfcpp::R_ARM_THM_JUMP11
:
9765 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9769 case elfcpp::R_ARM_PREL31
:
9771 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9775 case elfcpp::R_ARM_THM_PC8
:
9777 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9781 case elfcpp::R_ARM_THM_PC12
:
9783 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9787 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9789 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9793 // These relocation truncate relocation results so we cannot handle them
9794 // in a relocatable link.
9795 case elfcpp::R_ARM_MOVT_ABS
:
9796 case elfcpp::R_ARM_THM_MOVT_ABS
:
9797 case elfcpp::R_ARM_MOVT_PREL
:
9798 case elfcpp::R_ARM_MOVT_BREL
:
9799 case elfcpp::R_ARM_THM_MOVT_PREL
:
9800 case elfcpp::R_ARM_THM_MOVT_BREL
:
9801 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9802 case elfcpp::R_ARM_ALU_PC_G0
:
9803 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9804 case elfcpp::R_ARM_ALU_PC_G1
:
9805 case elfcpp::R_ARM_ALU_PC_G2
:
9806 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9807 case elfcpp::R_ARM_ALU_SB_G0
:
9808 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9809 case elfcpp::R_ARM_ALU_SB_G1
:
9810 case elfcpp::R_ARM_ALU_SB_G2
:
9811 case elfcpp::R_ARM_LDR_PC_G0
:
9812 case elfcpp::R_ARM_LDR_PC_G1
:
9813 case elfcpp::R_ARM_LDR_PC_G2
:
9814 case elfcpp::R_ARM_LDR_SB_G0
:
9815 case elfcpp::R_ARM_LDR_SB_G1
:
9816 case elfcpp::R_ARM_LDR_SB_G2
:
9817 case elfcpp::R_ARM_LDRS_PC_G0
:
9818 case elfcpp::R_ARM_LDRS_PC_G1
:
9819 case elfcpp::R_ARM_LDRS_PC_G2
:
9820 case elfcpp::R_ARM_LDRS_SB_G0
:
9821 case elfcpp::R_ARM_LDRS_SB_G1
:
9822 case elfcpp::R_ARM_LDRS_SB_G2
:
9823 case elfcpp::R_ARM_LDC_PC_G0
:
9824 case elfcpp::R_ARM_LDC_PC_G1
:
9825 case elfcpp::R_ARM_LDC_PC_G2
:
9826 case elfcpp::R_ARM_LDC_SB_G0
:
9827 case elfcpp::R_ARM_LDC_SB_G1
:
9828 case elfcpp::R_ARM_LDC_SB_G2
:
9829 gold_error(_("cannot handle %s in a relocatable link"),
9830 arp
->name().c_str());
9837 // Report any errors.
9838 switch (reloc_status
)
9840 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9842 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9843 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9844 _("relocation overflow in %s"),
9845 arp
->name().c_str());
9847 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9848 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9849 _("unexpected opcode while processing relocation %s"),
9850 arp
->name().c_str());
9857 // Return the value to use for a dynamic symbol which requires special
9858 // treatment. This is how we support equality comparisons of function
9859 // pointers across shared library boundaries, as described in the
9860 // processor specific ABI supplement.
9862 template<bool big_endian
>
9864 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9866 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9867 return this->plt_section()->address() + gsym
->plt_offset();
9870 // Map platform-specific relocs to real relocs
9872 template<bool big_endian
>
9874 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
9878 case elfcpp::R_ARM_TARGET1
:
9879 // This is either R_ARM_ABS32 or R_ARM_REL32;
9880 return elfcpp::R_ARM_ABS32
;
9882 case elfcpp::R_ARM_TARGET2
:
9883 // This can be any reloc type but usually is R_ARM_GOT_PREL
9884 return elfcpp::R_ARM_GOT_PREL
;
9891 // Whether if two EABI versions V1 and V2 are compatible.
9893 template<bool big_endian
>
9895 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9896 elfcpp::Elf_Word v1
,
9897 elfcpp::Elf_Word v2
)
9899 // v4 and v5 are the same spec before and after it was released,
9900 // so allow mixing them.
9901 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
9902 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9903 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9909 // Combine FLAGS from an input object called NAME and the processor-specific
9910 // flags in the ELF header of the output. Much of this is adapted from the
9911 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9912 // in bfd/elf32-arm.c.
9914 template<bool big_endian
>
9916 Target_arm
<big_endian
>::merge_processor_specific_flags(
9917 const std::string
& name
,
9918 elfcpp::Elf_Word flags
)
9920 if (this->are_processor_specific_flags_set())
9922 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9924 // Nothing to merge if flags equal to those in output.
9925 if (flags
== out_flags
)
9928 // Complain about various flag mismatches.
9929 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
9930 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
9931 if (!this->are_eabi_versions_compatible(version1
, version2
)
9932 && parameters
->options().warn_mismatch())
9933 gold_error(_("Source object %s has EABI version %d but output has "
9934 "EABI version %d."),
9936 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
9937 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
9941 // If the input is the default architecture and had the default
9942 // flags then do not bother setting the flags for the output
9943 // architecture, instead allow future merges to do this. If no
9944 // future merges ever set these flags then they will retain their
9945 // uninitialised values, which surprise surprise, correspond
9946 // to the default values.
9950 // This is the first time, just copy the flags.
9951 // We only copy the EABI version for now.
9952 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
9956 // Adjust ELF file header.
9957 template<bool big_endian
>
9959 Target_arm
<big_endian
>::do_adjust_elf_header(
9960 unsigned char* view
,
9963 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
9965 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
9966 unsigned char e_ident
[elfcpp::EI_NIDENT
];
9967 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
9969 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
9970 == elfcpp::EF_ARM_EABI_UNKNOWN
)
9971 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
9973 e_ident
[elfcpp::EI_OSABI
] = 0;
9974 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
9976 // FIXME: Do EF_ARM_BE8 adjustment.
9978 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
9979 oehdr
.put_e_ident(e_ident
);
9982 // do_make_elf_object to override the same function in the base class.
9983 // We need to use a target-specific sub-class of
9984 // Sized_relobj_file<32, big_endian> to store ARM specific information.
9985 // Hence we need to have our own ELF object creation.
9987 template<bool big_endian
>
9989 Target_arm
<big_endian
>::do_make_elf_object(
9990 const std::string
& name
,
9991 Input_file
* input_file
,
9992 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
9994 int et
= ehdr
.get_e_type();
9995 if (et
== elfcpp::ET_REL
)
9997 Arm_relobj
<big_endian
>* obj
=
9998 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10002 else if (et
== elfcpp::ET_DYN
)
10004 Sized_dynobj
<32, big_endian
>* obj
=
10005 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10011 gold_error(_("%s: unsupported ELF file type %d"),
10017 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10018 // Returns -1 if no architecture could be read.
10019 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10021 template<bool big_endian
>
10023 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10024 const Attributes_section_data
* pasd
)
10026 const Object_attribute
* known_attributes
=
10027 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10029 // Note: the tag and its argument below are uleb128 values, though
10030 // currently-defined values fit in one byte for each.
10031 const std::string
& sv
=
10032 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10034 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10035 && (sv
.data()[1] & 128) != 128)
10036 return sv
.data()[1];
10038 // This tag is "safely ignorable", so don't complain if it looks funny.
10042 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10043 // The tag is removed if ARCH is -1.
10044 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10046 template<bool big_endian
>
10048 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10049 Attributes_section_data
* pasd
,
10052 Object_attribute
* known_attributes
=
10053 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10057 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10061 // Note: the tag and its argument below are uleb128 values, though
10062 // currently-defined values fit in one byte for each.
10064 sv
[0] = elfcpp::Tag_CPU_arch
;
10065 gold_assert(arch
!= 0);
10069 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10072 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10074 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10076 template<bool big_endian
>
10078 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10081 int* secondary_compat_out
,
10083 int secondary_compat
)
10085 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10086 static const int v6t2
[] =
10088 T(V6T2
), // PRE_V4.
10098 static const int v6k
[] =
10111 static const int v7
[] =
10125 static const int v6_m
[] =
10140 static const int v6s_m
[] =
10156 static const int v7e_m
[] =
10163 T(V7E_M
), // V5TEJ.
10170 T(V7E_M
), // V6S_M.
10173 static const int v4t_plus_v6_m
[] =
10180 T(V5TEJ
), // V5TEJ.
10187 T(V6S_M
), // V6S_M.
10188 T(V7E_M
), // V7E_M.
10189 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10191 static const int* comb
[] =
10199 // Pseudo-architecture.
10203 // Check we've not got a higher architecture than we know about.
10205 if (oldtag
>= elfcpp::MAX_TAG_CPU_ARCH
|| newtag
>= elfcpp::MAX_TAG_CPU_ARCH
)
10207 gold_error(_("%s: unknown CPU architecture"), name
);
10211 // Override old tag if we have a Tag_also_compatible_with on the output.
10213 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10214 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10215 oldtag
= T(V4T_PLUS_V6_M
);
10217 // And override the new tag if we have a Tag_also_compatible_with on the
10220 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10221 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10222 newtag
= T(V4T_PLUS_V6_M
);
10224 // Architectures before V6KZ add features monotonically.
10225 int tagh
= std::max(oldtag
, newtag
);
10226 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10229 int tagl
= std::min(oldtag
, newtag
);
10230 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10232 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10233 // as the canonical version.
10234 if (result
== T(V4T_PLUS_V6_M
))
10237 *secondary_compat_out
= T(V6_M
);
10240 *secondary_compat_out
= -1;
10244 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10245 name
, oldtag
, newtag
);
10253 // Helper to print AEABI enum tag value.
10255 template<bool big_endian
>
10257 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10259 static const char* aeabi_enum_names
[] =
10260 { "", "variable-size", "32-bit", "" };
10261 const size_t aeabi_enum_names_size
=
10262 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10264 if (value
< aeabi_enum_names_size
)
10265 return std::string(aeabi_enum_names
[value
]);
10269 sprintf(buffer
, "<unknown value %u>", value
);
10270 return std::string(buffer
);
10274 // Return the string value to store in TAG_CPU_name.
10276 template<bool big_endian
>
10278 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10280 static const char* name_table
[] = {
10281 // These aren't real CPU names, but we can't guess
10282 // that from the architecture version alone.
10298 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10300 if (value
< name_table_size
)
10301 return std::string(name_table
[value
]);
10305 sprintf(buffer
, "<unknown CPU value %u>", value
);
10306 return std::string(buffer
);
10310 // Merge object attributes from input file called NAME with those of the
10311 // output. The input object attributes are in the object pointed by PASD.
10313 template<bool big_endian
>
10315 Target_arm
<big_endian
>::merge_object_attributes(
10317 const Attributes_section_data
* pasd
)
10319 // Return if there is no attributes section data.
10323 // If output has no object attributes, just copy.
10324 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
10325 if (this->attributes_section_data_
== NULL
)
10327 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
10328 Object_attribute
* out_attr
=
10329 this->attributes_section_data_
->known_attributes(vendor
);
10331 // We do not output objects with Tag_MPextension_use_legacy - we move
10332 // the attribute's value to Tag_MPextension_use. */
10333 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
10335 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
10336 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
10337 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10339 gold_error(_("%s has both the current and legacy "
10340 "Tag_MPextension_use attributes"),
10344 out_attr
[elfcpp::Tag_MPextension_use
] =
10345 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
10346 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
10347 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
10353 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
10354 Object_attribute
* out_attr
=
10355 this->attributes_section_data_
->known_attributes(vendor
);
10357 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10358 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
10359 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
10361 // Ignore mismatches if the object doesn't use floating point. */
10362 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
10363 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
10364 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
10365 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
10366 && parameters
->options().warn_mismatch())
10367 gold_error(_("%s uses VFP register arguments, output does not"),
10371 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
10373 // Merge this attribute with existing attributes.
10376 case elfcpp::Tag_CPU_raw_name
:
10377 case elfcpp::Tag_CPU_name
:
10378 // These are merged after Tag_CPU_arch.
10381 case elfcpp::Tag_ABI_optimization_goals
:
10382 case elfcpp::Tag_ABI_FP_optimization_goals
:
10383 // Use the first value seen.
10386 case elfcpp::Tag_CPU_arch
:
10388 unsigned int saved_out_attr
= out_attr
->int_value();
10389 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10390 int secondary_compat
=
10391 this->get_secondary_compatible_arch(pasd
);
10392 int secondary_compat_out
=
10393 this->get_secondary_compatible_arch(
10394 this->attributes_section_data_
);
10395 out_attr
[i
].set_int_value(
10396 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
10397 &secondary_compat_out
,
10398 in_attr
[i
].int_value(),
10399 secondary_compat
));
10400 this->set_secondary_compatible_arch(this->attributes_section_data_
,
10401 secondary_compat_out
);
10403 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10404 if (out_attr
[i
].int_value() == saved_out_attr
)
10405 ; // Leave the names alone.
10406 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
10408 // The output architecture has been changed to match the
10409 // input architecture. Use the input names.
10410 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
10411 in_attr
[elfcpp::Tag_CPU_name
].string_value());
10412 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
10413 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
10417 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
10418 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
10421 // If we still don't have a value for Tag_CPU_name,
10422 // make one up now. Tag_CPU_raw_name remains blank.
10423 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
10425 const std::string cpu_name
=
10426 this->tag_cpu_name_value(out_attr
[i
].int_value());
10427 // FIXME: If we see an unknown CPU, this will be set
10428 // to "<unknown CPU n>", where n is the attribute value.
10429 // This is different from BFD, which leaves the name alone.
10430 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
10435 case elfcpp::Tag_ARM_ISA_use
:
10436 case elfcpp::Tag_THUMB_ISA_use
:
10437 case elfcpp::Tag_WMMX_arch
:
10438 case elfcpp::Tag_Advanced_SIMD_arch
:
10439 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10440 case elfcpp::Tag_ABI_FP_rounding
:
10441 case elfcpp::Tag_ABI_FP_exceptions
:
10442 case elfcpp::Tag_ABI_FP_user_exceptions
:
10443 case elfcpp::Tag_ABI_FP_number_model
:
10444 case elfcpp::Tag_VFP_HP_extension
:
10445 case elfcpp::Tag_CPU_unaligned_access
:
10446 case elfcpp::Tag_T2EE_use
:
10447 case elfcpp::Tag_Virtualization_use
:
10448 case elfcpp::Tag_MPextension_use
:
10449 // Use the largest value specified.
10450 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10451 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10454 case elfcpp::Tag_ABI_align8_preserved
:
10455 case elfcpp::Tag_ABI_PCS_RO_data
:
10456 // Use the smallest value specified.
10457 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10458 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10461 case elfcpp::Tag_ABI_align8_needed
:
10462 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
10463 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
10464 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
10467 // This error message should be enabled once all non-conforming
10468 // binaries in the toolchain have had the attributes set
10470 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10474 case elfcpp::Tag_ABI_FP_denormal
:
10475 case elfcpp::Tag_ABI_PCS_GOT_use
:
10477 // These tags have 0 = don't care, 1 = strong requirement,
10478 // 2 = weak requirement.
10479 static const int order_021
[3] = {0, 2, 1};
10481 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10482 // value if greater than 2 (for future-proofing).
10483 if ((in_attr
[i
].int_value() > 2
10484 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10485 || (in_attr
[i
].int_value() <= 2
10486 && out_attr
[i
].int_value() <= 2
10487 && (order_021
[in_attr
[i
].int_value()]
10488 > order_021
[out_attr
[i
].int_value()])))
10489 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10493 case elfcpp::Tag_CPU_arch_profile
:
10494 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
10496 // 0 will merge with anything.
10497 // 'A' and 'S' merge to 'A'.
10498 // 'R' and 'S' merge to 'R'.
10499 // 'M' and 'A|R|S' is an error.
10500 if (out_attr
[i
].int_value() == 0
10501 || (out_attr
[i
].int_value() == 'S'
10502 && (in_attr
[i
].int_value() == 'A'
10503 || in_attr
[i
].int_value() == 'R')))
10504 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10505 else if (in_attr
[i
].int_value() == 0
10506 || (in_attr
[i
].int_value() == 'S'
10507 && (out_attr
[i
].int_value() == 'A'
10508 || out_attr
[i
].int_value() == 'R')))
10510 else if (parameters
->options().warn_mismatch())
10513 (_("conflicting architecture profiles %c/%c"),
10514 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10515 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10519 case elfcpp::Tag_VFP_arch
:
10521 static const struct
10525 } vfp_versions
[7] =
10536 // Values greater than 6 aren't defined, so just pick the
10538 if (in_attr
[i
].int_value() > 6
10539 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10541 *out_attr
= *in_attr
;
10544 // The output uses the superset of input features
10545 // (ISA version) and registers.
10546 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10547 vfp_versions
[out_attr
[i
].int_value()].ver
);
10548 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10549 vfp_versions
[out_attr
[i
].int_value()].regs
);
10550 // This assumes all possible supersets are also a valid
10553 for (newval
= 6; newval
> 0; newval
--)
10555 if (regs
== vfp_versions
[newval
].regs
10556 && ver
== vfp_versions
[newval
].ver
)
10559 out_attr
[i
].set_int_value(newval
);
10562 case elfcpp::Tag_PCS_config
:
10563 if (out_attr
[i
].int_value() == 0)
10564 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10565 else if (in_attr
[i
].int_value() != 0
10566 && out_attr
[i
].int_value() != 0
10567 && parameters
->options().warn_mismatch())
10569 // It's sometimes ok to mix different configs, so this is only
10571 gold_warning(_("%s: conflicting platform configuration"), name
);
10574 case elfcpp::Tag_ABI_PCS_R9_use
:
10575 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10576 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10577 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10578 && parameters
->options().warn_mismatch())
10580 gold_error(_("%s: conflicting use of R9"), name
);
10582 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10583 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10585 case elfcpp::Tag_ABI_PCS_RW_data
:
10586 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10587 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10588 != elfcpp::AEABI_R9_SB
)
10589 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10590 != elfcpp::AEABI_R9_unused
)
10591 && parameters
->options().warn_mismatch())
10593 gold_error(_("%s: SB relative addressing conflicts with use "
10597 // Use the smallest value specified.
10598 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10599 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10601 case elfcpp::Tag_ABI_PCS_wchar_t
:
10602 if (out_attr
[i
].int_value()
10603 && in_attr
[i
].int_value()
10604 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10605 && parameters
->options().warn_mismatch()
10606 && parameters
->options().wchar_size_warning())
10608 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10609 "use %u-byte wchar_t; use of wchar_t values "
10610 "across objects may fail"),
10611 name
, in_attr
[i
].int_value(),
10612 out_attr
[i
].int_value());
10614 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10615 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10617 case elfcpp::Tag_ABI_enum_size
:
10618 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10620 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10621 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10623 // The existing object is compatible with anything.
10624 // Use whatever requirements the new object has.
10625 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10627 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10628 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10629 && parameters
->options().warn_mismatch()
10630 && parameters
->options().enum_size_warning())
10632 unsigned int in_value
= in_attr
[i
].int_value();
10633 unsigned int out_value
= out_attr
[i
].int_value();
10634 gold_warning(_("%s uses %s enums yet the output is to use "
10635 "%s enums; use of enum values across objects "
10638 this->aeabi_enum_name(in_value
).c_str(),
10639 this->aeabi_enum_name(out_value
).c_str());
10643 case elfcpp::Tag_ABI_VFP_args
:
10646 case elfcpp::Tag_ABI_WMMX_args
:
10647 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10648 && parameters
->options().warn_mismatch())
10650 gold_error(_("%s uses iWMMXt register arguments, output does "
10655 case Object_attribute::Tag_compatibility
:
10656 // Merged in target-independent code.
10658 case elfcpp::Tag_ABI_HardFP_use
:
10659 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10660 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10661 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10662 out_attr
[i
].set_int_value(3);
10663 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10664 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10666 case elfcpp::Tag_ABI_FP_16bit_format
:
10667 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10669 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10670 && parameters
->options().warn_mismatch())
10671 gold_error(_("fp16 format mismatch between %s and output"),
10674 if (in_attr
[i
].int_value() != 0)
10675 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10678 case elfcpp::Tag_DIV_use
:
10679 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10680 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10681 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10682 // CPU. We will merge as follows: If the input attribute's value
10683 // is one then the output attribute's value remains unchanged. If
10684 // the input attribute's value is zero or two then if the output
10685 // attribute's value is one the output value is set to the input
10686 // value, otherwise the output value must be the same as the
10688 if (in_attr
[i
].int_value() != 1 && out_attr
[i
].int_value() != 1)
10690 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
10692 gold_error(_("DIV usage mismatch between %s and output"),
10697 if (in_attr
[i
].int_value() != 1)
10698 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10702 case elfcpp::Tag_MPextension_use_legacy
:
10703 // We don't output objects with Tag_MPextension_use_legacy - we
10704 // move the value to Tag_MPextension_use.
10705 if (in_attr
[i
].int_value() != 0
10706 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10708 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10709 != in_attr
[i
].int_value())
10711 gold_error(_("%s has has both the current and legacy "
10712 "Tag_MPextension_use attributes"),
10717 if (in_attr
[i
].int_value()
10718 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10719 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10723 case elfcpp::Tag_nodefaults
:
10724 // This tag is set if it exists, but the value is unused (and is
10725 // typically zero). We don't actually need to do anything here -
10726 // the merge happens automatically when the type flags are merged
10729 case elfcpp::Tag_also_compatible_with
:
10730 // Already done in Tag_CPU_arch.
10732 case elfcpp::Tag_conformance
:
10733 // Keep the attribute if it matches. Throw it away otherwise.
10734 // No attribute means no claim to conform.
10735 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10736 out_attr
[i
].set_string_value("");
10741 const char* err_object
= NULL
;
10743 // The "known_obj_attributes" table does contain some undefined
10744 // attributes. Ensure that there are unused.
10745 if (out_attr
[i
].int_value() != 0
10746 || out_attr
[i
].string_value() != "")
10747 err_object
= "output";
10748 else if (in_attr
[i
].int_value() != 0
10749 || in_attr
[i
].string_value() != "")
10752 if (err_object
!= NULL
10753 && parameters
->options().warn_mismatch())
10755 // Attribute numbers >=64 (mod 128) can be safely ignored.
10756 if ((i
& 127) < 64)
10757 gold_error(_("%s: unknown mandatory EABI object attribute "
10761 gold_warning(_("%s: unknown EABI object attribute %d"),
10765 // Only pass on attributes that match in both inputs.
10766 if (!in_attr
[i
].matches(out_attr
[i
]))
10768 out_attr
[i
].set_int_value(0);
10769 out_attr
[i
].set_string_value("");
10774 // If out_attr was copied from in_attr then it won't have a type yet.
10775 if (in_attr
[i
].type() && !out_attr
[i
].type())
10776 out_attr
[i
].set_type(in_attr
[i
].type());
10779 // Merge Tag_compatibility attributes and any common GNU ones.
10780 this->attributes_section_data_
->merge(name
, pasd
);
10782 // Check for any attributes not known on ARM.
10783 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10784 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10785 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10786 Other_attributes
* out_other_attributes
=
10787 this->attributes_section_data_
->other_attributes(vendor
);
10788 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10790 while (in_iter
!= in_other_attributes
->end()
10791 || out_iter
!= out_other_attributes
->end())
10793 const char* err_object
= NULL
;
10796 // The tags for each list are in numerical order.
10797 // If the tags are equal, then merge.
10798 if (out_iter
!= out_other_attributes
->end()
10799 && (in_iter
== in_other_attributes
->end()
10800 || in_iter
->first
> out_iter
->first
))
10802 // This attribute only exists in output. We can't merge, and we
10803 // don't know what the tag means, so delete it.
10804 err_object
= "output";
10805 err_tag
= out_iter
->first
;
10806 int saved_tag
= out_iter
->first
;
10807 delete out_iter
->second
;
10808 out_other_attributes
->erase(out_iter
);
10809 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10811 else if (in_iter
!= in_other_attributes
->end()
10812 && (out_iter
!= out_other_attributes
->end()
10813 || in_iter
->first
< out_iter
->first
))
10815 // This attribute only exists in input. We can't merge, and we
10816 // don't know what the tag means, so ignore it.
10818 err_tag
= in_iter
->first
;
10821 else // The tags are equal.
10823 // As present, all attributes in the list are unknown, and
10824 // therefore can't be merged meaningfully.
10825 err_object
= "output";
10826 err_tag
= out_iter
->first
;
10828 // Only pass on attributes that match in both inputs.
10829 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10831 // No match. Delete the attribute.
10832 int saved_tag
= out_iter
->first
;
10833 delete out_iter
->second
;
10834 out_other_attributes
->erase(out_iter
);
10835 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10839 // Matched. Keep the attribute and move to the next.
10845 if (err_object
&& parameters
->options().warn_mismatch())
10847 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10848 if ((err_tag
& 127) < 64)
10850 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10851 err_object
, err_tag
);
10855 gold_warning(_("%s: unknown EABI object attribute %d"),
10856 err_object
, err_tag
);
10862 // Stub-generation methods for Target_arm.
10864 // Make a new Arm_input_section object.
10866 template<bool big_endian
>
10867 Arm_input_section
<big_endian
>*
10868 Target_arm
<big_endian
>::new_arm_input_section(
10870 unsigned int shndx
)
10872 Section_id
sid(relobj
, shndx
);
10874 Arm_input_section
<big_endian
>* arm_input_section
=
10875 new Arm_input_section
<big_endian
>(relobj
, shndx
);
10876 arm_input_section
->init();
10878 // Register new Arm_input_section in map for look-up.
10879 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
10880 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
10882 // Make sure that it we have not created another Arm_input_section
10883 // for this input section already.
10884 gold_assert(ins
.second
);
10886 return arm_input_section
;
10889 // Find the Arm_input_section object corresponding to the SHNDX-th input
10890 // section of RELOBJ.
10892 template<bool big_endian
>
10893 Arm_input_section
<big_endian
>*
10894 Target_arm
<big_endian
>::find_arm_input_section(
10896 unsigned int shndx
) const
10898 Section_id
sid(relobj
, shndx
);
10899 typename
Arm_input_section_map::const_iterator p
=
10900 this->arm_input_section_map_
.find(sid
);
10901 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
10904 // Make a new stub table.
10906 template<bool big_endian
>
10907 Stub_table
<big_endian
>*
10908 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
10910 Stub_table
<big_endian
>* stub_table
=
10911 new Stub_table
<big_endian
>(owner
);
10912 this->stub_tables_
.push_back(stub_table
);
10914 stub_table
->set_address(owner
->address() + owner
->data_size());
10915 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
10916 stub_table
->finalize_data_size();
10921 // Scan a relocation for stub generation.
10923 template<bool big_endian
>
10925 Target_arm
<big_endian
>::scan_reloc_for_stub(
10926 const Relocate_info
<32, big_endian
>* relinfo
,
10927 unsigned int r_type
,
10928 const Sized_symbol
<32>* gsym
,
10929 unsigned int r_sym
,
10930 const Symbol_value
<32>* psymval
,
10931 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
10932 Arm_address address
)
10934 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
10936 const Arm_relobj
<big_endian
>* arm_relobj
=
10937 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10939 bool target_is_thumb
;
10940 Symbol_value
<32> symval
;
10943 // This is a global symbol. Determine if we use PLT and if the
10944 // final target is THUMB.
10945 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
10947 // This uses a PLT, change the symbol value.
10948 symval
.set_output_value(this->plt_section()->address()
10949 + gsym
->plt_offset());
10951 target_is_thumb
= false;
10953 else if (gsym
->is_undefined())
10954 // There is no need to generate a stub symbol is undefined.
10959 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
10960 || (gsym
->type() == elfcpp::STT_FUNC
10961 && !gsym
->is_undefined()
10962 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
10967 // This is a local symbol. Determine if the final target is THUMB.
10968 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
10971 // Strip LSB if this points to a THUMB target.
10972 const Arm_reloc_property
* reloc_property
=
10973 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10974 gold_assert(reloc_property
!= NULL
);
10975 if (target_is_thumb
10976 && reloc_property
->uses_thumb_bit()
10977 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
10979 Arm_address stripped_value
=
10980 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
10981 symval
.set_output_value(stripped_value
);
10985 // Get the symbol value.
10986 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
10988 // Owing to pipelining, the PC relative branches below actually skip
10989 // two instructions when the branch offset is 0.
10990 Arm_address destination
;
10993 case elfcpp::R_ARM_CALL
:
10994 case elfcpp::R_ARM_JUMP24
:
10995 case elfcpp::R_ARM_PLT32
:
10997 destination
= value
+ addend
+ 8;
10999 case elfcpp::R_ARM_THM_CALL
:
11000 case elfcpp::R_ARM_THM_XPC22
:
11001 case elfcpp::R_ARM_THM_JUMP24
:
11002 case elfcpp::R_ARM_THM_JUMP19
:
11004 destination
= value
+ addend
+ 4;
11007 gold_unreachable();
11010 Reloc_stub
* stub
= NULL
;
11011 Stub_type stub_type
=
11012 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11014 if (stub_type
!= arm_stub_none
)
11016 // Try looking up an existing stub from a stub table.
11017 Stub_table
<big_endian
>* stub_table
=
11018 arm_relobj
->stub_table(relinfo
->data_shndx
);
11019 gold_assert(stub_table
!= NULL
);
11021 // Locate stub by destination.
11022 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11024 // Create a stub if there is not one already
11025 stub
= stub_table
->find_reloc_stub(stub_key
);
11028 // create a new stub and add it to stub table.
11029 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11030 stub_table
->add_reloc_stub(stub
, stub_key
);
11033 // Record the destination address.
11034 stub
->set_destination_address(destination
11035 | (target_is_thumb
? 1 : 0));
11038 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11039 if (this->fix_cortex_a8_
11040 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11041 || r_type
== elfcpp::R_ARM_THM_JUMP19
11042 || r_type
== elfcpp::R_ARM_THM_CALL
11043 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11044 && (address
& 0xfffU
) == 0xffeU
)
11046 // Found a candidate. Note we haven't checked the destination is
11047 // within 4K here: if we do so (and don't create a record) we can't
11048 // tell that a branch should have been relocated when scanning later.
11049 this->cortex_a8_relocs_info_
[address
] =
11050 new Cortex_a8_reloc(stub
, r_type
,
11051 destination
| (target_is_thumb
? 1 : 0));
11055 // This function scans a relocation sections for stub generation.
11056 // The template parameter Relocate must be a class type which provides
11057 // a single function, relocate(), which implements the machine
11058 // specific part of a relocation.
11060 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11061 // SHT_REL or SHT_RELA.
11063 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11064 // of relocs. OUTPUT_SECTION is the output section.
11065 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11066 // mapped to output offsets.
11068 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11069 // VIEW_SIZE is the size. These refer to the input section, unless
11070 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11071 // the output section.
11073 template<bool big_endian
>
11074 template<int sh_type
>
11076 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11077 const Relocate_info
<32, big_endian
>* relinfo
,
11078 const unsigned char* prelocs
,
11079 size_t reloc_count
,
11080 Output_section
* output_section
,
11081 bool needs_special_offset_handling
,
11082 const unsigned char* view
,
11083 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11086 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11087 const int reloc_size
=
11088 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11090 Arm_relobj
<big_endian
>* arm_object
=
11091 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11092 unsigned int local_count
= arm_object
->local_symbol_count();
11094 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11096 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11098 Reltype
reloc(prelocs
);
11100 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11101 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11102 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11104 r_type
= this->get_real_reloc_type(r_type
);
11106 // Only a few relocation types need stubs.
11107 if ((r_type
!= elfcpp::R_ARM_CALL
)
11108 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11109 && (r_type
!= elfcpp::R_ARM_PLT32
)
11110 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11111 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11112 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11113 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11114 && (r_type
!= elfcpp::R_ARM_V4BX
))
11117 section_offset_type offset
=
11118 convert_to_section_size_type(reloc
.get_r_offset());
11120 if (needs_special_offset_handling
)
11122 offset
= output_section
->output_offset(relinfo
->object
,
11123 relinfo
->data_shndx
,
11129 // Create a v4bx stub if --fix-v4bx-interworking is used.
11130 if (r_type
== elfcpp::R_ARM_V4BX
)
11132 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11134 // Get the BX instruction.
11135 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11136 const Valtype
* wv
=
11137 reinterpret_cast<const Valtype
*>(view
+ offset
);
11138 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11139 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11140 const uint32_t reg
= (insn
& 0xf);
11144 // Try looking up an existing stub from a stub table.
11145 Stub_table
<big_endian
>* stub_table
=
11146 arm_object
->stub_table(relinfo
->data_shndx
);
11147 gold_assert(stub_table
!= NULL
);
11149 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11151 // create a new stub and add it to stub table.
11152 Arm_v4bx_stub
* stub
=
11153 this->stub_factory().make_arm_v4bx_stub(reg
);
11154 gold_assert(stub
!= NULL
);
11155 stub_table
->add_arm_v4bx_stub(stub
);
11163 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11164 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11165 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11167 const Sized_symbol
<32>* sym
;
11169 Symbol_value
<32> symval
;
11170 const Symbol_value
<32> *psymval
;
11171 bool is_defined_in_discarded_section
;
11172 unsigned int shndx
;
11173 if (r_sym
< local_count
)
11176 psymval
= arm_object
->local_symbol(r_sym
);
11178 // If the local symbol belongs to a section we are discarding,
11179 // and that section is a debug section, try to find the
11180 // corresponding kept section and map this symbol to its
11181 // counterpart in the kept section. The symbol must not
11182 // correspond to a section we are folding.
11184 shndx
= psymval
->input_shndx(&is_ordinary
);
11185 is_defined_in_discarded_section
=
11187 && shndx
!= elfcpp::SHN_UNDEF
11188 && !arm_object
->is_section_included(shndx
)
11189 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11191 // We need to compute the would-be final value of this local
11193 if (!is_defined_in_discarded_section
)
11195 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11196 typename
ObjType::Compute_final_local_value_status status
=
11197 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11199 if (status
== ObjType::CFLV_OK
)
11201 // Currently we cannot handle a branch to a target in
11202 // a merged section. If this is the case, issue an error
11203 // and also free the merge symbol value.
11204 if (!symval
.has_output_value())
11206 const std::string
& section_name
=
11207 arm_object
->section_name(shndx
);
11208 arm_object
->error(_("cannot handle branch to local %u "
11209 "in a merged section %s"),
11210 r_sym
, section_name
.c_str());
11216 // We cannot determine the final value.
11223 const Symbol
* gsym
;
11224 gsym
= arm_object
->global_symbol(r_sym
);
11225 gold_assert(gsym
!= NULL
);
11226 if (gsym
->is_forwarder())
11227 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11229 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11230 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11231 symval
.set_output_symtab_index(sym
->symtab_index());
11233 symval
.set_no_output_symtab_entry();
11235 // We need to compute the would-be final value of this global
11237 const Symbol_table
* symtab
= relinfo
->symtab
;
11238 const Sized_symbol
<32>* sized_symbol
=
11239 symtab
->get_sized_symbol
<32>(gsym
);
11240 Symbol_table::Compute_final_value_status status
;
11241 Arm_address value
=
11242 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11244 // Skip this if the symbol has not output section.
11245 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11247 symval
.set_output_value(value
);
11249 if (gsym
->type() == elfcpp::STT_TLS
)
11250 symval
.set_is_tls_symbol();
11251 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11252 symval
.set_is_ifunc_symbol();
11255 is_defined_in_discarded_section
=
11256 (gsym
->is_defined_in_discarded_section()
11257 && gsym
->is_undefined());
11261 Symbol_value
<32> symval2
;
11262 if (is_defined_in_discarded_section
)
11264 if (comdat_behavior
== CB_UNDETERMINED
)
11266 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
11267 comdat_behavior
= get_comdat_behavior(name
.c_str());
11269 if (comdat_behavior
== CB_PRETEND
)
11271 // FIXME: This case does not work for global symbols.
11272 // We have no place to store the original section index.
11273 // Fortunately this does not matter for comdat sections,
11274 // only for sections explicitly discarded by a linker
11277 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
11278 arm_object
->map_to_kept_section(shndx
, &found
);
11280 symval2
.set_output_value(value
+ psymval
->input_value());
11282 symval2
.set_output_value(0);
11286 if (comdat_behavior
== CB_WARNING
)
11287 gold_warning_at_location(relinfo
, i
, offset
,
11288 _("relocation refers to discarded "
11290 symval2
.set_output_value(0);
11292 symval2
.set_no_output_symtab_entry();
11293 psymval
= &symval2
;
11296 // If symbol is a section symbol, we don't know the actual type of
11297 // destination. Give up.
11298 if (psymval
->is_section_symbol())
11301 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
11302 addend
, view_address
+ offset
);
11306 // Scan an input section for stub generation.
11308 template<bool big_endian
>
11310 Target_arm
<big_endian
>::scan_section_for_stubs(
11311 const Relocate_info
<32, big_endian
>* relinfo
,
11312 unsigned int sh_type
,
11313 const unsigned char* prelocs
,
11314 size_t reloc_count
,
11315 Output_section
* output_section
,
11316 bool needs_special_offset_handling
,
11317 const unsigned char* view
,
11318 Arm_address view_address
,
11319 section_size_type view_size
)
11321 if (sh_type
== elfcpp::SHT_REL
)
11322 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
11327 needs_special_offset_handling
,
11331 else if (sh_type
== elfcpp::SHT_RELA
)
11332 // We do not support RELA type relocations yet. This is provided for
11334 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
11339 needs_special_offset_handling
,
11344 gold_unreachable();
11347 // Group input sections for stub generation.
11349 // We group input sections in an output section so that the total size,
11350 // including any padding space due to alignment is smaller than GROUP_SIZE
11351 // unless the only input section in group is bigger than GROUP_SIZE already.
11352 // Then an ARM stub table is created to follow the last input section
11353 // in group. For each group an ARM stub table is created an is placed
11354 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11355 // extend the group after the stub table.
11357 template<bool big_endian
>
11359 Target_arm
<big_endian
>::group_sections(
11361 section_size_type group_size
,
11362 bool stubs_always_after_branch
,
11365 // Group input sections and insert stub table
11366 Layout::Section_list section_list
;
11367 layout
->get_allocated_sections(§ion_list
);
11368 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11369 p
!= section_list
.end();
11372 Arm_output_section
<big_endian
>* output_section
=
11373 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11374 output_section
->group_sections(group_size
, stubs_always_after_branch
,
11379 // Relaxation hook. This is where we do stub generation.
11381 template<bool big_endian
>
11383 Target_arm
<big_endian
>::do_relax(
11385 const Input_objects
* input_objects
,
11386 Symbol_table
* symtab
,
11390 // No need to generate stubs if this is a relocatable link.
11391 gold_assert(!parameters
->options().relocatable());
11393 // If this is the first pass, we need to group input sections into
11395 bool done_exidx_fixup
= false;
11396 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
11399 // Determine the stub group size. The group size is the absolute
11400 // value of the parameter --stub-group-size. If --stub-group-size
11401 // is passed a negative value, we restrict stubs to be always after
11402 // the stubbed branches.
11403 int32_t stub_group_size_param
=
11404 parameters
->options().stub_group_size();
11405 bool stubs_always_after_branch
= stub_group_size_param
< 0;
11406 section_size_type stub_group_size
= abs(stub_group_size_param
);
11408 if (stub_group_size
== 1)
11411 // Thumb branch range is +-4MB has to be used as the default
11412 // maximum size (a given section can contain both ARM and Thumb
11413 // code, so the worst case has to be taken into account). If we are
11414 // fixing cortex-a8 errata, the branch range has to be even smaller,
11415 // since wide conditional branch has a range of +-1MB only.
11417 // This value is 48K less than that, which allows for 4096
11418 // 12-byte stubs. If we exceed that, then we will fail to link.
11419 // The user will have to relink with an explicit group size
11421 stub_group_size
= 4145152;
11424 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11425 // page as the first half of a 32-bit branch straddling two 4K pages.
11426 // This is a crude way of enforcing that. In addition, long conditional
11427 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11428 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11429 // cortex-A8 stubs from long conditional branches.
11430 if (this->fix_cortex_a8_
)
11432 stubs_always_after_branch
= true;
11433 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
11434 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
11437 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
11439 // Also fix .ARM.exidx section coverage.
11440 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
11441 for (Layout::Section_list::const_iterator p
=
11442 layout
->section_list().begin();
11443 p
!= layout
->section_list().end();
11445 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
11447 if (exidx_output_section
== NULL
)
11448 exidx_output_section
=
11449 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11451 // We cannot handle this now.
11452 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11453 "non-relocatable link"),
11454 exidx_output_section
->name(),
11458 if (exidx_output_section
!= NULL
)
11460 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
11462 done_exidx_fixup
= true;
11467 // If this is not the first pass, addresses and file offsets have
11468 // been reset at this point, set them here.
11469 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11470 sp
!= this->stub_tables_
.end();
11473 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11474 off_t off
= align_address(owner
->original_size(),
11475 (*sp
)->addralign());
11476 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
11477 owner
->offset() + off
);
11481 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11482 // beginning of each relaxation pass, just blow away all the stubs.
11483 // Alternatively, we could selectively remove only the stubs and reloc
11484 // information for code sections that have moved since the last pass.
11485 // That would require more book-keeping.
11486 if (this->fix_cortex_a8_
)
11488 // Clear all Cortex-A8 reloc information.
11489 for (typename
Cortex_a8_relocs_info::const_iterator p
=
11490 this->cortex_a8_relocs_info_
.begin();
11491 p
!= this->cortex_a8_relocs_info_
.end();
11494 this->cortex_a8_relocs_info_
.clear();
11496 // Remove all Cortex-A8 stubs.
11497 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11498 sp
!= this->stub_tables_
.end();
11500 (*sp
)->remove_all_cortex_a8_stubs();
11503 // Scan relocs for relocation stubs
11504 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11505 op
!= input_objects
->relobj_end();
11508 Arm_relobj
<big_endian
>* arm_relobj
=
11509 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11510 // Lock the object so we can read from it. This is only called
11511 // single-threaded from Layout::finalize, so it is OK to lock.
11512 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11513 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
11516 // Check all stub tables to see if any of them have their data sizes
11517 // or addresses alignments changed. These are the only things that
11519 bool any_stub_table_changed
= false;
11520 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
11521 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11522 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11525 if ((*sp
)->update_data_size_and_addralign())
11527 // Update data size of stub table owner.
11528 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11529 uint64_t address
= owner
->address();
11530 off_t offset
= owner
->offset();
11531 owner
->reset_address_and_file_offset();
11532 owner
->set_address_and_file_offset(address
, offset
);
11534 sections_needing_adjustment
.insert(owner
->output_section());
11535 any_stub_table_changed
= true;
11539 // Output_section_data::output_section() returns a const pointer but we
11540 // need to update output sections, so we record all output sections needing
11541 // update above and scan the sections here to find out what sections need
11543 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
11544 p
!= layout
->section_list().end();
11547 if (sections_needing_adjustment
.find(*p
)
11548 != sections_needing_adjustment
.end())
11549 (*p
)->set_section_offsets_need_adjustment();
11552 // Stop relaxation if no EXIDX fix-up and no stub table change.
11553 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
11555 // Finalize the stubs in the last relaxation pass.
11556 if (!continue_relaxation
)
11558 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11559 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11561 (*sp
)->finalize_stubs();
11563 // Update output local symbol counts of objects if necessary.
11564 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11565 op
!= input_objects
->relobj_end();
11568 Arm_relobj
<big_endian
>* arm_relobj
=
11569 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11571 // Update output local symbol counts. We need to discard local
11572 // symbols defined in parts of input sections that are discarded by
11574 if (arm_relobj
->output_local_symbol_count_needs_update())
11576 // We need to lock the object's file to update it.
11577 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11578 arm_relobj
->update_output_local_symbol_count();
11583 return continue_relaxation
;
11586 // Relocate a stub.
11588 template<bool big_endian
>
11590 Target_arm
<big_endian
>::relocate_stub(
11592 const Relocate_info
<32, big_endian
>* relinfo
,
11593 Output_section
* output_section
,
11594 unsigned char* view
,
11595 Arm_address address
,
11596 section_size_type view_size
)
11599 const Stub_template
* stub_template
= stub
->stub_template();
11600 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11602 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11603 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11605 unsigned int r_type
= insn
->r_type();
11606 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11607 section_size_type reloc_size
= insn
->size();
11608 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11610 // This is the address of the stub destination.
11611 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11612 Symbol_value
<32> symval
;
11613 symval
.set_output_value(target
);
11615 // Synthesize a fake reloc just in case. We don't have a symbol so
11617 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11618 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11619 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11620 reloc_write
.put_r_offset(reloc_offset
);
11621 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11622 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11624 relocate
.relocate(relinfo
, this, output_section
,
11625 this->fake_relnum_for_stubs
, rel
, r_type
,
11626 NULL
, &symval
, view
+ reloc_offset
,
11627 address
+ reloc_offset
, reloc_size
);
11631 // Determine whether an object attribute tag takes an integer, a
11634 template<bool big_endian
>
11636 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11638 if (tag
== Object_attribute::Tag_compatibility
)
11639 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11640 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11641 else if (tag
== elfcpp::Tag_nodefaults
)
11642 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11643 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11644 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11645 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11647 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11649 return ((tag
& 1) != 0
11650 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11651 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11654 // Reorder attributes.
11656 // The ABI defines that Tag_conformance should be emitted first, and that
11657 // Tag_nodefaults should be second (if either is defined). This sets those
11658 // two positions, and bumps up the position of all the remaining tags to
11661 template<bool big_endian
>
11663 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11665 // Reorder the known object attributes in output. We want to move
11666 // Tag_conformance to position 4 and Tag_conformance to position 5
11667 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11669 return elfcpp::Tag_conformance
;
11671 return elfcpp::Tag_nodefaults
;
11672 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11674 if ((num
- 1) < elfcpp::Tag_conformance
)
11679 // Scan a span of THUMB code for Cortex-A8 erratum.
11681 template<bool big_endian
>
11683 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11684 Arm_relobj
<big_endian
>* arm_relobj
,
11685 unsigned int shndx
,
11686 section_size_type span_start
,
11687 section_size_type span_end
,
11688 const unsigned char* view
,
11689 Arm_address address
)
11691 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11693 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11694 // The branch target is in the same 4KB region as the
11695 // first half of the branch.
11696 // The instruction before the branch is a 32-bit
11697 // length non-branch instruction.
11698 section_size_type i
= span_start
;
11699 bool last_was_32bit
= false;
11700 bool last_was_branch
= false;
11701 while (i
< span_end
)
11703 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11704 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11705 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11706 bool is_blx
= false, is_b
= false;
11707 bool is_bl
= false, is_bcc
= false;
11709 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11712 // Load the rest of the insn (in manual-friendly order).
11713 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11715 // Encoding T4: B<c>.W.
11716 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11717 // Encoding T1: BL<c>.W.
11718 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11719 // Encoding T2: BLX<c>.W.
11720 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11721 // Encoding T3: B<c>.W (not permitted in IT block).
11722 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11723 && (insn
& 0x07f00000U
) != 0x03800000U
);
11726 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11728 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11729 // page boundary and it follows 32-bit non-branch instruction,
11730 // we need to work around.
11731 if (is_32bit_branch
11732 && ((address
+ i
) & 0xfffU
) == 0xffeU
11734 && !last_was_branch
)
11736 // Check to see if there is a relocation stub for this branch.
11737 bool force_target_arm
= false;
11738 bool force_target_thumb
= false;
11739 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11740 Cortex_a8_relocs_info::const_iterator p
=
11741 this->cortex_a8_relocs_info_
.find(address
+ i
);
11743 if (p
!= this->cortex_a8_relocs_info_
.end())
11745 cortex_a8_reloc
= p
->second
;
11746 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11748 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11749 && !target_is_thumb
)
11750 force_target_arm
= true;
11751 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11752 && target_is_thumb
)
11753 force_target_thumb
= true;
11757 Stub_type stub_type
= arm_stub_none
;
11759 // Check if we have an offending branch instruction.
11760 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11761 uint16_t lower_insn
= insn
& 0xffffU
;
11762 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11764 if (cortex_a8_reloc
!= NULL
11765 && cortex_a8_reloc
->reloc_stub() != NULL
)
11766 // We've already made a stub for this instruction, e.g.
11767 // it's a long branch or a Thumb->ARM stub. Assume that
11768 // stub will suffice to work around the A8 erratum (see
11769 // setting of always_after_branch above).
11773 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11775 stub_type
= arm_stub_a8_veneer_b_cond
;
11777 else if (is_b
|| is_bl
|| is_blx
)
11779 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11784 stub_type
= (is_blx
11785 ? arm_stub_a8_veneer_blx
11787 ? arm_stub_a8_veneer_bl
11788 : arm_stub_a8_veneer_b
));
11791 if (stub_type
!= arm_stub_none
)
11793 Arm_address pc_for_insn
= address
+ i
+ 4;
11795 // The original instruction is a BL, but the target is
11796 // an ARM instruction. If we were not making a stub,
11797 // the BL would have been converted to a BLX. Use the
11798 // BLX stub instead in that case.
11799 if (this->may_use_blx() && force_target_arm
11800 && stub_type
== arm_stub_a8_veneer_bl
)
11802 stub_type
= arm_stub_a8_veneer_blx
;
11806 // Conversely, if the original instruction was
11807 // BLX but the target is Thumb mode, use the BL stub.
11808 else if (force_target_thumb
11809 && stub_type
== arm_stub_a8_veneer_blx
)
11811 stub_type
= arm_stub_a8_veneer_bl
;
11819 // If we found a relocation, use the proper destination,
11820 // not the offset in the (unrelocated) instruction.
11821 // Note this is always done if we switched the stub type above.
11822 if (cortex_a8_reloc
!= NULL
)
11823 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11825 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11827 // Add a new stub if destination address in in the same page.
11828 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11830 Cortex_a8_stub
* stub
=
11831 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11835 Stub_table
<big_endian
>* stub_table
=
11836 arm_relobj
->stub_table(shndx
);
11837 gold_assert(stub_table
!= NULL
);
11838 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11843 i
+= insn_32bit
? 4 : 2;
11844 last_was_32bit
= insn_32bit
;
11845 last_was_branch
= is_32bit_branch
;
11849 // Apply the Cortex-A8 workaround.
11851 template<bool big_endian
>
11853 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11854 const Cortex_a8_stub
* stub
,
11855 Arm_address stub_address
,
11856 unsigned char* insn_view
,
11857 Arm_address insn_address
)
11859 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11860 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
11861 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11862 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11863 off_t branch_offset
= stub_address
- (insn_address
+ 4);
11865 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11866 switch (stub
->stub_template()->type())
11868 case arm_stub_a8_veneer_b_cond
:
11869 // For a conditional branch, we re-write it to be an unconditional
11870 // branch to the stub. We use the THUMB-2 encoding here.
11871 upper_insn
= 0xf000U
;
11872 lower_insn
= 0xb800U
;
11874 case arm_stub_a8_veneer_b
:
11875 case arm_stub_a8_veneer_bl
:
11876 case arm_stub_a8_veneer_blx
:
11877 if ((lower_insn
& 0x5000U
) == 0x4000U
)
11878 // For a BLX instruction, make sure that the relocation is
11879 // rounded up to a word boundary. This follows the semantics of
11880 // the instruction which specifies that bit 1 of the target
11881 // address will come from bit 1 of the base address.
11882 branch_offset
= (branch_offset
+ 2) & ~3;
11884 // Put BRANCH_OFFSET back into the insn.
11885 gold_assert(!utils::has_overflow
<25>(branch_offset
));
11886 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
11887 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
11891 gold_unreachable();
11894 // Put the relocated value back in the object file:
11895 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
11896 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
11899 template<bool big_endian
>
11900 class Target_selector_arm
: public Target_selector
11903 Target_selector_arm()
11904 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
11905 (big_endian
? "elf32-bigarm" : "elf32-littlearm"))
11909 do_instantiate_target()
11910 { return new Target_arm
<big_endian
>(); }
11913 // Fix .ARM.exidx section coverage.
11915 template<bool big_endian
>
11917 Target_arm
<big_endian
>::fix_exidx_coverage(
11919 const Input_objects
* input_objects
,
11920 Arm_output_section
<big_endian
>* exidx_section
,
11921 Symbol_table
* symtab
,
11924 // We need to look at all the input sections in output in ascending
11925 // order of of output address. We do that by building a sorted list
11926 // of output sections by addresses. Then we looks at the output sections
11927 // in order. The input sections in an output section are already sorted
11928 // by addresses within the output section.
11930 typedef std::set
<Output_section
*, output_section_address_less_than
>
11931 Sorted_output_section_list
;
11932 Sorted_output_section_list sorted_output_sections
;
11934 // Find out all the output sections of input sections pointed by
11935 // EXIDX input sections.
11936 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
11937 p
!= input_objects
->relobj_end();
11940 Arm_relobj
<big_endian
>* arm_relobj
=
11941 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
11942 std::vector
<unsigned int> shndx_list
;
11943 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
11944 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
11946 const Arm_exidx_input_section
* exidx_input_section
=
11947 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
11948 gold_assert(exidx_input_section
!= NULL
);
11949 if (!exidx_input_section
->has_errors())
11951 unsigned int text_shndx
= exidx_input_section
->link();
11952 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
11953 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
11954 sorted_output_sections
.insert(os
);
11959 // Go over the output sections in ascending order of output addresses.
11960 typedef typename Arm_output_section
<big_endian
>::Text_section_list
11962 Text_section_list sorted_text_sections
;
11963 for (typename
Sorted_output_section_list::iterator p
=
11964 sorted_output_sections
.begin();
11965 p
!= sorted_output_sections
.end();
11968 Arm_output_section
<big_endian
>* arm_output_section
=
11969 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11970 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
11973 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
11974 merge_exidx_entries(), task
);
11977 Target_selector_arm
<false> target_selector_arm
;
11978 Target_selector_arm
<true> target_selector_armbe
;
11980 } // End anonymous namespace.