1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
59 template<bool big_endian
>
60 class Output_data_plt_arm
;
62 template<bool big_endian
>
65 template<bool big_endian
>
66 class Arm_input_section
;
68 class Arm_exidx_cantunwind
;
70 class Arm_exidx_merged_section
;
72 class Arm_exidx_fixup
;
74 template<bool big_endian
>
75 class Arm_output_section
;
77 class Arm_exidx_input_section
;
79 template<bool big_endian
>
82 template<bool big_endian
>
86 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
88 // Maximum branch offsets for ARM, THUMB and THUMB2.
89 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
90 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
91 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
92 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
93 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
94 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
96 // The arm target class.
98 // This is a very simple port of gold for ARM-EABI. It is intended for
99 // supporting Android only for the time being.
102 // - Support the following relocation types as needed:
105 // R_ARM_LDR_SBREL_11_0_NC
106 // R_ARM_ALU_SBREL_19_12_NC
107 // R_ARM_ALU_SBREL_27_20_CK
109 // R_ARM_THM_ALU_PREL_11_0
125 // - Make PLTs more flexible for different architecture features like
127 // There are probably a lot more.
129 // Instruction template class. This class is similar to the insn_sequence
130 // struct in bfd/elf32-arm.c.
135 // Types of instruction templates.
139 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
140 // templates with class-specific semantics. Currently this is used
141 // only by the Cortex_a8_stub class for handling condition codes in
142 // conditional branches.
143 THUMB16_SPECIAL_TYPE
,
149 // Factory methods to create instruction templates in different formats.
151 static const Insn_template
152 thumb16_insn(uint32_t data
)
153 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
155 // A Thumb conditional branch, in which the proper condition is inserted
156 // when we build the stub.
157 static const Insn_template
158 thumb16_bcond_insn(uint32_t data
)
159 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
161 static const Insn_template
162 thumb32_insn(uint32_t data
)
163 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
165 static const Insn_template
166 thumb32_b_insn(uint32_t data
, int reloc_addend
)
168 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
172 static const Insn_template
173 arm_insn(uint32_t data
)
174 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
176 static const Insn_template
177 arm_rel_insn(unsigned data
, int reloc_addend
)
178 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
180 static const Insn_template
181 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
182 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
184 // Accessors. This class is used for read-only objects so no modifiers
189 { return this->data_
; }
191 // Return the instruction sequence type of this.
194 { return this->type_
; }
196 // Return the ARM relocation type of this.
199 { return this->r_type_
; }
203 { return this->reloc_addend_
; }
205 // Return size of instruction template in bytes.
209 // Return byte-alignment of instruction template.
214 // We make the constructor private to ensure that only the factory
217 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
218 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
221 // Instruction specific data. This is used to store information like
222 // some of the instruction bits.
224 // Instruction template type.
226 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
227 unsigned int r_type_
;
228 // Relocation addend.
229 int32_t reloc_addend_
;
232 // Macro for generating code to stub types. One entry per long/short
236 DEF_STUB(long_branch_any_any) \
237 DEF_STUB(long_branch_v4t_arm_thumb) \
238 DEF_STUB(long_branch_thumb_only) \
239 DEF_STUB(long_branch_v4t_thumb_thumb) \
240 DEF_STUB(long_branch_v4t_thumb_arm) \
241 DEF_STUB(short_branch_v4t_thumb_arm) \
242 DEF_STUB(long_branch_any_arm_pic) \
243 DEF_STUB(long_branch_any_thumb_pic) \
244 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
245 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
247 DEF_STUB(long_branch_thumb_only_pic) \
248 DEF_STUB(a8_veneer_b_cond) \
249 DEF_STUB(a8_veneer_b) \
250 DEF_STUB(a8_veneer_bl) \
251 DEF_STUB(a8_veneer_blx) \
252 DEF_STUB(v4_veneer_bx)
256 #define DEF_STUB(x) arm_stub_##x,
262 // First reloc stub type.
263 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
264 // Last reloc stub type.
265 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
267 // First Cortex-A8 stub type.
268 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
269 // Last Cortex-A8 stub type.
270 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
273 arm_stub_type_last
= arm_stub_v4_veneer_bx
277 // Stub template class. Templates are meant to be read-only objects.
278 // A stub template for a stub type contains all read-only attributes
279 // common to all stubs of the same type.
284 Stub_template(Stub_type
, const Insn_template
*, size_t);
292 { return this->type_
; }
294 // Return an array of instruction templates.
297 { return this->insns_
; }
299 // Return size of template in number of instructions.
302 { return this->insn_count_
; }
304 // Return size of template in bytes.
307 { return this->size_
; }
309 // Return alignment of the stub template.
312 { return this->alignment_
; }
314 // Return whether entry point is in thumb mode.
316 entry_in_thumb_mode() const
317 { return this->entry_in_thumb_mode_
; }
319 // Return number of relocations in this template.
322 { return this->relocs_
.size(); }
324 // Return index of the I-th instruction with relocation.
326 reloc_insn_index(size_t i
) const
328 gold_assert(i
< this->relocs_
.size());
329 return this->relocs_
[i
].first
;
332 // Return the offset of the I-th instruction with relocation from the
333 // beginning of the stub.
335 reloc_offset(size_t i
) const
337 gold_assert(i
< this->relocs_
.size());
338 return this->relocs_
[i
].second
;
342 // This contains information about an instruction template with a relocation
343 // and its offset from start of stub.
344 typedef std::pair
<size_t, section_size_type
> Reloc
;
346 // A Stub_template may not be copied. We want to share templates as much
348 Stub_template(const Stub_template
&);
349 Stub_template
& operator=(const Stub_template
&);
353 // Points to an array of Insn_templates.
354 const Insn_template
* insns_
;
355 // Number of Insn_templates in insns_[].
357 // Size of templated instructions in bytes.
359 // Alignment of templated instructions.
361 // Flag to indicate if entry is in thumb mode.
362 bool entry_in_thumb_mode_
;
363 // A table of reloc instruction indices and offsets. We can find these by
364 // looking at the instruction templates but we pre-compute and then stash
365 // them here for speed.
366 std::vector
<Reloc
> relocs_
;
370 // A class for code stubs. This is a base class for different type of
371 // stubs used in the ARM target.
377 static const section_offset_type invalid_offset
=
378 static_cast<section_offset_type
>(-1);
381 Stub(const Stub_template
* stub_template
)
382 : stub_template_(stub_template
), offset_(invalid_offset
)
389 // Return the stub template.
391 stub_template() const
392 { return this->stub_template_
; }
394 // Return offset of code stub from beginning of its containing stub table.
398 gold_assert(this->offset_
!= invalid_offset
);
399 return this->offset_
;
402 // Set offset of code stub from beginning of its containing stub table.
404 set_offset(section_offset_type offset
)
405 { this->offset_
= offset
; }
407 // Return the relocation target address of the i-th relocation in the
408 // stub. This must be defined in a child class.
410 reloc_target(size_t i
)
411 { return this->do_reloc_target(i
); }
413 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
415 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
416 { this->do_write(view
, view_size
, big_endian
); }
418 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
419 // for the i-th instruction.
421 thumb16_special(size_t i
)
422 { return this->do_thumb16_special(i
); }
425 // This must be defined in the child class.
427 do_reloc_target(size_t) = 0;
429 // This may be overridden in the child class.
431 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
434 this->do_fixed_endian_write
<true>(view
, view_size
);
436 this->do_fixed_endian_write
<false>(view
, view_size
);
439 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
440 // instruction template.
442 do_thumb16_special(size_t)
443 { gold_unreachable(); }
446 // A template to implement do_write.
447 template<bool big_endian
>
449 do_fixed_endian_write(unsigned char*, section_size_type
);
452 const Stub_template
* stub_template_
;
453 // Offset within the section of containing this stub.
454 section_offset_type offset_
;
457 // Reloc stub class. These are stubs we use to fix up relocation because
458 // of limited branch ranges.
460 class Reloc_stub
: public Stub
463 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
464 // We assume we never jump to this address.
465 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
467 // Return destination address.
469 destination_address() const
471 gold_assert(this->destination_address_
!= this->invalid_address
);
472 return this->destination_address_
;
475 // Set destination address.
477 set_destination_address(Arm_address address
)
479 gold_assert(address
!= this->invalid_address
);
480 this->destination_address_
= address
;
483 // Reset destination address.
485 reset_destination_address()
486 { this->destination_address_
= this->invalid_address
; }
488 // Determine stub type for a branch of a relocation of R_TYPE going
489 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
490 // the branch target is a thumb instruction. TARGET is used for look
491 // up ARM-specific linker settings.
493 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
494 Arm_address branch_target
, bool target_is_thumb
);
496 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
497 // and an addend. Since we treat global and local symbol differently, we
498 // use a Symbol object for a global symbol and a object-index pair for
503 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
504 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
505 // and R_SYM must not be invalid_index.
506 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
507 unsigned int r_sym
, int32_t addend
)
508 : stub_type_(stub_type
), addend_(addend
)
512 this->r_sym_
= Reloc_stub::invalid_index
;
513 this->u_
.symbol
= symbol
;
517 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
518 this->r_sym_
= r_sym
;
519 this->u_
.relobj
= relobj
;
526 // Accessors: Keys are meant to be read-only object so no modifiers are
532 { return this->stub_type_
; }
534 // Return the local symbol index or invalid_index.
537 { return this->r_sym_
; }
539 // Return the symbol if there is one.
542 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
544 // Return the relobj if there is one.
547 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
549 // Whether this equals to another key k.
551 eq(const Key
& k
) const
553 return ((this->stub_type_
== k
.stub_type_
)
554 && (this->r_sym_
== k
.r_sym_
)
555 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
556 ? (this->u_
.relobj
== k
.u_
.relobj
)
557 : (this->u_
.symbol
== k
.u_
.symbol
))
558 && (this->addend_
== k
.addend_
));
561 // Return a hash value.
565 return (this->stub_type_
567 ^ gold::string_hash
<char>(
568 (this->r_sym_
!= Reloc_stub::invalid_index
)
569 ? this->u_
.relobj
->name().c_str()
570 : this->u_
.symbol
->name())
574 // Functors for STL associative containers.
578 operator()(const Key
& k
) const
579 { return k
.hash_value(); }
585 operator()(const Key
& k1
, const Key
& k2
) const
586 { return k1
.eq(k2
); }
589 // Name of key. This is mainly for debugging.
595 Stub_type stub_type_
;
596 // If this is a local symbol, this is the index in the defining object.
597 // Otherwise, it is invalid_index for a global symbol.
599 // If r_sym_ is invalid index. This points to a global symbol.
600 // Otherwise, this points a relobj. We used the unsized and target
601 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
602 // Arm_relobj. This is done to avoid making the stub class a template
603 // as most of the stub machinery is endianity-neutral. However, it
604 // may require a bit of casting done by users of this class.
607 const Symbol
* symbol
;
608 const Relobj
* relobj
;
610 // Addend associated with a reloc.
615 // Reloc_stubs are created via a stub factory. So these are protected.
616 Reloc_stub(const Stub_template
* stub_template
)
617 : Stub(stub_template
), destination_address_(invalid_address
)
623 friend class Stub_factory
;
625 // Return the relocation target address of the i-th relocation in the
628 do_reloc_target(size_t i
)
630 // All reloc stub have only one relocation.
632 return this->destination_address_
;
636 // Address of destination.
637 Arm_address destination_address_
;
640 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
641 // THUMB branch that meets the following conditions:
643 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
644 // branch address is 0xffe.
645 // 2. The branch target address is in the same page as the first word of the
647 // 3. The branch follows a 32-bit instruction which is not a branch.
649 // To do the fix up, we need to store the address of the branch instruction
650 // and its target at least. We also need to store the original branch
651 // instruction bits for the condition code in a conditional branch. The
652 // condition code is used in a special instruction template. We also want
653 // to identify input sections needing Cortex-A8 workaround quickly. We store
654 // extra information about object and section index of the code section
655 // containing a branch being fixed up. The information is used to mark
656 // the code section when we finalize the Cortex-A8 stubs.
659 class Cortex_a8_stub
: public Stub
665 // Return the object of the code section containing the branch being fixed
669 { return this->relobj_
; }
671 // Return the section index of the code section containing the branch being
675 { return this->shndx_
; }
677 // Return the source address of stub. This is the address of the original
678 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
681 source_address() const
682 { return this->source_address_
; }
684 // Return the destination address of the stub. This is the branch taken
685 // address of the original branch instruction. LSB is 1 if it is a THUMB
686 // instruction address.
688 destination_address() const
689 { return this->destination_address_
; }
691 // Return the instruction being fixed up.
693 original_insn() const
694 { return this->original_insn_
; }
697 // Cortex_a8_stubs are created via a stub factory. So these are protected.
698 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
699 unsigned int shndx
, Arm_address source_address
,
700 Arm_address destination_address
, uint32_t original_insn
)
701 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
702 source_address_(source_address
| 1U),
703 destination_address_(destination_address
),
704 original_insn_(original_insn
)
707 friend class Stub_factory
;
709 // Return the relocation target address of the i-th relocation in the
712 do_reloc_target(size_t i
)
714 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
716 // The conditional branch veneer has two relocations.
718 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
722 // All other Cortex-A8 stubs have only one relocation.
724 return this->destination_address_
;
728 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
730 do_thumb16_special(size_t);
733 // Object of the code section containing the branch being fixed up.
735 // Section index of the code section containing the branch begin fixed up.
737 // Source address of original branch.
738 Arm_address source_address_
;
739 // Destination address of the original branch.
740 Arm_address destination_address_
;
741 // Original branch instruction. This is needed for copying the condition
742 // code from a condition branch to its stub.
743 uint32_t original_insn_
;
746 // ARMv4 BX Rx branch relocation stub class.
747 class Arm_v4bx_stub
: public Stub
753 // Return the associated register.
756 { return this->reg_
; }
759 // Arm V4BX stubs are created via a stub factory. So these are protected.
760 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
761 : Stub(stub_template
), reg_(reg
)
764 friend class Stub_factory
;
766 // Return the relocation target address of the i-th relocation in the
769 do_reloc_target(size_t)
770 { gold_unreachable(); }
772 // This may be overridden in the child class.
774 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
777 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
779 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
783 // A template to implement do_write.
784 template<bool big_endian
>
786 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
788 const Insn_template
* insns
= this->stub_template()->insns();
789 elfcpp::Swap
<32, big_endian
>::writeval(view
,
791 + (this->reg_
<< 16)));
792 view
+= insns
[0].size();
793 elfcpp::Swap
<32, big_endian
>::writeval(view
,
794 (insns
[1].data() + this->reg_
));
795 view
+= insns
[1].size();
796 elfcpp::Swap
<32, big_endian
>::writeval(view
,
797 (insns
[2].data() + this->reg_
));
800 // A register index (r0-r14), which is associated with the stub.
804 // Stub factory class.
809 // Return the unique instance of this class.
810 static const Stub_factory
&
813 static Stub_factory singleton
;
817 // Make a relocation stub.
819 make_reloc_stub(Stub_type stub_type
) const
821 gold_assert(stub_type
>= arm_stub_reloc_first
822 && stub_type
<= arm_stub_reloc_last
);
823 return new Reloc_stub(this->stub_templates_
[stub_type
]);
826 // Make a Cortex-A8 stub.
828 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
829 Arm_address source
, Arm_address destination
,
830 uint32_t original_insn
) const
832 gold_assert(stub_type
>= arm_stub_cortex_a8_first
833 && stub_type
<= arm_stub_cortex_a8_last
);
834 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
835 source
, destination
, original_insn
);
838 // Make an ARM V4BX relocation stub.
839 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
841 make_arm_v4bx_stub(uint32_t reg
) const
843 gold_assert(reg
< 0xf);
844 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
849 // Constructor and destructor are protected since we only return a single
850 // instance created in Stub_factory::get_instance().
854 // A Stub_factory may not be copied since it is a singleton.
855 Stub_factory(const Stub_factory
&);
856 Stub_factory
& operator=(Stub_factory
&);
858 // Stub templates. These are initialized in the constructor.
859 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
862 // A class to hold stubs for the ARM target.
864 template<bool big_endian
>
865 class Stub_table
: public Output_data
868 Stub_table(Arm_input_section
<big_endian
>* owner
)
869 : Output_data(), owner_(owner
), reloc_stubs_(), cortex_a8_stubs_(),
870 arm_v4bx_stubs_(0xf), prev_data_size_(0), prev_addralign_(1)
876 // Owner of this stub table.
877 Arm_input_section
<big_endian
>*
879 { return this->owner_
; }
881 // Whether this stub table is empty.
885 return (this->reloc_stubs_
.empty()
886 && this->cortex_a8_stubs_
.empty()
887 && this->arm_v4bx_stubs_
.empty());
890 // Return the current data size.
892 current_data_size() const
893 { return this->current_data_size_for_child(); }
895 // Add a STUB with using KEY. Caller is reponsible for avoid adding
896 // if already a STUB with the same key has been added.
898 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
900 const Stub_template
* stub_template
= stub
->stub_template();
901 gold_assert(stub_template
->type() == key
.stub_type());
902 this->reloc_stubs_
[key
] = stub
;
905 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
906 // Caller is reponsible for avoid adding if already a STUB with the same
907 // address has been added.
909 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
911 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
912 this->cortex_a8_stubs_
.insert(value
);
915 // Add an ARM V4BX relocation stub. A register index will be retrieved
918 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
920 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
921 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
924 // Remove all Cortex-A8 stubs.
926 remove_all_cortex_a8_stubs();
928 // Look up a relocation stub using KEY. Return NULL if there is none.
930 find_reloc_stub(const Reloc_stub::Key
& key
) const
932 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
933 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
936 // Look up an arm v4bx relocation stub using the register index.
937 // Return NULL if there is none.
939 find_arm_v4bx_stub(const uint32_t reg
) const
941 gold_assert(reg
< 0xf);
942 return this->arm_v4bx_stubs_
[reg
];
945 // Relocate stubs in this stub table.
947 relocate_stubs(const Relocate_info
<32, big_endian
>*,
948 Target_arm
<big_endian
>*, Output_section
*,
949 unsigned char*, Arm_address
, section_size_type
);
951 // Update data size and alignment at the end of a relaxation pass. Return
952 // true if either data size or alignment is different from that of the
953 // previous relaxation pass.
955 update_data_size_and_addralign();
957 // Finalize stubs. Set the offsets of all stubs and mark input sections
958 // needing the Cortex-A8 workaround.
962 // Apply Cortex-A8 workaround to an address range.
964 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
965 unsigned char*, Arm_address
,
969 // Write out section contents.
971 do_write(Output_file
*);
973 // Return the required alignment.
976 { return this->prev_addralign_
; }
978 // Reset address and file offset.
980 do_reset_address_and_file_offset()
981 { this->set_current_data_size_for_child(this->prev_data_size_
); }
983 // Set final data size.
985 set_final_data_size()
986 { this->set_data_size(this->current_data_size()); }
989 // Relocate one stub.
991 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
992 Target_arm
<big_endian
>*, Output_section
*,
993 unsigned char*, Arm_address
, section_size_type
);
995 // Unordered map of relocation stubs.
997 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
998 Reloc_stub::Key::equal_to
>
1001 // List of Cortex-A8 stubs ordered by addresses of branches being
1002 // fixed up in output.
1003 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1004 // List of Arm V4BX relocation stubs ordered by associated registers.
1005 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1007 // Owner of this stub table.
1008 Arm_input_section
<big_endian
>* owner_
;
1009 // The relocation stubs.
1010 Reloc_stub_map reloc_stubs_
;
1011 // The cortex_a8_stubs.
1012 Cortex_a8_stub_list cortex_a8_stubs_
;
1013 // The Arm V4BX relocation stubs.
1014 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1015 // data size of this in the previous pass.
1016 off_t prev_data_size_
;
1017 // address alignment of this in the previous pass.
1018 uint64_t prev_addralign_
;
1021 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1022 // we add to the end of an EXIDX input section that goes into the output.
1024 class Arm_exidx_cantunwind
: public Output_section_data
1027 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1028 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1031 // Return the object containing the section pointed by this.
1034 { return this->relobj_
; }
1036 // Return the section index of the section pointed by this.
1039 { return this->shndx_
; }
1043 do_write(Output_file
* of
)
1045 if (parameters
->target().is_big_endian())
1046 this->do_fixed_endian_write
<true>(of
);
1048 this->do_fixed_endian_write
<false>(of
);
1052 // Implement do_write for a given endianity.
1053 template<bool big_endian
>
1055 do_fixed_endian_write(Output_file
*);
1057 // The object containing the section pointed by this.
1059 // The section index of the section pointed by this.
1060 unsigned int shndx_
;
1063 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1064 // Offset map is used to map input section offset within the EXIDX section
1065 // to the output offset from the start of this EXIDX section.
1067 typedef std::map
<section_offset_type
, section_offset_type
>
1068 Arm_exidx_section_offset_map
;
1070 // Arm_exidx_merged_section class. This represents an EXIDX input section
1071 // with some of its entries merged.
1073 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1076 // Constructor for Arm_exidx_merged_section.
1077 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1078 // SECTION_OFFSET_MAP points to a section offset map describing how
1079 // parts of the input section are mapped to output. DELETED_BYTES is
1080 // the number of bytes deleted from the EXIDX input section.
1081 Arm_exidx_merged_section(
1082 const Arm_exidx_input_section
& exidx_input_section
,
1083 const Arm_exidx_section_offset_map
& section_offset_map
,
1084 uint32_t deleted_bytes
);
1086 // Return the original EXIDX input section.
1087 const Arm_exidx_input_section
&
1088 exidx_input_section() const
1089 { return this->exidx_input_section_
; }
1091 // Return the section offset map.
1092 const Arm_exidx_section_offset_map
&
1093 section_offset_map() const
1094 { return this->section_offset_map_
; }
1097 // Write merged section into file OF.
1099 do_write(Output_file
* of
);
1102 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1103 section_offset_type
*) const;
1106 // Original EXIDX input section.
1107 const Arm_exidx_input_section
& exidx_input_section_
;
1108 // Section offset map.
1109 const Arm_exidx_section_offset_map
& section_offset_map_
;
1112 // A class to wrap an ordinary input section containing executable code.
1114 template<bool big_endian
>
1115 class Arm_input_section
: public Output_relaxed_input_section
1118 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1119 : Output_relaxed_input_section(relobj
, shndx
, 1),
1120 original_addralign_(1), original_size_(0), stub_table_(NULL
)
1123 ~Arm_input_section()
1130 // Whether this is a stub table owner.
1132 is_stub_table_owner() const
1133 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1135 // Return the stub table.
1136 Stub_table
<big_endian
>*
1138 { return this->stub_table_
; }
1140 // Set the stub_table.
1142 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1143 { this->stub_table_
= stub_table
; }
1145 // Downcast a base pointer to an Arm_input_section pointer. This is
1146 // not type-safe but we only use Arm_input_section not the base class.
1147 static Arm_input_section
<big_endian
>*
1148 as_arm_input_section(Output_relaxed_input_section
* poris
)
1149 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1152 // Write data to output file.
1154 do_write(Output_file
*);
1156 // Return required alignment of this.
1158 do_addralign() const
1160 if (this->is_stub_table_owner())
1161 return std::max(this->stub_table_
->addralign(),
1162 this->original_addralign_
);
1164 return this->original_addralign_
;
1167 // Finalize data size.
1169 set_final_data_size();
1171 // Reset address and file offset.
1173 do_reset_address_and_file_offset();
1177 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1178 section_offset_type offset
,
1179 section_offset_type
* poutput
) const
1181 if ((object
== this->relobj())
1182 && (shndx
== this->shndx())
1184 && (convert_types
<uint64_t, section_offset_type
>(offset
)
1185 <= this->original_size_
))
1195 // Copying is not allowed.
1196 Arm_input_section(const Arm_input_section
&);
1197 Arm_input_section
& operator=(const Arm_input_section
&);
1199 // Address alignment of the original input section.
1200 uint64_t original_addralign_
;
1201 // Section size of the original input section.
1202 uint64_t original_size_
;
1204 Stub_table
<big_endian
>* stub_table_
;
1207 // Arm_exidx_fixup class. This is used to define a number of methods
1208 // and keep states for fixing up EXIDX coverage.
1210 class Arm_exidx_fixup
1213 Arm_exidx_fixup(Output_section
* exidx_output_section
)
1214 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1215 last_inlined_entry_(0), last_input_section_(NULL
),
1216 section_offset_map_(NULL
)
1220 { delete this->section_offset_map_
; }
1222 // Process an EXIDX section for entry merging. Return number of bytes to
1223 // be deleted in output. If parts of the input EXIDX section are merged
1224 // a heap allocated Arm_exidx_section_offset_map is store in the located
1225 // PSECTION_OFFSET_MAP. The caller owns the map and is reponsible for
1227 template<bool big_endian
>
1229 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1230 Arm_exidx_section_offset_map
** psection_offset_map
);
1232 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1233 // input section, if there is not one already.
1235 add_exidx_cantunwind_as_needed();
1238 // Copying is not allowed.
1239 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1240 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1242 // Type of EXIDX unwind entry.
1247 // EXIDX_CANTUNWIND.
1248 UT_EXIDX_CANTUNWIND
,
1255 // Process an EXIDX entry. We only care about the second word of the
1256 // entry. Return true if the entry can be deleted.
1258 process_exidx_entry(uint32_t second_word
);
1260 // Update the current section offset map during EXIDX section fix-up.
1261 // If there is no map, create one. INPUT_OFFSET is the offset of a
1262 // reference point, DELETED_BYTES is the number of deleted by in the
1263 // section so far. If DELETE_ENTRY is true, the reference point and
1264 // all offsets after the previous reference point are discarded.
1266 update_offset_map(section_offset_type input_offset
,
1267 section_size_type deleted_bytes
, bool delete_entry
);
1269 // EXIDX output section.
1270 Output_section
* exidx_output_section_
;
1271 // Unwind type of the last EXIDX entry processed.
1272 Unwind_type last_unwind_type_
;
1273 // Last seen inlined EXIDX entry.
1274 uint32_t last_inlined_entry_
;
1275 // Last processed EXIDX input section.
1276 const Arm_exidx_input_section
* last_input_section_
;
1277 // Section offset map created in process_exidx_section.
1278 Arm_exidx_section_offset_map
* section_offset_map_
;
1281 // Arm output section class. This is defined mainly to add a number of
1282 // stub generation methods.
1284 template<bool big_endian
>
1285 class Arm_output_section
: public Output_section
1288 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1290 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1291 elfcpp::Elf_Xword flags
)
1292 : Output_section(name
, type
, flags
)
1295 ~Arm_output_section()
1298 // Group input sections for stub generation.
1300 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*);
1302 // Downcast a base pointer to an Arm_output_section pointer. This is
1303 // not type-safe but we only use Arm_output_section not the base class.
1304 static Arm_output_section
<big_endian
>*
1305 as_arm_output_section(Output_section
* os
)
1306 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1308 // Append all input text sections in this into LIST.
1310 append_text_sections_to_list(Text_section_list
* list
);
1312 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1313 // is a list of text input sections sorted in ascending order of their
1314 // output addresses.
1316 fix_exidx_coverage(const Text_section_list
& sorted_text_section
,
1317 Symbol_table
* symtab
);
1321 typedef Output_section::Input_section Input_section
;
1322 typedef Output_section::Input_section_list Input_section_list
;
1324 // Create a stub group.
1325 void create_stub_group(Input_section_list::const_iterator
,
1326 Input_section_list::const_iterator
,
1327 Input_section_list::const_iterator
,
1328 Target_arm
<big_endian
>*,
1329 std::vector
<Output_relaxed_input_section
*>*);
1332 // Arm_exidx_input_section class. This represents an EXIDX input section.
1334 class Arm_exidx_input_section
1337 static const section_offset_type invalid_offset
=
1338 static_cast<section_offset_type
>(-1);
1340 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1341 unsigned int link
, uint32_t size
, uint32_t addralign
)
1342 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1343 addralign_(addralign
)
1346 ~Arm_exidx_input_section()
1349 // Accessors: This is a read-only class.
1351 // Return the object containing this EXIDX input section.
1354 { return this->relobj_
; }
1356 // Return the section index of this EXIDX input section.
1359 { return this->shndx_
; }
1361 // Return the section index of linked text section in the same object.
1364 { return this->link_
; }
1366 // Return size of the EXIDX input section.
1369 { return this->size_
; }
1371 // Reutnr address alignment of EXIDX input section.
1374 { return this->addralign_
; }
1377 // Object containing this.
1379 // Section index of this.
1380 unsigned int shndx_
;
1381 // text section linked to this in the same object.
1383 // Size of this. For ARM 32-bit is sufficient.
1385 // Address alignment of this. For ARM 32-bit is sufficient.
1386 uint32_t addralign_
;
1389 // Arm_relobj class.
1391 template<bool big_endian
>
1392 class Arm_relobj
: public Sized_relobj
<32, big_endian
>
1395 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1397 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1398 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1399 : Sized_relobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1400 stub_tables_(), local_symbol_is_thumb_function_(),
1401 attributes_section_data_(NULL
), mapping_symbols_info_(),
1402 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_()
1406 { delete this->attributes_section_data_
; }
1408 // Return the stub table of the SHNDX-th section if there is one.
1409 Stub_table
<big_endian
>*
1410 stub_table(unsigned int shndx
) const
1412 gold_assert(shndx
< this->stub_tables_
.size());
1413 return this->stub_tables_
[shndx
];
1416 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1418 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1420 gold_assert(shndx
< this->stub_tables_
.size());
1421 this->stub_tables_
[shndx
] = stub_table
;
1424 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1425 // index. This is only valid after do_count_local_symbol is called.
1427 local_symbol_is_thumb_function(unsigned int r_sym
) const
1429 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1430 return this->local_symbol_is_thumb_function_
[r_sym
];
1433 // Scan all relocation sections for stub generation.
1435 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1438 // Convert regular input section with index SHNDX to a relaxed section.
1440 convert_input_section_to_relaxed_section(unsigned shndx
)
1442 // The stubs have relocations and we need to process them after writing
1443 // out the stubs. So relocation now must follow section write.
1444 this->set_section_offset(shndx
, -1ULL);
1445 this->set_relocs_must_follow_section_writes();
1448 // Downcast a base pointer to an Arm_relobj pointer. This is
1449 // not type-safe but we only use Arm_relobj not the base class.
1450 static Arm_relobj
<big_endian
>*
1451 as_arm_relobj(Relobj
* relobj
)
1452 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1454 // Processor-specific flags in ELF file header. This is valid only after
1457 processor_specific_flags() const
1458 { return this->processor_specific_flags_
; }
1460 // Attribute section data This is the contents of the .ARM.attribute section
1462 const Attributes_section_data
*
1463 attributes_section_data() const
1464 { return this->attributes_section_data_
; }
1466 // Mapping symbol location.
1467 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1469 // Functor for STL container.
1470 struct Mapping_symbol_position_less
1473 operator()(const Mapping_symbol_position
& p1
,
1474 const Mapping_symbol_position
& p2
) const
1476 return (p1
.first
< p2
.first
1477 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1481 // We only care about the first character of a mapping symbol, so
1482 // we only store that instead of the whole symbol name.
1483 typedef std::map
<Mapping_symbol_position
, char,
1484 Mapping_symbol_position_less
> Mapping_symbols_info
;
1486 // Whether a section contains any Cortex-A8 workaround.
1488 section_has_cortex_a8_workaround(unsigned int shndx
) const
1490 return (this->section_has_cortex_a8_workaround_
!= NULL
1491 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1494 // Mark a section that has Cortex-A8 workaround.
1496 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1498 if (this->section_has_cortex_a8_workaround_
== NULL
)
1499 this->section_has_cortex_a8_workaround_
=
1500 new std::vector
<bool>(this->shnum(), false);
1501 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1504 // Return the EXIDX section of an text section with index SHNDX or NULL
1505 // if the text section has no associated EXIDX section.
1506 const Arm_exidx_input_section
*
1507 exidx_input_section_by_link(unsigned int shndx
) const
1509 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1510 return ((p
!= this->exidx_section_map_
.end()
1511 && p
->second
->link() == shndx
)
1516 // Return the EXIDX section with index SHNDX or NULL if there is none.
1517 const Arm_exidx_input_section
*
1518 exidx_input_section_by_shndx(unsigned shndx
) const
1520 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1521 return ((p
!= this->exidx_section_map_
.end()
1522 && p
->second
->shndx() == shndx
)
1528 // Post constructor setup.
1532 // Call parent's setup method.
1533 Sized_relobj
<32, big_endian
>::do_setup();
1535 // Initialize look-up tables.
1536 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1537 this->stub_tables_
.swap(empty_stub_table_list
);
1540 // Count the local symbols.
1542 do_count_local_symbols(Stringpool_template
<char>*,
1543 Stringpool_template
<char>*);
1546 do_relocate_sections(const Symbol_table
* symtab
, const Layout
* layout
,
1547 const unsigned char* pshdrs
,
1548 typename Sized_relobj
<32, big_endian
>::Views
* pivews
);
1550 // Read the symbol information.
1552 do_read_symbols(Read_symbols_data
* sd
);
1554 // Process relocs for garbage collection.
1556 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1560 // Whether a section needs to be scanned for relocation stubs.
1562 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1563 const Relobj::Output_sections
&,
1564 const Symbol_table
*, const unsigned char*);
1566 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1568 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1569 unsigned int, Output_section
*,
1570 const Symbol_table
*);
1572 // Scan a section for the Cortex-A8 erratum.
1574 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1575 unsigned int, Output_section
*,
1576 Target_arm
<big_endian
>*);
1578 // Make a new Arm_exidx_input_section object for EXIDX section with
1579 // index SHNDX and section header SHDR.
1581 make_exidx_input_section(unsigned int shndx
,
1582 const elfcpp::Shdr
<32, big_endian
>& shdr
);
1584 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1585 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1588 // List of stub tables.
1589 Stub_table_list stub_tables_
;
1590 // Bit vector to tell if a local symbol is a thumb function or not.
1591 // This is only valid after do_count_local_symbol is called.
1592 std::vector
<bool> local_symbol_is_thumb_function_
;
1593 // processor-specific flags in ELF file header.
1594 elfcpp::Elf_Word processor_specific_flags_
;
1595 // Object attributes if there is an .ARM.attributes section or NULL.
1596 Attributes_section_data
* attributes_section_data_
;
1597 // Mapping symbols information.
1598 Mapping_symbols_info mapping_symbols_info_
;
1599 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1600 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1601 // Map a text section to its associated .ARM.exidx section, if there is one.
1602 Exidx_section_map exidx_section_map_
;
1605 // Arm_dynobj class.
1607 template<bool big_endian
>
1608 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1611 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1612 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1613 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1614 processor_specific_flags_(0), attributes_section_data_(NULL
)
1618 { delete this->attributes_section_data_
; }
1620 // Downcast a base pointer to an Arm_relobj pointer. This is
1621 // not type-safe but we only use Arm_relobj not the base class.
1622 static Arm_dynobj
<big_endian
>*
1623 as_arm_dynobj(Dynobj
* dynobj
)
1624 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1626 // Processor-specific flags in ELF file header. This is valid only after
1629 processor_specific_flags() const
1630 { return this->processor_specific_flags_
; }
1632 // Attributes section data.
1633 const Attributes_section_data
*
1634 attributes_section_data() const
1635 { return this->attributes_section_data_
; }
1638 // Read the symbol information.
1640 do_read_symbols(Read_symbols_data
* sd
);
1643 // processor-specific flags in ELF file header.
1644 elfcpp::Elf_Word processor_specific_flags_
;
1645 // Object attributes if there is an .ARM.attributes section or NULL.
1646 Attributes_section_data
* attributes_section_data_
;
1649 // Functor to read reloc addends during stub generation.
1651 template<int sh_type
, bool big_endian
>
1652 struct Stub_addend_reader
1654 // Return the addend for a relocation of a particular type. Depending
1655 // on whether this is a REL or RELA relocation, read the addend from a
1656 // view or from a Reloc object.
1657 elfcpp::Elf_types
<32>::Elf_Swxword
1659 unsigned int /* r_type */,
1660 const unsigned char* /* view */,
1661 const typename Reloc_types
<sh_type
,
1662 32, big_endian
>::Reloc
& /* reloc */) const;
1665 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1667 template<bool big_endian
>
1668 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1670 elfcpp::Elf_types
<32>::Elf_Swxword
1673 const unsigned char*,
1674 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1677 // Specialized Stub_addend_reader for RELA type relocation sections.
1678 // We currently do not handle RELA type relocation sections but it is trivial
1679 // to implement the addend reader. This is provided for completeness and to
1680 // make it easier to add support for RELA relocation sections in the future.
1682 template<bool big_endian
>
1683 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1685 elfcpp::Elf_types
<32>::Elf_Swxword
1688 const unsigned char*,
1689 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1690 big_endian
>::Reloc
& reloc
) const
1691 { return reloc
.get_r_addend(); }
1694 // Cortex_a8_reloc class. We keep record of relocation that may need
1695 // the Cortex-A8 erratum workaround.
1697 class Cortex_a8_reloc
1700 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1701 Arm_address destination
)
1702 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1708 // Accessors: This is a read-only class.
1710 // Return the relocation stub associated with this relocation if there is
1714 { return this->reloc_stub_
; }
1716 // Return the relocation type.
1719 { return this->r_type_
; }
1721 // Return the destination address of the relocation. LSB stores the THUMB
1725 { return this->destination_
; }
1728 // Associated relocation stub if there is one, or NULL.
1729 const Reloc_stub
* reloc_stub_
;
1731 unsigned int r_type_
;
1732 // Destination address of this relocation. LSB is used to distinguish
1734 Arm_address destination_
;
1737 // Utilities for manipulating integers of up to 32-bits
1741 // Sign extend an n-bit unsigned integer stored in an uint32_t into
1742 // an int32_t. NO_BITS must be between 1 to 32.
1743 template<int no_bits
>
1744 static inline int32_t
1745 sign_extend(uint32_t bits
)
1747 gold_assert(no_bits
>= 0 && no_bits
<= 32);
1749 return static_cast<int32_t>(bits
);
1750 uint32_t mask
= (~((uint32_t) 0)) >> (32 - no_bits
);
1752 uint32_t top_bit
= 1U << (no_bits
- 1);
1753 int32_t as_signed
= static_cast<int32_t>(bits
);
1754 return (bits
& top_bit
) ? as_signed
+ (-top_bit
* 2) : as_signed
;
1757 // Detects overflow of an NO_BITS integer stored in a uint32_t.
1758 template<int no_bits
>
1760 has_overflow(uint32_t bits
)
1762 gold_assert(no_bits
>= 0 && no_bits
<= 32);
1765 int32_t max
= (1 << (no_bits
- 1)) - 1;
1766 int32_t min
= -(1 << (no_bits
- 1));
1767 int32_t as_signed
= static_cast<int32_t>(bits
);
1768 return as_signed
> max
|| as_signed
< min
;
1771 // Detects overflow of an NO_BITS integer stored in a uint32_t when it
1772 // fits in the given number of bits as either a signed or unsigned value.
1773 // For example, has_signed_unsigned_overflow<8> would check
1774 // -128 <= bits <= 255
1775 template<int no_bits
>
1777 has_signed_unsigned_overflow(uint32_t bits
)
1779 gold_assert(no_bits
>= 2 && no_bits
<= 32);
1782 int32_t max
= static_cast<int32_t>((1U << no_bits
) - 1);
1783 int32_t min
= -(1 << (no_bits
- 1));
1784 int32_t as_signed
= static_cast<int32_t>(bits
);
1785 return as_signed
> max
|| as_signed
< min
;
1788 // Select bits from A and B using bits in MASK. For each n in [0..31],
1789 // the n-th bit in the result is chosen from the n-th bits of A and B.
1790 // A zero selects A and a one selects B.
1791 static inline uint32_t
1792 bit_select(uint32_t a
, uint32_t b
, uint32_t mask
)
1793 { return (a
& ~mask
) | (b
& mask
); }
1796 template<bool big_endian
>
1797 class Target_arm
: public Sized_target
<32, big_endian
>
1800 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
1803 // When were are relocating a stub, we pass this as the relocation number.
1804 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
1807 : Sized_target
<32, big_endian
>(&arm_info
),
1808 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
1809 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
), stub_tables_(),
1810 stub_factory_(Stub_factory::get_instance()), may_use_blx_(false),
1811 should_force_pic_veneer_(false), arm_input_section_map_(),
1812 attributes_section_data_(NULL
), fix_cortex_a8_(false),
1813 cortex_a8_relocs_info_()
1816 // Whether we can use BLX.
1819 { return this->may_use_blx_
; }
1821 // Set use-BLX flag.
1823 set_may_use_blx(bool value
)
1824 { this->may_use_blx_
= value
; }
1826 // Whether we force PCI branch veneers.
1828 should_force_pic_veneer() const
1829 { return this->should_force_pic_veneer_
; }
1831 // Set PIC veneer flag.
1833 set_should_force_pic_veneer(bool value
)
1834 { this->should_force_pic_veneer_
= value
; }
1836 // Whether we use THUMB-2 instructions.
1838 using_thumb2() const
1840 Object_attribute
* attr
=
1841 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1842 int arch
= attr
->int_value();
1843 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
1846 // Whether we use THUMB/THUMB-2 instructions only.
1848 using_thumb_only() const
1850 Object_attribute
* attr
=
1851 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1852 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
1853 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
1855 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
1856 return attr
->int_value() == 'M';
1859 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
1861 may_use_arm_nop() const
1863 Object_attribute
* attr
=
1864 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1865 int arch
= attr
->int_value();
1866 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
1867 || arch
== elfcpp::TAG_CPU_ARCH_V6K
1868 || arch
== elfcpp::TAG_CPU_ARCH_V7
1869 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
1872 // Whether we have THUMB-2 NOP.W instruction.
1874 may_use_thumb2_nop() const
1876 Object_attribute
* attr
=
1877 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
1878 int arch
= attr
->int_value();
1879 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
1880 || arch
== elfcpp::TAG_CPU_ARCH_V7
1881 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
1884 // Process the relocations to determine unreferenced sections for
1885 // garbage collection.
1887 gc_process_relocs(Symbol_table
* symtab
,
1889 Sized_relobj
<32, big_endian
>* object
,
1890 unsigned int data_shndx
,
1891 unsigned int sh_type
,
1892 const unsigned char* prelocs
,
1894 Output_section
* output_section
,
1895 bool needs_special_offset_handling
,
1896 size_t local_symbol_count
,
1897 const unsigned char* plocal_symbols
);
1899 // Scan the relocations to look for symbol adjustments.
1901 scan_relocs(Symbol_table
* symtab
,
1903 Sized_relobj
<32, big_endian
>* object
,
1904 unsigned int data_shndx
,
1905 unsigned int sh_type
,
1906 const unsigned char* prelocs
,
1908 Output_section
* output_section
,
1909 bool needs_special_offset_handling
,
1910 size_t local_symbol_count
,
1911 const unsigned char* plocal_symbols
);
1913 // Finalize the sections.
1915 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
1917 // Return the value to use for a dynamic symbol which requires special
1920 do_dynsym_value(const Symbol
*) const;
1922 // Relocate a section.
1924 relocate_section(const Relocate_info
<32, big_endian
>*,
1925 unsigned int sh_type
,
1926 const unsigned char* prelocs
,
1928 Output_section
* output_section
,
1929 bool needs_special_offset_handling
,
1930 unsigned char* view
,
1931 Arm_address view_address
,
1932 section_size_type view_size
,
1933 const Reloc_symbol_changes
*);
1935 // Scan the relocs during a relocatable link.
1937 scan_relocatable_relocs(Symbol_table
* symtab
,
1939 Sized_relobj
<32, big_endian
>* object
,
1940 unsigned int data_shndx
,
1941 unsigned int sh_type
,
1942 const unsigned char* prelocs
,
1944 Output_section
* output_section
,
1945 bool needs_special_offset_handling
,
1946 size_t local_symbol_count
,
1947 const unsigned char* plocal_symbols
,
1948 Relocatable_relocs
*);
1950 // Relocate a section during a relocatable link.
1952 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
1953 unsigned int sh_type
,
1954 const unsigned char* prelocs
,
1956 Output_section
* output_section
,
1957 off_t offset_in_output_section
,
1958 const Relocatable_relocs
*,
1959 unsigned char* view
,
1960 Arm_address view_address
,
1961 section_size_type view_size
,
1962 unsigned char* reloc_view
,
1963 section_size_type reloc_view_size
);
1965 // Return whether SYM is defined by the ABI.
1967 do_is_defined_by_abi(Symbol
* sym
) const
1968 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
1970 // Return the size of the GOT section.
1974 gold_assert(this->got_
!= NULL
);
1975 return this->got_
->data_size();
1978 // Map platform-specific reloc types
1980 get_real_reloc_type (unsigned int r_type
);
1983 // Methods to support stub-generations.
1986 // Return the stub factory
1988 stub_factory() const
1989 { return this->stub_factory_
; }
1991 // Make a new Arm_input_section object.
1992 Arm_input_section
<big_endian
>*
1993 new_arm_input_section(Relobj
*, unsigned int);
1995 // Find the Arm_input_section object corresponding to the SHNDX-th input
1996 // section of RELOBJ.
1997 Arm_input_section
<big_endian
>*
1998 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2000 // Make a new Stub_table
2001 Stub_table
<big_endian
>*
2002 new_stub_table(Arm_input_section
<big_endian
>*);
2004 // Scan a section for stub generation.
2006 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2007 const unsigned char*, size_t, Output_section
*,
2008 bool, const unsigned char*, Arm_address
,
2013 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2014 Output_section
*, unsigned char*, Arm_address
,
2017 // Get the default ARM target.
2018 static Target_arm
<big_endian
>*
2021 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2022 && parameters
->target().is_big_endian() == big_endian
);
2023 return static_cast<Target_arm
<big_endian
>*>(
2024 parameters
->sized_target
<32, big_endian
>());
2027 // Whether relocation type uses LSB to distinguish THUMB addresses.
2029 reloc_uses_thumb_bit(unsigned int r_type
);
2031 // Whether NAME belongs to a mapping symbol.
2033 is_mapping_symbol_name(const char* name
)
2037 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2038 && (name
[2] == '\0' || name
[2] == '.'));
2041 // Whether we work around the Cortex-A8 erratum.
2043 fix_cortex_a8() const
2044 { return this->fix_cortex_a8_
; }
2046 // Whether we fix R_ARM_V4BX relocation.
2048 // 1 - replace with MOV instruction (armv4 target)
2049 // 2 - make interworking veneer (>= armv4t targets only)
2050 General_options::Fix_v4bx
2052 { return parameters
->options().fix_v4bx(); }
2054 // Scan a span of THUMB code section for Cortex-A8 erratum.
2056 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2057 section_size_type
, section_size_type
,
2058 const unsigned char*, Arm_address
);
2060 // Apply Cortex-A8 workaround to a branch.
2062 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2063 unsigned char*, Arm_address
);
2066 // Make an ELF object.
2068 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2069 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2072 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2073 const elfcpp::Ehdr
<32, !big_endian
>&)
2074 { gold_unreachable(); }
2077 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2078 const elfcpp::Ehdr
<64, false>&)
2079 { gold_unreachable(); }
2082 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2083 const elfcpp::Ehdr
<64, true>&)
2084 { gold_unreachable(); }
2086 // Make an output section.
2088 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2089 elfcpp::Elf_Xword flags
)
2090 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2093 do_adjust_elf_header(unsigned char* view
, int len
) const;
2095 // We only need to generate stubs, and hence perform relaxation if we are
2096 // not doing relocatable linking.
2098 do_may_relax() const
2099 { return !parameters
->options().relocatable(); }
2102 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*);
2104 // Determine whether an object attribute tag takes an integer, a
2107 do_attribute_arg_type(int tag
) const;
2109 // Reorder tags during output.
2111 do_attributes_order(int num
) const;
2114 // The class which scans relocations.
2119 : issued_non_pic_error_(false)
2123 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2124 Sized_relobj
<32, big_endian
>* object
,
2125 unsigned int data_shndx
,
2126 Output_section
* output_section
,
2127 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2128 const elfcpp::Sym
<32, big_endian
>& lsym
);
2131 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2132 Sized_relobj
<32, big_endian
>* object
,
2133 unsigned int data_shndx
,
2134 Output_section
* output_section
,
2135 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2140 unsupported_reloc_local(Sized_relobj
<32, big_endian
>*,
2141 unsigned int r_type
);
2144 unsupported_reloc_global(Sized_relobj
<32, big_endian
>*,
2145 unsigned int r_type
, Symbol
*);
2148 check_non_pic(Relobj
*, unsigned int r_type
);
2150 // Almost identical to Symbol::needs_plt_entry except that it also
2151 // handles STT_ARM_TFUNC.
2153 symbol_needs_plt_entry(const Symbol
* sym
)
2155 // An undefined symbol from an executable does not need a PLT entry.
2156 if (sym
->is_undefined() && !parameters
->options().shared())
2159 return (!parameters
->doing_static_link()
2160 && (sym
->type() == elfcpp::STT_FUNC
2161 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2162 && (sym
->is_from_dynobj()
2163 || sym
->is_undefined()
2164 || sym
->is_preemptible()));
2167 // Whether we have issued an error about a non-PIC compilation.
2168 bool issued_non_pic_error_
;
2171 // The class which implements relocation.
2181 // Return whether the static relocation needs to be applied.
2183 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2186 Output_section
* output_section
);
2188 // Do a relocation. Return false if the caller should not issue
2189 // any warnings about this relocation.
2191 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2192 Output_section
*, size_t relnum
,
2193 const elfcpp::Rel
<32, big_endian
>&,
2194 unsigned int r_type
, const Sized_symbol
<32>*,
2195 const Symbol_value
<32>*,
2196 unsigned char*, Arm_address
,
2199 // Return whether we want to pass flag NON_PIC_REF for this
2200 // reloc. This means the relocation type accesses a symbol not via
2203 reloc_is_non_pic (unsigned int r_type
)
2207 // These relocation types reference GOT or PLT entries explicitly.
2208 case elfcpp::R_ARM_GOT_BREL
:
2209 case elfcpp::R_ARM_GOT_ABS
:
2210 case elfcpp::R_ARM_GOT_PREL
:
2211 case elfcpp::R_ARM_GOT_BREL12
:
2212 case elfcpp::R_ARM_PLT32_ABS
:
2213 case elfcpp::R_ARM_TLS_GD32
:
2214 case elfcpp::R_ARM_TLS_LDM32
:
2215 case elfcpp::R_ARM_TLS_IE32
:
2216 case elfcpp::R_ARM_TLS_IE12GP
:
2218 // These relocate types may use PLT entries.
2219 case elfcpp::R_ARM_CALL
:
2220 case elfcpp::R_ARM_THM_CALL
:
2221 case elfcpp::R_ARM_JUMP24
:
2222 case elfcpp::R_ARM_THM_JUMP24
:
2223 case elfcpp::R_ARM_THM_JUMP19
:
2224 case elfcpp::R_ARM_PLT32
:
2225 case elfcpp::R_ARM_THM_XPC22
:
2233 // Return whether we need to calculate the addressing origin of
2234 // the output segment defining the symbol - B(S).
2236 reloc_needs_sym_origin(unsigned int r_type
)
2240 case elfcpp::R_ARM_SBREL32
:
2241 case elfcpp::R_ARM_BASE_PREL
:
2242 case elfcpp::R_ARM_BASE_ABS
:
2243 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
2244 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
2245 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
2246 case elfcpp::R_ARM_SBREL31
:
2247 case elfcpp::R_ARM_ALU_SB_G0_NC
:
2248 case elfcpp::R_ARM_ALU_SB_G0
:
2249 case elfcpp::R_ARM_ALU_SB_G1_NC
:
2250 case elfcpp::R_ARM_ALU_SB_G1
:
2251 case elfcpp::R_ARM_ALU_SB_G2
:
2252 case elfcpp::R_ARM_LDR_SB_G0
:
2253 case elfcpp::R_ARM_LDR_SB_G1
:
2254 case elfcpp::R_ARM_LDR_SB_G2
:
2255 case elfcpp::R_ARM_LDRS_SB_G0
:
2256 case elfcpp::R_ARM_LDRS_SB_G1
:
2257 case elfcpp::R_ARM_LDRS_SB_G2
:
2258 case elfcpp::R_ARM_LDC_SB_G0
:
2259 case elfcpp::R_ARM_LDC_SB_G1
:
2260 case elfcpp::R_ARM_LDC_SB_G2
:
2261 case elfcpp::R_ARM_MOVW_BREL_NC
:
2262 case elfcpp::R_ARM_MOVT_BREL
:
2263 case elfcpp::R_ARM_MOVW_BREL
:
2264 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
2265 case elfcpp::R_ARM_THM_MOVT_BREL
:
2266 case elfcpp::R_ARM_THM_MOVW_BREL
:
2275 // A class which returns the size required for a relocation type,
2276 // used while scanning relocs during a relocatable link.
2277 class Relocatable_size_for_reloc
2281 get_size_for_reloc(unsigned int, Relobj
*);
2284 // Get the GOT section, creating it if necessary.
2285 Output_data_got
<32, big_endian
>*
2286 got_section(Symbol_table
*, Layout
*);
2288 // Get the GOT PLT section.
2290 got_plt_section() const
2292 gold_assert(this->got_plt_
!= NULL
);
2293 return this->got_plt_
;
2296 // Create a PLT entry for a global symbol.
2298 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2300 // Get the PLT section.
2301 const Output_data_plt_arm
<big_endian
>*
2304 gold_assert(this->plt_
!= NULL
);
2308 // Get the dynamic reloc section, creating it if necessary.
2310 rel_dyn_section(Layout
*);
2312 // Return true if the symbol may need a COPY relocation.
2313 // References from an executable object to non-function symbols
2314 // defined in a dynamic object may need a COPY relocation.
2316 may_need_copy_reloc(Symbol
* gsym
)
2318 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2319 && gsym
->may_need_copy_reloc());
2322 // Add a potential copy relocation.
2324 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2325 Sized_relobj
<32, big_endian
>* object
,
2326 unsigned int shndx
, Output_section
* output_section
,
2327 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2329 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2330 symtab
->get_sized_symbol
<32>(sym
),
2331 object
, shndx
, output_section
, reloc
,
2332 this->rel_dyn_section(layout
));
2335 // Whether two EABI versions are compatible.
2337 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2339 // Merge processor-specific flags from input object and those in the ELF
2340 // header of the output.
2342 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2344 // Get the secondary compatible architecture.
2346 get_secondary_compatible_arch(const Attributes_section_data
*);
2348 // Set the secondary compatible architecture.
2350 set_secondary_compatible_arch(Attributes_section_data
*, int);
2353 tag_cpu_arch_combine(const char*, int, int*, int, int);
2355 // Helper to print AEABI enum tag value.
2357 aeabi_enum_name(unsigned int);
2359 // Return string value for TAG_CPU_name.
2361 tag_cpu_name_value(unsigned int);
2363 // Merge object attributes from input object and those in the output.
2365 merge_object_attributes(const char*, const Attributes_section_data
*);
2367 // Helper to get an AEABI object attribute
2369 get_aeabi_object_attribute(int tag
) const
2371 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2372 gold_assert(pasd
!= NULL
);
2373 Object_attribute
* attr
=
2374 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2375 gold_assert(attr
!= NULL
);
2380 // Methods to support stub-generations.
2383 // Group input sections for stub generation.
2385 group_sections(Layout
*, section_size_type
, bool);
2387 // Scan a relocation for stub generation.
2389 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2390 const Sized_symbol
<32>*, unsigned int,
2391 const Symbol_value
<32>*,
2392 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2394 // Scan a relocation section for stub.
2395 template<int sh_type
>
2397 scan_reloc_section_for_stubs(
2398 const Relocate_info
<32, big_endian
>* relinfo
,
2399 const unsigned char* prelocs
,
2401 Output_section
* output_section
,
2402 bool needs_special_offset_handling
,
2403 const unsigned char* view
,
2404 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2407 // Fix .ARM.exidx section coverage.
2409 fix_exidx_coverage(Layout
*, Arm_output_section
<big_endian
>*, Symbol_table
*);
2411 // Functors for STL set.
2412 struct output_section_address_less_than
2415 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2416 { return s1
->address() < s2
->address(); }
2419 // Information about this specific target which we pass to the
2420 // general Target structure.
2421 static const Target::Target_info arm_info
;
2423 // The types of GOT entries needed for this platform.
2426 GOT_TYPE_STANDARD
= 0 // GOT entry for a regular symbol
2429 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2431 // Map input section to Arm_input_section.
2432 typedef Unordered_map
<Section_id
,
2433 Arm_input_section
<big_endian
>*,
2435 Arm_input_section_map
;
2437 // Map output addresses to relocs for Cortex-A8 erratum.
2438 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2439 Cortex_a8_relocs_info
;
2442 Output_data_got
<32, big_endian
>* got_
;
2444 Output_data_plt_arm
<big_endian
>* plt_
;
2445 // The GOT PLT section.
2446 Output_data_space
* got_plt_
;
2447 // The dynamic reloc section.
2448 Reloc_section
* rel_dyn_
;
2449 // Relocs saved to avoid a COPY reloc.
2450 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2451 // Space for variables copied with a COPY reloc.
2452 Output_data_space
* dynbss_
;
2453 // Vector of Stub_tables created.
2454 Stub_table_list stub_tables_
;
2456 const Stub_factory
&stub_factory_
;
2457 // Whether we can use BLX.
2459 // Whether we force PIC branch veneers.
2460 bool should_force_pic_veneer_
;
2461 // Map for locating Arm_input_sections.
2462 Arm_input_section_map arm_input_section_map_
;
2463 // Attributes section data in output.
2464 Attributes_section_data
* attributes_section_data_
;
2465 // Whether we want to fix code for Cortex-A8 erratum.
2466 bool fix_cortex_a8_
;
2467 // Map addresses to relocs for Cortex-A8 erratum.
2468 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2471 template<bool big_endian
>
2472 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2475 big_endian
, // is_big_endian
2476 elfcpp::EM_ARM
, // machine_code
2477 false, // has_make_symbol
2478 false, // has_resolve
2479 false, // has_code_fill
2480 true, // is_default_stack_executable
2482 "/usr/lib/libc.so.1", // dynamic_linker
2483 0x8000, // default_text_segment_address
2484 0x1000, // abi_pagesize (overridable by -z max-page-size)
2485 0x1000, // common_pagesize (overridable by -z common-page-size)
2486 elfcpp::SHN_UNDEF
, // small_common_shndx
2487 elfcpp::SHN_UNDEF
, // large_common_shndx
2488 0, // small_common_section_flags
2489 0, // large_common_section_flags
2490 ".ARM.attributes", // attributes_section
2491 "aeabi" // attributes_vendor
2494 // Arm relocate functions class
2497 template<bool big_endian
>
2498 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2503 STATUS_OKAY
, // No error during relocation.
2504 STATUS_OVERFLOW
, // Relocation oveflow.
2505 STATUS_BAD_RELOC
// Relocation cannot be applied.
2509 typedef Relocate_functions
<32, big_endian
> Base
;
2510 typedef Arm_relocate_functions
<big_endian
> This
;
2512 // Encoding of imm16 argument for movt and movw ARM instructions
2515 // imm16 := imm4 | imm12
2517 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2518 // +-------+---------------+-------+-------+-----------------------+
2519 // | | |imm4 | |imm12 |
2520 // +-------+---------------+-------+-------+-----------------------+
2522 // Extract the relocation addend from VAL based on the ARM
2523 // instruction encoding described above.
2524 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2525 extract_arm_movw_movt_addend(
2526 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2528 // According to the Elf ABI for ARM Architecture the immediate
2529 // field is sign-extended to form the addend.
2530 return utils::sign_extend
<16>(((val
>> 4) & 0xf000) | (val
& 0xfff));
2533 // Insert X into VAL based on the ARM instruction encoding described
2535 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2536 insert_val_arm_movw_movt(
2537 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2538 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2542 val
|= (x
& 0xf000) << 4;
2546 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2549 // imm16 := imm4 | i | imm3 | imm8
2551 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2552 // +---------+-+-----------+-------++-+-----+-------+---------------+
2553 // | |i| |imm4 || |imm3 | |imm8 |
2554 // +---------+-+-----------+-------++-+-----+-------+---------------+
2556 // Extract the relocation addend from VAL based on the Thumb2
2557 // instruction encoding described above.
2558 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2559 extract_thumb_movw_movt_addend(
2560 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2562 // According to the Elf ABI for ARM Architecture the immediate
2563 // field is sign-extended to form the addend.
2564 return utils::sign_extend
<16>(((val
>> 4) & 0xf000)
2565 | ((val
>> 15) & 0x0800)
2566 | ((val
>> 4) & 0x0700)
2570 // Insert X into VAL based on the Thumb2 instruction encoding
2572 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2573 insert_val_thumb_movw_movt(
2574 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2575 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2578 val
|= (x
& 0xf000) << 4;
2579 val
|= (x
& 0x0800) << 15;
2580 val
|= (x
& 0x0700) << 4;
2581 val
|= (x
& 0x00ff);
2585 // Calculate the smallest constant Kn for the specified residual.
2586 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2588 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
2594 // Determine the most significant bit in the residual and
2595 // align the resulting value to a 2-bit boundary.
2596 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
2598 // The desired shift is now (msb - 6), or zero, whichever
2600 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
2603 // Calculate the final residual for the specified group index.
2604 // If the passed group index is less than zero, the method will return
2605 // the value of the specified residual without any change.
2606 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2607 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2608 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2611 for (int n
= 0; n
<= group
; n
++)
2613 // Calculate which part of the value to mask.
2614 uint32_t shift
= calc_grp_kn(residual
);
2615 // Calculate the residual for the next time around.
2616 residual
&= ~(residual
& (0xff << shift
));
2622 // Calculate the value of Gn for the specified group index.
2623 // We return it in the form of an encoded constant-and-rotation.
2624 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
2625 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
2626 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
2629 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
2632 for (int n
= 0; n
<= group
; n
++)
2634 // Calculate which part of the value to mask.
2635 shift
= calc_grp_kn(residual
);
2636 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
2637 gn
= residual
& (0xff << shift
);
2638 // Calculate the residual for the next time around.
2641 // Return Gn in the form of an encoded constant-and-rotation.
2642 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
2645 // Handle ARM long branches.
2646 static typename
This::Status
2647 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2648 unsigned char *, const Sized_symbol
<32>*,
2649 const Arm_relobj
<big_endian
>*, unsigned int,
2650 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
2652 // Handle THUMB long branches.
2653 static typename
This::Status
2654 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
2655 unsigned char *, const Sized_symbol
<32>*,
2656 const Arm_relobj
<big_endian
>*, unsigned int,
2657 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
2661 // Return the branch offset of a 32-bit THUMB branch.
2662 static inline int32_t
2663 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
2665 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
2666 // involving the J1 and J2 bits.
2667 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
2668 uint32_t upper
= upper_insn
& 0x3ffU
;
2669 uint32_t lower
= lower_insn
& 0x7ffU
;
2670 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
2671 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
2672 uint32_t i1
= j1
^ s
? 0 : 1;
2673 uint32_t i2
= j2
^ s
? 0 : 1;
2675 return utils::sign_extend
<25>((s
<< 24) | (i1
<< 23) | (i2
<< 22)
2676 | (upper
<< 12) | (lower
<< 1));
2679 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
2680 // UPPER_INSN is the original upper instruction of the branch. Caller is
2681 // responsible for overflow checking and BLX offset adjustment.
2682 static inline uint16_t
2683 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
2685 uint32_t s
= offset
< 0 ? 1 : 0;
2686 uint32_t bits
= static_cast<uint32_t>(offset
);
2687 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
2690 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
2691 // LOWER_INSN is the original lower instruction of the branch. Caller is
2692 // responsible for overflow checking and BLX offset adjustment.
2693 static inline uint16_t
2694 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
2696 uint32_t s
= offset
< 0 ? 1 : 0;
2697 uint32_t bits
= static_cast<uint32_t>(offset
);
2698 return ((lower_insn
& ~0x2fffU
)
2699 | ((((bits
>> 23) & 1) ^ !s
) << 13)
2700 | ((((bits
>> 22) & 1) ^ !s
) << 11)
2701 | ((bits
>> 1) & 0x7ffU
));
2704 // Return the branch offset of a 32-bit THUMB conditional branch.
2705 static inline int32_t
2706 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
2708 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
2709 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
2710 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
2711 uint32_t lower
= (lower_insn
& 0x07ffU
);
2712 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
2714 return utils::sign_extend
<21>((upper
<< 12) | (lower
<< 1));
2717 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
2718 // instruction. UPPER_INSN is the original upper instruction of the branch.
2719 // Caller is responsible for overflow checking.
2720 static inline uint16_t
2721 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
2723 uint32_t s
= offset
< 0 ? 1 : 0;
2724 uint32_t bits
= static_cast<uint32_t>(offset
);
2725 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
2728 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
2729 // instruction. LOWER_INSN is the original lower instruction of the branch.
2730 // Caller is reponsible for overflow checking.
2731 static inline uint16_t
2732 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
2734 uint32_t bits
= static_cast<uint32_t>(offset
);
2735 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
2736 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
2737 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
2739 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
2742 // R_ARM_ABS8: S + A
2743 static inline typename
This::Status
2744 abs8(unsigned char *view
,
2745 const Sized_relobj
<32, big_endian
>* object
,
2746 const Symbol_value
<32>* psymval
)
2748 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
2749 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2750 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2751 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
2752 Reltype addend
= utils::sign_extend
<8>(val
);
2753 Reltype x
= psymval
->value(object
, addend
);
2754 val
= utils::bit_select(val
, x
, 0xffU
);
2755 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
2756 return (utils::has_signed_unsigned_overflow
<8>(x
)
2757 ? This::STATUS_OVERFLOW
2758 : This::STATUS_OKAY
);
2761 // R_ARM_THM_ABS5: S + A
2762 static inline typename
This::Status
2763 thm_abs5(unsigned char *view
,
2764 const Sized_relobj
<32, big_endian
>* object
,
2765 const Symbol_value
<32>* psymval
)
2767 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2768 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2769 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2770 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2771 Reltype addend
= (val
& 0x7e0U
) >> 6;
2772 Reltype x
= psymval
->value(object
, addend
);
2773 val
= utils::bit_select(val
, x
<< 6, 0x7e0U
);
2774 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2775 return (utils::has_overflow
<5>(x
)
2776 ? This::STATUS_OVERFLOW
2777 : This::STATUS_OKAY
);
2780 // R_ARM_ABS12: S + A
2781 static inline typename
This::Status
2782 abs12(unsigned char *view
,
2783 const Sized_relobj
<32, big_endian
>* object
,
2784 const Symbol_value
<32>* psymval
)
2786 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2787 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2788 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2789 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2790 Reltype addend
= val
& 0x0fffU
;
2791 Reltype x
= psymval
->value(object
, addend
);
2792 val
= utils::bit_select(val
, x
, 0x0fffU
);
2793 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
2794 return (utils::has_overflow
<12>(x
)
2795 ? This::STATUS_OVERFLOW
2796 : This::STATUS_OKAY
);
2799 // R_ARM_ABS16: S + A
2800 static inline typename
This::Status
2801 abs16(unsigned char *view
,
2802 const Sized_relobj
<32, big_endian
>* object
,
2803 const Symbol_value
<32>* psymval
)
2805 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2806 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
2807 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2808 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2809 Reltype addend
= utils::sign_extend
<16>(val
);
2810 Reltype x
= psymval
->value(object
, addend
);
2811 val
= utils::bit_select(val
, x
, 0xffffU
);
2812 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2813 return (utils::has_signed_unsigned_overflow
<16>(x
)
2814 ? This::STATUS_OVERFLOW
2815 : This::STATUS_OKAY
);
2818 // R_ARM_ABS32: (S + A) | T
2819 static inline typename
This::Status
2820 abs32(unsigned char *view
,
2821 const Sized_relobj
<32, big_endian
>* object
,
2822 const Symbol_value
<32>* psymval
,
2823 Arm_address thumb_bit
)
2825 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2826 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2827 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2828 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
2829 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
2830 return This::STATUS_OKAY
;
2833 // R_ARM_REL32: (S + A) | T - P
2834 static inline typename
This::Status
2835 rel32(unsigned char *view
,
2836 const Sized_relobj
<32, big_endian
>* object
,
2837 const Symbol_value
<32>* psymval
,
2838 Arm_address address
,
2839 Arm_address thumb_bit
)
2841 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
2842 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2843 Valtype addend
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
2844 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
2845 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
2846 return This::STATUS_OKAY
;
2849 // R_ARM_THM_CALL: (S + A) | T - P
2850 static inline typename
This::Status
2851 thm_call(const Relocate_info
<32, big_endian
>* relinfo
, unsigned char *view
,
2852 const Sized_symbol
<32>* gsym
, const Arm_relobj
<big_endian
>* object
,
2853 unsigned int r_sym
, const Symbol_value
<32>* psymval
,
2854 Arm_address address
, Arm_address thumb_bit
,
2855 bool is_weakly_undefined_without_plt
)
2857 return thumb_branch_common(elfcpp::R_ARM_THM_CALL
, relinfo
, view
, gsym
,
2858 object
, r_sym
, psymval
, address
, thumb_bit
,
2859 is_weakly_undefined_without_plt
);
2862 // R_ARM_THM_JUMP24: (S + A) | T - P
2863 static inline typename
This::Status
2864 thm_jump24(const Relocate_info
<32, big_endian
>* relinfo
, unsigned char *view
,
2865 const Sized_symbol
<32>* gsym
, const Arm_relobj
<big_endian
>* object
,
2866 unsigned int r_sym
, const Symbol_value
<32>* psymval
,
2867 Arm_address address
, Arm_address thumb_bit
,
2868 bool is_weakly_undefined_without_plt
)
2870 return thumb_branch_common(elfcpp::R_ARM_THM_JUMP24
, relinfo
, view
, gsym
,
2871 object
, r_sym
, psymval
, address
, thumb_bit
,
2872 is_weakly_undefined_without_plt
);
2875 // R_ARM_THM_JUMP24: (S + A) | T - P
2876 static typename
This::Status
2877 thm_jump19(unsigned char *view
, const Arm_relobj
<big_endian
>* object
,
2878 const Symbol_value
<32>* psymval
, Arm_address address
,
2879 Arm_address thumb_bit
);
2881 // R_ARM_THM_XPC22: (S + A) | T - P
2882 static inline typename
This::Status
2883 thm_xpc22(const Relocate_info
<32, big_endian
>* relinfo
, unsigned char *view
,
2884 const Sized_symbol
<32>* gsym
, const Arm_relobj
<big_endian
>* object
,
2885 unsigned int r_sym
, const Symbol_value
<32>* psymval
,
2886 Arm_address address
, Arm_address thumb_bit
,
2887 bool is_weakly_undefined_without_plt
)
2889 return thumb_branch_common(elfcpp::R_ARM_THM_XPC22
, relinfo
, view
, gsym
,
2890 object
, r_sym
, psymval
, address
, thumb_bit
,
2891 is_weakly_undefined_without_plt
);
2894 // R_ARM_THM_JUMP6: S + A – P
2895 static inline typename
This::Status
2896 thm_jump6(unsigned char *view
,
2897 const Sized_relobj
<32, big_endian
>* object
,
2898 const Symbol_value
<32>* psymval
,
2899 Arm_address address
)
2901 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2902 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2903 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2904 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2905 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
2906 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
2907 Reltype x
= (psymval
->value(object
, addend
) - address
);
2908 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
2909 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
2910 // CZB does only forward jumps.
2911 return ((x
> 0x007e)
2912 ? This::STATUS_OVERFLOW
2913 : This::STATUS_OKAY
);
2916 // R_ARM_THM_JUMP8: S + A – P
2917 static inline typename
This::Status
2918 thm_jump8(unsigned char *view
,
2919 const Sized_relobj
<32, big_endian
>* object
,
2920 const Symbol_value
<32>* psymval
,
2921 Arm_address address
)
2923 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2924 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2925 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2926 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2927 Reltype addend
= utils::sign_extend
<8>((val
& 0x00ff) << 1);
2928 Reltype x
= (psymval
->value(object
, addend
) - address
);
2929 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xff00) | ((x
& 0x01fe) >> 1));
2930 return (utils::has_overflow
<8>(x
)
2931 ? This::STATUS_OVERFLOW
2932 : This::STATUS_OKAY
);
2935 // R_ARM_THM_JUMP11: S + A – P
2936 static inline typename
This::Status
2937 thm_jump11(unsigned char *view
,
2938 const Sized_relobj
<32, big_endian
>* object
,
2939 const Symbol_value
<32>* psymval
,
2940 Arm_address address
)
2942 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
2943 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
2944 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
2945 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
2946 Reltype addend
= utils::sign_extend
<11>((val
& 0x07ff) << 1);
2947 Reltype x
= (psymval
->value(object
, addend
) - address
);
2948 elfcpp::Swap
<16, big_endian
>::writeval(wv
, (val
& 0xf800) | ((x
& 0x0ffe) >> 1));
2949 return (utils::has_overflow
<11>(x
)
2950 ? This::STATUS_OVERFLOW
2951 : This::STATUS_OKAY
);
2954 // R_ARM_BASE_PREL: B(S) + A - P
2955 static inline typename
This::Status
2956 base_prel(unsigned char* view
,
2958 Arm_address address
)
2960 Base::rel32(view
, origin
- address
);
2964 // R_ARM_BASE_ABS: B(S) + A
2965 static inline typename
This::Status
2966 base_abs(unsigned char* view
,
2969 Base::rel32(view
, origin
);
2973 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
2974 static inline typename
This::Status
2975 got_brel(unsigned char* view
,
2976 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
2978 Base::rel32(view
, got_offset
);
2979 return This::STATUS_OKAY
;
2982 // R_ARM_GOT_PREL: GOT(S) + A - P
2983 static inline typename
This::Status
2984 got_prel(unsigned char *view
,
2985 Arm_address got_entry
,
2986 Arm_address address
)
2988 Base::rel32(view
, got_entry
- address
);
2989 return This::STATUS_OKAY
;
2992 // R_ARM_PLT32: (S + A) | T - P
2993 static inline typename
This::Status
2994 plt32(const Relocate_info
<32, big_endian
>* relinfo
,
2995 unsigned char *view
,
2996 const Sized_symbol
<32>* gsym
,
2997 const Arm_relobj
<big_endian
>* object
,
2999 const Symbol_value
<32>* psymval
,
3000 Arm_address address
,
3001 Arm_address thumb_bit
,
3002 bool is_weakly_undefined_without_plt
)
3004 return arm_branch_common(elfcpp::R_ARM_PLT32
, relinfo
, view
, gsym
,
3005 object
, r_sym
, psymval
, address
, thumb_bit
,
3006 is_weakly_undefined_without_plt
);
3009 // R_ARM_XPC25: (S + A) | T - P
3010 static inline typename
This::Status
3011 xpc25(const Relocate_info
<32, big_endian
>* relinfo
,
3012 unsigned char *view
,
3013 const Sized_symbol
<32>* gsym
,
3014 const Arm_relobj
<big_endian
>* object
,
3016 const Symbol_value
<32>* psymval
,
3017 Arm_address address
,
3018 Arm_address thumb_bit
,
3019 bool is_weakly_undefined_without_plt
)
3021 return arm_branch_common(elfcpp::R_ARM_XPC25
, relinfo
, view
, gsym
,
3022 object
, r_sym
, psymval
, address
, thumb_bit
,
3023 is_weakly_undefined_without_plt
);
3026 // R_ARM_CALL: (S + A) | T - P
3027 static inline typename
This::Status
3028 call(const Relocate_info
<32, big_endian
>* relinfo
,
3029 unsigned char *view
,
3030 const Sized_symbol
<32>* gsym
,
3031 const Arm_relobj
<big_endian
>* object
,
3033 const Symbol_value
<32>* psymval
,
3034 Arm_address address
,
3035 Arm_address thumb_bit
,
3036 bool is_weakly_undefined_without_plt
)
3038 return arm_branch_common(elfcpp::R_ARM_CALL
, relinfo
, view
, gsym
,
3039 object
, r_sym
, psymval
, address
, thumb_bit
,
3040 is_weakly_undefined_without_plt
);
3043 // R_ARM_JUMP24: (S + A) | T - P
3044 static inline typename
This::Status
3045 jump24(const Relocate_info
<32, big_endian
>* relinfo
,
3046 unsigned char *view
,
3047 const Sized_symbol
<32>* gsym
,
3048 const Arm_relobj
<big_endian
>* object
,
3050 const Symbol_value
<32>* psymval
,
3051 Arm_address address
,
3052 Arm_address thumb_bit
,
3053 bool is_weakly_undefined_without_plt
)
3055 return arm_branch_common(elfcpp::R_ARM_JUMP24
, relinfo
, view
, gsym
,
3056 object
, r_sym
, psymval
, address
, thumb_bit
,
3057 is_weakly_undefined_without_plt
);
3060 // R_ARM_PREL: (S + A) | T - P
3061 static inline typename
This::Status
3062 prel31(unsigned char *view
,
3063 const Sized_relobj
<32, big_endian
>* object
,
3064 const Symbol_value
<32>* psymval
,
3065 Arm_address address
,
3066 Arm_address thumb_bit
)
3068 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3069 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3070 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3071 Valtype addend
= utils::sign_extend
<31>(val
);
3072 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3073 val
= utils::bit_select(val
, x
, 0x7fffffffU
);
3074 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3075 return (utils::has_overflow
<31>(x
) ?
3076 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3079 // R_ARM_MOVW_ABS_NC: (S + A) | T
3080 static inline typename
This::Status
3081 movw_abs_nc(unsigned char *view
,
3082 const Sized_relobj
<32, big_endian
>* object
,
3083 const Symbol_value
<32>* psymval
,
3084 Arm_address thumb_bit
)
3086 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3087 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3088 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3089 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3090 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3091 val
= This::insert_val_arm_movw_movt(val
, x
);
3092 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3093 return This::STATUS_OKAY
;
3096 // R_ARM_MOVT_ABS: S + A
3097 static inline typename
This::Status
3098 movt_abs(unsigned char *view
,
3099 const Sized_relobj
<32, big_endian
>* object
,
3100 const Symbol_value
<32>* psymval
)
3102 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3103 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3104 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3105 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3106 Valtype x
= psymval
->value(object
, addend
) >> 16;
3107 val
= This::insert_val_arm_movw_movt(val
, x
);
3108 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3109 return This::STATUS_OKAY
;
3112 // R_ARM_THM_MOVW_ABS_NC: S + A | T
3113 static inline typename
This::Status
3114 thm_movw_abs_nc(unsigned char *view
,
3115 const Sized_relobj
<32, big_endian
>* object
,
3116 const Symbol_value
<32>* psymval
,
3117 Arm_address thumb_bit
)
3119 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3120 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3121 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3122 Reltype val
= ((elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3123 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1));
3124 Reltype addend
= extract_thumb_movw_movt_addend(val
);
3125 Reltype x
= psymval
->value(object
, addend
) | thumb_bit
;
3126 val
= This::insert_val_thumb_movw_movt(val
, x
);
3127 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3128 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3129 return This::STATUS_OKAY
;
3132 // R_ARM_THM_MOVT_ABS: S + A
3133 static inline typename
This::Status
3134 thm_movt_abs(unsigned char *view
,
3135 const Sized_relobj
<32, big_endian
>* object
,
3136 const Symbol_value
<32>* psymval
)
3138 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3139 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3140 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3141 Reltype val
= ((elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3142 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1));
3143 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3144 Reltype x
= psymval
->value(object
, addend
) >> 16;
3145 val
= This::insert_val_thumb_movw_movt(val
, x
);
3146 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3147 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3148 return This::STATUS_OKAY
;
3151 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3152 // R_ARM_MOVW_BREL_NC: ((S + A) | T) – B(S)
3153 static inline typename
This::Status
3154 movw_rel_nc(unsigned char* view
,
3155 const Sized_relobj
<32, big_endian
>* object
,
3156 const Symbol_value
<32>* psymval
,
3157 Arm_address address
,
3158 Arm_address thumb_bit
)
3160 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3161 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3162 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3163 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3164 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3165 val
= This::insert_val_arm_movw_movt(val
, x
);
3166 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3167 return This::STATUS_OKAY
;
3170 // R_ARM_MOVW_BREL: ((S + A) | T) – B(S)
3171 static inline typename
This::Status
3172 movw_rel(unsigned char* view
,
3173 const Sized_relobj
<32, big_endian
>* object
,
3174 const Symbol_value
<32>* psymval
,
3175 Arm_address address
,
3176 Arm_address thumb_bit
)
3178 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3179 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3180 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3181 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3182 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3183 val
= This::insert_val_arm_movw_movt(val
, x
);
3184 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3185 return ((x
>= 0x10000) ?
3186 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3189 // R_ARM_MOVT_PREL: S + A - P
3190 // R_ARM_MOVT_BREL: S + A – B(S)
3191 static inline typename
This::Status
3192 movt_rel(unsigned char* view
,
3193 const Sized_relobj
<32, big_endian
>* object
,
3194 const Symbol_value
<32>* psymval
,
3195 Arm_address address
)
3197 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3198 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3199 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3200 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3201 Valtype x
= (psymval
->value(object
, addend
) - address
) >> 16;
3202 val
= This::insert_val_arm_movw_movt(val
, x
);
3203 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3204 return This::STATUS_OKAY
;
3207 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3208 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) – B(S)
3209 static inline typename
This::Status
3210 thm_movw_rel_nc(unsigned char *view
,
3211 const Sized_relobj
<32, big_endian
>* object
,
3212 const Symbol_value
<32>* psymval
,
3213 Arm_address address
,
3214 Arm_address thumb_bit
)
3216 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3217 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3218 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3219 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3220 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3221 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3222 Reltype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3223 val
= This::insert_val_thumb_movw_movt(val
, x
);
3224 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3225 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3226 return This::STATUS_OKAY
;
3229 // R_ARM_THM_MOVW_BREL: ((S + A) | T) – B(S)
3230 static inline typename
This::Status
3231 thm_movw_rel(unsigned char *view
,
3232 const Sized_relobj
<32, big_endian
>* object
,
3233 const Symbol_value
<32>* psymval
,
3234 Arm_address address
,
3235 Arm_address thumb_bit
)
3237 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3238 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3239 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3240 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3241 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3242 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3243 Reltype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3244 val
= This::insert_val_thumb_movw_movt(val
, x
);
3245 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3246 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3247 return ((x
>= 0x10000) ?
3248 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3251 // R_ARM_THM_MOVT_PREL: S + A - P
3252 // R_ARM_THM_MOVT_BREL: S + A – B(S)
3253 static inline typename
This::Status
3254 thm_movt_rel(unsigned char* view
,
3255 const Sized_relobj
<32, big_endian
>* object
,
3256 const Symbol_value
<32>* psymval
,
3257 Arm_address address
)
3259 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3260 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3261 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3262 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3263 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3264 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3265 Reltype x
= (psymval
->value(object
, addend
) - address
) >> 16;
3266 val
= This::insert_val_thumb_movw_movt(val
, x
);
3267 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3268 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3269 return This::STATUS_OKAY
;
3273 static inline typename
This::Status
3274 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3275 unsigned char *view
,
3276 const Arm_relobj
<big_endian
>* object
,
3277 const Arm_address address
,
3278 const bool is_interworking
)
3281 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3282 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3283 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3285 // Ensure that we have a BX instruction.
3286 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3287 const uint32_t reg
= (val
& 0xf);
3288 if (is_interworking
&& reg
!= 0xf)
3290 Stub_table
<big_endian
>* stub_table
=
3291 object
->stub_table(relinfo
->data_shndx
);
3292 gold_assert(stub_table
!= NULL
);
3294 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3295 gold_assert(stub
!= NULL
);
3297 int32_t veneer_address
=
3298 stub_table
->address() + stub
->offset() - 8 - address
;
3299 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3300 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3301 // Replace with a branch to veneer (B <addr>)
3302 val
= (val
& 0xf0000000) | 0x0a000000
3303 | ((veneer_address
>> 2) & 0x00ffffff);
3307 // Preserve Rm (lowest four bits) and the condition code
3308 // (highest four bits). Other bits encode MOV PC,Rm.
3309 val
= (val
& 0xf000000f) | 0x01a0f000;
3311 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3312 return This::STATUS_OKAY
;
3315 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3316 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3317 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3318 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3319 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3320 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3321 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3322 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3323 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3324 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3325 static inline typename
This::Status
3326 arm_grp_alu(unsigned char* view
,
3327 const Sized_relobj
<32, big_endian
>* object
,
3328 const Symbol_value
<32>* psymval
,
3330 Arm_address address
,
3331 Arm_address thumb_bit
,
3332 bool check_overflow
)
3334 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3335 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3336 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3338 // ALU group relocations are allowed only for the ADD/SUB instructions.
3339 // (0x00800000 - ADD, 0x00400000 - SUB)
3340 const Valtype opcode
= insn
& 0x01e00000;
3341 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3342 return This::STATUS_BAD_RELOC
;
3344 // Determine a sign for the addend.
3345 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3346 // shifter = rotate_imm * 2
3347 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3348 // Initial addend value.
3349 int32_t addend
= insn
& 0xff;
3350 // Rotate addend right by shifter.
3351 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3352 // Apply a sign to the added.
3355 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3356 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3357 // Check for overflow if required
3359 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3360 return This::STATUS_OVERFLOW
;
3362 // Mask out the value and the ADD/SUB part of the opcode; take care
3363 // not to destroy the S bit.
3365 // Set the opcode according to whether the value to go in the
3366 // place is negative.
3367 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3368 // Encode the offset (encoded Gn).
3371 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3372 return This::STATUS_OKAY
;
3375 // R_ARM_LDR_PC_G0: S + A - P
3376 // R_ARM_LDR_PC_G1: S + A - P
3377 // R_ARM_LDR_PC_G2: S + A - P
3378 // R_ARM_LDR_SB_G0: S + A - B(S)
3379 // R_ARM_LDR_SB_G1: S + A - B(S)
3380 // R_ARM_LDR_SB_G2: S + A - B(S)
3381 static inline typename
This::Status
3382 arm_grp_ldr(unsigned char* view
,
3383 const Sized_relobj
<32, big_endian
>* object
,
3384 const Symbol_value
<32>* psymval
,
3386 Arm_address address
)
3388 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3389 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3390 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3392 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3393 int32_t addend
= (insn
& 0xfff) * sign
;
3394 int32_t x
= (psymval
->value(object
, addend
) - address
);
3395 // Calculate the relevant G(n-1) value to obtain this stage residual.
3397 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3398 if (residual
>= 0x1000)
3399 return This::STATUS_OVERFLOW
;
3401 // Mask out the value and U bit.
3403 // Set the U bit for non-negative values.
3408 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3409 return This::STATUS_OKAY
;
3412 // R_ARM_LDRS_PC_G0: S + A - P
3413 // R_ARM_LDRS_PC_G1: S + A - P
3414 // R_ARM_LDRS_PC_G2: S + A - P
3415 // R_ARM_LDRS_SB_G0: S + A - B(S)
3416 // R_ARM_LDRS_SB_G1: S + A - B(S)
3417 // R_ARM_LDRS_SB_G2: S + A - B(S)
3418 static inline typename
This::Status
3419 arm_grp_ldrs(unsigned char* view
,
3420 const Sized_relobj
<32, big_endian
>* object
,
3421 const Symbol_value
<32>* psymval
,
3423 Arm_address address
)
3425 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3426 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3427 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3429 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3430 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3431 int32_t x
= (psymval
->value(object
, addend
) - address
);
3432 // Calculate the relevant G(n-1) value to obtain this stage residual.
3434 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3435 if (residual
>= 0x100)
3436 return This::STATUS_OVERFLOW
;
3438 // Mask out the value and U bit.
3440 // Set the U bit for non-negative values.
3443 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3445 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3446 return This::STATUS_OKAY
;
3449 // R_ARM_LDC_PC_G0: S + A - P
3450 // R_ARM_LDC_PC_G1: S + A - P
3451 // R_ARM_LDC_PC_G2: S + A - P
3452 // R_ARM_LDC_SB_G0: S + A - B(S)
3453 // R_ARM_LDC_SB_G1: S + A - B(S)
3454 // R_ARM_LDC_SB_G2: S + A - B(S)
3455 static inline typename
This::Status
3456 arm_grp_ldc(unsigned char* view
,
3457 const Sized_relobj
<32, big_endian
>* object
,
3458 const Symbol_value
<32>* psymval
,
3460 Arm_address address
)
3462 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3463 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3464 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3466 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3467 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3468 int32_t x
= (psymval
->value(object
, addend
) - address
);
3469 // Calculate the relevant G(n-1) value to obtain this stage residual.
3471 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3472 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3473 return This::STATUS_OVERFLOW
;
3475 // Mask out the value and U bit.
3477 // Set the U bit for non-negative values.
3480 insn
|= (residual
>> 2);
3482 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3483 return This::STATUS_OKAY
;
3487 // Relocate ARM long branches. This handles relocation types
3488 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3489 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3490 // undefined and we do not use PLT in this relocation. In such a case,
3491 // the branch is converted into an NOP.
3493 template<bool big_endian
>
3494 typename Arm_relocate_functions
<big_endian
>::Status
3495 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3496 unsigned int r_type
,
3497 const Relocate_info
<32, big_endian
>* relinfo
,
3498 unsigned char *view
,
3499 const Sized_symbol
<32>* gsym
,
3500 const Arm_relobj
<big_endian
>* object
,
3502 const Symbol_value
<32>* psymval
,
3503 Arm_address address
,
3504 Arm_address thumb_bit
,
3505 bool is_weakly_undefined_without_plt
)
3507 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3508 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3509 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3511 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3512 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3513 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3514 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3515 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3516 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3517 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3519 // Check that the instruction is valid.
3520 if (r_type
== elfcpp::R_ARM_CALL
)
3522 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3523 return This::STATUS_BAD_RELOC
;
3525 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3527 if (!insn_is_b
&& !insn_is_cond_bl
)
3528 return This::STATUS_BAD_RELOC
;
3530 else if (r_type
== elfcpp::R_ARM_PLT32
)
3532 if (!insn_is_any_branch
)
3533 return This::STATUS_BAD_RELOC
;
3535 else if (r_type
== elfcpp::R_ARM_XPC25
)
3537 // FIXME: AAELF document IH0044C does not say much about it other
3538 // than it being obsolete.
3539 if (!insn_is_any_branch
)
3540 return This::STATUS_BAD_RELOC
;
3545 // A branch to an undefined weak symbol is turned into a jump to
3546 // the next instruction unless a PLT entry will be created.
3547 // Do the same for local undefined symbols.
3548 // The jump to the next instruction is optimized as a NOP depending
3549 // on the architecture.
3550 const Target_arm
<big_endian
>* arm_target
=
3551 Target_arm
<big_endian
>::default_target();
3552 if (is_weakly_undefined_without_plt
)
3554 Valtype cond
= val
& 0xf0000000U
;
3555 if (arm_target
->may_use_arm_nop())
3556 val
= cond
| 0x0320f000;
3558 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3559 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3560 return This::STATUS_OKAY
;
3563 Valtype addend
= utils::sign_extend
<26>(val
<< 2);
3564 Valtype branch_target
= psymval
->value(object
, addend
);
3565 int32_t branch_offset
= branch_target
- address
;
3567 // We need a stub if the branch offset is too large or if we need
3569 bool may_use_blx
= arm_target
->may_use_blx();
3570 Reloc_stub
* stub
= NULL
;
3571 if ((branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
)
3572 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
3573 || ((thumb_bit
!= 0) && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
)))
3575 Stub_type stub_type
=
3576 Reloc_stub::stub_type_for_reloc(r_type
, address
, branch_target
,
3578 if (stub_type
!= arm_stub_none
)
3580 Stub_table
<big_endian
>* stub_table
=
3581 object
->stub_table(relinfo
->data_shndx
);
3582 gold_assert(stub_table
!= NULL
);
3584 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3585 stub
= stub_table
->find_reloc_stub(stub_key
);
3586 gold_assert(stub
!= NULL
);
3587 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3588 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3589 branch_offset
= branch_target
- address
;
3590 gold_assert((branch_offset
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3591 && (branch_offset
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3595 // At this point, if we still need to switch mode, the instruction
3596 // must either be a BLX or a BL that can be converted to a BLX.
3600 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3601 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3604 val
= utils::bit_select(val
, (branch_offset
>> 2), 0xffffffUL
);
3605 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3606 return (utils::has_overflow
<26>(branch_offset
)
3607 ? This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3610 // Relocate THUMB long branches. This handles relocation types
3611 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3612 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3613 // undefined and we do not use PLT in this relocation. In such a case,
3614 // the branch is converted into an NOP.
3616 template<bool big_endian
>
3617 typename Arm_relocate_functions
<big_endian
>::Status
3618 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3619 unsigned int r_type
,
3620 const Relocate_info
<32, big_endian
>* relinfo
,
3621 unsigned char *view
,
3622 const Sized_symbol
<32>* gsym
,
3623 const Arm_relobj
<big_endian
>* object
,
3625 const Symbol_value
<32>* psymval
,
3626 Arm_address address
,
3627 Arm_address thumb_bit
,
3628 bool is_weakly_undefined_without_plt
)
3630 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3631 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3632 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3633 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3635 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3637 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3638 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3640 // Check that the instruction is valid.
3641 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3643 if (!is_bl_insn
&& !is_blx_insn
)
3644 return This::STATUS_BAD_RELOC
;
3646 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3648 // This cannot be a BLX.
3650 return This::STATUS_BAD_RELOC
;
3652 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
3654 // Check for Thumb to Thumb call.
3656 return This::STATUS_BAD_RELOC
;
3659 gold_warning(_("%s: Thumb BLX instruction targets "
3660 "thumb function '%s'."),
3661 object
->name().c_str(),
3662 (gsym
? gsym
->name() : "(local)"));
3663 // Convert BLX to BL.
3664 lower_insn
|= 0x1000U
;
3670 // A branch to an undefined weak symbol is turned into a jump to
3671 // the next instruction unless a PLT entry will be created.
3672 // The jump to the next instruction is optimized as a NOP.W for
3673 // Thumb-2 enabled architectures.
3674 const Target_arm
<big_endian
>* arm_target
=
3675 Target_arm
<big_endian
>::default_target();
3676 if (is_weakly_undefined_without_plt
)
3678 if (arm_target
->may_use_thumb2_nop())
3680 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
3681 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
3685 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
3686 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
3688 return This::STATUS_OKAY
;
3691 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
3692 Arm_address branch_target
= psymval
->value(object
, addend
);
3693 int32_t branch_offset
= branch_target
- address
;
3695 // We need a stub if the branch offset is too large or if we need
3697 bool may_use_blx
= arm_target
->may_use_blx();
3698 bool thumb2
= arm_target
->using_thumb2();
3700 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3701 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3703 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3704 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3705 || ((thumb_bit
== 0)
3706 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
3707 || r_type
== elfcpp::R_ARM_THM_JUMP24
)))
3709 Stub_type stub_type
=
3710 Reloc_stub::stub_type_for_reloc(r_type
, address
, branch_target
,
3712 if (stub_type
!= arm_stub_none
)
3714 Stub_table
<big_endian
>* stub_table
=
3715 object
->stub_table(relinfo
->data_shndx
);
3716 gold_assert(stub_table
!= NULL
);
3718 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3719 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
3720 gold_assert(stub
!= NULL
);
3721 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3722 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3723 branch_offset
= branch_target
- address
;
3727 // At this point, if we still need to switch mode, the instruction
3728 // must either be a BLX or a BL that can be converted to a BLX.
3731 gold_assert(may_use_blx
3732 && (r_type
== elfcpp::R_ARM_THM_CALL
3733 || r_type
== elfcpp::R_ARM_THM_XPC22
));
3734 // Make sure this is a BLX.
3735 lower_insn
&= ~0x1000U
;
3739 // Make sure this is a BL.
3740 lower_insn
|= 0x1000U
;
3743 if ((lower_insn
& 0x5000U
) == 0x4000U
)
3744 // For a BLX instruction, make sure that the relocation is rounded up
3745 // to a word boundary. This follows the semantics of the instruction
3746 // which specifies that bit 1 of the target address will come from bit
3747 // 1 of the base address.
3748 branch_offset
= (branch_offset
+ 2) & ~3;
3750 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
3751 // We use the Thumb-2 encoding, which is safe even if dealing with
3752 // a Thumb-1 instruction by virtue of our overflow check above. */
3753 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
3754 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
3756 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
3757 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
3760 ? utils::has_overflow
<25>(branch_offset
)
3761 : utils::has_overflow
<23>(branch_offset
))
3762 ? This::STATUS_OVERFLOW
3763 : This::STATUS_OKAY
);
3766 // Relocate THUMB-2 long conditional branches.
3767 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3768 // undefined and we do not use PLT in this relocation. In such a case,
3769 // the branch is converted into an NOP.
3771 template<bool big_endian
>
3772 typename Arm_relocate_functions
<big_endian
>::Status
3773 Arm_relocate_functions
<big_endian
>::thm_jump19(
3774 unsigned char *view
,
3775 const Arm_relobj
<big_endian
>* object
,
3776 const Symbol_value
<32>* psymval
,
3777 Arm_address address
,
3778 Arm_address thumb_bit
)
3780 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3781 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3782 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3783 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3784 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
3786 Arm_address branch_target
= psymval
->value(object
, addend
);
3787 int32_t branch_offset
= branch_target
- address
;
3789 // ??? Should handle interworking? GCC might someday try to
3790 // use this for tail calls.
3791 // FIXME: We do support thumb entry to PLT yet.
3794 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
3795 return This::STATUS_BAD_RELOC
;
3798 // Put RELOCATION back into the insn.
3799 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
3800 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
3802 // Put the relocated value back in the object file:
3803 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
3804 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
3806 return (utils::has_overflow
<21>(branch_offset
)
3807 ? This::STATUS_OVERFLOW
3808 : This::STATUS_OKAY
);
3811 // Get the GOT section, creating it if necessary.
3813 template<bool big_endian
>
3814 Output_data_got
<32, big_endian
>*
3815 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
3817 if (this->got_
== NULL
)
3819 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
3821 this->got_
= new Output_data_got
<32, big_endian
>();
3824 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
3826 | elfcpp::SHF_WRITE
),
3827 this->got_
, false, true, true,
3830 // The old GNU linker creates a .got.plt section. We just
3831 // create another set of data in the .got section. Note that we
3832 // always create a PLT if we create a GOT, although the PLT
3834 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
3835 os
= layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
3837 | elfcpp::SHF_WRITE
),
3838 this->got_plt_
, false, false,
3841 // The first three entries are reserved.
3842 this->got_plt_
->set_current_data_size(3 * 4);
3844 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
3845 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
3846 Symbol_table::PREDEFINED
,
3848 0, 0, elfcpp::STT_OBJECT
,
3850 elfcpp::STV_HIDDEN
, 0,
3856 // Get the dynamic reloc section, creating it if necessary.
3858 template<bool big_endian
>
3859 typename Target_arm
<big_endian
>::Reloc_section
*
3860 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
3862 if (this->rel_dyn_
== NULL
)
3864 gold_assert(layout
!= NULL
);
3865 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
3866 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
3867 elfcpp::SHF_ALLOC
, this->rel_dyn_
, true,
3868 false, false, false);
3870 return this->rel_dyn_
;
3873 // Insn_template methods.
3875 // Return byte size of an instruction template.
3878 Insn_template::size() const
3880 switch (this->type())
3883 case THUMB16_SPECIAL_TYPE
:
3894 // Return alignment of an instruction template.
3897 Insn_template::alignment() const
3899 switch (this->type())
3902 case THUMB16_SPECIAL_TYPE
:
3913 // Stub_template methods.
3915 Stub_template::Stub_template(
3916 Stub_type type
, const Insn_template
* insns
,
3918 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
3919 entry_in_thumb_mode_(false), relocs_()
3923 // Compute byte size and alignment of stub template.
3924 for (size_t i
= 0; i
< insn_count
; i
++)
3926 unsigned insn_alignment
= insns
[i
].alignment();
3927 size_t insn_size
= insns
[i
].size();
3928 gold_assert((offset
& (insn_alignment
- 1)) == 0);
3929 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
3930 switch (insns
[i
].type())
3932 case Insn_template::THUMB16_TYPE
:
3933 case Insn_template::THUMB16_SPECIAL_TYPE
:
3935 this->entry_in_thumb_mode_
= true;
3938 case Insn_template::THUMB32_TYPE
:
3939 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
3940 this->relocs_
.push_back(Reloc(i
, offset
));
3942 this->entry_in_thumb_mode_
= true;
3945 case Insn_template::ARM_TYPE
:
3946 // Handle cases where the target is encoded within the
3948 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
3949 this->relocs_
.push_back(Reloc(i
, offset
));
3952 case Insn_template::DATA_TYPE
:
3953 // Entry point cannot be data.
3954 gold_assert(i
!= 0);
3955 this->relocs_
.push_back(Reloc(i
, offset
));
3961 offset
+= insn_size
;
3963 this->size_
= offset
;
3968 // Template to implement do_write for a specific target endianity.
3970 template<bool big_endian
>
3972 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
3974 const Stub_template
* stub_template
= this->stub_template();
3975 const Insn_template
* insns
= stub_template
->insns();
3977 // FIXME: We do not handle BE8 encoding yet.
3978 unsigned char* pov
= view
;
3979 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
3981 switch (insns
[i
].type())
3983 case Insn_template::THUMB16_TYPE
:
3984 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
3986 case Insn_template::THUMB16_SPECIAL_TYPE
:
3987 elfcpp::Swap
<16, big_endian
>::writeval(
3989 this->thumb16_special(i
));
3991 case Insn_template::THUMB32_TYPE
:
3993 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
3994 uint32_t lo
= insns
[i
].data() & 0xffff;
3995 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
3996 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
3999 case Insn_template::ARM_TYPE
:
4000 case Insn_template::DATA_TYPE
:
4001 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4006 pov
+= insns
[i
].size();
4008 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4011 // Reloc_stub::Key methods.
4013 // Dump a Key as a string for debugging.
4016 Reloc_stub::Key::name() const
4018 if (this->r_sym_
== invalid_index
)
4020 // Global symbol key name
4021 // <stub-type>:<symbol name>:<addend>.
4022 const std::string sym_name
= this->u_
.symbol
->name();
4023 // We need to print two hex number and two colons. So just add 100 bytes
4024 // to the symbol name size.
4025 size_t len
= sym_name
.size() + 100;
4026 char* buffer
= new char[len
];
4027 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4028 sym_name
.c_str(), this->addend_
);
4029 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4031 return std::string(buffer
);
4035 // local symbol key name
4036 // <stub-type>:<object>:<r_sym>:<addend>.
4037 const size_t len
= 200;
4039 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4040 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4041 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4042 return std::string(buffer
);
4046 // Reloc_stub methods.
4048 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4049 // LOCATION to DESTINATION.
4050 // This code is based on the arm_type_of_stub function in
4051 // bfd/elf32-arm.c. We have changed the interface a liitle to keep the Stub
4055 Reloc_stub::stub_type_for_reloc(
4056 unsigned int r_type
,
4057 Arm_address location
,
4058 Arm_address destination
,
4059 bool target_is_thumb
)
4061 Stub_type stub_type
= arm_stub_none
;
4063 // This is a bit ugly but we want to avoid using a templated class for
4064 // big and little endianities.
4066 bool should_force_pic_veneer
;
4069 if (parameters
->target().is_big_endian())
4071 const Target_arm
<true>* big_endian_target
=
4072 Target_arm
<true>::default_target();
4073 may_use_blx
= big_endian_target
->may_use_blx();
4074 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4075 thumb2
= big_endian_target
->using_thumb2();
4076 thumb_only
= big_endian_target
->using_thumb_only();
4080 const Target_arm
<false>* little_endian_target
=
4081 Target_arm
<false>::default_target();
4082 may_use_blx
= little_endian_target
->may_use_blx();
4083 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4084 thumb2
= little_endian_target
->using_thumb2();
4085 thumb_only
= little_endian_target
->using_thumb_only();
4088 int64_t branch_offset
= (int64_t)destination
- location
;
4090 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4092 // Handle cases where:
4093 // - this call goes too far (different Thumb/Thumb2 max
4095 // - it's a Thumb->Arm call and blx is not available, or it's a
4096 // Thumb->Arm branch (not bl). A stub is needed in this case.
4098 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4099 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4101 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4102 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4103 || ((!target_is_thumb
)
4104 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4105 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4107 if (target_is_thumb
)
4112 stub_type
= (parameters
->options().shared()
4113 || should_force_pic_veneer
)
4116 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4117 // V5T and above. Stub starts with ARM code, so
4118 // we must be able to switch mode before
4119 // reaching it, which is only possible for 'bl'
4120 // (ie R_ARM_THM_CALL relocation).
4121 ? arm_stub_long_branch_any_thumb_pic
4122 // On V4T, use Thumb code only.
4123 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4127 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4128 ? arm_stub_long_branch_any_any
// V5T and above.
4129 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4133 stub_type
= (parameters
->options().shared()
4134 || should_force_pic_veneer
)
4135 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4136 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4143 // FIXME: We should check that the input section is from an
4144 // object that has interwork enabled.
4146 stub_type
= (parameters
->options().shared()
4147 || should_force_pic_veneer
)
4150 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4151 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4152 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4156 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4157 ? arm_stub_long_branch_any_any
// V5T and above.
4158 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4160 // Handle v4t short branches.
4161 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4162 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4163 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4164 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4168 else if (r_type
== elfcpp::R_ARM_CALL
4169 || r_type
== elfcpp::R_ARM_JUMP24
4170 || r_type
== elfcpp::R_ARM_PLT32
)
4172 if (target_is_thumb
)
4176 // FIXME: We should check that the input section is from an
4177 // object that has interwork enabled.
4179 // We have an extra 2-bytes reach because of
4180 // the mode change (bit 24 (H) of BLX encoding).
4181 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4182 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4183 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4184 || (r_type
== elfcpp::R_ARM_JUMP24
)
4185 || (r_type
== elfcpp::R_ARM_PLT32
))
4187 stub_type
= (parameters
->options().shared()
4188 || should_force_pic_veneer
)
4191 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4192 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4196 ? arm_stub_long_branch_any_any
// V5T and above.
4197 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4203 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4204 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4206 stub_type
= (parameters
->options().shared()
4207 || should_force_pic_veneer
)
4208 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4209 : arm_stub_long_branch_any_any
; /// non-PIC.
4217 // Cortex_a8_stub methods.
4219 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4220 // I is the position of the instruction template in the stub template.
4223 Cortex_a8_stub::do_thumb16_special(size_t i
)
4225 // The only use of this is to copy condition code from a conditional
4226 // branch being worked around to the corresponding conditional branch in
4228 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4230 uint16_t data
= this->stub_template()->insns()[i
].data();
4231 gold_assert((data
& 0xff00U
) == 0xd000U
);
4232 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4236 // Stub_factory methods.
4238 Stub_factory::Stub_factory()
4240 // The instruction template sequences are declared as static
4241 // objects and initialized first time the constructor runs.
4243 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4244 // to reach the stub if necessary.
4245 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4247 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4248 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4249 // dcd R_ARM_ABS32(X)
4252 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4254 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4256 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4257 Insn_template::arm_insn(0xe12fff1c), // bx ip
4258 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4259 // dcd R_ARM_ABS32(X)
4262 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4263 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4265 Insn_template::thumb16_insn(0xb401), // push {r0}
4266 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4267 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4268 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4269 Insn_template::thumb16_insn(0x4760), // bx ip
4270 Insn_template::thumb16_insn(0xbf00), // nop
4271 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4272 // dcd R_ARM_ABS32(X)
4275 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4277 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4279 Insn_template::thumb16_insn(0x4778), // bx pc
4280 Insn_template::thumb16_insn(0x46c0), // nop
4281 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4282 Insn_template::arm_insn(0xe12fff1c), // bx ip
4283 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4284 // dcd R_ARM_ABS32(X)
4287 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4289 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4291 Insn_template::thumb16_insn(0x4778), // bx pc
4292 Insn_template::thumb16_insn(0x46c0), // nop
4293 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4294 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4295 // dcd R_ARM_ABS32(X)
4298 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4299 // one, when the destination is close enough.
4300 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4302 Insn_template::thumb16_insn(0x4778), // bx pc
4303 Insn_template::thumb16_insn(0x46c0), // nop
4304 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4307 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4308 // blx to reach the stub if necessary.
4309 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4311 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4312 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4313 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4314 // dcd R_ARM_REL32(X-4)
4317 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4318 // blx to reach the stub if necessary. We can not add into pc;
4319 // it is not guaranteed to mode switch (different in ARMv6 and
4321 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4323 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4324 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4325 Insn_template::arm_insn(0xe12fff1c), // bx ip
4326 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4327 // dcd R_ARM_REL32(X)
4330 // V4T ARM -> ARM long branch stub, PIC.
4331 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4333 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4334 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4335 Insn_template::arm_insn(0xe12fff1c), // bx ip
4336 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4337 // dcd R_ARM_REL32(X)
4340 // V4T Thumb -> ARM long branch stub, PIC.
4341 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4343 Insn_template::thumb16_insn(0x4778), // bx pc
4344 Insn_template::thumb16_insn(0x46c0), // nop
4345 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4346 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4347 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4348 // dcd R_ARM_REL32(X)
4351 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4353 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4355 Insn_template::thumb16_insn(0xb401), // push {r0}
4356 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4357 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4358 Insn_template::thumb16_insn(0x4484), // add ip, r0
4359 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4360 Insn_template::thumb16_insn(0x4760), // bx ip
4361 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4362 // dcd R_ARM_REL32(X)
4365 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4367 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4369 Insn_template::thumb16_insn(0x4778), // bx pc
4370 Insn_template::thumb16_insn(0x46c0), // nop
4371 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4372 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4373 Insn_template::arm_insn(0xe12fff1c), // bx ip
4374 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4375 // dcd R_ARM_REL32(X)
4378 // Cortex-A8 erratum-workaround stubs.
4380 // Stub used for conditional branches (which may be beyond +/-1MB away,
4381 // so we can't use a conditional branch to reach this stub).
4388 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4390 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4391 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4392 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4396 // Stub used for b.w and bl.w instructions.
4398 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4400 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4403 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4405 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4408 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4409 // instruction (which switches to ARM mode) to point to this stub. Jump to
4410 // the real destination using an ARM-mode branch.
4411 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4413 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4416 // Stub used to provide an interworking for R_ARM_V4BX relocation
4417 // (bx r[n] instruction).
4418 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4420 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4421 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4422 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4425 // Fill in the stub template look-up table. Stub templates are constructed
4426 // per instance of Stub_factory for fast look-up without locking
4427 // in a thread-enabled environment.
4429 this->stub_templates_
[arm_stub_none
] =
4430 new Stub_template(arm_stub_none
, NULL
, 0);
4432 #define DEF_STUB(x) \
4436 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4437 Stub_type type = arm_stub_##x; \
4438 this->stub_templates_[type] = \
4439 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4447 // Stub_table methods.
4449 // Removel all Cortex-A8 stub.
4451 template<bool big_endian
>
4453 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4455 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4456 p
!= this->cortex_a8_stubs_
.end();
4459 this->cortex_a8_stubs_
.clear();
4462 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4464 template<bool big_endian
>
4466 Stub_table
<big_endian
>::relocate_stub(
4468 const Relocate_info
<32, big_endian
>* relinfo
,
4469 Target_arm
<big_endian
>* arm_target
,
4470 Output_section
* output_section
,
4471 unsigned char* view
,
4472 Arm_address address
,
4473 section_size_type view_size
)
4475 const Stub_template
* stub_template
= stub
->stub_template();
4476 if (stub_template
->reloc_count() != 0)
4478 // Adjust view to cover the stub only.
4479 section_size_type offset
= stub
->offset();
4480 section_size_type stub_size
= stub_template
->size();
4481 gold_assert(offset
+ stub_size
<= view_size
);
4483 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4484 address
+ offset
, stub_size
);
4488 // Relocate all stubs in this stub table.
4490 template<bool big_endian
>
4492 Stub_table
<big_endian
>::relocate_stubs(
4493 const Relocate_info
<32, big_endian
>* relinfo
,
4494 Target_arm
<big_endian
>* arm_target
,
4495 Output_section
* output_section
,
4496 unsigned char* view
,
4497 Arm_address address
,
4498 section_size_type view_size
)
4500 // If we are passed a view bigger than the stub table's. we need to
4502 gold_assert(address
== this->address()
4504 == static_cast<section_size_type
>(this->data_size())));
4506 // Relocate all relocation stubs.
4507 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4508 p
!= this->reloc_stubs_
.end();
4510 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4511 address
, view_size
);
4513 // Relocate all Cortex-A8 stubs.
4514 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4515 p
!= this->cortex_a8_stubs_
.end();
4517 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4518 address
, view_size
);
4520 // Relocate all ARM V4BX stubs.
4521 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4522 p
!= this->arm_v4bx_stubs_
.end();
4526 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4527 address
, view_size
);
4531 // Write out the stubs to file.
4533 template<bool big_endian
>
4535 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4537 off_t offset
= this->offset();
4538 const section_size_type oview_size
=
4539 convert_to_section_size_type(this->data_size());
4540 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4542 // Write relocation stubs.
4543 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4544 p
!= this->reloc_stubs_
.end();
4547 Reloc_stub
* stub
= p
->second
;
4548 Arm_address address
= this->address() + stub
->offset();
4550 == align_address(address
,
4551 stub
->stub_template()->alignment()));
4552 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4556 // Write Cortex-A8 stubs.
4557 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4558 p
!= this->cortex_a8_stubs_
.end();
4561 Cortex_a8_stub
* stub
= p
->second
;
4562 Arm_address address
= this->address() + stub
->offset();
4564 == align_address(address
,
4565 stub
->stub_template()->alignment()));
4566 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4570 // Write ARM V4BX relocation stubs.
4571 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4572 p
!= this->arm_v4bx_stubs_
.end();
4578 Arm_address address
= this->address() + (*p
)->offset();
4580 == align_address(address
,
4581 (*p
)->stub_template()->alignment()));
4582 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4586 of
->write_output_view(this->offset(), oview_size
, oview
);
4589 // Update the data size and address alignment of the stub table at the end
4590 // of a relaxation pass. Return true if either the data size or the
4591 // alignment changed in this relaxation pass.
4593 template<bool big_endian
>
4595 Stub_table
<big_endian
>::update_data_size_and_addralign()
4598 unsigned addralign
= 1;
4600 // Go over all stubs in table to compute data size and address alignment.
4602 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4603 p
!= this->reloc_stubs_
.end();
4606 const Stub_template
* stub_template
= p
->second
->stub_template();
4607 addralign
= std::max(addralign
, stub_template
->alignment());
4608 size
= (align_address(size
, stub_template
->alignment())
4609 + stub_template
->size());
4612 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4613 p
!= this->cortex_a8_stubs_
.end();
4616 const Stub_template
* stub_template
= p
->second
->stub_template();
4617 addralign
= std::max(addralign
, stub_template
->alignment());
4618 size
= (align_address(size
, stub_template
->alignment())
4619 + stub_template
->size());
4622 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4623 p
!= this->arm_v4bx_stubs_
.end();
4629 const Stub_template
* stub_template
= (*p
)->stub_template();
4630 addralign
= std::max(addralign
, stub_template
->alignment());
4631 size
= (align_address(size
, stub_template
->alignment())
4632 + stub_template
->size());
4635 // Check if either data size or alignment changed in this pass.
4636 // Update prev_data_size_ and prev_addralign_. These will be used
4637 // as the current data size and address alignment for the next pass.
4638 bool changed
= size
!= this->prev_data_size_
;
4639 this->prev_data_size_
= size
;
4641 if (addralign
!= this->prev_addralign_
)
4643 this->prev_addralign_
= addralign
;
4648 // Finalize the stubs. This sets the offsets of the stubs within the stub
4649 // table. It also marks all input sections needing Cortex-A8 workaround.
4651 template<bool big_endian
>
4653 Stub_table
<big_endian
>::finalize_stubs()
4656 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4657 p
!= this->reloc_stubs_
.end();
4660 Reloc_stub
* stub
= p
->second
;
4661 const Stub_template
* stub_template
= stub
->stub_template();
4662 uint64_t stub_addralign
= stub_template
->alignment();
4663 off
= align_address(off
, stub_addralign
);
4664 stub
->set_offset(off
);
4665 off
+= stub_template
->size();
4668 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4669 p
!= this->cortex_a8_stubs_
.end();
4672 Cortex_a8_stub
* stub
= p
->second
;
4673 const Stub_template
* stub_template
= stub
->stub_template();
4674 uint64_t stub_addralign
= stub_template
->alignment();
4675 off
= align_address(off
, stub_addralign
);
4676 stub
->set_offset(off
);
4677 off
+= stub_template
->size();
4679 // Mark input section so that we can determine later if a code section
4680 // needs the Cortex-A8 workaround quickly.
4681 Arm_relobj
<big_endian
>* arm_relobj
=
4682 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
4683 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
4686 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4687 p
!= this->arm_v4bx_stubs_
.end();
4693 const Stub_template
* stub_template
= (*p
)->stub_template();
4694 uint64_t stub_addralign
= stub_template
->alignment();
4695 off
= align_address(off
, stub_addralign
);
4696 (*p
)->set_offset(off
);
4697 off
+= stub_template
->size();
4700 gold_assert(off
<= this->prev_data_size_
);
4703 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
4704 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
4705 // of the address range seen by the linker.
4707 template<bool big_endian
>
4709 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
4710 Target_arm
<big_endian
>* arm_target
,
4711 unsigned char* view
,
4712 Arm_address view_address
,
4713 section_size_type view_size
)
4715 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
4716 for (Cortex_a8_stub_list::const_iterator p
=
4717 this->cortex_a8_stubs_
.lower_bound(view_address
);
4718 ((p
!= this->cortex_a8_stubs_
.end())
4719 && (p
->first
< (view_address
+ view_size
)));
4722 // We do not store the THUMB bit in the LSB of either the branch address
4723 // or the stub offset. There is no need to strip the LSB.
4724 Arm_address branch_address
= p
->first
;
4725 const Cortex_a8_stub
* stub
= p
->second
;
4726 Arm_address stub_address
= this->address() + stub
->offset();
4728 // Offset of the branch instruction relative to this view.
4729 section_size_type offset
=
4730 convert_to_section_size_type(branch_address
- view_address
);
4731 gold_assert((offset
+ 4) <= view_size
);
4733 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
4734 view
+ offset
, branch_address
);
4738 // Arm_input_section methods.
4740 // Initialize an Arm_input_section.
4742 template<bool big_endian
>
4744 Arm_input_section
<big_endian
>::init()
4746 Relobj
* relobj
= this->relobj();
4747 unsigned int shndx
= this->shndx();
4749 // Cache these to speed up size and alignment queries. It is too slow
4750 // to call section_addraglin and section_size every time.
4751 this->original_addralign_
= relobj
->section_addralign(shndx
);
4752 this->original_size_
= relobj
->section_size(shndx
);
4754 // We want to make this look like the original input section after
4755 // output sections are finalized.
4756 Output_section
* os
= relobj
->output_section(shndx
);
4757 off_t offset
= relobj
->output_section_offset(shndx
);
4758 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
4759 this->set_address(os
->address() + offset
);
4760 this->set_file_offset(os
->offset() + offset
);
4762 this->set_current_data_size(this->original_size_
);
4763 this->finalize_data_size();
4766 template<bool big_endian
>
4768 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
4770 // We have to write out the original section content.
4771 section_size_type section_size
;
4772 const unsigned char* section_contents
=
4773 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
4774 of
->write(this->offset(), section_contents
, section_size
);
4776 // If this owns a stub table and it is not empty, write it.
4777 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
4778 this->stub_table_
->write(of
);
4781 // Finalize data size.
4783 template<bool big_endian
>
4785 Arm_input_section
<big_endian
>::set_final_data_size()
4787 // If this owns a stub table, finalize its data size as well.
4788 if (this->is_stub_table_owner())
4790 uint64_t address
= this->address();
4792 // The stub table comes after the original section contents.
4793 address
+= this->original_size_
;
4794 address
= align_address(address
, this->stub_table_
->addralign());
4795 off_t offset
= this->offset() + (address
- this->address());
4796 this->stub_table_
->set_address_and_file_offset(address
, offset
);
4797 address
+= this->stub_table_
->data_size();
4798 gold_assert(address
== this->address() + this->current_data_size());
4801 this->set_data_size(this->current_data_size());
4804 // Reset address and file offset.
4806 template<bool big_endian
>
4808 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
4810 // Size of the original input section contents.
4811 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
4813 // If this is a stub table owner, account for the stub table size.
4814 if (this->is_stub_table_owner())
4816 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
4818 // Reset the stub table's address and file offset. The
4819 // current data size for child will be updated after that.
4820 stub_table_
->reset_address_and_file_offset();
4821 off
= align_address(off
, stub_table_
->addralign());
4822 off
+= stub_table
->current_data_size();
4825 this->set_current_data_size(off
);
4828 // Arm_exidx_cantunwind methods.
4830 // Write this to Output file OF for a fixed endianity.
4832 template<bool big_endian
>
4834 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
4836 off_t offset
= this->offset();
4837 const section_size_type oview_size
= 8;
4838 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4840 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
4841 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
);
4843 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
4844 gold_assert(os
!= NULL
);
4846 Arm_relobj
<big_endian
>* arm_relobj
=
4847 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
4848 Arm_address output_offset
=
4849 arm_relobj
->get_output_section_offset(this->shndx_
);
4850 Arm_address section_start
;
4851 if(output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
4852 section_start
= os
->address() + output_offset
;
4855 // Currently this only happens for a relaxed section.
4856 const Output_relaxed_input_section
* poris
=
4857 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
4858 gold_assert(poris
!= NULL
);
4859 section_start
= poris
->address();
4862 // We always append this to the end of an EXIDX section.
4863 Arm_address output_address
=
4864 section_start
+ this->relobj_
->section_size(this->shndx_
);
4866 // Write out the entry. The first word either points to the beginning
4867 // or after the end of a text section. The second word is the special
4868 // EXIDX_CANTUNWIND value.
4869 elfcpp::Swap
<32, big_endian
>::writeval(wv
, output_address
);
4870 elfcpp::Swap
<32, big_endian
>::writeval(wv
+ 1, elfcpp::EXIDX_CANTUNWIND
);
4872 of
->write_output_view(this->offset(), oview_size
, oview
);
4875 // Arm_exidx_merged_section methods.
4877 // Constructor for Arm_exidx_merged_section.
4878 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
4879 // SECTION_OFFSET_MAP points to a section offset map describing how
4880 // parts of the input section are mapped to output. DELETED_BYTES is
4881 // the number of bytes deleted from the EXIDX input section.
4883 Arm_exidx_merged_section::Arm_exidx_merged_section(
4884 const Arm_exidx_input_section
& exidx_input_section
,
4885 const Arm_exidx_section_offset_map
& section_offset_map
,
4886 uint32_t deleted_bytes
)
4887 : Output_relaxed_input_section(exidx_input_section
.relobj(),
4888 exidx_input_section
.shndx(),
4889 exidx_input_section
.addralign()),
4890 exidx_input_section_(exidx_input_section
),
4891 section_offset_map_(section_offset_map
)
4893 // Fix size here so that we do not need to implement set_final_data_size.
4894 this->set_data_size(exidx_input_section
.size() - deleted_bytes
);
4895 this->fix_data_size();
4898 // Given an input OBJECT, an input section index SHNDX within that
4899 // object, and an OFFSET relative to the start of that input
4900 // section, return whether or not the corresponding offset within
4901 // the output section is known. If this function returns true, it
4902 // sets *POUTPUT to the output offset. The value -1 indicates that
4903 // this input offset is being discarded.
4906 Arm_exidx_merged_section::do_output_offset(
4907 const Relobj
* relobj
,
4909 section_offset_type offset
,
4910 section_offset_type
* poutput
) const
4912 // We only handle offsets for the original EXIDX input section.
4913 if (relobj
!= this->exidx_input_section_
.relobj()
4914 || shndx
!= this->exidx_input_section_
.shndx())
4917 section_offset_type section_size
=
4918 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
4919 if (offset
< 0 || offset
>= section_size
)
4920 // Input offset is out of valid range.
4924 // We need to look up the section offset map to determine the output
4925 // offset. Find the reference point in map that is first offset
4926 // bigger than or equal to this offset.
4927 Arm_exidx_section_offset_map::const_iterator p
=
4928 this->section_offset_map_
.lower_bound(offset
);
4930 // The section offset maps are build such that this should not happen if
4931 // input offset is in the valid range.
4932 gold_assert(p
!= this->section_offset_map_
.end());
4934 // We need to check if this is dropped.
4935 section_offset_type ref
= p
->first
;
4936 section_offset_type mapped_ref
= p
->second
;
4938 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
4939 // Offset is present in output.
4940 *poutput
= mapped_ref
+ (offset
- ref
);
4942 // Offset is discarded owing to EXIDX entry merging.
4949 // Write this to output file OF.
4952 Arm_exidx_merged_section::do_write(Output_file
* of
)
4954 // If we retain or discard the whole EXIDX input section, we would
4956 gold_assert(this->data_size() != this->exidx_input_section_
.size()
4957 && this->data_size() != 0);
4959 off_t offset
= this->offset();
4960 const section_size_type oview_size
= this->data_size();
4961 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4963 Output_section
* os
= this->relobj()->output_section(this->shndx());
4964 gold_assert(os
!= NULL
);
4966 // Get contents of EXIDX input section.
4967 section_size_type section_size
;
4968 const unsigned char* section_contents
=
4969 this->relobj()->section_contents(this->shndx(), §ion_size
, false);
4970 gold_assert(section_size
== this->exidx_input_section_
.size());
4972 // Go over spans of input offsets and write only those that are not
4974 section_offset_type in_start
= 0;
4975 section_offset_type out_start
= 0;
4976 for(Arm_exidx_section_offset_map::const_iterator p
=
4977 this->section_offset_map_
.begin();
4978 p
!= this->section_offset_map_
.end();
4981 section_offset_type in_end
= p
->first
;
4982 gold_assert(in_end
>= in_start
);
4983 section_offset_type out_end
= p
->second
;
4984 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
4987 size_t out_chunk_size
=
4988 convert_types
<size_t>(out_end
- out_start
+ 1);
4989 gold_assert(out_chunk_size
== in_chunk_size
);
4990 memcpy(oview
+ out_start
, section_contents
+ in_start
,
4992 out_start
+= out_chunk_size
;
4994 in_start
+= in_chunk_size
;
4997 gold_assert(convert_to_section_size_type(out_start
) == oview_size
);
4998 of
->write_output_view(this->offset(), oview_size
, oview
);
5001 // Arm_exidx_fixup methods.
5003 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5004 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5005 // points to the end of the last seen EXIDX section.
5008 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5010 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5011 && this->last_input_section_
!= NULL
)
5013 Relobj
* relobj
= this->last_input_section_
->relobj();
5014 unsigned int text_shndx
= this->last_input_section_
->link();
5015 Arm_exidx_cantunwind
* cantunwind
=
5016 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5017 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5018 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5022 // Process an EXIDX section entry in input. Return whether this entry
5023 // can be deleted in the output. SECOND_WORD in the second word of the
5027 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5030 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5032 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5033 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5034 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5036 else if ((second_word
& 0x80000000) != 0)
5038 // Inlined unwinding data. Merge if equal to previous.
5039 delete_entry
= (this->last_unwind_type_
== UT_INLINED_ENTRY
5040 && this->last_inlined_entry_
== second_word
);
5041 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5042 this->last_inlined_entry_
= second_word
;
5046 // Normal table entry. In theory we could merge these too,
5047 // but duplicate entries are likely to be much less common.
5048 delete_entry
= false;
5049 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5051 return delete_entry
;
5054 // Update the current section offset map during EXIDX section fix-up.
5055 // If there is no map, create one. INPUT_OFFSET is the offset of a
5056 // reference point, DELETED_BYTES is the number of deleted by in the
5057 // section so far. If DELETE_ENTRY is true, the reference point and
5058 // all offsets after the previous reference point are discarded.
5061 Arm_exidx_fixup::update_offset_map(
5062 section_offset_type input_offset
,
5063 section_size_type deleted_bytes
,
5066 if (this->section_offset_map_
== NULL
)
5067 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5068 section_offset_type output_offset
= (delete_entry
5070 : input_offset
- deleted_bytes
);
5071 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5074 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5075 // bytes deleted. If some entries are merged, also store a pointer to a newly
5076 // created Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The
5077 // caller owns the map and is responsible for releasing it after use.
5079 template<bool big_endian
>
5081 Arm_exidx_fixup::process_exidx_section(
5082 const Arm_exidx_input_section
* exidx_input_section
,
5083 Arm_exidx_section_offset_map
** psection_offset_map
)
5085 Relobj
* relobj
= exidx_input_section
->relobj();
5086 unsigned shndx
= exidx_input_section
->shndx();
5087 section_size_type section_size
;
5088 const unsigned char* section_contents
=
5089 relobj
->section_contents(shndx
, §ion_size
, false);
5091 if ((section_size
% 8) != 0)
5093 // Something is wrong with this section. Better not touch it.
5094 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5095 relobj
->name().c_str(), shndx
);
5096 this->last_input_section_
= exidx_input_section
;
5097 this->last_unwind_type_
= UT_NONE
;
5101 uint32_t deleted_bytes
= 0;
5102 bool prev_delete_entry
= false;
5103 gold_assert(this->section_offset_map_
== NULL
);
5105 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5107 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5109 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5110 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5112 bool delete_entry
= this->process_exidx_entry(second_word
);
5114 // Entry deletion causes changes in output offsets. We use a std::map
5115 // to record these. And entry (x, y) means input offset x
5116 // is mapped to output offset y. If y is invalid_offset, then x is
5117 // dropped in the output. Because of the way std::map::lower_bound
5118 // works, we record the last offset in a region w.r.t to keeping or
5119 // dropping. If there is no entry (x0, y0) for an input offset x0,
5120 // the output offset y0 of it is determined by the output offset y1 of
5121 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5122 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Othewise, y1
5124 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5125 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5127 // Update total deleted bytes for this entry.
5131 prev_delete_entry
= delete_entry
;
5134 // If section offset map is not NULL, make an entry for the end of
5136 if (this->section_offset_map_
!= NULL
)
5137 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5139 *psection_offset_map
= this->section_offset_map_
;
5140 this->section_offset_map_
= NULL
;
5141 this->last_input_section_
= exidx_input_section
;
5143 return deleted_bytes
;
5146 // Arm_output_section methods.
5148 // Create a stub group for input sections from BEGIN to END. OWNER
5149 // points to the input section to be the owner a new stub table.
5151 template<bool big_endian
>
5153 Arm_output_section
<big_endian
>::create_stub_group(
5154 Input_section_list::const_iterator begin
,
5155 Input_section_list::const_iterator end
,
5156 Input_section_list::const_iterator owner
,
5157 Target_arm
<big_endian
>* target
,
5158 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
)
5160 // We use a different kind of relaxed section in an EXIDX section.
5161 // The static casting from Output_relaxed_input_section to
5162 // Arm_input_section is invalid in an EXIDX section. We are okay
5163 // because we should not be calling this for an EXIDX section.
5164 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5166 // Currently we convert ordinary input sections into relaxed sections only
5167 // at this point but we may want to support creating relaxed input section
5168 // very early. So we check here to see if owner is already a relaxed
5171 Arm_input_section
<big_endian
>* arm_input_section
;
5172 if (owner
->is_relaxed_input_section())
5175 Arm_input_section
<big_endian
>::as_arm_input_section(
5176 owner
->relaxed_input_section());
5180 gold_assert(owner
->is_input_section());
5181 // Create a new relaxed input section.
5183 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5184 new_relaxed_sections
->push_back(arm_input_section
);
5187 // Create a stub table.
5188 Stub_table
<big_endian
>* stub_table
=
5189 target
->new_stub_table(arm_input_section
);
5191 arm_input_section
->set_stub_table(stub_table
);
5193 Input_section_list::const_iterator p
= begin
;
5194 Input_section_list::const_iterator prev_p
;
5196 // Look for input sections or relaxed input sections in [begin ... end].
5199 if (p
->is_input_section() || p
->is_relaxed_input_section())
5201 // The stub table information for input sections live
5202 // in their objects.
5203 Arm_relobj
<big_endian
>* arm_relobj
=
5204 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5205 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5209 while (prev_p
!= end
);
5212 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5213 // of stub groups. We grow a stub group by adding input section until the
5214 // size is just below GROUP_SIZE. The last input section will be converted
5215 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5216 // input section after the stub table, effectively double the group size.
5218 // This is similar to the group_sections() function in elf32-arm.c but is
5219 // implemented differently.
5221 template<bool big_endian
>
5223 Arm_output_section
<big_endian
>::group_sections(
5224 section_size_type group_size
,
5225 bool stubs_always_after_branch
,
5226 Target_arm
<big_endian
>* target
)
5228 // We only care about sections containing code.
5229 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5232 // States for grouping.
5235 // No group is being built.
5237 // A group is being built but the stub table is not found yet.
5238 // We keep group a stub group until the size is just under GROUP_SIZE.
5239 // The last input section in the group will be used as the stub table.
5240 FINDING_STUB_SECTION
,
5241 // A group is being built and we have already found a stub table.
5242 // We enter this state to grow a stub group by adding input section
5243 // after the stub table. This effectively doubles the group size.
5247 // Any newly created relaxed sections are stored here.
5248 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5250 State state
= NO_GROUP
;
5251 section_size_type off
= 0;
5252 section_size_type group_begin_offset
= 0;
5253 section_size_type group_end_offset
= 0;
5254 section_size_type stub_table_end_offset
= 0;
5255 Input_section_list::const_iterator group_begin
=
5256 this->input_sections().end();
5257 Input_section_list::const_iterator stub_table
=
5258 this->input_sections().end();
5259 Input_section_list::const_iterator group_end
= this->input_sections().end();
5260 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5261 p
!= this->input_sections().end();
5264 section_size_type section_begin_offset
=
5265 align_address(off
, p
->addralign());
5266 section_size_type section_end_offset
=
5267 section_begin_offset
+ p
->data_size();
5269 // Check to see if we should group the previously seens sections.
5275 case FINDING_STUB_SECTION
:
5276 // Adding this section makes the group larger than GROUP_SIZE.
5277 if (section_end_offset
- group_begin_offset
>= group_size
)
5279 if (stubs_always_after_branch
)
5281 gold_assert(group_end
!= this->input_sections().end());
5282 this->create_stub_group(group_begin
, group_end
, group_end
,
5283 target
, &new_relaxed_sections
);
5288 // But wait, there's more! Input sections up to
5289 // stub_group_size bytes after the stub table can be
5290 // handled by it too.
5291 state
= HAS_STUB_SECTION
;
5292 stub_table
= group_end
;
5293 stub_table_end_offset
= group_end_offset
;
5298 case HAS_STUB_SECTION
:
5299 // Adding this section makes the post stub-section group larger
5301 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5303 gold_assert(group_end
!= this->input_sections().end());
5304 this->create_stub_group(group_begin
, group_end
, stub_table
,
5305 target
, &new_relaxed_sections
);
5314 // If we see an input section and currently there is no group, start
5315 // a new one. Skip any empty sections.
5316 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5317 && (p
->relobj()->section_size(p
->shndx()) != 0))
5319 if (state
== NO_GROUP
)
5321 state
= FINDING_STUB_SECTION
;
5323 group_begin_offset
= section_begin_offset
;
5326 // Keep track of the last input section seen.
5328 group_end_offset
= section_end_offset
;
5331 off
= section_end_offset
;
5334 // Create a stub group for any ungrouped sections.
5335 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5337 gold_assert(group_end
!= this->input_sections().end());
5338 this->create_stub_group(group_begin
, group_end
,
5339 (state
== FINDING_STUB_SECTION
5342 target
, &new_relaxed_sections
);
5345 // Convert input section into relaxed input section in a batch.
5346 if (!new_relaxed_sections
.empty())
5347 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5349 // Update the section offsets
5350 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5352 Arm_relobj
<big_endian
>* arm_relobj
=
5353 Arm_relobj
<big_endian
>::as_arm_relobj(
5354 new_relaxed_sections
[i
]->relobj());
5355 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5356 // Tell Arm_relobj that this input section is converted.
5357 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5361 // Append non empty text sections in this to LIST in ascending
5362 // order of their position in this.
5364 template<bool big_endian
>
5366 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5367 Text_section_list
* list
)
5369 // We only care about text sections.
5370 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5373 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5375 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5376 p
!= this->input_sections().end();
5379 // We only care about plain or relaxed input sections. We also
5380 // ignore any merged sections.
5381 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5382 && p
->data_size() != 0)
5383 list
->push_back(Text_section_list::value_type(p
->relobj(),
5388 template<bool big_endian
>
5390 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5391 const Text_section_list
& sorted_text_sections
,
5392 Symbol_table
* symtab
)
5394 // We should only do this for the EXIDX output section.
5395 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5397 // We don't want the relaxation loop to undo these changes, so we discard
5398 // the current saved states and take another one after the fix-up.
5399 this->discard_states();
5401 // Remove all input sections.
5402 uint64_t address
= this->address();
5403 typedef std::list
<Simple_input_section
> Simple_input_section_list
;
5404 Simple_input_section_list input_sections
;
5405 this->reset_address_and_file_offset();
5406 this->get_input_sections(address
, std::string(""), &input_sections
);
5408 if (!this->input_sections().empty())
5409 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5411 // Go through all the known input sections and record them.
5412 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5413 Section_id_set known_input_sections
;
5414 for (Simple_input_section_list::const_iterator p
= input_sections
.begin();
5415 p
!= input_sections
.end();
5418 // This should never happen. At this point, we should only see
5419 // plain EXIDX input sections.
5420 gold_assert(!p
->is_relaxed_input_section());
5421 known_input_sections
.insert(Section_id(p
->relobj(), p
->shndx()));
5424 Arm_exidx_fixup
exidx_fixup(this);
5426 // Go over the sorted text sections.
5427 Section_id_set processed_input_sections
;
5428 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5429 p
!= sorted_text_sections
.end();
5432 Relobj
* relobj
= p
->first
;
5433 unsigned int shndx
= p
->second
;
5435 Arm_relobj
<big_endian
>* arm_relobj
=
5436 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5437 const Arm_exidx_input_section
* exidx_input_section
=
5438 arm_relobj
->exidx_input_section_by_link(shndx
);
5440 // If this text section has no EXIDX section, force an EXIDX_CANTUNWIND
5441 // entry pointing to the end of the last seen EXIDX section.
5442 if (exidx_input_section
== NULL
)
5444 exidx_fixup
.add_exidx_cantunwind_as_needed();
5448 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5449 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5450 Section_id
sid(exidx_relobj
, exidx_shndx
);
5451 if (known_input_sections
.find(sid
) == known_input_sections
.end())
5453 // This is odd. We have not seen this EXIDX input section before.
5454 // We cannot do fix-up.
5455 gold_error(_("EXIDX section %u of %s is not in EXIDX output section"),
5456 exidx_shndx
, exidx_relobj
->name().c_str());
5457 exidx_fixup
.add_exidx_cantunwind_as_needed();
5461 // Fix up coverage and append input section to output data list.
5462 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5463 uint32_t deleted_bytes
=
5464 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5465 §ion_offset_map
);
5467 if (deleted_bytes
== exidx_input_section
->size())
5469 // The whole EXIDX section got merged. Remove it from output.
5470 gold_assert(section_offset_map
== NULL
);
5471 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5473 else if (deleted_bytes
> 0)
5475 // Some entries are merged. We need to convert this EXIDX input
5476 // section into a relaxed section.
5477 gold_assert(section_offset_map
!= NULL
);
5478 Arm_exidx_merged_section
* merged_section
=
5479 new Arm_exidx_merged_section(*exidx_input_section
,
5480 *section_offset_map
, deleted_bytes
);
5481 this->add_relaxed_input_section(merged_section
);
5482 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5486 // Just add back the EXIDX input section.
5487 gold_assert(section_offset_map
== NULL
);
5488 Output_section::Simple_input_section
sis(exidx_relobj
, exidx_shndx
);
5489 this->add_simple_input_section(sis
, exidx_input_section
->size(),
5490 exidx_input_section
->addralign());
5493 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5496 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5497 exidx_fixup
.add_exidx_cantunwind_as_needed();
5499 // Remove any known EXIDX input sections that are not processed.
5500 for (Simple_input_section_list::const_iterator p
= input_sections
.begin();
5501 p
!= input_sections
.end();
5504 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5505 == processed_input_sections
.end())
5507 // We only discard a known EXIDX section because its linked
5508 // text section has been folded by ICF.
5509 Arm_relobj
<big_endian
>* arm_relobj
=
5510 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5511 const Arm_exidx_input_section
* exidx_input_section
=
5512 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5513 gold_assert(exidx_input_section
!= NULL
);
5514 unsigned int text_shndx
= exidx_input_section
->link();
5515 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5517 // Remove this from link.
5518 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5522 // Make changes permanent.
5523 this->save_states();
5524 this->set_section_offsets_need_adjustment();
5527 // Arm_relobj methods.
5529 // Determine if we want to scan the SHNDX-th section for relocation stubs.
5530 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5532 template<bool big_endian
>
5534 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
5535 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5536 const Relobj::Output_sections
& out_sections
,
5537 const Symbol_table
*symtab
,
5538 const unsigned char* pshdrs
)
5540 unsigned int sh_type
= shdr
.get_sh_type();
5541 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
5544 // Ignore empty section.
5545 off_t sh_size
= shdr
.get_sh_size();
5549 // Ignore reloc section with bad info. This error will be
5550 // reported in the final link.
5551 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5552 if (index
>= this->shnum())
5555 // This relocation section is against a section which we
5556 // discarded or if the section is folded into another
5557 // section due to ICF.
5558 if (out_sections
[index
] == NULL
|| symtab
->is_section_folded(this, index
))
5561 // Check the section to which relocations are applied. Ignore relocations
5562 // to unallocated sections or EXIDX sections.
5563 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5564 const elfcpp::Shdr
<32, big_endian
> data_shdr(pshdrs
+ index
* shdr_size
);
5565 if ((data_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
5566 || data_shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
5569 // Ignore reloc section with unexpected symbol table. The
5570 // error will be reported in the final link.
5571 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
5574 unsigned int reloc_size
;
5575 if (sh_type
== elfcpp::SHT_REL
)
5576 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5578 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5580 // Ignore reloc section with unexpected entsize or uneven size.
5581 // The error will be reported in the final link.
5582 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
5588 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
5589 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
5591 template<bool big_endian
>
5593 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
5594 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5597 const Symbol_table
* symtab
)
5599 // We only scan non-empty code sections.
5600 if ((shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0
5601 || shdr
.get_sh_size() == 0)
5604 // Ignore discarded or ICF'ed sections.
5605 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
5608 // Find output address of section.
5609 Arm_address address
= os
->output_address(this, shndx
, 0);
5611 // If the section does not cross any 4K-boundaries, it does not need to
5613 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
5619 // Scan a section for Cortex-A8 workaround.
5621 template<bool big_endian
>
5623 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
5624 const elfcpp::Shdr
<32, big_endian
>& shdr
,
5627 Target_arm
<big_endian
>* arm_target
)
5629 Arm_address output_address
= os
->output_address(this, shndx
, 0);
5631 // Get the section contents.
5632 section_size_type input_view_size
= 0;
5633 const unsigned char* input_view
=
5634 this->section_contents(shndx
, &input_view_size
, false);
5636 // We need to go through the mapping symbols to determine what to
5637 // scan. There are two reasons. First, we should look at THUMB code and
5638 // THUMB code only. Second, we only want to look at the 4K-page boundary
5639 // to speed up the scanning.
5641 // Look for the first mapping symbol in this section. It should be
5643 Mapping_symbol_position
section_start(shndx
, 0);
5644 typename
Mapping_symbols_info::const_iterator p
=
5645 this->mapping_symbols_info_
.lower_bound(section_start
);
5647 if (p
== this->mapping_symbols_info_
.end()
5648 || p
->first
!= section_start
)
5650 gold_warning(_("Cortex-A8 erratum scanning failed because there "
5651 "is no mapping symbols for section %u of %s"),
5652 shndx
, this->name().c_str());
5656 while (p
!= this->mapping_symbols_info_
.end()
5657 && p
->first
.first
== shndx
)
5659 typename
Mapping_symbols_info::const_iterator next
=
5660 this->mapping_symbols_info_
.upper_bound(p
->first
);
5662 // Only scan part of a section with THUMB code.
5663 if (p
->second
== 't')
5665 // Determine the end of this range.
5666 section_size_type span_start
=
5667 convert_to_section_size_type(p
->first
.second
);
5668 section_size_type span_end
;
5669 if (next
!= this->mapping_symbols_info_
.end()
5670 && next
->first
.first
== shndx
)
5671 span_end
= convert_to_section_size_type(next
->first
.second
);
5673 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
5675 if (((span_start
+ output_address
) & ~0xfffUL
)
5676 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
5678 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
5679 span_start
, span_end
,
5689 // Scan relocations for stub generation.
5691 template<bool big_endian
>
5693 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
5694 Target_arm
<big_endian
>* arm_target
,
5695 const Symbol_table
* symtab
,
5696 const Layout
* layout
)
5698 unsigned int shnum
= this->shnum();
5699 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
5701 // Read the section headers.
5702 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
5706 // To speed up processing, we set up hash tables for fast lookup of
5707 // input offsets to output addresses.
5708 this->initialize_input_to_output_maps();
5710 const Relobj::Output_sections
& out_sections(this->output_sections());
5712 Relocate_info
<32, big_endian
> relinfo
;
5713 relinfo
.symtab
= symtab
;
5714 relinfo
.layout
= layout
;
5715 relinfo
.object
= this;
5717 // Do relocation stubs scanning.
5718 const unsigned char* p
= pshdrs
+ shdr_size
;
5719 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
5721 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
5722 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
5725 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
5726 Arm_address output_offset
= this->get_output_section_offset(index
);
5727 Arm_address output_address
;
5728 if(output_offset
!= invalid_address
)
5729 output_address
= out_sections
[index
]->address() + output_offset
;
5732 // Currently this only happens for a relaxed section.
5733 const Output_relaxed_input_section
* poris
=
5734 out_sections
[index
]->find_relaxed_input_section(this, index
);
5735 gold_assert(poris
!= NULL
);
5736 output_address
= poris
->address();
5739 // Get the relocations.
5740 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
5744 // Get the section contents. This does work for the case in which
5745 // we modify the contents of an input section. We need to pass the
5746 // output view under such circumstances.
5747 section_size_type input_view_size
= 0;
5748 const unsigned char* input_view
=
5749 this->section_contents(index
, &input_view_size
, false);
5751 relinfo
.reloc_shndx
= i
;
5752 relinfo
.data_shndx
= index
;
5753 unsigned int sh_type
= shdr
.get_sh_type();
5754 unsigned int reloc_size
;
5755 if (sh_type
== elfcpp::SHT_REL
)
5756 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
5758 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
5760 Output_section
* os
= out_sections
[index
];
5761 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
5762 shdr
.get_sh_size() / reloc_size
,
5764 output_offset
== invalid_address
,
5765 input_view
, output_address
,
5770 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
5771 // after its relocation section, if there is one, is processed for
5772 // relocation stubs. Merging this loop with the one above would have been
5773 // complicated since we would have had to make sure that relocation stub
5774 // scanning is done first.
5775 if (arm_target
->fix_cortex_a8())
5777 const unsigned char* p
= pshdrs
+ shdr_size
;
5778 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
5780 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
5781 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
5784 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
5789 // After we've done the relocations, we release the hash tables,
5790 // since we no longer need them.
5791 this->free_input_to_output_maps();
5794 // Count the local symbols. The ARM backend needs to know if a symbol
5795 // is a THUMB function or not. For global symbols, it is easy because
5796 // the Symbol object keeps the ELF symbol type. For local symbol it is
5797 // harder because we cannot access this information. So we override the
5798 // do_count_local_symbol in parent and scan local symbols to mark
5799 // THUMB functions. This is not the most efficient way but I do not want to
5800 // slow down other ports by calling a per symbol targer hook inside
5801 // Sized_relobj<size, big_endian>::do_count_local_symbols.
5803 template<bool big_endian
>
5805 Arm_relobj
<big_endian
>::do_count_local_symbols(
5806 Stringpool_template
<char>* pool
,
5807 Stringpool_template
<char>* dynpool
)
5809 // We need to fix-up the values of any local symbols whose type are
5812 // Ask parent to count the local symbols.
5813 Sized_relobj
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
5814 const unsigned int loccount
= this->local_symbol_count();
5818 // Intialize the thumb function bit-vector.
5819 std::vector
<bool> empty_vector(loccount
, false);
5820 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
5822 // Read the symbol table section header.
5823 const unsigned int symtab_shndx
= this->symtab_shndx();
5824 elfcpp::Shdr
<32, big_endian
>
5825 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
5826 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
5828 // Read the local symbols.
5829 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
5830 gold_assert(loccount
== symtabshdr
.get_sh_info());
5831 off_t locsize
= loccount
* sym_size
;
5832 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
5833 locsize
, true, true);
5835 // For mapping symbol processing, we need to read the symbol names.
5836 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
5837 if (strtab_shndx
>= this->shnum())
5839 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
5843 elfcpp::Shdr
<32, big_endian
>
5844 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
5845 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
5847 this->error(_("symbol table name section has wrong type: %u"),
5848 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
5851 const char* pnames
=
5852 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
5853 strtabshdr
.get_sh_size(),
5856 // Loop over the local symbols and mark any local symbols pointing
5857 // to THUMB functions.
5859 // Skip the first dummy symbol.
5861 typename Sized_relobj
<32, big_endian
>::Local_values
* plocal_values
=
5862 this->local_values();
5863 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
5865 elfcpp::Sym
<32, big_endian
> sym(psyms
);
5866 elfcpp::STT st_type
= sym
.get_st_type();
5867 Symbol_value
<32>& lv((*plocal_values
)[i
]);
5868 Arm_address input_value
= lv
.input_value();
5870 // Check to see if this is a mapping symbol.
5871 const char* sym_name
= pnames
+ sym
.get_st_name();
5872 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
5874 unsigned int input_shndx
= sym
.get_st_shndx();
5876 // Strip of LSB in case this is a THUMB symbol.
5877 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
5878 this->mapping_symbols_info_
[msp
] = sym_name
[1];
5881 if (st_type
== elfcpp::STT_ARM_TFUNC
5882 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
5884 // This is a THUMB function. Mark this and canonicalize the
5885 // symbol value by setting LSB.
5886 this->local_symbol_is_thumb_function_
[i
] = true;
5887 if ((input_value
& 1) == 0)
5888 lv
.set_input_value(input_value
| 1);
5893 // Relocate sections.
5894 template<bool big_endian
>
5896 Arm_relobj
<big_endian
>::do_relocate_sections(
5897 const Symbol_table
* symtab
,
5898 const Layout
* layout
,
5899 const unsigned char* pshdrs
,
5900 typename Sized_relobj
<32, big_endian
>::Views
* pviews
)
5902 // Call parent to relocate sections.
5903 Sized_relobj
<32, big_endian
>::do_relocate_sections(symtab
, layout
, pshdrs
,
5906 // We do not generate stubs if doing a relocatable link.
5907 if (parameters
->options().relocatable())
5910 // Relocate stub tables.
5911 unsigned int shnum
= this->shnum();
5913 Target_arm
<big_endian
>* arm_target
=
5914 Target_arm
<big_endian
>::default_target();
5916 Relocate_info
<32, big_endian
> relinfo
;
5917 relinfo
.symtab
= symtab
;
5918 relinfo
.layout
= layout
;
5919 relinfo
.object
= this;
5921 for (unsigned int i
= 1; i
< shnum
; ++i
)
5923 Arm_input_section
<big_endian
>* arm_input_section
=
5924 arm_target
->find_arm_input_section(this, i
);
5926 if (arm_input_section
!= NULL
5927 && arm_input_section
->is_stub_table_owner()
5928 && !arm_input_section
->stub_table()->empty())
5930 // We cannot discard a section if it owns a stub table.
5931 Output_section
* os
= this->output_section(i
);
5932 gold_assert(os
!= NULL
);
5934 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
5935 relinfo
.reloc_shdr
= NULL
;
5936 relinfo
.data_shndx
= i
;
5937 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
5939 gold_assert((*pviews
)[i
].view
!= NULL
);
5941 // We are passed the output section view. Adjust it to cover the
5943 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
5944 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
5945 && ((stub_table
->address() + stub_table
->data_size())
5946 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
5948 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
5949 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
5950 Arm_address address
= stub_table
->address();
5951 section_size_type view_size
= stub_table
->data_size();
5953 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
5957 // Apply Cortex A8 workaround if applicable.
5958 if (this->section_has_cortex_a8_workaround(i
))
5960 unsigned char* view
= (*pviews
)[i
].view
;
5961 Arm_address view_address
= (*pviews
)[i
].address
;
5962 section_size_type view_size
= (*pviews
)[i
].view_size
;
5963 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
5965 // Adjust view to cover section.
5966 Output_section
* os
= this->output_section(i
);
5967 gold_assert(os
!= NULL
);
5968 Arm_address section_address
= os
->output_address(this, i
, 0);
5969 uint64_t section_size
= this->section_size(i
);
5971 gold_assert(section_address
>= view_address
5972 && ((section_address
+ section_size
)
5973 <= (view_address
+ view_size
)));
5975 unsigned char* section_view
= view
+ (section_address
- view_address
);
5977 // Apply the Cortex-A8 workaround to the output address range
5978 // corresponding to this input section.
5979 stub_table
->apply_cortex_a8_workaround_to_address_range(
5988 // Create a new EXIDX input section object for EXIDX section SHNDX with
5991 template<bool big_endian
>
5993 Arm_relobj
<big_endian
>::make_exidx_input_section(
5995 const elfcpp::Shdr
<32, big_endian
>& shdr
)
5997 // Link .text section to its .ARM.exidx section in the same object.
5998 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6000 // Issue an error and ignore this EXIDX section if it does not point
6001 // to any text section.
6002 if (text_shndx
== elfcpp::SHN_UNDEF
)
6004 gold_error(_("EXIDX section %u in %s has no linked text section"),
6005 shndx
, this->name().c_str());
6009 // Issue an error and ignore this EXIDX section if it points to a text
6010 // section already has an EXIDX section.
6011 if (this->exidx_section_map_
[text_shndx
] != NULL
)
6013 gold_error(_("EXIDX sections %u and %u both link to text section %u "
6015 shndx
, this->exidx_section_map_
[text_shndx
]->shndx(),
6016 text_shndx
, this->name().c_str());
6020 // Create an Arm_exidx_input_section object for this EXIDX section.
6021 Arm_exidx_input_section
* exidx_input_section
=
6022 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6023 shdr
.get_sh_addralign());
6024 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6026 // Also map the EXIDX section index to this.
6027 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6028 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6031 // Read the symbol information.
6033 template<bool big_endian
>
6035 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6037 // Call parent class to read symbol information.
6038 Sized_relobj
<32, big_endian
>::do_read_symbols(sd
);
6040 // Read processor-specific flags in ELF file header.
6041 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6042 elfcpp::Elf_sizes
<32>::ehdr_size
,
6044 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6045 this->processor_specific_flags_
= ehdr
.get_e_flags();
6047 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6049 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6050 const unsigned char *ps
=
6051 sd
->section_headers
->data() + shdr_size
;
6052 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6054 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6055 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6057 gold_assert(this->attributes_section_data_
== NULL
);
6058 section_offset_type section_offset
= shdr
.get_sh_offset();
6059 section_size_type section_size
=
6060 convert_to_section_size_type(shdr
.get_sh_size());
6061 File_view
* view
= this->get_lasting_view(section_offset
,
6062 section_size
, true, false);
6063 this->attributes_section_data_
=
6064 new Attributes_section_data(view
->data(), section_size
);
6066 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6067 this->make_exidx_input_section(i
, shdr
);
6071 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6072 // sections for unwinding. These sections are referenced implicitly by
6073 // text sections linked in the section headers. If we ignore these implict
6074 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6075 // will be garbage-collected incorrectly. Hence we override the same function
6076 // in the base class to handle these implicit references.
6078 template<bool big_endian
>
6080 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6082 Read_relocs_data
* rd
)
6084 // First, call base class method to process relocations in this object.
6085 Sized_relobj
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6087 unsigned int shnum
= this->shnum();
6088 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6089 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6093 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6094 // to these from the linked text sections.
6095 const unsigned char* ps
= pshdrs
+ shdr_size
;
6096 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6098 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6099 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6101 // Found an .ARM.exidx section, add it to the set of reachable
6102 // sections from its linked text section.
6103 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6104 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6109 // Arm_dynobj methods.
6111 // Read the symbol information.
6113 template<bool big_endian
>
6115 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6117 // Call parent class to read symbol information.
6118 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6120 // Read processor-specific flags in ELF file header.
6121 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6122 elfcpp::Elf_sizes
<32>::ehdr_size
,
6124 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6125 this->processor_specific_flags_
= ehdr
.get_e_flags();
6127 // Read the attributes section if there is one.
6128 // We read from the end because gas seems to put it near the end of
6129 // the section headers.
6130 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6131 const unsigned char *ps
=
6132 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6133 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6135 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6136 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6138 section_offset_type section_offset
= shdr
.get_sh_offset();
6139 section_size_type section_size
=
6140 convert_to_section_size_type(shdr
.get_sh_size());
6141 File_view
* view
= this->get_lasting_view(section_offset
,
6142 section_size
, true, false);
6143 this->attributes_section_data_
=
6144 new Attributes_section_data(view
->data(), section_size
);
6150 // Stub_addend_reader methods.
6152 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6154 template<bool big_endian
>
6155 elfcpp::Elf_types
<32>::Elf_Swxword
6156 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6157 unsigned int r_type
,
6158 const unsigned char* view
,
6159 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6161 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
6165 case elfcpp::R_ARM_CALL
:
6166 case elfcpp::R_ARM_JUMP24
:
6167 case elfcpp::R_ARM_PLT32
:
6169 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
6170 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6171 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
6172 return utils::sign_extend
<26>(val
<< 2);
6175 case elfcpp::R_ARM_THM_CALL
:
6176 case elfcpp::R_ARM_THM_JUMP24
:
6177 case elfcpp::R_ARM_THM_XPC22
:
6179 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6180 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6181 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6182 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6183 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
6186 case elfcpp::R_ARM_THM_JUMP19
:
6188 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
6189 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6190 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
6191 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
6192 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
6200 // A class to handle the PLT data.
6202 template<bool big_endian
>
6203 class Output_data_plt_arm
: public Output_section_data
6206 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
6209 Output_data_plt_arm(Layout
*, Output_data_space
*);
6211 // Add an entry to the PLT.
6213 add_entry(Symbol
* gsym
);
6215 // Return the .rel.plt section data.
6216 const Reloc_section
*
6218 { return this->rel_
; }
6222 do_adjust_output_section(Output_section
* os
);
6224 // Write to a map file.
6226 do_print_to_mapfile(Mapfile
* mapfile
) const
6227 { mapfile
->print_output_data(this, _("** PLT")); }
6230 // Template for the first PLT entry.
6231 static const uint32_t first_plt_entry
[5];
6233 // Template for subsequent PLT entries.
6234 static const uint32_t plt_entry
[3];
6236 // Set the final size.
6238 set_final_data_size()
6240 this->set_data_size(sizeof(first_plt_entry
)
6241 + this->count_
* sizeof(plt_entry
));
6244 // Write out the PLT data.
6246 do_write(Output_file
*);
6248 // The reloc section.
6249 Reloc_section
* rel_
;
6250 // The .got.plt section.
6251 Output_data_space
* got_plt_
;
6252 // The number of PLT entries.
6253 unsigned int count_
;
6256 // Create the PLT section. The ordinary .got section is an argument,
6257 // since we need to refer to the start. We also create our own .got
6258 // section just for PLT entries.
6260 template<bool big_endian
>
6261 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
6262 Output_data_space
* got_plt
)
6263 : Output_section_data(4), got_plt_(got_plt
), count_(0)
6265 this->rel_
= new Reloc_section(false);
6266 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
6267 elfcpp::SHF_ALLOC
, this->rel_
, true, false,
6271 template<bool big_endian
>
6273 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
6278 // Add an entry to the PLT.
6280 template<bool big_endian
>
6282 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
6284 gold_assert(!gsym
->has_plt_offset());
6286 // Note that when setting the PLT offset we skip the initial
6287 // reserved PLT entry.
6288 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
6289 + sizeof(first_plt_entry
));
6293 section_offset_type got_offset
= this->got_plt_
->current_data_size();
6295 // Every PLT entry needs a GOT entry which points back to the PLT
6296 // entry (this will be changed by the dynamic linker, normally
6297 // lazily when the function is called).
6298 this->got_plt_
->set_current_data_size(got_offset
+ 4);
6300 // Every PLT entry needs a reloc.
6301 gsym
->set_needs_dynsym_entry();
6302 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
6305 // Note that we don't need to save the symbol. The contents of the
6306 // PLT are independent of which symbols are used. The symbols only
6307 // appear in the relocations.
6311 // FIXME: This is not very flexible. Right now this has only been tested
6312 // on armv5te. If we are to support additional architecture features like
6313 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
6315 // The first entry in the PLT.
6316 template<bool big_endian
>
6317 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
6319 0xe52de004, // str lr, [sp, #-4]!
6320 0xe59fe004, // ldr lr, [pc, #4]
6321 0xe08fe00e, // add lr, pc, lr
6322 0xe5bef008, // ldr pc, [lr, #8]!
6323 0x00000000, // &GOT[0] - .
6326 // Subsequent entries in the PLT.
6328 template<bool big_endian
>
6329 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
6331 0xe28fc600, // add ip, pc, #0xNN00000
6332 0xe28cca00, // add ip, ip, #0xNN000
6333 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
6336 // Write out the PLT. This uses the hand-coded instructions above,
6337 // and adjusts them as needed. This is all specified by the arm ELF
6338 // Processor Supplement.
6340 template<bool big_endian
>
6342 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
6344 const off_t offset
= this->offset();
6345 const section_size_type oview_size
=
6346 convert_to_section_size_type(this->data_size());
6347 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
6349 const off_t got_file_offset
= this->got_plt_
->offset();
6350 const section_size_type got_size
=
6351 convert_to_section_size_type(this->got_plt_
->data_size());
6352 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
6354 unsigned char* pov
= oview
;
6356 Arm_address plt_address
= this->address();
6357 Arm_address got_address
= this->got_plt_
->address();
6359 // Write first PLT entry. All but the last word are constants.
6360 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
6361 / sizeof(plt_entry
[0]));
6362 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
6363 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
6364 // Last word in first PLT entry is &GOT[0] - .
6365 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
6366 got_address
- (plt_address
+ 16));
6367 pov
+= sizeof(first_plt_entry
);
6369 unsigned char* got_pov
= got_view
;
6371 memset(got_pov
, 0, 12);
6374 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6375 unsigned int plt_offset
= sizeof(first_plt_entry
);
6376 unsigned int plt_rel_offset
= 0;
6377 unsigned int got_offset
= 12;
6378 const unsigned int count
= this->count_
;
6379 for (unsigned int i
= 0;
6382 pov
+= sizeof(plt_entry
),
6384 plt_offset
+= sizeof(plt_entry
),
6385 plt_rel_offset
+= rel_size
,
6388 // Set and adjust the PLT entry itself.
6389 int32_t offset
= ((got_address
+ got_offset
)
6390 - (plt_address
+ plt_offset
+ 8));
6392 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
6393 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
6394 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
6395 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
6396 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
6397 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
6398 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
6400 // Set the entry in the GOT.
6401 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
6404 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
6405 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
6407 of
->write_output_view(offset
, oview_size
, oview
);
6408 of
->write_output_view(got_file_offset
, got_size
, got_view
);
6411 // Create a PLT entry for a global symbol.
6413 template<bool big_endian
>
6415 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
6418 if (gsym
->has_plt_offset())
6421 if (this->plt_
== NULL
)
6423 // Create the GOT sections first.
6424 this->got_section(symtab
, layout
);
6426 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
6427 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
6429 | elfcpp::SHF_EXECINSTR
),
6430 this->plt_
, false, false, false, false);
6432 this->plt_
->add_entry(gsym
);
6435 // Report an unsupported relocation against a local symbol.
6437 template<bool big_endian
>
6439 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
6440 Sized_relobj
<32, big_endian
>* object
,
6441 unsigned int r_type
)
6443 gold_error(_("%s: unsupported reloc %u against local symbol"),
6444 object
->name().c_str(), r_type
);
6447 // We are about to emit a dynamic relocation of type R_TYPE. If the
6448 // dynamic linker does not support it, issue an error. The GNU linker
6449 // only issues a non-PIC error for an allocated read-only section.
6450 // Here we know the section is allocated, but we don't know that it is
6451 // read-only. But we check for all the relocation types which the
6452 // glibc dynamic linker supports, so it seems appropriate to issue an
6453 // error even if the section is not read-only.
6455 template<bool big_endian
>
6457 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
6458 unsigned int r_type
)
6462 // These are the relocation types supported by glibc for ARM.
6463 case elfcpp::R_ARM_RELATIVE
:
6464 case elfcpp::R_ARM_COPY
:
6465 case elfcpp::R_ARM_GLOB_DAT
:
6466 case elfcpp::R_ARM_JUMP_SLOT
:
6467 case elfcpp::R_ARM_ABS32
:
6468 case elfcpp::R_ARM_ABS32_NOI
:
6469 case elfcpp::R_ARM_PC24
:
6470 // FIXME: The following 3 types are not supported by Android's dynamic
6472 case elfcpp::R_ARM_TLS_DTPMOD32
:
6473 case elfcpp::R_ARM_TLS_DTPOFF32
:
6474 case elfcpp::R_ARM_TLS_TPOFF32
:
6478 // This prevents us from issuing more than one error per reloc
6479 // section. But we can still wind up issuing more than one
6480 // error per object file.
6481 if (this->issued_non_pic_error_
)
6483 object
->error(_("requires unsupported dynamic reloc; "
6484 "recompile with -fPIC"));
6485 this->issued_non_pic_error_
= true;
6488 case elfcpp::R_ARM_NONE
:
6493 // Scan a relocation for a local symbol.
6494 // FIXME: This only handles a subset of relocation types used by Android
6495 // on ARM v5te devices.
6497 template<bool big_endian
>
6499 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
6502 Sized_relobj
<32, big_endian
>* object
,
6503 unsigned int data_shndx
,
6504 Output_section
* output_section
,
6505 const elfcpp::Rel
<32, big_endian
>& reloc
,
6506 unsigned int r_type
,
6507 const elfcpp::Sym
<32, big_endian
>&)
6509 r_type
= get_real_reloc_type(r_type
);
6512 case elfcpp::R_ARM_NONE
:
6515 case elfcpp::R_ARM_ABS32
:
6516 case elfcpp::R_ARM_ABS32_NOI
:
6517 // If building a shared library (or a position-independent
6518 // executable), we need to create a dynamic relocation for
6519 // this location. The relocation applied at link time will
6520 // apply the link-time value, so we flag the location with
6521 // an R_ARM_RELATIVE relocation so the dynamic loader can
6522 // relocate it easily.
6523 if (parameters
->options().output_is_position_independent())
6525 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6526 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6527 // If we are to add more other reloc types than R_ARM_ABS32,
6528 // we need to add check_non_pic(object, r_type) here.
6529 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
6530 output_section
, data_shndx
,
6531 reloc
.get_r_offset());
6535 case elfcpp::R_ARM_REL32
:
6536 case elfcpp::R_ARM_THM_CALL
:
6537 case elfcpp::R_ARM_CALL
:
6538 case elfcpp::R_ARM_PREL31
:
6539 case elfcpp::R_ARM_JUMP24
:
6540 case elfcpp::R_ARM_THM_JUMP24
:
6541 case elfcpp::R_ARM_THM_JUMP19
:
6542 case elfcpp::R_ARM_PLT32
:
6543 case elfcpp::R_ARM_THM_ABS5
:
6544 case elfcpp::R_ARM_ABS8
:
6545 case elfcpp::R_ARM_ABS12
:
6546 case elfcpp::R_ARM_ABS16
:
6547 case elfcpp::R_ARM_BASE_ABS
:
6548 case elfcpp::R_ARM_MOVW_ABS_NC
:
6549 case elfcpp::R_ARM_MOVT_ABS
:
6550 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
6551 case elfcpp::R_ARM_THM_MOVT_ABS
:
6552 case elfcpp::R_ARM_MOVW_PREL_NC
:
6553 case elfcpp::R_ARM_MOVT_PREL
:
6554 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
6555 case elfcpp::R_ARM_THM_MOVT_PREL
:
6556 case elfcpp::R_ARM_MOVW_BREL_NC
:
6557 case elfcpp::R_ARM_MOVT_BREL
:
6558 case elfcpp::R_ARM_MOVW_BREL
:
6559 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
6560 case elfcpp::R_ARM_THM_MOVT_BREL
:
6561 case elfcpp::R_ARM_THM_MOVW_BREL
:
6562 case elfcpp::R_ARM_THM_JUMP6
:
6563 case elfcpp::R_ARM_THM_JUMP8
:
6564 case elfcpp::R_ARM_THM_JUMP11
:
6565 case elfcpp::R_ARM_V4BX
:
6566 case elfcpp::R_ARM_ALU_PC_G0_NC
:
6567 case elfcpp::R_ARM_ALU_PC_G0
:
6568 case elfcpp::R_ARM_ALU_PC_G1_NC
:
6569 case elfcpp::R_ARM_ALU_PC_G1
:
6570 case elfcpp::R_ARM_ALU_PC_G2
:
6571 case elfcpp::R_ARM_ALU_SB_G0_NC
:
6572 case elfcpp::R_ARM_ALU_SB_G0
:
6573 case elfcpp::R_ARM_ALU_SB_G1_NC
:
6574 case elfcpp::R_ARM_ALU_SB_G1
:
6575 case elfcpp::R_ARM_ALU_SB_G2
:
6576 case elfcpp::R_ARM_LDR_PC_G0
:
6577 case elfcpp::R_ARM_LDR_PC_G1
:
6578 case elfcpp::R_ARM_LDR_PC_G2
:
6579 case elfcpp::R_ARM_LDR_SB_G0
:
6580 case elfcpp::R_ARM_LDR_SB_G1
:
6581 case elfcpp::R_ARM_LDR_SB_G2
:
6582 case elfcpp::R_ARM_LDRS_PC_G0
:
6583 case elfcpp::R_ARM_LDRS_PC_G1
:
6584 case elfcpp::R_ARM_LDRS_PC_G2
:
6585 case elfcpp::R_ARM_LDRS_SB_G0
:
6586 case elfcpp::R_ARM_LDRS_SB_G1
:
6587 case elfcpp::R_ARM_LDRS_SB_G2
:
6588 case elfcpp::R_ARM_LDC_PC_G0
:
6589 case elfcpp::R_ARM_LDC_PC_G1
:
6590 case elfcpp::R_ARM_LDC_PC_G2
:
6591 case elfcpp::R_ARM_LDC_SB_G0
:
6592 case elfcpp::R_ARM_LDC_SB_G1
:
6593 case elfcpp::R_ARM_LDC_SB_G2
:
6596 case elfcpp::R_ARM_GOTOFF32
:
6597 // We need a GOT section:
6598 target
->got_section(symtab
, layout
);
6601 case elfcpp::R_ARM_BASE_PREL
:
6602 // FIXME: What about this?
6605 case elfcpp::R_ARM_GOT_BREL
:
6606 case elfcpp::R_ARM_GOT_PREL
:
6608 // The symbol requires a GOT entry.
6609 Output_data_got
<32, big_endian
>* got
=
6610 target
->got_section(symtab
, layout
);
6611 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6612 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
6614 // If we are generating a shared object, we need to add a
6615 // dynamic RELATIVE relocation for this symbol's GOT entry.
6616 if (parameters
->options().output_is_position_independent())
6618 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6619 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
6620 rel_dyn
->add_local_relative(
6621 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
6622 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
6628 case elfcpp::R_ARM_TARGET1
:
6629 // This should have been mapped to another type already.
6631 case elfcpp::R_ARM_COPY
:
6632 case elfcpp::R_ARM_GLOB_DAT
:
6633 case elfcpp::R_ARM_JUMP_SLOT
:
6634 case elfcpp::R_ARM_RELATIVE
:
6635 // These are relocations which should only be seen by the
6636 // dynamic linker, and should never be seen here.
6637 gold_error(_("%s: unexpected reloc %u in object file"),
6638 object
->name().c_str(), r_type
);
6642 unsupported_reloc_local(object
, r_type
);
6647 // Report an unsupported relocation against a global symbol.
6649 template<bool big_endian
>
6651 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
6652 Sized_relobj
<32, big_endian
>* object
,
6653 unsigned int r_type
,
6656 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
6657 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
6660 // Scan a relocation for a global symbol.
6661 // FIXME: This only handles a subset of relocation types used by Android
6662 // on ARM v5te devices.
6664 template<bool big_endian
>
6666 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
6669 Sized_relobj
<32, big_endian
>* object
,
6670 unsigned int data_shndx
,
6671 Output_section
* output_section
,
6672 const elfcpp::Rel
<32, big_endian
>& reloc
,
6673 unsigned int r_type
,
6676 r_type
= get_real_reloc_type(r_type
);
6679 case elfcpp::R_ARM_NONE
:
6682 case elfcpp::R_ARM_ABS32
:
6683 case elfcpp::R_ARM_ABS32_NOI
:
6685 // Make a dynamic relocation if necessary.
6686 if (gsym
->needs_dynamic_reloc(Symbol::ABSOLUTE_REF
))
6688 if (target
->may_need_copy_reloc(gsym
))
6690 target
->copy_reloc(symtab
, layout
, object
,
6691 data_shndx
, output_section
, gsym
, reloc
);
6693 else if (gsym
->can_use_relative_reloc(false))
6695 // If we are to add more other reloc types than R_ARM_ABS32,
6696 // we need to add check_non_pic(object, r_type) here.
6697 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6698 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
6699 output_section
, object
,
6700 data_shndx
, reloc
.get_r_offset());
6704 // If we are to add more other reloc types than R_ARM_ABS32,
6705 // we need to add check_non_pic(object, r_type) here.
6706 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6707 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
6708 data_shndx
, reloc
.get_r_offset());
6714 case elfcpp::R_ARM_MOVW_ABS_NC
:
6715 case elfcpp::R_ARM_MOVT_ABS
:
6716 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
6717 case elfcpp::R_ARM_THM_MOVT_ABS
:
6718 case elfcpp::R_ARM_MOVW_PREL_NC
:
6719 case elfcpp::R_ARM_MOVT_PREL
:
6720 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
6721 case elfcpp::R_ARM_THM_MOVT_PREL
:
6722 case elfcpp::R_ARM_MOVW_BREL_NC
:
6723 case elfcpp::R_ARM_MOVT_BREL
:
6724 case elfcpp::R_ARM_MOVW_BREL
:
6725 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
6726 case elfcpp::R_ARM_THM_MOVT_BREL
:
6727 case elfcpp::R_ARM_THM_MOVW_BREL
:
6728 case elfcpp::R_ARM_THM_JUMP6
:
6729 case elfcpp::R_ARM_THM_JUMP8
:
6730 case elfcpp::R_ARM_THM_JUMP11
:
6731 case elfcpp::R_ARM_V4BX
:
6732 case elfcpp::R_ARM_ALU_PC_G0_NC
:
6733 case elfcpp::R_ARM_ALU_PC_G0
:
6734 case elfcpp::R_ARM_ALU_PC_G1_NC
:
6735 case elfcpp::R_ARM_ALU_PC_G1
:
6736 case elfcpp::R_ARM_ALU_PC_G2
:
6737 case elfcpp::R_ARM_ALU_SB_G0_NC
:
6738 case elfcpp::R_ARM_ALU_SB_G0
:
6739 case elfcpp::R_ARM_ALU_SB_G1_NC
:
6740 case elfcpp::R_ARM_ALU_SB_G1
:
6741 case elfcpp::R_ARM_ALU_SB_G2
:
6742 case elfcpp::R_ARM_LDR_PC_G0
:
6743 case elfcpp::R_ARM_LDR_PC_G1
:
6744 case elfcpp::R_ARM_LDR_PC_G2
:
6745 case elfcpp::R_ARM_LDR_SB_G0
:
6746 case elfcpp::R_ARM_LDR_SB_G1
:
6747 case elfcpp::R_ARM_LDR_SB_G2
:
6748 case elfcpp::R_ARM_LDRS_PC_G0
:
6749 case elfcpp::R_ARM_LDRS_PC_G1
:
6750 case elfcpp::R_ARM_LDRS_PC_G2
:
6751 case elfcpp::R_ARM_LDRS_SB_G0
:
6752 case elfcpp::R_ARM_LDRS_SB_G1
:
6753 case elfcpp::R_ARM_LDRS_SB_G2
:
6754 case elfcpp::R_ARM_LDC_PC_G0
:
6755 case elfcpp::R_ARM_LDC_PC_G1
:
6756 case elfcpp::R_ARM_LDC_PC_G2
:
6757 case elfcpp::R_ARM_LDC_SB_G0
:
6758 case elfcpp::R_ARM_LDC_SB_G1
:
6759 case elfcpp::R_ARM_LDC_SB_G2
:
6762 case elfcpp::R_ARM_THM_ABS5
:
6763 case elfcpp::R_ARM_ABS8
:
6764 case elfcpp::R_ARM_ABS12
:
6765 case elfcpp::R_ARM_ABS16
:
6766 case elfcpp::R_ARM_BASE_ABS
:
6768 // No dynamic relocs of this kinds.
6769 // Report the error in case of PIC.
6770 int flags
= Symbol::NON_PIC_REF
;
6771 if (gsym
->type() == elfcpp::STT_FUNC
6772 || gsym
->type() == elfcpp::STT_ARM_TFUNC
)
6773 flags
|= Symbol::FUNCTION_CALL
;
6774 if (gsym
->needs_dynamic_reloc(flags
))
6775 check_non_pic(object
, r_type
);
6779 case elfcpp::R_ARM_REL32
:
6780 case elfcpp::R_ARM_PREL31
:
6782 // Make a dynamic relocation if necessary.
6783 int flags
= Symbol::NON_PIC_REF
;
6784 if (gsym
->needs_dynamic_reloc(flags
))
6786 if (target
->may_need_copy_reloc(gsym
))
6788 target
->copy_reloc(symtab
, layout
, object
,
6789 data_shndx
, output_section
, gsym
, reloc
);
6793 check_non_pic(object
, r_type
);
6794 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6795 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
6796 data_shndx
, reloc
.get_r_offset());
6802 case elfcpp::R_ARM_JUMP24
:
6803 case elfcpp::R_ARM_THM_JUMP24
:
6804 case elfcpp::R_ARM_THM_JUMP19
:
6805 case elfcpp::R_ARM_CALL
:
6806 case elfcpp::R_ARM_THM_CALL
:
6808 if (Target_arm
<big_endian
>::Scan::symbol_needs_plt_entry(gsym
))
6809 target
->make_plt_entry(symtab
, layout
, gsym
);
6812 // Check to see if this is a function that would need a PLT
6813 // but does not get one because the function symbol is untyped.
6814 // This happens in assembly code missing a proper .type directive.
6815 if ((!gsym
->is_undefined() || parameters
->options().shared())
6816 && !parameters
->doing_static_link()
6817 && gsym
->type() == elfcpp::STT_NOTYPE
6818 && (gsym
->is_from_dynobj()
6819 || gsym
->is_undefined()
6820 || gsym
->is_preemptible()))
6821 gold_error(_("%s is not a function."),
6822 gsym
->demangled_name().c_str());
6826 case elfcpp::R_ARM_PLT32
:
6827 // If the symbol is fully resolved, this is just a relative
6828 // local reloc. Otherwise we need a PLT entry.
6829 if (gsym
->final_value_is_known())
6831 // If building a shared library, we can also skip the PLT entry
6832 // if the symbol is defined in the output file and is protected
6834 if (gsym
->is_defined()
6835 && !gsym
->is_from_dynobj()
6836 && !gsym
->is_preemptible())
6838 target
->make_plt_entry(symtab
, layout
, gsym
);
6841 case elfcpp::R_ARM_GOTOFF32
:
6842 // We need a GOT section.
6843 target
->got_section(symtab
, layout
);
6846 case elfcpp::R_ARM_BASE_PREL
:
6847 // FIXME: What about this?
6850 case elfcpp::R_ARM_GOT_BREL
:
6851 case elfcpp::R_ARM_GOT_PREL
:
6853 // The symbol requires a GOT entry.
6854 Output_data_got
<32, big_endian
>* got
=
6855 target
->got_section(symtab
, layout
);
6856 if (gsym
->final_value_is_known())
6857 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
6860 // If this symbol is not fully resolved, we need to add a
6861 // GOT entry with a dynamic relocation.
6862 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
6863 if (gsym
->is_from_dynobj()
6864 || gsym
->is_undefined()
6865 || gsym
->is_preemptible())
6866 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
6867 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
6870 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
6871 rel_dyn
->add_global_relative(
6872 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
6873 gsym
->got_offset(GOT_TYPE_STANDARD
));
6879 case elfcpp::R_ARM_TARGET1
:
6880 // This should have been mapped to another type already.
6882 case elfcpp::R_ARM_COPY
:
6883 case elfcpp::R_ARM_GLOB_DAT
:
6884 case elfcpp::R_ARM_JUMP_SLOT
:
6885 case elfcpp::R_ARM_RELATIVE
:
6886 // These are relocations which should only be seen by the
6887 // dynamic linker, and should never be seen here.
6888 gold_error(_("%s: unexpected reloc %u in object file"),
6889 object
->name().c_str(), r_type
);
6893 unsupported_reloc_global(object
, r_type
, gsym
);
6898 // Process relocations for gc.
6900 template<bool big_endian
>
6902 Target_arm
<big_endian
>::gc_process_relocs(Symbol_table
* symtab
,
6904 Sized_relobj
<32, big_endian
>* object
,
6905 unsigned int data_shndx
,
6907 const unsigned char* prelocs
,
6909 Output_section
* output_section
,
6910 bool needs_special_offset_handling
,
6911 size_t local_symbol_count
,
6912 const unsigned char* plocal_symbols
)
6914 typedef Target_arm
<big_endian
> Arm
;
6915 typedef typename Target_arm
<big_endian
>::Scan Scan
;
6917 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
>(
6926 needs_special_offset_handling
,
6931 // Scan relocations for a section.
6933 template<bool big_endian
>
6935 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
6937 Sized_relobj
<32, big_endian
>* object
,
6938 unsigned int data_shndx
,
6939 unsigned int sh_type
,
6940 const unsigned char* prelocs
,
6942 Output_section
* output_section
,
6943 bool needs_special_offset_handling
,
6944 size_t local_symbol_count
,
6945 const unsigned char* plocal_symbols
)
6947 typedef typename Target_arm
<big_endian
>::Scan Scan
;
6948 if (sh_type
== elfcpp::SHT_RELA
)
6950 gold_error(_("%s: unsupported RELA reloc section"),
6951 object
->name().c_str());
6955 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
6964 needs_special_offset_handling
,
6969 // Finalize the sections.
6971 template<bool big_endian
>
6973 Target_arm
<big_endian
>::do_finalize_sections(
6975 const Input_objects
* input_objects
,
6976 Symbol_table
* symtab
)
6978 // Merge processor-specific flags.
6979 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
6980 p
!= input_objects
->relobj_end();
6983 Arm_relobj
<big_endian
>* arm_relobj
=
6984 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
6985 this->merge_processor_specific_flags(
6987 arm_relobj
->processor_specific_flags());
6988 this->merge_object_attributes(arm_relobj
->name().c_str(),
6989 arm_relobj
->attributes_section_data());
6993 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
6994 p
!= input_objects
->dynobj_end();
6997 Arm_dynobj
<big_endian
>* arm_dynobj
=
6998 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
6999 this->merge_processor_specific_flags(
7001 arm_dynobj
->processor_specific_flags());
7002 this->merge_object_attributes(arm_dynobj
->name().c_str(),
7003 arm_dynobj
->attributes_section_data());
7007 const Object_attribute
* cpu_arch_attr
=
7008 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
7009 if (cpu_arch_attr
->int_value() > elfcpp::TAG_CPU_ARCH_V4
)
7010 this->set_may_use_blx(true);
7012 // Check if we need to use Cortex-A8 workaround.
7013 if (parameters
->options().user_set_fix_cortex_a8())
7014 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
7017 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
7018 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
7020 const Object_attribute
* cpu_arch_profile_attr
=
7021 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
7022 this->fix_cortex_a8_
=
7023 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
7024 && (cpu_arch_profile_attr
->int_value() == 'A'
7025 || cpu_arch_profile_attr
->int_value() == 0));
7028 // Check if we can use V4BX interworking.
7029 // The V4BX interworking stub contains BX instruction,
7030 // which is not specified for some profiles.
7031 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
7032 && !this->may_use_blx())
7033 gold_error(_("unable to provide V4BX reloc interworking fix up; "
7034 "the target profile does not support BX instruction"));
7036 // Fill in some more dynamic tags.
7037 const Reloc_section
* rel_plt
= (this->plt_
== NULL
7039 : this->plt_
->rel_plt());
7040 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
7041 this->rel_dyn_
, true);
7043 // Emit any relocs we saved in an attempt to avoid generating COPY
7045 if (this->copy_relocs_
.any_saved_relocs())
7046 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
7048 // Handle the .ARM.exidx section.
7049 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
7050 if (exidx_section
!= NULL
7051 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
7052 && !parameters
->options().relocatable())
7054 // Create __exidx_start and __exdix_end symbols.
7055 symtab
->define_in_output_data("__exidx_start", NULL
,
7056 Symbol_table::PREDEFINED
,
7057 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
7058 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
7060 symtab
->define_in_output_data("__exidx_end", NULL
,
7061 Symbol_table::PREDEFINED
,
7062 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
7063 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
7066 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
7067 // the .ARM.exidx section.
7068 if (!layout
->script_options()->saw_phdrs_clause())
7070 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0, 0)
7072 Output_segment
* exidx_segment
=
7073 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
7074 exidx_segment
->add_output_section(exidx_section
, elfcpp::PF_R
,
7079 // Create an .ARM.attributes section if there is not one already.
7080 Output_attributes_section_data
* attributes_section
=
7081 new Output_attributes_section_data(*this->attributes_section_data_
);
7082 layout
->add_output_section_data(".ARM.attributes",
7083 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
7084 attributes_section
, false, false, false,
7088 // Return whether a direct absolute static relocation needs to be applied.
7089 // In cases where Scan::local() or Scan::global() has created
7090 // a dynamic relocation other than R_ARM_RELATIVE, the addend
7091 // of the relocation is carried in the data, and we must not
7092 // apply the static relocation.
7094 template<bool big_endian
>
7096 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
7097 const Sized_symbol
<32>* gsym
,
7100 Output_section
* output_section
)
7102 // If the output section is not allocated, then we didn't call
7103 // scan_relocs, we didn't create a dynamic reloc, and we must apply
7105 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
7108 // For local symbols, we will have created a non-RELATIVE dynamic
7109 // relocation only if (a) the output is position independent,
7110 // (b) the relocation is absolute (not pc- or segment-relative), and
7111 // (c) the relocation is not 32 bits wide.
7113 return !(parameters
->options().output_is_position_independent()
7114 && (ref_flags
& Symbol::ABSOLUTE_REF
)
7117 // For global symbols, we use the same helper routines used in the
7118 // scan pass. If we did not create a dynamic relocation, or if we
7119 // created a RELATIVE dynamic relocation, we should apply the static
7121 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
7122 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
7123 && gsym
->can_use_relative_reloc(ref_flags
7124 & Symbol::FUNCTION_CALL
);
7125 return !has_dyn
|| is_rel
;
7128 // Perform a relocation.
7130 template<bool big_endian
>
7132 Target_arm
<big_endian
>::Relocate::relocate(
7133 const Relocate_info
<32, big_endian
>* relinfo
,
7135 Output_section
*output_section
,
7137 const elfcpp::Rel
<32, big_endian
>& rel
,
7138 unsigned int r_type
,
7139 const Sized_symbol
<32>* gsym
,
7140 const Symbol_value
<32>* psymval
,
7141 unsigned char* view
,
7142 Arm_address address
,
7143 section_size_type
/* view_size */ )
7145 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
7147 r_type
= get_real_reloc_type(r_type
);
7149 const Arm_relobj
<big_endian
>* object
=
7150 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
7152 // If the final branch target of a relocation is THUMB instruction, this
7153 // is 1. Otherwise it is 0.
7154 Arm_address thumb_bit
= 0;
7155 Symbol_value
<32> symval
;
7156 bool is_weakly_undefined_without_plt
= false;
7157 if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
7161 // This is a global symbol. Determine if we use PLT and if the
7162 // final target is THUMB.
7163 if (gsym
->use_plt_offset(reloc_is_non_pic(r_type
)))
7165 // This uses a PLT, change the symbol value.
7166 symval
.set_output_value(target
->plt_section()->address()
7167 + gsym
->plt_offset());
7170 else if (gsym
->is_weak_undefined())
7172 // This is a weakly undefined symbol and we do not use PLT
7173 // for this relocation. A branch targeting this symbol will
7174 // be converted into an NOP.
7175 is_weakly_undefined_without_plt
= true;
7179 // Set thumb bit if symbol:
7180 // -Has type STT_ARM_TFUNC or
7181 // -Has type STT_FUNC, is defined and with LSB in value set.
7183 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
7184 || (gsym
->type() == elfcpp::STT_FUNC
7185 && !gsym
->is_undefined()
7186 && ((psymval
->value(object
, 0) & 1) != 0)))
7193 // This is a local symbol. Determine if the final target is THUMB.
7194 // We saved this information when all the local symbols were read.
7195 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
7196 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
7197 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
7202 // This is a fake relocation synthesized for a stub. It does not have
7203 // a real symbol. We just look at the LSB of the symbol value to
7204 // determine if the target is THUMB or not.
7205 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
7208 // Strip LSB if this points to a THUMB target.
7210 && Target_arm
<big_endian
>::reloc_uses_thumb_bit(r_type
)
7211 && ((psymval
->value(object
, 0) & 1) != 0))
7213 Arm_address stripped_value
=
7214 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
7215 symval
.set_output_value(stripped_value
);
7219 // Get the GOT offset if needed.
7220 // The GOT pointer points to the end of the GOT section.
7221 // We need to subtract the size of the GOT section to get
7222 // the actual offset to use in the relocation.
7223 bool have_got_offset
= false;
7224 unsigned int got_offset
= 0;
7227 case elfcpp::R_ARM_GOT_BREL
:
7228 case elfcpp::R_ARM_GOT_PREL
:
7231 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
7232 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
7233 - target
->got_size());
7237 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
7238 gold_assert(object
->local_has_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7239 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
7240 - target
->got_size());
7242 have_got_offset
= true;
7249 // To look up relocation stubs, we need to pass the symbol table index of
7251 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
7253 // Get the addressing origin of the output segment defining the
7254 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
7255 Arm_address sym_origin
= 0;
7256 if (Relocate::reloc_needs_sym_origin(r_type
))
7258 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
7259 // R_ARM_BASE_ABS with the NULL symbol will give the
7260 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
7261 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
7262 sym_origin
= target
->got_plt_section()->address();
7263 else if (gsym
== NULL
)
7265 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
7266 sym_origin
= gsym
->output_segment()->vaddr();
7267 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
7268 sym_origin
= gsym
->output_data()->address();
7270 // TODO: Assumes the segment base to be zero for the global symbols
7271 // till the proper support for the segment-base-relative addressing
7272 // will be implemented. This is consistent with GNU ld.
7275 typename
Arm_relocate_functions::Status reloc_status
=
7276 Arm_relocate_functions::STATUS_OKAY
;
7279 case elfcpp::R_ARM_NONE
:
7282 case elfcpp::R_ARM_ABS8
:
7283 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7285 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
7288 case elfcpp::R_ARM_ABS12
:
7289 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7291 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
7294 case elfcpp::R_ARM_ABS16
:
7295 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7297 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
7300 case elfcpp::R_ARM_ABS32
:
7301 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7303 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
7307 case elfcpp::R_ARM_ABS32_NOI
:
7308 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7310 // No thumb bit for this relocation: (S + A)
7311 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
7315 case elfcpp::R_ARM_MOVW_ABS_NC
:
7316 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7318 reloc_status
= Arm_relocate_functions::movw_abs_nc(view
, object
,
7322 gold_error(_("relocation R_ARM_MOVW_ABS_NC cannot be used when making"
7323 "a shared object; recompile with -fPIC"));
7326 case elfcpp::R_ARM_MOVT_ABS
:
7327 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7329 reloc_status
= Arm_relocate_functions::movt_abs(view
, object
, psymval
);
7331 gold_error(_("relocation R_ARM_MOVT_ABS cannot be used when making"
7332 "a shared object; recompile with -fPIC"));
7335 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7336 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7338 reloc_status
= Arm_relocate_functions::thm_movw_abs_nc(view
, object
,
7342 gold_error(_("relocation R_ARM_THM_MOVW_ABS_NC cannot be used when"
7343 "making a shared object; recompile with -fPIC"));
7346 case elfcpp::R_ARM_THM_MOVT_ABS
:
7347 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7349 reloc_status
= Arm_relocate_functions::thm_movt_abs(view
, object
,
7352 gold_error(_("relocation R_ARM_THM_MOVT_ABS cannot be used when"
7353 "making a shared object; recompile with -fPIC"));
7356 case elfcpp::R_ARM_MOVW_PREL_NC
:
7357 reloc_status
= Arm_relocate_functions::movw_rel_nc(view
, object
,
7362 case elfcpp::R_ARM_MOVW_BREL_NC
:
7363 reloc_status
= Arm_relocate_functions::movw_rel_nc(view
, object
,
7364 psymval
, sym_origin
,
7368 case elfcpp::R_ARM_MOVW_BREL
:
7369 reloc_status
= Arm_relocate_functions::movw_rel(view
, object
,
7370 psymval
, sym_origin
,
7374 case elfcpp::R_ARM_MOVT_PREL
:
7375 reloc_status
= Arm_relocate_functions::movt_rel(view
, object
,
7379 case elfcpp::R_ARM_MOVT_BREL
:
7380 reloc_status
= Arm_relocate_functions::movt_rel(view
, object
,
7381 psymval
, sym_origin
);
7384 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7385 reloc_status
= Arm_relocate_functions::thm_movw_rel_nc(view
, object
,
7390 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7391 reloc_status
= Arm_relocate_functions::thm_movw_rel_nc(view
, object
,
7397 case elfcpp::R_ARM_THM_MOVW_BREL
:
7398 reloc_status
= Arm_relocate_functions::thm_movw_rel(view
, object
,
7399 psymval
, sym_origin
,
7403 case elfcpp::R_ARM_THM_MOVT_PREL
:
7404 reloc_status
= Arm_relocate_functions::thm_movt_rel(view
, object
,
7408 case elfcpp::R_ARM_THM_MOVT_BREL
:
7409 reloc_status
= Arm_relocate_functions::thm_movt_rel(view
, object
,
7410 psymval
, sym_origin
);
7413 case elfcpp::R_ARM_REL32
:
7414 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
7415 address
, thumb_bit
);
7418 case elfcpp::R_ARM_THM_ABS5
:
7419 if (should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, false,
7421 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
7424 case elfcpp::R_ARM_THM_CALL
:
7426 Arm_relocate_functions::thm_call(relinfo
, view
, gsym
, object
, r_sym
,
7427 psymval
, address
, thumb_bit
,
7428 is_weakly_undefined_without_plt
);
7431 case elfcpp::R_ARM_XPC25
:
7433 Arm_relocate_functions::xpc25(relinfo
, view
, gsym
, object
, r_sym
,
7434 psymval
, address
, thumb_bit
,
7435 is_weakly_undefined_without_plt
);
7438 case elfcpp::R_ARM_THM_XPC22
:
7440 Arm_relocate_functions::thm_xpc22(relinfo
, view
, gsym
, object
, r_sym
,
7441 psymval
, address
, thumb_bit
,
7442 is_weakly_undefined_without_plt
);
7445 case elfcpp::R_ARM_GOTOFF32
:
7447 Arm_address got_origin
;
7448 got_origin
= target
->got_plt_section()->address();
7449 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
7450 got_origin
, thumb_bit
);
7454 case elfcpp::R_ARM_BASE_PREL
:
7455 gold_assert(gsym
!= NULL
);
7457 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
7460 case elfcpp::R_ARM_BASE_ABS
:
7462 if (!should_apply_static_reloc(gsym
, Symbol::ABSOLUTE_REF
, true,
7466 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
7470 case elfcpp::R_ARM_GOT_BREL
:
7471 gold_assert(have_got_offset
);
7472 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
7475 case elfcpp::R_ARM_GOT_PREL
:
7476 gold_assert(have_got_offset
);
7477 // Get the address origin for GOT PLT, which is allocated right
7478 // after the GOT section, to calculate an absolute address of
7479 // the symbol GOT entry (got_origin + got_offset).
7480 Arm_address got_origin
;
7481 got_origin
= target
->got_plt_section()->address();
7482 reloc_status
= Arm_relocate_functions::got_prel(view
,
7483 got_origin
+ got_offset
,
7487 case elfcpp::R_ARM_PLT32
:
7488 gold_assert(gsym
== NULL
7489 || gsym
->has_plt_offset()
7490 || gsym
->final_value_is_known()
7491 || (gsym
->is_defined()
7492 && !gsym
->is_from_dynobj()
7493 && !gsym
->is_preemptible()));
7495 Arm_relocate_functions::plt32(relinfo
, view
, gsym
, object
, r_sym
,
7496 psymval
, address
, thumb_bit
,
7497 is_weakly_undefined_without_plt
);
7500 case elfcpp::R_ARM_CALL
:
7502 Arm_relocate_functions::call(relinfo
, view
, gsym
, object
, r_sym
,
7503 psymval
, address
, thumb_bit
,
7504 is_weakly_undefined_without_plt
);
7507 case elfcpp::R_ARM_JUMP24
:
7509 Arm_relocate_functions::jump24(relinfo
, view
, gsym
, object
, r_sym
,
7510 psymval
, address
, thumb_bit
,
7511 is_weakly_undefined_without_plt
);
7514 case elfcpp::R_ARM_THM_JUMP24
:
7516 Arm_relocate_functions::thm_jump24(relinfo
, view
, gsym
, object
, r_sym
,
7517 psymval
, address
, thumb_bit
,
7518 is_weakly_undefined_without_plt
);
7521 case elfcpp::R_ARM_THM_JUMP19
:
7523 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
7527 case elfcpp::R_ARM_THM_JUMP6
:
7529 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
7532 case elfcpp::R_ARM_THM_JUMP8
:
7534 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
7537 case elfcpp::R_ARM_THM_JUMP11
:
7539 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
7542 case elfcpp::R_ARM_PREL31
:
7543 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
7544 address
, thumb_bit
);
7547 case elfcpp::R_ARM_V4BX
:
7548 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
7550 const bool is_v4bx_interworking
=
7551 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
7553 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
7554 is_v4bx_interworking
);
7558 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7560 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7561 address
, thumb_bit
, false);
7564 case elfcpp::R_ARM_ALU_PC_G0
:
7566 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7567 address
, thumb_bit
, true);
7570 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7572 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7573 address
, thumb_bit
, false);
7576 case elfcpp::R_ARM_ALU_PC_G1
:
7578 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7579 address
, thumb_bit
, true);
7582 case elfcpp::R_ARM_ALU_PC_G2
:
7584 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 2,
7585 address
, thumb_bit
, true);
7588 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7590 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7591 sym_origin
, thumb_bit
, false);
7594 case elfcpp::R_ARM_ALU_SB_G0
:
7596 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 0,
7597 sym_origin
, thumb_bit
, true);
7600 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7602 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7603 sym_origin
, thumb_bit
, false);
7606 case elfcpp::R_ARM_ALU_SB_G1
:
7608 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 1,
7609 sym_origin
, thumb_bit
, true);
7612 case elfcpp::R_ARM_ALU_SB_G2
:
7614 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
, 2,
7615 sym_origin
, thumb_bit
, true);
7618 case elfcpp::R_ARM_LDR_PC_G0
:
7620 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 0,
7624 case elfcpp::R_ARM_LDR_PC_G1
:
7626 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 1,
7630 case elfcpp::R_ARM_LDR_PC_G2
:
7632 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 2,
7636 case elfcpp::R_ARM_LDR_SB_G0
:
7638 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 0,
7642 case elfcpp::R_ARM_LDR_SB_G1
:
7644 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 1,
7648 case elfcpp::R_ARM_LDR_SB_G2
:
7650 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
, 2,
7654 case elfcpp::R_ARM_LDRS_PC_G0
:
7656 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 0,
7660 case elfcpp::R_ARM_LDRS_PC_G1
:
7662 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 1,
7666 case elfcpp::R_ARM_LDRS_PC_G2
:
7668 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 2,
7672 case elfcpp::R_ARM_LDRS_SB_G0
:
7674 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 0,
7678 case elfcpp::R_ARM_LDRS_SB_G1
:
7680 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 1,
7684 case elfcpp::R_ARM_LDRS_SB_G2
:
7686 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
, 2,
7690 case elfcpp::R_ARM_LDC_PC_G0
:
7692 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 0,
7696 case elfcpp::R_ARM_LDC_PC_G1
:
7698 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 1,
7702 case elfcpp::R_ARM_LDC_PC_G2
:
7704 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 2,
7708 case elfcpp::R_ARM_LDC_SB_G0
:
7710 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 0,
7714 case elfcpp::R_ARM_LDC_SB_G1
:
7716 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 1,
7720 case elfcpp::R_ARM_LDC_SB_G2
:
7722 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
, 2,
7726 case elfcpp::R_ARM_TARGET1
:
7727 // This should have been mapped to another type already.
7729 case elfcpp::R_ARM_COPY
:
7730 case elfcpp::R_ARM_GLOB_DAT
:
7731 case elfcpp::R_ARM_JUMP_SLOT
:
7732 case elfcpp::R_ARM_RELATIVE
:
7733 // These are relocations which should only be seen by the
7734 // dynamic linker, and should never be seen here.
7735 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7736 _("unexpected reloc %u in object file"),
7741 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7742 _("unsupported reloc %u"),
7747 // Report any errors.
7748 switch (reloc_status
)
7750 case Arm_relocate_functions::STATUS_OKAY
:
7752 case Arm_relocate_functions::STATUS_OVERFLOW
:
7753 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
7754 _("relocation overflow in relocation %u"),
7757 case Arm_relocate_functions::STATUS_BAD_RELOC
:
7758 gold_error_at_location(
7762 _("unexpected opcode while processing relocation %u"),
7772 // Relocate section data.
7774 template<bool big_endian
>
7776 Target_arm
<big_endian
>::relocate_section(
7777 const Relocate_info
<32, big_endian
>* relinfo
,
7778 unsigned int sh_type
,
7779 const unsigned char* prelocs
,
7781 Output_section
* output_section
,
7782 bool needs_special_offset_handling
,
7783 unsigned char* view
,
7784 Arm_address address
,
7785 section_size_type view_size
,
7786 const Reloc_symbol_changes
* reloc_symbol_changes
)
7788 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
7789 gold_assert(sh_type
== elfcpp::SHT_REL
);
7791 Arm_input_section
<big_endian
>* arm_input_section
=
7792 this->find_arm_input_section(relinfo
->object
, relinfo
->data_shndx
);
7794 // This is an ARM input section and the view covers the whole output
7796 if (arm_input_section
!= NULL
)
7798 gold_assert(needs_special_offset_handling
);
7799 Arm_address section_address
= arm_input_section
->address();
7800 section_size_type section_size
= arm_input_section
->data_size();
7802 gold_assert((arm_input_section
->address() >= address
)
7803 && ((arm_input_section
->address()
7804 + arm_input_section
->data_size())
7805 <= (address
+ view_size
)));
7807 off_t offset
= section_address
- address
;
7810 view_size
= section_size
;
7813 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
7820 needs_special_offset_handling
,
7824 reloc_symbol_changes
);
7827 // Return the size of a relocation while scanning during a relocatable
7830 template<bool big_endian
>
7832 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
7833 unsigned int r_type
,
7836 r_type
= get_real_reloc_type(r_type
);
7839 case elfcpp::R_ARM_NONE
:
7842 case elfcpp::R_ARM_ABS8
:
7845 case elfcpp::R_ARM_ABS16
:
7846 case elfcpp::R_ARM_THM_ABS5
:
7847 case elfcpp::R_ARM_THM_JUMP6
:
7848 case elfcpp::R_ARM_THM_JUMP8
:
7849 case elfcpp::R_ARM_THM_JUMP11
:
7852 case elfcpp::R_ARM_ABS32
:
7853 case elfcpp::R_ARM_ABS32_NOI
:
7854 case elfcpp::R_ARM_ABS12
:
7855 case elfcpp::R_ARM_BASE_ABS
:
7856 case elfcpp::R_ARM_REL32
:
7857 case elfcpp::R_ARM_THM_CALL
:
7858 case elfcpp::R_ARM_GOTOFF32
:
7859 case elfcpp::R_ARM_BASE_PREL
:
7860 case elfcpp::R_ARM_GOT_BREL
:
7861 case elfcpp::R_ARM_GOT_PREL
:
7862 case elfcpp::R_ARM_PLT32
:
7863 case elfcpp::R_ARM_CALL
:
7864 case elfcpp::R_ARM_JUMP24
:
7865 case elfcpp::R_ARM_PREL31
:
7866 case elfcpp::R_ARM_MOVW_ABS_NC
:
7867 case elfcpp::R_ARM_MOVT_ABS
:
7868 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7869 case elfcpp::R_ARM_THM_MOVT_ABS
:
7870 case elfcpp::R_ARM_MOVW_PREL_NC
:
7871 case elfcpp::R_ARM_MOVT_PREL
:
7872 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7873 case elfcpp::R_ARM_THM_MOVT_PREL
:
7874 case elfcpp::R_ARM_MOVW_BREL_NC
:
7875 case elfcpp::R_ARM_MOVT_BREL
:
7876 case elfcpp::R_ARM_MOVW_BREL
:
7877 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7878 case elfcpp::R_ARM_THM_MOVT_BREL
:
7879 case elfcpp::R_ARM_THM_MOVW_BREL
:
7880 case elfcpp::R_ARM_V4BX
:
7881 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7882 case elfcpp::R_ARM_ALU_PC_G0
:
7883 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7884 case elfcpp::R_ARM_ALU_PC_G1
:
7885 case elfcpp::R_ARM_ALU_PC_G2
:
7886 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7887 case elfcpp::R_ARM_ALU_SB_G0
:
7888 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7889 case elfcpp::R_ARM_ALU_SB_G1
:
7890 case elfcpp::R_ARM_ALU_SB_G2
:
7891 case elfcpp::R_ARM_LDR_PC_G0
:
7892 case elfcpp::R_ARM_LDR_PC_G1
:
7893 case elfcpp::R_ARM_LDR_PC_G2
:
7894 case elfcpp::R_ARM_LDR_SB_G0
:
7895 case elfcpp::R_ARM_LDR_SB_G1
:
7896 case elfcpp::R_ARM_LDR_SB_G2
:
7897 case elfcpp::R_ARM_LDRS_PC_G0
:
7898 case elfcpp::R_ARM_LDRS_PC_G1
:
7899 case elfcpp::R_ARM_LDRS_PC_G2
:
7900 case elfcpp::R_ARM_LDRS_SB_G0
:
7901 case elfcpp::R_ARM_LDRS_SB_G1
:
7902 case elfcpp::R_ARM_LDRS_SB_G2
:
7903 case elfcpp::R_ARM_LDC_PC_G0
:
7904 case elfcpp::R_ARM_LDC_PC_G1
:
7905 case elfcpp::R_ARM_LDC_PC_G2
:
7906 case elfcpp::R_ARM_LDC_SB_G0
:
7907 case elfcpp::R_ARM_LDC_SB_G1
:
7908 case elfcpp::R_ARM_LDC_SB_G2
:
7911 case elfcpp::R_ARM_TARGET1
:
7912 // This should have been mapped to another type already.
7914 case elfcpp::R_ARM_COPY
:
7915 case elfcpp::R_ARM_GLOB_DAT
:
7916 case elfcpp::R_ARM_JUMP_SLOT
:
7917 case elfcpp::R_ARM_RELATIVE
:
7918 // These are relocations which should only be seen by the
7919 // dynamic linker, and should never be seen here.
7920 gold_error(_("%s: unexpected reloc %u in object file"),
7921 object
->name().c_str(), r_type
);
7925 object
->error(_("unsupported reloc %u in object file"), r_type
);
7930 // Scan the relocs during a relocatable link.
7932 template<bool big_endian
>
7934 Target_arm
<big_endian
>::scan_relocatable_relocs(
7935 Symbol_table
* symtab
,
7937 Sized_relobj
<32, big_endian
>* object
,
7938 unsigned int data_shndx
,
7939 unsigned int sh_type
,
7940 const unsigned char* prelocs
,
7942 Output_section
* output_section
,
7943 bool needs_special_offset_handling
,
7944 size_t local_symbol_count
,
7945 const unsigned char* plocal_symbols
,
7946 Relocatable_relocs
* rr
)
7948 gold_assert(sh_type
== elfcpp::SHT_REL
);
7950 typedef gold::Default_scan_relocatable_relocs
<elfcpp::SHT_REL
,
7951 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
7953 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
7954 Scan_relocatable_relocs
>(
7962 needs_special_offset_handling
,
7968 // Relocate a section during a relocatable link.
7970 template<bool big_endian
>
7972 Target_arm
<big_endian
>::relocate_for_relocatable(
7973 const Relocate_info
<32, big_endian
>* relinfo
,
7974 unsigned int sh_type
,
7975 const unsigned char* prelocs
,
7977 Output_section
* output_section
,
7978 off_t offset_in_output_section
,
7979 const Relocatable_relocs
* rr
,
7980 unsigned char* view
,
7981 Arm_address view_address
,
7982 section_size_type view_size
,
7983 unsigned char* reloc_view
,
7984 section_size_type reloc_view_size
)
7986 gold_assert(sh_type
== elfcpp::SHT_REL
);
7988 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
7993 offset_in_output_section
,
8002 // Return the value to use for a dynamic symbol which requires special
8003 // treatment. This is how we support equality comparisons of function
8004 // pointers across shared library boundaries, as described in the
8005 // processor specific ABI supplement.
8007 template<bool big_endian
>
8009 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
8011 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
8012 return this->plt_section()->address() + gsym
->plt_offset();
8015 // Map platform-specific relocs to real relocs
8017 template<bool big_endian
>
8019 Target_arm
<big_endian
>::get_real_reloc_type (unsigned int r_type
)
8023 case elfcpp::R_ARM_TARGET1
:
8024 // This is either R_ARM_ABS32 or R_ARM_REL32;
8025 return elfcpp::R_ARM_ABS32
;
8027 case elfcpp::R_ARM_TARGET2
:
8028 // This can be any reloc type but ususally is R_ARM_GOT_PREL
8029 return elfcpp::R_ARM_GOT_PREL
;
8036 // Whether if two EABI versions V1 and V2 are compatible.
8038 template<bool big_endian
>
8040 Target_arm
<big_endian
>::are_eabi_versions_compatible(
8041 elfcpp::Elf_Word v1
,
8042 elfcpp::Elf_Word v2
)
8044 // v4 and v5 are the same spec before and after it was released,
8045 // so allow mixing them.
8046 if ((v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
8047 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
8053 // Combine FLAGS from an input object called NAME and the processor-specific
8054 // flags in the ELF header of the output. Much of this is adapted from the
8055 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
8056 // in bfd/elf32-arm.c.
8058 template<bool big_endian
>
8060 Target_arm
<big_endian
>::merge_processor_specific_flags(
8061 const std::string
& name
,
8062 elfcpp::Elf_Word flags
)
8064 if (this->are_processor_specific_flags_set())
8066 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
8068 // Nothing to merge if flags equal to those in output.
8069 if (flags
== out_flags
)
8072 // Complain about various flag mismatches.
8073 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
8074 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
8075 if (!this->are_eabi_versions_compatible(version1
, version2
))
8076 gold_error(_("Source object %s has EABI version %d but output has "
8077 "EABI version %d."),
8079 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
8080 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
8084 // If the input is the default architecture and had the default
8085 // flags then do not bother setting the flags for the output
8086 // architecture, instead allow future merges to do this. If no
8087 // future merges ever set these flags then they will retain their
8088 // uninitialised values, which surprise surprise, correspond
8089 // to the default values.
8093 // This is the first time, just copy the flags.
8094 // We only copy the EABI version for now.
8095 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
8099 // Adjust ELF file header.
8100 template<bool big_endian
>
8102 Target_arm
<big_endian
>::do_adjust_elf_header(
8103 unsigned char* view
,
8106 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
8108 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
8109 unsigned char e_ident
[elfcpp::EI_NIDENT
];
8110 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
8112 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
8113 == elfcpp::EF_ARM_EABI_UNKNOWN
)
8114 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
8116 e_ident
[elfcpp::EI_OSABI
] = 0;
8117 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
8119 // FIXME: Do EF_ARM_BE8 adjustment.
8121 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
8122 oehdr
.put_e_ident(e_ident
);
8125 // do_make_elf_object to override the same function in the base class.
8126 // We need to use a target-specific sub-class of Sized_relobj<32, big_endian>
8127 // to store ARM specific information. Hence we need to have our own
8128 // ELF object creation.
8130 template<bool big_endian
>
8132 Target_arm
<big_endian
>::do_make_elf_object(
8133 const std::string
& name
,
8134 Input_file
* input_file
,
8135 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
8137 int et
= ehdr
.get_e_type();
8138 if (et
== elfcpp::ET_REL
)
8140 Arm_relobj
<big_endian
>* obj
=
8141 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
8145 else if (et
== elfcpp::ET_DYN
)
8147 Sized_dynobj
<32, big_endian
>* obj
=
8148 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
8154 gold_error(_("%s: unsupported ELF file type %d"),
8160 // Read the architecture from the Tag_also_compatible_with attribute, if any.
8161 // Returns -1 if no architecture could be read.
8162 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
8164 template<bool big_endian
>
8166 Target_arm
<big_endian
>::get_secondary_compatible_arch(
8167 const Attributes_section_data
* pasd
)
8169 const Object_attribute
*known_attributes
=
8170 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
8172 // Note: the tag and its argument below are uleb128 values, though
8173 // currently-defined values fit in one byte for each.
8174 const std::string
& sv
=
8175 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
8177 && sv
.data()[0] == elfcpp::Tag_CPU_arch
8178 && (sv
.data()[1] & 128) != 128)
8179 return sv
.data()[1];
8181 // This tag is "safely ignorable", so don't complain if it looks funny.
8185 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8186 // The tag is removed if ARCH is -1.
8187 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
8189 template<bool big_endian
>
8191 Target_arm
<big_endian
>::set_secondary_compatible_arch(
8192 Attributes_section_data
* pasd
,
8195 Object_attribute
*known_attributes
=
8196 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
8200 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
8204 // Note: the tag and its argument below are uleb128 values, though
8205 // currently-defined values fit in one byte for each.
8207 sv
[0] = elfcpp::Tag_CPU_arch
;
8208 gold_assert(arch
!= 0);
8212 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
8215 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8217 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
8219 template<bool big_endian
>
8221 Target_arm
<big_endian
>::tag_cpu_arch_combine(
8224 int* secondary_compat_out
,
8226 int secondary_compat
)
8228 #define T(X) elfcpp::TAG_CPU_ARCH_##X
8229 static const int v6t2
[] =
8241 static const int v6k
[] =
8254 static const int v7
[] =
8268 static const int v6_m
[] =
8283 static const int v6s_m
[] =
8299 static const int v7e_m
[] =
8316 static const int v4t_plus_v6_m
[] =
8332 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
8334 static const int *comb
[] =
8342 // Pseudo-architecture.
8346 // Check we've not got a higher architecture than we know about.
8348 if (oldtag
>= elfcpp::MAX_TAG_CPU_ARCH
|| newtag
>= elfcpp::MAX_TAG_CPU_ARCH
)
8350 gold_error(_("%s: unknown CPU architecture"), name
);
8354 // Override old tag if we have a Tag_also_compatible_with on the output.
8356 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
8357 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
8358 oldtag
= T(V4T_PLUS_V6_M
);
8360 // And override the new tag if we have a Tag_also_compatible_with on the
8363 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
8364 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
8365 newtag
= T(V4T_PLUS_V6_M
);
8367 // Architectures before V6KZ add features monotonically.
8368 int tagh
= std::max(oldtag
, newtag
);
8369 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
8372 int tagl
= std::min(oldtag
, newtag
);
8373 int result
= comb
[tagh
- T(V6T2
)][tagl
];
8375 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8376 // as the canonical version.
8377 if (result
== T(V4T_PLUS_V6_M
))
8380 *secondary_compat_out
= T(V6_M
);
8383 *secondary_compat_out
= -1;
8387 gold_error(_("%s: conflicting CPU architectures %d/%d"),
8388 name
, oldtag
, newtag
);
8396 // Helper to print AEABI enum tag value.
8398 template<bool big_endian
>
8400 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
8402 static const char *aeabi_enum_names
[] =
8403 { "", "variable-size", "32-bit", "" };
8404 const size_t aeabi_enum_names_size
=
8405 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
8407 if (value
< aeabi_enum_names_size
)
8408 return std::string(aeabi_enum_names
[value
]);
8412 sprintf(buffer
, "<unknown value %u>", value
);
8413 return std::string(buffer
);
8417 // Return the string value to store in TAG_CPU_name.
8419 template<bool big_endian
>
8421 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
8423 static const char *name_table
[] = {
8424 // These aren't real CPU names, but we can't guess
8425 // that from the architecture version alone.
8441 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
8443 if (value
< name_table_size
)
8444 return std::string(name_table
[value
]);
8448 sprintf(buffer
, "<unknown CPU value %u>", value
);
8449 return std::string(buffer
);
8453 // Merge object attributes from input file called NAME with those of the
8454 // output. The input object attributes are in the object pointed by PASD.
8456 template<bool big_endian
>
8458 Target_arm
<big_endian
>::merge_object_attributes(
8460 const Attributes_section_data
* pasd
)
8462 // Return if there is no attributes section data.
8466 // If output has no object attributes, just copy.
8467 if (this->attributes_section_data_
== NULL
)
8469 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
8473 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
8474 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
8475 Object_attribute
* out_attr
=
8476 this->attributes_section_data_
->known_attributes(vendor
);
8478 // This needs to happen before Tag_ABI_FP_number_model is merged. */
8479 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
8480 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
8482 // Ignore mismatches if the object doesn't use floating point. */
8483 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
8484 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
8485 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
8486 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0)
8487 gold_error(_("%s uses VFP register arguments, output does not"),
8491 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
8493 // Merge this attribute with existing attributes.
8496 case elfcpp::Tag_CPU_raw_name
:
8497 case elfcpp::Tag_CPU_name
:
8498 // These are merged after Tag_CPU_arch.
8501 case elfcpp::Tag_ABI_optimization_goals
:
8502 case elfcpp::Tag_ABI_FP_optimization_goals
:
8503 // Use the first value seen.
8506 case elfcpp::Tag_CPU_arch
:
8508 unsigned int saved_out_attr
= out_attr
->int_value();
8509 // Merge Tag_CPU_arch and Tag_also_compatible_with.
8510 int secondary_compat
=
8511 this->get_secondary_compatible_arch(pasd
);
8512 int secondary_compat_out
=
8513 this->get_secondary_compatible_arch(
8514 this->attributes_section_data_
);
8515 out_attr
[i
].set_int_value(
8516 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
8517 &secondary_compat_out
,
8518 in_attr
[i
].int_value(),
8520 this->set_secondary_compatible_arch(this->attributes_section_data_
,
8521 secondary_compat_out
);
8523 // Merge Tag_CPU_name and Tag_CPU_raw_name.
8524 if (out_attr
[i
].int_value() == saved_out_attr
)
8525 ; // Leave the names alone.
8526 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
8528 // The output architecture has been changed to match the
8529 // input architecture. Use the input names.
8530 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
8531 in_attr
[elfcpp::Tag_CPU_name
].string_value());
8532 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
8533 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
8537 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
8538 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
8541 // If we still don't have a value for Tag_CPU_name,
8542 // make one up now. Tag_CPU_raw_name remains blank.
8543 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
8545 const std::string cpu_name
=
8546 this->tag_cpu_name_value(out_attr
[i
].int_value());
8547 // FIXME: If we see an unknown CPU, this will be set
8548 // to "<unknown CPU n>", where n is the attribute value.
8549 // This is different from BFD, which leaves the name alone.
8550 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
8555 case elfcpp::Tag_ARM_ISA_use
:
8556 case elfcpp::Tag_THUMB_ISA_use
:
8557 case elfcpp::Tag_WMMX_arch
:
8558 case elfcpp::Tag_Advanced_SIMD_arch
:
8559 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
8560 case elfcpp::Tag_ABI_FP_rounding
:
8561 case elfcpp::Tag_ABI_FP_exceptions
:
8562 case elfcpp::Tag_ABI_FP_user_exceptions
:
8563 case elfcpp::Tag_ABI_FP_number_model
:
8564 case elfcpp::Tag_VFP_HP_extension
:
8565 case elfcpp::Tag_CPU_unaligned_access
:
8566 case elfcpp::Tag_T2EE_use
:
8567 case elfcpp::Tag_Virtualization_use
:
8568 case elfcpp::Tag_MPextension_use
:
8569 // Use the largest value specified.
8570 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
8571 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8574 case elfcpp::Tag_ABI_align8_preserved
:
8575 case elfcpp::Tag_ABI_PCS_RO_data
:
8576 // Use the smallest value specified.
8577 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
8578 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8581 case elfcpp::Tag_ABI_align8_needed
:
8582 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
8583 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
8584 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
8587 // This error message should be enabled once all non-conformant
8588 // binaries in the toolchain have had the attributes set
8590 // gold_error(_("output 8-byte data alignment conflicts with %s"),
8594 case elfcpp::Tag_ABI_FP_denormal
:
8595 case elfcpp::Tag_ABI_PCS_GOT_use
:
8597 // These tags have 0 = don't care, 1 = strong requirement,
8598 // 2 = weak requirement.
8599 static const int order_021
[3] = {0, 2, 1};
8601 // Use the "greatest" from the sequence 0, 2, 1, or the largest
8602 // value if greater than 2 (for future-proofing).
8603 if ((in_attr
[i
].int_value() > 2
8604 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
8605 || (in_attr
[i
].int_value() <= 2
8606 && out_attr
[i
].int_value() <= 2
8607 && (order_021
[in_attr
[i
].int_value()]
8608 > order_021
[out_attr
[i
].int_value()])))
8609 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8613 case elfcpp::Tag_CPU_arch_profile
:
8614 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
8616 // 0 will merge with anything.
8617 // 'A' and 'S' merge to 'A'.
8618 // 'R' and 'S' merge to 'R'.
8619 // 'M' and 'A|R|S' is an error.
8620 if (out_attr
[i
].int_value() == 0
8621 || (out_attr
[i
].int_value() == 'S'
8622 && (in_attr
[i
].int_value() == 'A'
8623 || in_attr
[i
].int_value() == 'R')))
8624 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8625 else if (in_attr
[i
].int_value() == 0
8626 || (in_attr
[i
].int_value() == 'S'
8627 && (out_attr
[i
].int_value() == 'A'
8628 || out_attr
[i
].int_value() == 'R')))
8633 (_("conflicting architecture profiles %c/%c"),
8634 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
8635 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
8639 case elfcpp::Tag_VFP_arch
:
8656 // Values greater than 6 aren't defined, so just pick the
8658 if (in_attr
[i
].int_value() > 6
8659 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
8661 *out_attr
= *in_attr
;
8664 // The output uses the superset of input features
8665 // (ISA version) and registers.
8666 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
8667 vfp_versions
[out_attr
[i
].int_value()].ver
);
8668 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
8669 vfp_versions
[out_attr
[i
].int_value()].regs
);
8670 // This assumes all possible supersets are also a valid
8673 for (newval
= 6; newval
> 0; newval
--)
8675 if (regs
== vfp_versions
[newval
].regs
8676 && ver
== vfp_versions
[newval
].ver
)
8679 out_attr
[i
].set_int_value(newval
);
8682 case elfcpp::Tag_PCS_config
:
8683 if (out_attr
[i
].int_value() == 0)
8684 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8685 else if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
8687 // It's sometimes ok to mix different configs, so this is only
8689 gold_warning(_("%s: conflicting platform configuration"), name
);
8692 case elfcpp::Tag_ABI_PCS_R9_use
:
8693 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
8694 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
8695 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
)
8697 gold_error(_("%s: conflicting use of R9"), name
);
8699 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
8700 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8702 case elfcpp::Tag_ABI_PCS_RW_data
:
8703 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
8704 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
8705 != elfcpp::AEABI_R9_SB
)
8706 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
8707 != elfcpp::AEABI_R9_unused
))
8709 gold_error(_("%s: SB relative addressing conflicts with use "
8713 // Use the smallest value specified.
8714 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
8715 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8717 case elfcpp::Tag_ABI_PCS_wchar_t
:
8718 // FIXME: Make it possible to turn off this warning.
8719 if (out_attr
[i
].int_value()
8720 && in_attr
[i
].int_value()
8721 && out_attr
[i
].int_value() != in_attr
[i
].int_value())
8723 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
8724 "use %u-byte wchar_t; use of wchar_t values "
8725 "across objects may fail"),
8726 name
, in_attr
[i
].int_value(),
8727 out_attr
[i
].int_value());
8729 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
8730 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8732 case elfcpp::Tag_ABI_enum_size
:
8733 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
8735 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
8736 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
8738 // The existing object is compatible with anything.
8739 // Use whatever requirements the new object has.
8740 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8742 // FIXME: Make it possible to turn off this warning.
8743 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
8744 && out_attr
[i
].int_value() != in_attr
[i
].int_value())
8746 unsigned int in_value
= in_attr
[i
].int_value();
8747 unsigned int out_value
= out_attr
[i
].int_value();
8748 gold_warning(_("%s uses %s enums yet the output is to use "
8749 "%s enums; use of enum values across objects "
8752 this->aeabi_enum_name(in_value
).c_str(),
8753 this->aeabi_enum_name(out_value
).c_str());
8757 case elfcpp::Tag_ABI_VFP_args
:
8760 case elfcpp::Tag_ABI_WMMX_args
:
8761 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
8763 gold_error(_("%s uses iWMMXt register arguments, output does "
8768 case Object_attribute::Tag_compatibility
:
8769 // Merged in target-independent code.
8771 case elfcpp::Tag_ABI_HardFP_use
:
8772 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
8773 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
8774 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
8775 out_attr
[i
].set_int_value(3);
8776 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
8777 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8779 case elfcpp::Tag_ABI_FP_16bit_format
:
8780 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
8782 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
8783 gold_error(_("fp16 format mismatch between %s and output"),
8786 if (in_attr
[i
].int_value() != 0)
8787 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
8790 case elfcpp::Tag_nodefaults
:
8791 // This tag is set if it exists, but the value is unused (and is
8792 // typically zero). We don't actually need to do anything here -
8793 // the merge happens automatically when the type flags are merged
8796 case elfcpp::Tag_also_compatible_with
:
8797 // Already done in Tag_CPU_arch.
8799 case elfcpp::Tag_conformance
:
8800 // Keep the attribute if it matches. Throw it away otherwise.
8801 // No attribute means no claim to conform.
8802 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
8803 out_attr
[i
].set_string_value("");
8808 const char* err_object
= NULL
;
8810 // The "known_obj_attributes" table does contain some undefined
8811 // attributes. Ensure that there are unused.
8812 if (out_attr
[i
].int_value() != 0
8813 || out_attr
[i
].string_value() != "")
8814 err_object
= "output";
8815 else if (in_attr
[i
].int_value() != 0
8816 || in_attr
[i
].string_value() != "")
8819 if (err_object
!= NULL
)
8821 // Attribute numbers >=64 (mod 128) can be safely ignored.
8823 gold_error(_("%s: unknown mandatory EABI object attribute "
8827 gold_warning(_("%s: unknown EABI object attribute %d"),
8831 // Only pass on attributes that match in both inputs.
8832 if (!in_attr
[i
].matches(out_attr
[i
]))
8834 out_attr
[i
].set_int_value(0);
8835 out_attr
[i
].set_string_value("");
8840 // If out_attr was copied from in_attr then it won't have a type yet.
8841 if (in_attr
[i
].type() && !out_attr
[i
].type())
8842 out_attr
[i
].set_type(in_attr
[i
].type());
8845 // Merge Tag_compatibility attributes and any common GNU ones.
8846 this->attributes_section_data_
->merge(name
, pasd
);
8848 // Check for any attributes not known on ARM.
8849 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
8850 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
8851 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
8852 Other_attributes
* out_other_attributes
=
8853 this->attributes_section_data_
->other_attributes(vendor
);
8854 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
8856 while (in_iter
!= in_other_attributes
->end()
8857 || out_iter
!= out_other_attributes
->end())
8859 const char* err_object
= NULL
;
8862 // The tags for each list are in numerical order.
8863 // If the tags are equal, then merge.
8864 if (out_iter
!= out_other_attributes
->end()
8865 && (in_iter
== in_other_attributes
->end()
8866 || in_iter
->first
> out_iter
->first
))
8868 // This attribute only exists in output. We can't merge, and we
8869 // don't know what the tag means, so delete it.
8870 err_object
= "output";
8871 err_tag
= out_iter
->first
;
8872 int saved_tag
= out_iter
->first
;
8873 delete out_iter
->second
;
8874 out_other_attributes
->erase(out_iter
);
8875 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
8877 else if (in_iter
!= in_other_attributes
->end()
8878 && (out_iter
!= out_other_attributes
->end()
8879 || in_iter
->first
< out_iter
->first
))
8881 // This attribute only exists in input. We can't merge, and we
8882 // don't know what the tag means, so ignore it.
8884 err_tag
= in_iter
->first
;
8887 else // The tags are equal.
8889 // As present, all attributes in the list are unknown, and
8890 // therefore can't be merged meaningfully.
8891 err_object
= "output";
8892 err_tag
= out_iter
->first
;
8894 // Only pass on attributes that match in both inputs.
8895 if (!in_iter
->second
->matches(*(out_iter
->second
)))
8897 // No match. Delete the attribute.
8898 int saved_tag
= out_iter
->first
;
8899 delete out_iter
->second
;
8900 out_other_attributes
->erase(out_iter
);
8901 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
8905 // Matched. Keep the attribute and move to the next.
8913 // Attribute numbers >=64 (mod 128) can be safely ignored. */
8914 if ((err_tag
& 127) < 64)
8916 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
8917 err_object
, err_tag
);
8921 gold_warning(_("%s: unknown EABI object attribute %d"),
8922 err_object
, err_tag
);
8928 // Return whether a relocation type used the LSB to distinguish THUMB
8930 template<bool big_endian
>
8932 Target_arm
<big_endian
>::reloc_uses_thumb_bit(unsigned int r_type
)
8936 case elfcpp::R_ARM_PC24
:
8937 case elfcpp::R_ARM_ABS32
:
8938 case elfcpp::R_ARM_REL32
:
8939 case elfcpp::R_ARM_SBREL32
:
8940 case elfcpp::R_ARM_THM_CALL
:
8941 case elfcpp::R_ARM_GLOB_DAT
:
8942 case elfcpp::R_ARM_JUMP_SLOT
:
8943 case elfcpp::R_ARM_GOTOFF32
:
8944 case elfcpp::R_ARM_PLT32
:
8945 case elfcpp::R_ARM_CALL
:
8946 case elfcpp::R_ARM_JUMP24
:
8947 case elfcpp::R_ARM_THM_JUMP24
:
8948 case elfcpp::R_ARM_SBREL31
:
8949 case elfcpp::R_ARM_PREL31
:
8950 case elfcpp::R_ARM_MOVW_ABS_NC
:
8951 case elfcpp::R_ARM_MOVW_PREL_NC
:
8952 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8953 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8954 case elfcpp::R_ARM_THM_JUMP19
:
8955 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8956 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8957 case elfcpp::R_ARM_ALU_PC_G0
:
8958 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8959 case elfcpp::R_ARM_ALU_PC_G1
:
8960 case elfcpp::R_ARM_ALU_PC_G2
:
8961 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8962 case elfcpp::R_ARM_ALU_SB_G0
:
8963 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8964 case elfcpp::R_ARM_ALU_SB_G1
:
8965 case elfcpp::R_ARM_ALU_SB_G2
:
8966 case elfcpp::R_ARM_MOVW_BREL_NC
:
8967 case elfcpp::R_ARM_MOVW_BREL
:
8968 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8969 case elfcpp::R_ARM_THM_MOVW_BREL
:
8976 // Stub-generation methods for Target_arm.
8978 // Make a new Arm_input_section object.
8980 template<bool big_endian
>
8981 Arm_input_section
<big_endian
>*
8982 Target_arm
<big_endian
>::new_arm_input_section(
8986 Section_id
sid(relobj
, shndx
);
8988 Arm_input_section
<big_endian
>* arm_input_section
=
8989 new Arm_input_section
<big_endian
>(relobj
, shndx
);
8990 arm_input_section
->init();
8992 // Register new Arm_input_section in map for look-up.
8993 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
8994 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
8996 // Make sure that it we have not created another Arm_input_section
8997 // for this input section already.
8998 gold_assert(ins
.second
);
9000 return arm_input_section
;
9003 // Find the Arm_input_section object corresponding to the SHNDX-th input
9004 // section of RELOBJ.
9006 template<bool big_endian
>
9007 Arm_input_section
<big_endian
>*
9008 Target_arm
<big_endian
>::find_arm_input_section(
9010 unsigned int shndx
) const
9012 Section_id
sid(relobj
, shndx
);
9013 typename
Arm_input_section_map::const_iterator p
=
9014 this->arm_input_section_map_
.find(sid
);
9015 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
9018 // Make a new stub table.
9020 template<bool big_endian
>
9021 Stub_table
<big_endian
>*
9022 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
9024 Stub_table
<big_endian
>* stub_table
=
9025 new Stub_table
<big_endian
>(owner
);
9026 this->stub_tables_
.push_back(stub_table
);
9028 stub_table
->set_address(owner
->address() + owner
->data_size());
9029 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
9030 stub_table
->finalize_data_size();
9035 // Scan a relocation for stub generation.
9037 template<bool big_endian
>
9039 Target_arm
<big_endian
>::scan_reloc_for_stub(
9040 const Relocate_info
<32, big_endian
>* relinfo
,
9041 unsigned int r_type
,
9042 const Sized_symbol
<32>* gsym
,
9044 const Symbol_value
<32>* psymval
,
9045 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
9046 Arm_address address
)
9048 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
9050 const Arm_relobj
<big_endian
>* arm_relobj
=
9051 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9053 if (r_type
== elfcpp::R_ARM_V4BX
)
9055 const uint32_t reg
= (addend
& 0xf);
9056 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9059 // Try looking up an existing stub from a stub table.
9060 Stub_table
<big_endian
>* stub_table
=
9061 arm_relobj
->stub_table(relinfo
->data_shndx
);
9062 gold_assert(stub_table
!= NULL
);
9064 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
9066 // create a new stub and add it to stub table.
9067 Arm_v4bx_stub
* stub
=
9068 this->stub_factory().make_arm_v4bx_stub(reg
);
9069 gold_assert(stub
!= NULL
);
9070 stub_table
->add_arm_v4bx_stub(stub
);
9077 bool target_is_thumb
;
9078 Symbol_value
<32> symval
;
9081 // This is a global symbol. Determine if we use PLT and if the
9082 // final target is THUMB.
9083 if (gsym
->use_plt_offset(Relocate::reloc_is_non_pic(r_type
)))
9085 // This uses a PLT, change the symbol value.
9086 symval
.set_output_value(this->plt_section()->address()
9087 + gsym
->plt_offset());
9089 target_is_thumb
= false;
9091 else if (gsym
->is_undefined())
9092 // There is no need to generate a stub symbol is undefined.
9097 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9098 || (gsym
->type() == elfcpp::STT_FUNC
9099 && !gsym
->is_undefined()
9100 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
9105 // This is a local symbol. Determine if the final target is THUMB.
9106 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
9109 // Strip LSB if this points to a THUMB target.
9111 && Target_arm
<big_endian
>::reloc_uses_thumb_bit(r_type
)
9112 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
9114 Arm_address stripped_value
=
9115 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
9116 symval
.set_output_value(stripped_value
);
9120 // Get the symbol value.
9121 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
9123 // Owing to pipelining, the PC relative branches below actually skip
9124 // two instructions when the branch offset is 0.
9125 Arm_address destination
;
9128 case elfcpp::R_ARM_CALL
:
9129 case elfcpp::R_ARM_JUMP24
:
9130 case elfcpp::R_ARM_PLT32
:
9132 destination
= value
+ addend
+ 8;
9134 case elfcpp::R_ARM_THM_CALL
:
9135 case elfcpp::R_ARM_THM_XPC22
:
9136 case elfcpp::R_ARM_THM_JUMP24
:
9137 case elfcpp::R_ARM_THM_JUMP19
:
9139 destination
= value
+ addend
+ 4;
9145 Reloc_stub
* stub
= NULL
;
9146 Stub_type stub_type
=
9147 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
9149 if (stub_type
!= arm_stub_none
)
9151 // Try looking up an existing stub from a stub table.
9152 Stub_table
<big_endian
>* stub_table
=
9153 arm_relobj
->stub_table(relinfo
->data_shndx
);
9154 gold_assert(stub_table
!= NULL
);
9156 // Locate stub by destination.
9157 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
9159 // Create a stub if there is not one already
9160 stub
= stub_table
->find_reloc_stub(stub_key
);
9163 // create a new stub and add it to stub table.
9164 stub
= this->stub_factory().make_reloc_stub(stub_type
);
9165 stub_table
->add_reloc_stub(stub
, stub_key
);
9168 // Record the destination address.
9169 stub
->set_destination_address(destination
9170 | (target_is_thumb
? 1 : 0));
9173 // For Cortex-A8, we need to record a relocation at 4K page boundary.
9174 if (this->fix_cortex_a8_
9175 && (r_type
== elfcpp::R_ARM_THM_JUMP24
9176 || r_type
== elfcpp::R_ARM_THM_JUMP19
9177 || r_type
== elfcpp::R_ARM_THM_CALL
9178 || r_type
== elfcpp::R_ARM_THM_XPC22
)
9179 && (address
& 0xfffU
) == 0xffeU
)
9181 // Found a candidate. Note we haven't checked the destination is
9182 // within 4K here: if we do so (and don't create a record) we can't
9183 // tell that a branch should have been relocated when scanning later.
9184 this->cortex_a8_relocs_info_
[address
] =
9185 new Cortex_a8_reloc(stub
, r_type
,
9186 destination
| (target_is_thumb
? 1 : 0));
9190 // This function scans a relocation sections for stub generation.
9191 // The template parameter Relocate must be a class type which provides
9192 // a single function, relocate(), which implements the machine
9193 // specific part of a relocation.
9195 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
9196 // SHT_REL or SHT_RELA.
9198 // PRELOCS points to the relocation data. RELOC_COUNT is the number
9199 // of relocs. OUTPUT_SECTION is the output section.
9200 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
9201 // mapped to output offsets.
9203 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
9204 // VIEW_SIZE is the size. These refer to the input section, unless
9205 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
9206 // the output section.
9208 template<bool big_endian
>
9209 template<int sh_type
>
9211 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
9212 const Relocate_info
<32, big_endian
>* relinfo
,
9213 const unsigned char* prelocs
,
9215 Output_section
* output_section
,
9216 bool needs_special_offset_handling
,
9217 const unsigned char* view
,
9218 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9221 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
9222 const int reloc_size
=
9223 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
9225 Arm_relobj
<big_endian
>* arm_object
=
9226 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9227 unsigned int local_count
= arm_object
->local_symbol_count();
9229 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
9231 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
9233 Reltype
reloc(prelocs
);
9235 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9236 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9237 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9239 r_type
= this->get_real_reloc_type(r_type
);
9241 // Only a few relocation types need stubs.
9242 if ((r_type
!= elfcpp::R_ARM_CALL
)
9243 && (r_type
!= elfcpp::R_ARM_JUMP24
)
9244 && (r_type
!= elfcpp::R_ARM_PLT32
)
9245 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
9246 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
9247 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
9248 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
9249 && (r_type
!= elfcpp::R_ARM_V4BX
))
9252 section_offset_type offset
=
9253 convert_to_section_size_type(reloc
.get_r_offset());
9255 if (needs_special_offset_handling
)
9257 offset
= output_section
->output_offset(relinfo
->object
,
9258 relinfo
->data_shndx
,
9264 if (r_type
== elfcpp::R_ARM_V4BX
)
9266 // Get the BX instruction.
9267 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
9268 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ offset
);
9269 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
9270 elfcpp::Swap
<32, big_endian
>::readval(wv
);
9271 this->scan_reloc_for_stub(relinfo
, r_type
, NULL
, 0, NULL
,
9277 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
9278 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
9279 stub_addend_reader(r_type
, view
+ offset
, reloc
);
9281 const Sized_symbol
<32>* sym
;
9283 Symbol_value
<32> symval
;
9284 const Symbol_value
<32> *psymval
;
9285 if (r_sym
< local_count
)
9288 psymval
= arm_object
->local_symbol(r_sym
);
9290 // If the local symbol belongs to a section we are discarding,
9291 // and that section is a debug section, try to find the
9292 // corresponding kept section and map this symbol to its
9293 // counterpart in the kept section. The symbol must not
9294 // correspond to a section we are folding.
9296 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
9298 && shndx
!= elfcpp::SHN_UNDEF
9299 && !arm_object
->is_section_included(shndx
)
9300 && !(relinfo
->symtab
->is_section_folded(arm_object
, shndx
)))
9302 if (comdat_behavior
== CB_UNDETERMINED
)
9305 arm_object
->section_name(relinfo
->data_shndx
);
9306 comdat_behavior
= get_comdat_behavior(name
.c_str());
9308 if (comdat_behavior
== CB_PRETEND
)
9311 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
9312 arm_object
->map_to_kept_section(shndx
, &found
);
9314 symval
.set_output_value(value
+ psymval
->input_value());
9316 symval
.set_output_value(0);
9320 symval
.set_output_value(0);
9322 symval
.set_no_output_symtab_entry();
9328 const Symbol
* gsym
= arm_object
->global_symbol(r_sym
);
9329 gold_assert(gsym
!= NULL
);
9330 if (gsym
->is_forwarder())
9331 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
9333 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
9334 if (sym
->has_symtab_index())
9335 symval
.set_output_symtab_index(sym
->symtab_index());
9337 symval
.set_no_output_symtab_entry();
9339 // We need to compute the would-be final value of this global
9341 const Symbol_table
* symtab
= relinfo
->symtab
;
9342 const Sized_symbol
<32>* sized_symbol
=
9343 symtab
->get_sized_symbol
<32>(gsym
);
9344 Symbol_table::Compute_final_value_status status
;
9346 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
9348 // Skip this if the symbol has not output section.
9349 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
9352 symval
.set_output_value(value
);
9356 // If symbol is a section symbol, we don't know the actual type of
9357 // destination. Give up.
9358 if (psymval
->is_section_symbol())
9361 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
9362 addend
, view_address
+ offset
);
9366 // Scan an input section for stub generation.
9368 template<bool big_endian
>
9370 Target_arm
<big_endian
>::scan_section_for_stubs(
9371 const Relocate_info
<32, big_endian
>* relinfo
,
9372 unsigned int sh_type
,
9373 const unsigned char* prelocs
,
9375 Output_section
* output_section
,
9376 bool needs_special_offset_handling
,
9377 const unsigned char* view
,
9378 Arm_address view_address
,
9379 section_size_type view_size
)
9381 if (sh_type
== elfcpp::SHT_REL
)
9382 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
9387 needs_special_offset_handling
,
9391 else if (sh_type
== elfcpp::SHT_RELA
)
9392 // We do not support RELA type relocations yet. This is provided for
9394 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
9399 needs_special_offset_handling
,
9407 // Group input sections for stub generation.
9409 // We goup input sections in an output sections so that the total size,
9410 // including any padding space due to alignment is smaller than GROUP_SIZE
9411 // unless the only input section in group is bigger than GROUP_SIZE already.
9412 // Then an ARM stub table is created to follow the last input section
9413 // in group. For each group an ARM stub table is created an is placed
9414 // after the last group. If STUB_ALWATS_AFTER_BRANCH is false, we further
9415 // extend the group after the stub table.
9417 template<bool big_endian
>
9419 Target_arm
<big_endian
>::group_sections(
9421 section_size_type group_size
,
9422 bool stubs_always_after_branch
)
9424 // Group input sections and insert stub table
9425 Layout::Section_list section_list
;
9426 layout
->get_allocated_sections(§ion_list
);
9427 for (Layout::Section_list::const_iterator p
= section_list
.begin();
9428 p
!= section_list
.end();
9431 Arm_output_section
<big_endian
>* output_section
=
9432 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9433 output_section
->group_sections(group_size
, stubs_always_after_branch
,
9438 // Relaxation hook. This is where we do stub generation.
9440 template<bool big_endian
>
9442 Target_arm
<big_endian
>::do_relax(
9444 const Input_objects
* input_objects
,
9445 Symbol_table
* symtab
,
9448 // No need to generate stubs if this is a relocatable link.
9449 gold_assert(!parameters
->options().relocatable());
9451 // If this is the first pass, we need to group input sections into
9453 bool done_exidx_fixup
= false;
9456 // Determine the stub group size. The group size is the absolute
9457 // value of the parameter --stub-group-size. If --stub-group-size
9458 // is passed a negative value, we restict stubs to be always after
9459 // the stubbed branches.
9460 int32_t stub_group_size_param
=
9461 parameters
->options().stub_group_size();
9462 bool stubs_always_after_branch
= stub_group_size_param
< 0;
9463 section_size_type stub_group_size
= abs(stub_group_size_param
);
9465 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
9466 // page as the first half of a 32-bit branch straddling two 4K pages.
9467 // This is a crude way of enforcing that.
9468 if (this->fix_cortex_a8_
)
9469 stubs_always_after_branch
= true;
9471 if (stub_group_size
== 1)
9474 // Thumb branch range is +-4MB has to be used as the default
9475 // maximum size (a given section can contain both ARM and Thumb
9476 // code, so the worst case has to be taken into account).
9478 // This value is 24K less than that, which allows for 2025
9479 // 12-byte stubs. If we exceed that, then we will fail to link.
9480 // The user will have to relink with an explicit group size
9482 stub_group_size
= 4170000;
9485 group_sections(layout
, stub_group_size
, stubs_always_after_branch
);
9487 // Also fix .ARM.exidx section coverage.
9488 Output_section
* os
= layout
->find_output_section(".ARM.exidx");
9489 if (os
!= NULL
&& os
->type() == elfcpp::SHT_ARM_EXIDX
)
9491 Arm_output_section
<big_endian
>* exidx_output_section
=
9492 Arm_output_section
<big_endian
>::as_arm_output_section(os
);
9493 this->fix_exidx_coverage(layout
, exidx_output_section
, symtab
);
9494 done_exidx_fixup
= true;
9498 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
9499 // beginning of each relaxation pass, just blow away all the stubs.
9500 // Alternatively, we could selectively remove only the stubs and reloc
9501 // information for code sections that have moved since the last pass.
9502 // That would require more book-keeping.
9503 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
9504 if (this->fix_cortex_a8_
)
9506 // Clear all Cortex-A8 reloc information.
9507 for (typename
Cortex_a8_relocs_info::const_iterator p
=
9508 this->cortex_a8_relocs_info_
.begin();
9509 p
!= this->cortex_a8_relocs_info_
.end();
9512 this->cortex_a8_relocs_info_
.clear();
9514 // Remove all Cortex-A8 stubs.
9515 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9516 sp
!= this->stub_tables_
.end();
9518 (*sp
)->remove_all_cortex_a8_stubs();
9521 // Scan relocs for relocation stubs
9522 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
9523 op
!= input_objects
->relobj_end();
9526 Arm_relobj
<big_endian
>* arm_relobj
=
9527 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
9528 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
9531 // Check all stub tables to see if any of them have their data sizes
9532 // or addresses alignments changed. These are the only things that
9534 bool any_stub_table_changed
= false;
9535 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
9536 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9537 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
9540 if ((*sp
)->update_data_size_and_addralign())
9542 // Update data size of stub table owner.
9543 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
9544 uint64_t address
= owner
->address();
9545 off_t offset
= owner
->offset();
9546 owner
->reset_address_and_file_offset();
9547 owner
->set_address_and_file_offset(address
, offset
);
9549 sections_needing_adjustment
.insert(owner
->output_section());
9550 any_stub_table_changed
= true;
9554 // Output_section_data::output_section() returns a const pointer but we
9555 // need to update output sections, so we record all output sections needing
9556 // update above and scan the sections here to find out what sections need
9558 for(Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9559 p
!= layout
->section_list().end();
9562 if (sections_needing_adjustment
.find(*p
)
9563 != sections_needing_adjustment
.end())
9564 (*p
)->set_section_offsets_need_adjustment();
9567 // Stop relaxation if no EXIDX fix-up and no stub table change.
9568 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
9570 // Finalize the stubs in the last relaxation pass.
9571 if (!continue_relaxation
)
9572 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
9573 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
9575 (*sp
)->finalize_stubs();
9577 return continue_relaxation
;
9582 template<bool big_endian
>
9584 Target_arm
<big_endian
>::relocate_stub(
9586 const Relocate_info
<32, big_endian
>* relinfo
,
9587 Output_section
* output_section
,
9588 unsigned char* view
,
9589 Arm_address address
,
9590 section_size_type view_size
)
9593 const Stub_template
* stub_template
= stub
->stub_template();
9594 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
9596 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
9597 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
9599 unsigned int r_type
= insn
->r_type();
9600 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
9601 section_size_type reloc_size
= insn
->size();
9602 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
9604 // This is the address of the stub destination.
9605 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
9606 Symbol_value
<32> symval
;
9607 symval
.set_output_value(target
);
9609 // Synthesize a fake reloc just in case. We don't have a symbol so
9611 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
9612 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
9613 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
9614 reloc_write
.put_r_offset(reloc_offset
);
9615 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
9616 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
9618 relocate
.relocate(relinfo
, this, output_section
,
9619 this->fake_relnum_for_stubs
, rel
, r_type
,
9620 NULL
, &symval
, view
+ reloc_offset
,
9621 address
+ reloc_offset
, reloc_size
);
9625 // Determine whether an object attribute tag takes an integer, a
9628 template<bool big_endian
>
9630 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
9632 if (tag
== Object_attribute::Tag_compatibility
)
9633 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9634 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
9635 else if (tag
== elfcpp::Tag_nodefaults
)
9636 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
9637 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
9638 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
9639 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
9641 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
9643 return ((tag
& 1) != 0
9644 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
9645 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
9648 // Reorder attributes.
9650 // The ABI defines that Tag_conformance should be emitted first, and that
9651 // Tag_nodefaults should be second (if either is defined). This sets those
9652 // two positions, and bumps up the position of all the remaining tags to
9655 template<bool big_endian
>
9657 Target_arm
<big_endian
>::do_attributes_order(int num
) const
9659 // Reorder the known object attributes in output. We want to move
9660 // Tag_conformance to position 4 and Tag_conformance to position 5
9661 // and shift eveything between 4 .. Tag_conformance - 1 to make room.
9663 return elfcpp::Tag_conformance
;
9665 return elfcpp::Tag_nodefaults
;
9666 if ((num
- 2) < elfcpp::Tag_nodefaults
)
9668 if ((num
- 1) < elfcpp::Tag_conformance
)
9673 // Scan a span of THUMB code for Cortex-A8 erratum.
9675 template<bool big_endian
>
9677 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
9678 Arm_relobj
<big_endian
>* arm_relobj
,
9680 section_size_type span_start
,
9681 section_size_type span_end
,
9682 const unsigned char* view
,
9683 Arm_address address
)
9685 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
9687 // The opcode is BLX.W, BL.W, B.W, Bcc.W
9688 // The branch target is in the same 4KB region as the
9689 // first half of the branch.
9690 // The instruction before the branch is a 32-bit
9691 // length non-branch instruction.
9692 section_size_type i
= span_start
;
9693 bool last_was_32bit
= false;
9694 bool last_was_branch
= false;
9695 while (i
< span_end
)
9697 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
9698 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
9699 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
9700 bool is_blx
= false, is_b
= false;
9701 bool is_bl
= false, is_bcc
= false;
9703 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
9706 // Load the rest of the insn (in manual-friendly order).
9707 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
9709 // Encoding T4: B<c>.W.
9710 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
9711 // Encoding T1: BL<c>.W.
9712 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
9713 // Encoding T2: BLX<c>.W.
9714 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
9715 // Encoding T3: B<c>.W (not permitted in IT block).
9716 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
9717 && (insn
& 0x07f00000U
) != 0x03800000U
);
9720 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
9722 // If this instruction is a 32-bit THUMB branch that crosses a 4K
9723 // page boundary and it follows 32-bit non-branch instruction,
9724 // we need to work around.
9726 && ((address
+ i
) & 0xfffU
) == 0xffeU
9728 && !last_was_branch
)
9730 // Check to see if there is a relocation stub for this branch.
9731 bool force_target_arm
= false;
9732 bool force_target_thumb
= false;
9733 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
9734 Cortex_a8_relocs_info::const_iterator p
=
9735 this->cortex_a8_relocs_info_
.find(address
+ i
);
9737 if (p
!= this->cortex_a8_relocs_info_
.end())
9739 cortex_a8_reloc
= p
->second
;
9740 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
9742 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
9743 && !target_is_thumb
)
9744 force_target_arm
= true;
9745 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
9747 force_target_thumb
= true;
9751 Stub_type stub_type
= arm_stub_none
;
9753 // Check if we have an offending branch instruction.
9754 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
9755 uint16_t lower_insn
= insn
& 0xffffU
;
9756 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
9758 if (cortex_a8_reloc
!= NULL
9759 && cortex_a8_reloc
->reloc_stub() != NULL
)
9760 // We've already made a stub for this instruction, e.g.
9761 // it's a long branch or a Thumb->ARM stub. Assume that
9762 // stub will suffice to work around the A8 erratum (see
9763 // setting of always_after_branch above).
9767 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
9769 stub_type
= arm_stub_a8_veneer_b_cond
;
9771 else if (is_b
|| is_bl
|| is_blx
)
9773 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
9779 ? arm_stub_a8_veneer_blx
9781 ? arm_stub_a8_veneer_bl
9782 : arm_stub_a8_veneer_b
));
9785 if (stub_type
!= arm_stub_none
)
9787 Arm_address pc_for_insn
= address
+ i
+ 4;
9789 // The original instruction is a BL, but the target is
9790 // an ARM instruction. If we were not making a stub,
9791 // the BL would have been converted to a BLX. Use the
9792 // BLX stub instead in that case.
9793 if (this->may_use_blx() && force_target_arm
9794 && stub_type
== arm_stub_a8_veneer_bl
)
9796 stub_type
= arm_stub_a8_veneer_blx
;
9800 // Conversely, if the original instruction was
9801 // BLX but the target is Thumb mode, use the BL stub.
9802 else if (force_target_thumb
9803 && stub_type
== arm_stub_a8_veneer_blx
)
9805 stub_type
= arm_stub_a8_veneer_bl
;
9813 // If we found a relocation, use the proper destination,
9814 // not the offset in the (unrelocated) instruction.
9815 // Note this is always done if we switched the stub type above.
9816 if (cortex_a8_reloc
!= NULL
)
9817 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
9819 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
9821 // Add a new stub if destination address in in the same page.
9822 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
9824 Cortex_a8_stub
* stub
=
9825 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
9829 Stub_table
<big_endian
>* stub_table
=
9830 arm_relobj
->stub_table(shndx
);
9831 gold_assert(stub_table
!= NULL
);
9832 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
9837 i
+= insn_32bit
? 4 : 2;
9838 last_was_32bit
= insn_32bit
;
9839 last_was_branch
= is_32bit_branch
;
9843 // Apply the Cortex-A8 workaround.
9845 template<bool big_endian
>
9847 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
9848 const Cortex_a8_stub
* stub
,
9849 Arm_address stub_address
,
9850 unsigned char* insn_view
,
9851 Arm_address insn_address
)
9853 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
9854 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
9855 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
9856 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
9857 off_t branch_offset
= stub_address
- (insn_address
+ 4);
9859 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
9860 switch (stub
->stub_template()->type())
9862 case arm_stub_a8_veneer_b_cond
:
9863 gold_assert(!utils::has_overflow
<21>(branch_offset
));
9864 upper_insn
= RelocFuncs::thumb32_cond_branch_upper(upper_insn
,
9866 lower_insn
= RelocFuncs::thumb32_cond_branch_lower(lower_insn
,
9870 case arm_stub_a8_veneer_b
:
9871 case arm_stub_a8_veneer_bl
:
9872 case arm_stub_a8_veneer_blx
:
9873 if ((lower_insn
& 0x5000U
) == 0x4000U
)
9874 // For a BLX instruction, make sure that the relocation is
9875 // rounded up to a word boundary. This follows the semantics of
9876 // the instruction which specifies that bit 1 of the target
9877 // address will come from bit 1 of the base address.
9878 branch_offset
= (branch_offset
+ 2) & ~3;
9880 // Put BRANCH_OFFSET back into the insn.
9881 gold_assert(!utils::has_overflow
<25>(branch_offset
));
9882 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
9883 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
9890 // Put the relocated value back in the object file:
9891 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
9892 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
9895 template<bool big_endian
>
9896 class Target_selector_arm
: public Target_selector
9899 Target_selector_arm()
9900 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
9901 (big_endian
? "elf32-bigarm" : "elf32-littlearm"))
9905 do_instantiate_target()
9906 { return new Target_arm
<big_endian
>(); }
9909 // Fix .ARM.exidx section coverage.
9911 template<bool big_endian
>
9913 Target_arm
<big_endian
>::fix_exidx_coverage(
9915 Arm_output_section
<big_endian
>* exidx_section
,
9916 Symbol_table
* symtab
)
9918 // We need to look at all the input sections in output in ascending
9919 // order of of output address. We do that by building a sorted list
9920 // of output sections by addresses. Then we looks at the output sections
9921 // in order. The input sections in an output section are already sorted
9922 // by addresses within the output section.
9924 typedef std::set
<Output_section
*, output_section_address_less_than
>
9925 Sorted_output_section_list
;
9926 Sorted_output_section_list sorted_output_sections
;
9927 Layout::Section_list section_list
;
9928 layout
->get_allocated_sections(§ion_list
);
9929 for (Layout::Section_list::const_iterator p
= section_list
.begin();
9930 p
!= section_list
.end();
9933 // We only care about output sections that contain executable code.
9934 if (((*p
)->flags() & elfcpp::SHF_EXECINSTR
) != 0)
9935 sorted_output_sections
.insert(*p
);
9938 // Go over the output sections in ascending order of output addresses.
9939 typedef typename Arm_output_section
<big_endian
>::Text_section_list
9941 Text_section_list sorted_text_sections
;
9942 for(typename
Sorted_output_section_list::iterator p
=
9943 sorted_output_sections
.begin();
9944 p
!= sorted_output_sections
.end();
9947 Arm_output_section
<big_endian
>* arm_output_section
=
9948 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9949 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
9952 exidx_section
->fix_exidx_coverage(sorted_text_sections
, symtab
);
9955 Target_selector_arm
<false> target_selector_arm
;
9956 Target_selector_arm
<true> target_selector_armbe
;
9958 } // End anonymous namespace.