include/ChangeLog

   1 2016-11-22  Alan Modra  <amodra@gmail.com>
   2
   3         PR 20744
   4         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
   5
   6 2016-11-03  David Tolnay <dtolnay@gmail.com>
   7             Mark Wielaard  <mark@klomp.org>
   8
   9         * demangle.h (DMGL_RUST): New macro.
  10         (DMGL_STYLE_MASK): Add DMGL_RUST.
  11         (demangling_styles): Add dlang_rust.
  12         (RUST_DEMANGLING_STYLE_STRING): New macro.
  13         (RUST_DEMANGLING): New macro.
  14         (rust_demangle): New prototype.
  15         (rust_is_mangled): Likewise.
  16         (rust_demangle_sym): Likewise.
  17
  18 2016-11-07  Jason Merrill  <jason@redhat.com>
  19
  20         * demangle.h (enum demangle_component_type): Add
  21         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  22
  23 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  24
  25         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  26         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  27         (enum aarch64_op): Add OP_FCMLA_ELEM.
  28
  29 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  30
  31         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  32         (enum aarch64_insn_class): Add ldst_imm10.
  33
  34 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  35
  36         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  37
  38 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  39
  40         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  41         (AARCH64_ARCH_V8_3): Define.
  42         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  43
  44 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  45
  46         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  47         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  48         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  49
  50 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  51
  52         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  53
  54 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  55
  56         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  57         fields.
  58         (struct arc_long_opcode): Delete.
  59         (struct arc_operand): Change types for insert and extract
  60         handlers.
  61
  62 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  63
  64         * opcode/arc.h: Make macros 64-bit safe.
  65
  66 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  67
  68         * opcode/arc.h (arc_opcode_len): Declare.
  69         (ARC_SHORT): Delete.
  70
  71 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  72             Andrew Waterman <andrew@sifive.com>
  73
  74         Add support for RISC-V architecture.
  75         * dis-asm.h: Add prototypes for print_insn_riscv and
  76         print_riscv_disassembler_options.
  77         * elf/riscv.h: New file.
  78         * opcode/riscv-opc.h: New file.
  79         * opcode/riscv.h: New file.
  80
  81 2016-10-17  Nick Clifton  <nickc@redhat.com>
  82
  83         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  84         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
  85         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
  86         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
  87         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
  88         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
  89         (ELFOSABI_OPENVOS): Define.
  90         (GRP_MASKOS, GRP_MASKPROC): Define.
  91
  92 2016-10-14  Pedro Alves  <palves@redhat.com>
  93
  94         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
  95         OVERRIDE): Define as empty.
  96         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
  97         __final.
  98         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
  99         empty.
 100
 101 2016-10-14  Pedro Alves  <palves@redhat.com>
 102
 103         * ansidecl.h (GCC_FINAL): Delete.
 104         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 105
 106 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 107
 108         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 109
 110 2016-09-29  Alan Modra  <amodra@gmail.com>
 111
 112         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 113
 114 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 115
 116         * opcode/arc.h (insn_class_t): Add two new classes.
 117
 118 2016-09-26  Alan Modra  <amodra@gmail.com>
 119
 120         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 121
 122 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 123
 124         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 125
 126 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 127
 128         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 129         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 130         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 131         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 132
 133 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 134
 135         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 136         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 137         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 138         aarch64_insn_classes.
 139
 140 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 141
 142         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 143         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 144         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 145
 146 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 147
 148         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 149         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 150         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 151
 152 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 153
 154         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 155         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 156         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 157         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 158         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 159         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 160         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 161         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 162         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 163         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 164         (aarch64_sve_dupm_mov_immediate_p): Declare.
 165
 166 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 167
 168         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 169         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 170         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 171         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 172         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 173
 174 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 175
 176         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 177         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 178         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 179         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 180         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 181         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 182         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 183         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 184         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 185         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 186         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 187         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 188         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 189         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 190         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 191         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 192         Likewise.
 193
 194 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 195
 196         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 197         aarch64_opnd.
 198         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 199         (aarch64_opnd_info): Make shifter.amount an int64_t and
 200         rearrange the fields.
 201
 202 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 203
 204         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 205         (AARCH64_OPND_SVE_PRFOP): Likewise.
 206         (aarch64_sve_pattern_array): Declare.
 207         (aarch64_sve_prfop_array): Likewise.
 208
 209 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 210
 211         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 212         (AARCH64_OPND_QLF_P_M): Likewise.
 213
 214 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 215
 216         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 217         aarch64_operand_class.
 218         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 219         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 220         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 221         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 222         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 223         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 224         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 225         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 226
 227 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 228
 229         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 230         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 231
 232 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 233
 234         * opcode/aarch64.h (F_STRICT): New flag.
 235
 236 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 237
 238         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 239
 240 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 241         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 242         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 243         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 244         relocation.
 245
 246 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 247
 248         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 249         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 250
 251 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 252
 253         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 254
 255 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 256
 257         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 258
 259 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 260
 261         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 262         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 263         ARC_NUM_ADDRTYPES.
 264         * opcode/arc.h: Add BMU to insn_class_t enum.
 265         * opcode/arc.h: Add PMU to insn_class_t enum.
 266
 267 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 268
 269         * dis-asm.h: Declare print_arc_disassembler_options.
 270
 271 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 272
 273         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 274         out_implib_bfd fields.
 275
 276 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 277
 278         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 279
 280 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 281
 282         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 283         (SHF_ARM_PURECODE): ... this.
 284
 285 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 286
 287         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 288         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 289         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 290         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 291
 292 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 293
 294         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 295         of enabled FPU features.
 296
 297 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 298
 299         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 300         SPARC_OPCODE_ARCH_MAX into the enum.
 301
 302 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 303
 304         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 305
 306 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 307
 308         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 309
 310 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 311
 312         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 313
 314 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 315
 316         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 317         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 318         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 319         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 320
 321 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 322
 323         * opcode/arc.h: Make insn_class_t alphabetical again.
 324
 325 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 326
 327         * elf/dlx.h: Wrap in extern C.
 328         * elf/xtensa.h: Likewise.
 329         * opcode/arc.h: Likewise.
 330
 331 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 332
 333         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 334         tilegx_pipeline.
 335
 336 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 337
 338         * opcode/arc.h: Add nps400 extension and instruction
 339         subclass.
 340         Remove ARC_OPCODE_NPS400
 341         * elf/arc.h: Remove E_ARC_MACH_NPS400
 342
 343 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 344
 345         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 346         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 347         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 348         SPARC_OPCODE_ARCH_V9M.
 349
 350 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 351
 352         * opcode/msp430-decode.h (MSP430_Size): Remove.
 353         (Msp430_Opcode_Decoded): Change type of size to int.
 354
 355 2016-06-11  Alan Modra  <amodra@gmail.com>
 356
 357         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 358
 359 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 360
 361         * opcode/sparc.h: Add missing documentation for hyperprivileged
 362         registers in rd (%) and rs1 ($).
 363
 364 2016-06-07  Alan Modra  <amodra@gmail.com>
 365
 366         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 367         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 368         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 369         PPC_APUINFO_VLE: Define.
 370
 371 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 372
 373         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 374         entries.
 375         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 376
 377 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 378
 379         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 380         (struct arc_long_opcode): New structure.
 381         (arc_long_opcodes): Declare.
 382         (arc_num_long_opcodes): Declare.
 383
 384 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 385
 386         * elf/mips.h: Add extern "C".
 387         * elf/sh.h: Likewise.
 388         * opcode/d10v.h: Likewise.
 389         * opcode/d30v.h: Likewise.
 390         * opcode/ia64.h: Likewise.
 391         * opcode/mips.h: Likewise.
 392         * opcode/ppc.h: Likewise.
 393         * opcode/sparc.h: Likewise.
 394         * opcode/tic6x.h: Likewise.
 395         * opcode/v850.h: Likewise.
 396
 397 2016-05-28  Alan Modra  <amodra@gmail.com>
 398
 399         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 400         Return void from multiple_definition, multiple_common,
 401         add_to_set, constructor, warning, undefined_symbol,
 402         reloc_overflow, reloc_dangerous and unattached_reloc.
 403
 404 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 405
 406         * opcode/metag.h: wrap declarations in extern "C".
 407
 408 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 409
 410         * opcode/arc.h (insn_subclass_t): Add COND.
 411         (flag_class_t): Add F_CLASS_EXTEND.
 412
 413 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 414
 415         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 416         insn_class.
 417         (struct arc_flag_class): Renamed attribute class to flag_class.
 418
 419 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 420
 421         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 422         plain symbol.
 423
 424 2016-04-29  Tom Tromey  <tom@tromey.com>
 425
 426         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 427         DW_LANG_Rust_old>: New constants.
 428
 429 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 430
 431         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 432         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 433         * opcode/mips.h (ASE_DSPR3): New macro.
 434
 435 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 436             Nick Clifton  <nickc@redhat.com>
 437
 438         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 439         enumerator.
 440         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 441         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 442         (ARM_SYM_BRANCH_TYPE): Replace by ...
 443         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 444         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 445         BFD_ASSERT is defined or not.
 446
 447 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 448
 449         * elf/arm.h (Tag_DSP_extension): Define.
 450
 451 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 452
 453         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 454
 455 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 456
 457         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 458         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 459         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 460         for the high core bits.
 461
 462 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 463
 464         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 465         (ARC_SYNTAX_NOP): Likewsie.
 466         (ARC_OP1_MUST_BE_IMM): Update defined value.
 467         (ARC_OP1_IMM_IMPLIED): Likewise.
 468         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 469
 470 2016-04-28  Nick Clifton  <nickc@redhat.com>
 471
 472         PR target/19722
 473         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 474
 475 2016-04-27  Alan Modra  <amodra@gmail.com>
 476
 477         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 478         undef.  Formatting.
 479
 480 2016-04-21  Nick Clifton  <nickc@redhat.com>
 481
 482         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 483
 484 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 485
 486         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 487
 488 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 489
 490         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 491
 492 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 493
 494         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 495
 496 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 497
 498         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 499
 500 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 501
 502         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 503         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 504
 505 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 506
 507         * opcode/arc.h (flag_class_t): Update.
 508         (ARC_OPCODE_NONE): Define.
 509         (ARC_OPCODE_ARCALL): Likewise.
 510         (ARC_OPCODE_ARCFPX): Likewise.
 511         (ARC_REGISTER_READONLY): Likewise.
 512         (ARC_REGISTER_WRITEONLY): Likewise.
 513         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 514         (arc_aux_reg): Add cpu.
 515
 516 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 517
 518         * opcode/arc.h (arc_num_opcodes): Remove.
 519         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 520         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 521         (ARC_SUFFIX_FLAG): Define.
 522         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 523         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 524         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 525         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 526         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 527         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 528         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 529         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 530         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 531         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 532
 533 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 534
 535         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 536         (ARC_FPUDA): Define.
 537         (arc_aux_reg): Add new field.
 538
 539 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 540
 541         * opcode/arc-func.h (replace_bits24): Changed.
 542         (replace_bits24_be): Created.
 543
 544 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 545
 546         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 547         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 548         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 549         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 550         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 551         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 552         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 553         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 554         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 555         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 556         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 557         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 558         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 559         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 560
 561 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 562
 563         * opcode/i960.h: Add const qualifiers.
 564         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 565
 566 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 567
 568         * opcodes/arc.h (insn_class_t): Add BITOP type.
 569
 570 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 571
 572         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 573         new classes instead.
 574
 575 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 576
 577         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 578         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 579
 580 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 581
 582         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 583
 584 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 585
 586         * elf/arc.h (EF_ARC_MACH): Delete.
 587         (EF_ARC_MACH_MSK): Remove out of date comment.
 588
 589 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 590
 591         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 592
 593 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 594
 595         PR ld/19807
 596         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 597
 598 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 599             Andrew Burgess  <andrew.burgess@embecosm.com>
 600
 601         * elf/arc-reloc.def: Add a call to ME within the formula for each
 602         relocation that requires middle-endian correction.
 603
 604 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 605
 606         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 607         * opcode/h8300.h (struct h8_opcode): Likewise.
 608         * opcode/hppa.h (struct pa_opcode): Likewise.
 609         * opcode/msp430.h: Likewise.
 610         * opcode/spu.h (struct spu_opcode): Likewise.
 611         * opcode/tic30.h (struct _register): Likewise.
 612         * opcode/tic4x.h (struct tic4x_register): Likewise.
 613         (struct tic4x_cond): Likewise.
 614         (struct tic4x_indirect): Likewise.
 615         (struct tic4x_inst): Likewise.
 616         * opcode/visium.h (struct reg_entry): Likewise.
 617
 618 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 619
 620         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 621         (ARM_CPU_HAS_FEATURE): Add comment.
 622
 623 2016-03-03  Than McIntosh <thanm@google.com>
 624
 625         * plugin-api.h: Add new hooks to the plugin transfer vector to
 626         to support querying section alignment and section size.
 627         (ld_plugin_get_input_section_alignment): New hook.
 628         (ld_plugin_get_input_section_size): New hook.
 629         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 630         and LDPT_GET_INPUT_SECTION_SIZE.
 631         (ld_plugin_tv): Add tv_get_input_section_alignment and
 632         tv_get_input_section_size.
 633
 634 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 635
 636         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 637
 638 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 639
 640         PR ld/19645
 641         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 642         (bfd_link_info): Add elf_stt_common.
 643
 644 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 645
 646         PR ld/19636
 647         PR ld/19704
 648         PR ld/19719
 649         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 650
 651 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 652             Jiong Wang  <jiong.wang@arm.com>
 653
 654         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 655
 656 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 657             Janek van Oirschot  <jvanoirs@synopsys.com>
 658
 659         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 660         (arc_num_relax_opcodes): Declare.
 661
 662 2016-02-09  Nick Clifton  <nickc@redhat.com>
 663
 664         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 665         * opcode/nds32.h (nds32_r45map): Likewise.
 666         (nds32_r54map): Likewise.
 667         * opcode/visium.h (gen_reg_table): Likewise.
 668         (fp_reg_table, cc_table, opcode_table): Likewise.
 669
 670 2016-02-09  Alan Modra  <amodra@gmail.com>
 671
 672         PR 16583
 673         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 674
 675 2016-02-04  Nick Clifton  <nickc@redhat.com>
 676
 677         PR target/19561
 678         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 679         (RRUX): Synthesise using case 2 rather than 7.
 680
 681 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 682
 683         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 684         (NT_FREEBSD_PROCSTAT_PROC): Define.
 685         (NT_FREEBSD_PROCSTAT_FILES): Define.
 686         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 687         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 688         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 689         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 690         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 691         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 692         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 693
 694 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 695             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 696
 697         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 698         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 699         (ARC_TLS_LE_32): Fixed formula.
 700         (ARC_TLS_GD_LD): Use new special function.
 701         * opcode/arc-func.h: Changed all the replacement
 702         functions to clear the patching bits before doing an or it with the value
 703         argument.
 704
 705 2016-01-18  Nick Clifton  <nickc@redhat.com>
 706
 707         PR ld/19440
 708         * coff/internal.h (internal_syment): Use int to hold section
 709         number.
 710         (N_UNDEF): Cast to int not short.
 711         (N_ABS): Likewise.
 712         (N_DEBUG): Likewise.
 713         (N_TV): Likewise.
 714         (P_TV): Likewise.
 715
 716 2016-01-11  Nick Clifton  <nickc@redhat.com>
 717
 718         Import this change from GCC mainline:
 719
 720         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 721
 722         * longlong.h: Change !__SHMEDIA__ to
 723         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 724         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 725
 726 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 727
 728         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 729
 730 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 731
 732         * libiberty.h (dupargv): Change arg to char * const *.
 733         (writeargv, countargv): Likewise.
 734
 735 2016-01-01  Alan Modra  <amodra@gmail.com>
 736
 737         Update year range in copyright notice of all files.
 738
 739 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 740 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 741 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 742 som/ChangeLog-1015, and vms/ChangeLog-1015
 743 \f
 744 Copyright (C) 2016 Free Software Foundation, Inc.
 745
 746 Copying and distribution of this file, with or without modification,
 747 are permitted in any medium without royalty provided the copyright
 748 notice and this notice are preserved.
 749
 750 Local Variables:
 751 mode: change-log
 752 left-margin: 8
 753 fill-column: 74
 754 version-control: never
 755 End: