include/ChangeLog

   1 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
   2
   3         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
   4         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
   5         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
   6
   7 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
   8
   9         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
  10         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
  11         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
  12         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
  13         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
  14         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
  15         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
  16         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
  17         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
  18         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
  19         (aarch64_sve_dupm_mov_immediate_p): Declare.
  20
  21 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  22
  23         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
  24         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
  25         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
  26         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
  27         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
  28
  29 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  30
  31         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
  32         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
  33         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
  34         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
  35         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
  36         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
  37         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
  38         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
  39         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
  40         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
  41         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
  42         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
  43         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
  44         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
  45         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
  46         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
  47         Likewise.
  48
  49 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  50
  51         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
  52         aarch64_opnd.
  53         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
  54         (aarch64_opnd_info): Make shifter.amount an int64_t and
  55         rearrange the fields.
  56
  57 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  58
  59         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
  60         (AARCH64_OPND_SVE_PRFOP): Likewise.
  61         (aarch64_sve_pattern_array): Declare.
  62         (aarch64_sve_prfop_array): Likewise.
  63
  64 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  65
  66         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
  67         (AARCH64_OPND_QLF_P_M): Likewise.
  68
  69 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  70
  71         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
  72         aarch64_operand_class.
  73         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
  74         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
  75         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
  76         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
  77         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
  78         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
  79         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
  80         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
  81
  82 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  83
  84         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
  85         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
  86
  87 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  88
  89         * opcode/aarch64.h (F_STRICT): New flag.
  90
  91 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
  92
  93         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
  94
  95 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
  96         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
  97         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
  98         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
  99         relocation.
 100
 101 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 102
 103         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 104         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 105
 106 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 107
 108         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 109
 110 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 111
 112         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 113
 114 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 115
 116         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 117         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 118         ARC_NUM_ADDRTYPES.
 119         * opcode/arc.h: Add BMU to insn_class_t enum.
 120         * opcode/arc.h: Add PMU to insn_class_t enum.
 121
 122 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 123
 124         * dis-asm.h: Declare print_arc_disassembler_options.
 125
 126 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 127
 128         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 129         out_implib_bfd fields.
 130
 131 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 132
 133         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 134
 135 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 136
 137         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 138         (SHF_ARM_PURECODE): ... this.
 139
 140 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 141
 142         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 143         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 144         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 145         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 146
 147 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 148
 149         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 150         of enabled FPU features.
 151
 152 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 153
 154         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 155         SPARC_OPCODE_ARCH_MAX into the enum.
 156
 157 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 158
 159         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 160
 161 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 162
 163         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 164
 165 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 166
 167         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 168
 169 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 170
 171         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 172         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 173         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 174         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 175
 176 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 177
 178         * opcode/arc.h: Make insn_class_t alphabetical again.
 179
 180 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 181
 182         * elf/dlx.h: Wrap in extern C.
 183         * elf/xtensa.h: Likewise.
 184         * opcode/arc.h: Likewise.
 185
 186 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 187
 188         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 189         tilegx_pipeline.
 190
 191 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 192
 193         * opcode/arc.h: Add nps400 extension and instruction
 194         subclass.
 195         Remove ARC_OPCODE_NPS400
 196         * elf/arc.h: Remove E_ARC_MACH_NPS400
 197
 198 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 199
 200         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 201         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 202         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 203         SPARC_OPCODE_ARCH_V9M.
 204
 205 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 206
 207         * opcode/msp430-decode.h (MSP430_Size): Remove.
 208         (Msp430_Opcode_Decoded): Change type of size to int.
 209
 210 2016-06-11  Alan Modra  <amodra@gmail.com>
 211
 212         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 213
 214 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 215
 216         * opcode/sparc.h: Add missing documentation for hyperprivileged
 217         registers in rd (%) and rs1 ($).
 218
 219 2016-06-07  Alan Modra  <amodra@gmail.com>
 220
 221         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 222         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 223         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 224         PPC_APUINFO_VLE: Define.
 225
 226 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 227
 228         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 229         entries.
 230         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 231
 232 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 233
 234         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 235         (struct arc_long_opcode): New structure.
 236         (arc_long_opcodes): Declare.
 237         (arc_num_long_opcodes): Declare.
 238
 239 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 240
 241         * elf/mips.h: Add extern "C".
 242         * elf/sh.h: Likewise.
 243         * opcode/d10v.h: Likewise.
 244         * opcode/d30v.h: Likewise.
 245         * opcode/ia64.h: Likewise.
 246         * opcode/mips.h: Likewise.
 247         * opcode/ppc.h: Likewise.
 248         * opcode/sparc.h: Likewise.
 249         * opcode/tic6x.h: Likewise.
 250         * opcode/v850.h: Likewise.
 251
 252 2016-05-28  Alan Modra  <amodra@gmail.com>
 253
 254         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 255         Return void from multiple_definition, multiple_common,
 256         add_to_set, constructor, warning, undefined_symbol,
 257         reloc_overflow, reloc_dangerous and unattached_reloc.
 258
 259 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 260
 261         * opcode/metag.h: wrap declarations in extern "C".
 262
 263 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 264
 265         * opcode/arc.h (insn_subclass_t): Add COND.
 266         (flag_class_t): Add F_CLASS_EXTEND.
 267
 268 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 269
 270         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 271         insn_class.
 272         (struct arc_flag_class): Renamed attribute class to flag_class.
 273
 274 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 275
 276         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 277         plain symbol.
 278
 279 2016-04-29  Tom Tromey  <tom@tromey.com>
 280
 281         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 282         DW_LANG_Rust_old>: New constants.
 283
 284 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 285
 286         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 287         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 288         * opcode/mips.h (ASE_DSPR3): New macro.
 289
 290 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 291             Nick Clifton  <nickc@redhat.com>
 292
 293         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 294         enumerator.
 295         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 296         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 297         (ARM_SYM_BRANCH_TYPE): Replace by ...
 298         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 299         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 300         BFD_ASSERT is defined or not.
 301
 302 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 303
 304         * elf/arm.h (Tag_DSP_extension): Define.
 305
 306 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 307
 308         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 309
 310 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 311
 312         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 313         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 314         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 315         for the high core bits.
 316
 317 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 318
 319         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 320         (ARC_SYNTAX_NOP): Likewsie.
 321         (ARC_OP1_MUST_BE_IMM): Update defined value.
 322         (ARC_OP1_IMM_IMPLIED): Likewise.
 323         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 324
 325 2016-04-28  Nick Clifton  <nickc@redhat.com>
 326
 327         PR target/19722
 328         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 329
 330 2016-04-27  Alan Modra  <amodra@gmail.com>
 331
 332         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 333         undef.  Formatting.
 334
 335 2016-04-21  Nick Clifton  <nickc@redhat.com>
 336
 337         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 338
 339 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 342
 343 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 344
 345         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 346
 347 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 348
 349         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 350
 351 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 352
 353         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 354
 355 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 356
 357         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 358         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 359
 360 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 361
 362         * opcode/arc.h (flag_class_t): Update.
 363         (ARC_OPCODE_NONE): Define.
 364         (ARC_OPCODE_ARCALL): Likewise.
 365         (ARC_OPCODE_ARCFPX): Likewise.
 366         (ARC_REGISTER_READONLY): Likewise.
 367         (ARC_REGISTER_WRITEONLY): Likewise.
 368         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 369         (arc_aux_reg): Add cpu.
 370
 371 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 372
 373         * opcode/arc.h (arc_num_opcodes): Remove.
 374         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 375         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 376         (ARC_SUFFIX_FLAG): Define.
 377         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 378         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 379         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 380         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 381         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 382         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 383         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 384         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 385         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 386         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 387
 388 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 389
 390         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 391         (ARC_FPUDA): Define.
 392         (arc_aux_reg): Add new field.
 393
 394 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 395
 396         * opcode/arc-func.h (replace_bits24): Changed.
 397         (replace_bits24_be): Created.
 398
 399 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 400
 401         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 402         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 403         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 404         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 405         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 406         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 407         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 408         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 409         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 410         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 411         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 412         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 413         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 414         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 415
 416 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 417
 418         * opcode/i960.h: Add const qualifiers.
 419         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 420
 421 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 422
 423         * opcodes/arc.h (insn_class_t): Add BITOP type.
 424
 425 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 426
 427         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 428         new classes instead.
 429
 430 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 431
 432         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 433         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 434
 435 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 436
 437         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 438
 439 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 440
 441         * elf/arc.h (EF_ARC_MACH): Delete.
 442         (EF_ARC_MACH_MSK): Remove out of date comment.
 443
 444 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 445
 446         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 447
 448 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 449
 450         PR ld/19807
 451         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 452
 453 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 454             Andrew Burgess  <andrew.burgess@embecosm.com>
 455
 456         * elf/arc-reloc.def: Add a call to ME within the formula for each
 457         relocation that requires middle-endian correction.
 458
 459 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 460
 461         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 462         * opcode/h8300.h (struct h8_opcode): Likewise.
 463         * opcode/hppa.h (struct pa_opcode): Likewise.
 464         * opcode/msp430.h: Likewise.
 465         * opcode/spu.h (struct spu_opcode): Likewise.
 466         * opcode/tic30.h (struct _register): Likewise.
 467         * opcode/tic4x.h (struct tic4x_register): Likewise.
 468         (struct tic4x_cond): Likewise.
 469         (struct tic4x_indirect): Likewise.
 470         (struct tic4x_inst): Likewise.
 471         * opcode/visium.h (struct reg_entry): Likewise.
 472
 473 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 474
 475         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 476         (ARM_CPU_HAS_FEATURE): Add comment.
 477
 478 2016-03-03  Than McIntosh <thanm@google.com>
 479
 480         * plugin-api.h: Add new hooks to the plugin transfer vector to
 481         to support querying section alignment and section size.
 482         (ld_plugin_get_input_section_alignment): New hook.
 483         (ld_plugin_get_input_section_size): New hook.
 484         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 485         and LDPT_GET_INPUT_SECTION_SIZE.
 486         (ld_plugin_tv): Add tv_get_input_section_alignment and
 487         tv_get_input_section_size.
 488
 489 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 490
 491         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 492
 493 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 494
 495         PR ld/19645
 496         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 497         (bfd_link_info): Add elf_stt_common.
 498
 499 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 500
 501         PR ld/19636
 502         PR ld/19704
 503         PR ld/19719
 504         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 505
 506 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 507             Jiong Wang  <jiong.wang@arm.com>
 508
 509         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 510
 511 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 512             Janek van Oirschot  <jvanoirs@synopsys.com>
 513
 514         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 515         (arc_num_relax_opcodes): Declare.
 516
 517 2016-02-09  Nick Clifton  <nickc@redhat.com>
 518
 519         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 520         * opcode/nds32.h (nds32_r45map): Likewise.
 521         (nds32_r54map): Likewise.
 522         * opcode/visium.h (gen_reg_table): Likewise.
 523         (fp_reg_table, cc_table, opcode_table): Likewise.
 524
 525 2016-02-09  Alan Modra  <amodra@gmail.com>
 526
 527         PR 16583
 528         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 529
 530 2016-02-04  Nick Clifton  <nickc@redhat.com>
 531
 532         PR target/19561
 533         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 534         (RRUX): Synthesise using case 2 rather than 7.
 535
 536 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 537
 538         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 539         (NT_FREEBSD_PROCSTAT_PROC): Define.
 540         (NT_FREEBSD_PROCSTAT_FILES): Define.
 541         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 542         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 543         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 544         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 545         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 546         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 547         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 548
 549 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 550             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 551
 552         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 553         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 554         (ARC_TLS_LE_32): Fixed formula.
 555         (ARC_TLS_GD_LD): Use new special function.
 556         * opcode/arc-func.h: Changed all the replacement
 557         functions to clear the patching bits before doing an or it with the value
 558         argument.
 559
 560 2016-01-18  Nick Clifton  <nickc@redhat.com>
 561
 562         PR ld/19440
 563         * coff/internal.h (internal_syment): Use int to hold section
 564         number.
 565         (N_UNDEF): Cast to int not short.
 566         (N_ABS): Likewise.
 567         (N_DEBUG): Likewise.
 568         (N_TV): Likewise.
 569         (P_TV): Likewise.
 570
 571 2016-01-11  Nick Clifton  <nickc@redhat.com>
 572
 573         Import this change from GCC mainline:
 574
 575         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 576
 577         * longlong.h: Change !__SHMEDIA__ to
 578         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 579         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 580
 581 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 582
 583         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 584
 585 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 586
 587         * libiberty.h (dupargv): Change arg to char * const *.
 588         (writeargv, countargv): Likewise.
 589
 590 2016-01-01  Alan Modra  <amodra@gmail.com>
 591
 592         Update year range in copyright notice of all files.
 593
 594 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 595 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 596 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 597 som/ChangeLog-1015, and vms/ChangeLog-1015
 598 \f
 599 Copyright (C) 2016 Free Software Foundation, Inc.
 600
 601 Copying and distribution of this file, with or without modification,
 602 are permitted in any medium without royalty provided the copyright
 603 notice and this notice are preserved.
 604
 605 Local Variables:
 606 mode: change-log
 607 left-margin: 8
 608 fill-column: 74
 609 version-control: never
 610 End: