[binutils][arm] PR25376 Change MVE into a CORE_HIGH feature
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2
3 PR 25376
4 * opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to...
5 (ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space.
6 (ARM_ANY): Redefine to not include any MVE bits.
7 (ARM_FEATURE_ALL): Removed.
8
9 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
10
11 * opcode/msp430.h (enum msp430_expp_e): New.
12 (struct msp430_operand_s): Add expp member to struct.
13
14 2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
15
16 * elf/arc-cpu.def: Update ARC cpu list.
17
18 2020-01-13 Alan Modra <amodra@gmail.com>
19
20 * opcode/tic4x.h (EXTR): Delete.
21 (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
22 extension using shifts. Do trim INSERTU value to specified bitfield.
23
24 2020-01-10 Alan Modra <amodra@gmail.com>
25
26 * opcode/spu.h: Formatting.
27 (UNSIGNED_EXTRACT): Use 1u.
28 (SIGNED_EXTRACT): Don't sign extend with shifts.
29 (DECODE_INSN_I9a, DECODE_INSN_I9b): Avoid left shift of signed value.
30 Keep result signed.
31 (DECODE_INSN_U9a, DECODE_INSN_U9b): Delete.
32
33 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
34
35 * opcode/arc.h (insn_class_t): Add 'LLOCK' and 'SCOND'.
36
37 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
38
39 * coff/internal.h: Add defintions of Z80 reloc names.
40
41 2020-01-02 Christian Biesinger <cbiesinger@google.com>
42
43 * opcode/s12z.h: Undef REG_Y.
44
45 2020-01-01 Alan Modra <amodra@gmail.com>
46
47 Update year range in copyright notice of all files.
48
49 For older changes see ChangeLog-2019
50 \f
51 Copyright (C) 2020 Free Software Foundation, Inc.
52
53 Copying and distribution of this file, with or without modification,
54 are permitted in any medium without royalty provided the copyright
55 notice and this notice are preserved.
56
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58 mode: change-log
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