1 2016-12-09 Maciej W. Rozycki <macro@imgtec.com>
3 * opcode/mips.h: Remove references to `>' operand code.
5 2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
7 * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
9 2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
11 * opcode/mips.h (ASE_DSPR3): Add a comment.
13 2016-12-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
15 * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
16 (ARM_ARCH_V8_3A): New.
18 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com>
20 * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
23 2016-11-22 Jose E. Marchesi <jose.marchesi@oracle.com>
25 * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
28 2016-11-22 Alan Modra <amodra@gmail.com>
31 * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
33 2016-11-03 David Tolnay <dtolnay@gmail.com>
34 Mark Wielaard <mark@klomp.org>
36 * demangle.h (DMGL_RUST): New macro.
37 (DMGL_STYLE_MASK): Add DMGL_RUST.
38 (demangling_styles): Add dlang_rust.
39 (RUST_DEMANGLING_STYLE_STRING): New macro.
40 (RUST_DEMANGLING): New macro.
41 (rust_demangle): New prototype.
42 (rust_is_mangled): Likewise.
43 (rust_demangle_sym): Likewise.
45 2016-11-07 Jason Merrill <jason@redhat.com>
47 * demangle.h (enum demangle_component_type): Add
48 DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
50 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
52 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
53 AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
54 (enum aarch64_op): Add OP_FCMLA_ELEM.
56 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
58 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
59 (enum aarch64_insn_class): Add ldst_imm10.
61 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
63 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
65 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
67 * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
68 (AARCH64_ARCH_V8_3): Define.
69 (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
71 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
73 * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
74 (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
75 (ARM_ARCH_V8M_MAIN_DSP): Likewise.
77 2016-11-03 Graham Markall <graham.markall@embecosm.com>
79 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
81 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
83 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
85 (struct arc_long_opcode): Delete.
86 (struct arc_operand): Change types for insert and extract
89 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
91 * opcode/arc.h: Make macros 64-bit safe.
93 2016-11-03 Graham Markall <graham.markall@embecosm.com>
95 * opcode/arc.h (arc_opcode_len): Declare.
98 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
99 Andrew Waterman <andrew@sifive.com>
101 Add support for RISC-V architecture.
102 * dis-asm.h: Add prototypes for print_insn_riscv and
103 print_riscv_disassembler_options.
104 * elf/riscv.h: New file.
105 * opcode/riscv-opc.h: New file.
106 * opcode/riscv.h: New file.
108 2016-10-17 Nick Clifton <nickc@redhat.com>
110 * elf/common.h (DT_SYMTAB_SHNDX): Define.
111 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
112 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
113 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
114 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
115 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
116 (ELFOSABI_OPENVOS): Define.
117 (GRP_MASKOS, GRP_MASKPROC): Define.
119 2016-10-14 Pedro Alves <palves@redhat.com>
121 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
122 OVERRIDE): Define as empty.
123 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
125 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
128 2016-10-14 Pedro Alves <palves@redhat.com>
130 * ansidecl.h (GCC_FINAL): Delete.
131 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
133 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
135 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
137 2016-09-29 Alan Modra <amodra@gmail.com>
139 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
141 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
143 * opcode/arc.h (insn_class_t): Add two new classes.
145 2016-09-26 Alan Modra <amodra@gmail.com>
147 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
149 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
151 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
153 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
155 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
156 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
157 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
158 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
160 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
162 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
163 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
164 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
165 aarch64_insn_classes.
167 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
169 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
170 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
171 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
173 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
175 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
176 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
177 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
179 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
181 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
182 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
183 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
184 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
185 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
186 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
187 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
188 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
189 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
190 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
191 (aarch64_sve_dupm_mov_immediate_p): Declare.
193 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
195 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
196 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
197 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
198 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
199 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
201 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
203 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
204 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
205 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
206 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
207 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
208 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
209 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
210 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
211 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
212 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
213 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
214 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
215 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
216 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
217 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
218 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
221 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
223 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
225 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
226 (aarch64_opnd_info): Make shifter.amount an int64_t and
227 rearrange the fields.
229 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
231 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
232 (AARCH64_OPND_SVE_PRFOP): Likewise.
233 (aarch64_sve_pattern_array): Declare.
234 (aarch64_sve_prfop_array): Likewise.
236 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
238 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
239 (AARCH64_OPND_QLF_P_M): Likewise.
241 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
243 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
244 aarch64_operand_class.
245 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
246 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
247 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
248 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
249 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
250 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
251 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
252 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
254 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
256 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
257 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
259 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
261 * opcode/aarch64.h (F_STRICT): New flag.
263 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
265 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
267 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
268 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
269 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
270 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
273 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
275 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
276 (ARM_SET_SYM_CMSE_SPCL): Likewise.
278 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
280 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
282 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
284 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
286 2016-07-27 Graham Markall <graham.markall@embecosm.com>
288 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
289 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
291 * opcode/arc.h: Add BMU to insn_class_t enum.
292 * opcode/arc.h: Add PMU to insn_class_t enum.
294 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
296 * dis-asm.h: Declare print_arc_disassembler_options.
298 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
300 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
301 out_implib_bfd fields.
303 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
305 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
307 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
309 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
310 (SHF_ARM_PURECODE): ... this.
312 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
314 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
315 (AARCH64_CPU_HAS_ANY_FEATURES): New.
316 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
317 (AARCH64_OPCODE_HAS_FEATURE): Remove.
319 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
321 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
322 of enabled FPU features.
324 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
326 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
327 SPARC_OPCODE_ARCH_MAX into the enum.
329 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
331 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
333 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
335 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
337 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
339 * elf/xtensa.h (xtensa_make_property_section): New prototype.
341 2016-06-24 John Baldwin <jhb@FreeBSD.org>
343 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
344 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
345 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
346 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
348 2016-06-23 Graham Markall <graham.markall@embecosm.com>
350 * opcode/arc.h: Make insn_class_t alphabetical again.
352 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
354 * elf/dlx.h: Wrap in extern C.
355 * elf/xtensa.h: Likewise.
356 * opcode/arc.h: Likewise.
358 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
360 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
363 2016-06-21 Graham Markall <graham.markall@embecosm.com>
365 * opcode/arc.h: Add nps400 extension and instruction
367 Remove ARC_OPCODE_NPS400
368 * elf/arc.h: Remove E_ARC_MACH_NPS400
370 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
372 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
373 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
374 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
375 SPARC_OPCODE_ARCH_V9M.
377 2016-06-14 John Baldwin <jhb@FreeBSD.org>
379 * opcode/msp430-decode.h (MSP430_Size): Remove.
380 (Msp430_Opcode_Decoded): Change type of size to int.
382 2016-06-11 Alan Modra <amodra@gmail.com>
384 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
386 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
388 * opcode/sparc.h: Add missing documentation for hyperprivileged
389 registers in rd (%) and rs1 ($).
391 2016-06-07 Alan Modra <amodra@gmail.com>
393 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
394 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
395 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
396 PPC_APUINFO_VLE: Define.
398 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
400 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
402 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
404 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
406 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
407 (struct arc_long_opcode): New structure.
408 (arc_long_opcodes): Declare.
409 (arc_num_long_opcodes): Declare.
411 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
413 * elf/mips.h: Add extern "C".
414 * elf/sh.h: Likewise.
415 * opcode/d10v.h: Likewise.
416 * opcode/d30v.h: Likewise.
417 * opcode/ia64.h: Likewise.
418 * opcode/mips.h: Likewise.
419 * opcode/ppc.h: Likewise.
420 * opcode/sparc.h: Likewise.
421 * opcode/tic6x.h: Likewise.
422 * opcode/v850.h: Likewise.
424 2016-05-28 Alan Modra <amodra@gmail.com>
426 * bfdlink.h (struct bfd_link_callbacks): Update comments.
427 Return void from multiple_definition, multiple_common,
428 add_to_set, constructor, warning, undefined_symbol,
429 reloc_overflow, reloc_dangerous and unattached_reloc.
431 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
433 * opcode/metag.h: wrap declarations in extern "C".
435 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
437 * opcode/arc.h (insn_subclass_t): Add COND.
438 (flag_class_t): Add F_CLASS_EXTEND.
440 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
442 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
444 (struct arc_flag_class): Renamed attribute class to flag_class.
446 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
448 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
451 2016-04-29 Tom Tromey <tom@tromey.com>
453 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
454 DW_LANG_Rust_old>: New constants.
456 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
458 * elf/mips.h (AFL_ASE_DSPR3): New macro.
459 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
460 * opcode/mips.h (ASE_DSPR3): New macro.
462 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
463 Nick Clifton <nickc@redhat.com>
465 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
467 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
468 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
469 (ARM_SYM_BRANCH_TYPE): Replace by ...
470 (ARM_GET_SYM_BRANCH_TYPE): This and ...
471 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
472 BFD_ASSERT is defined or not.
474 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
476 * elf/arm.h (Tag_DSP_extension): Define.
478 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
480 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
482 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
484 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
485 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
486 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
487 for the high core bits.
489 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
491 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
492 (ARC_SYNTAX_NOP): Likewsie.
493 (ARC_OP1_MUST_BE_IMM): Update defined value.
494 (ARC_OP1_IMM_IMPLIED): Likewise.
495 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
497 2016-04-28 Nick Clifton <nickc@redhat.com>
500 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
502 2016-04-27 Alan Modra <amodra@gmail.com>
504 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
507 2016-04-21 Nick Clifton <nickc@redhat.com>
509 * bfdlink.h: Add prototype for bfd_link_check_relocs.
511 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
513 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
515 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
517 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
519 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
521 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
523 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
525 * opcode/arc.h (insn_class_t): Add NET and ACL class.
527 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
529 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
530 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
532 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
534 * opcode/arc.h (flag_class_t): Update.
535 (ARC_OPCODE_NONE): Define.
536 (ARC_OPCODE_ARCALL): Likewise.
537 (ARC_OPCODE_ARCFPX): Likewise.
538 (ARC_REGISTER_READONLY): Likewise.
539 (ARC_REGISTER_WRITEONLY): Likewise.
540 (ARC_REGISTER_NOSHORT_CUT): Likewise.
541 (arc_aux_reg): Add cpu.
543 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
545 * opcode/arc.h (arc_num_opcodes): Remove.
546 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
547 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
548 (ARC_SUFFIX_FLAG): Define.
549 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
550 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
551 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
552 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
553 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
554 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
555 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
556 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
557 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
558 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
560 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
562 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
564 (arc_aux_reg): Add new field.
566 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
568 * opcode/arc-func.h (replace_bits24): Changed.
569 (replace_bits24_be): Created.
571 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
573 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
574 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
575 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
576 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
577 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
578 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
579 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
580 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
581 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
582 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
583 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
584 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
585 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
586 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
588 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
590 * opcode/i960.h: Add const qualifiers.
591 * opcode/tic4x.h (struct tic4x_inst): Likewise.
593 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
595 * opcodes/arc.h (insn_class_t): Add BITOP type.
597 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
599 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
602 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
604 * elf/arc.h (E_ARC_MACH_NPS400): Define.
605 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
607 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
609 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
611 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
613 * elf/arc.h (EF_ARC_MACH): Delete.
614 (EF_ARC_MACH_MSK): Remove out of date comment.
616 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
618 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
620 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
623 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
625 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
626 Andrew Burgess <andrew.burgess@embecosm.com>
628 * elf/arc-reloc.def: Add a call to ME within the formula for each
629 relocation that requires middle-endian correction.
631 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
633 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
634 * opcode/h8300.h (struct h8_opcode): Likewise.
635 * opcode/hppa.h (struct pa_opcode): Likewise.
636 * opcode/msp430.h: Likewise.
637 * opcode/spu.h (struct spu_opcode): Likewise.
638 * opcode/tic30.h (struct _register): Likewise.
639 * opcode/tic4x.h (struct tic4x_register): Likewise.
640 (struct tic4x_cond): Likewise.
641 (struct tic4x_indirect): Likewise.
642 (struct tic4x_inst): Likewise.
643 * opcode/visium.h (struct reg_entry): Likewise.
645 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
647 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
648 (ARM_CPU_HAS_FEATURE): Add comment.
650 2016-03-03 Than McIntosh <thanm@google.com>
652 * plugin-api.h: Add new hooks to the plugin transfer vector to
653 to support querying section alignment and section size.
654 (ld_plugin_get_input_section_alignment): New hook.
655 (ld_plugin_get_input_section_size): New hook.
656 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
657 and LDPT_GET_INPUT_SECTION_SIZE.
658 (ld_plugin_tv): Add tv_get_input_section_alignment and
659 tv_get_input_section_size.
661 2016-03-03 Evgenii Stepanov <eugenis@google.com>
663 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
665 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
668 * bfdlink.h (bfd_link_elf_stt_common): New enum.
669 (bfd_link_info): Add elf_stt_common.
671 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
676 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
678 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
679 Jiong Wang <jiong.wang@arm.com>
681 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
683 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
684 Janek van Oirschot <jvanoirs@synopsys.com>
686 * opcode/arc.h (arc_opcode arc_relax_opcodes)
687 (arc_num_relax_opcodes): Declare.
689 2016-02-09 Nick Clifton <nickc@redhat.com>
691 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
692 * opcode/nds32.h (nds32_r45map): Likewise.
693 (nds32_r54map): Likewise.
694 * opcode/visium.h (gen_reg_table): Likewise.
695 (fp_reg_table, cc_table, opcode_table): Likewise.
697 2016-02-09 Alan Modra <amodra@gmail.com>
700 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
702 2016-02-04 Nick Clifton <nickc@redhat.com>
705 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
706 (RRUX): Synthesise using case 2 rather than 7.
708 2016-01-19 John Baldwin <jhb@FreeBSD.org>
710 * elf/common.h (NT_FREEBSD_THRMISC): Define.
711 (NT_FREEBSD_PROCSTAT_PROC): Define.
712 (NT_FREEBSD_PROCSTAT_FILES): Define.
713 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
714 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
715 (NT_FREEBSD_PROCSTAT_UMASK): Define.
716 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
717 (NT_FREEBSD_PROCSTAT_OSREL): Define.
718 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
719 (NT_FREEBSD_PROCSTAT_AUXV): Define.
721 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
722 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
724 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
725 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
726 (ARC_TLS_LE_32): Fixed formula.
727 (ARC_TLS_GD_LD): Use new special function.
728 * opcode/arc-func.h: Changed all the replacement
729 functions to clear the patching bits before doing an or it with the value
732 2016-01-18 Nick Clifton <nickc@redhat.com>
735 * coff/internal.h (internal_syment): Use int to hold section
737 (N_UNDEF): Cast to int not short.
743 2016-01-11 Nick Clifton <nickc@redhat.com>
745 Import this change from GCC mainline:
747 2016-01-07 Mike Frysinger <vapier@gentoo.org>
749 * longlong.h: Change !__SHMEDIA__ to
750 (!defined (__SHMEDIA__) || !__SHMEDIA__).
751 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
753 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
755 * opcode/mips.h: Add a summary of MIPS16 operand codes.
757 2016-01-05 Mike Frysinger <vapier@gentoo.org>
759 * libiberty.h (dupargv): Change arg to char * const *.
760 (writeargv, countargv): Likewise.
762 2016-01-01 Alan Modra <amodra@gmail.com>
764 Update year range in copyright notice of all files.
766 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
767 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
768 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
769 som/ChangeLog-1015, and vms/ChangeLog-1015
771 Copyright (C) 2016 Free Software Foundation, Inc.
773 Copying and distribution of this file, with or without modification,
774 are permitted in any medium without royalty provided the copyright
775 notice and this notice are preserved.
781 version-control: never