1 2020-06-22 Alex Coplan <alex.coplan@arm.com>
3 * opcode/aarch64.h (AARCH64_FEATURE_SHA2): Normalize.
4 (AARCH64_FEATURE_AES): Likewise.
5 (AARCH64_FEATURE_V8_4): Likewise.
6 (AARCH64_FEATURE_SM4): Likewise.
7 (AARCH64_FEATURE_SHA3): Likewise.
8 (AARCH64_FEATURE_V8): Likewise.
9 (AARCH64_FEATURE_V8_2): Likewise.
10 (AARCH64_FEATURE_V8_3): Likewise.
11 (AARCH64_FEATURE_FP): Likewise.
12 (AARCH64_FEATURE_SIMD): Likewise.
13 (AARCH64_FEATURE_CRC): Likewise.
14 (AARCH64_FEATURE_LSE): Likewise.
15 (AARCH64_FEATURE_PAN): Likewise.
16 (AARCH64_FEATURE_LOR): Likewise.
17 (AARCH64_FEATURE_RDMA): Likewise.
18 (AARCH64_FEATURE_V8_1): Likewise.
19 (AARCH64_FEATURE_F16): Likewise.
20 (AARCH64_FEATURE_RAS): Likewise.
21 (AARCH64_FEATURE_PROFILE): Likewise.
22 (AARCH64_FEATURE_SVE): Likewise.
23 (AARCH64_FEATURE_RCPC): Likewise.
24 (AARCH64_FEATURE_COMPNUM): Likewise.
25 (AARCH64_FEATURE_DOTPROD): Likewise.
26 (AARCH64_FEATURE_F16_FML): Likewise.
27 (AARCH64_FEATURE_V8_5): Likewise.
28 (AARCH64_FEATURE_V8_6): Likewise.
29 (AARCH64_FEATURE_BFLOAT16): Likewise.
30 (AARCH64_FEATURE_FLAGMANIP): Likewise.
31 (AARCH64_FEATURE_FRINTTS): Likewise.
32 (AARCH64_FEATURE_SB): Likewise.
33 (AARCH64_FEATURE_PREDRES): Likewise.
34 (AARCH64_FEATURE_CVADP): Likewise.
35 (AARCH64_FEATURE_RNG): Likewise.
36 (AARCH64_FEATURE_BTI): Likewise.
37 (AARCH64_FEATURE_SCXTNUM): Likewise.
38 (AARCH64_FEATURE_ID_PFR2): Likewise.
39 (AARCH64_FEATURE_SSBS): Likewise.
40 (AARCH64_FEATURE_MEMTAG): Likewise.
41 (AARCH64_FEATURE_TME): Likewise.
42 (AARCH64_FEATURE_I8MM): Likewise.
43 (AARCH64_FEATURE_F32MM): Likewise.
44 (AARCH64_FEATURE_F64MM): Likewise.
45 (AARCH64_FEATURE_SVE2): Likewise.
46 (AARCH64_FEATURE_SVE2_AES): Likewise.
47 (AARCH64_FEATURE_SVE2_BITPERM): Likewise.
48 (AARCH64_FEATURE_SVE2_SM4): Likewise.
49 (AARCH64_FEATURE_SVE2_SHA3): Likewise.
51 2020-06-22 Saagar Jha <saagar@saagarjha.com>
53 * mach-o/loader.h: Add declarations of two new Mach-O load
56 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
58 * opcode/riscv.h (riscv_get_priv_spec_class): Move the function
59 forward declarations to bfd/elfxx-riscv.h.
60 (riscv_get_priv_spec_name): Likewise.
62 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
64 * elf/xtensa.h (xtensa_abi_choice): New declaration.
66 2020-06-12 Roland McGrath <mcgrathr@google.com>
68 * bfdlink.h (struct bfd_link_info): New field start_stop_visibility.
70 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
72 * opcode/riscv-opc.h: Update the defined versions of CSR from
73 PRIV_SPEC_CLASS_1P9 to PRIV_SPEC_CLASS_1P9P1. Also, drop the
74 MISA DECLARE_CSR_ALIAS since it's aborted version is v1.9.
75 * opcode/riscv.h (enum riscv_priv_spec_class): Remove
78 2020-06-11 Alex Coplan <alex.coplan@arm.com>
80 * opcode/aarch64.h (aarch64_sys_reg): Add required features to struct
81 describing system registers.
83 2020-06-11 Alan Modra <amodra@gmail.com>
85 * elf/mips.h (Elf32_RegInfo): Use fixed width integer types.
86 (Elf64_Internal_RegInfo, Elf_Internal_Options): Likewise.
88 2020-06-06 Alan Modra <amodra@gmail.com>
90 * elf/ppc64.h (elf_ppc64_reloc_type): Rename
91 R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
92 R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
93 R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
94 R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
96 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
98 * opcode/cgen.h: Get an `endian' argument in both
99 cgen_get_insn_value and cgen_put_insn_value.
101 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
103 * opcode/cgen.h (enum cgen_cpu_open_arg): New value
104 CGEN_CPU_OPEN_INSN_ENDIAN.
106 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
108 * opcode/riscv.h: Remove #include "bfd.h". And change the return
109 types of riscv_get_isa_spec_class and riscv_get_priv_spec_class
110 from bfd_boolean to int.
112 2020-05-28 Alan Modra <amodra@gmail.com>
115 * opcode/tilepro.h (TILEPRO_NUM_PIPELINE_ENCODINGS): Move to
116 tilepro_pipeline enum.
118 2020-05-27 H.J. Lu <hongjiu.lu@intel.com>
121 * bfdlink.h (textrel_check_method): New enum.
122 (bfd_link_textrel_check): New.
123 (bfd_link_info): Replace warn_shared_textrel and error_textrel
126 2020-05-25 H.J. Lu <hongjiu.lu@intel.com>
128 * elf/common.h: Update comments for ET_EXEC and ET_DYN.
130 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
132 * opcode/riscv.h: Include "bfd.h" to support bfd_boolean.
133 (enum riscv_isa_spec_class): New enum class. All supported ISA spec
134 belong to one of the class
135 (struct riscv_ext_version): New structure holds version information
136 for the specific ISA.
137 * opcode/riscv-opc.h (DECLARE_CSR): There are two version information,
138 define_version and abort_version. The define_version means which
139 privilege spec is started to define the CSR, and the abort_version
140 means which privilege spec is started to abort the CSR. If the CSR is
141 valid for the newest spec, then the abort_version should be
142 PRIV_SPEC_CLASS_DRAFT.
143 (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
144 * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define
145 the current supported privilege spec versions.
146 (struct riscv_csr_extra): Add new fields to store more information
147 about the CSR. We use these information to find the suitable CSR
148 address when user choosing a specific privilege spec.
150 2020-05-19 Alexander Fedotov <alfedotov@gmail.com>
153 * opcode/arm.h (ARM_EXT2_V8R): Define. Modified ARM_AEXT2_V8R.
155 2020-05-11 Alan Modra <amodra@gmail.com>
157 * opcode/ppc.h (PPC_OPERAND_ACC): Define. Renumber following
160 2020-05-11 Alan Modra <amodra@gmail.com>
162 * elf/ppc64.h: Update comment.
163 * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
165 2020-04-30 Alex Coplan <alex.coplan@arm.com>
167 * opcode/aarch64.h (enum aarch64_opnd): Add
168 AARCH64_OPND_UNDEFINED.
170 2020-04-23 Anton Kolesov <anton.kolesov@synopsys.com>
172 * elf/common.h (NT_ARC_V2): New macro definitions.
174 2020-04-22 Max Filippov <jcmvbkbc@gmail.com>
177 * elf/xtensa.h (elf_xtensa_reloc_type): New entries for
178 R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
180 2020-04-21 Alan Modra <amodra@gmail.com>
182 * elf/sh.h (STO_SH5_ISA32, SHF_SH5_ISA32, SHF_SH5_ISA32_MIXED),
183 (SHT_SH5_CR_SORTED, STT_DATALABEL): Delete.
185 2020-04-10 Fangrui Song <maskray@google.com>
188 * bfdlink.h (enum report_method): Delete RM_GENERATE_WARNING and
189 RM_GENERATE_ERROR. Add RM_DIAGNOSE.
190 (struct bfd_link_info): Add warn_unresolved_syms.
192 2020-04-14 Stephen Casner <casner@acm.org>
195 * aout/aout64.h (N_DATADDR): Add IMAGIC case.
197 2020-04-02 Jan W. Jagersma <jwjagersma@gmail.com>
199 * coff/go32exe.h: Remove file.
200 * coff/internal.h (struct internal_filehdr): Remove field
201 go32stub. Remove flag F_GO32STUB.
203 2020-04-01 Martin Liska <mliska@suse.cz>
204 Maciej W. Rozycki <macro@linux-mips.org>
207 * plugin-api.h: Fix a typo.
209 2020-03-30 Nelson Chu <nelson.chu@sifive.com>
211 * opcode/riscv-opc.h: Update CSR to 1.11.
213 2020-03-26 John Baldwin <jhb@FreeBSD.org>
215 * elf/common.h (AT_FREEBSD_BSDFLAGS): Define.
217 2020-03-24 Martin Liska <mliska@suse.cz>
220 * plugin-api.h: Add more robust endianess detection.
222 2020-03-21 Martin Liska <mliska@suse.cz>
224 * plugin-api.h (enum ld_plugin_symbol_type): Remove
225 comma after last value of an enum.
226 * lto-symtab.h (enum gcc_plugin_symbol_type): Likewise.
228 2020-03-19 Martin Liska <mliska@suse.cz>
230 * lto-symtab.h (enum gcc_plugin_symbol_type): New.
231 (enum gcc_plugin_symbol_section_kind): Likewise.
233 2020-03-19 Martin Liska <mliska@suse.cz>
235 * plugin-api.h (struct ld_plugin_symbol): Split
236 int def into 4 char fields.
237 (enum ld_plugin_symbol_type): New.
238 (enum ld_plugin_symbol_section_kind): New.
239 (enum ld_plugin_tag): Add LDPT_ADD_SYMBOLS_V2.
241 2020-03-13 Kamil Rytarowski <n54@gmx.com>
243 * elf/common.h (NT_NETBSDCORE_LWPSTATUS): New define.
245 2020-03-13 Kamil Rytarowski <n54@gmx.com>
247 * elf/common.h (NT_NETBSDCORE_AUXV): New define.
249 2020-03-13 Christophe Lyon <christophe.lyon@linaro.org>
251 * bfdlink.h (bfd_link_info): Add non_contiguous_regions and
252 non_contiguous_regions_warnings fields.
254 2020-03-13 Christian Eggers <ceggers@gmx.de>
256 * bfdlink.h (struct bfd_link_order): Add unit (bytes/octets) to
257 offset and size members.
258 * elf/internal.h (struct elf_internal_phdr): Likewise for
260 (struct elf_segment_map): Likewise for p_paddr and p_size
263 2020-03-13 Christian Eggers <ceggers@gmx.de>
265 * elf/internal.h (struct elf_internal_phdr): Add unit (octets)
266 to several member field comments.
267 (Elf_Internal_Shdr): likewise.
269 2020-03-10 Alan Modra <amodra@gmail.com>
271 * som/aout.h (SOM_AUX_ID_MANDATORY, SOM_SPACE_IS_LOADABLE),
272 (SOM_SYMBOL_HIDDEN, SOM_SYMBOL_HAS_LONG_RETURN): Use 1u << 31.
273 * som/lst.h (LST_SYMBOL_HIDDEN): Likewise.
275 2020-03-03 Luis Machado <luis.machado@linaro.org>
277 * elf/common.h (AT_L1I_CACHESIZE, AT_L1I_CACHEGEOMETRY)
278 (AT_L1D_CACHESIZE, AT_L1D_CACHEGEOMETRY, AT_L2_CACHESIZE)
279 (AT_L2_CACHEGEOMETRY, AT_L3_CACHESIZE, AT_L3_CACHEGEOMETRY)
280 (AT_MINSIGSTKSZ): New defines, imported from glibc.
282 2020-02-25 Andrew Burgess <andrew.burgess@embecosm.com>
284 Import from gcc mainline:
285 2020-02-05 Andrew Burgess <andrew.burgess@embecosm.com>
287 * hashtab.h (htab_remove_elt): Make a parameter const.
288 (htab_remove_elt_with_hash): Likewise.
290 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
292 * opcode/riscv-opc.h: Extend DECLARE_CSR and DECLARE_CSR_ALIAS to
293 record riscv_csr_class.
295 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
296 Matthew Malcomson <matthew.malcomson@arm.com>
298 * opcode/arm.h (ARM_EXT2_CDE): New extension macro.
299 (ARM_EXT2_CDE0): New extension macro.
300 (ARM_EXT2_CDE1): New extension macro.
301 (ARM_EXT2_CDE2): New extension macro.
302 (ARM_EXT2_CDE3): New extension macro.
303 (ARM_EXT2_CDE4): New extension macro.
304 (ARM_EXT2_CDE5): New extension macro.
305 (ARM_EXT2_CDE6): New extension macro.
306 (ARM_EXT2_CDE7): New extension macro.
308 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
311 * coff/internal.h (R_IMM16BE): Define.
312 * elf/z80.h (EF_Z80_MACH_Z80N): Define.
313 (R_Z80_16_BE): New reloc.
315 2020-02-04 Alan Modra <amodra@gmail.com>
317 * opcode/d30v.h (struct pd_reg): Make value field unsigned.
319 2020-01-16 Jon Turney <jon.turney@dronecode.org.uk>
321 * coff/internal.h (PE_IMAGE_DEBUG_TYPE_VC_FEATURE)
322 (PE_IMAGE_DEBUG_TYPE_POGO, PE_IMAGE_DEBUG_TYPE_ILTCG)
323 (PE_IMAGE_DEBUG_TYPE_MPX, PE_IMAGE_DEBUG_TYPE_REPRO): Add.
325 2020-01-18 Nick Clifton <nickc@redhat.com>
327 Binutils 2.34 branch created.
329 2020-01-17 Nick Clifton <nickc@redhat.com>
331 * Import from gcc mainline:
332 2019-06-10 Martin Liska <mliska@suse.cz>
334 * ansidecl.h (ATTRIBUTE_WARN_UNUSED_RESULT): New macro.
335 * libiberty.h (xmalloc): Use it.
336 (xrealloc): Likewise.
339 (xstrndup): Likewise.
342 2019-06-10 Martin Liska <mliska@suse.cz>
345 (ATTRIBUTE_RESULT_SIZE_1): Define new macro.
346 (ATTRIBUTE_RESULT_SIZE_2): Likewise.
347 (ATTRIBUTE_RESULT_SIZE_1_2): Likewise.
348 * libiberty.h (xmalloc): Add RESULT_SIZE attribute.
349 (xrealloc): Likewise.
352 2019-11-16 Tim Ruehsen <tim.ruehsen@gmx.de>
354 * demangle.h (struct demangle_component): Add member
357 2019-11-16 Eduard-Mihai Burtescu <eddyb@lyken.rs>
359 * demangle.h (rust_demangle_callback): Add.
361 2019-07-18 Eduard-Mihai Burtescu <eddyb@lyken.rs>
363 * demangle.h (rust_is_mangled): Move to libiberty/rust-demangle.h.
364 (rust_demangle_sym): Move to libiberty/rust-demangle.h.
366 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
369 * opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to...
370 (ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space.
371 (ARM_ANY): Redefine to not include any MVE bits.
372 (ARM_FEATURE_ALL): Removed.
374 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
376 * opcode/msp430.h (enum msp430_expp_e): New.
377 (struct msp430_operand_s): Add expp member to struct.
379 2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
381 * elf/arc-cpu.def: Update ARC cpu list.
383 2020-01-13 Alan Modra <amodra@gmail.com>
385 * opcode/tic4x.h (EXTR): Delete.
386 (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
387 extension using shifts. Do trim INSERTU value to specified bitfield.
389 2020-01-10 Alan Modra <amodra@gmail.com>
391 * opcode/spu.h: Formatting.
392 (UNSIGNED_EXTRACT): Use 1u.
393 (SIGNED_EXTRACT): Don't sign extend with shifts.
394 (DECODE_INSN_I9a, DECODE_INSN_I9b): Avoid left shift of signed value.
396 (DECODE_INSN_U9a, DECODE_INSN_U9b): Delete.
398 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
400 * opcode/arc.h (insn_class_t): Add 'LLOCK' and 'SCOND'.
402 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
404 * coff/internal.h: Add defintions of Z80 reloc names.
406 2020-01-02 Christian Biesinger <cbiesinger@google.com>
408 * opcode/s12z.h: Undef REG_Y.
410 2020-01-01 Alan Modra <amodra@gmail.com>
412 Update year range in copyright notice of all files.
414 For older changes see ChangeLog-2019
416 Copyright (C) 2020 Free Software Foundation, Inc.
418 Copying and distribution of this file, with or without modification,
419 are permitted in any medium without royalty provided the copyright
420 notice and this notice are preserved.
426 version-control: never