include/ChangeLog

   1 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
   2
   3         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
   4         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
   5         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
   6         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
   7
   8 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
   9
  10         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
  11         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
  12         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
  13         aarch64_insn_classes.
  14
  15 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  16
  17         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
  18         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
  19         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
  20
  21 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  22
  23         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
  24         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
  25         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
  26
  27 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  28
  29         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
  30         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
  31         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
  32         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
  33         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
  34         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
  35         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
  36         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
  37         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
  38         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
  39         (aarch64_sve_dupm_mov_immediate_p): Declare.
  40
  41 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  42
  43         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
  44         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
  45         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
  46         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
  47         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
  48
  49 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  50
  51         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
  52         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
  53         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
  54         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
  55         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
  56         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
  57         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
  58         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
  59         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
  60         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
  61         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
  62         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
  63         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
  64         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
  65         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
  66         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
  67         Likewise.
  68
  69 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  70
  71         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
  72         aarch64_opnd.
  73         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
  74         (aarch64_opnd_info): Make shifter.amount an int64_t and
  75         rearrange the fields.
  76
  77 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  78
  79         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
  80         (AARCH64_OPND_SVE_PRFOP): Likewise.
  81         (aarch64_sve_pattern_array): Declare.
  82         (aarch64_sve_prfop_array): Likewise.
  83
  84 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  85
  86         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
  87         (AARCH64_OPND_QLF_P_M): Likewise.
  88
  89 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  90
  91         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
  92         aarch64_operand_class.
  93         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
  94         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
  95         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
  96         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
  97         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
  98         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
  99         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 100         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 101
 102 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 103
 104         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 105         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 106
 107 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 108
 109         * opcode/aarch64.h (F_STRICT): New flag.
 110
 111 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 112
 113         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 114
 115 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 116         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 117         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 118         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 119         relocation.
 120
 121 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 122
 123         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 124         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 125
 126 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 127
 128         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 129
 130 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 131
 132         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 133
 134 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 135
 136         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 137         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 138         ARC_NUM_ADDRTYPES.
 139         * opcode/arc.h: Add BMU to insn_class_t enum.
 140         * opcode/arc.h: Add PMU to insn_class_t enum.
 141
 142 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 143
 144         * dis-asm.h: Declare print_arc_disassembler_options.
 145
 146 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 147
 148         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 149         out_implib_bfd fields.
 150
 151 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 152
 153         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 154
 155 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 156
 157         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 158         (SHF_ARM_PURECODE): ... this.
 159
 160 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 161
 162         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 163         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 164         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 165         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 166
 167 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 168
 169         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 170         of enabled FPU features.
 171
 172 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 173
 174         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 175         SPARC_OPCODE_ARCH_MAX into the enum.
 176
 177 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 178
 179         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 180
 181 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 182
 183         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 184
 185 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 186
 187         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 188
 189 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 190
 191         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 192         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 193         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 194         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 195
 196 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 197
 198         * opcode/arc.h: Make insn_class_t alphabetical again.
 199
 200 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 201
 202         * elf/dlx.h: Wrap in extern C.
 203         * elf/xtensa.h: Likewise.
 204         * opcode/arc.h: Likewise.
 205
 206 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 207
 208         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 209         tilegx_pipeline.
 210
 211 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 212
 213         * opcode/arc.h: Add nps400 extension and instruction
 214         subclass.
 215         Remove ARC_OPCODE_NPS400
 216         * elf/arc.h: Remove E_ARC_MACH_NPS400
 217
 218 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 219
 220         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 221         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 222         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 223         SPARC_OPCODE_ARCH_V9M.
 224
 225 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 226
 227         * opcode/msp430-decode.h (MSP430_Size): Remove.
 228         (Msp430_Opcode_Decoded): Change type of size to int.
 229
 230 2016-06-11  Alan Modra  <amodra@gmail.com>
 231
 232         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 233
 234 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 235
 236         * opcode/sparc.h: Add missing documentation for hyperprivileged
 237         registers in rd (%) and rs1 ($).
 238
 239 2016-06-07  Alan Modra  <amodra@gmail.com>
 240
 241         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 242         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 243         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 244         PPC_APUINFO_VLE: Define.
 245
 246 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 247
 248         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 249         entries.
 250         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 251
 252 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 253
 254         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 255         (struct arc_long_opcode): New structure.
 256         (arc_long_opcodes): Declare.
 257         (arc_num_long_opcodes): Declare.
 258
 259 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 260
 261         * elf/mips.h: Add extern "C".
 262         * elf/sh.h: Likewise.
 263         * opcode/d10v.h: Likewise.
 264         * opcode/d30v.h: Likewise.
 265         * opcode/ia64.h: Likewise.
 266         * opcode/mips.h: Likewise.
 267         * opcode/ppc.h: Likewise.
 268         * opcode/sparc.h: Likewise.
 269         * opcode/tic6x.h: Likewise.
 270         * opcode/v850.h: Likewise.
 271
 272 2016-05-28  Alan Modra  <amodra@gmail.com>
 273
 274         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 275         Return void from multiple_definition, multiple_common,
 276         add_to_set, constructor, warning, undefined_symbol,
 277         reloc_overflow, reloc_dangerous and unattached_reloc.
 278
 279 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 280
 281         * opcode/metag.h: wrap declarations in extern "C".
 282
 283 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 284
 285         * opcode/arc.h (insn_subclass_t): Add COND.
 286         (flag_class_t): Add F_CLASS_EXTEND.
 287
 288 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 289
 290         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 291         insn_class.
 292         (struct arc_flag_class): Renamed attribute class to flag_class.
 293
 294 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 295
 296         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 297         plain symbol.
 298
 299 2016-04-29  Tom Tromey  <tom@tromey.com>
 300
 301         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 302         DW_LANG_Rust_old>: New constants.
 303
 304 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 305
 306         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 307         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 308         * opcode/mips.h (ASE_DSPR3): New macro.
 309
 310 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 311             Nick Clifton  <nickc@redhat.com>
 312
 313         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 314         enumerator.
 315         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 316         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 317         (ARM_SYM_BRANCH_TYPE): Replace by ...
 318         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 319         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 320         BFD_ASSERT is defined or not.
 321
 322 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 323
 324         * elf/arm.h (Tag_DSP_extension): Define.
 325
 326 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 327
 328         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 329
 330 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 331
 332         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 333         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 334         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 335         for the high core bits.
 336
 337 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 338
 339         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 340         (ARC_SYNTAX_NOP): Likewsie.
 341         (ARC_OP1_MUST_BE_IMM): Update defined value.
 342         (ARC_OP1_IMM_IMPLIED): Likewise.
 343         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 344
 345 2016-04-28  Nick Clifton  <nickc@redhat.com>
 346
 347         PR target/19722
 348         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 349
 350 2016-04-27  Alan Modra  <amodra@gmail.com>
 351
 352         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 353         undef.  Formatting.
 354
 355 2016-04-21  Nick Clifton  <nickc@redhat.com>
 356
 357         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 358
 359 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 360
 361         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 362
 363 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 364
 365         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 366
 367 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 368
 369         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 370
 371 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 372
 373         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 374
 375 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 376
 377         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 378         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 379
 380 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 381
 382         * opcode/arc.h (flag_class_t): Update.
 383         (ARC_OPCODE_NONE): Define.
 384         (ARC_OPCODE_ARCALL): Likewise.
 385         (ARC_OPCODE_ARCFPX): Likewise.
 386         (ARC_REGISTER_READONLY): Likewise.
 387         (ARC_REGISTER_WRITEONLY): Likewise.
 388         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 389         (arc_aux_reg): Add cpu.
 390
 391 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 392
 393         * opcode/arc.h (arc_num_opcodes): Remove.
 394         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 395         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 396         (ARC_SUFFIX_FLAG): Define.
 397         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 398         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 399         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 400         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 401         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 402         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 403         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 404         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 405         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 406         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 407
 408 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 409
 410         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 411         (ARC_FPUDA): Define.
 412         (arc_aux_reg): Add new field.
 413
 414 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 415
 416         * opcode/arc-func.h (replace_bits24): Changed.
 417         (replace_bits24_be): Created.
 418
 419 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 420
 421         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 422         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 423         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 424         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 425         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 426         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 427         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 428         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 429         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 430         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 431         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 432         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 433         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 434         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 435
 436 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 437
 438         * opcode/i960.h: Add const qualifiers.
 439         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 440
 441 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 442
 443         * opcodes/arc.h (insn_class_t): Add BITOP type.
 444
 445 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 446
 447         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 448         new classes instead.
 449
 450 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 451
 452         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 453         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 454
 455 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 456
 457         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 458
 459 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 460
 461         * elf/arc.h (EF_ARC_MACH): Delete.
 462         (EF_ARC_MACH_MSK): Remove out of date comment.
 463
 464 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 465
 466         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 467
 468 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 469
 470         PR ld/19807
 471         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 472
 473 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 474             Andrew Burgess  <andrew.burgess@embecosm.com>
 475
 476         * elf/arc-reloc.def: Add a call to ME within the formula for each
 477         relocation that requires middle-endian correction.
 478
 479 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 480
 481         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 482         * opcode/h8300.h (struct h8_opcode): Likewise.
 483         * opcode/hppa.h (struct pa_opcode): Likewise.
 484         * opcode/msp430.h: Likewise.
 485         * opcode/spu.h (struct spu_opcode): Likewise.
 486         * opcode/tic30.h (struct _register): Likewise.
 487         * opcode/tic4x.h (struct tic4x_register): Likewise.
 488         (struct tic4x_cond): Likewise.
 489         (struct tic4x_indirect): Likewise.
 490         (struct tic4x_inst): Likewise.
 491         * opcode/visium.h (struct reg_entry): Likewise.
 492
 493 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 494
 495         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 496         (ARM_CPU_HAS_FEATURE): Add comment.
 497
 498 2016-03-03  Than McIntosh <thanm@google.com>
 499
 500         * plugin-api.h: Add new hooks to the plugin transfer vector to
 501         to support querying section alignment and section size.
 502         (ld_plugin_get_input_section_alignment): New hook.
 503         (ld_plugin_get_input_section_size): New hook.
 504         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 505         and LDPT_GET_INPUT_SECTION_SIZE.
 506         (ld_plugin_tv): Add tv_get_input_section_alignment and
 507         tv_get_input_section_size.
 508
 509 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 510
 511         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 512
 513 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 514
 515         PR ld/19645
 516         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 517         (bfd_link_info): Add elf_stt_common.
 518
 519 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 520
 521         PR ld/19636
 522         PR ld/19704
 523         PR ld/19719
 524         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 525
 526 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 527             Jiong Wang  <jiong.wang@arm.com>
 528
 529         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 530
 531 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 532             Janek van Oirschot  <jvanoirs@synopsys.com>
 533
 534         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 535         (arc_num_relax_opcodes): Declare.
 536
 537 2016-02-09  Nick Clifton  <nickc@redhat.com>
 538
 539         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 540         * opcode/nds32.h (nds32_r45map): Likewise.
 541         (nds32_r54map): Likewise.
 542         * opcode/visium.h (gen_reg_table): Likewise.
 543         (fp_reg_table, cc_table, opcode_table): Likewise.
 544
 545 2016-02-09  Alan Modra  <amodra@gmail.com>
 546
 547         PR 16583
 548         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 549
 550 2016-02-04  Nick Clifton  <nickc@redhat.com>
 551
 552         PR target/19561
 553         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 554         (RRUX): Synthesise using case 2 rather than 7.
 555
 556 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 557
 558         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 559         (NT_FREEBSD_PROCSTAT_PROC): Define.
 560         (NT_FREEBSD_PROCSTAT_FILES): Define.
 561         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 562         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 563         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 564         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 565         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 566         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 567         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 568
 569 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 570             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 571
 572         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 573         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 574         (ARC_TLS_LE_32): Fixed formula.
 575         (ARC_TLS_GD_LD): Use new special function.
 576         * opcode/arc-func.h: Changed all the replacement
 577         functions to clear the patching bits before doing an or it with the value
 578         argument.
 579
 580 2016-01-18  Nick Clifton  <nickc@redhat.com>
 581
 582         PR ld/19440
 583         * coff/internal.h (internal_syment): Use int to hold section
 584         number.
 585         (N_UNDEF): Cast to int not short.
 586         (N_ABS): Likewise.
 587         (N_DEBUG): Likewise.
 588         (N_TV): Likewise.
 589         (P_TV): Likewise.
 590
 591 2016-01-11  Nick Clifton  <nickc@redhat.com>
 592
 593         Import this change from GCC mainline:
 594
 595         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 596
 597         * longlong.h: Change !__SHMEDIA__ to
 598         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 599         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 600
 601 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 602
 603         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 604
 605 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 606
 607         * libiberty.h (dupargv): Change arg to char * const *.
 608         (writeargv, countargv): Likewise.
 609
 610 2016-01-01  Alan Modra  <amodra@gmail.com>
 611
 612         Update year range in copyright notice of all files.
 613
 614 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 615 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 616 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 617 som/ChangeLog-1015, and vms/ChangeLog-1015
 618 \f
 619 Copyright (C) 2016 Free Software Foundation, Inc.
 620
 621 Copying and distribution of this file, with or without modification,
 622 are permitted in any medium without royalty provided the copyright
 623 notice and this notice are preserved.
 624
 625 Local Variables:
 626 mode: change-log
 627 left-margin: 8
 628 fill-column: 74
 629 version-control: never
 630 End: