1 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
3 * opcode/arc.h: Make macros 64-bit safe.
5 2016-11-03 Graham Markall <graham.markall@embecosm.com>
7 * opcode/arc.h (arc_opcode_len): Declare.
10 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
11 Andrew Waterman <andrew@sifive.com>
13 Add support for RISC-V architecture.
14 * dis-asm.h: Add prototypes for print_insn_riscv and
15 print_riscv_disassembler_options.
16 * elf/riscv.h: New file.
17 * opcode/riscv-opc.h: New file.
18 * opcode/riscv.h: New file.
20 2016-10-17 Nick Clifton <nickc@redhat.com>
22 * elf/common.h (DT_SYMTAB_SHNDX): Define.
23 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
24 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
25 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
26 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
27 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
28 (ELFOSABI_OPENVOS): Define.
29 (GRP_MASKOS, GRP_MASKPROC): Define.
31 2016-10-14 Pedro Alves <palves@redhat.com>
33 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
34 OVERRIDE): Define as empty.
35 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
37 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
40 2016-10-14 Pedro Alves <palves@redhat.com>
42 * ansidecl.h (GCC_FINAL): Delete.
43 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
45 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
47 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
49 2016-09-29 Alan Modra <amodra@gmail.com>
51 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
53 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
55 * opcode/arc.h (insn_class_t): Add two new classes.
57 2016-09-26 Alan Modra <amodra@gmail.com>
59 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
61 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
63 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
65 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
67 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
68 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
69 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
70 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
72 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
74 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
75 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
76 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
79 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
81 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
82 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
83 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
85 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
87 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
88 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
89 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
91 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
93 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
94 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
95 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
96 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
97 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
98 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
99 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
100 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
101 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
102 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
103 (aarch64_sve_dupm_mov_immediate_p): Declare.
105 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
107 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
108 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
109 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
110 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
111 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
113 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
115 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
116 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
117 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
118 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
119 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
120 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
121 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
122 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
123 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
124 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
125 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
126 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
127 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
128 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
129 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
130 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
133 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
135 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
137 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
138 (aarch64_opnd_info): Make shifter.amount an int64_t and
139 rearrange the fields.
141 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
143 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
144 (AARCH64_OPND_SVE_PRFOP): Likewise.
145 (aarch64_sve_pattern_array): Declare.
146 (aarch64_sve_prfop_array): Likewise.
148 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
150 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
151 (AARCH64_OPND_QLF_P_M): Likewise.
153 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
155 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
156 aarch64_operand_class.
157 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
158 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
159 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
160 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
161 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
162 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
163 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
164 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
166 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
168 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
169 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
171 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
173 * opcode/aarch64.h (F_STRICT): New flag.
175 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
177 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
179 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
180 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
181 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
182 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
185 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
187 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
188 (ARM_SET_SYM_CMSE_SPCL): Likewise.
190 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
192 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
194 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
196 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
198 2016-07-27 Graham Markall <graham.markall@embecosm.com>
200 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
201 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
203 * opcode/arc.h: Add BMU to insn_class_t enum.
204 * opcode/arc.h: Add PMU to insn_class_t enum.
206 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
208 * dis-asm.h: Declare print_arc_disassembler_options.
210 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
212 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
213 out_implib_bfd fields.
215 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
217 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
219 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
221 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
222 (SHF_ARM_PURECODE): ... this.
224 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
226 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
227 (AARCH64_CPU_HAS_ANY_FEATURES): New.
228 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
229 (AARCH64_OPCODE_HAS_FEATURE): Remove.
231 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
233 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
234 of enabled FPU features.
236 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
238 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
239 SPARC_OPCODE_ARCH_MAX into the enum.
241 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
243 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
245 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
247 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
249 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
251 * elf/xtensa.h (xtensa_make_property_section): New prototype.
253 2016-06-24 John Baldwin <jhb@FreeBSD.org>
255 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
256 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
257 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
258 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
260 2016-06-23 Graham Markall <graham.markall@embecosm.com>
262 * opcode/arc.h: Make insn_class_t alphabetical again.
264 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
266 * elf/dlx.h: Wrap in extern C.
267 * elf/xtensa.h: Likewise.
268 * opcode/arc.h: Likewise.
270 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
272 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
275 2016-06-21 Graham Markall <graham.markall@embecosm.com>
277 * opcode/arc.h: Add nps400 extension and instruction
279 Remove ARC_OPCODE_NPS400
280 * elf/arc.h: Remove E_ARC_MACH_NPS400
282 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
284 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
285 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
286 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
287 SPARC_OPCODE_ARCH_V9M.
289 2016-06-14 John Baldwin <jhb@FreeBSD.org>
291 * opcode/msp430-decode.h (MSP430_Size): Remove.
292 (Msp430_Opcode_Decoded): Change type of size to int.
294 2016-06-11 Alan Modra <amodra@gmail.com>
296 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
298 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
300 * opcode/sparc.h: Add missing documentation for hyperprivileged
301 registers in rd (%) and rs1 ($).
303 2016-06-07 Alan Modra <amodra@gmail.com>
305 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
306 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
307 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
308 PPC_APUINFO_VLE: Define.
310 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
312 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
314 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
316 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
318 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
319 (struct arc_long_opcode): New structure.
320 (arc_long_opcodes): Declare.
321 (arc_num_long_opcodes): Declare.
323 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
325 * elf/mips.h: Add extern "C".
326 * elf/sh.h: Likewise.
327 * opcode/d10v.h: Likewise.
328 * opcode/d30v.h: Likewise.
329 * opcode/ia64.h: Likewise.
330 * opcode/mips.h: Likewise.
331 * opcode/ppc.h: Likewise.
332 * opcode/sparc.h: Likewise.
333 * opcode/tic6x.h: Likewise.
334 * opcode/v850.h: Likewise.
336 2016-05-28 Alan Modra <amodra@gmail.com>
338 * bfdlink.h (struct bfd_link_callbacks): Update comments.
339 Return void from multiple_definition, multiple_common,
340 add_to_set, constructor, warning, undefined_symbol,
341 reloc_overflow, reloc_dangerous and unattached_reloc.
343 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
345 * opcode/metag.h: wrap declarations in extern "C".
347 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
349 * opcode/arc.h (insn_subclass_t): Add COND.
350 (flag_class_t): Add F_CLASS_EXTEND.
352 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
354 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
356 (struct arc_flag_class): Renamed attribute class to flag_class.
358 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
360 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
363 2016-04-29 Tom Tromey <tom@tromey.com>
365 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
366 DW_LANG_Rust_old>: New constants.
368 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
370 * elf/mips.h (AFL_ASE_DSPR3): New macro.
371 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
372 * opcode/mips.h (ASE_DSPR3): New macro.
374 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
375 Nick Clifton <nickc@redhat.com>
377 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
379 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
380 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
381 (ARM_SYM_BRANCH_TYPE): Replace by ...
382 (ARM_GET_SYM_BRANCH_TYPE): This and ...
383 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
384 BFD_ASSERT is defined or not.
386 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
388 * elf/arm.h (Tag_DSP_extension): Define.
390 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
392 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
394 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
396 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
397 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
398 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
399 for the high core bits.
401 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
403 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
404 (ARC_SYNTAX_NOP): Likewsie.
405 (ARC_OP1_MUST_BE_IMM): Update defined value.
406 (ARC_OP1_IMM_IMPLIED): Likewise.
407 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
409 2016-04-28 Nick Clifton <nickc@redhat.com>
412 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
414 2016-04-27 Alan Modra <amodra@gmail.com>
416 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
419 2016-04-21 Nick Clifton <nickc@redhat.com>
421 * bfdlink.h: Add prototype for bfd_link_check_relocs.
423 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
425 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
427 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
429 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
431 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
433 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
435 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
437 * opcode/arc.h (insn_class_t): Add NET and ACL class.
439 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
441 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
442 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
444 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
446 * opcode/arc.h (flag_class_t): Update.
447 (ARC_OPCODE_NONE): Define.
448 (ARC_OPCODE_ARCALL): Likewise.
449 (ARC_OPCODE_ARCFPX): Likewise.
450 (ARC_REGISTER_READONLY): Likewise.
451 (ARC_REGISTER_WRITEONLY): Likewise.
452 (ARC_REGISTER_NOSHORT_CUT): Likewise.
453 (arc_aux_reg): Add cpu.
455 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
457 * opcode/arc.h (arc_num_opcodes): Remove.
458 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
459 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
460 (ARC_SUFFIX_FLAG): Define.
461 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
462 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
463 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
464 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
465 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
466 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
467 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
468 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
469 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
470 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
472 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
474 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
476 (arc_aux_reg): Add new field.
478 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
480 * opcode/arc-func.h (replace_bits24): Changed.
481 (replace_bits24_be): Created.
483 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
485 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
486 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
487 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
488 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
489 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
490 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
491 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
492 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
493 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
494 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
495 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
496 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
497 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
498 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
500 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
502 * opcode/i960.h: Add const qualifiers.
503 * opcode/tic4x.h (struct tic4x_inst): Likewise.
505 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
507 * opcodes/arc.h (insn_class_t): Add BITOP type.
509 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
511 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
514 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
516 * elf/arc.h (E_ARC_MACH_NPS400): Define.
517 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
519 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
521 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
523 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
525 * elf/arc.h (EF_ARC_MACH): Delete.
526 (EF_ARC_MACH_MSK): Remove out of date comment.
528 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
530 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
532 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
535 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
537 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
538 Andrew Burgess <andrew.burgess@embecosm.com>
540 * elf/arc-reloc.def: Add a call to ME within the formula for each
541 relocation that requires middle-endian correction.
543 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
545 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
546 * opcode/h8300.h (struct h8_opcode): Likewise.
547 * opcode/hppa.h (struct pa_opcode): Likewise.
548 * opcode/msp430.h: Likewise.
549 * opcode/spu.h (struct spu_opcode): Likewise.
550 * opcode/tic30.h (struct _register): Likewise.
551 * opcode/tic4x.h (struct tic4x_register): Likewise.
552 (struct tic4x_cond): Likewise.
553 (struct tic4x_indirect): Likewise.
554 (struct tic4x_inst): Likewise.
555 * opcode/visium.h (struct reg_entry): Likewise.
557 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
559 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
560 (ARM_CPU_HAS_FEATURE): Add comment.
562 2016-03-03 Than McIntosh <thanm@google.com>
564 * plugin-api.h: Add new hooks to the plugin transfer vector to
565 to support querying section alignment and section size.
566 (ld_plugin_get_input_section_alignment): New hook.
567 (ld_plugin_get_input_section_size): New hook.
568 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
569 and LDPT_GET_INPUT_SECTION_SIZE.
570 (ld_plugin_tv): Add tv_get_input_section_alignment and
571 tv_get_input_section_size.
573 2016-03-03 Evgenii Stepanov <eugenis@google.com>
575 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
577 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
580 * bfdlink.h (bfd_link_elf_stt_common): New enum.
581 (bfd_link_info): Add elf_stt_common.
583 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
588 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
590 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
591 Jiong Wang <jiong.wang@arm.com>
593 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
595 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
596 Janek van Oirschot <jvanoirs@synopsys.com>
598 * opcode/arc.h (arc_opcode arc_relax_opcodes)
599 (arc_num_relax_opcodes): Declare.
601 2016-02-09 Nick Clifton <nickc@redhat.com>
603 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
604 * opcode/nds32.h (nds32_r45map): Likewise.
605 (nds32_r54map): Likewise.
606 * opcode/visium.h (gen_reg_table): Likewise.
607 (fp_reg_table, cc_table, opcode_table): Likewise.
609 2016-02-09 Alan Modra <amodra@gmail.com>
612 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
614 2016-02-04 Nick Clifton <nickc@redhat.com>
617 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
618 (RRUX): Synthesise using case 2 rather than 7.
620 2016-01-19 John Baldwin <jhb@FreeBSD.org>
622 * elf/common.h (NT_FREEBSD_THRMISC): Define.
623 (NT_FREEBSD_PROCSTAT_PROC): Define.
624 (NT_FREEBSD_PROCSTAT_FILES): Define.
625 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
626 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
627 (NT_FREEBSD_PROCSTAT_UMASK): Define.
628 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
629 (NT_FREEBSD_PROCSTAT_OSREL): Define.
630 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
631 (NT_FREEBSD_PROCSTAT_AUXV): Define.
633 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
634 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
636 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
637 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
638 (ARC_TLS_LE_32): Fixed formula.
639 (ARC_TLS_GD_LD): Use new special function.
640 * opcode/arc-func.h: Changed all the replacement
641 functions to clear the patching bits before doing an or it with the value
644 2016-01-18 Nick Clifton <nickc@redhat.com>
647 * coff/internal.h (internal_syment): Use int to hold section
649 (N_UNDEF): Cast to int not short.
655 2016-01-11 Nick Clifton <nickc@redhat.com>
657 Import this change from GCC mainline:
659 2016-01-07 Mike Frysinger <vapier@gentoo.org>
661 * longlong.h: Change !__SHMEDIA__ to
662 (!defined (__SHMEDIA__) || !__SHMEDIA__).
663 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
665 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
667 * opcode/mips.h: Add a summary of MIPS16 operand codes.
669 2016-01-05 Mike Frysinger <vapier@gentoo.org>
671 * libiberty.h (dupargv): Change arg to char * const *.
672 (writeargv, countargv): Likewise.
674 2016-01-01 Alan Modra <amodra@gmail.com>
676 Update year range in copyright notice of all files.
678 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
679 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
680 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
681 som/ChangeLog-1015, and vms/ChangeLog-1015
683 Copyright (C) 2016 Free Software Foundation, Inc.
685 Copying and distribution of this file, with or without modification,
686 are permitted in any medium without royalty provided the copyright
687 notice and this notice are preserved.
693 version-control: never