1 2016-12-07 Maciej W. Rozycki <macro@imgtec.com>
3 * opcode/mips.h (ASE_DSPR3): Add a comment.
5 2016-12-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
7 * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
10 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com>
12 * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
15 2016-11-22 Jose E. Marchesi <jose.marchesi@oracle.com>
17 * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
20 2016-11-22 Alan Modra <amodra@gmail.com>
23 * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
25 2016-11-03 David Tolnay <dtolnay@gmail.com>
26 Mark Wielaard <mark@klomp.org>
28 * demangle.h (DMGL_RUST): New macro.
29 (DMGL_STYLE_MASK): Add DMGL_RUST.
30 (demangling_styles): Add dlang_rust.
31 (RUST_DEMANGLING_STYLE_STRING): New macro.
32 (RUST_DEMANGLING): New macro.
33 (rust_demangle): New prototype.
34 (rust_is_mangled): Likewise.
35 (rust_demangle_sym): Likewise.
37 2016-11-07 Jason Merrill <jason@redhat.com>
39 * demangle.h (enum demangle_component_type): Add
40 DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
42 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
44 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
45 AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
46 (enum aarch64_op): Add OP_FCMLA_ELEM.
48 2016-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com>
50 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
51 (enum aarch64_insn_class): Add ldst_imm10.
53 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
55 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
57 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
59 * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
60 (AARCH64_ARCH_V8_3): Define.
61 (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
63 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
65 * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
66 (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
67 (ARM_ARCH_V8M_MAIN_DSP): Likewise.
69 2016-11-03 Graham Markall <graham.markall@embecosm.com>
71 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
73 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
75 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
77 (struct arc_long_opcode): Delete.
78 (struct arc_operand): Change types for insert and extract
81 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
83 * opcode/arc.h: Make macros 64-bit safe.
85 2016-11-03 Graham Markall <graham.markall@embecosm.com>
87 * opcode/arc.h (arc_opcode_len): Declare.
90 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
91 Andrew Waterman <andrew@sifive.com>
93 Add support for RISC-V architecture.
94 * dis-asm.h: Add prototypes for print_insn_riscv and
95 print_riscv_disassembler_options.
96 * elf/riscv.h: New file.
97 * opcode/riscv-opc.h: New file.
98 * opcode/riscv.h: New file.
100 2016-10-17 Nick Clifton <nickc@redhat.com>
102 * elf/common.h (DT_SYMTAB_SHNDX): Define.
103 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
104 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
105 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
106 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
107 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
108 (ELFOSABI_OPENVOS): Define.
109 (GRP_MASKOS, GRP_MASKPROC): Define.
111 2016-10-14 Pedro Alves <palves@redhat.com>
113 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
114 OVERRIDE): Define as empty.
115 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
117 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
120 2016-10-14 Pedro Alves <palves@redhat.com>
122 * ansidecl.h (GCC_FINAL): Delete.
123 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
125 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
127 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
129 2016-09-29 Alan Modra <amodra@gmail.com>
131 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
133 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
135 * opcode/arc.h (insn_class_t): Add two new classes.
137 2016-09-26 Alan Modra <amodra@gmail.com>
139 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
141 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
143 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
145 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
147 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
148 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
149 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
150 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
152 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
154 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
155 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
156 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
157 aarch64_insn_classes.
159 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
161 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
162 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
163 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
165 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
167 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
168 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
169 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
171 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
173 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
174 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
175 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
176 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
177 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
178 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
179 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
180 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
181 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
182 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
183 (aarch64_sve_dupm_mov_immediate_p): Declare.
185 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
187 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
188 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
189 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
190 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
191 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
193 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
195 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
196 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
197 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
198 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
199 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
200 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
201 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
202 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
203 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
204 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
205 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
206 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
207 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
208 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
209 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
210 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
213 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
215 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
217 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
218 (aarch64_opnd_info): Make shifter.amount an int64_t and
219 rearrange the fields.
221 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
223 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
224 (AARCH64_OPND_SVE_PRFOP): Likewise.
225 (aarch64_sve_pattern_array): Declare.
226 (aarch64_sve_prfop_array): Likewise.
228 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
230 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
231 (AARCH64_OPND_QLF_P_M): Likewise.
233 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
235 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
236 aarch64_operand_class.
237 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
238 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
239 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
240 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
241 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
242 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
243 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
244 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
246 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
248 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
249 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
251 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
253 * opcode/aarch64.h (F_STRICT): New flag.
255 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
257 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
259 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
260 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
261 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
262 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
265 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
267 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
268 (ARM_SET_SYM_CMSE_SPCL): Likewise.
270 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
272 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
274 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
276 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
278 2016-07-27 Graham Markall <graham.markall@embecosm.com>
280 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
281 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
283 * opcode/arc.h: Add BMU to insn_class_t enum.
284 * opcode/arc.h: Add PMU to insn_class_t enum.
286 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
288 * dis-asm.h: Declare print_arc_disassembler_options.
290 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
292 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
293 out_implib_bfd fields.
295 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
297 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
299 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
301 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
302 (SHF_ARM_PURECODE): ... this.
304 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
306 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
307 (AARCH64_CPU_HAS_ANY_FEATURES): New.
308 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
309 (AARCH64_OPCODE_HAS_FEATURE): Remove.
311 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
313 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
314 of enabled FPU features.
316 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
318 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
319 SPARC_OPCODE_ARCH_MAX into the enum.
321 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
323 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
325 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
327 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
329 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
331 * elf/xtensa.h (xtensa_make_property_section): New prototype.
333 2016-06-24 John Baldwin <jhb@FreeBSD.org>
335 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
336 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
337 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
338 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
340 2016-06-23 Graham Markall <graham.markall@embecosm.com>
342 * opcode/arc.h: Make insn_class_t alphabetical again.
344 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
346 * elf/dlx.h: Wrap in extern C.
347 * elf/xtensa.h: Likewise.
348 * opcode/arc.h: Likewise.
350 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
352 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
355 2016-06-21 Graham Markall <graham.markall@embecosm.com>
357 * opcode/arc.h: Add nps400 extension and instruction
359 Remove ARC_OPCODE_NPS400
360 * elf/arc.h: Remove E_ARC_MACH_NPS400
362 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
364 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
365 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
366 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
367 SPARC_OPCODE_ARCH_V9M.
369 2016-06-14 John Baldwin <jhb@FreeBSD.org>
371 * opcode/msp430-decode.h (MSP430_Size): Remove.
372 (Msp430_Opcode_Decoded): Change type of size to int.
374 2016-06-11 Alan Modra <amodra@gmail.com>
376 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
378 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
380 * opcode/sparc.h: Add missing documentation for hyperprivileged
381 registers in rd (%) and rs1 ($).
383 2016-06-07 Alan Modra <amodra@gmail.com>
385 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
386 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
387 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
388 PPC_APUINFO_VLE: Define.
390 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
392 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
394 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
396 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
398 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
399 (struct arc_long_opcode): New structure.
400 (arc_long_opcodes): Declare.
401 (arc_num_long_opcodes): Declare.
403 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
405 * elf/mips.h: Add extern "C".
406 * elf/sh.h: Likewise.
407 * opcode/d10v.h: Likewise.
408 * opcode/d30v.h: Likewise.
409 * opcode/ia64.h: Likewise.
410 * opcode/mips.h: Likewise.
411 * opcode/ppc.h: Likewise.
412 * opcode/sparc.h: Likewise.
413 * opcode/tic6x.h: Likewise.
414 * opcode/v850.h: Likewise.
416 2016-05-28 Alan Modra <amodra@gmail.com>
418 * bfdlink.h (struct bfd_link_callbacks): Update comments.
419 Return void from multiple_definition, multiple_common,
420 add_to_set, constructor, warning, undefined_symbol,
421 reloc_overflow, reloc_dangerous and unattached_reloc.
423 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
425 * opcode/metag.h: wrap declarations in extern "C".
427 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
429 * opcode/arc.h (insn_subclass_t): Add COND.
430 (flag_class_t): Add F_CLASS_EXTEND.
432 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
434 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
436 (struct arc_flag_class): Renamed attribute class to flag_class.
438 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
440 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
443 2016-04-29 Tom Tromey <tom@tromey.com>
445 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
446 DW_LANG_Rust_old>: New constants.
448 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
450 * elf/mips.h (AFL_ASE_DSPR3): New macro.
451 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
452 * opcode/mips.h (ASE_DSPR3): New macro.
454 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
455 Nick Clifton <nickc@redhat.com>
457 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
459 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
460 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
461 (ARM_SYM_BRANCH_TYPE): Replace by ...
462 (ARM_GET_SYM_BRANCH_TYPE): This and ...
463 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
464 BFD_ASSERT is defined or not.
466 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
468 * elf/arm.h (Tag_DSP_extension): Define.
470 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
472 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
474 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
476 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
477 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
478 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
479 for the high core bits.
481 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
483 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
484 (ARC_SYNTAX_NOP): Likewsie.
485 (ARC_OP1_MUST_BE_IMM): Update defined value.
486 (ARC_OP1_IMM_IMPLIED): Likewise.
487 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
489 2016-04-28 Nick Clifton <nickc@redhat.com>
492 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
494 2016-04-27 Alan Modra <amodra@gmail.com>
496 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
499 2016-04-21 Nick Clifton <nickc@redhat.com>
501 * bfdlink.h: Add prototype for bfd_link_check_relocs.
503 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
505 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
507 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
509 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
511 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
513 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
515 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
517 * opcode/arc.h (insn_class_t): Add NET and ACL class.
519 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
521 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
522 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
524 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
526 * opcode/arc.h (flag_class_t): Update.
527 (ARC_OPCODE_NONE): Define.
528 (ARC_OPCODE_ARCALL): Likewise.
529 (ARC_OPCODE_ARCFPX): Likewise.
530 (ARC_REGISTER_READONLY): Likewise.
531 (ARC_REGISTER_WRITEONLY): Likewise.
532 (ARC_REGISTER_NOSHORT_CUT): Likewise.
533 (arc_aux_reg): Add cpu.
535 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
537 * opcode/arc.h (arc_num_opcodes): Remove.
538 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
539 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
540 (ARC_SUFFIX_FLAG): Define.
541 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
542 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
543 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
544 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
545 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
546 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
547 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
548 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
549 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
550 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
552 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
554 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
556 (arc_aux_reg): Add new field.
558 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
560 * opcode/arc-func.h (replace_bits24): Changed.
561 (replace_bits24_be): Created.
563 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
565 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
566 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
567 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
568 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
569 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
570 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
571 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
572 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
573 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
574 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
575 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
576 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
577 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
578 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
580 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
582 * opcode/i960.h: Add const qualifiers.
583 * opcode/tic4x.h (struct tic4x_inst): Likewise.
585 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
587 * opcodes/arc.h (insn_class_t): Add BITOP type.
589 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
591 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
594 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
596 * elf/arc.h (E_ARC_MACH_NPS400): Define.
597 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
599 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
601 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
603 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
605 * elf/arc.h (EF_ARC_MACH): Delete.
606 (EF_ARC_MACH_MSK): Remove out of date comment.
608 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
610 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
612 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
615 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
617 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
618 Andrew Burgess <andrew.burgess@embecosm.com>
620 * elf/arc-reloc.def: Add a call to ME within the formula for each
621 relocation that requires middle-endian correction.
623 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
625 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
626 * opcode/h8300.h (struct h8_opcode): Likewise.
627 * opcode/hppa.h (struct pa_opcode): Likewise.
628 * opcode/msp430.h: Likewise.
629 * opcode/spu.h (struct spu_opcode): Likewise.
630 * opcode/tic30.h (struct _register): Likewise.
631 * opcode/tic4x.h (struct tic4x_register): Likewise.
632 (struct tic4x_cond): Likewise.
633 (struct tic4x_indirect): Likewise.
634 (struct tic4x_inst): Likewise.
635 * opcode/visium.h (struct reg_entry): Likewise.
637 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
639 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
640 (ARM_CPU_HAS_FEATURE): Add comment.
642 2016-03-03 Than McIntosh <thanm@google.com>
644 * plugin-api.h: Add new hooks to the plugin transfer vector to
645 to support querying section alignment and section size.
646 (ld_plugin_get_input_section_alignment): New hook.
647 (ld_plugin_get_input_section_size): New hook.
648 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
649 and LDPT_GET_INPUT_SECTION_SIZE.
650 (ld_plugin_tv): Add tv_get_input_section_alignment and
651 tv_get_input_section_size.
653 2016-03-03 Evgenii Stepanov <eugenis@google.com>
655 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
657 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
660 * bfdlink.h (bfd_link_elf_stt_common): New enum.
661 (bfd_link_info): Add elf_stt_common.
663 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
668 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
670 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
671 Jiong Wang <jiong.wang@arm.com>
673 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
675 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
676 Janek van Oirschot <jvanoirs@synopsys.com>
678 * opcode/arc.h (arc_opcode arc_relax_opcodes)
679 (arc_num_relax_opcodes): Declare.
681 2016-02-09 Nick Clifton <nickc@redhat.com>
683 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
684 * opcode/nds32.h (nds32_r45map): Likewise.
685 (nds32_r54map): Likewise.
686 * opcode/visium.h (gen_reg_table): Likewise.
687 (fp_reg_table, cc_table, opcode_table): Likewise.
689 2016-02-09 Alan Modra <amodra@gmail.com>
692 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
694 2016-02-04 Nick Clifton <nickc@redhat.com>
697 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
698 (RRUX): Synthesise using case 2 rather than 7.
700 2016-01-19 John Baldwin <jhb@FreeBSD.org>
702 * elf/common.h (NT_FREEBSD_THRMISC): Define.
703 (NT_FREEBSD_PROCSTAT_PROC): Define.
704 (NT_FREEBSD_PROCSTAT_FILES): Define.
705 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
706 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
707 (NT_FREEBSD_PROCSTAT_UMASK): Define.
708 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
709 (NT_FREEBSD_PROCSTAT_OSREL): Define.
710 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
711 (NT_FREEBSD_PROCSTAT_AUXV): Define.
713 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
714 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
716 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
717 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
718 (ARC_TLS_LE_32): Fixed formula.
719 (ARC_TLS_GD_LD): Use new special function.
720 * opcode/arc-func.h: Changed all the replacement
721 functions to clear the patching bits before doing an or it with the value
724 2016-01-18 Nick Clifton <nickc@redhat.com>
727 * coff/internal.h (internal_syment): Use int to hold section
729 (N_UNDEF): Cast to int not short.
735 2016-01-11 Nick Clifton <nickc@redhat.com>
737 Import this change from GCC mainline:
739 2016-01-07 Mike Frysinger <vapier@gentoo.org>
741 * longlong.h: Change !__SHMEDIA__ to
742 (!defined (__SHMEDIA__) || !__SHMEDIA__).
743 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
745 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
747 * opcode/mips.h: Add a summary of MIPS16 operand codes.
749 2016-01-05 Mike Frysinger <vapier@gentoo.org>
751 * libiberty.h (dupargv): Change arg to char * const *.
752 (writeargv, countargv): Likewise.
754 2016-01-01 Alan Modra <amodra@gmail.com>
756 Update year range in copyright notice of all files.
758 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
759 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
760 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
761 som/ChangeLog-1015, and vms/ChangeLog-1015
763 Copyright (C) 2016 Free Software Foundation, Inc.
765 Copying and distribution of this file, with or without modification,
766 are permitted in any medium without royalty provided the copyright
767 notice and this notice are preserved.
773 version-control: never