1 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
3 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
5 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
7 * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
8 (AARCH64_ARCH_V8_3): Define.
9 (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
11 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
13 * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
14 (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
15 (ARM_ARCH_V8M_MAIN_DSP): Likewise.
17 2016-11-03 Graham Markall <graham.markall@embecosm.com>
19 * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
21 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
23 * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
25 (struct arc_long_opcode): Delete.
26 (struct arc_operand): Change types for insert and extract
29 2016-11-03 Andrew Burgess <andrew.burgess@embecosm.com>
31 * opcode/arc.h: Make macros 64-bit safe.
33 2016-11-03 Graham Markall <graham.markall@embecosm.com>
35 * opcode/arc.h (arc_opcode_len): Declare.
38 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
39 Andrew Waterman <andrew@sifive.com>
41 Add support for RISC-V architecture.
42 * dis-asm.h: Add prototypes for print_insn_riscv and
43 print_riscv_disassembler_options.
44 * elf/riscv.h: New file.
45 * opcode/riscv-opc.h: New file.
46 * opcode/riscv.h: New file.
48 2016-10-17 Nick Clifton <nickc@redhat.com>
50 * elf/common.h (DT_SYMTAB_SHNDX): Define.
51 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
52 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
53 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
54 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
55 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
56 (ELFOSABI_OPENVOS): Define.
57 (GRP_MASKOS, GRP_MASKPROC): Define.
59 2016-10-14 Pedro Alves <palves@redhat.com>
61 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
62 OVERRIDE): Define as empty.
63 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
65 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
68 2016-10-14 Pedro Alves <palves@redhat.com>
70 * ansidecl.h (GCC_FINAL): Delete.
71 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
73 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
75 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
77 2016-09-29 Alan Modra <amodra@gmail.com>
79 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
81 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
83 * opcode/arc.h (insn_class_t): Add two new classes.
85 2016-09-26 Alan Modra <amodra@gmail.com>
87 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
89 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
91 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
93 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
95 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
96 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
97 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
98 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
100 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
102 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
103 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
104 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
105 aarch64_insn_classes.
107 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
109 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
110 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
111 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
113 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
115 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
116 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
117 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
119 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
121 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
122 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
123 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
124 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
125 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
126 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
127 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
128 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
129 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
130 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
131 (aarch64_sve_dupm_mov_immediate_p): Declare.
133 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
135 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
136 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
137 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
138 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
139 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
141 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
143 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
144 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
145 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
146 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
147 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
148 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
149 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
150 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
151 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
152 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
153 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
154 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
155 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
156 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
157 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
158 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
161 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
163 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
165 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
166 (aarch64_opnd_info): Make shifter.amount an int64_t and
167 rearrange the fields.
169 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
171 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
172 (AARCH64_OPND_SVE_PRFOP): Likewise.
173 (aarch64_sve_pattern_array): Declare.
174 (aarch64_sve_prfop_array): Likewise.
176 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
178 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
179 (AARCH64_OPND_QLF_P_M): Likewise.
181 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
183 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
184 aarch64_operand_class.
185 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
186 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
187 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
188 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
189 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
190 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
191 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
192 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
194 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
196 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
197 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
199 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
201 * opcode/aarch64.h (F_STRICT): New flag.
203 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
205 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
207 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
208 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
209 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
210 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
213 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
215 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
216 (ARM_SET_SYM_CMSE_SPCL): Likewise.
218 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
220 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
222 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
224 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
226 2016-07-27 Graham Markall <graham.markall@embecosm.com>
228 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
229 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
231 * opcode/arc.h: Add BMU to insn_class_t enum.
232 * opcode/arc.h: Add PMU to insn_class_t enum.
234 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
236 * dis-asm.h: Declare print_arc_disassembler_options.
238 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
240 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
241 out_implib_bfd fields.
243 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
245 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
247 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
249 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
250 (SHF_ARM_PURECODE): ... this.
252 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
254 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
255 (AARCH64_CPU_HAS_ANY_FEATURES): New.
256 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
257 (AARCH64_OPCODE_HAS_FEATURE): Remove.
259 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
261 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
262 of enabled FPU features.
264 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
266 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
267 SPARC_OPCODE_ARCH_MAX into the enum.
269 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
271 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
273 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
275 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
277 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
279 * elf/xtensa.h (xtensa_make_property_section): New prototype.
281 2016-06-24 John Baldwin <jhb@FreeBSD.org>
283 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
284 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
285 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
286 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
288 2016-06-23 Graham Markall <graham.markall@embecosm.com>
290 * opcode/arc.h: Make insn_class_t alphabetical again.
292 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
294 * elf/dlx.h: Wrap in extern C.
295 * elf/xtensa.h: Likewise.
296 * opcode/arc.h: Likewise.
298 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
300 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
303 2016-06-21 Graham Markall <graham.markall@embecosm.com>
305 * opcode/arc.h: Add nps400 extension and instruction
307 Remove ARC_OPCODE_NPS400
308 * elf/arc.h: Remove E_ARC_MACH_NPS400
310 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
312 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
313 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
314 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
315 SPARC_OPCODE_ARCH_V9M.
317 2016-06-14 John Baldwin <jhb@FreeBSD.org>
319 * opcode/msp430-decode.h (MSP430_Size): Remove.
320 (Msp430_Opcode_Decoded): Change type of size to int.
322 2016-06-11 Alan Modra <amodra@gmail.com>
324 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
326 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
328 * opcode/sparc.h: Add missing documentation for hyperprivileged
329 registers in rd (%) and rs1 ($).
331 2016-06-07 Alan Modra <amodra@gmail.com>
333 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
334 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
335 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
336 PPC_APUINFO_VLE: Define.
338 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
340 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
342 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
344 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
346 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
347 (struct arc_long_opcode): New structure.
348 (arc_long_opcodes): Declare.
349 (arc_num_long_opcodes): Declare.
351 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
353 * elf/mips.h: Add extern "C".
354 * elf/sh.h: Likewise.
355 * opcode/d10v.h: Likewise.
356 * opcode/d30v.h: Likewise.
357 * opcode/ia64.h: Likewise.
358 * opcode/mips.h: Likewise.
359 * opcode/ppc.h: Likewise.
360 * opcode/sparc.h: Likewise.
361 * opcode/tic6x.h: Likewise.
362 * opcode/v850.h: Likewise.
364 2016-05-28 Alan Modra <amodra@gmail.com>
366 * bfdlink.h (struct bfd_link_callbacks): Update comments.
367 Return void from multiple_definition, multiple_common,
368 add_to_set, constructor, warning, undefined_symbol,
369 reloc_overflow, reloc_dangerous and unattached_reloc.
371 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
373 * opcode/metag.h: wrap declarations in extern "C".
375 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
377 * opcode/arc.h (insn_subclass_t): Add COND.
378 (flag_class_t): Add F_CLASS_EXTEND.
380 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
382 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
384 (struct arc_flag_class): Renamed attribute class to flag_class.
386 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
388 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
391 2016-04-29 Tom Tromey <tom@tromey.com>
393 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
394 DW_LANG_Rust_old>: New constants.
396 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
398 * elf/mips.h (AFL_ASE_DSPR3): New macro.
399 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
400 * opcode/mips.h (ASE_DSPR3): New macro.
402 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
403 Nick Clifton <nickc@redhat.com>
405 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
407 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
408 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
409 (ARM_SYM_BRANCH_TYPE): Replace by ...
410 (ARM_GET_SYM_BRANCH_TYPE): This and ...
411 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
412 BFD_ASSERT is defined or not.
414 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
416 * elf/arm.h (Tag_DSP_extension): Define.
418 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
420 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
422 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
424 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
425 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
426 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
427 for the high core bits.
429 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
431 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
432 (ARC_SYNTAX_NOP): Likewsie.
433 (ARC_OP1_MUST_BE_IMM): Update defined value.
434 (ARC_OP1_IMM_IMPLIED): Likewise.
435 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
437 2016-04-28 Nick Clifton <nickc@redhat.com>
440 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
442 2016-04-27 Alan Modra <amodra@gmail.com>
444 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
447 2016-04-21 Nick Clifton <nickc@redhat.com>
449 * bfdlink.h: Add prototype for bfd_link_check_relocs.
451 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
453 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
455 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
457 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
459 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
461 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
463 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
465 * opcode/arc.h (insn_class_t): Add NET and ACL class.
467 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
469 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
470 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
472 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
474 * opcode/arc.h (flag_class_t): Update.
475 (ARC_OPCODE_NONE): Define.
476 (ARC_OPCODE_ARCALL): Likewise.
477 (ARC_OPCODE_ARCFPX): Likewise.
478 (ARC_REGISTER_READONLY): Likewise.
479 (ARC_REGISTER_WRITEONLY): Likewise.
480 (ARC_REGISTER_NOSHORT_CUT): Likewise.
481 (arc_aux_reg): Add cpu.
483 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
485 * opcode/arc.h (arc_num_opcodes): Remove.
486 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
487 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
488 (ARC_SUFFIX_FLAG): Define.
489 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
490 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
491 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
492 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
493 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
494 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
495 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
496 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
497 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
498 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
500 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
502 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
504 (arc_aux_reg): Add new field.
506 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
508 * opcode/arc-func.h (replace_bits24): Changed.
509 (replace_bits24_be): Created.
511 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
513 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
514 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
515 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
516 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
517 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
518 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
519 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
520 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
521 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
522 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
523 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
524 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
525 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
526 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
528 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
530 * opcode/i960.h: Add const qualifiers.
531 * opcode/tic4x.h (struct tic4x_inst): Likewise.
533 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
535 * opcodes/arc.h (insn_class_t): Add BITOP type.
537 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
539 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
542 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
544 * elf/arc.h (E_ARC_MACH_NPS400): Define.
545 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
547 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
549 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
551 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
553 * elf/arc.h (EF_ARC_MACH): Delete.
554 (EF_ARC_MACH_MSK): Remove out of date comment.
556 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
558 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
560 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
563 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
565 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
566 Andrew Burgess <andrew.burgess@embecosm.com>
568 * elf/arc-reloc.def: Add a call to ME within the formula for each
569 relocation that requires middle-endian correction.
571 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
573 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
574 * opcode/h8300.h (struct h8_opcode): Likewise.
575 * opcode/hppa.h (struct pa_opcode): Likewise.
576 * opcode/msp430.h: Likewise.
577 * opcode/spu.h (struct spu_opcode): Likewise.
578 * opcode/tic30.h (struct _register): Likewise.
579 * opcode/tic4x.h (struct tic4x_register): Likewise.
580 (struct tic4x_cond): Likewise.
581 (struct tic4x_indirect): Likewise.
582 (struct tic4x_inst): Likewise.
583 * opcode/visium.h (struct reg_entry): Likewise.
585 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
587 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
588 (ARM_CPU_HAS_FEATURE): Add comment.
590 2016-03-03 Than McIntosh <thanm@google.com>
592 * plugin-api.h: Add new hooks to the plugin transfer vector to
593 to support querying section alignment and section size.
594 (ld_plugin_get_input_section_alignment): New hook.
595 (ld_plugin_get_input_section_size): New hook.
596 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
597 and LDPT_GET_INPUT_SECTION_SIZE.
598 (ld_plugin_tv): Add tv_get_input_section_alignment and
599 tv_get_input_section_size.
601 2016-03-03 Evgenii Stepanov <eugenis@google.com>
603 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
605 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
608 * bfdlink.h (bfd_link_elf_stt_common): New enum.
609 (bfd_link_info): Add elf_stt_common.
611 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
616 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
618 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
619 Jiong Wang <jiong.wang@arm.com>
621 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
623 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
624 Janek van Oirschot <jvanoirs@synopsys.com>
626 * opcode/arc.h (arc_opcode arc_relax_opcodes)
627 (arc_num_relax_opcodes): Declare.
629 2016-02-09 Nick Clifton <nickc@redhat.com>
631 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
632 * opcode/nds32.h (nds32_r45map): Likewise.
633 (nds32_r54map): Likewise.
634 * opcode/visium.h (gen_reg_table): Likewise.
635 (fp_reg_table, cc_table, opcode_table): Likewise.
637 2016-02-09 Alan Modra <amodra@gmail.com>
640 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
642 2016-02-04 Nick Clifton <nickc@redhat.com>
645 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
646 (RRUX): Synthesise using case 2 rather than 7.
648 2016-01-19 John Baldwin <jhb@FreeBSD.org>
650 * elf/common.h (NT_FREEBSD_THRMISC): Define.
651 (NT_FREEBSD_PROCSTAT_PROC): Define.
652 (NT_FREEBSD_PROCSTAT_FILES): Define.
653 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
654 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
655 (NT_FREEBSD_PROCSTAT_UMASK): Define.
656 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
657 (NT_FREEBSD_PROCSTAT_OSREL): Define.
658 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
659 (NT_FREEBSD_PROCSTAT_AUXV): Define.
661 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
662 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
664 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
665 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
666 (ARC_TLS_LE_32): Fixed formula.
667 (ARC_TLS_GD_LD): Use new special function.
668 * opcode/arc-func.h: Changed all the replacement
669 functions to clear the patching bits before doing an or it with the value
672 2016-01-18 Nick Clifton <nickc@redhat.com>
675 * coff/internal.h (internal_syment): Use int to hold section
677 (N_UNDEF): Cast to int not short.
683 2016-01-11 Nick Clifton <nickc@redhat.com>
685 Import this change from GCC mainline:
687 2016-01-07 Mike Frysinger <vapier@gentoo.org>
689 * longlong.h: Change !__SHMEDIA__ to
690 (!defined (__SHMEDIA__) || !__SHMEDIA__).
691 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
693 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
695 * opcode/mips.h: Add a summary of MIPS16 operand codes.
697 2016-01-05 Mike Frysinger <vapier@gentoo.org>
699 * libiberty.h (dupargv): Change arg to char * const *.
700 (writeargv, countargv): Likewise.
702 2016-01-01 Alan Modra <amodra@gmail.com>
704 Update year range in copyright notice of all files.
706 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
707 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
708 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
709 som/ChangeLog-1015, and vms/ChangeLog-1015
711 Copyright (C) 2016 Free Software Foundation, Inc.
713 Copying and distribution of this file, with or without modification,
714 are permitted in any medium without royalty provided the copyright
715 notice and this notice are preserved.
721 version-control: never