include/asm-arm/arch-omap/clock.h

   1 /*
   2  *  linux/include/asm-arm/arch-omap/clock.h
   3  *
   4  *  Copyright (C) 2004 - 2005 Nokia corporation
   5  *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
   6  *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
  14 #define __ARCH_ARM_OMAP_CLOCK_H
  15
  16 struct module;
  17 struct clk;
  18
  19 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  20
  21 struct clksel_rate {
  22         u8                      div;
  23         u32                     val;
  24         u8                      flags;
  25 };
  26
  27 struct clksel {
  28         struct clk               *parent;
  29         const struct clksel_rate *rates;
  30 };
  31
  32 struct dpll_data {
  33         void __iomem            *mult_div1_reg;
  34         u32                     mult_mask;
  35         u32                     div1_mask;
  36 #  if defined(CONFIG_ARCH_OMAP3)
  37         void __iomem            *control_reg;
  38         u32                     enable_mask;
  39         u8                      auto_recal_bit;
  40         u8                      recal_en_bit;
  41         u8                      recal_st_bit;
  42 #  endif
  43 };
  44
  45 #endif
  46
  47 struct clk {
  48         struct list_head        node;
  49         struct module           *owner;
  50         const char              *name;
  51         int                     id;
  52         struct clk              *parent;
  53         unsigned long           rate;
  54         __u32                   flags;
  55         void __iomem            *enable_reg;
  56         __u8                    enable_bit;
  57         __s8                    usecount;
  58         void                    (*recalc)(struct clk *);
  59         int                     (*set_rate)(struct clk *, unsigned long);
  60         long                    (*round_rate)(struct clk *, unsigned long);
  61         void                    (*init)(struct clk *);
  62         int                     (*enable)(struct clk *);
  63         void                    (*disable)(struct clk *);
  64 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  65         u8                      fixed_div;
  66         void __iomem            *clksel_reg;
  67         u32                     clksel_mask;
  68         const struct clksel     *clksel;
  69         const struct dpll_data  *dpll_data;
  70 #else
  71         __u8                    rate_offset;
  72         __u8                    src_offset;
  73 #endif
  74 };
  75
  76 struct cpufreq_frequency_table;
  77
  78 struct clk_functions {
  79         int             (*clk_enable)(struct clk *clk);
  80         void            (*clk_disable)(struct clk *clk);
  81         long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
  82         int             (*clk_set_rate)(struct clk *clk, unsigned long rate);
  83         int             (*clk_set_parent)(struct clk *clk, struct clk *parent);
  84         struct clk *    (*clk_get_parent)(struct clk *clk);
  85         void            (*clk_allow_idle)(struct clk *clk);
  86         void            (*clk_deny_idle)(struct clk *clk);
  87         void            (*clk_disable_unused)(struct clk *clk);
  88 #ifdef CONFIG_CPU_FREQ
  89         void            (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
  90 #endif
  91 };
  92
  93 extern unsigned int mpurate;
  94
  95 extern int clk_init(struct clk_functions * custom_clocks);
  96 extern int clk_register(struct clk *clk);
  97 extern void clk_unregister(struct clk *clk);
  98 extern void propagate_rate(struct clk *clk);
  99 extern void recalculate_root_clocks(void);
 100 extern void followparent_recalc(struct clk * clk);
 101 extern void clk_allow_idle(struct clk *clk);
 102 extern void clk_deny_idle(struct clk *clk);
 103 extern int clk_get_usecount(struct clk *clk);
 104 extern void clk_enable_init_clocks(void);
 105
 106 /* Clock flags */
 107 #define RATE_CKCTL              (1 << 0)        /* Main fixed ratio clocks */
 108 #define RATE_FIXED              (1 << 1)        /* Fixed clock rate */
 109 #define RATE_PROPAGATES         (1 << 2)        /* Program children too */
 110 #define VIRTUAL_CLOCK           (1 << 3)        /* Composite clock from table */
 111 #define ALWAYS_ENABLED          (1 << 4)        /* Clock cannot be disabled */
 112 #define ENABLE_REG_32BIT        (1 << 5)        /* Use 32-bit access */
 113 #define VIRTUAL_IO_ADDRESS      (1 << 6)        /* Clock in virtual address */
 114 #define CLOCK_IDLE_CONTROL      (1 << 7)
 115 #define CLOCK_NO_IDLE_PARENT    (1 << 8)
 116 #define DELAYED_APP             (1 << 9)        /* Delay application of clock */
 117 #define CONFIG_PARTICIPANT      (1 << 10)       /* Fundamental clock */
 118 #define ENABLE_ON_INIT          (1 << 11)       /* Enable upon framework init */
 119 #define INVERT_ENABLE           (1 << 12)       /* 0 enables, 1 disables */
 120 /* bits 13-20 are currently free */
 121 #define CLOCK_IN_OMAP310        (1 << 21)
 122 #define CLOCK_IN_OMAP730        (1 << 22)
 123 #define CLOCK_IN_OMAP1510       (1 << 23)
 124 #define CLOCK_IN_OMAP16XX       (1 << 24)
 125 #define CLOCK_IN_OMAP242X       (1 << 25)
 126 #define CLOCK_IN_OMAP243X       (1 << 26)
 127 #define CLOCK_IN_OMAP343X       (1 << 27)       /* clocks common to all 343X */
 128 #define PARENT_CONTROLS_CLOCK   (1 << 28)
 129 #define CLOCK_IN_OMAP3430ES1    (1 << 29)       /* 3430ES1 clocks only */
 130 #define CLOCK_IN_OMAP3430ES2    (1 << 30)       /* 3430ES2 clocks only */
 131
 132 /* Clksel_rate flags */
 133 #define DEFAULT_RATE            (1 << 0)
 134 #define RATE_IN_242X            (1 << 1)
 135 #define RATE_IN_243X            (1 << 2)
 136 #define RATE_IN_343X            (1 << 3)        /* rates common to all 343X */
 137 #define RATE_IN_3430ES2         (1 << 4)        /* 3430ES2 rates only */
 138
 139 #define RATE_IN_24XX            (RATE_IN_242X | RATE_IN_243X)
 140
 141
 142 /* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */
 143 #define CORE_CLK_SRC_32K                0
 144 #define CORE_CLK_SRC_DPLL               1
 145 #define CORE_CLK_SRC_DPLL_X2            2
 146
 147 #endif