Merge tag 'fscache-fixes-20141013' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / include / asm-generic / pgtable.h
1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
3
4 #ifndef __ASSEMBLY__
5 #ifdef CONFIG_MMU
6
7 #include <linux/mm_types.h>
8 #include <linux/bug.h>
9
10 /*
11 * On almost all architectures and configurations, 0 can be used as the
12 * upper ceiling to free_pgtables(): on many architectures it has the same
13 * effect as using TASK_SIZE. However, there is one configuration which
14 * must impose a more careful limit, to avoid freeing kernel pgtables.
15 */
16 #ifndef USER_PGTABLES_CEILING
17 #define USER_PGTABLES_CEILING 0UL
18 #endif
19
20 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
21 extern int ptep_set_access_flags(struct vm_area_struct *vma,
22 unsigned long address, pte_t *ptep,
23 pte_t entry, int dirty);
24 #endif
25
26 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
27 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
28 unsigned long address, pmd_t *pmdp,
29 pmd_t entry, int dirty);
30 #endif
31
32 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
33 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
34 unsigned long address,
35 pte_t *ptep)
36 {
37 pte_t pte = *ptep;
38 int r = 1;
39 if (!pte_young(pte))
40 r = 0;
41 else
42 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
43 return r;
44 }
45 #endif
46
47 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
48 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
49 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
50 unsigned long address,
51 pmd_t *pmdp)
52 {
53 pmd_t pmd = *pmdp;
54 int r = 1;
55 if (!pmd_young(pmd))
56 r = 0;
57 else
58 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
59 return r;
60 }
61 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
62 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
63 unsigned long address,
64 pmd_t *pmdp)
65 {
66 BUG();
67 return 0;
68 }
69 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
70 #endif
71
72 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
73 int ptep_clear_flush_young(struct vm_area_struct *vma,
74 unsigned long address, pte_t *ptep);
75 #endif
76
77 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
78 int pmdp_clear_flush_young(struct vm_area_struct *vma,
79 unsigned long address, pmd_t *pmdp);
80 #endif
81
82 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
83 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
84 unsigned long address,
85 pte_t *ptep)
86 {
87 pte_t pte = *ptep;
88 pte_clear(mm, address, ptep);
89 return pte;
90 }
91 #endif
92
93 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
94 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
95 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
96 unsigned long address,
97 pmd_t *pmdp)
98 {
99 pmd_t pmd = *pmdp;
100 pmd_clear(pmdp);
101 return pmd;
102 }
103 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
104 #endif
105
106 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
107 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
108 unsigned long address, pte_t *ptep,
109 int full)
110 {
111 pte_t pte;
112 pte = ptep_get_and_clear(mm, address, ptep);
113 return pte;
114 }
115 #endif
116
117 /*
118 * Some architectures may be able to avoid expensive synchronization
119 * primitives when modifications are made to PTE's which are already
120 * not present, or in the process of an address space destruction.
121 */
122 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
123 static inline void pte_clear_not_present_full(struct mm_struct *mm,
124 unsigned long address,
125 pte_t *ptep,
126 int full)
127 {
128 pte_clear(mm, address, ptep);
129 }
130 #endif
131
132 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
133 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
134 unsigned long address,
135 pte_t *ptep);
136 #endif
137
138 #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
139 extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
140 unsigned long address,
141 pmd_t *pmdp);
142 #endif
143
144 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
145 struct mm_struct;
146 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
147 {
148 pte_t old_pte = *ptep;
149 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
150 }
151 #endif
152
153 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
154 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
155 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
156 unsigned long address, pmd_t *pmdp)
157 {
158 pmd_t old_pmd = *pmdp;
159 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
160 }
161 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
162 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
163 unsigned long address, pmd_t *pmdp)
164 {
165 BUG();
166 }
167 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
168 #endif
169
170 #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
171 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
172 unsigned long address, pmd_t *pmdp);
173 #endif
174
175 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
176 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
177 pgtable_t pgtable);
178 #endif
179
180 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
181 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
182 #endif
183
184 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
185 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
186 pmd_t *pmdp);
187 #endif
188
189 #ifndef __HAVE_ARCH_PTE_SAME
190 static inline int pte_same(pte_t pte_a, pte_t pte_b)
191 {
192 return pte_val(pte_a) == pte_val(pte_b);
193 }
194 #endif
195
196 #ifndef __HAVE_ARCH_PTE_UNUSED
197 /*
198 * Some architectures provide facilities to virtualization guests
199 * so that they can flag allocated pages as unused. This allows the
200 * host to transparently reclaim unused pages. This function returns
201 * whether the pte's page is unused.
202 */
203 static inline int pte_unused(pte_t pte)
204 {
205 return 0;
206 }
207 #endif
208
209 #ifndef __HAVE_ARCH_PMD_SAME
210 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
211 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
212 {
213 return pmd_val(pmd_a) == pmd_val(pmd_b);
214 }
215 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
216 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
217 {
218 BUG();
219 return 0;
220 }
221 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
222 #endif
223
224 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
225 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
226 #endif
227
228 #ifndef __HAVE_ARCH_MOVE_PTE
229 #define move_pte(pte, prot, old_addr, new_addr) (pte)
230 #endif
231
232 #ifndef pte_accessible
233 # define pte_accessible(mm, pte) ((void)(pte), 1)
234 #endif
235
236 #ifndef pte_present_nonuma
237 #define pte_present_nonuma(pte) pte_present(pte)
238 #endif
239
240 #ifndef flush_tlb_fix_spurious_fault
241 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
242 #endif
243
244 #ifndef pgprot_noncached
245 #define pgprot_noncached(prot) (prot)
246 #endif
247
248 #ifndef pgprot_writecombine
249 #define pgprot_writecombine pgprot_noncached
250 #endif
251
252 #ifndef pgprot_device
253 #define pgprot_device pgprot_noncached
254 #endif
255
256 #ifndef pgprot_modify
257 #define pgprot_modify pgprot_modify
258 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
259 {
260 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
261 newprot = pgprot_noncached(newprot);
262 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
263 newprot = pgprot_writecombine(newprot);
264 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
265 newprot = pgprot_device(newprot);
266 return newprot;
267 }
268 #endif
269
270 /*
271 * When walking page tables, get the address of the next boundary,
272 * or the end address of the range if that comes earlier. Although no
273 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
274 */
275
276 #define pgd_addr_end(addr, end) \
277 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
278 (__boundary - 1 < (end) - 1)? __boundary: (end); \
279 })
280
281 #ifndef pud_addr_end
282 #define pud_addr_end(addr, end) \
283 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
284 (__boundary - 1 < (end) - 1)? __boundary: (end); \
285 })
286 #endif
287
288 #ifndef pmd_addr_end
289 #define pmd_addr_end(addr, end) \
290 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
291 (__boundary - 1 < (end) - 1)? __boundary: (end); \
292 })
293 #endif
294
295 /*
296 * When walking page tables, we usually want to skip any p?d_none entries;
297 * and any p?d_bad entries - reporting the error before resetting to none.
298 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
299 */
300 void pgd_clear_bad(pgd_t *);
301 void pud_clear_bad(pud_t *);
302 void pmd_clear_bad(pmd_t *);
303
304 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
305 {
306 if (pgd_none(*pgd))
307 return 1;
308 if (unlikely(pgd_bad(*pgd))) {
309 pgd_clear_bad(pgd);
310 return 1;
311 }
312 return 0;
313 }
314
315 static inline int pud_none_or_clear_bad(pud_t *pud)
316 {
317 if (pud_none(*pud))
318 return 1;
319 if (unlikely(pud_bad(*pud))) {
320 pud_clear_bad(pud);
321 return 1;
322 }
323 return 0;
324 }
325
326 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
327 {
328 if (pmd_none(*pmd))
329 return 1;
330 if (unlikely(pmd_bad(*pmd))) {
331 pmd_clear_bad(pmd);
332 return 1;
333 }
334 return 0;
335 }
336
337 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
338 unsigned long addr,
339 pte_t *ptep)
340 {
341 /*
342 * Get the current pte state, but zero it out to make it
343 * non-present, preventing the hardware from asynchronously
344 * updating it.
345 */
346 return ptep_get_and_clear(mm, addr, ptep);
347 }
348
349 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
350 unsigned long addr,
351 pte_t *ptep, pte_t pte)
352 {
353 /*
354 * The pte is non-present, so there's no hardware state to
355 * preserve.
356 */
357 set_pte_at(mm, addr, ptep, pte);
358 }
359
360 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
361 /*
362 * Start a pte protection read-modify-write transaction, which
363 * protects against asynchronous hardware modifications to the pte.
364 * The intention is not to prevent the hardware from making pte
365 * updates, but to prevent any updates it may make from being lost.
366 *
367 * This does not protect against other software modifications of the
368 * pte; the appropriate pte lock must be held over the transation.
369 *
370 * Note that this interface is intended to be batchable, meaning that
371 * ptep_modify_prot_commit may not actually update the pte, but merely
372 * queue the update to be done at some later time. The update must be
373 * actually committed before the pte lock is released, however.
374 */
375 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
376 unsigned long addr,
377 pte_t *ptep)
378 {
379 return __ptep_modify_prot_start(mm, addr, ptep);
380 }
381
382 /*
383 * Commit an update to a pte, leaving any hardware-controlled bits in
384 * the PTE unmodified.
385 */
386 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
387 unsigned long addr,
388 pte_t *ptep, pte_t pte)
389 {
390 __ptep_modify_prot_commit(mm, addr, ptep, pte);
391 }
392 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
393 #endif /* CONFIG_MMU */
394
395 /*
396 * A facility to provide lazy MMU batching. This allows PTE updates and
397 * page invalidations to be delayed until a call to leave lazy MMU mode
398 * is issued. Some architectures may benefit from doing this, and it is
399 * beneficial for both shadow and direct mode hypervisors, which may batch
400 * the PTE updates which happen during this window. Note that using this
401 * interface requires that read hazards be removed from the code. A read
402 * hazard could result in the direct mode hypervisor case, since the actual
403 * write to the page tables may not yet have taken place, so reads though
404 * a raw PTE pointer after it has been modified are not guaranteed to be
405 * up to date. This mode can only be entered and left under the protection of
406 * the page table locks for all page tables which may be modified. In the UP
407 * case, this is required so that preemption is disabled, and in the SMP case,
408 * it must synchronize the delayed page table writes properly on other CPUs.
409 */
410 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
411 #define arch_enter_lazy_mmu_mode() do {} while (0)
412 #define arch_leave_lazy_mmu_mode() do {} while (0)
413 #define arch_flush_lazy_mmu_mode() do {} while (0)
414 #endif
415
416 /*
417 * A facility to provide batching of the reload of page tables and
418 * other process state with the actual context switch code for
419 * paravirtualized guests. By convention, only one of the batched
420 * update (lazy) modes (CPU, MMU) should be active at any given time,
421 * entry should never be nested, and entry and exits should always be
422 * paired. This is for sanity of maintaining and reasoning about the
423 * kernel code. In this case, the exit (end of the context switch) is
424 * in architecture-specific code, and so doesn't need a generic
425 * definition.
426 */
427 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
428 #define arch_start_context_switch(prev) do {} while (0)
429 #endif
430
431 #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
432 static inline int pte_soft_dirty(pte_t pte)
433 {
434 return 0;
435 }
436
437 static inline int pmd_soft_dirty(pmd_t pmd)
438 {
439 return 0;
440 }
441
442 static inline pte_t pte_mksoft_dirty(pte_t pte)
443 {
444 return pte;
445 }
446
447 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
448 {
449 return pmd;
450 }
451
452 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
453 {
454 return pte;
455 }
456
457 static inline int pte_swp_soft_dirty(pte_t pte)
458 {
459 return 0;
460 }
461
462 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
463 {
464 return pte;
465 }
466
467 static inline pte_t pte_file_clear_soft_dirty(pte_t pte)
468 {
469 return pte;
470 }
471
472 static inline pte_t pte_file_mksoft_dirty(pte_t pte)
473 {
474 return pte;
475 }
476
477 static inline int pte_file_soft_dirty(pte_t pte)
478 {
479 return 0;
480 }
481 #endif
482
483 #ifndef __HAVE_PFNMAP_TRACKING
484 /*
485 * Interfaces that can be used by architecture code to keep track of
486 * memory type of pfn mappings specified by the remap_pfn_range,
487 * vm_insert_pfn.
488 */
489
490 /*
491 * track_pfn_remap is called when a _new_ pfn mapping is being established
492 * by remap_pfn_range() for physical range indicated by pfn and size.
493 */
494 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
495 unsigned long pfn, unsigned long addr,
496 unsigned long size)
497 {
498 return 0;
499 }
500
501 /*
502 * track_pfn_insert is called when a _new_ single pfn is established
503 * by vm_insert_pfn().
504 */
505 static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
506 unsigned long pfn)
507 {
508 return 0;
509 }
510
511 /*
512 * track_pfn_copy is called when vma that is covering the pfnmap gets
513 * copied through copy_page_range().
514 */
515 static inline int track_pfn_copy(struct vm_area_struct *vma)
516 {
517 return 0;
518 }
519
520 /*
521 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
522 * untrack can be called for a specific region indicated by pfn and size or
523 * can be for the entire vma (in which case pfn, size are zero).
524 */
525 static inline void untrack_pfn(struct vm_area_struct *vma,
526 unsigned long pfn, unsigned long size)
527 {
528 }
529 #else
530 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
531 unsigned long pfn, unsigned long addr,
532 unsigned long size);
533 extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
534 unsigned long pfn);
535 extern int track_pfn_copy(struct vm_area_struct *vma);
536 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
537 unsigned long size);
538 #endif
539
540 #ifdef __HAVE_COLOR_ZERO_PAGE
541 static inline int is_zero_pfn(unsigned long pfn)
542 {
543 extern unsigned long zero_pfn;
544 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
545 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
546 }
547
548 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
549
550 #else
551 static inline int is_zero_pfn(unsigned long pfn)
552 {
553 extern unsigned long zero_pfn;
554 return pfn == zero_pfn;
555 }
556
557 static inline unsigned long my_zero_pfn(unsigned long addr)
558 {
559 extern unsigned long zero_pfn;
560 return zero_pfn;
561 }
562 #endif
563
564 #ifdef CONFIG_MMU
565
566 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
567 static inline int pmd_trans_huge(pmd_t pmd)
568 {
569 return 0;
570 }
571 static inline int pmd_trans_splitting(pmd_t pmd)
572 {
573 return 0;
574 }
575 #ifndef __HAVE_ARCH_PMD_WRITE
576 static inline int pmd_write(pmd_t pmd)
577 {
578 BUG();
579 return 0;
580 }
581 #endif /* __HAVE_ARCH_PMD_WRITE */
582 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
583
584 #ifndef pmd_read_atomic
585 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
586 {
587 /*
588 * Depend on compiler for an atomic pmd read. NOTE: this is
589 * only going to work, if the pmdval_t isn't larger than
590 * an unsigned long.
591 */
592 return *pmdp;
593 }
594 #endif
595
596 #ifndef pmd_move_must_withdraw
597 static inline int pmd_move_must_withdraw(spinlock_t *new_pmd_ptl,
598 spinlock_t *old_pmd_ptl)
599 {
600 /*
601 * With split pmd lock we also need to move preallocated
602 * PTE page table if new_pmd is on different PMD page table.
603 */
604 return new_pmd_ptl != old_pmd_ptl;
605 }
606 #endif
607
608 /*
609 * This function is meant to be used by sites walking pagetables with
610 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
611 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
612 * into a null pmd and the transhuge page fault can convert a null pmd
613 * into an hugepmd or into a regular pmd (if the hugepage allocation
614 * fails). While holding the mmap_sem in read mode the pmd becomes
615 * stable and stops changing under us only if it's not null and not a
616 * transhuge pmd. When those races occurs and this function makes a
617 * difference vs the standard pmd_none_or_clear_bad, the result is
618 * undefined so behaving like if the pmd was none is safe (because it
619 * can return none anyway). The compiler level barrier() is critically
620 * important to compute the two checks atomically on the same pmdval.
621 *
622 * For 32bit kernels with a 64bit large pmd_t this automatically takes
623 * care of reading the pmd atomically to avoid SMP race conditions
624 * against pmd_populate() when the mmap_sem is hold for reading by the
625 * caller (a special atomic read not done by "gcc" as in the generic
626 * version above, is also needed when THP is disabled because the page
627 * fault can populate the pmd from under us).
628 */
629 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
630 {
631 pmd_t pmdval = pmd_read_atomic(pmd);
632 /*
633 * The barrier will stabilize the pmdval in a register or on
634 * the stack so that it will stop changing under the code.
635 *
636 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
637 * pmd_read_atomic is allowed to return a not atomic pmdval
638 * (for example pointing to an hugepage that has never been
639 * mapped in the pmd). The below checks will only care about
640 * the low part of the pmd with 32bit PAE x86 anyway, with the
641 * exception of pmd_none(). So the important thing is that if
642 * the low part of the pmd is found null, the high part will
643 * be also null or the pmd_none() check below would be
644 * confused.
645 */
646 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
647 barrier();
648 #endif
649 if (pmd_none(pmdval) || pmd_trans_huge(pmdval))
650 return 1;
651 if (unlikely(pmd_bad(pmdval))) {
652 pmd_clear_bad(pmd);
653 return 1;
654 }
655 return 0;
656 }
657
658 /*
659 * This is a noop if Transparent Hugepage Support is not built into
660 * the kernel. Otherwise it is equivalent to
661 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
662 * places that already verified the pmd is not none and they want to
663 * walk ptes while holding the mmap sem in read mode (write mode don't
664 * need this). If THP is not enabled, the pmd can't go away under the
665 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
666 * run a pmd_trans_unstable before walking the ptes after
667 * split_huge_page_pmd returns (because it may have run when the pmd
668 * become null, but then a page fault can map in a THP and not a
669 * regular page).
670 */
671 static inline int pmd_trans_unstable(pmd_t *pmd)
672 {
673 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
674 return pmd_none_or_trans_huge_or_clear_bad(pmd);
675 #else
676 return 0;
677 #endif
678 }
679
680 #ifdef CONFIG_NUMA_BALANCING
681 /*
682 * _PAGE_NUMA distinguishes between an unmapped page table entry, an entry that
683 * is protected for PROT_NONE and a NUMA hinting fault entry. If the
684 * architecture defines __PAGE_PROTNONE then it should take that into account
685 * but those that do not can rely on the fact that the NUMA hinting scanner
686 * skips inaccessible VMAs.
687 *
688 * pte/pmd_present() returns true if pte/pmd_numa returns true. Page
689 * fault triggers on those regions if pte/pmd_numa returns true
690 * (because _PAGE_PRESENT is not set).
691 */
692 #ifndef pte_numa
693 static inline int pte_numa(pte_t pte)
694 {
695 return ptenuma_flags(pte) == _PAGE_NUMA;
696 }
697 #endif
698
699 #ifndef pmd_numa
700 static inline int pmd_numa(pmd_t pmd)
701 {
702 return pmdnuma_flags(pmd) == _PAGE_NUMA;
703 }
704 #endif
705
706 /*
707 * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically
708 * because they're called by the NUMA hinting minor page fault. If we
709 * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler
710 * would be forced to set it later while filling the TLB after we
711 * return to userland. That would trigger a second write to memory
712 * that we optimize away by setting _PAGE_ACCESSED here.
713 */
714 #ifndef pte_mknonnuma
715 static inline pte_t pte_mknonnuma(pte_t pte)
716 {
717 pteval_t val = pte_val(pte);
718
719 val &= ~_PAGE_NUMA;
720 val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
721 return __pte(val);
722 }
723 #endif
724
725 #ifndef pmd_mknonnuma
726 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
727 {
728 pmdval_t val = pmd_val(pmd);
729
730 val &= ~_PAGE_NUMA;
731 val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
732
733 return __pmd(val);
734 }
735 #endif
736
737 #ifndef pte_mknuma
738 static inline pte_t pte_mknuma(pte_t pte)
739 {
740 pteval_t val = pte_val(pte);
741
742 VM_BUG_ON(!(val & _PAGE_PRESENT));
743
744 val &= ~_PAGE_PRESENT;
745 val |= _PAGE_NUMA;
746
747 return __pte(val);
748 }
749 #endif
750
751 #ifndef ptep_set_numa
752 static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
753 pte_t *ptep)
754 {
755 pte_t ptent = *ptep;
756
757 ptent = pte_mknuma(ptent);
758 set_pte_at(mm, addr, ptep, ptent);
759 return;
760 }
761 #endif
762
763 #ifndef pmd_mknuma
764 static inline pmd_t pmd_mknuma(pmd_t pmd)
765 {
766 pmdval_t val = pmd_val(pmd);
767
768 val &= ~_PAGE_PRESENT;
769 val |= _PAGE_NUMA;
770
771 return __pmd(val);
772 }
773 #endif
774
775 #ifndef pmdp_set_numa
776 static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
777 pmd_t *pmdp)
778 {
779 pmd_t pmd = *pmdp;
780
781 pmd = pmd_mknuma(pmd);
782 set_pmd_at(mm, addr, pmdp, pmd);
783 return;
784 }
785 #endif
786 #else
787 static inline int pmd_numa(pmd_t pmd)
788 {
789 return 0;
790 }
791
792 static inline int pte_numa(pte_t pte)
793 {
794 return 0;
795 }
796
797 static inline pte_t pte_mknonnuma(pte_t pte)
798 {
799 return pte;
800 }
801
802 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
803 {
804 return pmd;
805 }
806
807 static inline pte_t pte_mknuma(pte_t pte)
808 {
809 return pte;
810 }
811
812 static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
813 pte_t *ptep)
814 {
815 return;
816 }
817
818
819 static inline pmd_t pmd_mknuma(pmd_t pmd)
820 {
821 return pmd;
822 }
823
824 static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
825 pmd_t *pmdp)
826 {
827 return ;
828 }
829 #endif /* CONFIG_NUMA_BALANCING */
830
831 #endif /* CONFIG_MMU */
832
833 #endif /* !__ASSEMBLY__ */
834
835 #ifndef io_remap_pfn_range
836 #define io_remap_pfn_range remap_pfn_range
837 #endif
838
839 #endif /* _ASM_GENERIC_PGTABLE_H */
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