Merge branch 'mv-merge'
[deliverable/linux.git] / include / asm-h8300 / bitops.h
1 #ifndef _H8300_BITOPS_H
2 #define _H8300_BITOPS_H
3
4 /*
5 * Copyright 1992, Linus Torvalds.
6 * Copyright 2002, Yoshinori Sato
7 */
8
9 #include <linux/config.h>
10 #include <linux/compiler.h>
11 #include <asm/system.h>
12
13 #ifdef __KERNEL__
14 /*
15 * Function prototypes to keep gcc -Wall happy
16 */
17
18 /*
19 * ffz = Find First Zero in word. Undefined if no zero exists,
20 * so code should check against ~0UL first..
21 */
22 static __inline__ unsigned long ffz(unsigned long word)
23 {
24 unsigned long result;
25
26 result = -1;
27 __asm__("1:\n\t"
28 "shlr.l %2\n\t"
29 "adds #1,%0\n\t"
30 "bcs 1b"
31 : "=r" (result)
32 : "0" (result),"r" (word));
33 return result;
34 }
35
36 #define H8300_GEN_BITOP_CONST(OP,BIT) \
37 case BIT: \
38 __asm__(OP " #" #BIT ",@%0"::"r"(b_addr):"memory"); \
39 break;
40
41 #define H8300_GEN_BITOP(FNAME,OP) \
42 static __inline__ void FNAME(int nr, volatile unsigned long* addr) \
43 { \
44 volatile unsigned char *b_addr; \
45 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
46 if (__builtin_constant_p(nr)) { \
47 switch(nr & 7) { \
48 H8300_GEN_BITOP_CONST(OP,0) \
49 H8300_GEN_BITOP_CONST(OP,1) \
50 H8300_GEN_BITOP_CONST(OP,2) \
51 H8300_GEN_BITOP_CONST(OP,3) \
52 H8300_GEN_BITOP_CONST(OP,4) \
53 H8300_GEN_BITOP_CONST(OP,5) \
54 H8300_GEN_BITOP_CONST(OP,6) \
55 H8300_GEN_BITOP_CONST(OP,7) \
56 } \
57 } else { \
58 __asm__(OP " %w0,@%1"::"r"(nr),"r"(b_addr):"memory"); \
59 } \
60 }
61
62 /*
63 * clear_bit() doesn't provide any barrier for the compiler.
64 */
65 #define smp_mb__before_clear_bit() barrier()
66 #define smp_mb__after_clear_bit() barrier()
67
68 H8300_GEN_BITOP(set_bit ,"bset")
69 H8300_GEN_BITOP(clear_bit ,"bclr")
70 H8300_GEN_BITOP(change_bit,"bnot")
71 #define __set_bit(nr,addr) set_bit((nr),(addr))
72 #define __clear_bit(nr,addr) clear_bit((nr),(addr))
73 #define __change_bit(nr,addr) change_bit((nr),(addr))
74
75 #undef H8300_GEN_BITOP
76 #undef H8300_GEN_BITOP_CONST
77
78 static __inline__ int test_bit(int nr, const unsigned long* addr)
79 {
80 return (*((volatile unsigned char *)addr +
81 ((nr >> 3) ^ 3)) & (1UL << (nr & 7))) != 0;
82 }
83
84 #define __test_bit(nr, addr) test_bit(nr, addr)
85
86 #define H8300_GEN_TEST_BITOP_CONST_INT(OP,BIT) \
87 case BIT: \
88 __asm__("stc ccr,%w1\n\t" \
89 "orc #0x80,ccr\n\t" \
90 "bld #" #BIT ",@%4\n\t" \
91 OP " #" #BIT ",@%4\n\t" \
92 "rotxl.l %0\n\t" \
93 "ldc %w1,ccr" \
94 : "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr) \
95 : "0" (retval),"r" (b_addr) \
96 : "memory"); \
97 break;
98
99 #define H8300_GEN_TEST_BITOP_CONST(OP,BIT) \
100 case BIT: \
101 __asm__("bld #" #BIT ",@%3\n\t" \
102 OP " #" #BIT ",@%3\n\t" \
103 "rotxl.l %0\n\t" \
104 : "=r"(retval),"=m"(*b_addr) \
105 : "0" (retval),"r" (b_addr) \
106 : "memory"); \
107 break;
108
109 #define H8300_GEN_TEST_BITOP(FNNAME,OP) \
110 static __inline__ int FNNAME(int nr, volatile void * addr) \
111 { \
112 int retval = 0; \
113 char ccrsave; \
114 volatile unsigned char *b_addr; \
115 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
116 if (__builtin_constant_p(nr)) { \
117 switch(nr & 7) { \
118 H8300_GEN_TEST_BITOP_CONST_INT(OP,0) \
119 H8300_GEN_TEST_BITOP_CONST_INT(OP,1) \
120 H8300_GEN_TEST_BITOP_CONST_INT(OP,2) \
121 H8300_GEN_TEST_BITOP_CONST_INT(OP,3) \
122 H8300_GEN_TEST_BITOP_CONST_INT(OP,4) \
123 H8300_GEN_TEST_BITOP_CONST_INT(OP,5) \
124 H8300_GEN_TEST_BITOP_CONST_INT(OP,6) \
125 H8300_GEN_TEST_BITOP_CONST_INT(OP,7) \
126 } \
127 } else { \
128 __asm__("stc ccr,%w1\n\t" \
129 "orc #0x80,ccr\n\t" \
130 "btst %w5,@%4\n\t" \
131 OP " %w5,@%4\n\t" \
132 "beq 1f\n\t" \
133 "inc.l #1,%0\n" \
134 "1:\n\t" \
135 "ldc %w1,ccr" \
136 : "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr) \
137 : "0" (retval),"r" (b_addr),"r"(nr) \
138 : "memory"); \
139 } \
140 return retval; \
141 } \
142 \
143 static __inline__ int __ ## FNNAME(int nr, volatile void * addr) \
144 { \
145 int retval = 0; \
146 volatile unsigned char *b_addr; \
147 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
148 if (__builtin_constant_p(nr)) { \
149 switch(nr & 7) { \
150 H8300_GEN_TEST_BITOP_CONST(OP,0) \
151 H8300_GEN_TEST_BITOP_CONST(OP,1) \
152 H8300_GEN_TEST_BITOP_CONST(OP,2) \
153 H8300_GEN_TEST_BITOP_CONST(OP,3) \
154 H8300_GEN_TEST_BITOP_CONST(OP,4) \
155 H8300_GEN_TEST_BITOP_CONST(OP,5) \
156 H8300_GEN_TEST_BITOP_CONST(OP,6) \
157 H8300_GEN_TEST_BITOP_CONST(OP,7) \
158 } \
159 } else { \
160 __asm__("btst %w4,@%3\n\t" \
161 OP " %w4,@%3\n\t" \
162 "beq 1f\n\t" \
163 "inc.l #1,%0\n" \
164 "1:" \
165 : "=r"(retval),"=m"(*b_addr) \
166 : "0" (retval),"r" (b_addr),"r"(nr) \
167 : "memory"); \
168 } \
169 return retval; \
170 }
171
172 H8300_GEN_TEST_BITOP(test_and_set_bit, "bset")
173 H8300_GEN_TEST_BITOP(test_and_clear_bit, "bclr")
174 H8300_GEN_TEST_BITOP(test_and_change_bit,"bnot")
175 #undef H8300_GEN_TEST_BITOP_CONST
176 #undef H8300_GEN_TEST_BITOP_CONST_INT
177 #undef H8300_GEN_TEST_BITOP
178
179 #include <asm-generic/bitops/ffs.h>
180
181 static __inline__ unsigned long __ffs(unsigned long word)
182 {
183 unsigned long result;
184
185 result = -1;
186 __asm__("1:\n\t"
187 "shlr.l %2\n\t"
188 "adds #1,%0\n\t"
189 "bcc 1b"
190 : "=r" (result)
191 : "0"(result),"r"(word));
192 return result;
193 }
194
195 #include <asm-generic/bitops/find.h>
196 #include <asm-generic/bitops/sched.h>
197 #include <asm-generic/bitops/hweight.h>
198 #include <asm-generic/bitops/ext2-non-atomic.h>
199 #include <asm-generic/bitops/ext2-atomic.h>
200 #include <asm-generic/bitops/minix.h>
201
202 #endif /* __KERNEL__ */
203
204 #include <asm-generic/bitops/fls.h>
205 #include <asm-generic/bitops/fls64.h>
206
207 #endif /* _H8300_BITOPS_H */
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