1 #ifndef _ASM_M32R_CACHE_H
2 #define _ASM_M32R_CACHE_H
4 /* L1 cache line size */
5 #define L1_CACHE_SHIFT 4
6 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
8 #endif /* _ASM_M32R_CACHE_H */
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