include/asm-mips/mmu_context.h

   1 /*
   2  * Switch a MMU context.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1996, 1997, 1998, 1999 by Ralf Baechle
   9  * Copyright (C) 1999 Silicon Graphics, Inc.
  10  */
  11 #ifndef _ASM_MMU_CONTEXT_H
  12 #define _ASM_MMU_CONTEXT_H
  13
  14 #include <linux/config.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/slab.h>
  18 #include <asm/cacheflush.h>
  19 #include <asm/tlbflush.h>
  20
  21 /*
  22  * For the fast tlb miss handlers, we keep a per cpu array of pointers
  23  * to the current pgd for each processor. Also, the proc. id is stuffed
  24  * into the context register.
  25  */
  26 extern unsigned long pgd_current[];
  27
  28 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
  29         pgd_current[smp_processor_id()] = (unsigned long)(pgd)
  30
  31 #ifdef CONFIG_32BIT
  32 #define TLBMISS_HANDLER_SETUP()                                         \
  33         write_c0_context((unsigned long) smp_processor_id() << 25);     \
  34         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
  35 #endif
  36 #ifdef CONFIG_64BIT
  37 #define TLBMISS_HANDLER_SETUP()                                         \
  38         write_c0_context((unsigned long) smp_processor_id() << 26);     \
  39         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
  40 #endif
  41
  42 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  43
  44 #define ASID_INC        0x40
  45 #define ASID_MASK       0xfc0
  46
  47 #elif defined(CONFIG_CPU_R8000)
  48
  49 #define ASID_INC        0x10
  50 #define ASID_MASK       0xff0
  51
  52 #elif defined(CONFIG_CPU_RM9000)
  53
  54 #define ASID_INC        0x1
  55 #define ASID_MASK       0xfff
  56
  57 #else /* FIXME: not correct for R6000 */
  58
  59 #define ASID_INC        0x1
  60 #define ASID_MASK       0xff
  61
  62 #endif
  63
  64 #define cpu_context(cpu, mm)    ((mm)->context[cpu])
  65 #define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & ASID_MASK)
  66 #define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
  67
  68 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  69 {
  70 }
  71
  72 /*
  73  *  All unused by hardware upper bits will be considered
  74  *  as a software asid extension.
  75  */
  76 #define ASID_VERSION_MASK  ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
  77 #define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
  78
  79 static inline void
  80 get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
  81 {
  82         unsigned long asid = asid_cache(cpu);
  83
  84         if (! ((asid += ASID_INC) & ASID_MASK) ) {
  85                 if (cpu_has_vtag_icache)
  86                         flush_icache_all();
  87                 local_flush_tlb_all();  /* start new asid cycle */
  88                 if (!asid)              /* fix version if needed */
  89                         asid = ASID_FIRST_VERSION;
  90         }
  91         cpu_context(cpu, mm) = asid_cache(cpu) = asid;
  92 }
  93
  94 /*
  95  * Initialize the context related info for a new mm_struct
  96  * instance.
  97  */
  98 static inline int
  99 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 100 {
 101         int i;
 102
 103         for (i = 0; i < num_online_cpus(); i++)
 104                 cpu_context(i, mm) = 0;
 105
 106         return 0;
 107 }
 108
 109 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 110                              struct task_struct *tsk)
 111 {
 112         unsigned int cpu = smp_processor_id();
 113         unsigned long flags;
 114
 115         local_irq_save(flags);
 116
 117         /* Check if our ASID is of an older version and thus invalid */
 118         if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
 119                 get_new_mmu_context(next, cpu);
 120
 121         write_c0_entryhi(cpu_context(cpu, next));
 122         TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 123
 124         /*
 125          * Mark current->active_mm as not "active" anymore.
 126          * We don't want to mislead possible IPI tlb flush routines.
 127          */
 128         cpu_clear(cpu, prev->cpu_vm_mask);
 129         cpu_set(cpu, next->cpu_vm_mask);
 130
 131         local_irq_restore(flags);
 132 }
 133
 134 /*
 135  * Destroy context related info for an mm_struct that is about
 136  * to be put to rest.
 137  */
 138 static inline void destroy_context(struct mm_struct *mm)
 139 {
 140 }
 141
 142 #define deactivate_mm(tsk,mm)   do { } while (0)
 143
 144 /*
 145  * After we have set current->mm to a new value, this activates
 146  * the context for the new mm so we see the new mappings.
 147  */
 148 static inline void
 149 activate_mm(struct mm_struct *prev, struct mm_struct *next)
 150 {
 151         unsigned long flags;
 152         unsigned int cpu = smp_processor_id();
 153
 154         local_irq_save(flags);
 155
 156         /* Unconditionally get a new ASID.  */
 157         get_new_mmu_context(next, cpu);
 158
 159         write_c0_entryhi(cpu_context(cpu, next));
 160         TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 161
 162         /* mark mmu ownership change */
 163         cpu_clear(cpu, prev->cpu_vm_mask);
 164         cpu_set(cpu, next->cpu_vm_mask);
 165
 166         local_irq_restore(flags);
 167 }
 168
 169 /*
 170  * If mm is currently active_mm, we can't really drop it.  Instead,
 171  * we will get a new one for it.
 172  */
 173 static inline void
 174 drop_mmu_context(struct mm_struct *mm, unsigned cpu)
 175 {
 176         unsigned long flags;
 177
 178         local_irq_save(flags);
 179
 180         if (cpu_isset(cpu, mm->cpu_vm_mask))  {
 181                 get_new_mmu_context(mm, cpu);
 182                 write_c0_entryhi(cpu_asid(cpu, mm));
 183         } else {
 184                 /* will get a new context next time */
 185                 cpu_context(cpu, mm) = 0;
 186         }
 187
 188         local_irq_restore(flags);
 189 }
 190
 191 #endif /* _ASM_MMU_CONTEXT_H */