Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[deliverable/linux.git] / include / asm-powerpc / io.h
1 #ifndef _ASM_POWERPC_IO_H
2 #define _ASM_POWERPC_IO_H
3 #ifdef __KERNEL__
4
5 /*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12 /* Check of existence of legacy devices */
13 extern int check_legacy_ioport(unsigned long base_port);
14 #define PNPBIOS_BASE 0xf000 /* only relevant for PReP */
15
16 #ifndef CONFIG_PPC64
17 #include <asm-ppc/io.h>
18 #else
19
20 #include <linux/compiler.h>
21 #include <asm/page.h>
22 #include <asm/byteorder.h>
23 #include <asm/paca.h>
24 #include <asm/synch.h>
25 #include <asm/delay.h>
26
27 #include <asm-generic/iomap.h>
28
29 #define SIO_CONFIG_RA 0x398
30 #define SIO_CONFIG_RD 0x399
31
32 #define SLOW_DOWN_IO
33
34 extern unsigned long isa_io_base;
35 extern unsigned long pci_io_base;
36
37 #ifdef CONFIG_PPC_ISERIES
38
39 extern int in_8(const volatile unsigned char __iomem *addr);
40 extern void out_8(volatile unsigned char __iomem *addr, int val);
41 extern int in_le16(const volatile unsigned short __iomem *addr);
42 extern int in_be16(const volatile unsigned short __iomem *addr);
43 extern void out_le16(volatile unsigned short __iomem *addr, int val);
44 extern void out_be16(volatile unsigned short __iomem *addr, int val);
45 extern unsigned in_le32(const volatile unsigned __iomem *addr);
46 extern unsigned in_be32(const volatile unsigned __iomem *addr);
47 extern void out_le32(volatile unsigned __iomem *addr, int val);
48 extern void out_be32(volatile unsigned __iomem *addr, int val);
49 extern unsigned long in_le64(const volatile unsigned long __iomem *addr);
50 extern unsigned long in_be64(const volatile unsigned long __iomem *addr);
51 extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val);
52 extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val);
53
54 extern unsigned char __raw_readb(const volatile void __iomem *addr);
55 extern unsigned short __raw_readw(const volatile void __iomem *addr);
56 extern unsigned int __raw_readl(const volatile void __iomem *addr);
57 extern unsigned long __raw_readq(const volatile void __iomem *addr);
58 extern void __raw_writeb(unsigned char v, volatile void __iomem *addr);
59 extern void __raw_writew(unsigned short v, volatile void __iomem *addr);
60 extern void __raw_writel(unsigned int v, volatile void __iomem *addr);
61 extern void __raw_writeq(unsigned long v, volatile void __iomem *addr);
62
63 extern void memset_io(volatile void __iomem *addr, int c, unsigned long n);
64 extern void memcpy_fromio(void *dest, const volatile void __iomem *src,
65 unsigned long n);
66 extern void memcpy_toio(volatile void __iomem *dest, const void *src,
67 unsigned long n);
68
69 #else /* CONFIG_PPC_ISERIES */
70
71 #define in_8(addr) __in_8((addr))
72 #define out_8(addr, val) __out_8((addr), (val))
73 #define in_le16(addr) __in_le16((addr))
74 #define in_be16(addr) __in_be16((addr))
75 #define out_le16(addr, val) __out_le16((addr), (val))
76 #define out_be16(addr, val) __out_be16((addr), (val))
77 #define in_le32(addr) __in_le32((addr))
78 #define in_be32(addr) __in_be32((addr))
79 #define out_le32(addr, val) __out_le32((addr), (val))
80 #define out_be32(addr, val) __out_be32((addr), (val))
81 #define in_le64(addr) __in_le64((addr))
82 #define in_be64(addr) __in_be64((addr))
83 #define out_le64(addr, val) __out_le64((addr), (val))
84 #define out_be64(addr, val) __out_be64((addr), (val))
85
86 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
87 {
88 return *(volatile unsigned char __force *)addr;
89 }
90 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
91 {
92 return *(volatile unsigned short __force *)addr;
93 }
94 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
95 {
96 return *(volatile unsigned int __force *)addr;
97 }
98 static inline unsigned long __raw_readq(const volatile void __iomem *addr)
99 {
100 return *(volatile unsigned long __force *)addr;
101 }
102 static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
103 {
104 *(volatile unsigned char __force *)addr = v;
105 }
106 static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
107 {
108 *(volatile unsigned short __force *)addr = v;
109 }
110 static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
111 {
112 *(volatile unsigned int __force *)addr = v;
113 }
114 static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
115 {
116 *(volatile unsigned long __force *)addr = v;
117 }
118 #define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
119 #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
120 #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
121
122 #endif /* CONFIG_PPC_ISERIES */
123
124 /*
125 * The insw/outsw/insl/outsl macros don't do byte-swapping.
126 * They are only used in practice for transferring buffers which
127 * are arrays of bytes, and byte-swapping is not appropriate in
128 * that case. - paulus */
129 #define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
130 #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
131 #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
132
133 #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
134 #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
135 #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
136
137 #define readb(addr) eeh_readb(addr)
138 #define readw(addr) eeh_readw(addr)
139 #define readl(addr) eeh_readl(addr)
140 #define readq(addr) eeh_readq(addr)
141 #define writeb(data, addr) eeh_writeb((data), (addr))
142 #define writew(data, addr) eeh_writew((data), (addr))
143 #define writel(data, addr) eeh_writel((data), (addr))
144 #define writeq(data, addr) eeh_writeq((data), (addr))
145 #define inb(port) eeh_inb((unsigned long)port)
146 #define outb(val, port) eeh_outb(val, (unsigned long)port)
147 #define inw(port) eeh_inw((unsigned long)port)
148 #define outw(val, port) eeh_outw(val, (unsigned long)port)
149 #define inl(port) eeh_inl((unsigned long)port)
150 #define outl(val, port) eeh_outl(val, (unsigned long)port)
151
152 #define readb_relaxed(addr) readb(addr)
153 #define readw_relaxed(addr) readw(addr)
154 #define readl_relaxed(addr) readl(addr)
155 #define readq_relaxed(addr) readq(addr)
156
157 extern void _insb(volatile u8 __iomem *port, void *buf, long count);
158 extern void _outsb(volatile u8 __iomem *port, const void *buf, long count);
159 extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count);
160 extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count);
161 extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count);
162 extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count);
163
164 static inline void mmiowb(void)
165 {
166 __asm__ __volatile__ ("sync" : : : "memory");
167 get_paca()->io_sync = 0;
168 }
169
170 /*
171 * output pause versions need a delay at least for the
172 * w83c105 ide controller in a p610.
173 */
174 #define inb_p(port) inb(port)
175 #define outb_p(val, port) (udelay(1), outb((val), (port)))
176 #define inw_p(port) inw(port)
177 #define outw_p(val, port) (udelay(1), outw((val), (port)))
178 #define inl_p(port) inl(port)
179 #define outl_p(val, port) (udelay(1), outl((val), (port)))
180
181
182 #define IO_SPACE_LIMIT ~(0UL)
183
184
185 extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
186 unsigned long size, unsigned long flags);
187 extern void __iomem *__ioremap(unsigned long address, unsigned long size,
188 unsigned long flags);
189
190 /**
191 * ioremap - map bus memory into CPU space
192 * @address: bus address of the memory
193 * @size: size of the resource to map
194 *
195 * ioremap performs a platform specific sequence of operations to
196 * make bus memory CPU accessible via the readb/readw/readl/writeb/
197 * writew/writel functions and the other mmio helpers. The returned
198 * address is not guaranteed to be usable directly as a virtual
199 * address.
200 */
201 extern void __iomem *ioremap(unsigned long address, unsigned long size);
202
203 #define ioremap_nocache(addr, size) ioremap((addr), (size))
204 extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
205 extern void iounmap(volatile void __iomem *addr);
206 extern void __iomem * reserve_phb_iospace(unsigned long size);
207
208 /**
209 * virt_to_phys - map virtual addresses to physical
210 * @address: address to remap
211 *
212 * The returned physical address is the physical (CPU) mapping for
213 * the memory address given. It is only valid to use this function on
214 * addresses directly mapped or allocated via kmalloc.
215 *
216 * This function does not give bus mappings for DMA transfers. In
217 * almost all conceivable cases a device driver should not be using
218 * this function
219 */
220 static inline unsigned long virt_to_phys(volatile void * address)
221 {
222 return __pa((unsigned long)address);
223 }
224
225 /**
226 * phys_to_virt - map physical address to virtual
227 * @address: address to remap
228 *
229 * The returned virtual address is a current CPU mapping for
230 * the memory address given. It is only valid to use this function on
231 * addresses that have a kernel mapping
232 *
233 * This function does not handle bus mappings for DMA transfers. In
234 * almost all conceivable cases a device driver should not be using
235 * this function
236 */
237 static inline void * phys_to_virt(unsigned long address)
238 {
239 return (void *)__va(address);
240 }
241
242 /*
243 * Change "struct page" to physical address.
244 */
245 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
246
247 /* We do NOT want virtual merging, it would put too much pressure on
248 * our iommu allocator. Instead, we want drivers to be smart enough
249 * to coalesce sglists that happen to have been mapped in a contiguous
250 * way by the iommu
251 */
252 #define BIO_VMERGE_BOUNDARY 0
253
254 static inline void iosync(void)
255 {
256 __asm__ __volatile__ ("sync" : : : "memory");
257 }
258
259 /* Enforce in-order execution of data I/O.
260 * No distinction between read/write on PPC; use eieio for all three.
261 */
262 #define iobarrier_rw() eieio()
263 #define iobarrier_r() eieio()
264 #define iobarrier_w() eieio()
265
266 /*
267 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
268 * These routines do not perform EEH-related I/O address translation,
269 * and should not be used directly by device drivers. Use inb/readb
270 * instead.
271 */
272 static inline int __in_8(const volatile unsigned char __iomem *addr)
273 {
274 int ret;
275
276 __asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
277 : "=r" (ret) : "m" (*addr));
278 return ret;
279 }
280
281 static inline void __out_8(volatile unsigned char __iomem *addr, int val)
282 {
283 __asm__ __volatile__("sync; stb%U0%X0 %1,%0"
284 : "=m" (*addr) : "r" (val));
285 get_paca()->io_sync = 1;
286 }
287
288 static inline int __in_le16(const volatile unsigned short __iomem *addr)
289 {
290 int ret;
291
292 __asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync"
293 : "=r" (ret) : "r" (addr), "m" (*addr));
294 return ret;
295 }
296
297 static inline int __in_be16(const volatile unsigned short __iomem *addr)
298 {
299 int ret;
300
301 __asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
302 : "=r" (ret) : "m" (*addr));
303 return ret;
304 }
305
306 static inline void __out_le16(volatile unsigned short __iomem *addr, int val)
307 {
308 __asm__ __volatile__("sync; sthbrx %1,0,%2"
309 : "=m" (*addr) : "r" (val), "r" (addr));
310 get_paca()->io_sync = 1;
311 }
312
313 static inline void __out_be16(volatile unsigned short __iomem *addr, int val)
314 {
315 __asm__ __volatile__("sync; sth%U0%X0 %1,%0"
316 : "=m" (*addr) : "r" (val));
317 get_paca()->io_sync = 1;
318 }
319
320 static inline unsigned __in_le32(const volatile unsigned __iomem *addr)
321 {
322 unsigned ret;
323
324 __asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync"
325 : "=r" (ret) : "r" (addr), "m" (*addr));
326 return ret;
327 }
328
329 static inline unsigned __in_be32(const volatile unsigned __iomem *addr)
330 {
331 unsigned ret;
332
333 __asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
334 : "=r" (ret) : "m" (*addr));
335 return ret;
336 }
337
338 static inline void __out_le32(volatile unsigned __iomem *addr, int val)
339 {
340 __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr)
341 : "r" (val), "r" (addr));
342 get_paca()->io_sync = 1;
343 }
344
345 static inline void __out_be32(volatile unsigned __iomem *addr, int val)
346 {
347 __asm__ __volatile__("sync; stw%U0%X0 %1,%0"
348 : "=m" (*addr) : "r" (val));
349 get_paca()->io_sync = 1;
350 }
351
352 static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr)
353 {
354 unsigned long tmp, ret;
355
356 __asm__ __volatile__(
357 "sync\n"
358 "ld %1,0(%2)\n"
359 "twi 0,%1,0\n"
360 "isync\n"
361 "rldimi %0,%1,5*8,1*8\n"
362 "rldimi %0,%1,3*8,2*8\n"
363 "rldimi %0,%1,1*8,3*8\n"
364 "rldimi %0,%1,7*8,4*8\n"
365 "rldicl %1,%1,32,0\n"
366 "rlwimi %0,%1,8,8,31\n"
367 "rlwimi %0,%1,24,16,23\n"
368 : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
369 return ret;
370 }
371
372 static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr)
373 {
374 unsigned long ret;
375
376 __asm__ __volatile__("sync; ld%U1%X1 %0,%1; twi 0,%0,0; isync"
377 : "=r" (ret) : "m" (*addr));
378 return ret;
379 }
380
381 static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val)
382 {
383 unsigned long tmp;
384
385 __asm__ __volatile__(
386 "rldimi %0,%1,5*8,1*8\n"
387 "rldimi %0,%1,3*8,2*8\n"
388 "rldimi %0,%1,1*8,3*8\n"
389 "rldimi %0,%1,7*8,4*8\n"
390 "rldicl %1,%1,32,0\n"
391 "rlwimi %0,%1,8,8,31\n"
392 "rlwimi %0,%1,24,16,23\n"
393 "sync\n"
394 "std %0,0(%3)"
395 : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
396 get_paca()->io_sync = 1;
397 }
398
399 static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val)
400 {
401 __asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
402 get_paca()->io_sync = 1;
403 }
404
405 #include <asm/eeh.h>
406
407 /* Nothing to do */
408
409 #define dma_cache_inv(_start,_size) do { } while (0)
410 #define dma_cache_wback(_start,_size) do { } while (0)
411 #define dma_cache_wback_inv(_start,_size) do { } while (0)
412
413
414 /*
415 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
416 * access
417 */
418 #define xlate_dev_mem_ptr(p) __va(p)
419
420 /*
421 * Convert a virtual cached pointer to an uncached pointer
422 */
423 #define xlate_dev_kmem_ptr(p) p
424
425 #endif /* __KERNEL__ */
426
427 #endif /* CONFIG_PPC64 */
428 #endif /* _ASM_POWERPC_IO_H */
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