2 #ifndef _ASM_PCI_BRIDGE_H
3 #define _ASM_PCI_BRIDGE_H
5 #include <linux/ioport.h>
12 * pci_io_base returns the memory address at which you can access
13 * the I/O space for PCI bus number `bus' (or NULL on error).
15 extern void __iomem
*pci_bus_io_base(unsigned int bus
);
16 extern unsigned long pci_bus_io_base_phys(unsigned int bus
);
17 extern unsigned long pci_bus_mem_base_phys(unsigned int bus
);
19 /* Allocate a new PCI host bridge structure */
20 extern struct pci_controller
* pcibios_alloc_controller(void);
22 /* Helper function for setting up resources */
23 extern void pci_init_resource(struct resource
*res
, resource_size_t start
,
24 resource_size_t end
, int flags
, char *name
);
26 /* Get the PCI host controller for a bus */
27 extern struct pci_controller
* pci_bus_to_hose(int bus
);
29 /* Get the PCI host controller for an OF device */
30 extern struct pci_controller
*
31 pci_find_hose_for_OF_device(struct device_node
* node
);
33 /* Fill up host controller resources from the OF node */
35 pci_process_bridge_OF_ranges(struct pci_controller
*hose
,
36 struct device_node
*dev
, int primary
);
39 * Structure of a PCI controller (host bridge)
41 struct pci_controller
{
42 int index
; /* PCI domain number */
43 struct pci_controller
*next
;
46 struct device
*parent
;
53 void __iomem
*io_base_virt
;
54 resource_size_t io_base_phys
;
56 /* Some machines (PReP) have a non 1:1 mapping of
57 * the PCI memory space in the CPU bus space
59 resource_size_t pci_mem_offset
;
62 volatile unsigned int __iomem
*cfg_addr
;
63 volatile void __iomem
*cfg_data
;
65 * If set, indirect method will set the cfg_type bit as
66 * needed to generate type 1 configuration transactions.
70 /* Currently, we limit ourselves to 1 IO range and 3 mem
71 * ranges since the common pci_bus structure can't handle more
73 struct resource io_resource
;
74 struct resource mem_resources
[3];
75 int mem_resource_count
;
77 /* Host bridge I/O and Memory space
78 * Used for BAR placement algorithms
80 struct resource io_space
;
81 struct resource mem_space
;
84 static inline struct pci_controller
*pci_bus_to_host(struct pci_bus
*bus
)
89 /* These are used for config access before all the PCI probing
91 int early_read_config_byte(struct pci_controller
*hose
, int bus
, int dev_fn
,
93 int early_read_config_word(struct pci_controller
*hose
, int bus
, int dev_fn
,
95 int early_read_config_dword(struct pci_controller
*hose
, int bus
, int dev_fn
,
97 int early_write_config_byte(struct pci_controller
*hose
, int bus
, int dev_fn
,
99 int early_write_config_word(struct pci_controller
*hose
, int bus
, int dev_fn
,
101 int early_write_config_dword(struct pci_controller
*hose
, int bus
, int dev_fn
,
104 extern void setup_indirect_pci_nomap(struct pci_controller
* hose
,
105 void __iomem
*cfg_addr
, void __iomem
*cfg_data
);
106 extern void setup_indirect_pci(struct pci_controller
* hose
,
107 u32 cfg_addr
, u32 cfg_data
);
108 extern void setup_grackle(struct pci_controller
*hose
);
110 extern unsigned char common_swizzle(struct pci_dev
*, unsigned char *);
113 * The following code swizzles for exactly one bridge. The routine
114 * common_swizzle below handles multiple bridges. But there are a
115 * some boards that don't follow the PCI spec's suggestion so we
116 * break this piece out separately.
118 static inline unsigned char bridge_swizzle(unsigned char pin
,
121 return (((pin
-1) + idsel
) % 4) + 1;
125 * The following macro is used to lookup irqs in a standard table
126 * format for those PPC systems that do not already have PCI
127 * interrupts properly routed.
129 /* FIXME - double check this */
130 #define PCI_IRQ_TABLE_LOOKUP \
131 ({ long _ctl_ = -1; \
132 if (idsel >= min_idsel && idsel <= max_idsel && pin <= irqs_per_slot) \
133 _ctl_ = pci_irq_table[idsel - min_idsel][pin-1]; \
137 * Scan the buses below a given PCI host bridge and assign suitable
138 * resources to all devices found.
140 extern int pciauto_bus_scan(struct pci_controller
*, int);
143 extern unsigned long pci_address_to_pio(phys_addr_t address
);
145 static inline unsigned long pci_address_to_pio(phys_addr_t address
)
147 return (unsigned long)-1;
152 #endif /* __KERNEL__ */