Detect the 34K.
[deliverable/linux.git] / include / asm-ppc64 / eeh.h
1 /*
2 * eeh.h
3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #ifndef _PPC64_EEH_H
21 #define _PPC64_EEH_H
22
23 #include <linux/config.h>
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/string.h>
27
28 struct pci_dev;
29 struct device_node;
30 struct device_node;
31 struct notifier_block;
32
33 #ifdef CONFIG_EEH
34
35 /* Values for eeh_mode bits in device_node */
36 #define EEH_MODE_SUPPORTED (1<<0)
37 #define EEH_MODE_NOCHECK (1<<1)
38 #define EEH_MODE_ISOLATED (1<<2)
39
40 void __init eeh_init(void);
41 unsigned long eeh_check_failure(const volatile void __iomem *token,
42 unsigned long val);
43 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
44 void __init pci_addr_cache_build(void);
45
46 /**
47 * eeh_add_device_early
48 * eeh_add_device_late
49 *
50 * Perform eeh initialization for devices added after boot.
51 * Call eeh_add_device_early before doing any i/o to the
52 * device (including config space i/o). Call eeh_add_device_late
53 * to finish the eeh setup for this device.
54 */
55 void eeh_add_device_early(struct device_node *);
56 void eeh_add_device_late(struct pci_dev *);
57
58 /**
59 * eeh_remove_device - undo EEH setup for the indicated pci device
60 * @dev: pci device to be removed
61 *
62 * This routine should be when a device is removed from a running
63 * system (e.g. by hotplug or dlpar).
64 */
65 void eeh_remove_device(struct pci_dev *);
66
67 #define EEH_DISABLE 0
68 #define EEH_ENABLE 1
69 #define EEH_RELEASE_LOADSTORE 2
70 #define EEH_RELEASE_DMA 3
71
72 /**
73 * Notifier event flags.
74 */
75 #define EEH_NOTIFY_FREEZE 1
76
77 /** EEH event -- structure holding pci slot data that describes
78 * a change in the isolation status of a PCI slot. A pointer
79 * to this struct is passed as the data pointer in a notify callback.
80 */
81 struct eeh_event {
82 struct list_head list;
83 struct pci_dev *dev;
84 struct device_node *dn;
85 int reset_state;
86 };
87
88 /** Register to find out about EEH events. */
89 int eeh_register_notifier(struct notifier_block *nb);
90 int eeh_unregister_notifier(struct notifier_block *nb);
91
92 /**
93 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
94 *
95 * If this macro yields TRUE, the caller relays to eeh_check_failure()
96 * which does further tests out of line.
97 */
98 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0)
99
100 /*
101 * Reads from a device which has been isolated by EEH will return
102 * all 1s. This macro gives an all-1s value of the given size (in
103 * bytes: 1, 2, or 4) for comparing with the result of a read.
104 */
105 #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
106
107 #else /* !CONFIG_EEH */
108 static inline void eeh_init(void) { }
109
110 static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
111 {
112 return val;
113 }
114
115 static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
116 {
117 return 0;
118 }
119
120 static inline void pci_addr_cache_build(void) { }
121
122 static inline void eeh_add_device_early(struct device_node *dn) { }
123
124 static inline void eeh_add_device_late(struct pci_dev *dev) { }
125
126 static inline void eeh_remove_device(struct pci_dev *dev) { }
127
128 #define EEH_POSSIBLE_ERROR(val, type) (0)
129 #define EEH_IO_ERROR_VALUE(size) (-1UL)
130 #endif /* CONFIG_EEH */
131
132 /*
133 * MMIO read/write operations with EEH support.
134 */
135 static inline u8 eeh_readb(const volatile void __iomem *addr)
136 {
137 u8 val = in_8(addr);
138 if (EEH_POSSIBLE_ERROR(val, u8))
139 return eeh_check_failure(addr, val);
140 return val;
141 }
142 static inline void eeh_writeb(u8 val, volatile void __iomem *addr)
143 {
144 out_8(addr, val);
145 }
146
147 static inline u16 eeh_readw(const volatile void __iomem *addr)
148 {
149 u16 val = in_le16(addr);
150 if (EEH_POSSIBLE_ERROR(val, u16))
151 return eeh_check_failure(addr, val);
152 return val;
153 }
154 static inline void eeh_writew(u16 val, volatile void __iomem *addr)
155 {
156 out_le16(addr, val);
157 }
158 static inline u16 eeh_raw_readw(const volatile void __iomem *addr)
159 {
160 u16 val = in_be16(addr);
161 if (EEH_POSSIBLE_ERROR(val, u16))
162 return eeh_check_failure(addr, val);
163 return val;
164 }
165 static inline void eeh_raw_writew(u16 val, volatile void __iomem *addr) {
166 volatile u16 __iomem *vaddr = (volatile u16 __iomem *) addr;
167 out_be16(vaddr, val);
168 }
169
170 static inline u32 eeh_readl(const volatile void __iomem *addr)
171 {
172 u32 val = in_le32(addr);
173 if (EEH_POSSIBLE_ERROR(val, u32))
174 return eeh_check_failure(addr, val);
175 return val;
176 }
177 static inline void eeh_writel(u32 val, volatile void __iomem *addr)
178 {
179 out_le32(addr, val);
180 }
181 static inline u32 eeh_raw_readl(const volatile void __iomem *addr)
182 {
183 u32 val = in_be32(addr);
184 if (EEH_POSSIBLE_ERROR(val, u32))
185 return eeh_check_failure(addr, val);
186 return val;
187 }
188 static inline void eeh_raw_writel(u32 val, volatile void __iomem *addr)
189 {
190 out_be32(addr, val);
191 }
192
193 static inline u64 eeh_readq(const volatile void __iomem *addr)
194 {
195 u64 val = in_le64(addr);
196 if (EEH_POSSIBLE_ERROR(val, u64))
197 return eeh_check_failure(addr, val);
198 return val;
199 }
200 static inline void eeh_writeq(u64 val, volatile void __iomem *addr)
201 {
202 out_le64(addr, val);
203 }
204 static inline u64 eeh_raw_readq(const volatile void __iomem *addr)
205 {
206 u64 val = in_be64(addr);
207 if (EEH_POSSIBLE_ERROR(val, u64))
208 return eeh_check_failure(addr, val);
209 return val;
210 }
211 static inline void eeh_raw_writeq(u64 val, volatile void __iomem *addr)
212 {
213 out_be64(addr, val);
214 }
215
216 #define EEH_CHECK_ALIGN(v,a) \
217 ((((unsigned long)(v)) & ((a) - 1)) == 0)
218
219 static inline void eeh_memset_io(volatile void __iomem *addr, int c,
220 unsigned long n)
221 {
222 void *p = (void __force *)addr;
223 u32 lc = c;
224 lc |= lc << 8;
225 lc |= lc << 16;
226
227 while(n && !EEH_CHECK_ALIGN(p, 4)) {
228 *((volatile u8 *)p) = c;
229 p++;
230 n--;
231 }
232 while(n >= 4) {
233 *((volatile u32 *)p) = lc;
234 p += 4;
235 n -= 4;
236 }
237 while(n) {
238 *((volatile u8 *)p) = c;
239 p++;
240 n--;
241 }
242 __asm__ __volatile__ ("sync" : : : "memory");
243 }
244 static inline void eeh_memcpy_fromio(void *dest, const volatile void __iomem *src,
245 unsigned long n)
246 {
247 void *vsrc = (void __force *) src;
248 void *destsave = dest;
249 unsigned long nsave = n;
250
251 while(n && (!EEH_CHECK_ALIGN(vsrc, 4) || !EEH_CHECK_ALIGN(dest, 4))) {
252 *((u8 *)dest) = *((volatile u8 *)vsrc);
253 __asm__ __volatile__ ("eieio" : : : "memory");
254 vsrc++;
255 dest++;
256 n--;
257 }
258 while(n > 4) {
259 *((u32 *)dest) = *((volatile u32 *)vsrc);
260 __asm__ __volatile__ ("eieio" : : : "memory");
261 vsrc += 4;
262 dest += 4;
263 n -= 4;
264 }
265 while(n) {
266 *((u8 *)dest) = *((volatile u8 *)vsrc);
267 __asm__ __volatile__ ("eieio" : : : "memory");
268 vsrc++;
269 dest++;
270 n--;
271 }
272 __asm__ __volatile__ ("sync" : : : "memory");
273
274 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
275 * were copied. Check all four bytes.
276 */
277 if ((nsave >= 4) &&
278 (EEH_POSSIBLE_ERROR((*((u32 *) destsave+nsave-4)), u32))) {
279 eeh_check_failure(src, (*((u32 *) destsave+nsave-4)));
280 }
281 }
282
283 static inline void eeh_memcpy_toio(volatile void __iomem *dest, const void *src,
284 unsigned long n)
285 {
286 void *vdest = (void __force *) dest;
287
288 while(n && (!EEH_CHECK_ALIGN(vdest, 4) || !EEH_CHECK_ALIGN(src, 4))) {
289 *((volatile u8 *)vdest) = *((u8 *)src);
290 src++;
291 vdest++;
292 n--;
293 }
294 while(n > 4) {
295 *((volatile u32 *)vdest) = *((volatile u32 *)src);
296 src += 4;
297 vdest += 4;
298 n-=4;
299 }
300 while(n) {
301 *((volatile u8 *)vdest) = *((u8 *)src);
302 src++;
303 vdest++;
304 n--;
305 }
306 __asm__ __volatile__ ("sync" : : : "memory");
307 }
308
309 #undef EEH_CHECK_ALIGN
310
311 static inline u8 eeh_inb(unsigned long port)
312 {
313 u8 val;
314 if (!_IO_IS_VALID(port))
315 return ~0;
316 val = in_8((u8 __iomem *)(port+pci_io_base));
317 if (EEH_POSSIBLE_ERROR(val, u8))
318 return eeh_check_failure((void __iomem *)(port), val);
319 return val;
320 }
321
322 static inline void eeh_outb(u8 val, unsigned long port)
323 {
324 if (_IO_IS_VALID(port))
325 out_8((u8 __iomem *)(port+pci_io_base), val);
326 }
327
328 static inline u16 eeh_inw(unsigned long port)
329 {
330 u16 val;
331 if (!_IO_IS_VALID(port))
332 return ~0;
333 val = in_le16((u16 __iomem *)(port+pci_io_base));
334 if (EEH_POSSIBLE_ERROR(val, u16))
335 return eeh_check_failure((void __iomem *)(port), val);
336 return val;
337 }
338
339 static inline void eeh_outw(u16 val, unsigned long port)
340 {
341 if (_IO_IS_VALID(port))
342 out_le16((u16 __iomem *)(port+pci_io_base), val);
343 }
344
345 static inline u32 eeh_inl(unsigned long port)
346 {
347 u32 val;
348 if (!_IO_IS_VALID(port))
349 return ~0;
350 val = in_le32((u32 __iomem *)(port+pci_io_base));
351 if (EEH_POSSIBLE_ERROR(val, u32))
352 return eeh_check_failure((void __iomem *)(port), val);
353 return val;
354 }
355
356 static inline void eeh_outl(u32 val, unsigned long port)
357 {
358 if (_IO_IS_VALID(port))
359 out_le32((u32 __iomem *)(port+pci_io_base), val);
360 }
361
362 /* in-string eeh macros */
363 static inline void eeh_insb(unsigned long port, void * buf, int ns)
364 {
365 _insb((u8 __iomem *)(port+pci_io_base), buf, ns);
366 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
367 eeh_check_failure((void __iomem *)(port), *(u8*)buf);
368 }
369
370 static inline void eeh_insw_ns(unsigned long port, void * buf, int ns)
371 {
372 _insw_ns((u16 __iomem *)(port+pci_io_base), buf, ns);
373 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
374 eeh_check_failure((void __iomem *)(port), *(u16*)buf);
375 }
376
377 static inline void eeh_insl_ns(unsigned long port, void * buf, int nl)
378 {
379 _insl_ns((u32 __iomem *)(port+pci_io_base), buf, nl);
380 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
381 eeh_check_failure((void __iomem *)(port), *(u32*)buf);
382 }
383
384 #endif /* _PPC64_EEH_H */
This page took 0.040831 seconds and 5 git commands to generate.