include/asm-sh64/io.h

   1 #ifndef __ASM_SH64_IO_H
   2 #define __ASM_SH64_IO_H
   3
   4 /*
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file "COPYING" in the main directory of this archive
   7  * for more details.
   8  *
   9  * include/asm-sh64/io.h
  10  *
  11  * Copyright (C) 2000, 2001  Paolo Alberelli
  12  * Copyright (C) 2003  Paul Mundt
  13  *
  14  */
  15
  16 /*
  17  * Convention:
  18  *    read{b,w,l}/write{b,w,l} are for PCI,
  19  *    while in{b,w,l}/out{b,w,l} are for ISA
  20  * These may (will) be platform specific function.
  21  *
  22  * In addition, we have
  23  *   ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
  24  * which are processor specific. Address should be the result of
  25  * onchip_remap();
  26  */
  27
  28 #include <linux/compiler.h>
  29 #include <asm/cache.h>
  30 #include <asm/system.h>
  31 #include <asm/page.h>
  32 #include <asm-generic/iomap.h>
  33
  34 /*
  35  * Nothing overly special here.. instead of doing the same thing
  36  * over and over again, we just define a set of sh64_in/out functions
  37  * with an implicit size. The traditional read{b,w,l}/write{b,w,l}
  38  * mess is wrapped to this, as are the SH-specific ctrl_in/out routines.
  39  */
  40 static inline unsigned char sh64_in8(const volatile void __iomem *addr)
  41 {
  42         return *(volatile unsigned char __force *)addr;
  43 }
  44
  45 static inline unsigned short sh64_in16(const volatile void __iomem *addr)
  46 {
  47         return *(volatile unsigned short __force *)addr;
  48 }
  49
  50 static inline unsigned int sh64_in32(const volatile void __iomem *addr)
  51 {
  52         return *(volatile unsigned int __force *)addr;
  53 }
  54
  55 static inline unsigned long long sh64_in64(const volatile void __iomem *addr)
  56 {
  57         return *(volatile unsigned long long __force *)addr;
  58 }
  59
  60 static inline void sh64_out8(unsigned char b, volatile void __iomem *addr)
  61 {
  62         *(volatile unsigned char __force *)addr = b;
  63         wmb();
  64 }
  65
  66 static inline void sh64_out16(unsigned short b, volatile void __iomem *addr)
  67 {
  68         *(volatile unsigned short __force *)addr = b;
  69         wmb();
  70 }
  71
  72 static inline void sh64_out32(unsigned int b, volatile void __iomem *addr)
  73 {
  74         *(volatile unsigned int __force *)addr = b;
  75         wmb();
  76 }
  77
  78 static inline void sh64_out64(unsigned long long b, volatile void __iomem *addr)
  79 {
  80         *(volatile unsigned long long __force *)addr = b;
  81         wmb();
  82 }
  83
  84 #define readb(addr)             sh64_in8(addr)
  85 #define readw(addr)             sh64_in16(addr)
  86 #define readl(addr)             sh64_in32(addr)
  87 #define readb_relaxed(addr)     sh64_in8(addr)
  88 #define readw_relaxed(addr)     sh64_in16(addr)
  89 #define readl_relaxed(addr)     sh64_in32(addr)
  90
  91 #define writeb(b, addr)         sh64_out8(b, addr)
  92 #define writew(b, addr)         sh64_out16(b, addr)
  93 #define writel(b, addr)         sh64_out32(b, addr)
  94
  95 #define ctrl_inb(addr)          sh64_in8(ioport_map(addr, 1))
  96 #define ctrl_inw(addr)          sh64_in16(ioport_map(addr, 2))
  97 #define ctrl_inl(addr)          sh64_in32(ioport_map(addr, 4))
  98
  99 #define ctrl_outb(b, addr)      sh64_out8(b, ioport_map(addr, 1))
 100 #define ctrl_outw(b, addr)      sh64_out16(b, ioport_map(addr, 2))
 101 #define ctrl_outl(b, addr)      sh64_out32(b, ioport_map(addr, 4))
 102
 103 #define ioread8(addr)           sh64_in8(addr)
 104 #define ioread16(addr)          sh64_in16(addr)
 105 #define ioread32(addr)          sh64_in32(addr)
 106 #define iowrite8(b, addr)       sh64_out8(b, addr)
 107 #define iowrite16(b, addr)      sh64_out16(b, addr)
 108 #define iowrite32(b, addr)      sh64_out32(b, addr)
 109
 110 #define inb(addr)               ctrl_inb(addr)
 111 #define inw(addr)               ctrl_inw(addr)
 112 #define inl(addr)               ctrl_inl(addr)
 113 #define outb(b, addr)           ctrl_outb(b, addr)
 114 #define outw(b, addr)           ctrl_outw(b, addr)
 115 #define outl(b, addr)           ctrl_outl(b, addr)
 116
 117 void outsw(unsigned long port, const void *addr, unsigned long count);
 118 void insw(unsigned long port, void *addr, unsigned long count);
 119 void outsl(unsigned long port, const void *addr, unsigned long count);
 120 void insl(unsigned long port, void *addr, unsigned long count);
 121
 122 #define __raw_readb             readb
 123 #define __raw_readw             readw
 124 #define __raw_readl             readl
 125 #define __raw_writeb            writeb
 126 #define __raw_writew            writew
 127 #define __raw_writel            writel
 128
 129 void memcpy_toio(void __iomem *to, const void *from, long count);
 130 void memcpy_fromio(void *to, void __iomem *from, long count);
 131
 132 #define mmiowb()
 133
 134 #ifdef __KERNEL__
 135
 136 #ifdef CONFIG_SH_CAYMAN
 137 extern unsigned long smsc_superio_virt;
 138 #endif
 139 #ifdef CONFIG_PCI
 140 extern unsigned long pciio_virt;
 141 #endif
 142
 143 #define IO_SPACE_LIMIT 0xffffffff
 144
 145 /*
 146  * Change virtual addresses to physical addresses and vv.
 147  * These are trivial on the 1:1 Linux/SuperH mapping
 148  */
 149 static inline unsigned long virt_to_phys(volatile void * address)
 150 {
 151         return __pa(address);
 152 }
 153
 154 static inline void * phys_to_virt(unsigned long address)
 155 {
 156         return __va(address);
 157 }
 158
 159 extern void * __ioremap(unsigned long phys_addr, unsigned long size,
 160                         unsigned long flags);
 161
 162 static inline void * ioremap(unsigned long phys_addr, unsigned long size)
 163 {
 164         return __ioremap(phys_addr, size, 1);
 165 }
 166
 167 static inline void * ioremap_nocache (unsigned long phys_addr, unsigned long size)
 168 {
 169         return __ioremap(phys_addr, size, 0);
 170 }
 171
 172 extern void iounmap(void *addr);
 173
 174 unsigned long onchip_remap(unsigned long addr, unsigned long size, const char* name);
 175 extern void onchip_unmap(unsigned long vaddr);
 176
 177 /*
 178  * The caches on some architectures aren't dma-coherent and have need to
 179  * handle this in software.  There are three types of operations that
 180  * can be applied to dma buffers.
 181  *
 182  *  - dma_cache_wback_inv(start, size) makes caches and RAM coherent by
 183  *    writing the content of the caches back to memory, if necessary.
 184  *    The function also invalidates the affected part of the caches as
 185  *    necessary before DMA transfers from outside to memory.
 186  *  - dma_cache_inv(start, size) invalidates the affected parts of the
 187  *    caches.  Dirty lines of the caches may be written back or simply
 188  *    be discarded.  This operation is necessary before dma operations
 189  *    to the memory.
 190  *  - dma_cache_wback(start, size) writes back any dirty lines but does
 191  *    not invalidate the cache.  This can be used before DMA reads from
 192  *    memory,
 193  */
 194
 195 static __inline__ void dma_cache_wback_inv (unsigned long start, unsigned long size)
 196 {
 197         unsigned long s = start & L1_CACHE_ALIGN_MASK;
 198         unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
 199
 200         for (; s <= e; s += L1_CACHE_BYTES)
 201                 asm volatile ("ocbp     %0, 0" : : "r" (s));
 202 }
 203
 204 static __inline__ void dma_cache_inv (unsigned long start, unsigned long size)
 205 {
 206         // Note that caller has to be careful with overzealous
 207         // invalidation should there be partial cache lines at the extremities
 208         // of the specified range
 209         unsigned long s = start & L1_CACHE_ALIGN_MASK;
 210         unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
 211
 212         for (; s <= e; s += L1_CACHE_BYTES)
 213                 asm volatile ("ocbi     %0, 0" : : "r" (s));
 214 }
 215
 216 static __inline__ void dma_cache_wback (unsigned long start, unsigned long size)
 217 {
 218         unsigned long s = start & L1_CACHE_ALIGN_MASK;
 219         unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
 220
 221         for (; s <= e; s += L1_CACHE_BYTES)
 222                 asm volatile ("ocbwb    %0, 0" : : "r" (s));
 223 }
 224
 225 /*
 226  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 227  * access
 228  */
 229 #define xlate_dev_mem_ptr(p)    __va(p)
 230
 231 /*
 232  * Convert a virtual cached pointer to an uncached pointer
 233  */
 234 #define xlate_dev_kmem_ptr(p)   p
 235
 236 #endif /* __KERNEL__ */
 237 #endif /* __ASM_SH64_IO_H */