8ec68a50cf103b3779da806b391978fb27fcdc2c
[deliverable/linux.git] / include / asm-x86 / io_apic.h
1 #ifndef ASM_X86__IO_APIC_H
2 #define ASM_X86__IO_APIC_H
3
4 #include <linux/types.h>
5 #include <asm/mpspec.h>
6 #include <asm/apicdef.h>
7
8 /*
9 * Intel IO-APIC support for SMP and UP systems.
10 *
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12 */
13
14 /* I/O Unit Redirection Table */
15 #define IO_APIC_REDIR_VECTOR_MASK 0x000FF
16 #define IO_APIC_REDIR_DEST_LOGICAL 0x00800
17 #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
18 #define IO_APIC_REDIR_SEND_PENDING (1 << 12)
19 #define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
20 #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
21 #define IO_APIC_REDIR_MASKED (1 << 16)
22
23 /*
24 * The structure of the IO-APIC:
25 */
26 union IO_APIC_reg_00 {
27 u32 raw;
28 struct {
29 u32 __reserved_2 : 14,
30 LTS : 1,
31 delivery_type : 1,
32 __reserved_1 : 8,
33 ID : 8;
34 } __attribute__ ((packed)) bits;
35 };
36
37 union IO_APIC_reg_01 {
38 u32 raw;
39 struct {
40 u32 version : 8,
41 __reserved_2 : 7,
42 PRQ : 1,
43 entries : 8,
44 __reserved_1 : 8;
45 } __attribute__ ((packed)) bits;
46 };
47
48 union IO_APIC_reg_02 {
49 u32 raw;
50 struct {
51 u32 __reserved_2 : 24,
52 arbitration : 4,
53 __reserved_1 : 4;
54 } __attribute__ ((packed)) bits;
55 };
56
57 union IO_APIC_reg_03 {
58 u32 raw;
59 struct {
60 u32 boot_DT : 1,
61 __reserved_1 : 31;
62 } __attribute__ ((packed)) bits;
63 };
64
65 enum ioapic_irq_destination_types {
66 dest_Fixed = 0,
67 dest_LowestPrio = 1,
68 dest_SMI = 2,
69 dest__reserved_1 = 3,
70 dest_NMI = 4,
71 dest_INIT = 5,
72 dest__reserved_2 = 6,
73 dest_ExtINT = 7
74 };
75
76 struct IO_APIC_route_entry {
77 __u32 vector : 8,
78 delivery_mode : 3, /* 000: FIXED
79 * 001: lowest prio
80 * 111: ExtINT
81 */
82 dest_mode : 1, /* 0: physical, 1: logical */
83 delivery_status : 1,
84 polarity : 1,
85 irr : 1,
86 trigger : 1, /* 0: edge, 1: level */
87 mask : 1, /* 0: enabled, 1: disabled */
88 __reserved_2 : 15;
89
90 #ifdef CONFIG_X86_32
91 union {
92 struct {
93 __u32 __reserved_1 : 24,
94 physical_dest : 4,
95 __reserved_2 : 4;
96 } physical;
97
98 struct {
99 __u32 __reserved_1 : 24,
100 logical_dest : 8;
101 } logical;
102 } dest;
103 #else
104 __u32 __reserved_3 : 24,
105 dest : 8;
106 #endif
107
108 } __attribute__ ((packed));
109
110 struct IR_IO_APIC_route_entry {
111 __u64 vector : 8,
112 zero : 3,
113 index2 : 1,
114 delivery_status : 1,
115 polarity : 1,
116 irr : 1,
117 trigger : 1,
118 mask : 1,
119 reserved : 31,
120 format : 1,
121 index : 15;
122 } __attribute__ ((packed));
123
124 #ifdef CONFIG_X86_IO_APIC
125
126 /*
127 * # of IO-APICs and # of IRQ routing registers
128 */
129 extern int nr_ioapics;
130 extern int nr_ioapic_registers[MAX_IO_APICS];
131
132 /*
133 * MP-BIOS irq configuration table structures:
134 */
135
136 #define MP_MAX_IOAPIC_PIN 127
137
138 struct mp_config_ioapic {
139 unsigned long mp_apicaddr;
140 unsigned int mp_apicid;
141 unsigned char mp_type;
142 unsigned char mp_apicver;
143 unsigned char mp_flags;
144 };
145
146 struct mp_config_intsrc {
147 unsigned int mp_dstapic;
148 unsigned char mp_type;
149 unsigned char mp_irqtype;
150 unsigned short mp_irqflag;
151 unsigned char mp_srcbus;
152 unsigned char mp_srcbusirq;
153 unsigned char mp_dstirq;
154 };
155
156 /* I/O APIC entries */
157 extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
158
159 /* # of MP IRQ source entries */
160 extern int mp_irq_entries;
161
162 /* MP IRQ source entries */
163 extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
164
165 /* non-0 if default (table-less) MP configuration */
166 extern int mpc_default_type;
167
168 /* Older SiS APIC requires we rewrite the index register */
169 extern int sis_apic_bug;
170
171 /* 1 if "noapic" boot option passed */
172 extern int skip_ioapic_setup;
173
174 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
175 extern int timer_through_8259;
176
177 static inline void disable_ioapic_setup(void)
178 {
179 skip_ioapic_setup = 1;
180 }
181
182 /*
183 * If we use the IO-APIC for IRQ routing, disable automatic
184 * assignment of PCI IRQ's.
185 */
186 #define io_apic_assign_pci_irqs \
187 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
188
189 #ifdef CONFIG_ACPI
190 extern int io_apic_get_unique_id(int ioapic, int apic_id);
191 extern int io_apic_get_version(int ioapic);
192 extern int io_apic_get_redir_entries(int ioapic);
193 extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
194 int edge_level, int active_high_low);
195 #endif /* CONFIG_ACPI */
196
197 extern int (*ioapic_renumber_irq)(int ioapic, int irq);
198 extern void ioapic_init_mappings(void);
199
200 #ifdef CONFIG_X86_64
201 extern int save_mask_IO_APIC_setup(void);
202 extern void restore_IO_APIC_setup(void);
203 extern void reinit_intr_remapped_IO_APIC(int);
204 #endif
205
206 #else /* !CONFIG_X86_IO_APIC */
207 #define io_apic_assign_pci_irqs 0
208 static const int timer_through_8259 = 0;
209 static inline void ioapic_init_mappings(void) { }
210 #endif
211
212 #endif /* ASM_X86__IO_APIC_H */
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