x86: make read_apic_id return final apicid
[deliverable/linux.git] / include / asm-x86 / mach-default / mach_apic.h
1 #ifndef __ASM_MACH_APIC_H
2 #define __ASM_MACH_APIC_H
3
4 #ifdef CONFIG_X86_LOCAL_APIC
5
6 #include <mach_apicdef.h>
7 #include <asm/smp.h>
8
9 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
10
11 static inline cpumask_t target_cpus(void)
12 {
13 #ifdef CONFIG_SMP
14 return cpu_online_map;
15 #else
16 return cpumask_of_cpu(0);
17 #endif
18 }
19
20 #define NO_BALANCE_IRQ (0)
21 #define esr_disable (0)
22
23 #ifdef CONFIG_X86_64
24 #include <asm/genapic.h>
25 #define INT_DELIVERY_MODE (genapic->int_delivery_mode)
26 #define INT_DEST_MODE (genapic->int_dest_mode)
27 #define TARGET_CPUS (genapic->target_cpus())
28 #define apic_id_registered (genapic->apic_id_registered)
29 #define init_apic_ldr (genapic->init_apic_ldr)
30 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31 #define phys_pkg_id (genapic->phys_pkg_id)
32 #define vector_allocation_domain (genapic->vector_allocation_domain)
33 #define read_apic_id (genapic->read_apic_id)
34 #define send_IPI_self (genapic->send_IPI_self)
35 extern void setup_apic_routing(void);
36 #else
37 #define INT_DELIVERY_MODE dest_LowestPrio
38 #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
39 #define TARGET_CPUS (target_cpus())
40 /*
41 * Set up the logical destination ID.
42 *
43 * Intel recommends to set DFR, LDR and TPR before enabling
44 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
45 * document number 292116). So here it goes...
46 */
47 static inline void init_apic_ldr(void)
48 {
49 unsigned long val;
50
51 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
53 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
54 apic_write_around(APIC_LDR, val);
55 }
56
57 static inline int apic_id_registered(void)
58 {
59 return physid_isset(read_apic_id(), phys_cpu_present_map);
60 }
61
62 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
63 {
64 return cpus_addr(cpumask)[0];
65 }
66
67 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
68 {
69 return cpuid_apic >> index_msb;
70 }
71
72 static inline void setup_apic_routing(void)
73 {
74 #ifdef CONFIG_X86_IO_APIC
75 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
76 "Flat", nr_ioapics);
77 #endif
78 }
79
80 static inline int apicid_to_node(int logical_apicid)
81 {
82 #ifdef CONFIG_SMP
83 return apicid_2_node[hard_smp_processor_id()];
84 #else
85 return 0;
86 #endif
87 }
88 #endif
89
90 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
91 {
92 return physid_isset(apicid, bitmap);
93 }
94
95 static inline unsigned long check_apicid_present(int bit)
96 {
97 return physid_isset(bit, phys_cpu_present_map);
98 }
99
100 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
101 {
102 return phys_map;
103 }
104
105 static inline int multi_timer_check(int apic, int irq)
106 {
107 return 0;
108 }
109
110 /* Mapping from cpu number to logical apicid */
111 static inline int cpu_to_logical_apicid(int cpu)
112 {
113 return 1 << cpu;
114 }
115
116 static inline int cpu_present_to_apicid(int mps_cpu)
117 {
118 if (mps_cpu < NR_CPUS && cpu_present(mps_cpu))
119 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
120 else
121 return BAD_APICID;
122 }
123
124 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
125 {
126 return physid_mask_of_physid(phys_apicid);
127 }
128
129 static inline void setup_portio_remap(void)
130 {
131 }
132
133 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
134 {
135 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
136 }
137
138 static inline void enable_apic_mode(void)
139 {
140 }
141
142 #endif /* CONFIG_X86_LOCAL_APIC */
143 #endif /* __ASM_MACH_APIC_H */
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