1 #ifndef _AM_X86_MPSPEC_H
2 #define _AM_X86_MPSPEC_H
4 #include <linux/init.h>
6 #include <asm/mpspec_def.h>
9 #include <mach_mpspec.h>
11 extern unsigned int def_to_bigsmp
;
12 extern int apic_version
[MAX_APICS
];
13 extern u8 apicid_2_node
[];
16 #ifdef CONFIG_X86_NUMAQ
17 extern int mp_bus_id_to_node
[MAX_MP_BUSSES
];
18 extern int mp_bus_id_to_local
[MAX_MP_BUSSES
];
19 extern int quad_local_to_mp_bus_id
[NR_CPUS
/4][4];
22 #define MAX_APICID 256
26 #define MAX_MP_BUSSES 256
27 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
28 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
32 extern void early_find_smp_config(void);
33 extern void early_get_smp_config(void);
35 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
36 extern int mp_bus_id_to_type
[MAX_MP_BUSSES
];
39 extern DECLARE_BITMAP(mp_bus_not_pci
, MAX_MP_BUSSES
);
41 extern unsigned int boot_cpu_physical_apicid
;
42 extern unsigned int max_physical_apicid
;
43 extern int smp_found_config
;
44 extern int mpc_default_type
;
45 extern unsigned long mp_lapic_addr
;
47 extern void find_smp_config(void);
48 extern void get_smp_config(void);
49 extern void early_reserve_e820_mpc_new(void);
51 void __cpuinit
generic_processor_info(int apicid
, int version
);
53 extern void mp_register_ioapic(int id
, u32 address
, u32 gsi_base
);
54 extern void mp_override_legacy_irq(u8 bus_irq
, u8 polarity
, u8 trigger
,
56 extern void mp_config_acpi_legacy_irqs(void);
57 extern int mp_register_gsi(u32 gsi
, int edge_level
, int active_high_low
);
58 extern void MP_intsrc_info(struct mpc_config_intsrc
*m
);
59 #ifdef CONFIG_X86_IO_APIC
60 extern int mp_config_acpi_gsi(unsigned char number
, unsigned int devfn
, u8 pin
,
61 u32 gsi
, int triggering
, int polarity
);
64 mp_config_acpi_gsi(unsigned char number
, unsigned int devfn
, u8 pin
,
65 u32 gsi
, int triggering
, int polarity
)
70 #endif /* CONFIG_ACPI */
72 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
75 unsigned long mask
[PHYSID_ARRAY_SIZE
];
78 typedef struct physid_mask physid_mask_t
;
80 #define physid_set(physid, map) set_bit(physid, (map).mask)
81 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
82 #define physid_isset(physid, map) test_bit(physid, (map).mask)
83 #define physid_test_and_set(physid, map) \
84 test_and_set_bit(physid, (map).mask)
86 #define physids_and(dst, src1, src2) \
87 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
89 #define physids_or(dst, src1, src2) \
90 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
92 #define physids_clear(map) \
93 bitmap_zero((map).mask, MAX_APICS)
95 #define physids_complement(dst, src) \
96 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
98 #define physids_empty(map) \
99 bitmap_empty((map).mask, MAX_APICS)
101 #define physids_equal(map1, map2) \
102 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
104 #define physids_weight(map) \
105 bitmap_weight((map).mask, MAX_APICS)
107 #define physids_shift_right(d, s, n) \
108 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
110 #define physids_shift_left(d, s, n) \
111 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
113 #define physids_coerce(map) ((map).mask[0])
115 #define physids_promote(physids) \
117 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
118 __physid_mask.mask[0] = physids; \
122 #define physid_mask_of_physid(physid) \
124 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
125 physid_set(physid, __physid_mask); \
129 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
130 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
132 extern physid_mask_t phys_cpu_present_map
;