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x86: add macro for privileged 64-bit operation
[deliverable/linux.git] / include / asm-x86 / paravirt.h
1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/page.h>
8 #include <asm/asm.h>
9
10 /* Bitmask of what can be clobbered: usually at least eax. */
11 #define CLBR_NONE 0x0
12 #define CLBR_EAX 0x1
13 #define CLBR_ECX 0x2
14 #define CLBR_EDX 0x4
15 #define CLBR_ANY 0x7
16
17 #ifndef __ASSEMBLY__
18 #include <linux/types.h>
19 #include <linux/cpumask.h>
20 #include <asm/kmap_types.h>
21 #include <asm/desc_defs.h>
22
23 struct page;
24 struct thread_struct;
25 struct desc_ptr;
26 struct tss_struct;
27 struct mm_struct;
28 struct desc_struct;
29
30 /* general info */
31 struct pv_info {
32 unsigned int kernel_rpl;
33 int shared_kernel_pmd;
34 int paravirt_enabled;
35 const char *name;
36 };
37
38 struct pv_init_ops {
39 /*
40 * Patch may replace one of the defined code sequences with
41 * arbitrary code, subject to the same register constraints.
42 * This generally means the code is not free to clobber any
43 * registers other than EAX. The patch function should return
44 * the number of bytes of code generated, as we nop pad the
45 * rest in generic code.
46 */
47 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
48 unsigned long addr, unsigned len);
49
50 /* Basic arch-specific setup */
51 void (*arch_setup)(void);
52 char *(*memory_setup)(void);
53 void (*post_allocator_init)(void);
54
55 /* Print a banner to identify the environment */
56 void (*banner)(void);
57 };
58
59
60 struct pv_lazy_ops {
61 /* Set deferred update mode, used for batching operations. */
62 void (*enter)(void);
63 void (*leave)(void);
64 };
65
66 struct pv_time_ops {
67 void (*time_init)(void);
68
69 /* Set and set time of day */
70 unsigned long (*get_wallclock)(void);
71 int (*set_wallclock)(unsigned long);
72
73 unsigned long long (*sched_clock)(void);
74 unsigned long (*get_cpu_khz)(void);
75 };
76
77 struct pv_cpu_ops {
78 /* hooks for various privileged instructions */
79 unsigned long (*get_debugreg)(int regno);
80 void (*set_debugreg)(int regno, unsigned long value);
81
82 void (*clts)(void);
83
84 unsigned long (*read_cr0)(void);
85 void (*write_cr0)(unsigned long);
86
87 unsigned long (*read_cr4_safe)(void);
88 unsigned long (*read_cr4)(void);
89 void (*write_cr4)(unsigned long);
90
91 /* Segment descriptor handling */
92 void (*load_tr_desc)(void);
93 void (*load_gdt)(const struct desc_ptr *);
94 void (*load_idt)(const struct desc_ptr *);
95 void (*store_gdt)(struct desc_ptr *);
96 void (*store_idt)(struct desc_ptr *);
97 void (*set_ldt)(const void *desc, unsigned entries);
98 unsigned long (*store_tr)(void);
99 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
100 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
101 const void *desc);
102 void (*write_gdt_entry)(struct desc_struct *,
103 int entrynum, const void *desc, int size);
104 void (*write_idt_entry)(gate_desc *,
105 int entrynum, const gate_desc *gate);
106 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
107
108 void (*set_iopl_mask)(unsigned mask);
109
110 void (*wbinvd)(void);
111 void (*io_delay)(void);
112
113 /* cpuid emulation, mostly so that caps bits can be disabled */
114 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
115 unsigned int *ecx, unsigned int *edx);
116
117 /* MSR, PMC and TSR operations.
118 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
119 u64 (*read_msr)(unsigned int msr, int *err);
120 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
121
122 u64 (*read_tsc)(void);
123 u64 (*read_pmc)(int counter);
124 unsigned long long (*read_tscp)(unsigned int *aux);
125
126 /* These two are jmp to, not actually called. */
127 void (*irq_enable_syscall_ret)(void);
128 void (*iret)(void);
129
130 struct pv_lazy_ops lazy_mode;
131 };
132
133 struct pv_irq_ops {
134 void (*init_IRQ)(void);
135
136 /*
137 * Get/set interrupt state. save_fl and restore_fl are only
138 * expected to use X86_EFLAGS_IF; all other bits
139 * returned from save_fl are undefined, and may be ignored by
140 * restore_fl.
141 */
142 unsigned long (*save_fl)(void);
143 void (*restore_fl)(unsigned long);
144 void (*irq_disable)(void);
145 void (*irq_enable)(void);
146 void (*safe_halt)(void);
147 void (*halt)(void);
148 };
149
150 struct pv_apic_ops {
151 #ifdef CONFIG_X86_LOCAL_APIC
152 /*
153 * Direct APIC operations, principally for VMI. Ideally
154 * these shouldn't be in this interface.
155 */
156 void (*apic_write)(unsigned long reg, u32 v);
157 void (*apic_write_atomic)(unsigned long reg, u32 v);
158 u32 (*apic_read)(unsigned long reg);
159 void (*setup_boot_clock)(void);
160 void (*setup_secondary_clock)(void);
161
162 void (*startup_ipi_hook)(int phys_apicid,
163 unsigned long start_eip,
164 unsigned long start_esp);
165 #endif
166 };
167
168 struct pv_mmu_ops {
169 /*
170 * Called before/after init_mm pagetable setup. setup_start
171 * may reset %cr3, and may pre-install parts of the pagetable;
172 * pagetable setup is expected to preserve any existing
173 * mapping.
174 */
175 void (*pagetable_setup_start)(pgd_t *pgd_base);
176 void (*pagetable_setup_done)(pgd_t *pgd_base);
177
178 unsigned long (*read_cr2)(void);
179 void (*write_cr2)(unsigned long);
180
181 unsigned long (*read_cr3)(void);
182 void (*write_cr3)(unsigned long);
183
184 /*
185 * Hooks for intercepting the creation/use/destruction of an
186 * mm_struct.
187 */
188 void (*activate_mm)(struct mm_struct *prev,
189 struct mm_struct *next);
190 void (*dup_mmap)(struct mm_struct *oldmm,
191 struct mm_struct *mm);
192 void (*exit_mmap)(struct mm_struct *mm);
193
194
195 /* TLB operations */
196 void (*flush_tlb_user)(void);
197 void (*flush_tlb_kernel)(void);
198 void (*flush_tlb_single)(unsigned long addr);
199 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
200 unsigned long va);
201
202 /* Hooks for allocating/releasing pagetable pages */
203 void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
204 void (*alloc_pd)(u32 pfn);
205 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
206 void (*release_pt)(u32 pfn);
207 void (*release_pd)(u32 pfn);
208
209 /* Pagetable manipulation functions */
210 void (*set_pte)(pte_t *ptep, pte_t pteval);
211 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
212 pte_t *ptep, pte_t pteval);
213 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
214 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
215 void (*pte_update_defer)(struct mm_struct *mm,
216 unsigned long addr, pte_t *ptep);
217
218 #ifdef CONFIG_X86_PAE
219 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
220 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
221 pte_t *ptep, pte_t pte);
222 void (*set_pud)(pud_t *pudp, pud_t pudval);
223 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
224 void (*pmd_clear)(pmd_t *pmdp);
225
226 unsigned long long (*pte_val)(pte_t);
227 unsigned long long (*pmd_val)(pmd_t);
228 unsigned long long (*pgd_val)(pgd_t);
229
230 pte_t (*make_pte)(unsigned long long pte);
231 pmd_t (*make_pmd)(unsigned long long pmd);
232 pgd_t (*make_pgd)(unsigned long long pgd);
233 #else
234 unsigned long (*pte_val)(pte_t);
235 unsigned long (*pgd_val)(pgd_t);
236
237 pte_t (*make_pte)(unsigned long pte);
238 pgd_t (*make_pgd)(unsigned long pgd);
239 #endif
240
241 #ifdef CONFIG_HIGHPTE
242 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
243 #endif
244
245 struct pv_lazy_ops lazy_mode;
246 };
247
248 /* This contains all the paravirt structures: we get a convenient
249 * number for each function using the offset which we use to indicate
250 * what to patch. */
251 struct paravirt_patch_template
252 {
253 struct pv_init_ops pv_init_ops;
254 struct pv_time_ops pv_time_ops;
255 struct pv_cpu_ops pv_cpu_ops;
256 struct pv_irq_ops pv_irq_ops;
257 struct pv_apic_ops pv_apic_ops;
258 struct pv_mmu_ops pv_mmu_ops;
259 };
260
261 extern struct pv_info pv_info;
262 extern struct pv_init_ops pv_init_ops;
263 extern struct pv_time_ops pv_time_ops;
264 extern struct pv_cpu_ops pv_cpu_ops;
265 extern struct pv_irq_ops pv_irq_ops;
266 extern struct pv_apic_ops pv_apic_ops;
267 extern struct pv_mmu_ops pv_mmu_ops;
268
269 #define PARAVIRT_PATCH(x) \
270 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
271
272 #define paravirt_type(op) \
273 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
274 [paravirt_opptr] "m" (op)
275 #define paravirt_clobber(clobber) \
276 [paravirt_clobber] "i" (clobber)
277
278 /*
279 * Generate some code, and mark it as patchable by the
280 * apply_paravirt() alternate instruction patcher.
281 */
282 #define _paravirt_alt(insn_string, type, clobber) \
283 "771:\n\t" insn_string "\n" "772:\n" \
284 ".pushsection .parainstructions,\"a\"\n" \
285 _ASM_ALIGN "\n" \
286 _ASM_PTR " 771b\n" \
287 " .byte " type "\n" \
288 " .byte 772b-771b\n" \
289 " .short " clobber "\n" \
290 ".popsection\n"
291
292 /* Generate patchable code, with the default asm parameters. */
293 #define paravirt_alt(insn_string) \
294 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
295
296 unsigned paravirt_patch_nop(void);
297 unsigned paravirt_patch_ignore(unsigned len);
298 unsigned paravirt_patch_call(void *insnbuf,
299 const void *target, u16 tgt_clobbers,
300 unsigned long addr, u16 site_clobbers,
301 unsigned len);
302 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
303 unsigned long addr, unsigned len);
304 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
305 unsigned long addr, unsigned len);
306
307 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
308 const char *start, const char *end);
309
310 int paravirt_disable_iospace(void);
311
312 /*
313 * This generates an indirect call based on the operation type number.
314 * The type number, computed in PARAVIRT_PATCH, is derived from the
315 * offset into the paravirt_patch_template structure, and can therefore be
316 * freely converted back into a structure offset.
317 */
318 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
319
320 /*
321 * These macros are intended to wrap calls through one of the paravirt
322 * ops structs, so that they can be later identified and patched at
323 * runtime.
324 *
325 * Normally, a call to a pv_op function is a simple indirect call:
326 * (pv_op_struct.operations)(args...).
327 *
328 * Unfortunately, this is a relatively slow operation for modern CPUs,
329 * because it cannot necessarily determine what the destination
330 * address is. In this case, the address is a runtime constant, so at
331 * the very least we can patch the call to e a simple direct call, or
332 * ideally, patch an inline implementation into the callsite. (Direct
333 * calls are essentially free, because the call and return addresses
334 * are completely predictable.)
335 *
336 * For i386, these macros rely on the standard gcc "regparm(3)" calling
337 * convention, in which the first three arguments are placed in %eax,
338 * %edx, %ecx (in that order), and the remaining arguments are placed
339 * on the stack. All caller-save registers (eax,edx,ecx) are expected
340 * to be modified (either clobbered or used for return values).
341 * X86_64, on the other hand, already specifies a register-based calling
342 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
343 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
344 * special handling for dealing with 4 arguments, unlike i386.
345 * However, x86_64 also have to clobber all caller saved registers, which
346 * unfortunately, are quite a bit (r8 - r11)
347 *
348 * The call instruction itself is marked by placing its start address
349 * and size into the .parainstructions section, so that
350 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
351 * appropriate patching under the control of the backend pv_init_ops
352 * implementation.
353 *
354 * Unfortunately there's no way to get gcc to generate the args setup
355 * for the call, and then allow the call itself to be generated by an
356 * inline asm. Because of this, we must do the complete arg setup and
357 * return value handling from within these macros. This is fairly
358 * cumbersome.
359 *
360 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
361 * It could be extended to more arguments, but there would be little
362 * to be gained from that. For each number of arguments, there are
363 * the two VCALL and CALL variants for void and non-void functions.
364 *
365 * When there is a return value, the invoker of the macro must specify
366 * the return type. The macro then uses sizeof() on that type to
367 * determine whether its a 32 or 64 bit value, and places the return
368 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
369 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
370 * the return value size.
371 *
372 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
373 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
374 * in low,high order
375 *
376 * Small structures are passed and returned in registers. The macro
377 * calling convention can't directly deal with this, so the wrapper
378 * functions must do this.
379 *
380 * These PVOP_* macros are only defined within this header. This
381 * means that all uses must be wrapped in inline functions. This also
382 * makes sure the incoming and outgoing types are always correct.
383 */
384 #ifdef CONFIG_X86_32
385 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
386 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
387 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
388 "=c" (__ecx)
389 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
390 #define EXTRA_CLOBBERS
391 #define VEXTRA_CLOBBERS
392 #else
393 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
394 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
395 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
396 "=S" (__esi), "=d" (__edx), \
397 "=c" (__ecx)
398
399 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
400
401 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
402 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
403 #endif
404
405 #define __PVOP_CALL(rettype, op, pre, post, ...) \
406 ({ \
407 rettype __ret; \
408 PVOP_CALL_ARGS; \
409 /* This is 32-bit specific, but is okay in 64-bit */ \
410 /* since this condition will never hold */ \
411 if (sizeof(rettype) > sizeof(unsigned long)) { \
412 asm volatile(pre \
413 paravirt_alt(PARAVIRT_CALL) \
414 post \
415 : PVOP_CALL_CLOBBERS \
416 : paravirt_type(op), \
417 paravirt_clobber(CLBR_ANY), \
418 ##__VA_ARGS__ \
419 : "memory", "cc" EXTRA_CLOBBERS); \
420 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
421 } else { \
422 asm volatile(pre \
423 paravirt_alt(PARAVIRT_CALL) \
424 post \
425 : PVOP_CALL_CLOBBERS \
426 : paravirt_type(op), \
427 paravirt_clobber(CLBR_ANY), \
428 ##__VA_ARGS__ \
429 : "memory", "cc" EXTRA_CLOBBERS); \
430 __ret = (rettype)__eax; \
431 } \
432 __ret; \
433 })
434 #define __PVOP_VCALL(op, pre, post, ...) \
435 ({ \
436 PVOP_VCALL_ARGS; \
437 asm volatile(pre \
438 paravirt_alt(PARAVIRT_CALL) \
439 post \
440 : PVOP_VCALL_CLOBBERS \
441 : paravirt_type(op), \
442 paravirt_clobber(CLBR_ANY), \
443 ##__VA_ARGS__ \
444 : "memory", "cc" VEXTRA_CLOBBERS); \
445 })
446
447 #define PVOP_CALL0(rettype, op) \
448 __PVOP_CALL(rettype, op, "", "")
449 #define PVOP_VCALL0(op) \
450 __PVOP_VCALL(op, "", "")
451
452 #define PVOP_CALL1(rettype, op, arg1) \
453 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
454 #define PVOP_VCALL1(op, arg1) \
455 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
456
457 #define PVOP_CALL2(rettype, op, arg1, arg2) \
458 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
459 "1" ((unsigned long)(arg2)))
460 #define PVOP_VCALL2(op, arg1, arg2) \
461 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
462 "1" ((unsigned long)(arg2)))
463
464 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
465 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
466 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
467 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
468 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
469 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
470
471 /* This is the only difference in x86_64. We can make it much simpler */
472 #ifdef CONFIG_X86_32
473 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
474 __PVOP_CALL(rettype, op, \
475 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
476 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
477 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
478 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
479 __PVOP_VCALL(op, \
480 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
481 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
482 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
483 #else
484 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
485 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
486 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
487 "3"((unsigned long)(arg4)))
488 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
489 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
490 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
491 "3"((unsigned long)(arg4)))
492 #endif
493
494 static inline int paravirt_enabled(void)
495 {
496 return pv_info.paravirt_enabled;
497 }
498
499 static inline void load_sp0(struct tss_struct *tss,
500 struct thread_struct *thread)
501 {
502 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
503 }
504
505 #define ARCH_SETUP pv_init_ops.arch_setup();
506 static inline unsigned long get_wallclock(void)
507 {
508 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
509 }
510
511 static inline int set_wallclock(unsigned long nowtime)
512 {
513 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
514 }
515
516 static inline void (*choose_time_init(void))(void)
517 {
518 return pv_time_ops.time_init;
519 }
520
521 /* The paravirtualized CPUID instruction. */
522 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
523 unsigned int *ecx, unsigned int *edx)
524 {
525 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
526 }
527
528 /*
529 * These special macros can be used to get or set a debugging register
530 */
531 static inline unsigned long paravirt_get_debugreg(int reg)
532 {
533 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
534 }
535 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
536 static inline void set_debugreg(unsigned long val, int reg)
537 {
538 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
539 }
540
541 static inline void clts(void)
542 {
543 PVOP_VCALL0(pv_cpu_ops.clts);
544 }
545
546 static inline unsigned long read_cr0(void)
547 {
548 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
549 }
550
551 static inline void write_cr0(unsigned long x)
552 {
553 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
554 }
555
556 static inline unsigned long read_cr2(void)
557 {
558 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
559 }
560
561 static inline void write_cr2(unsigned long x)
562 {
563 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
564 }
565
566 static inline unsigned long read_cr3(void)
567 {
568 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
569 }
570
571 static inline void write_cr3(unsigned long x)
572 {
573 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
574 }
575
576 static inline unsigned long read_cr4(void)
577 {
578 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
579 }
580 static inline unsigned long read_cr4_safe(void)
581 {
582 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
583 }
584
585 static inline void write_cr4(unsigned long x)
586 {
587 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
588 }
589
590 static inline void raw_safe_halt(void)
591 {
592 PVOP_VCALL0(pv_irq_ops.safe_halt);
593 }
594
595 static inline void halt(void)
596 {
597 PVOP_VCALL0(pv_irq_ops.safe_halt);
598 }
599
600 static inline void wbinvd(void)
601 {
602 PVOP_VCALL0(pv_cpu_ops.wbinvd);
603 }
604
605 #define get_kernel_rpl() (pv_info.kernel_rpl)
606
607 static inline u64 paravirt_read_msr(unsigned msr, int *err)
608 {
609 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
610 }
611 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
612 {
613 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
614 }
615
616 /* These should all do BUG_ON(_err), but our headers are too tangled. */
617 #define rdmsr(msr,val1,val2) do { \
618 int _err; \
619 u64 _l = paravirt_read_msr(msr, &_err); \
620 val1 = (u32)_l; \
621 val2 = _l >> 32; \
622 } while(0)
623
624 #define wrmsr(msr,val1,val2) do { \
625 paravirt_write_msr(msr, val1, val2); \
626 } while(0)
627
628 #define rdmsrl(msr,val) do { \
629 int _err; \
630 val = paravirt_read_msr(msr, &_err); \
631 } while(0)
632
633 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
634 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
635
636 /* rdmsr with exception handling */
637 #define rdmsr_safe(msr,a,b) ({ \
638 int _err; \
639 u64 _l = paravirt_read_msr(msr, &_err); \
640 (*a) = (u32)_l; \
641 (*b) = _l >> 32; \
642 _err; })
643
644
645 static inline u64 paravirt_read_tsc(void)
646 {
647 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
648 }
649
650 #define rdtscl(low) do { \
651 u64 _l = paravirt_read_tsc(); \
652 low = (int)_l; \
653 } while(0)
654
655 #define rdtscll(val) (val = paravirt_read_tsc())
656
657 static inline unsigned long long paravirt_sched_clock(void)
658 {
659 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
660 }
661 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
662
663 static inline unsigned long long paravirt_read_pmc(int counter)
664 {
665 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
666 }
667
668 #define rdpmc(counter,low,high) do { \
669 u64 _l = paravirt_read_pmc(counter); \
670 low = (u32)_l; \
671 high = _l >> 32; \
672 } while(0)
673
674 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
675 {
676 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
677 }
678
679 #define rdtscp(low, high, aux) \
680 do { \
681 int __aux; \
682 unsigned long __val = paravirt_rdtscp(&__aux); \
683 (low) = (u32)__val; \
684 (high) = (u32)(__val >> 32); \
685 (aux) = __aux; \
686 } while (0)
687
688 #define rdtscpll(val, aux) \
689 do { \
690 unsigned long __aux; \
691 val = paravirt_rdtscp(&__aux); \
692 (aux) = __aux; \
693 } while (0)
694
695 static inline void load_TR_desc(void)
696 {
697 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
698 }
699 static inline void load_gdt(const struct desc_ptr *dtr)
700 {
701 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
702 }
703 static inline void load_idt(const struct desc_ptr *dtr)
704 {
705 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
706 }
707 static inline void set_ldt(const void *addr, unsigned entries)
708 {
709 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
710 }
711 static inline void store_gdt(struct desc_ptr *dtr)
712 {
713 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
714 }
715 static inline void store_idt(struct desc_ptr *dtr)
716 {
717 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
718 }
719 static inline unsigned long paravirt_store_tr(void)
720 {
721 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
722 }
723 #define store_tr(tr) ((tr) = paravirt_store_tr())
724 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
725 {
726 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
727 }
728
729 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
730 const void *desc)
731 {
732 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
733 }
734
735 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
736 void *desc, int type)
737 {
738 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
739 }
740
741 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
742 {
743 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
744 }
745 static inline void set_iopl_mask(unsigned mask)
746 {
747 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
748 }
749
750 /* The paravirtualized I/O functions */
751 static inline void slow_down_io(void) {
752 pv_cpu_ops.io_delay();
753 #ifdef REALLY_SLOW_IO
754 pv_cpu_ops.io_delay();
755 pv_cpu_ops.io_delay();
756 pv_cpu_ops.io_delay();
757 #endif
758 }
759
760 #ifdef CONFIG_X86_LOCAL_APIC
761 /*
762 * Basic functions accessing APICs.
763 */
764 static inline void apic_write(unsigned long reg, u32 v)
765 {
766 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
767 }
768
769 static inline void apic_write_atomic(unsigned long reg, u32 v)
770 {
771 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
772 }
773
774 static inline u32 apic_read(unsigned long reg)
775 {
776 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
777 }
778
779 static inline void setup_boot_clock(void)
780 {
781 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
782 }
783
784 static inline void setup_secondary_clock(void)
785 {
786 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
787 }
788 #endif
789
790 static inline void paravirt_post_allocator_init(void)
791 {
792 if (pv_init_ops.post_allocator_init)
793 (*pv_init_ops.post_allocator_init)();
794 }
795
796 static inline void paravirt_pagetable_setup_start(pgd_t *base)
797 {
798 (*pv_mmu_ops.pagetable_setup_start)(base);
799 }
800
801 static inline void paravirt_pagetable_setup_done(pgd_t *base)
802 {
803 (*pv_mmu_ops.pagetable_setup_done)(base);
804 }
805
806 #ifdef CONFIG_SMP
807 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
808 unsigned long start_esp)
809 {
810 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
811 phys_apicid, start_eip, start_esp);
812 }
813 #endif
814
815 static inline void paravirt_activate_mm(struct mm_struct *prev,
816 struct mm_struct *next)
817 {
818 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
819 }
820
821 static inline void arch_dup_mmap(struct mm_struct *oldmm,
822 struct mm_struct *mm)
823 {
824 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
825 }
826
827 static inline void arch_exit_mmap(struct mm_struct *mm)
828 {
829 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
830 }
831
832 static inline void __flush_tlb(void)
833 {
834 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
835 }
836 static inline void __flush_tlb_global(void)
837 {
838 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
839 }
840 static inline void __flush_tlb_single(unsigned long addr)
841 {
842 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
843 }
844
845 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
846 unsigned long va)
847 {
848 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
849 }
850
851 static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
852 {
853 PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn);
854 }
855 static inline void paravirt_release_pt(unsigned pfn)
856 {
857 PVOP_VCALL1(pv_mmu_ops.release_pt, pfn);
858 }
859
860 static inline void paravirt_alloc_pd(unsigned pfn)
861 {
862 PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn);
863 }
864
865 static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
866 unsigned start, unsigned count)
867 {
868 PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count);
869 }
870 static inline void paravirt_release_pd(unsigned pfn)
871 {
872 PVOP_VCALL1(pv_mmu_ops.release_pd, pfn);
873 }
874
875 #ifdef CONFIG_HIGHPTE
876 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
877 {
878 unsigned long ret;
879 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
880 return (void *)ret;
881 }
882 #endif
883
884 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
885 pte_t *ptep)
886 {
887 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
888 }
889
890 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
891 pte_t *ptep)
892 {
893 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
894 }
895
896 #ifdef CONFIG_X86_PAE
897 static inline pte_t __pte(unsigned long long val)
898 {
899 unsigned long long ret = PVOP_CALL2(unsigned long long,
900 pv_mmu_ops.make_pte,
901 val, val >> 32);
902 return (pte_t) { ret, ret >> 32 };
903 }
904
905 static inline pmd_t __pmd(unsigned long long val)
906 {
907 return (pmd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pmd,
908 val, val >> 32) };
909 }
910
911 static inline pgd_t __pgd(unsigned long long val)
912 {
913 return (pgd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pgd,
914 val, val >> 32) };
915 }
916
917 static inline unsigned long long pte_val(pte_t x)
918 {
919 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pte_val,
920 x.pte_low, x.pte_high);
921 }
922
923 static inline unsigned long long pmd_val(pmd_t x)
924 {
925 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pmd_val,
926 x.pmd, x.pmd >> 32);
927 }
928
929 static inline unsigned long long pgd_val(pgd_t x)
930 {
931 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pgd_val,
932 x.pgd, x.pgd >> 32);
933 }
934
935 static inline void set_pte(pte_t *ptep, pte_t pteval)
936 {
937 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high);
938 }
939
940 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
941 pte_t *ptep, pte_t pteval)
942 {
943 /* 5 arg words */
944 pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval);
945 }
946
947 static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
948 {
949 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
950 pteval.pte_low, pteval.pte_high);
951 }
952
953 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
954 pte_t *ptep, pte_t pte)
955 {
956 /* 5 arg words */
957 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
958 }
959
960 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
961 {
962 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp,
963 pmdval.pmd, pmdval.pmd >> 32);
964 }
965
966 static inline void set_pud(pud_t *pudp, pud_t pudval)
967 {
968 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
969 pudval.pgd.pgd, pudval.pgd.pgd >> 32);
970 }
971
972 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
973 {
974 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
975 }
976
977 static inline void pmd_clear(pmd_t *pmdp)
978 {
979 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
980 }
981
982 #else /* !CONFIG_X86_PAE */
983
984 static inline pte_t __pte(unsigned long val)
985 {
986 return (pte_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pte, val) };
987 }
988
989 static inline pgd_t __pgd(unsigned long val)
990 {
991 return (pgd_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pgd, val) };
992 }
993
994 static inline unsigned long pte_val(pte_t x)
995 {
996 return PVOP_CALL1(unsigned long, pv_mmu_ops.pte_val, x.pte_low);
997 }
998
999 static inline unsigned long pgd_val(pgd_t x)
1000 {
1001 return PVOP_CALL1(unsigned long, pv_mmu_ops.pgd_val, x.pgd);
1002 }
1003
1004 static inline void set_pte(pte_t *ptep, pte_t pteval)
1005 {
1006 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low);
1007 }
1008
1009 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1010 pte_t *ptep, pte_t pteval)
1011 {
1012 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low);
1013 }
1014
1015 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
1016 {
1017 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd);
1018 }
1019 #endif /* CONFIG_X86_PAE */
1020
1021 /* Lazy mode for batching updates / context switch */
1022 enum paravirt_lazy_mode {
1023 PARAVIRT_LAZY_NONE,
1024 PARAVIRT_LAZY_MMU,
1025 PARAVIRT_LAZY_CPU,
1026 };
1027
1028 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1029 void paravirt_enter_lazy_cpu(void);
1030 void paravirt_leave_lazy_cpu(void);
1031 void paravirt_enter_lazy_mmu(void);
1032 void paravirt_leave_lazy_mmu(void);
1033 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1034
1035 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1036 static inline void arch_enter_lazy_cpu_mode(void)
1037 {
1038 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1039 }
1040
1041 static inline void arch_leave_lazy_cpu_mode(void)
1042 {
1043 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1044 }
1045
1046 static inline void arch_flush_lazy_cpu_mode(void)
1047 {
1048 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1049 arch_leave_lazy_cpu_mode();
1050 arch_enter_lazy_cpu_mode();
1051 }
1052 }
1053
1054
1055 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1056 static inline void arch_enter_lazy_mmu_mode(void)
1057 {
1058 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1059 }
1060
1061 static inline void arch_leave_lazy_mmu_mode(void)
1062 {
1063 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1064 }
1065
1066 static inline void arch_flush_lazy_mmu_mode(void)
1067 {
1068 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1069 arch_leave_lazy_mmu_mode();
1070 arch_enter_lazy_mmu_mode();
1071 }
1072 }
1073
1074 void _paravirt_nop(void);
1075 #define paravirt_nop ((void *)_paravirt_nop)
1076
1077 /* These all sit in the .parainstructions section to tell us what to patch. */
1078 struct paravirt_patch_site {
1079 u8 *instr; /* original instructions */
1080 u8 instrtype; /* type of this instruction */
1081 u8 len; /* length of original instruction */
1082 u16 clobbers; /* what registers you may clobber */
1083 };
1084
1085 extern struct paravirt_patch_site __parainstructions[],
1086 __parainstructions_end[];
1087
1088 #ifdef CONFIG_X86_32
1089 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1090 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1091 #define PV_FLAGS_ARG "0"
1092 #define PV_EXTRA_CLOBBERS
1093 #define PV_VEXTRA_CLOBBERS
1094 #else
1095 /* We save some registers, but all of them, that's too much. We clobber all
1096 * caller saved registers but the argument parameter */
1097 #define PV_SAVE_REGS "pushq %%rdi;"
1098 #define PV_RESTORE_REGS "popq %%rdi;"
1099 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1100 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1101 #define PV_FLAGS_ARG "D"
1102 #endif
1103
1104 static inline unsigned long __raw_local_save_flags(void)
1105 {
1106 unsigned long f;
1107
1108 asm volatile(paravirt_alt(PV_SAVE_REGS
1109 PARAVIRT_CALL
1110 PV_RESTORE_REGS)
1111 : "=a"(f)
1112 : paravirt_type(pv_irq_ops.save_fl),
1113 paravirt_clobber(CLBR_EAX)
1114 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1115 return f;
1116 }
1117
1118 static inline void raw_local_irq_restore(unsigned long f)
1119 {
1120 asm volatile(paravirt_alt(PV_SAVE_REGS
1121 PARAVIRT_CALL
1122 PV_RESTORE_REGS)
1123 : "=a"(f)
1124 : PV_FLAGS_ARG(f),
1125 paravirt_type(pv_irq_ops.restore_fl),
1126 paravirt_clobber(CLBR_EAX)
1127 : "memory", "cc" PV_EXTRA_CLOBBERS);
1128 }
1129
1130 static inline void raw_local_irq_disable(void)
1131 {
1132 asm volatile(paravirt_alt(PV_SAVE_REGS
1133 PARAVIRT_CALL
1134 PV_RESTORE_REGS)
1135 :
1136 : paravirt_type(pv_irq_ops.irq_disable),
1137 paravirt_clobber(CLBR_EAX)
1138 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1139 }
1140
1141 static inline void raw_local_irq_enable(void)
1142 {
1143 asm volatile(paravirt_alt(PV_SAVE_REGS
1144 PARAVIRT_CALL
1145 PV_RESTORE_REGS)
1146 :
1147 : paravirt_type(pv_irq_ops.irq_enable),
1148 paravirt_clobber(CLBR_EAX)
1149 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1150 }
1151
1152 static inline unsigned long __raw_local_irq_save(void)
1153 {
1154 unsigned long f;
1155
1156 f = __raw_local_save_flags();
1157 raw_local_irq_disable();
1158 return f;
1159 }
1160
1161 /* Make sure as little as possible of this mess escapes. */
1162 #undef PARAVIRT_CALL
1163 #undef __PVOP_CALL
1164 #undef __PVOP_VCALL
1165 #undef PVOP_VCALL0
1166 #undef PVOP_CALL0
1167 #undef PVOP_VCALL1
1168 #undef PVOP_CALL1
1169 #undef PVOP_VCALL2
1170 #undef PVOP_CALL2
1171 #undef PVOP_VCALL3
1172 #undef PVOP_CALL3
1173 #undef PVOP_VCALL4
1174 #undef PVOP_CALL4
1175
1176 #else /* __ASSEMBLY__ */
1177
1178 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1179 771:; \
1180 ops; \
1181 772:; \
1182 .pushsection .parainstructions,"a"; \
1183 .align algn; \
1184 word 771b; \
1185 .byte ptype; \
1186 .byte 772b-771b; \
1187 .short clobbers; \
1188 .popsection
1189
1190
1191 #ifdef CONFIG_X86_64
1192 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1193 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1194 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1195 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1196 #else
1197 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1198 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1199 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1200 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1201 #endif
1202
1203 #define INTERRUPT_RETURN \
1204 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1205 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1206
1207 #define DISABLE_INTERRUPTS(clobbers) \
1208 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1209 PV_SAVE_REGS; \
1210 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1211 PV_RESTORE_REGS;) \
1212
1213 #define ENABLE_INTERRUPTS(clobbers) \
1214 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1215 PV_SAVE_REGS; \
1216 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1217 PV_RESTORE_REGS;)
1218
1219 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1220 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1221 CLBR_NONE, \
1222 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1223
1224
1225 #ifdef CONFIG_X86_32
1226 #define GET_CR0_INTO_EAX \
1227 push %ecx; push %edx; \
1228 call *pv_cpu_ops+PV_CPU_read_cr0; \
1229 pop %edx; pop %ecx
1230 #else
1231 #define GET_CR2_INTO_RCX \
1232 call *pv_mmu_ops+PV_MMU_read_cr2; \
1233 movq %rax, %rcx; \
1234 xorq %rax, %rax;
1235
1236 #endif
1237
1238 #endif /* __ASSEMBLY__ */
1239 #endif /* CONFIG_PARAVIRT */
1240 #endif /* __ASM_PARAVIRT_H */
Linux kernel - Deliverables
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