projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'linus' into x86/xen
[deliverable/linux.git] / include / asm-x86 / paravirt.h
1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/page.h>
8 #include <asm/asm.h>
9
10 /* Bitmask of what can be clobbered: usually at least eax. */
11 #define CLBR_NONE 0
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
15
16 #ifdef CONFIG_X86_64
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
25 #else
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
28 #endif /* X86_64 */
29
30 #ifndef __ASSEMBLY__
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
35
36 struct page;
37 struct thread_struct;
38 struct desc_ptr;
39 struct tss_struct;
40 struct mm_struct;
41 struct desc_struct;
42
43 /* general info */
44 struct pv_info {
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
47 int paravirt_enabled;
48 const char *name;
49 };
50
51 struct pv_init_ops {
52 /*
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
59 */
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
62
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
67
68 /* Print a banner to identify the environment */
69 void (*banner)(void);
70 };
71
72
73 struct pv_lazy_ops {
74 /* Set deferred update mode, used for batching operations. */
75 void (*enter)(void);
76 void (*leave)(void);
77 };
78
79 struct pv_time_ops {
80 void (*time_init)(void);
81
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
85
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
88 };
89
90 struct pv_cpu_ops {
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
94
95 void (*clts)(void);
96
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
99
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
103
104 #ifdef CONFIG_X86_64
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
107 #endif
108
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
118 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
119 const void *desc);
120 void (*write_gdt_entry)(struct desc_struct *,
121 int entrynum, const void *desc, int size);
122 void (*write_idt_entry)(gate_desc *,
123 int entrynum, const gate_desc *gate);
124 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
125
126 void (*set_iopl_mask)(unsigned mask);
127
128 void (*wbinvd)(void);
129 void (*io_delay)(void);
130
131 /* cpuid emulation, mostly so that caps bits can be disabled */
132 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
133 unsigned int *ecx, unsigned int *edx);
134
135 /* MSR, PMC and TSR operations.
136 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
137 u64 (*read_msr)(unsigned int msr, int *err);
138 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
139
140 u64 (*read_tsc)(void);
141 u64 (*read_pmc)(int counter);
142 unsigned long long (*read_tscp)(unsigned int *aux);
143
144 /* These two are jmp to, not actually called. */
145 void (*irq_enable_syscall_ret)(void);
146 void (*iret)(void);
147
148 void (*swapgs)(void);
149
150 struct pv_lazy_ops lazy_mode;
151 };
152
153 struct pv_irq_ops {
154 void (*init_IRQ)(void);
155
156 /*
157 * Get/set interrupt state. save_fl and restore_fl are only
158 * expected to use X86_EFLAGS_IF; all other bits
159 * returned from save_fl are undefined, and may be ignored by
160 * restore_fl.
161 */
162 unsigned long (*save_fl)(void);
163 void (*restore_fl)(unsigned long);
164 void (*irq_disable)(void);
165 void (*irq_enable)(void);
166 void (*safe_halt)(void);
167 void (*halt)(void);
168 };
169
170 struct pv_apic_ops {
171 #ifdef CONFIG_X86_LOCAL_APIC
172 /*
173 * Direct APIC operations, principally for VMI. Ideally
174 * these shouldn't be in this interface.
175 */
176 void (*apic_write)(unsigned long reg, u32 v);
177 void (*apic_write_atomic)(unsigned long reg, u32 v);
178 u32 (*apic_read)(unsigned long reg);
179 void (*setup_boot_clock)(void);
180 void (*setup_secondary_clock)(void);
181
182 void (*startup_ipi_hook)(int phys_apicid,
183 unsigned long start_eip,
184 unsigned long start_esp);
185 #endif
186 };
187
188 struct pv_mmu_ops {
189 /*
190 * Called before/after init_mm pagetable setup. setup_start
191 * may reset %cr3, and may pre-install parts of the pagetable;
192 * pagetable setup is expected to preserve any existing
193 * mapping.
194 */
195 void (*pagetable_setup_start)(pgd_t *pgd_base);
196 void (*pagetable_setup_done)(pgd_t *pgd_base);
197
198 unsigned long (*read_cr2)(void);
199 void (*write_cr2)(unsigned long);
200
201 unsigned long (*read_cr3)(void);
202 void (*write_cr3)(unsigned long);
203
204 /*
205 * Hooks for intercepting the creation/use/destruction of an
206 * mm_struct.
207 */
208 void (*activate_mm)(struct mm_struct *prev,
209 struct mm_struct *next);
210 void (*dup_mmap)(struct mm_struct *oldmm,
211 struct mm_struct *mm);
212 void (*exit_mmap)(struct mm_struct *mm);
213
214
215 /* TLB operations */
216 void (*flush_tlb_user)(void);
217 void (*flush_tlb_kernel)(void);
218 void (*flush_tlb_single)(unsigned long addr);
219 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
220 unsigned long va);
221
222 /* Hooks for allocating/releasing pagetable pages */
223 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
224 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
225 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
226 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
227 void (*release_pte)(u32 pfn);
228 void (*release_pmd)(u32 pfn);
229 void (*release_pud)(u32 pfn);
230
231 /* Pagetable manipulation functions */
232 void (*set_pte)(pte_t *ptep, pte_t pteval);
233 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
234 pte_t *ptep, pte_t pteval);
235 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
236 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
237 pte_t *ptep);
238 void (*pte_update_defer)(struct mm_struct *mm,
239 unsigned long addr, pte_t *ptep);
240
241 pteval_t (*pte_val)(pte_t);
242 pteval_t (*pte_flags)(pte_t);
243 pte_t (*make_pte)(pteval_t pte);
244
245 pgdval_t (*pgd_val)(pgd_t);
246 pgd_t (*make_pgd)(pgdval_t pgd);
247
248 #if PAGETABLE_LEVELS >= 3
249 #ifdef CONFIG_X86_PAE
250 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
251 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
252 pte_t *ptep, pte_t pte);
253 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
254 pte_t *ptep);
255 void (*pmd_clear)(pmd_t *pmdp);
256
257 #endif /* CONFIG_X86_PAE */
258
259 void (*set_pud)(pud_t *pudp, pud_t pudval);
260
261 pmdval_t (*pmd_val)(pmd_t);
262 pmd_t (*make_pmd)(pmdval_t pmd);
263
264 #if PAGETABLE_LEVELS == 4
265 pudval_t (*pud_val)(pud_t);
266 pud_t (*make_pud)(pudval_t pud);
267
268 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
269 #endif /* PAGETABLE_LEVELS == 4 */
270 #endif /* PAGETABLE_LEVELS >= 3 */
271
272 #ifdef CONFIG_HIGHPTE
273 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
274 #endif
275
276 struct pv_lazy_ops lazy_mode;
277 };
278
279 /* This contains all the paravirt structures: we get a convenient
280 * number for each function using the offset which we use to indicate
281 * what to patch. */
282 struct paravirt_patch_template {
283 struct pv_init_ops pv_init_ops;
284 struct pv_time_ops pv_time_ops;
285 struct pv_cpu_ops pv_cpu_ops;
286 struct pv_irq_ops pv_irq_ops;
287 struct pv_apic_ops pv_apic_ops;
288 struct pv_mmu_ops pv_mmu_ops;
289 };
290
291 extern struct pv_info pv_info;
292 extern struct pv_init_ops pv_init_ops;
293 extern struct pv_time_ops pv_time_ops;
294 extern struct pv_cpu_ops pv_cpu_ops;
295 extern struct pv_irq_ops pv_irq_ops;
296 extern struct pv_apic_ops pv_apic_ops;
297 extern struct pv_mmu_ops pv_mmu_ops;
298
299 #define PARAVIRT_PATCH(x) \
300 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
301
302 #define paravirt_type(op) \
303 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
304 [paravirt_opptr] "m" (op)
305 #define paravirt_clobber(clobber) \
306 [paravirt_clobber] "i" (clobber)
307
308 /*
309 * Generate some code, and mark it as patchable by the
310 * apply_paravirt() alternate instruction patcher.
311 */
312 #define _paravirt_alt(insn_string, type, clobber) \
313 "771:\n\t" insn_string "\n" "772:\n" \
314 ".pushsection .parainstructions,\"a\"\n" \
315 _ASM_ALIGN "\n" \
316 _ASM_PTR " 771b\n" \
317 " .byte " type "\n" \
318 " .byte 772b-771b\n" \
319 " .short " clobber "\n" \
320 ".popsection\n"
321
322 /* Generate patchable code, with the default asm parameters. */
323 #define paravirt_alt(insn_string) \
324 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
325
326 /* Simple instruction patching code. */
327 #define DEF_NATIVE(ops, name, code) \
328 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
329 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
330
331 unsigned paravirt_patch_nop(void);
332 unsigned paravirt_patch_ignore(unsigned len);
333 unsigned paravirt_patch_call(void *insnbuf,
334 const void *target, u16 tgt_clobbers,
335 unsigned long addr, u16 site_clobbers,
336 unsigned len);
337 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
338 unsigned long addr, unsigned len);
339 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
340 unsigned long addr, unsigned len);
341
342 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
343 const char *start, const char *end);
344
345 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
346 unsigned long addr, unsigned len);
347
348 int paravirt_disable_iospace(void);
349
350 /*
351 * This generates an indirect call based on the operation type number.
352 * The type number, computed in PARAVIRT_PATCH, is derived from the
353 * offset into the paravirt_patch_template structure, and can therefore be
354 * freely converted back into a structure offset.
355 */
356 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
357
358 /*
359 * These macros are intended to wrap calls through one of the paravirt
360 * ops structs, so that they can be later identified and patched at
361 * runtime.
362 *
363 * Normally, a call to a pv_op function is a simple indirect call:
364 * (pv_op_struct.operations)(args...).
365 *
366 * Unfortunately, this is a relatively slow operation for modern CPUs,
367 * because it cannot necessarily determine what the destination
368 * address is. In this case, the address is a runtime constant, so at
369 * the very least we can patch the call to e a simple direct call, or
370 * ideally, patch an inline implementation into the callsite. (Direct
371 * calls are essentially free, because the call and return addresses
372 * are completely predictable.)
373 *
374 * For i386, these macros rely on the standard gcc "regparm(3)" calling
375 * convention, in which the first three arguments are placed in %eax,
376 * %edx, %ecx (in that order), and the remaining arguments are placed
377 * on the stack. All caller-save registers (eax,edx,ecx) are expected
378 * to be modified (either clobbered or used for return values).
379 * X86_64, on the other hand, already specifies a register-based calling
380 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
381 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
382 * special handling for dealing with 4 arguments, unlike i386.
383 * However, x86_64 also have to clobber all caller saved registers, which
384 * unfortunately, are quite a bit (r8 - r11)
385 *
386 * The call instruction itself is marked by placing its start address
387 * and size into the .parainstructions section, so that
388 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
389 * appropriate patching under the control of the backend pv_init_ops
390 * implementation.
391 *
392 * Unfortunately there's no way to get gcc to generate the args setup
393 * for the call, and then allow the call itself to be generated by an
394 * inline asm. Because of this, we must do the complete arg setup and
395 * return value handling from within these macros. This is fairly
396 * cumbersome.
397 *
398 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
399 * It could be extended to more arguments, but there would be little
400 * to be gained from that. For each number of arguments, there are
401 * the two VCALL and CALL variants for void and non-void functions.
402 *
403 * When there is a return value, the invoker of the macro must specify
404 * the return type. The macro then uses sizeof() on that type to
405 * determine whether its a 32 or 64 bit value, and places the return
406 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
407 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
408 * the return value size.
409 *
410 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
411 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
412 * in low,high order
413 *
414 * Small structures are passed and returned in registers. The macro
415 * calling convention can't directly deal with this, so the wrapper
416 * functions must do this.
417 *
418 * These PVOP_* macros are only defined within this header. This
419 * means that all uses must be wrapped in inline functions. This also
420 * makes sure the incoming and outgoing types are always correct.
421 */
422 #ifdef CONFIG_X86_32
423 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
424 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
425 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
426 "=c" (__ecx)
427 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
428 #define EXTRA_CLOBBERS
429 #define VEXTRA_CLOBBERS
430 #else
431 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
432 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
433 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
434 "=S" (__esi), "=d" (__edx), \
435 "=c" (__ecx)
436
437 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
438
439 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
440 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
441 #endif
442
443 #define __PVOP_CALL(rettype, op, pre, post, ...) \
444 ({ \
445 rettype __ret; \
446 PVOP_CALL_ARGS; \
447 /* This is 32-bit specific, but is okay in 64-bit */ \
448 /* since this condition will never hold */ \
449 if (sizeof(rettype) > sizeof(unsigned long)) { \
450 asm volatile(pre \
451 paravirt_alt(PARAVIRT_CALL) \
452 post \
453 : PVOP_CALL_CLOBBERS \
454 : paravirt_type(op), \
455 paravirt_clobber(CLBR_ANY), \
456 ##__VA_ARGS__ \
457 : "memory", "cc" EXTRA_CLOBBERS); \
458 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
459 } else { \
460 asm volatile(pre \
461 paravirt_alt(PARAVIRT_CALL) \
462 post \
463 : PVOP_CALL_CLOBBERS \
464 : paravirt_type(op), \
465 paravirt_clobber(CLBR_ANY), \
466 ##__VA_ARGS__ \
467 : "memory", "cc" EXTRA_CLOBBERS); \
468 __ret = (rettype)__eax; \
469 } \
470 __ret; \
471 })
472 #define __PVOP_VCALL(op, pre, post, ...) \
473 ({ \
474 PVOP_VCALL_ARGS; \
475 asm volatile(pre \
476 paravirt_alt(PARAVIRT_CALL) \
477 post \
478 : PVOP_VCALL_CLOBBERS \
479 : paravirt_type(op), \
480 paravirt_clobber(CLBR_ANY), \
481 ##__VA_ARGS__ \
482 : "memory", "cc" VEXTRA_CLOBBERS); \
483 })
484
485 #define PVOP_CALL0(rettype, op) \
486 __PVOP_CALL(rettype, op, "", "")
487 #define PVOP_VCALL0(op) \
488 __PVOP_VCALL(op, "", "")
489
490 #define PVOP_CALL1(rettype, op, arg1) \
491 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
492 #define PVOP_VCALL1(op, arg1) \
493 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
494
495 #define PVOP_CALL2(rettype, op, arg1, arg2) \
496 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
497 "1" ((unsigned long)(arg2)))
498 #define PVOP_VCALL2(op, arg1, arg2) \
499 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
500 "1" ((unsigned long)(arg2)))
501
502 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
503 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
504 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
505 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
506 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
507 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
508
509 /* This is the only difference in x86_64. We can make it much simpler */
510 #ifdef CONFIG_X86_32
511 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
512 __PVOP_CALL(rettype, op, \
513 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
514 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
515 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
516 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
517 __PVOP_VCALL(op, \
518 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
519 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
520 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
521 #else
522 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
523 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
524 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
525 "3"((unsigned long)(arg4)))
526 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
527 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
528 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
529 "3"((unsigned long)(arg4)))
530 #endif
531
532 static inline int paravirt_enabled(void)
533 {
534 return pv_info.paravirt_enabled;
535 }
536
537 static inline void load_sp0(struct tss_struct *tss,
538 struct thread_struct *thread)
539 {
540 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
541 }
542
543 #define ARCH_SETUP pv_init_ops.arch_setup();
544 static inline unsigned long get_wallclock(void)
545 {
546 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
547 }
548
549 static inline int set_wallclock(unsigned long nowtime)
550 {
551 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
552 }
553
554 static inline void (*choose_time_init(void))(void)
555 {
556 return pv_time_ops.time_init;
557 }
558
559 /* The paravirtualized CPUID instruction. */
560 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
561 unsigned int *ecx, unsigned int *edx)
562 {
563 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
564 }
565
566 /*
567 * These special macros can be used to get or set a debugging register
568 */
569 static inline unsigned long paravirt_get_debugreg(int reg)
570 {
571 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
572 }
573 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
574 static inline void set_debugreg(unsigned long val, int reg)
575 {
576 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
577 }
578
579 static inline void clts(void)
580 {
581 PVOP_VCALL0(pv_cpu_ops.clts);
582 }
583
584 static inline unsigned long read_cr0(void)
585 {
586 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
587 }
588
589 static inline void write_cr0(unsigned long x)
590 {
591 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
592 }
593
594 static inline unsigned long read_cr2(void)
595 {
596 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
597 }
598
599 static inline void write_cr2(unsigned long x)
600 {
601 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
602 }
603
604 static inline unsigned long read_cr3(void)
605 {
606 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
607 }
608
609 static inline void write_cr3(unsigned long x)
610 {
611 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
612 }
613
614 static inline unsigned long read_cr4(void)
615 {
616 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
617 }
618 static inline unsigned long read_cr4_safe(void)
619 {
620 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
621 }
622
623 static inline void write_cr4(unsigned long x)
624 {
625 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
626 }
627
628 #ifdef CONFIG_X86_64
629 static inline unsigned long read_cr8(void)
630 {
631 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
632 }
633
634 static inline void write_cr8(unsigned long x)
635 {
636 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
637 }
638 #endif
639
640 static inline void raw_safe_halt(void)
641 {
642 PVOP_VCALL0(pv_irq_ops.safe_halt);
643 }
644
645 static inline void halt(void)
646 {
647 PVOP_VCALL0(pv_irq_ops.safe_halt);
648 }
649
650 static inline void wbinvd(void)
651 {
652 PVOP_VCALL0(pv_cpu_ops.wbinvd);
653 }
654
655 #define get_kernel_rpl() (pv_info.kernel_rpl)
656
657 static inline u64 paravirt_read_msr(unsigned msr, int *err)
658 {
659 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
660 }
661 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
662 {
663 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
664 }
665
666 /* These should all do BUG_ON(_err), but our headers are too tangled. */
667 #define rdmsr(msr, val1, val2) \
668 do { \
669 int _err; \
670 u64 _l = paravirt_read_msr(msr, &_err); \
671 val1 = (u32)_l; \
672 val2 = _l >> 32; \
673 } while (0)
674
675 #define wrmsr(msr, val1, val2) \
676 do { \
677 paravirt_write_msr(msr, val1, val2); \
678 } while (0)
679
680 #define rdmsrl(msr, val) \
681 do { \
682 int _err; \
683 val = paravirt_read_msr(msr, &_err); \
684 } while (0)
685
686 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
687 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
688
689 /* rdmsr with exception handling */
690 #define rdmsr_safe(msr, a, b) \
691 ({ \
692 int _err; \
693 u64 _l = paravirt_read_msr(msr, &_err); \
694 (*a) = (u32)_l; \
695 (*b) = _l >> 32; \
696 _err; \
697 })
698
699 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
700 {
701 int err;
702
703 *p = paravirt_read_msr(msr, &err);
704 return err;
705 }
706
707 static inline u64 paravirt_read_tsc(void)
708 {
709 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
710 }
711
712 #define rdtscl(low) \
713 do { \
714 u64 _l = paravirt_read_tsc(); \
715 low = (int)_l; \
716 } while (0)
717
718 #define rdtscll(val) (val = paravirt_read_tsc())
719
720 static inline unsigned long long paravirt_sched_clock(void)
721 {
722 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
723 }
724 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
725
726 static inline unsigned long long paravirt_read_pmc(int counter)
727 {
728 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
729 }
730
731 #define rdpmc(counter, low, high) \
732 do { \
733 u64 _l = paravirt_read_pmc(counter); \
734 low = (u32)_l; \
735 high = _l >> 32; \
736 } while (0)
737
738 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
739 {
740 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
741 }
742
743 #define rdtscp(low, high, aux) \
744 do { \
745 int __aux; \
746 unsigned long __val = paravirt_rdtscp(&__aux); \
747 (low) = (u32)__val; \
748 (high) = (u32)(__val >> 32); \
749 (aux) = __aux; \
750 } while (0)
751
752 #define rdtscpll(val, aux) \
753 do { \
754 unsigned long __aux; \
755 val = paravirt_rdtscp(&__aux); \
756 (aux) = __aux; \
757 } while (0)
758
759 static inline void load_TR_desc(void)
760 {
761 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
762 }
763 static inline void load_gdt(const struct desc_ptr *dtr)
764 {
765 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
766 }
767 static inline void load_idt(const struct desc_ptr *dtr)
768 {
769 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
770 }
771 static inline void set_ldt(const void *addr, unsigned entries)
772 {
773 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
774 }
775 static inline void store_gdt(struct desc_ptr *dtr)
776 {
777 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
778 }
779 static inline void store_idt(struct desc_ptr *dtr)
780 {
781 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
782 }
783 static inline unsigned long paravirt_store_tr(void)
784 {
785 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
786 }
787 #define store_tr(tr) ((tr) = paravirt_store_tr())
788 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
789 {
790 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
791 }
792
793 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
794 const void *desc)
795 {
796 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
797 }
798
799 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
800 void *desc, int type)
801 {
802 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
803 }
804
805 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
806 {
807 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
808 }
809 static inline void set_iopl_mask(unsigned mask)
810 {
811 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
812 }
813
814 /* The paravirtualized I/O functions */
815 static inline void slow_down_io(void)
816 {
817 pv_cpu_ops.io_delay();
818 #ifdef REALLY_SLOW_IO
819 pv_cpu_ops.io_delay();
820 pv_cpu_ops.io_delay();
821 pv_cpu_ops.io_delay();
822 #endif
823 }
824
825 #ifdef CONFIG_X86_LOCAL_APIC
826 /*
827 * Basic functions accessing APICs.
828 */
829 static inline void apic_write(unsigned long reg, u32 v)
830 {
831 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
832 }
833
834 static inline void apic_write_atomic(unsigned long reg, u32 v)
835 {
836 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
837 }
838
839 static inline u32 apic_read(unsigned long reg)
840 {
841 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
842 }
843
844 static inline void setup_boot_clock(void)
845 {
846 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
847 }
848
849 static inline void setup_secondary_clock(void)
850 {
851 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
852 }
853 #endif
854
855 static inline void paravirt_post_allocator_init(void)
856 {
857 if (pv_init_ops.post_allocator_init)
858 (*pv_init_ops.post_allocator_init)();
859 }
860
861 static inline void paravirt_pagetable_setup_start(pgd_t *base)
862 {
863 (*pv_mmu_ops.pagetable_setup_start)(base);
864 }
865
866 static inline void paravirt_pagetable_setup_done(pgd_t *base)
867 {
868 (*pv_mmu_ops.pagetable_setup_done)(base);
869 }
870
871 #ifdef CONFIG_SMP
872 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
873 unsigned long start_esp)
874 {
875 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
876 phys_apicid, start_eip, start_esp);
877 }
878 #endif
879
880 static inline void paravirt_activate_mm(struct mm_struct *prev,
881 struct mm_struct *next)
882 {
883 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
884 }
885
886 static inline void arch_dup_mmap(struct mm_struct *oldmm,
887 struct mm_struct *mm)
888 {
889 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
890 }
891
892 static inline void arch_exit_mmap(struct mm_struct *mm)
893 {
894 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
895 }
896
897 static inline void __flush_tlb(void)
898 {
899 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
900 }
901 static inline void __flush_tlb_global(void)
902 {
903 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
904 }
905 static inline void __flush_tlb_single(unsigned long addr)
906 {
907 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
908 }
909
910 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
911 unsigned long va)
912 {
913 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
914 }
915
916 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
917 {
918 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
919 }
920 static inline void paravirt_release_pte(unsigned pfn)
921 {
922 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
923 }
924
925 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
926 {
927 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
928 }
929
930 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
931 unsigned start, unsigned count)
932 {
933 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
934 }
935 static inline void paravirt_release_pmd(unsigned pfn)
936 {
937 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
938 }
939
940 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
941 {
942 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
943 }
944 static inline void paravirt_release_pud(unsigned pfn)
945 {
946 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
947 }
948
949 #ifdef CONFIG_HIGHPTE
950 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
951 {
952 unsigned long ret;
953 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
954 return (void *)ret;
955 }
956 #endif
957
958 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
959 pte_t *ptep)
960 {
961 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
962 }
963
964 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
965 pte_t *ptep)
966 {
967 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
968 }
969
970 static inline pte_t __pte(pteval_t val)
971 {
972 pteval_t ret;
973
974 if (sizeof(pteval_t) > sizeof(long))
975 ret = PVOP_CALL2(pteval_t,
976 pv_mmu_ops.make_pte,
977 val, (u64)val >> 32);
978 else
979 ret = PVOP_CALL1(pteval_t,
980 pv_mmu_ops.make_pte,
981 val);
982
983 return (pte_t) { .pte = ret };
984 }
985
986 static inline pteval_t pte_val(pte_t pte)
987 {
988 pteval_t ret;
989
990 if (sizeof(pteval_t) > sizeof(long))
991 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
992 pte.pte, (u64)pte.pte >> 32);
993 else
994 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
995 pte.pte);
996
997 return ret;
998 }
999
1000 static inline pteval_t pte_flags(pte_t pte)
1001 {
1002 pteval_t ret;
1003
1004 if (sizeof(pteval_t) > sizeof(long))
1005 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1006 pte.pte, (u64)pte.pte >> 32);
1007 else
1008 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1009 pte.pte);
1010
1011 return ret;
1012 }
1013
1014 static inline pgd_t __pgd(pgdval_t val)
1015 {
1016 pgdval_t ret;
1017
1018 if (sizeof(pgdval_t) > sizeof(long))
1019 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1020 val, (u64)val >> 32);
1021 else
1022 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1023 val);
1024
1025 return (pgd_t) { ret };
1026 }
1027
1028 static inline pgdval_t pgd_val(pgd_t pgd)
1029 {
1030 pgdval_t ret;
1031
1032 if (sizeof(pgdval_t) > sizeof(long))
1033 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1034 pgd.pgd, (u64)pgd.pgd >> 32);
1035 else
1036 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1037 pgd.pgd);
1038
1039 return ret;
1040 }
1041
1042 static inline void set_pte(pte_t *ptep, pte_t pte)
1043 {
1044 if (sizeof(pteval_t) > sizeof(long))
1045 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1046 pte.pte, (u64)pte.pte >> 32);
1047 else
1048 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1049 pte.pte);
1050 }
1051
1052 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1053 pte_t *ptep, pte_t pte)
1054 {
1055 if (sizeof(pteval_t) > sizeof(long))
1056 /* 5 arg words */
1057 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1058 else
1059 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1060 }
1061
1062 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1063 {
1064 pmdval_t val = native_pmd_val(pmd);
1065
1066 if (sizeof(pmdval_t) > sizeof(long))
1067 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1068 else
1069 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1070 }
1071
1072 #if PAGETABLE_LEVELS >= 3
1073 static inline pmd_t __pmd(pmdval_t val)
1074 {
1075 pmdval_t ret;
1076
1077 if (sizeof(pmdval_t) > sizeof(long))
1078 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1079 val, (u64)val >> 32);
1080 else
1081 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1082 val);
1083
1084 return (pmd_t) { ret };
1085 }
1086
1087 static inline pmdval_t pmd_val(pmd_t pmd)
1088 {
1089 pmdval_t ret;
1090
1091 if (sizeof(pmdval_t) > sizeof(long))
1092 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1093 pmd.pmd, (u64)pmd.pmd >> 32);
1094 else
1095 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1096 pmd.pmd);
1097
1098 return ret;
1099 }
1100
1101 static inline void set_pud(pud_t *pudp, pud_t pud)
1102 {
1103 pudval_t val = native_pud_val(pud);
1104
1105 if (sizeof(pudval_t) > sizeof(long))
1106 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1107 val, (u64)val >> 32);
1108 else
1109 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1110 val);
1111 }
1112 #if PAGETABLE_LEVELS == 4
1113 static inline pud_t __pud(pudval_t val)
1114 {
1115 pudval_t ret;
1116
1117 if (sizeof(pudval_t) > sizeof(long))
1118 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1119 val, (u64)val >> 32);
1120 else
1121 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1122 val);
1123
1124 return (pud_t) { ret };
1125 }
1126
1127 static inline pudval_t pud_val(pud_t pud)
1128 {
1129 pudval_t ret;
1130
1131 if (sizeof(pudval_t) > sizeof(long))
1132 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1133 pud.pud, (u64)pud.pud >> 32);
1134 else
1135 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1136 pud.pud);
1137
1138 return ret;
1139 }
1140
1141 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1142 {
1143 pgdval_t val = native_pgd_val(pgd);
1144
1145 if (sizeof(pgdval_t) > sizeof(long))
1146 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1147 val, (u64)val >> 32);
1148 else
1149 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1150 val);
1151 }
1152
1153 static inline void pgd_clear(pgd_t *pgdp)
1154 {
1155 set_pgd(pgdp, __pgd(0));
1156 }
1157
1158 static inline void pud_clear(pud_t *pudp)
1159 {
1160 set_pud(pudp, __pud(0));
1161 }
1162
1163 #endif /* PAGETABLE_LEVELS == 4 */
1164
1165 #endif /* PAGETABLE_LEVELS >= 3 */
1166
1167 #ifdef CONFIG_X86_PAE
1168 /* Special-case pte-setting operations for PAE, which can't update a
1169 64-bit pte atomically */
1170 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1171 {
1172 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1173 pte.pte, pte.pte >> 32);
1174 }
1175
1176 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1177 pte_t *ptep, pte_t pte)
1178 {
1179 /* 5 arg words */
1180 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1181 }
1182
1183 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1184 pte_t *ptep)
1185 {
1186 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1187 }
1188
1189 static inline void pmd_clear(pmd_t *pmdp)
1190 {
1191 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1192 }
1193 #else /* !CONFIG_X86_PAE */
1194 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1195 {
1196 set_pte(ptep, pte);
1197 }
1198
1199 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1200 pte_t *ptep, pte_t pte)
1201 {
1202 set_pte(ptep, pte);
1203 }
1204
1205 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1206 pte_t *ptep)
1207 {
1208 set_pte_at(mm, addr, ptep, __pte(0));
1209 }
1210
1211 static inline void pmd_clear(pmd_t *pmdp)
1212 {
1213 set_pmd(pmdp, __pmd(0));
1214 }
1215 #endif /* CONFIG_X86_PAE */
1216
1217 /* Lazy mode for batching updates / context switch */
1218 enum paravirt_lazy_mode {
1219 PARAVIRT_LAZY_NONE,
1220 PARAVIRT_LAZY_MMU,
1221 PARAVIRT_LAZY_CPU,
1222 };
1223
1224 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1225 void paravirt_enter_lazy_cpu(void);
1226 void paravirt_leave_lazy_cpu(void);
1227 void paravirt_enter_lazy_mmu(void);
1228 void paravirt_leave_lazy_mmu(void);
1229 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1230
1231 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1232 static inline void arch_enter_lazy_cpu_mode(void)
1233 {
1234 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1235 }
1236
1237 static inline void arch_leave_lazy_cpu_mode(void)
1238 {
1239 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1240 }
1241
1242 static inline void arch_flush_lazy_cpu_mode(void)
1243 {
1244 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1245 arch_leave_lazy_cpu_mode();
1246 arch_enter_lazy_cpu_mode();
1247 }
1248 }
1249
1250
1251 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1252 static inline void arch_enter_lazy_mmu_mode(void)
1253 {
1254 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1255 }
1256
1257 static inline void arch_leave_lazy_mmu_mode(void)
1258 {
1259 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1260 }
1261
1262 static inline void arch_flush_lazy_mmu_mode(void)
1263 {
1264 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1265 arch_leave_lazy_mmu_mode();
1266 arch_enter_lazy_mmu_mode();
1267 }
1268 }
1269
1270 void _paravirt_nop(void);
1271 #define paravirt_nop ((void *)_paravirt_nop)
1272
1273 /* These all sit in the .parainstructions section to tell us what to patch. */
1274 struct paravirt_patch_site {
1275 u8 *instr; /* original instructions */
1276 u8 instrtype; /* type of this instruction */
1277 u8 len; /* length of original instruction */
1278 u16 clobbers; /* what registers you may clobber */
1279 };
1280
1281 extern struct paravirt_patch_site __parainstructions[],
1282 __parainstructions_end[];
1283
1284 #ifdef CONFIG_X86_32
1285 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1286 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1287 #define PV_FLAGS_ARG "0"
1288 #define PV_EXTRA_CLOBBERS
1289 #define PV_VEXTRA_CLOBBERS
1290 #else
1291 /* We save some registers, but all of them, that's too much. We clobber all
1292 * caller saved registers but the argument parameter */
1293 #define PV_SAVE_REGS "pushq %%rdi;"
1294 #define PV_RESTORE_REGS "popq %%rdi;"
1295 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1296 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1297 #define PV_FLAGS_ARG "D"
1298 #endif
1299
1300 static inline unsigned long __raw_local_save_flags(void)
1301 {
1302 unsigned long f;
1303
1304 asm volatile(paravirt_alt(PV_SAVE_REGS
1305 PARAVIRT_CALL
1306 PV_RESTORE_REGS)
1307 : "=a"(f)
1308 : paravirt_type(pv_irq_ops.save_fl),
1309 paravirt_clobber(CLBR_EAX)
1310 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1311 return f;
1312 }
1313
1314 static inline void raw_local_irq_restore(unsigned long f)
1315 {
1316 asm volatile(paravirt_alt(PV_SAVE_REGS
1317 PARAVIRT_CALL
1318 PV_RESTORE_REGS)
1319 : "=a"(f)
1320 : PV_FLAGS_ARG(f),
1321 paravirt_type(pv_irq_ops.restore_fl),
1322 paravirt_clobber(CLBR_EAX)
1323 : "memory", "cc" PV_EXTRA_CLOBBERS);
1324 }
1325
1326 static inline void raw_local_irq_disable(void)
1327 {
1328 asm volatile(paravirt_alt(PV_SAVE_REGS
1329 PARAVIRT_CALL
1330 PV_RESTORE_REGS)
1331 :
1332 : paravirt_type(pv_irq_ops.irq_disable),
1333 paravirt_clobber(CLBR_EAX)
1334 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1335 }
1336
1337 static inline void raw_local_irq_enable(void)
1338 {
1339 asm volatile(paravirt_alt(PV_SAVE_REGS
1340 PARAVIRT_CALL
1341 PV_RESTORE_REGS)
1342 :
1343 : paravirt_type(pv_irq_ops.irq_enable),
1344 paravirt_clobber(CLBR_EAX)
1345 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1346 }
1347
1348 static inline unsigned long __raw_local_irq_save(void)
1349 {
1350 unsigned long f;
1351
1352 f = __raw_local_save_flags();
1353 raw_local_irq_disable();
1354 return f;
1355 }
1356
1357 /* Make sure as little as possible of this mess escapes. */
1358 #undef PARAVIRT_CALL
1359 #undef __PVOP_CALL
1360 #undef __PVOP_VCALL
1361 #undef PVOP_VCALL0
1362 #undef PVOP_CALL0
1363 #undef PVOP_VCALL1
1364 #undef PVOP_CALL1
1365 #undef PVOP_VCALL2
1366 #undef PVOP_CALL2
1367 #undef PVOP_VCALL3
1368 #undef PVOP_CALL3
1369 #undef PVOP_VCALL4
1370 #undef PVOP_CALL4
1371
1372 #else /* __ASSEMBLY__ */
1373
1374 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1375 771:; \
1376 ops; \
1377 772:; \
1378 .pushsection .parainstructions,"a"; \
1379 .align algn; \
1380 word 771b; \
1381 .byte ptype; \
1382 .byte 772b-771b; \
1383 .short clobbers; \
1384 .popsection
1385
1386
1387 #ifdef CONFIG_X86_64
1388 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1389 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1390 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1391 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1392 #else
1393 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1394 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1395 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1396 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1397 #endif
1398
1399 #define INTERRUPT_RETURN \
1400 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1401 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1402
1403 #define DISABLE_INTERRUPTS(clobbers) \
1404 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1405 PV_SAVE_REGS; \
1406 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1407 PV_RESTORE_REGS;) \
1408
1409 #define ENABLE_INTERRUPTS(clobbers) \
1410 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1411 PV_SAVE_REGS; \
1412 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1413 PV_RESTORE_REGS;)
1414
1415 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1416 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1417 CLBR_NONE, \
1418 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1419
1420
1421 #ifdef CONFIG_X86_32
1422 #define GET_CR0_INTO_EAX \
1423 push %ecx; push %edx; \
1424 call *pv_cpu_ops+PV_CPU_read_cr0; \
1425 pop %edx; pop %ecx
1426 #else
1427 #define SWAPGS \
1428 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1429 PV_SAVE_REGS; \
1430 call *pv_cpu_ops+PV_CPU_swapgs; \
1431 PV_RESTORE_REGS \
1432 )
1433
1434 #define GET_CR2_INTO_RCX \
1435 call *pv_mmu_ops+PV_MMU_read_cr2; \
1436 movq %rax, %rcx; \
1437 xorq %rax, %rax;
1438
1439 #endif
1440
1441 #endif /* __ASSEMBLY__ */
1442 #endif /* CONFIG_PARAVIRT */
1443 #endif /* __ASM_PARAVIRT_H */
Linux kernel - Deliverables
This page took 0.062215 seconds and 6 git commands to generate.