1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
9 /* Bitmask of what can be clobbered: usually at least eax. */
17 #include <linux/types.h>
18 #include <linux/cpumask.h>
19 #include <asm/kmap_types.h>
20 #include <asm/desc_defs.h>
31 unsigned int kernel_rpl
;
32 int shared_kernel_pmd
;
39 * Patch may replace one of the defined code sequences with
40 * arbitrary code, subject to the same register constraints.
41 * This generally means the code is not free to clobber any
42 * registers other than EAX. The patch function should return
43 * the number of bytes of code generated, as we nop pad the
44 * rest in generic code.
46 unsigned (*patch
)(u8 type
, u16 clobber
, void *insnbuf
,
47 unsigned long addr
, unsigned len
);
49 /* Basic arch-specific setup */
50 void (*arch_setup
)(void);
51 char *(*memory_setup
)(void);
52 void (*post_allocator_init
)(void);
54 /* Print a banner to identify the environment */
60 /* Set deferred update mode, used for batching operations. */
66 void (*time_init
)(void);
68 /* Set and set time of day */
69 unsigned long (*get_wallclock
)(void);
70 int (*set_wallclock
)(unsigned long);
72 unsigned long long (*sched_clock
)(void);
73 unsigned long (*get_cpu_khz
)(void);
77 /* hooks for various privileged instructions */
78 unsigned long (*get_debugreg
)(int regno
);
79 void (*set_debugreg
)(int regno
, unsigned long value
);
83 unsigned long (*read_cr0
)(void);
84 void (*write_cr0
)(unsigned long);
86 unsigned long (*read_cr4_safe
)(void);
87 unsigned long (*read_cr4
)(void);
88 void (*write_cr4
)(unsigned long);
90 /* Segment descriptor handling */
91 void (*load_tr_desc
)(void);
92 void (*load_gdt
)(const struct desc_ptr
*);
93 void (*load_idt
)(const struct desc_ptr
*);
94 void (*store_gdt
)(struct desc_ptr
*);
95 void (*store_idt
)(struct desc_ptr
*);
96 void (*set_ldt
)(const void *desc
, unsigned entries
);
97 unsigned long (*store_tr
)(void);
98 void (*load_tls
)(struct thread_struct
*t
, unsigned int cpu
);
99 void (*write_ldt_entry
)(struct desc_struct
*ldt
, int entrynum
,
101 void (*write_gdt_entry
)(struct desc_struct
*,
102 int entrynum
, const void *desc
, int size
);
103 void (*write_idt_entry
)(gate_desc
*,
104 int entrynum
, const gate_desc
*gate
);
105 void (*load_sp0
)(struct tss_struct
*tss
, struct thread_struct
*t
);
107 void (*set_iopl_mask
)(unsigned mask
);
109 void (*wbinvd
)(void);
110 void (*io_delay
)(void);
112 /* cpuid emulation, mostly so that caps bits can be disabled */
113 void (*cpuid
)(unsigned int *eax
, unsigned int *ebx
,
114 unsigned int *ecx
, unsigned int *edx
);
116 /* MSR, PMC and TSR operations.
117 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
118 u64 (*read_msr
)(unsigned int msr
, int *err
);
119 int (*write_msr
)(unsigned int msr
, unsigned low
, unsigned high
);
121 u64 (*read_tsc
)(void);
122 u64 (*read_pmc
)(int counter
);
124 /* These two are jmp to, not actually called. */
125 void (*irq_enable_syscall_ret
)(void);
128 struct pv_lazy_ops lazy_mode
;
132 void (*init_IRQ
)(void);
135 * Get/set interrupt state. save_fl and restore_fl are only
136 * expected to use X86_EFLAGS_IF; all other bits
137 * returned from save_fl are undefined, and may be ignored by
140 unsigned long (*save_fl
)(void);
141 void (*restore_fl
)(unsigned long);
142 void (*irq_disable
)(void);
143 void (*irq_enable
)(void);
144 void (*safe_halt
)(void);
149 #ifdef CONFIG_X86_LOCAL_APIC
151 * Direct APIC operations, principally for VMI. Ideally
152 * these shouldn't be in this interface.
154 void (*apic_write
)(unsigned long reg
, u32 v
);
155 void (*apic_write_atomic
)(unsigned long reg
, u32 v
);
156 u32 (*apic_read
)(unsigned long reg
);
157 void (*setup_boot_clock
)(void);
158 void (*setup_secondary_clock
)(void);
160 void (*startup_ipi_hook
)(int phys_apicid
,
161 unsigned long start_eip
,
162 unsigned long start_esp
);
168 * Called before/after init_mm pagetable setup. setup_start
169 * may reset %cr3, and may pre-install parts of the pagetable;
170 * pagetable setup is expected to preserve any existing
173 void (*pagetable_setup_start
)(pgd_t
*pgd_base
);
174 void (*pagetable_setup_done
)(pgd_t
*pgd_base
);
176 unsigned long (*read_cr2
)(void);
177 void (*write_cr2
)(unsigned long);
179 unsigned long (*read_cr3
)(void);
180 void (*write_cr3
)(unsigned long);
183 * Hooks for intercepting the creation/use/destruction of an
186 void (*activate_mm
)(struct mm_struct
*prev
,
187 struct mm_struct
*next
);
188 void (*dup_mmap
)(struct mm_struct
*oldmm
,
189 struct mm_struct
*mm
);
190 void (*exit_mmap
)(struct mm_struct
*mm
);
194 void (*flush_tlb_user
)(void);
195 void (*flush_tlb_kernel
)(void);
196 void (*flush_tlb_single
)(unsigned long addr
);
197 void (*flush_tlb_others
)(const cpumask_t
*cpus
, struct mm_struct
*mm
,
200 /* Hooks for allocating/releasing pagetable pages */
201 void (*alloc_pt
)(struct mm_struct
*mm
, u32 pfn
);
202 void (*alloc_pd
)(u32 pfn
);
203 void (*alloc_pd_clone
)(u32 pfn
, u32 clonepfn
, u32 start
, u32 count
);
204 void (*release_pt
)(u32 pfn
);
205 void (*release_pd
)(u32 pfn
);
207 /* Pagetable manipulation functions */
208 void (*set_pte
)(pte_t
*ptep
, pte_t pteval
);
209 void (*set_pte_at
)(struct mm_struct
*mm
, unsigned long addr
,
210 pte_t
*ptep
, pte_t pteval
);
211 void (*set_pmd
)(pmd_t
*pmdp
, pmd_t pmdval
);
212 void (*pte_update
)(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
);
213 void (*pte_update_defer
)(struct mm_struct
*mm
,
214 unsigned long addr
, pte_t
*ptep
);
216 #ifdef CONFIG_X86_PAE
217 void (*set_pte_atomic
)(pte_t
*ptep
, pte_t pteval
);
218 void (*set_pte_present
)(struct mm_struct
*mm
, unsigned long addr
,
219 pte_t
*ptep
, pte_t pte
);
220 void (*set_pud
)(pud_t
*pudp
, pud_t pudval
);
221 void (*pte_clear
)(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
);
222 void (*pmd_clear
)(pmd_t
*pmdp
);
224 unsigned long long (*pte_val
)(pte_t
);
225 unsigned long long (*pmd_val
)(pmd_t
);
226 unsigned long long (*pgd_val
)(pgd_t
);
228 pte_t (*make_pte
)(unsigned long long pte
);
229 pmd_t (*make_pmd
)(unsigned long long pmd
);
230 pgd_t (*make_pgd
)(unsigned long long pgd
);
232 unsigned long (*pte_val
)(pte_t
);
233 unsigned long (*pgd_val
)(pgd_t
);
235 pte_t (*make_pte
)(unsigned long pte
);
236 pgd_t (*make_pgd
)(unsigned long pgd
);
239 #ifdef CONFIG_HIGHPTE
240 void *(*kmap_atomic_pte
)(struct page
*page
, enum km_type type
);
243 struct pv_lazy_ops lazy_mode
;
246 /* This contains all the paravirt structures: we get a convenient
247 * number for each function using the offset which we use to indicate
249 struct paravirt_patch_template
251 struct pv_init_ops pv_init_ops
;
252 struct pv_time_ops pv_time_ops
;
253 struct pv_cpu_ops pv_cpu_ops
;
254 struct pv_irq_ops pv_irq_ops
;
255 struct pv_apic_ops pv_apic_ops
;
256 struct pv_mmu_ops pv_mmu_ops
;
259 extern struct pv_info pv_info
;
260 extern struct pv_init_ops pv_init_ops
;
261 extern struct pv_time_ops pv_time_ops
;
262 extern struct pv_cpu_ops pv_cpu_ops
;
263 extern struct pv_irq_ops pv_irq_ops
;
264 extern struct pv_apic_ops pv_apic_ops
;
265 extern struct pv_mmu_ops pv_mmu_ops
;
267 #define PARAVIRT_PATCH(x) \
268 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
270 #define paravirt_type(op) \
271 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
272 [paravirt_opptr] "m" (op)
273 #define paravirt_clobber(clobber) \
274 [paravirt_clobber] "i" (clobber)
277 * Generate some code, and mark it as patchable by the
278 * apply_paravirt() alternate instruction patcher.
280 #define _paravirt_alt(insn_string, type, clobber) \
281 "771:\n\t" insn_string "\n" "772:\n" \
282 ".pushsection .parainstructions,\"a\"\n" \
284 " .byte " type "\n" \
285 " .byte 772b-771b\n" \
286 " .short " clobber "\n" \
289 /* Generate patchable code, with the default asm parameters. */
290 #define paravirt_alt(insn_string) \
291 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
293 unsigned paravirt_patch_nop(void);
294 unsigned paravirt_patch_ignore(unsigned len
);
295 unsigned paravirt_patch_call(void *insnbuf
,
296 const void *target
, u16 tgt_clobbers
,
297 unsigned long addr
, u16 site_clobbers
,
299 unsigned paravirt_patch_jmp(void *insnbuf
, const void *target
,
300 unsigned long addr
, unsigned len
);
301 unsigned paravirt_patch_default(u8 type
, u16 clobbers
, void *insnbuf
,
302 unsigned long addr
, unsigned len
);
304 unsigned paravirt_patch_insns(void *insnbuf
, unsigned len
,
305 const char *start
, const char *end
);
307 int paravirt_disable_iospace(void);
310 * This generates an indirect call based on the operation type number.
311 * The type number, computed in PARAVIRT_PATCH, is derived from the
312 * offset into the paravirt_patch_template structure, and can therefore be
313 * freely converted back into a structure offset.
315 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
318 * These macros are intended to wrap calls through one of the paravirt
319 * ops structs, so that they can be later identified and patched at
322 * Normally, a call to a pv_op function is a simple indirect call:
323 * (paravirt_ops.operations)(args...).
325 * Unfortunately, this is a relatively slow operation for modern CPUs,
326 * because it cannot necessarily determine what the destination
327 * address is. In this case, the address is a runtime constant, so at
328 * the very least we can patch the call to e a simple direct call, or
329 * ideally, patch an inline implementation into the callsite. (Direct
330 * calls are essentially free, because the call and return addresses
331 * are completely predictable.)
333 * These macros rely on the standard gcc "regparm(3)" calling
334 * convention, in which the first three arguments are placed in %eax,
335 * %edx, %ecx (in that order), and the remaining arguments are placed
336 * on the stack. All caller-save registers (eax,edx,ecx) are expected
337 * to be modified (either clobbered or used for return values).
339 * The call instruction itself is marked by placing its start address
340 * and size into the .parainstructions section, so that
341 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
342 * appropriate patching under the control of the backend pv_init_ops
345 * Unfortunately there's no way to get gcc to generate the args setup
346 * for the call, and then allow the call itself to be generated by an
347 * inline asm. Because of this, we must do the complete arg setup and
348 * return value handling from within these macros. This is fairly
351 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
352 * It could be extended to more arguments, but there would be little
353 * to be gained from that. For each number of arguments, there are
354 * the two VCALL and CALL variants for void and non-void functions.
356 * When there is a return value, the invoker of the macro must specify
357 * the return type. The macro then uses sizeof() on that type to
358 * determine whether its a 32 or 64 bit value, and places the return
359 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
362 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
365 * Small structures are passed and returned in registers. The macro
366 * calling convention can't directly deal with this, so the wrapper
367 * functions must do this.
369 * These PVOP_* macros are only defined within this header. This
370 * means that all uses must be wrapped in inline functions. This also
371 * makes sure the incoming and outgoing types are always correct.
373 #define __PVOP_CALL(rettype, op, pre, post, ...) \
376 unsigned long __eax, __edx, __ecx; \
377 if (sizeof(rettype) > sizeof(unsigned long)) { \
379 paravirt_alt(PARAVIRT_CALL) \
381 : "=a" (__eax), "=d" (__edx), \
383 : paravirt_type(op), \
384 paravirt_clobber(CLBR_ANY), \
387 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
390 paravirt_alt(PARAVIRT_CALL) \
392 : "=a" (__eax), "=d" (__edx), \
394 : paravirt_type(op), \
395 paravirt_clobber(CLBR_ANY), \
398 __ret = (rettype)__eax; \
402 #define __PVOP_VCALL(op, pre, post, ...) \
404 unsigned long __eax, __edx, __ecx; \
406 paravirt_alt(PARAVIRT_CALL) \
408 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
409 : paravirt_type(op), \
410 paravirt_clobber(CLBR_ANY), \
415 #define PVOP_CALL0(rettype, op) \
416 __PVOP_CALL(rettype, op, "", "")
417 #define PVOP_VCALL0(op) \
418 __PVOP_VCALL(op, "", "")
420 #define PVOP_CALL1(rettype, op, arg1) \
421 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)))
422 #define PVOP_VCALL1(op, arg1) \
423 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)))
425 #define PVOP_CALL2(rettype, op, arg1, arg2) \
426 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
427 #define PVOP_VCALL2(op, arg1, arg2) \
428 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
430 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
431 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), \
432 "1"((u32)(arg2)), "2"((u32)(arg3)))
433 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
434 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)), \
437 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
438 __PVOP_CALL(rettype, op, \
439 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
440 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
441 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
442 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
444 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
445 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
446 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
448 static inline int paravirt_enabled(void)
450 return pv_info
.paravirt_enabled
;
453 static inline void load_sp0(struct tss_struct
*tss
,
454 struct thread_struct
*thread
)
456 PVOP_VCALL2(pv_cpu_ops
.load_sp0
, tss
, thread
);
459 #define ARCH_SETUP pv_init_ops.arch_setup();
460 static inline unsigned long get_wallclock(void)
462 return PVOP_CALL0(unsigned long, pv_time_ops
.get_wallclock
);
465 static inline int set_wallclock(unsigned long nowtime
)
467 return PVOP_CALL1(int, pv_time_ops
.set_wallclock
, nowtime
);
470 static inline void (*choose_time_init(void))(void)
472 return pv_time_ops
.time_init
;
475 /* The paravirtualized CPUID instruction. */
476 static inline void __cpuid(unsigned int *eax
, unsigned int *ebx
,
477 unsigned int *ecx
, unsigned int *edx
)
479 PVOP_VCALL4(pv_cpu_ops
.cpuid
, eax
, ebx
, ecx
, edx
);
483 * These special macros can be used to get or set a debugging register
485 static inline unsigned long paravirt_get_debugreg(int reg
)
487 return PVOP_CALL1(unsigned long, pv_cpu_ops
.get_debugreg
, reg
);
489 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
490 static inline void set_debugreg(unsigned long val
, int reg
)
492 PVOP_VCALL2(pv_cpu_ops
.set_debugreg
, reg
, val
);
495 static inline void clts(void)
497 PVOP_VCALL0(pv_cpu_ops
.clts
);
500 static inline unsigned long read_cr0(void)
502 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr0
);
505 static inline void write_cr0(unsigned long x
)
507 PVOP_VCALL1(pv_cpu_ops
.write_cr0
, x
);
510 static inline unsigned long read_cr2(void)
512 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr2
);
515 static inline void write_cr2(unsigned long x
)
517 PVOP_VCALL1(pv_mmu_ops
.write_cr2
, x
);
520 static inline unsigned long read_cr3(void)
522 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr3
);
525 static inline void write_cr3(unsigned long x
)
527 PVOP_VCALL1(pv_mmu_ops
.write_cr3
, x
);
530 static inline unsigned long read_cr4(void)
532 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4
);
534 static inline unsigned long read_cr4_safe(void)
536 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4_safe
);
539 static inline void write_cr4(unsigned long x
)
541 PVOP_VCALL1(pv_cpu_ops
.write_cr4
, x
);
544 static inline void raw_safe_halt(void)
546 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
549 static inline void halt(void)
551 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
554 static inline void wbinvd(void)
556 PVOP_VCALL0(pv_cpu_ops
.wbinvd
);
559 #define get_kernel_rpl() (pv_info.kernel_rpl)
561 static inline u64
paravirt_read_msr(unsigned msr
, int *err
)
563 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr
, msr
, err
);
565 static inline int paravirt_write_msr(unsigned msr
, unsigned low
, unsigned high
)
567 return PVOP_CALL3(int, pv_cpu_ops
.write_msr
, msr
, low
, high
);
570 /* These should all do BUG_ON(_err), but our headers are too tangled. */
571 #define rdmsr(msr,val1,val2) do { \
573 u64 _l = paravirt_read_msr(msr, &_err); \
578 #define wrmsr(msr,val1,val2) do { \
579 paravirt_write_msr(msr, val1, val2); \
582 #define rdmsrl(msr,val) do { \
584 val = paravirt_read_msr(msr, &_err); \
587 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
588 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
590 /* rdmsr with exception handling */
591 #define rdmsr_safe(msr,a,b) ({ \
593 u64 _l = paravirt_read_msr(msr, &_err); \
599 static inline u64
paravirt_read_tsc(void)
601 return PVOP_CALL0(u64
, pv_cpu_ops
.read_tsc
);
604 #define rdtscl(low) do { \
605 u64 _l = paravirt_read_tsc(); \
609 #define rdtscll(val) (val = paravirt_read_tsc())
611 static inline unsigned long long paravirt_sched_clock(void)
613 return PVOP_CALL0(unsigned long long, pv_time_ops
.sched_clock
);
615 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
617 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
619 static inline unsigned long long paravirt_read_pmc(int counter
)
621 return PVOP_CALL1(u64
, pv_cpu_ops
.read_pmc
, counter
);
624 #define rdpmc(counter,low,high) do { \
625 u64 _l = paravirt_read_pmc(counter); \
630 static inline void load_TR_desc(void)
632 PVOP_VCALL0(pv_cpu_ops
.load_tr_desc
);
634 static inline void load_gdt(const struct desc_ptr
*dtr
)
636 PVOP_VCALL1(pv_cpu_ops
.load_gdt
, dtr
);
638 static inline void load_idt(const struct desc_ptr
*dtr
)
640 PVOP_VCALL1(pv_cpu_ops
.load_idt
, dtr
);
642 static inline void set_ldt(const void *addr
, unsigned entries
)
644 PVOP_VCALL2(pv_cpu_ops
.set_ldt
, addr
, entries
);
646 static inline void store_gdt(struct desc_ptr
*dtr
)
648 PVOP_VCALL1(pv_cpu_ops
.store_gdt
, dtr
);
650 static inline void store_idt(struct desc_ptr
*dtr
)
652 PVOP_VCALL1(pv_cpu_ops
.store_idt
, dtr
);
654 static inline unsigned long paravirt_store_tr(void)
656 return PVOP_CALL0(unsigned long, pv_cpu_ops
.store_tr
);
658 #define store_tr(tr) ((tr) = paravirt_store_tr())
659 static inline void load_TLS(struct thread_struct
*t
, unsigned cpu
)
661 PVOP_VCALL2(pv_cpu_ops
.load_tls
, t
, cpu
);
664 static inline void write_ldt_entry(struct desc_struct
*dt
, int entry
,
667 PVOP_VCALL3(pv_cpu_ops
.write_ldt_entry
, dt
, entry
, desc
);
670 static inline void write_gdt_entry(struct desc_struct
*dt
, int entry
,
671 void *desc
, int type
)
673 PVOP_VCALL4(pv_cpu_ops
.write_gdt_entry
, dt
, entry
, desc
, type
);
676 static inline void write_idt_entry(gate_desc
*dt
, int entry
, const gate_desc
*g
)
678 PVOP_VCALL3(pv_cpu_ops
.write_idt_entry
, dt
, entry
, g
);
680 static inline void set_iopl_mask(unsigned mask
)
682 PVOP_VCALL1(pv_cpu_ops
.set_iopl_mask
, mask
);
685 /* The paravirtualized I/O functions */
686 static inline void slow_down_io(void) {
687 pv_cpu_ops
.io_delay();
688 #ifdef REALLY_SLOW_IO
689 pv_cpu_ops
.io_delay();
690 pv_cpu_ops
.io_delay();
691 pv_cpu_ops
.io_delay();
695 #ifdef CONFIG_X86_LOCAL_APIC
697 * Basic functions accessing APICs.
699 static inline void apic_write(unsigned long reg
, u32 v
)
701 PVOP_VCALL2(pv_apic_ops
.apic_write
, reg
, v
);
704 static inline void apic_write_atomic(unsigned long reg
, u32 v
)
706 PVOP_VCALL2(pv_apic_ops
.apic_write_atomic
, reg
, v
);
709 static inline u32
apic_read(unsigned long reg
)
711 return PVOP_CALL1(unsigned long, pv_apic_ops
.apic_read
, reg
);
714 static inline void setup_boot_clock(void)
716 PVOP_VCALL0(pv_apic_ops
.setup_boot_clock
);
719 static inline void setup_secondary_clock(void)
721 PVOP_VCALL0(pv_apic_ops
.setup_secondary_clock
);
725 static inline void paravirt_post_allocator_init(void)
727 if (pv_init_ops
.post_allocator_init
)
728 (*pv_init_ops
.post_allocator_init
)();
731 static inline void paravirt_pagetable_setup_start(pgd_t
*base
)
733 (*pv_mmu_ops
.pagetable_setup_start
)(base
);
736 static inline void paravirt_pagetable_setup_done(pgd_t
*base
)
738 (*pv_mmu_ops
.pagetable_setup_done
)(base
);
742 static inline void startup_ipi_hook(int phys_apicid
, unsigned long start_eip
,
743 unsigned long start_esp
)
745 PVOP_VCALL3(pv_apic_ops
.startup_ipi_hook
,
746 phys_apicid
, start_eip
, start_esp
);
750 static inline void paravirt_activate_mm(struct mm_struct
*prev
,
751 struct mm_struct
*next
)
753 PVOP_VCALL2(pv_mmu_ops
.activate_mm
, prev
, next
);
756 static inline void arch_dup_mmap(struct mm_struct
*oldmm
,
757 struct mm_struct
*mm
)
759 PVOP_VCALL2(pv_mmu_ops
.dup_mmap
, oldmm
, mm
);
762 static inline void arch_exit_mmap(struct mm_struct
*mm
)
764 PVOP_VCALL1(pv_mmu_ops
.exit_mmap
, mm
);
767 static inline void __flush_tlb(void)
769 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_user
);
771 static inline void __flush_tlb_global(void)
773 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_kernel
);
775 static inline void __flush_tlb_single(unsigned long addr
)
777 PVOP_VCALL1(pv_mmu_ops
.flush_tlb_single
, addr
);
780 static inline void flush_tlb_others(cpumask_t cpumask
, struct mm_struct
*mm
,
783 PVOP_VCALL3(pv_mmu_ops
.flush_tlb_others
, &cpumask
, mm
, va
);
786 static inline void paravirt_alloc_pt(struct mm_struct
*mm
, unsigned pfn
)
788 PVOP_VCALL2(pv_mmu_ops
.alloc_pt
, mm
, pfn
);
790 static inline void paravirt_release_pt(unsigned pfn
)
792 PVOP_VCALL1(pv_mmu_ops
.release_pt
, pfn
);
795 static inline void paravirt_alloc_pd(unsigned pfn
)
797 PVOP_VCALL1(pv_mmu_ops
.alloc_pd
, pfn
);
800 static inline void paravirt_alloc_pd_clone(unsigned pfn
, unsigned clonepfn
,
801 unsigned start
, unsigned count
)
803 PVOP_VCALL4(pv_mmu_ops
.alloc_pd_clone
, pfn
, clonepfn
, start
, count
);
805 static inline void paravirt_release_pd(unsigned pfn
)
807 PVOP_VCALL1(pv_mmu_ops
.release_pd
, pfn
);
810 #ifdef CONFIG_HIGHPTE
811 static inline void *kmap_atomic_pte(struct page
*page
, enum km_type type
)
814 ret
= PVOP_CALL2(unsigned long, pv_mmu_ops
.kmap_atomic_pte
, page
, type
);
819 static inline void pte_update(struct mm_struct
*mm
, unsigned long addr
,
822 PVOP_VCALL3(pv_mmu_ops
.pte_update
, mm
, addr
, ptep
);
825 static inline void pte_update_defer(struct mm_struct
*mm
, unsigned long addr
,
828 PVOP_VCALL3(pv_mmu_ops
.pte_update_defer
, mm
, addr
, ptep
);
831 #ifdef CONFIG_X86_PAE
832 static inline pte_t
__pte(unsigned long long val
)
834 unsigned long long ret
= PVOP_CALL2(unsigned long long,
837 return (pte_t
) { ret
, ret
>> 32 };
840 static inline pmd_t
__pmd(unsigned long long val
)
842 return (pmd_t
) { PVOP_CALL2(unsigned long long, pv_mmu_ops
.make_pmd
,
846 static inline pgd_t
__pgd(unsigned long long val
)
848 return (pgd_t
) { PVOP_CALL2(unsigned long long, pv_mmu_ops
.make_pgd
,
852 static inline unsigned long long pte_val(pte_t x
)
854 return PVOP_CALL2(unsigned long long, pv_mmu_ops
.pte_val
,
855 x
.pte_low
, x
.pte_high
);
858 static inline unsigned long long pmd_val(pmd_t x
)
860 return PVOP_CALL2(unsigned long long, pv_mmu_ops
.pmd_val
,
864 static inline unsigned long long pgd_val(pgd_t x
)
866 return PVOP_CALL2(unsigned long long, pv_mmu_ops
.pgd_val
,
870 static inline void set_pte(pte_t
*ptep
, pte_t pteval
)
872 PVOP_VCALL3(pv_mmu_ops
.set_pte
, ptep
, pteval
.pte_low
, pteval
.pte_high
);
875 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
876 pte_t
*ptep
, pte_t pteval
)
879 pv_mmu_ops
.set_pte_at(mm
, addr
, ptep
, pteval
);
882 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pteval
)
884 PVOP_VCALL3(pv_mmu_ops
.set_pte_atomic
, ptep
,
885 pteval
.pte_low
, pteval
.pte_high
);
888 static inline void set_pte_present(struct mm_struct
*mm
, unsigned long addr
,
889 pte_t
*ptep
, pte_t pte
)
892 pv_mmu_ops
.set_pte_present(mm
, addr
, ptep
, pte
);
895 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmdval
)
897 PVOP_VCALL3(pv_mmu_ops
.set_pmd
, pmdp
,
898 pmdval
.pmd
, pmdval
.pmd
>> 32);
901 static inline void set_pud(pud_t
*pudp
, pud_t pudval
)
903 PVOP_VCALL3(pv_mmu_ops
.set_pud
, pudp
,
904 pudval
.pgd
.pgd
, pudval
.pgd
.pgd
>> 32);
907 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
)
909 PVOP_VCALL3(pv_mmu_ops
.pte_clear
, mm
, addr
, ptep
);
912 static inline void pmd_clear(pmd_t
*pmdp
)
914 PVOP_VCALL1(pv_mmu_ops
.pmd_clear
, pmdp
);
917 #else /* !CONFIG_X86_PAE */
919 static inline pte_t
__pte(unsigned long val
)
921 return (pte_t
) { PVOP_CALL1(unsigned long, pv_mmu_ops
.make_pte
, val
) };
924 static inline pgd_t
__pgd(unsigned long val
)
926 return (pgd_t
) { PVOP_CALL1(unsigned long, pv_mmu_ops
.make_pgd
, val
) };
929 static inline unsigned long pte_val(pte_t x
)
931 return PVOP_CALL1(unsigned long, pv_mmu_ops
.pte_val
, x
.pte_low
);
934 static inline unsigned long pgd_val(pgd_t x
)
936 return PVOP_CALL1(unsigned long, pv_mmu_ops
.pgd_val
, x
.pgd
);
939 static inline void set_pte(pte_t
*ptep
, pte_t pteval
)
941 PVOP_VCALL2(pv_mmu_ops
.set_pte
, ptep
, pteval
.pte_low
);
944 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
945 pte_t
*ptep
, pte_t pteval
)
947 PVOP_VCALL4(pv_mmu_ops
.set_pte_at
, mm
, addr
, ptep
, pteval
.pte_low
);
950 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmdval
)
952 PVOP_VCALL2(pv_mmu_ops
.set_pmd
, pmdp
, pmdval
.pud
.pgd
.pgd
);
954 #endif /* CONFIG_X86_PAE */
956 /* Lazy mode for batching updates / context switch */
957 enum paravirt_lazy_mode
{
963 enum paravirt_lazy_mode
paravirt_get_lazy_mode(void);
964 void paravirt_enter_lazy_cpu(void);
965 void paravirt_leave_lazy_cpu(void);
966 void paravirt_enter_lazy_mmu(void);
967 void paravirt_leave_lazy_mmu(void);
968 void paravirt_leave_lazy(enum paravirt_lazy_mode mode
);
970 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
971 static inline void arch_enter_lazy_cpu_mode(void)
973 PVOP_VCALL0(pv_cpu_ops
.lazy_mode
.enter
);
976 static inline void arch_leave_lazy_cpu_mode(void)
978 PVOP_VCALL0(pv_cpu_ops
.lazy_mode
.leave
);
981 static inline void arch_flush_lazy_cpu_mode(void)
983 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU
)) {
984 arch_leave_lazy_cpu_mode();
985 arch_enter_lazy_cpu_mode();
990 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
991 static inline void arch_enter_lazy_mmu_mode(void)
993 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.enter
);
996 static inline void arch_leave_lazy_mmu_mode(void)
998 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.leave
);
1001 static inline void arch_flush_lazy_mmu_mode(void)
1003 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU
)) {
1004 arch_leave_lazy_mmu_mode();
1005 arch_enter_lazy_mmu_mode();
1009 void _paravirt_nop(void);
1010 #define paravirt_nop ((void *)_paravirt_nop)
1012 /* These all sit in the .parainstructions section to tell us what to patch. */
1013 struct paravirt_patch_site
{
1014 u8
*instr
; /* original instructions */
1015 u8 instrtype
; /* type of this instruction */
1016 u8 len
; /* length of original instruction */
1017 u16 clobbers
; /* what registers you may clobber */
1020 extern struct paravirt_patch_site __parainstructions
[],
1021 __parainstructions_end
[];
1023 static inline unsigned long __raw_local_save_flags(void)
1027 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1029 "popl %%edx; popl %%ecx")
1031 : paravirt_type(pv_irq_ops
.save_fl
),
1032 paravirt_clobber(CLBR_EAX
)
1037 static inline void raw_local_irq_restore(unsigned long f
)
1039 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1041 "popl %%edx; popl %%ecx")
1044 paravirt_type(pv_irq_ops
.restore_fl
),
1045 paravirt_clobber(CLBR_EAX
)
1049 static inline void raw_local_irq_disable(void)
1051 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1053 "popl %%edx; popl %%ecx")
1055 : paravirt_type(pv_irq_ops
.irq_disable
),
1056 paravirt_clobber(CLBR_EAX
)
1057 : "memory", "eax", "cc");
1060 static inline void raw_local_irq_enable(void)
1062 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1064 "popl %%edx; popl %%ecx")
1066 : paravirt_type(pv_irq_ops
.irq_enable
),
1067 paravirt_clobber(CLBR_EAX
)
1068 : "memory", "eax", "cc");
1071 static inline unsigned long __raw_local_irq_save(void)
1075 f
= __raw_local_save_flags();
1076 raw_local_irq_disable();
1080 #define CLI_STRING \
1081 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1082 "call *%[paravirt_cli_opptr];" \
1083 "popl %%edx; popl %%ecx", \
1084 "%c[paravirt_cli_type]", "%c[paravirt_clobber]")
1086 #define STI_STRING \
1087 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1088 "call *%[paravirt_sti_opptr];" \
1089 "popl %%edx; popl %%ecx", \
1090 "%c[paravirt_sti_type]", "%c[paravirt_clobber]")
1092 #define CLI_STI_CLOBBERS , "%eax"
1093 #define CLI_STI_INPUT_ARGS \
1095 [paravirt_cli_type] "i" (PARAVIRT_PATCH(pv_irq_ops.irq_disable)), \
1096 [paravirt_cli_opptr] "m" (pv_irq_ops.irq_disable), \
1097 [paravirt_sti_type] "i" (PARAVIRT_PATCH(pv_irq_ops.irq_enable)), \
1098 [paravirt_sti_opptr] "m" (pv_irq_ops.irq_enable), \
1099 paravirt_clobber(CLBR_EAX)
1101 /* Make sure as little as possible of this mess escapes. */
1102 #undef PARAVIRT_CALL
1116 #else /* __ASSEMBLY__ */
1118 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1120 #define PARA_SITE(ptype, clobbers, ops) \
1124 .pushsection .parainstructions,"a"; \
1131 #define INTERRUPT_RETURN \
1132 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1133 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1135 #define DISABLE_INTERRUPTS(clobbers) \
1136 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1137 pushl %eax; pushl %ecx; pushl %edx; \
1138 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1139 popl %edx; popl %ecx; popl %eax) \
1141 #define ENABLE_INTERRUPTS(clobbers) \
1142 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1143 pushl %eax; pushl %ecx; pushl %edx; \
1144 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1145 popl %edx; popl %ecx; popl %eax)
1147 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1148 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1150 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1152 #define GET_CR0_INTO_EAX \
1153 push %ecx; push %edx; \
1154 call *pv_cpu_ops+PV_CPU_read_cr0; \
1157 #endif /* __ASSEMBLY__ */
1158 #endif /* CONFIG_PARAVIRT */
1159 #endif /* __ASM_PARAVIRT_H */