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paravirt: refactor struct paravirt_ops into smaller pv_*_ops
[deliverable/linux.git] / include / asm-x86 / paravirt.h
1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/page.h>
8
9 /* Bitmask of what can be clobbered: usually at least eax. */
10 #define CLBR_NONE 0x0
11 #define CLBR_EAX 0x1
12 #define CLBR_ECX 0x2
13 #define CLBR_EDX 0x4
14 #define CLBR_ANY 0x7
15
16 #ifndef __ASSEMBLY__
17 #include <linux/types.h>
18 #include <linux/cpumask.h>
19 #include <asm/kmap_types.h>
20
21 struct page;
22 struct thread_struct;
23 struct Xgt_desc_struct;
24 struct tss_struct;
25 struct mm_struct;
26 struct desc_struct;
27
28 /* Lazy mode for batching updates / context switch */
29 enum paravirt_lazy_mode {
30 PARAVIRT_LAZY_NONE = 0,
31 PARAVIRT_LAZY_MMU = 1,
32 PARAVIRT_LAZY_CPU = 2,
33 PARAVIRT_LAZY_FLUSH = 3,
34 };
35
36
37 /* general info */
38 struct pv_info {
39 unsigned int kernel_rpl;
40 int shared_kernel_pmd;
41 int paravirt_enabled;
42 const char *name;
43 };
44
45 struct pv_init_ops {
46 /*
47 * Patch may replace one of the defined code sequences with
48 * arbitrary code, subject to the same register constraints.
49 * This generally means the code is not free to clobber any
50 * registers other than EAX. The patch function should return
51 * the number of bytes of code generated, as we nop pad the
52 * rest in generic code.
53 */
54 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
55 unsigned long addr, unsigned len);
56
57 /* Basic arch-specific setup */
58 void (*arch_setup)(void);
59 char *(*memory_setup)(void);
60 void (*post_allocator_init)(void);
61
62 /* Print a banner to identify the environment */
63 void (*banner)(void);
64 };
65
66
67 struct pv_misc_ops {
68 /* Set deferred update mode, used for batching operations. */
69 void (*set_lazy_mode)(enum paravirt_lazy_mode mode);
70 };
71
72 struct pv_time_ops {
73 void (*time_init)(void);
74
75 /* Set and set time of day */
76 unsigned long (*get_wallclock)(void);
77 int (*set_wallclock)(unsigned long);
78
79 unsigned long long (*sched_clock)(void);
80 unsigned long (*get_cpu_khz)(void);
81 };
82
83 struct pv_cpu_ops {
84 /* hooks for various privileged instructions */
85 unsigned long (*get_debugreg)(int regno);
86 void (*set_debugreg)(int regno, unsigned long value);
87
88 void (*clts)(void);
89
90 unsigned long (*read_cr0)(void);
91 void (*write_cr0)(unsigned long);
92
93 unsigned long (*read_cr4_safe)(void);
94 unsigned long (*read_cr4)(void);
95 void (*write_cr4)(unsigned long);
96
97 /* Segment descriptor handling */
98 void (*load_tr_desc)(void);
99 void (*load_gdt)(const struct Xgt_desc_struct *);
100 void (*load_idt)(const struct Xgt_desc_struct *);
101 void (*store_gdt)(struct Xgt_desc_struct *);
102 void (*store_idt)(struct Xgt_desc_struct *);
103 void (*set_ldt)(const void *desc, unsigned entries);
104 unsigned long (*store_tr)(void);
105 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
106 void (*write_ldt_entry)(struct desc_struct *,
107 int entrynum, u32 low, u32 high);
108 void (*write_gdt_entry)(struct desc_struct *,
109 int entrynum, u32 low, u32 high);
110 void (*write_idt_entry)(struct desc_struct *,
111 int entrynum, u32 low, u32 high);
112 void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t);
113
114 void (*set_iopl_mask)(unsigned mask);
115
116 void (*wbinvd)(void);
117 void (*io_delay)(void);
118
119 /* cpuid emulation, mostly so that caps bits can be disabled */
120 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
121 unsigned int *ecx, unsigned int *edx);
122
123 /* MSR, PMC and TSR operations.
124 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
125 u64 (*read_msr)(unsigned int msr, int *err);
126 int (*write_msr)(unsigned int msr, u64 val);
127
128 u64 (*read_tsc)(void);
129 u64 (*read_pmc)(void);
130
131 /* These two are jmp to, not actually called. */
132 void (*irq_enable_sysexit)(void);
133 void (*iret)(void);
134 };
135
136 struct pv_irq_ops {
137 void (*init_IRQ)(void);
138
139 /*
140 * Get/set interrupt state. save_fl and restore_fl are only
141 * expected to use X86_EFLAGS_IF; all other bits
142 * returned from save_fl are undefined, and may be ignored by
143 * restore_fl.
144 */
145 unsigned long (*save_fl)(void);
146 void (*restore_fl)(unsigned long);
147 void (*irq_disable)(void);
148 void (*irq_enable)(void);
149 void (*safe_halt)(void);
150 void (*halt)(void);
151 };
152
153 struct pv_apic_ops {
154 #ifdef CONFIG_X86_LOCAL_APIC
155 /*
156 * Direct APIC operations, principally for VMI. Ideally
157 * these shouldn't be in this interface.
158 */
159 void (*apic_write)(unsigned long reg, unsigned long v);
160 void (*apic_write_atomic)(unsigned long reg, unsigned long v);
161 unsigned long (*apic_read)(unsigned long reg);
162 void (*setup_boot_clock)(void);
163 void (*setup_secondary_clock)(void);
164
165 void (*startup_ipi_hook)(int phys_apicid,
166 unsigned long start_eip,
167 unsigned long start_esp);
168 #endif
169 };
170
171 struct pv_mmu_ops {
172 /*
173 * Called before/after init_mm pagetable setup. setup_start
174 * may reset %cr3, and may pre-install parts of the pagetable;
175 * pagetable setup is expected to preserve any existing
176 * mapping.
177 */
178 void (*pagetable_setup_start)(pgd_t *pgd_base);
179 void (*pagetable_setup_done)(pgd_t *pgd_base);
180
181 unsigned long (*read_cr2)(void);
182 void (*write_cr2)(unsigned long);
183
184 unsigned long (*read_cr3)(void);
185 void (*write_cr3)(unsigned long);
186
187 /*
188 * Hooks for intercepting the creation/use/destruction of an
189 * mm_struct.
190 */
191 void (*activate_mm)(struct mm_struct *prev,
192 struct mm_struct *next);
193 void (*dup_mmap)(struct mm_struct *oldmm,
194 struct mm_struct *mm);
195 void (*exit_mmap)(struct mm_struct *mm);
196
197
198 /* TLB operations */
199 void (*flush_tlb_user)(void);
200 void (*flush_tlb_kernel)(void);
201 void (*flush_tlb_single)(unsigned long addr);
202 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
203 unsigned long va);
204
205 /* Hooks for allocating/releasing pagetable pages */
206 void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
207 void (*alloc_pd)(u32 pfn);
208 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
209 void (*release_pt)(u32 pfn);
210 void (*release_pd)(u32 pfn);
211
212 /* Pagetable manipulation functions */
213 void (*set_pte)(pte_t *ptep, pte_t pteval);
214 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
215 pte_t *ptep, pte_t pteval);
216 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
217 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
218 void (*pte_update_defer)(struct mm_struct *mm,
219 unsigned long addr, pte_t *ptep);
220
221 #ifdef CONFIG_X86_PAE
222 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
223 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
224 pte_t *ptep, pte_t pte);
225 void (*set_pud)(pud_t *pudp, pud_t pudval);
226 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
227 void (*pmd_clear)(pmd_t *pmdp);
228
229 unsigned long long (*pte_val)(pte_t);
230 unsigned long long (*pmd_val)(pmd_t);
231 unsigned long long (*pgd_val)(pgd_t);
232
233 pte_t (*make_pte)(unsigned long long pte);
234 pmd_t (*make_pmd)(unsigned long long pmd);
235 pgd_t (*make_pgd)(unsigned long long pgd);
236 #else
237 unsigned long (*pte_val)(pte_t);
238 unsigned long (*pgd_val)(pgd_t);
239
240 pte_t (*make_pte)(unsigned long pte);
241 pgd_t (*make_pgd)(unsigned long pgd);
242 #endif
243
244 #ifdef CONFIG_HIGHPTE
245 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
246 #endif
247 };
248
249 /* This contains all the paravirt structures: we get a convenient
250 * number for each function using the offset which we use to indicate
251 * what to patch. */
252 struct paravirt_patch_template
253 {
254 struct pv_init_ops pv_init_ops;
255 struct pv_misc_ops pv_misc_ops;
256 struct pv_time_ops pv_time_ops;
257 struct pv_cpu_ops pv_cpu_ops;
258 struct pv_irq_ops pv_irq_ops;
259 struct pv_apic_ops pv_apic_ops;
260 struct pv_mmu_ops pv_mmu_ops;
261 };
262
263 extern struct pv_info pv_info;
264 extern struct pv_init_ops pv_init_ops;
265 extern struct pv_misc_ops pv_misc_ops;
266 extern struct pv_time_ops pv_time_ops;
267 extern struct pv_cpu_ops pv_cpu_ops;
268 extern struct pv_irq_ops pv_irq_ops;
269 extern struct pv_apic_ops pv_apic_ops;
270 extern struct pv_mmu_ops pv_mmu_ops;
271
272 #define PARAVIRT_PATCH(x) \
273 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
274
275 #define paravirt_type(op) \
276 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
277 [paravirt_opptr] "m" (op)
278 #define paravirt_clobber(clobber) \
279 [paravirt_clobber] "i" (clobber)
280
281 /*
282 * Generate some code, and mark it as patchable by the
283 * apply_paravirt() alternate instruction patcher.
284 */
285 #define _paravirt_alt(insn_string, type, clobber) \
286 "771:\n\t" insn_string "\n" "772:\n" \
287 ".pushsection .parainstructions,\"a\"\n" \
288 " .long 771b\n" \
289 " .byte " type "\n" \
290 " .byte 772b-771b\n" \
291 " .short " clobber "\n" \
292 ".popsection\n"
293
294 /* Generate patchable code, with the default asm parameters. */
295 #define paravirt_alt(insn_string) \
296 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
297
298 unsigned paravirt_patch_nop(void);
299 unsigned paravirt_patch_ignore(unsigned len);
300 unsigned paravirt_patch_call(void *insnbuf,
301 const void *target, u16 tgt_clobbers,
302 unsigned long addr, u16 site_clobbers,
303 unsigned len);
304 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
305 unsigned long addr, unsigned len);
306 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
307 unsigned long addr, unsigned len);
308
309 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
310 const char *start, const char *end);
311
312 int paravirt_disable_iospace(void);
313
314 /*
315 * This generates an indirect call based on the operation type number.
316 * The type number, computed in PARAVIRT_PATCH, is derived from the
317 * offset into the paravirt_patch_template structure, and can therefore be
318 * freely converted back into a structure offset.
319 */
320 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
321
322 /*
323 * These macros are intended to wrap calls through one of the paravirt
324 * ops structs, so that they can be later identified and patched at
325 * runtime.
326 *
327 * Normally, a call to a pv_op function is a simple indirect call:
328 * (paravirt_ops.operations)(args...).
329 *
330 * Unfortunately, this is a relatively slow operation for modern CPUs,
331 * because it cannot necessarily determine what the destination
332 * address is. In this case, the address is a runtime constant, so at
333 * the very least we can patch the call to e a simple direct call, or
334 * ideally, patch an inline implementation into the callsite. (Direct
335 * calls are essentially free, because the call and return addresses
336 * are completely predictable.)
337 *
338 * These macros rely on the standard gcc "regparm(3)" calling
339 * convention, in which the first three arguments are placed in %eax,
340 * %edx, %ecx (in that order), and the remaining arguments are placed
341 * on the stack. All caller-save registers (eax,edx,ecx) are expected
342 * to be modified (either clobbered or used for return values).
343 *
344 * The call instruction itself is marked by placing its start address
345 * and size into the .parainstructions section, so that
346 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
347 * appropriate patching under the control of the backend pv_init_ops
348 * implementation.
349 *
350 * Unfortunately there's no way to get gcc to generate the args setup
351 * for the call, and then allow the call itself to be generated by an
352 * inline asm. Because of this, we must do the complete arg setup and
353 * return value handling from within these macros. This is fairly
354 * cumbersome.
355 *
356 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
357 * It could be extended to more arguments, but there would be little
358 * to be gained from that. For each number of arguments, there are
359 * the two VCALL and CALL variants for void and non-void functions.
360 *
361 * When there is a return value, the invoker of the macro must specify
362 * the return type. The macro then uses sizeof() on that type to
363 * determine whether its a 32 or 64 bit value, and places the return
364 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
365 * 64-bit).
366 *
367 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
368 * in low,high order.
369 *
370 * Small structures are passed and returned in registers. The macro
371 * calling convention can't directly deal with this, so the wrapper
372 * functions must do this.
373 *
374 * These PVOP_* macros are only defined within this header. This
375 * means that all uses must be wrapped in inline functions. This also
376 * makes sure the incoming and outgoing types are always correct.
377 */
378 #define __PVOP_CALL(rettype, op, pre, post, ...) \
379 ({ \
380 rettype __ret; \
381 unsigned long __eax, __edx, __ecx; \
382 if (sizeof(rettype) > sizeof(unsigned long)) { \
383 asm volatile(pre \
384 paravirt_alt(PARAVIRT_CALL) \
385 post \
386 : "=a" (__eax), "=d" (__edx), \
387 "=c" (__ecx) \
388 : paravirt_type(op), \
389 paravirt_clobber(CLBR_ANY), \
390 ##__VA_ARGS__ \
391 : "memory", "cc"); \
392 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
393 } else { \
394 asm volatile(pre \
395 paravirt_alt(PARAVIRT_CALL) \
396 post \
397 : "=a" (__eax), "=d" (__edx), \
398 "=c" (__ecx) \
399 : paravirt_type(op), \
400 paravirt_clobber(CLBR_ANY), \
401 ##__VA_ARGS__ \
402 : "memory", "cc"); \
403 __ret = (rettype)__eax; \
404 } \
405 __ret; \
406 })
407 #define __PVOP_VCALL(op, pre, post, ...) \
408 ({ \
409 unsigned long __eax, __edx, __ecx; \
410 asm volatile(pre \
411 paravirt_alt(PARAVIRT_CALL) \
412 post \
413 : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
414 : paravirt_type(op), \
415 paravirt_clobber(CLBR_ANY), \
416 ##__VA_ARGS__ \
417 : "memory", "cc"); \
418 })
419
420 #define PVOP_CALL0(rettype, op) \
421 __PVOP_CALL(rettype, op, "", "")
422 #define PVOP_VCALL0(op) \
423 __PVOP_VCALL(op, "", "")
424
425 #define PVOP_CALL1(rettype, op, arg1) \
426 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)))
427 #define PVOP_VCALL1(op, arg1) \
428 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)))
429
430 #define PVOP_CALL2(rettype, op, arg1, arg2) \
431 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
432 #define PVOP_VCALL2(op, arg1, arg2) \
433 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
434
435 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
436 __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), \
437 "1"((u32)(arg2)), "2"((u32)(arg3)))
438 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
439 __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)), \
440 "2"((u32)(arg3)))
441
442 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
443 __PVOP_CALL(rettype, op, \
444 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
445 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
446 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
447 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
448 __PVOP_VCALL(op, \
449 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
450 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
451 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
452
453 static inline int paravirt_enabled(void)
454 {
455 return pv_info.paravirt_enabled;
456 }
457
458 static inline void load_esp0(struct tss_struct *tss,
459 struct thread_struct *thread)
460 {
461 PVOP_VCALL2(pv_cpu_ops.load_esp0, tss, thread);
462 }
463
464 #define ARCH_SETUP pv_init_ops.arch_setup();
465 static inline unsigned long get_wallclock(void)
466 {
467 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
468 }
469
470 static inline int set_wallclock(unsigned long nowtime)
471 {
472 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
473 }
474
475 static inline void (*choose_time_init(void))(void)
476 {
477 return pv_time_ops.time_init;
478 }
479
480 /* The paravirtualized CPUID instruction. */
481 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
482 unsigned int *ecx, unsigned int *edx)
483 {
484 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
485 }
486
487 /*
488 * These special macros can be used to get or set a debugging register
489 */
490 static inline unsigned long paravirt_get_debugreg(int reg)
491 {
492 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
493 }
494 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
495 static inline void set_debugreg(unsigned long val, int reg)
496 {
497 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
498 }
499
500 static inline void clts(void)
501 {
502 PVOP_VCALL0(pv_cpu_ops.clts);
503 }
504
505 static inline unsigned long read_cr0(void)
506 {
507 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
508 }
509
510 static inline void write_cr0(unsigned long x)
511 {
512 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
513 }
514
515 static inline unsigned long read_cr2(void)
516 {
517 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
518 }
519
520 static inline void write_cr2(unsigned long x)
521 {
522 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
523 }
524
525 static inline unsigned long read_cr3(void)
526 {
527 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
528 }
529
530 static inline void write_cr3(unsigned long x)
531 {
532 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
533 }
534
535 static inline unsigned long read_cr4(void)
536 {
537 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
538 }
539 static inline unsigned long read_cr4_safe(void)
540 {
541 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
542 }
543
544 static inline void write_cr4(unsigned long x)
545 {
546 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
547 }
548
549 static inline void raw_safe_halt(void)
550 {
551 PVOP_VCALL0(pv_irq_ops.safe_halt);
552 }
553
554 static inline void halt(void)
555 {
556 PVOP_VCALL0(pv_irq_ops.safe_halt);
557 }
558
559 static inline void wbinvd(void)
560 {
561 PVOP_VCALL0(pv_cpu_ops.wbinvd);
562 }
563
564 #define get_kernel_rpl() (pv_info.kernel_rpl)
565
566 static inline u64 paravirt_read_msr(unsigned msr, int *err)
567 {
568 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
569 }
570 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
571 {
572 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
573 }
574
575 /* These should all do BUG_ON(_err), but our headers are too tangled. */
576 #define rdmsr(msr,val1,val2) do { \
577 int _err; \
578 u64 _l = paravirt_read_msr(msr, &_err); \
579 val1 = (u32)_l; \
580 val2 = _l >> 32; \
581 } while(0)
582
583 #define wrmsr(msr,val1,val2) do { \
584 paravirt_write_msr(msr, val1, val2); \
585 } while(0)
586
587 #define rdmsrl(msr,val) do { \
588 int _err; \
589 val = paravirt_read_msr(msr, &_err); \
590 } while(0)
591
592 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
593 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
594
595 /* rdmsr with exception handling */
596 #define rdmsr_safe(msr,a,b) ({ \
597 int _err; \
598 u64 _l = paravirt_read_msr(msr, &_err); \
599 (*a) = (u32)_l; \
600 (*b) = _l >> 32; \
601 _err; })
602
603
604 static inline u64 paravirt_read_tsc(void)
605 {
606 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
607 }
608
609 #define rdtscl(low) do { \
610 u64 _l = paravirt_read_tsc(); \
611 low = (int)_l; \
612 } while(0)
613
614 #define rdtscll(val) (val = paravirt_read_tsc())
615
616 static inline unsigned long long paravirt_sched_clock(void)
617 {
618 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
619 }
620 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
621
622 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
623
624 static inline unsigned long long paravirt_read_pmc(int counter)
625 {
626 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
627 }
628
629 #define rdpmc(counter,low,high) do { \
630 u64 _l = paravirt_read_pmc(counter); \
631 low = (u32)_l; \
632 high = _l >> 32; \
633 } while(0)
634
635 static inline void load_TR_desc(void)
636 {
637 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
638 }
639 static inline void load_gdt(const struct Xgt_desc_struct *dtr)
640 {
641 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
642 }
643 static inline void load_idt(const struct Xgt_desc_struct *dtr)
644 {
645 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
646 }
647 static inline void set_ldt(const void *addr, unsigned entries)
648 {
649 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
650 }
651 static inline void store_gdt(struct Xgt_desc_struct *dtr)
652 {
653 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
654 }
655 static inline void store_idt(struct Xgt_desc_struct *dtr)
656 {
657 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
658 }
659 static inline unsigned long paravirt_store_tr(void)
660 {
661 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
662 }
663 #define store_tr(tr) ((tr) = paravirt_store_tr())
664 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
665 {
666 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
667 }
668 static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high)
669 {
670 PVOP_VCALL4(pv_cpu_ops.write_ldt_entry, dt, entry, low, high);
671 }
672 static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high)
673 {
674 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, low, high);
675 }
676 static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high)
677 {
678 PVOP_VCALL4(pv_cpu_ops.write_idt_entry, dt, entry, low, high);
679 }
680 static inline void set_iopl_mask(unsigned mask)
681 {
682 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
683 }
684
685 /* The paravirtualized I/O functions */
686 static inline void slow_down_io(void) {
687 pv_cpu_ops.io_delay();
688 #ifdef REALLY_SLOW_IO
689 pv_cpu_ops.io_delay();
690 pv_cpu_ops.io_delay();
691 pv_cpu_ops.io_delay();
692 #endif
693 }
694
695 #ifdef CONFIG_X86_LOCAL_APIC
696 /*
697 * Basic functions accessing APICs.
698 */
699 static inline void apic_write(unsigned long reg, unsigned long v)
700 {
701 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
702 }
703
704 static inline void apic_write_atomic(unsigned long reg, unsigned long v)
705 {
706 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
707 }
708
709 static inline unsigned long apic_read(unsigned long reg)
710 {
711 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
712 }
713
714 static inline void setup_boot_clock(void)
715 {
716 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
717 }
718
719 static inline void setup_secondary_clock(void)
720 {
721 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
722 }
723 #endif
724
725 static inline void paravirt_post_allocator_init(void)
726 {
727 if (pv_init_ops.post_allocator_init)
728 (*pv_init_ops.post_allocator_init)();
729 }
730
731 static inline void paravirt_pagetable_setup_start(pgd_t *base)
732 {
733 (*pv_mmu_ops.pagetable_setup_start)(base);
734 }
735
736 static inline void paravirt_pagetable_setup_done(pgd_t *base)
737 {
738 (*pv_mmu_ops.pagetable_setup_done)(base);
739 }
740
741 #ifdef CONFIG_SMP
742 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
743 unsigned long start_esp)
744 {
745 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
746 phys_apicid, start_eip, start_esp);
747 }
748 #endif
749
750 static inline void paravirt_activate_mm(struct mm_struct *prev,
751 struct mm_struct *next)
752 {
753 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
754 }
755
756 static inline void arch_dup_mmap(struct mm_struct *oldmm,
757 struct mm_struct *mm)
758 {
759 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
760 }
761
762 static inline void arch_exit_mmap(struct mm_struct *mm)
763 {
764 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
765 }
766
767 static inline void __flush_tlb(void)
768 {
769 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
770 }
771 static inline void __flush_tlb_global(void)
772 {
773 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
774 }
775 static inline void __flush_tlb_single(unsigned long addr)
776 {
777 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
778 }
779
780 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
781 unsigned long va)
782 {
783 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
784 }
785
786 static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
787 {
788 PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn);
789 }
790 static inline void paravirt_release_pt(unsigned pfn)
791 {
792 PVOP_VCALL1(pv_mmu_ops.release_pt, pfn);
793 }
794
795 static inline void paravirt_alloc_pd(unsigned pfn)
796 {
797 PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn);
798 }
799
800 static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
801 unsigned start, unsigned count)
802 {
803 PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count);
804 }
805 static inline void paravirt_release_pd(unsigned pfn)
806 {
807 PVOP_VCALL1(pv_mmu_ops.release_pd, pfn);
808 }
809
810 #ifdef CONFIG_HIGHPTE
811 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
812 {
813 unsigned long ret;
814 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
815 return (void *)ret;
816 }
817 #endif
818
819 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
820 pte_t *ptep)
821 {
822 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
823 }
824
825 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
826 pte_t *ptep)
827 {
828 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
829 }
830
831 #ifdef CONFIG_X86_PAE
832 static inline pte_t __pte(unsigned long long val)
833 {
834 unsigned long long ret = PVOP_CALL2(unsigned long long,
835 pv_mmu_ops.make_pte,
836 val, val >> 32);
837 return (pte_t) { ret, ret >> 32 };
838 }
839
840 static inline pmd_t __pmd(unsigned long long val)
841 {
842 return (pmd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pmd,
843 val, val >> 32) };
844 }
845
846 static inline pgd_t __pgd(unsigned long long val)
847 {
848 return (pgd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pgd,
849 val, val >> 32) };
850 }
851
852 static inline unsigned long long pte_val(pte_t x)
853 {
854 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pte_val,
855 x.pte_low, x.pte_high);
856 }
857
858 static inline unsigned long long pmd_val(pmd_t x)
859 {
860 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pmd_val,
861 x.pmd, x.pmd >> 32);
862 }
863
864 static inline unsigned long long pgd_val(pgd_t x)
865 {
866 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pgd_val,
867 x.pgd, x.pgd >> 32);
868 }
869
870 static inline void set_pte(pte_t *ptep, pte_t pteval)
871 {
872 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high);
873 }
874
875 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
876 pte_t *ptep, pte_t pteval)
877 {
878 /* 5 arg words */
879 pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval);
880 }
881
882 static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
883 {
884 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
885 pteval.pte_low, pteval.pte_high);
886 }
887
888 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
889 pte_t *ptep, pte_t pte)
890 {
891 /* 5 arg words */
892 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
893 }
894
895 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
896 {
897 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp,
898 pmdval.pmd, pmdval.pmd >> 32);
899 }
900
901 static inline void set_pud(pud_t *pudp, pud_t pudval)
902 {
903 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
904 pudval.pgd.pgd, pudval.pgd.pgd >> 32);
905 }
906
907 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
908 {
909 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
910 }
911
912 static inline void pmd_clear(pmd_t *pmdp)
913 {
914 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
915 }
916
917 #else /* !CONFIG_X86_PAE */
918
919 static inline pte_t __pte(unsigned long val)
920 {
921 return (pte_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pte, val) };
922 }
923
924 static inline pgd_t __pgd(unsigned long val)
925 {
926 return (pgd_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pgd, val) };
927 }
928
929 static inline unsigned long pte_val(pte_t x)
930 {
931 return PVOP_CALL1(unsigned long, pv_mmu_ops.pte_val, x.pte_low);
932 }
933
934 static inline unsigned long pgd_val(pgd_t x)
935 {
936 return PVOP_CALL1(unsigned long, pv_mmu_ops.pgd_val, x.pgd);
937 }
938
939 static inline void set_pte(pte_t *ptep, pte_t pteval)
940 {
941 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low);
942 }
943
944 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
945 pte_t *ptep, pte_t pteval)
946 {
947 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low);
948 }
949
950 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
951 {
952 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd);
953 }
954 #endif /* CONFIG_X86_PAE */
955
956 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
957 static inline void arch_enter_lazy_cpu_mode(void)
958 {
959 PVOP_VCALL1(pv_misc_ops.set_lazy_mode, PARAVIRT_LAZY_CPU);
960 }
961
962 static inline void arch_leave_lazy_cpu_mode(void)
963 {
964 PVOP_VCALL1(pv_misc_ops.set_lazy_mode, PARAVIRT_LAZY_NONE);
965 }
966
967 static inline void arch_flush_lazy_cpu_mode(void)
968 {
969 PVOP_VCALL1(pv_misc_ops.set_lazy_mode, PARAVIRT_LAZY_FLUSH);
970 }
971
972
973 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
974 static inline void arch_enter_lazy_mmu_mode(void)
975 {
976 PVOP_VCALL1(pv_misc_ops.set_lazy_mode, PARAVIRT_LAZY_MMU);
977 }
978
979 static inline void arch_leave_lazy_mmu_mode(void)
980 {
981 PVOP_VCALL1(pv_misc_ops.set_lazy_mode, PARAVIRT_LAZY_NONE);
982 }
983
984 static inline void arch_flush_lazy_mmu_mode(void)
985 {
986 PVOP_VCALL1(pv_misc_ops.set_lazy_mode, PARAVIRT_LAZY_FLUSH);
987 }
988
989 void _paravirt_nop(void);
990 #define paravirt_nop ((void *)_paravirt_nop)
991
992 /* These all sit in the .parainstructions section to tell us what to patch. */
993 struct paravirt_patch_site {
994 u8 *instr; /* original instructions */
995 u8 instrtype; /* type of this instruction */
996 u8 len; /* length of original instruction */
997 u16 clobbers; /* what registers you may clobber */
998 };
999
1000 extern struct paravirt_patch_site __parainstructions[],
1001 __parainstructions_end[];
1002
1003 static inline unsigned long __raw_local_save_flags(void)
1004 {
1005 unsigned long f;
1006
1007 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1008 PARAVIRT_CALL
1009 "popl %%edx; popl %%ecx")
1010 : "=a"(f)
1011 : paravirt_type(pv_irq_ops.save_fl),
1012 paravirt_clobber(CLBR_EAX)
1013 : "memory", "cc");
1014 return f;
1015 }
1016
1017 static inline void raw_local_irq_restore(unsigned long f)
1018 {
1019 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1020 PARAVIRT_CALL
1021 "popl %%edx; popl %%ecx")
1022 : "=a"(f)
1023 : "0"(f),
1024 paravirt_type(pv_irq_ops.restore_fl),
1025 paravirt_clobber(CLBR_EAX)
1026 : "memory", "cc");
1027 }
1028
1029 static inline void raw_local_irq_disable(void)
1030 {
1031 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1032 PARAVIRT_CALL
1033 "popl %%edx; popl %%ecx")
1034 :
1035 : paravirt_type(pv_irq_ops.irq_disable),
1036 paravirt_clobber(CLBR_EAX)
1037 : "memory", "eax", "cc");
1038 }
1039
1040 static inline void raw_local_irq_enable(void)
1041 {
1042 asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
1043 PARAVIRT_CALL
1044 "popl %%edx; popl %%ecx")
1045 :
1046 : paravirt_type(pv_irq_ops.irq_enable),
1047 paravirt_clobber(CLBR_EAX)
1048 : "memory", "eax", "cc");
1049 }
1050
1051 static inline unsigned long __raw_local_irq_save(void)
1052 {
1053 unsigned long f;
1054
1055 f = __raw_local_save_flags();
1056 raw_local_irq_disable();
1057 return f;
1058 }
1059
1060 #define CLI_STRING \
1061 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1062 "call *%[paravirt_cli_opptr];" \
1063 "popl %%edx; popl %%ecx", \
1064 "%c[paravirt_cli_type]", "%c[paravirt_clobber]")
1065
1066 #define STI_STRING \
1067 _paravirt_alt("pushl %%ecx; pushl %%edx;" \
1068 "call *%[paravirt_sti_opptr];" \
1069 "popl %%edx; popl %%ecx", \
1070 "%c[paravirt_sti_type]", "%c[paravirt_clobber]")
1071
1072 #define CLI_STI_CLOBBERS , "%eax"
1073 #define CLI_STI_INPUT_ARGS \
1074 , \
1075 [paravirt_cli_type] "i" (PARAVIRT_PATCH(pv_irq_ops.irq_disable)), \
1076 [paravirt_cli_opptr] "m" (pv_irq_ops.irq_disable), \
1077 [paravirt_sti_type] "i" (PARAVIRT_PATCH(pv_irq_ops.irq_enable)), \
1078 [paravirt_sti_opptr] "m" (pv_irq_ops.irq_enable), \
1079 paravirt_clobber(CLBR_EAX)
1080
1081 /* Make sure as little as possible of this mess escapes. */
1082 #undef PARAVIRT_CALL
1083 #undef __PVOP_CALL
1084 #undef __PVOP_VCALL
1085 #undef PVOP_VCALL0
1086 #undef PVOP_CALL0
1087 #undef PVOP_VCALL1
1088 #undef PVOP_CALL1
1089 #undef PVOP_VCALL2
1090 #undef PVOP_CALL2
1091 #undef PVOP_VCALL3
1092 #undef PVOP_CALL3
1093 #undef PVOP_VCALL4
1094 #undef PVOP_CALL4
1095
1096 #else /* __ASSEMBLY__ */
1097
1098 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1099
1100 #define PARA_SITE(ptype, clobbers, ops) \
1101 771:; \
1102 ops; \
1103 772:; \
1104 .pushsection .parainstructions,"a"; \
1105 .long 771b; \
1106 .byte ptype; \
1107 .byte 772b-771b; \
1108 .short clobbers; \
1109 .popsection
1110
1111 #define INTERRUPT_RETURN \
1112 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1113 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1114
1115 #define DISABLE_INTERRUPTS(clobbers) \
1116 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1117 pushl %eax; pushl %ecx; pushl %edx; \
1118 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1119 popl %edx; popl %ecx; popl %eax) \
1120
1121 #define ENABLE_INTERRUPTS(clobbers) \
1122 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1123 pushl %eax; pushl %ecx; pushl %edx; \
1124 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1125 popl %edx; popl %ecx; popl %eax)
1126
1127 #define ENABLE_INTERRUPTS_SYSEXIT \
1128 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), CLBR_NONE,\
1129 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_sysexit)
1130
1131 #define GET_CR0_INTO_EAX \
1132 push %ecx; push %edx; \
1133 call *pv_cpu_ops+PV_CPU_read_cr0; \
1134 pop %edx; pop %ecx
1135
1136 #endif /* __ASSEMBLY__ */
1137 #endif /* CONFIG_PARAVIRT */
1138 #endif /* __ASM_PARAVIRT_H */
Linux kernel - Deliverables
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