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x86/paravirt: common implementation for pmd value ops
[deliverable/linux.git] / include / asm-x86 / paravirt.h
1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/page.h>
8 #include <asm/asm.h>
9
10 /* Bitmask of what can be clobbered: usually at least eax. */
11 #define CLBR_NONE 0
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
15
16 #ifdef CONFIG_X86_64
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
25 #else
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
28 #endif /* X86_64 */
29
30 #ifndef __ASSEMBLY__
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
35
36 struct page;
37 struct thread_struct;
38 struct desc_ptr;
39 struct tss_struct;
40 struct mm_struct;
41 struct desc_struct;
42
43 /* general info */
44 struct pv_info {
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
47 int paravirt_enabled;
48 const char *name;
49 };
50
51 struct pv_init_ops {
52 /*
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
59 */
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
62
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
67
68 /* Print a banner to identify the environment */
69 void (*banner)(void);
70 };
71
72
73 struct pv_lazy_ops {
74 /* Set deferred update mode, used for batching operations. */
75 void (*enter)(void);
76 void (*leave)(void);
77 };
78
79 struct pv_time_ops {
80 void (*time_init)(void);
81
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
85
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
88 };
89
90 struct pv_cpu_ops {
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
94
95 void (*clts)(void);
96
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
99
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
103
104 /* Segment descriptor handling */
105 void (*load_tr_desc)(void);
106 void (*load_gdt)(const struct desc_ptr *);
107 void (*load_idt)(const struct desc_ptr *);
108 void (*store_gdt)(struct desc_ptr *);
109 void (*store_idt)(struct desc_ptr *);
110 void (*set_ldt)(const void *desc, unsigned entries);
111 unsigned long (*store_tr)(void);
112 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
113 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
114 const void *desc);
115 void (*write_gdt_entry)(struct desc_struct *,
116 int entrynum, const void *desc, int size);
117 void (*write_idt_entry)(gate_desc *,
118 int entrynum, const gate_desc *gate);
119 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
120
121 void (*set_iopl_mask)(unsigned mask);
122
123 void (*wbinvd)(void);
124 void (*io_delay)(void);
125
126 /* cpuid emulation, mostly so that caps bits can be disabled */
127 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
128 unsigned int *ecx, unsigned int *edx);
129
130 /* MSR, PMC and TSR operations.
131 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
132 u64 (*read_msr)(unsigned int msr, int *err);
133 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
134
135 u64 (*read_tsc)(void);
136 u64 (*read_pmc)(int counter);
137 unsigned long long (*read_tscp)(unsigned int *aux);
138
139 /* These two are jmp to, not actually called. */
140 void (*irq_enable_syscall_ret)(void);
141 void (*iret)(void);
142
143 void (*swapgs)(void);
144
145 struct pv_lazy_ops lazy_mode;
146 };
147
148 struct pv_irq_ops {
149 void (*init_IRQ)(void);
150
151 /*
152 * Get/set interrupt state. save_fl and restore_fl are only
153 * expected to use X86_EFLAGS_IF; all other bits
154 * returned from save_fl are undefined, and may be ignored by
155 * restore_fl.
156 */
157 unsigned long (*save_fl)(void);
158 void (*restore_fl)(unsigned long);
159 void (*irq_disable)(void);
160 void (*irq_enable)(void);
161 void (*safe_halt)(void);
162 void (*halt)(void);
163 };
164
165 struct pv_apic_ops {
166 #ifdef CONFIG_X86_LOCAL_APIC
167 /*
168 * Direct APIC operations, principally for VMI. Ideally
169 * these shouldn't be in this interface.
170 */
171 void (*apic_write)(unsigned long reg, u32 v);
172 void (*apic_write_atomic)(unsigned long reg, u32 v);
173 u32 (*apic_read)(unsigned long reg);
174 void (*setup_boot_clock)(void);
175 void (*setup_secondary_clock)(void);
176
177 void (*startup_ipi_hook)(int phys_apicid,
178 unsigned long start_eip,
179 unsigned long start_esp);
180 #endif
181 };
182
183 struct pv_mmu_ops {
184 /*
185 * Called before/after init_mm pagetable setup. setup_start
186 * may reset %cr3, and may pre-install parts of the pagetable;
187 * pagetable setup is expected to preserve any existing
188 * mapping.
189 */
190 void (*pagetable_setup_start)(pgd_t *pgd_base);
191 void (*pagetable_setup_done)(pgd_t *pgd_base);
192
193 unsigned long (*read_cr2)(void);
194 void (*write_cr2)(unsigned long);
195
196 unsigned long (*read_cr3)(void);
197 void (*write_cr3)(unsigned long);
198
199 /*
200 * Hooks for intercepting the creation/use/destruction of an
201 * mm_struct.
202 */
203 void (*activate_mm)(struct mm_struct *prev,
204 struct mm_struct *next);
205 void (*dup_mmap)(struct mm_struct *oldmm,
206 struct mm_struct *mm);
207 void (*exit_mmap)(struct mm_struct *mm);
208
209
210 /* TLB operations */
211 void (*flush_tlb_user)(void);
212 void (*flush_tlb_kernel)(void);
213 void (*flush_tlb_single)(unsigned long addr);
214 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
215 unsigned long va);
216
217 /* Hooks for allocating/releasing pagetable pages */
218 void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
219 void (*alloc_pd)(u32 pfn);
220 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
221 void (*release_pt)(u32 pfn);
222 void (*release_pd)(u32 pfn);
223
224 /* Pagetable manipulation functions */
225 void (*set_pte)(pte_t *ptep, pte_t pteval);
226 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
227 pte_t *ptep, pte_t pteval);
228 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
229 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
230 void (*pte_update_defer)(struct mm_struct *mm,
231 unsigned long addr, pte_t *ptep);
232
233 pteval_t (*pte_val)(pte_t);
234 pte_t (*make_pte)(pteval_t pte);
235
236 pgdval_t (*pgd_val)(pgd_t);
237 pgd_t (*make_pgd)(pgdval_t pgd);
238
239 #if PAGETABLE_LEVELS >= 3
240 #ifdef CONFIG_X86_PAE
241 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
242 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
243 pte_t *ptep, pte_t pte);
244 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
245 void (*pmd_clear)(pmd_t *pmdp);
246
247 #endif /* CONFIG_X86_PAE */
248
249 void (*set_pud)(pud_t *pudp, pud_t pudval);
250
251 pmdval_t (*pmd_val)(pmd_t);
252 pmd_t (*make_pmd)(pmdval_t pmd);
253
254 #if PAGETABLE_LEVELS == 4
255 pudval_t (*pud_val)(pud_t);
256 pud_t (*make_pud)(pudval_t pud);
257 #endif /* PAGETABLE_LEVELS == 4 */
258 #endif /* PAGETABLE_LEVELS >= 3 */
259
260 #ifdef CONFIG_HIGHPTE
261 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
262 #endif
263
264 struct pv_lazy_ops lazy_mode;
265 };
266
267 /* This contains all the paravirt structures: we get a convenient
268 * number for each function using the offset which we use to indicate
269 * what to patch. */
270 struct paravirt_patch_template
271 {
272 struct pv_init_ops pv_init_ops;
273 struct pv_time_ops pv_time_ops;
274 struct pv_cpu_ops pv_cpu_ops;
275 struct pv_irq_ops pv_irq_ops;
276 struct pv_apic_ops pv_apic_ops;
277 struct pv_mmu_ops pv_mmu_ops;
278 };
279
280 extern struct pv_info pv_info;
281 extern struct pv_init_ops pv_init_ops;
282 extern struct pv_time_ops pv_time_ops;
283 extern struct pv_cpu_ops pv_cpu_ops;
284 extern struct pv_irq_ops pv_irq_ops;
285 extern struct pv_apic_ops pv_apic_ops;
286 extern struct pv_mmu_ops pv_mmu_ops;
287
288 #define PARAVIRT_PATCH(x) \
289 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
290
291 #define paravirt_type(op) \
292 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
293 [paravirt_opptr] "m" (op)
294 #define paravirt_clobber(clobber) \
295 [paravirt_clobber] "i" (clobber)
296
297 /*
298 * Generate some code, and mark it as patchable by the
299 * apply_paravirt() alternate instruction patcher.
300 */
301 #define _paravirt_alt(insn_string, type, clobber) \
302 "771:\n\t" insn_string "\n" "772:\n" \
303 ".pushsection .parainstructions,\"a\"\n" \
304 _ASM_ALIGN "\n" \
305 _ASM_PTR " 771b\n" \
306 " .byte " type "\n" \
307 " .byte 772b-771b\n" \
308 " .short " clobber "\n" \
309 ".popsection\n"
310
311 /* Generate patchable code, with the default asm parameters. */
312 #define paravirt_alt(insn_string) \
313 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
314
315 /* Simple instruction patching code. */
316 #define DEF_NATIVE(ops, name, code) \
317 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
318 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
319
320 unsigned paravirt_patch_nop(void);
321 unsigned paravirt_patch_ignore(unsigned len);
322 unsigned paravirt_patch_call(void *insnbuf,
323 const void *target, u16 tgt_clobbers,
324 unsigned long addr, u16 site_clobbers,
325 unsigned len);
326 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
327 unsigned long addr, unsigned len);
328 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
329 unsigned long addr, unsigned len);
330
331 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
332 const char *start, const char *end);
333
334 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
335 unsigned long addr, unsigned len);
336
337 int paravirt_disable_iospace(void);
338
339 /*
340 * This generates an indirect call based on the operation type number.
341 * The type number, computed in PARAVIRT_PATCH, is derived from the
342 * offset into the paravirt_patch_template structure, and can therefore be
343 * freely converted back into a structure offset.
344 */
345 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
346
347 /*
348 * These macros are intended to wrap calls through one of the paravirt
349 * ops structs, so that they can be later identified and patched at
350 * runtime.
351 *
352 * Normally, a call to a pv_op function is a simple indirect call:
353 * (pv_op_struct.operations)(args...).
354 *
355 * Unfortunately, this is a relatively slow operation for modern CPUs,
356 * because it cannot necessarily determine what the destination
357 * address is. In this case, the address is a runtime constant, so at
358 * the very least we can patch the call to e a simple direct call, or
359 * ideally, patch an inline implementation into the callsite. (Direct
360 * calls are essentially free, because the call and return addresses
361 * are completely predictable.)
362 *
363 * For i386, these macros rely on the standard gcc "regparm(3)" calling
364 * convention, in which the first three arguments are placed in %eax,
365 * %edx, %ecx (in that order), and the remaining arguments are placed
366 * on the stack. All caller-save registers (eax,edx,ecx) are expected
367 * to be modified (either clobbered or used for return values).
368 * X86_64, on the other hand, already specifies a register-based calling
369 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
370 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
371 * special handling for dealing with 4 arguments, unlike i386.
372 * However, x86_64 also have to clobber all caller saved registers, which
373 * unfortunately, are quite a bit (r8 - r11)
374 *
375 * The call instruction itself is marked by placing its start address
376 * and size into the .parainstructions section, so that
377 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
378 * appropriate patching under the control of the backend pv_init_ops
379 * implementation.
380 *
381 * Unfortunately there's no way to get gcc to generate the args setup
382 * for the call, and then allow the call itself to be generated by an
383 * inline asm. Because of this, we must do the complete arg setup and
384 * return value handling from within these macros. This is fairly
385 * cumbersome.
386 *
387 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
388 * It could be extended to more arguments, but there would be little
389 * to be gained from that. For each number of arguments, there are
390 * the two VCALL and CALL variants for void and non-void functions.
391 *
392 * When there is a return value, the invoker of the macro must specify
393 * the return type. The macro then uses sizeof() on that type to
394 * determine whether its a 32 or 64 bit value, and places the return
395 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
396 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
397 * the return value size.
398 *
399 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
400 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
401 * in low,high order
402 *
403 * Small structures are passed and returned in registers. The macro
404 * calling convention can't directly deal with this, so the wrapper
405 * functions must do this.
406 *
407 * These PVOP_* macros are only defined within this header. This
408 * means that all uses must be wrapped in inline functions. This also
409 * makes sure the incoming and outgoing types are always correct.
410 */
411 #ifdef CONFIG_X86_32
412 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
413 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
414 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
415 "=c" (__ecx)
416 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
417 #define EXTRA_CLOBBERS
418 #define VEXTRA_CLOBBERS
419 #else
420 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
421 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
422 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
423 "=S" (__esi), "=d" (__edx), \
424 "=c" (__ecx)
425
426 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
427
428 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
429 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
430 #endif
431
432 #define __PVOP_CALL(rettype, op, pre, post, ...) \
433 ({ \
434 rettype __ret; \
435 PVOP_CALL_ARGS; \
436 /* This is 32-bit specific, but is okay in 64-bit */ \
437 /* since this condition will never hold */ \
438 if (sizeof(rettype) > sizeof(unsigned long)) { \
439 asm volatile(pre \
440 paravirt_alt(PARAVIRT_CALL) \
441 post \
442 : PVOP_CALL_CLOBBERS \
443 : paravirt_type(op), \
444 paravirt_clobber(CLBR_ANY), \
445 ##__VA_ARGS__ \
446 : "memory", "cc" EXTRA_CLOBBERS); \
447 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
448 } else { \
449 asm volatile(pre \
450 paravirt_alt(PARAVIRT_CALL) \
451 post \
452 : PVOP_CALL_CLOBBERS \
453 : paravirt_type(op), \
454 paravirt_clobber(CLBR_ANY), \
455 ##__VA_ARGS__ \
456 : "memory", "cc" EXTRA_CLOBBERS); \
457 __ret = (rettype)__eax; \
458 } \
459 __ret; \
460 })
461 #define __PVOP_VCALL(op, pre, post, ...) \
462 ({ \
463 PVOP_VCALL_ARGS; \
464 asm volatile(pre \
465 paravirt_alt(PARAVIRT_CALL) \
466 post \
467 : PVOP_VCALL_CLOBBERS \
468 : paravirt_type(op), \
469 paravirt_clobber(CLBR_ANY), \
470 ##__VA_ARGS__ \
471 : "memory", "cc" VEXTRA_CLOBBERS); \
472 })
473
474 #define PVOP_CALL0(rettype, op) \
475 __PVOP_CALL(rettype, op, "", "")
476 #define PVOP_VCALL0(op) \
477 __PVOP_VCALL(op, "", "")
478
479 #define PVOP_CALL1(rettype, op, arg1) \
480 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
481 #define PVOP_VCALL1(op, arg1) \
482 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
483
484 #define PVOP_CALL2(rettype, op, arg1, arg2) \
485 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
486 "1" ((unsigned long)(arg2)))
487 #define PVOP_VCALL2(op, arg1, arg2) \
488 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
489 "1" ((unsigned long)(arg2)))
490
491 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
492 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
493 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
494 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
495 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
496 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
497
498 /* This is the only difference in x86_64. We can make it much simpler */
499 #ifdef CONFIG_X86_32
500 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
501 __PVOP_CALL(rettype, op, \
502 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
503 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
504 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
505 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
506 __PVOP_VCALL(op, \
507 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
508 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
509 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
510 #else
511 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
512 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
513 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
514 "3"((unsigned long)(arg4)))
515 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
516 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
517 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
518 "3"((unsigned long)(arg4)))
519 #endif
520
521 static inline int paravirt_enabled(void)
522 {
523 return pv_info.paravirt_enabled;
524 }
525
526 static inline void load_sp0(struct tss_struct *tss,
527 struct thread_struct *thread)
528 {
529 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
530 }
531
532 #define ARCH_SETUP pv_init_ops.arch_setup();
533 static inline unsigned long get_wallclock(void)
534 {
535 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
536 }
537
538 static inline int set_wallclock(unsigned long nowtime)
539 {
540 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
541 }
542
543 static inline void (*choose_time_init(void))(void)
544 {
545 return pv_time_ops.time_init;
546 }
547
548 /* The paravirtualized CPUID instruction. */
549 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
550 unsigned int *ecx, unsigned int *edx)
551 {
552 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
553 }
554
555 /*
556 * These special macros can be used to get or set a debugging register
557 */
558 static inline unsigned long paravirt_get_debugreg(int reg)
559 {
560 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
561 }
562 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
563 static inline void set_debugreg(unsigned long val, int reg)
564 {
565 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
566 }
567
568 static inline void clts(void)
569 {
570 PVOP_VCALL0(pv_cpu_ops.clts);
571 }
572
573 static inline unsigned long read_cr0(void)
574 {
575 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
576 }
577
578 static inline void write_cr0(unsigned long x)
579 {
580 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
581 }
582
583 static inline unsigned long read_cr2(void)
584 {
585 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
586 }
587
588 static inline void write_cr2(unsigned long x)
589 {
590 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
591 }
592
593 static inline unsigned long read_cr3(void)
594 {
595 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
596 }
597
598 static inline void write_cr3(unsigned long x)
599 {
600 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
601 }
602
603 static inline unsigned long read_cr4(void)
604 {
605 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
606 }
607 static inline unsigned long read_cr4_safe(void)
608 {
609 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
610 }
611
612 static inline void write_cr4(unsigned long x)
613 {
614 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
615 }
616
617 static inline void raw_safe_halt(void)
618 {
619 PVOP_VCALL0(pv_irq_ops.safe_halt);
620 }
621
622 static inline void halt(void)
623 {
624 PVOP_VCALL0(pv_irq_ops.safe_halt);
625 }
626
627 static inline void wbinvd(void)
628 {
629 PVOP_VCALL0(pv_cpu_ops.wbinvd);
630 }
631
632 #define get_kernel_rpl() (pv_info.kernel_rpl)
633
634 static inline u64 paravirt_read_msr(unsigned msr, int *err)
635 {
636 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
637 }
638 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
639 {
640 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
641 }
642
643 /* These should all do BUG_ON(_err), but our headers are too tangled. */
644 #define rdmsr(msr,val1,val2) do { \
645 int _err; \
646 u64 _l = paravirt_read_msr(msr, &_err); \
647 val1 = (u32)_l; \
648 val2 = _l >> 32; \
649 } while(0)
650
651 #define wrmsr(msr,val1,val2) do { \
652 paravirt_write_msr(msr, val1, val2); \
653 } while(0)
654
655 #define rdmsrl(msr,val) do { \
656 int _err; \
657 val = paravirt_read_msr(msr, &_err); \
658 } while(0)
659
660 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
661 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
662
663 /* rdmsr with exception handling */
664 #define rdmsr_safe(msr,a,b) ({ \
665 int _err; \
666 u64 _l = paravirt_read_msr(msr, &_err); \
667 (*a) = (u32)_l; \
668 (*b) = _l >> 32; \
669 _err; })
670
671
672 static inline u64 paravirt_read_tsc(void)
673 {
674 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
675 }
676
677 #define rdtscl(low) do { \
678 u64 _l = paravirt_read_tsc(); \
679 low = (int)_l; \
680 } while(0)
681
682 #define rdtscll(val) (val = paravirt_read_tsc())
683
684 static inline unsigned long long paravirt_sched_clock(void)
685 {
686 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
687 }
688 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
689
690 static inline unsigned long long paravirt_read_pmc(int counter)
691 {
692 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
693 }
694
695 #define rdpmc(counter,low,high) do { \
696 u64 _l = paravirt_read_pmc(counter); \
697 low = (u32)_l; \
698 high = _l >> 32; \
699 } while(0)
700
701 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
702 {
703 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
704 }
705
706 #define rdtscp(low, high, aux) \
707 do { \
708 int __aux; \
709 unsigned long __val = paravirt_rdtscp(&__aux); \
710 (low) = (u32)__val; \
711 (high) = (u32)(__val >> 32); \
712 (aux) = __aux; \
713 } while (0)
714
715 #define rdtscpll(val, aux) \
716 do { \
717 unsigned long __aux; \
718 val = paravirt_rdtscp(&__aux); \
719 (aux) = __aux; \
720 } while (0)
721
722 static inline void load_TR_desc(void)
723 {
724 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
725 }
726 static inline void load_gdt(const struct desc_ptr *dtr)
727 {
728 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
729 }
730 static inline void load_idt(const struct desc_ptr *dtr)
731 {
732 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
733 }
734 static inline void set_ldt(const void *addr, unsigned entries)
735 {
736 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
737 }
738 static inline void store_gdt(struct desc_ptr *dtr)
739 {
740 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
741 }
742 static inline void store_idt(struct desc_ptr *dtr)
743 {
744 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
745 }
746 static inline unsigned long paravirt_store_tr(void)
747 {
748 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
749 }
750 #define store_tr(tr) ((tr) = paravirt_store_tr())
751 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
752 {
753 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
754 }
755
756 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
757 const void *desc)
758 {
759 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
760 }
761
762 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
763 void *desc, int type)
764 {
765 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
766 }
767
768 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
769 {
770 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
771 }
772 static inline void set_iopl_mask(unsigned mask)
773 {
774 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
775 }
776
777 /* The paravirtualized I/O functions */
778 static inline void slow_down_io(void) {
779 pv_cpu_ops.io_delay();
780 #ifdef REALLY_SLOW_IO
781 pv_cpu_ops.io_delay();
782 pv_cpu_ops.io_delay();
783 pv_cpu_ops.io_delay();
784 #endif
785 }
786
787 #ifdef CONFIG_X86_LOCAL_APIC
788 /*
789 * Basic functions accessing APICs.
790 */
791 static inline void apic_write(unsigned long reg, u32 v)
792 {
793 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
794 }
795
796 static inline void apic_write_atomic(unsigned long reg, u32 v)
797 {
798 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
799 }
800
801 static inline u32 apic_read(unsigned long reg)
802 {
803 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
804 }
805
806 static inline void setup_boot_clock(void)
807 {
808 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
809 }
810
811 static inline void setup_secondary_clock(void)
812 {
813 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
814 }
815 #endif
816
817 static inline void paravirt_post_allocator_init(void)
818 {
819 if (pv_init_ops.post_allocator_init)
820 (*pv_init_ops.post_allocator_init)();
821 }
822
823 static inline void paravirt_pagetable_setup_start(pgd_t *base)
824 {
825 (*pv_mmu_ops.pagetable_setup_start)(base);
826 }
827
828 static inline void paravirt_pagetable_setup_done(pgd_t *base)
829 {
830 (*pv_mmu_ops.pagetable_setup_done)(base);
831 }
832
833 #ifdef CONFIG_SMP
834 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
835 unsigned long start_esp)
836 {
837 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
838 phys_apicid, start_eip, start_esp);
839 }
840 #endif
841
842 static inline void paravirt_activate_mm(struct mm_struct *prev,
843 struct mm_struct *next)
844 {
845 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
846 }
847
848 static inline void arch_dup_mmap(struct mm_struct *oldmm,
849 struct mm_struct *mm)
850 {
851 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
852 }
853
854 static inline void arch_exit_mmap(struct mm_struct *mm)
855 {
856 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
857 }
858
859 static inline void __flush_tlb(void)
860 {
861 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
862 }
863 static inline void __flush_tlb_global(void)
864 {
865 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
866 }
867 static inline void __flush_tlb_single(unsigned long addr)
868 {
869 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
870 }
871
872 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
873 unsigned long va)
874 {
875 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
876 }
877
878 static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
879 {
880 PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn);
881 }
882 static inline void paravirt_release_pt(unsigned pfn)
883 {
884 PVOP_VCALL1(pv_mmu_ops.release_pt, pfn);
885 }
886
887 static inline void paravirt_alloc_pd(unsigned pfn)
888 {
889 PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn);
890 }
891
892 static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
893 unsigned start, unsigned count)
894 {
895 PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count);
896 }
897 static inline void paravirt_release_pd(unsigned pfn)
898 {
899 PVOP_VCALL1(pv_mmu_ops.release_pd, pfn);
900 }
901
902 #ifdef CONFIG_HIGHPTE
903 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
904 {
905 unsigned long ret;
906 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
907 return (void *)ret;
908 }
909 #endif
910
911 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
912 pte_t *ptep)
913 {
914 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
915 }
916
917 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
918 pte_t *ptep)
919 {
920 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
921 }
922
923 static inline pte_t __pte(pteval_t val)
924 {
925 pteval_t ret;
926
927 if (sizeof(pteval_t) > sizeof(long))
928 ret = PVOP_CALL2(pteval_t,
929 pv_mmu_ops.make_pte,
930 val, (u64)val >> 32);
931 else
932 ret = PVOP_CALL1(pteval_t,
933 pv_mmu_ops.make_pte,
934 val);
935
936 return (pte_t) { .pte = ret };
937 }
938
939 static inline pteval_t pte_val(pte_t pte)
940 {
941 pteval_t ret;
942
943 if (sizeof(pteval_t) > sizeof(long))
944 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
945 pte.pte, (u64)pte.pte >> 32);
946 else
947 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
948 pte.pte);
949
950 return ret;
951 }
952
953 static inline pgd_t __pgd(pgdval_t val)
954 {
955 pgdval_t ret;
956
957 if (sizeof(pgdval_t) > sizeof(long))
958 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
959 val, (u64)val >> 32);
960 else
961 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
962 val);
963
964 return (pgd_t) { ret };
965 }
966
967 static inline pgdval_t pgd_val(pgd_t pgd)
968 {
969 pgdval_t ret;
970
971 if (sizeof(pgdval_t) > sizeof(long))
972 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
973 pgd.pgd, (u64)pgd.pgd >> 32);
974 else
975 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
976 pgd.pgd);
977
978 return ret;
979 }
980
981 #if PAGETABLE_LEVELS >= 3
982 static inline pmd_t __pmd(pmdval_t val)
983 {
984 pmdval_t ret;
985
986 if (sizeof(pmdval_t) > sizeof(long))
987 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
988 val, (u64)val >> 32);
989 else
990 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
991 val);
992
993 return (pmd_t) { ret };
994 }
995
996 static inline pmdval_t pmd_val(pmd_t pmd)
997 {
998 pmdval_t ret;
999
1000 if (sizeof(pmdval_t) > sizeof(long))
1001 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1002 pmd.pmd, (u64)pmd.pmd >> 32);
1003 else
1004 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1005 pmd.pmd);
1006
1007 return ret;
1008 }
1009 #endif /* PAGETABLE_LEVELS >= 3 */
1010
1011 #ifdef CONFIG_X86_PAE
1012
1013 static inline void set_pte(pte_t *ptep, pte_t pteval)
1014 {
1015 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high);
1016 }
1017
1018 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1019 pte_t *ptep, pte_t pteval)
1020 {
1021 /* 5 arg words */
1022 pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval);
1023 }
1024
1025 static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
1026 {
1027 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1028 pteval.pte_low, pteval.pte_high);
1029 }
1030
1031 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1032 pte_t *ptep, pte_t pte)
1033 {
1034 /* 5 arg words */
1035 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1036 }
1037
1038 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
1039 {
1040 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp,
1041 pmdval.pmd, pmdval.pmd >> 32);
1042 }
1043
1044 static inline void set_pud(pud_t *pudp, pud_t pudval)
1045 {
1046 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1047 pudval.pgd.pgd, pudval.pgd.pgd >> 32);
1048 }
1049
1050 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
1051 {
1052 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1053 }
1054
1055 static inline void pmd_clear(pmd_t *pmdp)
1056 {
1057 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1058 }
1059
1060 #else /* !CONFIG_X86_PAE */
1061
1062 static inline void set_pte(pte_t *ptep, pte_t pteval)
1063 {
1064 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low);
1065 }
1066
1067 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1068 pte_t *ptep, pte_t pteval)
1069 {
1070 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low);
1071 }
1072
1073 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
1074 {
1075 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd);
1076 }
1077
1078 static inline void pmd_clear(pmd_t *pmdp)
1079 {
1080 set_pmd(pmdp, __pmd(0));
1081 }
1082
1083 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
1084 {
1085 set_pte_at(mm, addr, ptep, __pte(0));
1086 }
1087
1088 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1089 {
1090 set_pte(ptep, pte);
1091 }
1092
1093 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1094 pte_t *ptep, pte_t pte)
1095 {
1096 set_pte(ptep, pte);
1097 }
1098 #endif /* CONFIG_X86_PAE */
1099
1100 /* Lazy mode for batching updates / context switch */
1101 enum paravirt_lazy_mode {
1102 PARAVIRT_LAZY_NONE,
1103 PARAVIRT_LAZY_MMU,
1104 PARAVIRT_LAZY_CPU,
1105 };
1106
1107 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1108 void paravirt_enter_lazy_cpu(void);
1109 void paravirt_leave_lazy_cpu(void);
1110 void paravirt_enter_lazy_mmu(void);
1111 void paravirt_leave_lazy_mmu(void);
1112 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1113
1114 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1115 static inline void arch_enter_lazy_cpu_mode(void)
1116 {
1117 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1118 }
1119
1120 static inline void arch_leave_lazy_cpu_mode(void)
1121 {
1122 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1123 }
1124
1125 static inline void arch_flush_lazy_cpu_mode(void)
1126 {
1127 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1128 arch_leave_lazy_cpu_mode();
1129 arch_enter_lazy_cpu_mode();
1130 }
1131 }
1132
1133
1134 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1135 static inline void arch_enter_lazy_mmu_mode(void)
1136 {
1137 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1138 }
1139
1140 static inline void arch_leave_lazy_mmu_mode(void)
1141 {
1142 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1143 }
1144
1145 static inline void arch_flush_lazy_mmu_mode(void)
1146 {
1147 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1148 arch_leave_lazy_mmu_mode();
1149 arch_enter_lazy_mmu_mode();
1150 }
1151 }
1152
1153 void _paravirt_nop(void);
1154 #define paravirt_nop ((void *)_paravirt_nop)
1155
1156 /* These all sit in the .parainstructions section to tell us what to patch. */
1157 struct paravirt_patch_site {
1158 u8 *instr; /* original instructions */
1159 u8 instrtype; /* type of this instruction */
1160 u8 len; /* length of original instruction */
1161 u16 clobbers; /* what registers you may clobber */
1162 };
1163
1164 extern struct paravirt_patch_site __parainstructions[],
1165 __parainstructions_end[];
1166
1167 #ifdef CONFIG_X86_32
1168 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1169 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1170 #define PV_FLAGS_ARG "0"
1171 #define PV_EXTRA_CLOBBERS
1172 #define PV_VEXTRA_CLOBBERS
1173 #else
1174 /* We save some registers, but all of them, that's too much. We clobber all
1175 * caller saved registers but the argument parameter */
1176 #define PV_SAVE_REGS "pushq %%rdi;"
1177 #define PV_RESTORE_REGS "popq %%rdi;"
1178 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1179 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1180 #define PV_FLAGS_ARG "D"
1181 #endif
1182
1183 static inline unsigned long __raw_local_save_flags(void)
1184 {
1185 unsigned long f;
1186
1187 asm volatile(paravirt_alt(PV_SAVE_REGS
1188 PARAVIRT_CALL
1189 PV_RESTORE_REGS)
1190 : "=a"(f)
1191 : paravirt_type(pv_irq_ops.save_fl),
1192 paravirt_clobber(CLBR_EAX)
1193 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1194 return f;
1195 }
1196
1197 static inline void raw_local_irq_restore(unsigned long f)
1198 {
1199 asm volatile(paravirt_alt(PV_SAVE_REGS
1200 PARAVIRT_CALL
1201 PV_RESTORE_REGS)
1202 : "=a"(f)
1203 : PV_FLAGS_ARG(f),
1204 paravirt_type(pv_irq_ops.restore_fl),
1205 paravirt_clobber(CLBR_EAX)
1206 : "memory", "cc" PV_EXTRA_CLOBBERS);
1207 }
1208
1209 static inline void raw_local_irq_disable(void)
1210 {
1211 asm volatile(paravirt_alt(PV_SAVE_REGS
1212 PARAVIRT_CALL
1213 PV_RESTORE_REGS)
1214 :
1215 : paravirt_type(pv_irq_ops.irq_disable),
1216 paravirt_clobber(CLBR_EAX)
1217 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1218 }
1219
1220 static inline void raw_local_irq_enable(void)
1221 {
1222 asm volatile(paravirt_alt(PV_SAVE_REGS
1223 PARAVIRT_CALL
1224 PV_RESTORE_REGS)
1225 :
1226 : paravirt_type(pv_irq_ops.irq_enable),
1227 paravirt_clobber(CLBR_EAX)
1228 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1229 }
1230
1231 static inline unsigned long __raw_local_irq_save(void)
1232 {
1233 unsigned long f;
1234
1235 f = __raw_local_save_flags();
1236 raw_local_irq_disable();
1237 return f;
1238 }
1239
1240 /* Make sure as little as possible of this mess escapes. */
1241 #undef PARAVIRT_CALL
1242 #undef __PVOP_CALL
1243 #undef __PVOP_VCALL
1244 #undef PVOP_VCALL0
1245 #undef PVOP_CALL0
1246 #undef PVOP_VCALL1
1247 #undef PVOP_CALL1
1248 #undef PVOP_VCALL2
1249 #undef PVOP_CALL2
1250 #undef PVOP_VCALL3
1251 #undef PVOP_CALL3
1252 #undef PVOP_VCALL4
1253 #undef PVOP_CALL4
1254
1255 #else /* __ASSEMBLY__ */
1256
1257 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1258 771:; \
1259 ops; \
1260 772:; \
1261 .pushsection .parainstructions,"a"; \
1262 .align algn; \
1263 word 771b; \
1264 .byte ptype; \
1265 .byte 772b-771b; \
1266 .short clobbers; \
1267 .popsection
1268
1269
1270 #ifdef CONFIG_X86_64
1271 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1272 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1273 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1274 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1275 #else
1276 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1277 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1278 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1279 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1280 #endif
1281
1282 #define INTERRUPT_RETURN \
1283 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1284 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1285
1286 #define DISABLE_INTERRUPTS(clobbers) \
1287 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1288 PV_SAVE_REGS; \
1289 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1290 PV_RESTORE_REGS;) \
1291
1292 #define ENABLE_INTERRUPTS(clobbers) \
1293 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1294 PV_SAVE_REGS; \
1295 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1296 PV_RESTORE_REGS;)
1297
1298 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1299 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1300 CLBR_NONE, \
1301 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1302
1303
1304 #ifdef CONFIG_X86_32
1305 #define GET_CR0_INTO_EAX \
1306 push %ecx; push %edx; \
1307 call *pv_cpu_ops+PV_CPU_read_cr0; \
1308 pop %edx; pop %ecx
1309 #else
1310 #define SWAPGS \
1311 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1312 PV_SAVE_REGS; \
1313 call *pv_cpu_ops+PV_CPU_swapgs; \
1314 PV_RESTORE_REGS \
1315 )
1316
1317 #define GET_CR2_INTO_RCX \
1318 call *pv_mmu_ops+PV_MMU_read_cr2; \
1319 movq %rax, %rcx; \
1320 xorq %rax, %rax;
1321
1322 #endif
1323
1324 #endif /* __ASSEMBLY__ */
1325 #endif /* CONFIG_PARAVIRT */
1326 #endif /* __ASM_PARAVIRT_H */
Linux kernel - Deliverables
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