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x86/paravirt, 64-bit: don't restore user rsp within sysret
[deliverable/linux.git] / include / asm-x86 / paravirt.h
1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/page.h>
8 #include <asm/asm.h>
9
10 /* Bitmask of what can be clobbered: usually at least eax. */
11 #define CLBR_NONE 0
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
15
16 #ifdef CONFIG_X86_64
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
25 #else
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
28 #endif /* X86_64 */
29
30 #ifndef __ASSEMBLY__
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
35
36 struct page;
37 struct thread_struct;
38 struct desc_ptr;
39 struct tss_struct;
40 struct mm_struct;
41 struct desc_struct;
42
43 /* general info */
44 struct pv_info {
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
47 int paravirt_enabled;
48 const char *name;
49 };
50
51 struct pv_init_ops {
52 /*
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
59 */
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
62
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
67
68 /* Print a banner to identify the environment */
69 void (*banner)(void);
70 };
71
72
73 struct pv_lazy_ops {
74 /* Set deferred update mode, used for batching operations. */
75 void (*enter)(void);
76 void (*leave)(void);
77 };
78
79 struct pv_time_ops {
80 void (*time_init)(void);
81
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
85
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
88 };
89
90 struct pv_cpu_ops {
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
94
95 void (*clts)(void);
96
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
99
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
103
104 #ifdef CONFIG_X86_64
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
107 #endif
108
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
118 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
119 const void *desc);
120 void (*write_gdt_entry)(struct desc_struct *,
121 int entrynum, const void *desc, int size);
122 void (*write_idt_entry)(gate_desc *,
123 int entrynum, const gate_desc *gate);
124 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
125
126 void (*set_iopl_mask)(unsigned mask);
127
128 void (*wbinvd)(void);
129 void (*io_delay)(void);
130
131 /* cpuid emulation, mostly so that caps bits can be disabled */
132 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
133 unsigned int *ecx, unsigned int *edx);
134
135 /* MSR, PMC and TSR operations.
136 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
137 u64 (*read_msr)(unsigned int msr, int *err);
138 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
139
140 u64 (*read_tsc)(void);
141 u64 (*read_pmc)(int counter);
142 unsigned long long (*read_tscp)(unsigned int *aux);
143
144 /* These three are jmp to, not actually called. */
145 void (*irq_enable_sysexit)(void);
146 void (*usergs_sysret)(void);
147 void (*iret)(void);
148
149 void (*swapgs)(void);
150
151 struct pv_lazy_ops lazy_mode;
152 };
153
154 struct pv_irq_ops {
155 void (*init_IRQ)(void);
156
157 /*
158 * Get/set interrupt state. save_fl and restore_fl are only
159 * expected to use X86_EFLAGS_IF; all other bits
160 * returned from save_fl are undefined, and may be ignored by
161 * restore_fl.
162 */
163 unsigned long (*save_fl)(void);
164 void (*restore_fl)(unsigned long);
165 void (*irq_disable)(void);
166 void (*irq_enable)(void);
167 void (*safe_halt)(void);
168 void (*halt)(void);
169 };
170
171 struct pv_apic_ops {
172 #ifdef CONFIG_X86_LOCAL_APIC
173 /*
174 * Direct APIC operations, principally for VMI. Ideally
175 * these shouldn't be in this interface.
176 */
177 void (*apic_write)(unsigned long reg, u32 v);
178 void (*apic_write_atomic)(unsigned long reg, u32 v);
179 u32 (*apic_read)(unsigned long reg);
180 void (*setup_boot_clock)(void);
181 void (*setup_secondary_clock)(void);
182
183 void (*startup_ipi_hook)(int phys_apicid,
184 unsigned long start_eip,
185 unsigned long start_esp);
186 #endif
187 };
188
189 struct pv_mmu_ops {
190 /*
191 * Called before/after init_mm pagetable setup. setup_start
192 * may reset %cr3, and may pre-install parts of the pagetable;
193 * pagetable setup is expected to preserve any existing
194 * mapping.
195 */
196 void (*pagetable_setup_start)(pgd_t *pgd_base);
197 void (*pagetable_setup_done)(pgd_t *pgd_base);
198
199 unsigned long (*read_cr2)(void);
200 void (*write_cr2)(unsigned long);
201
202 unsigned long (*read_cr3)(void);
203 void (*write_cr3)(unsigned long);
204
205 /*
206 * Hooks for intercepting the creation/use/destruction of an
207 * mm_struct.
208 */
209 void (*activate_mm)(struct mm_struct *prev,
210 struct mm_struct *next);
211 void (*dup_mmap)(struct mm_struct *oldmm,
212 struct mm_struct *mm);
213 void (*exit_mmap)(struct mm_struct *mm);
214
215
216 /* TLB operations */
217 void (*flush_tlb_user)(void);
218 void (*flush_tlb_kernel)(void);
219 void (*flush_tlb_single)(unsigned long addr);
220 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
221 unsigned long va);
222
223 /* Hooks for allocating and freeing a pagetable top-level */
224 int (*pgd_alloc)(struct mm_struct *mm);
225 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
226
227 /*
228 * Hooks for allocating/releasing pagetable pages when they're
229 * attached to a pagetable
230 */
231 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
232 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
233 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
234 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
235 void (*release_pte)(u32 pfn);
236 void (*release_pmd)(u32 pfn);
237 void (*release_pud)(u32 pfn);
238
239 /* Pagetable manipulation functions */
240 void (*set_pte)(pte_t *ptep, pte_t pteval);
241 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
242 pte_t *ptep, pte_t pteval);
243 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
244 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
245 pte_t *ptep);
246 void (*pte_update_defer)(struct mm_struct *mm,
247 unsigned long addr, pte_t *ptep);
248
249 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
250 pte_t *ptep);
251 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
252 pte_t *ptep, pte_t pte);
253
254 pteval_t (*pte_val)(pte_t);
255 pteval_t (*pte_flags)(pte_t);
256 pte_t (*make_pte)(pteval_t pte);
257
258 pgdval_t (*pgd_val)(pgd_t);
259 pgd_t (*make_pgd)(pgdval_t pgd);
260
261 #if PAGETABLE_LEVELS >= 3
262 #ifdef CONFIG_X86_PAE
263 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
264 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
265 pte_t *ptep, pte_t pte);
266 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
267 pte_t *ptep);
268 void (*pmd_clear)(pmd_t *pmdp);
269
270 #endif /* CONFIG_X86_PAE */
271
272 void (*set_pud)(pud_t *pudp, pud_t pudval);
273
274 pmdval_t (*pmd_val)(pmd_t);
275 pmd_t (*make_pmd)(pmdval_t pmd);
276
277 #if PAGETABLE_LEVELS == 4
278 pudval_t (*pud_val)(pud_t);
279 pud_t (*make_pud)(pudval_t pud);
280
281 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
282 #endif /* PAGETABLE_LEVELS == 4 */
283 #endif /* PAGETABLE_LEVELS >= 3 */
284
285 #ifdef CONFIG_HIGHPTE
286 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
287 #endif
288
289 struct pv_lazy_ops lazy_mode;
290
291 /* dom0 ops */
292
293 /* Sometimes the physical address is a pfn, and sometimes its
294 an mfn. We can tell which is which from the index. */
295 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
296 unsigned long phys, pgprot_t flags);
297 };
298
299 /* This contains all the paravirt structures: we get a convenient
300 * number for each function using the offset which we use to indicate
301 * what to patch. */
302 struct paravirt_patch_template {
303 struct pv_init_ops pv_init_ops;
304 struct pv_time_ops pv_time_ops;
305 struct pv_cpu_ops pv_cpu_ops;
306 struct pv_irq_ops pv_irq_ops;
307 struct pv_apic_ops pv_apic_ops;
308 struct pv_mmu_ops pv_mmu_ops;
309 };
310
311 extern struct pv_info pv_info;
312 extern struct pv_init_ops pv_init_ops;
313 extern struct pv_time_ops pv_time_ops;
314 extern struct pv_cpu_ops pv_cpu_ops;
315 extern struct pv_irq_ops pv_irq_ops;
316 extern struct pv_apic_ops pv_apic_ops;
317 extern struct pv_mmu_ops pv_mmu_ops;
318
319 #define PARAVIRT_PATCH(x) \
320 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
321
322 #define paravirt_type(op) \
323 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
324 [paravirt_opptr] "m" (op)
325 #define paravirt_clobber(clobber) \
326 [paravirt_clobber] "i" (clobber)
327
328 /*
329 * Generate some code, and mark it as patchable by the
330 * apply_paravirt() alternate instruction patcher.
331 */
332 #define _paravirt_alt(insn_string, type, clobber) \
333 "771:\n\t" insn_string "\n" "772:\n" \
334 ".pushsection .parainstructions,\"a\"\n" \
335 _ASM_ALIGN "\n" \
336 _ASM_PTR " 771b\n" \
337 " .byte " type "\n" \
338 " .byte 772b-771b\n" \
339 " .short " clobber "\n" \
340 ".popsection\n"
341
342 /* Generate patchable code, with the default asm parameters. */
343 #define paravirt_alt(insn_string) \
344 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
345
346 /* Simple instruction patching code. */
347 #define DEF_NATIVE(ops, name, code) \
348 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
349 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
350
351 unsigned paravirt_patch_nop(void);
352 unsigned paravirt_patch_ignore(unsigned len);
353 unsigned paravirt_patch_call(void *insnbuf,
354 const void *target, u16 tgt_clobbers,
355 unsigned long addr, u16 site_clobbers,
356 unsigned len);
357 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
358 unsigned long addr, unsigned len);
359 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
360 unsigned long addr, unsigned len);
361
362 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
363 const char *start, const char *end);
364
365 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
366 unsigned long addr, unsigned len);
367
368 int paravirt_disable_iospace(void);
369
370 /*
371 * This generates an indirect call based on the operation type number.
372 * The type number, computed in PARAVIRT_PATCH, is derived from the
373 * offset into the paravirt_patch_template structure, and can therefore be
374 * freely converted back into a structure offset.
375 */
376 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
377
378 /*
379 * These macros are intended to wrap calls through one of the paravirt
380 * ops structs, so that they can be later identified and patched at
381 * runtime.
382 *
383 * Normally, a call to a pv_op function is a simple indirect call:
384 * (pv_op_struct.operations)(args...).
385 *
386 * Unfortunately, this is a relatively slow operation for modern CPUs,
387 * because it cannot necessarily determine what the destination
388 * address is. In this case, the address is a runtime constant, so at
389 * the very least we can patch the call to e a simple direct call, or
390 * ideally, patch an inline implementation into the callsite. (Direct
391 * calls are essentially free, because the call and return addresses
392 * are completely predictable.)
393 *
394 * For i386, these macros rely on the standard gcc "regparm(3)" calling
395 * convention, in which the first three arguments are placed in %eax,
396 * %edx, %ecx (in that order), and the remaining arguments are placed
397 * on the stack. All caller-save registers (eax,edx,ecx) are expected
398 * to be modified (either clobbered or used for return values).
399 * X86_64, on the other hand, already specifies a register-based calling
400 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
401 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
402 * special handling for dealing with 4 arguments, unlike i386.
403 * However, x86_64 also have to clobber all caller saved registers, which
404 * unfortunately, are quite a bit (r8 - r11)
405 *
406 * The call instruction itself is marked by placing its start address
407 * and size into the .parainstructions section, so that
408 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
409 * appropriate patching under the control of the backend pv_init_ops
410 * implementation.
411 *
412 * Unfortunately there's no way to get gcc to generate the args setup
413 * for the call, and then allow the call itself to be generated by an
414 * inline asm. Because of this, we must do the complete arg setup and
415 * return value handling from within these macros. This is fairly
416 * cumbersome.
417 *
418 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
419 * It could be extended to more arguments, but there would be little
420 * to be gained from that. For each number of arguments, there are
421 * the two VCALL and CALL variants for void and non-void functions.
422 *
423 * When there is a return value, the invoker of the macro must specify
424 * the return type. The macro then uses sizeof() on that type to
425 * determine whether its a 32 or 64 bit value, and places the return
426 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
427 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
428 * the return value size.
429 *
430 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
431 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
432 * in low,high order
433 *
434 * Small structures are passed and returned in registers. The macro
435 * calling convention can't directly deal with this, so the wrapper
436 * functions must do this.
437 *
438 * These PVOP_* macros are only defined within this header. This
439 * means that all uses must be wrapped in inline functions. This also
440 * makes sure the incoming and outgoing types are always correct.
441 */
442 #ifdef CONFIG_X86_32
443 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
444 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
445 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
446 "=c" (__ecx)
447 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
448 #define EXTRA_CLOBBERS
449 #define VEXTRA_CLOBBERS
450 #else
451 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
452 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
453 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
454 "=S" (__esi), "=d" (__edx), \
455 "=c" (__ecx)
456
457 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
458
459 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
460 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
461 #endif
462
463 #ifdef CONFIG_PARAVIRT_DEBUG
464 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
465 #else
466 #define PVOP_TEST_NULL(op) ((void)op)
467 #endif
468
469 #define __PVOP_CALL(rettype, op, pre, post, ...) \
470 ({ \
471 rettype __ret; \
472 PVOP_CALL_ARGS; \
473 PVOP_TEST_NULL(op); \
474 /* This is 32-bit specific, but is okay in 64-bit */ \
475 /* since this condition will never hold */ \
476 if (sizeof(rettype) > sizeof(unsigned long)) { \
477 asm volatile(pre \
478 paravirt_alt(PARAVIRT_CALL) \
479 post \
480 : PVOP_CALL_CLOBBERS \
481 : paravirt_type(op), \
482 paravirt_clobber(CLBR_ANY), \
483 ##__VA_ARGS__ \
484 : "memory", "cc" EXTRA_CLOBBERS); \
485 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
486 } else { \
487 asm volatile(pre \
488 paravirt_alt(PARAVIRT_CALL) \
489 post \
490 : PVOP_CALL_CLOBBERS \
491 : paravirt_type(op), \
492 paravirt_clobber(CLBR_ANY), \
493 ##__VA_ARGS__ \
494 : "memory", "cc" EXTRA_CLOBBERS); \
495 __ret = (rettype)__eax; \
496 } \
497 __ret; \
498 })
499 #define __PVOP_VCALL(op, pre, post, ...) \
500 ({ \
501 PVOP_VCALL_ARGS; \
502 PVOP_TEST_NULL(op); \
503 asm volatile(pre \
504 paravirt_alt(PARAVIRT_CALL) \
505 post \
506 : PVOP_VCALL_CLOBBERS \
507 : paravirt_type(op), \
508 paravirt_clobber(CLBR_ANY), \
509 ##__VA_ARGS__ \
510 : "memory", "cc" VEXTRA_CLOBBERS); \
511 })
512
513 #define PVOP_CALL0(rettype, op) \
514 __PVOP_CALL(rettype, op, "", "")
515 #define PVOP_VCALL0(op) \
516 __PVOP_VCALL(op, "", "")
517
518 #define PVOP_CALL1(rettype, op, arg1) \
519 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
520 #define PVOP_VCALL1(op, arg1) \
521 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
522
523 #define PVOP_CALL2(rettype, op, arg1, arg2) \
524 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
525 "1" ((unsigned long)(arg2)))
526 #define PVOP_VCALL2(op, arg1, arg2) \
527 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
528 "1" ((unsigned long)(arg2)))
529
530 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
531 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
532 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
533 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
534 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
535 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
536
537 /* This is the only difference in x86_64. We can make it much simpler */
538 #ifdef CONFIG_X86_32
539 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
540 __PVOP_CALL(rettype, op, \
541 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
542 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
543 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
544 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
545 __PVOP_VCALL(op, \
546 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
547 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
548 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
549 #else
550 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
551 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
552 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
553 "3"((unsigned long)(arg4)))
554 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
555 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
556 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
557 "3"((unsigned long)(arg4)))
558 #endif
559
560 static inline int paravirt_enabled(void)
561 {
562 return pv_info.paravirt_enabled;
563 }
564
565 static inline void load_sp0(struct tss_struct *tss,
566 struct thread_struct *thread)
567 {
568 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
569 }
570
571 #define ARCH_SETUP pv_init_ops.arch_setup();
572 static inline unsigned long get_wallclock(void)
573 {
574 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
575 }
576
577 static inline int set_wallclock(unsigned long nowtime)
578 {
579 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
580 }
581
582 static inline void (*choose_time_init(void))(void)
583 {
584 return pv_time_ops.time_init;
585 }
586
587 /* The paravirtualized CPUID instruction. */
588 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
589 unsigned int *ecx, unsigned int *edx)
590 {
591 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
592 }
593
594 /*
595 * These special macros can be used to get or set a debugging register
596 */
597 static inline unsigned long paravirt_get_debugreg(int reg)
598 {
599 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
600 }
601 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
602 static inline void set_debugreg(unsigned long val, int reg)
603 {
604 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
605 }
606
607 static inline void clts(void)
608 {
609 PVOP_VCALL0(pv_cpu_ops.clts);
610 }
611
612 static inline unsigned long read_cr0(void)
613 {
614 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
615 }
616
617 static inline void write_cr0(unsigned long x)
618 {
619 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
620 }
621
622 static inline unsigned long read_cr2(void)
623 {
624 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
625 }
626
627 static inline void write_cr2(unsigned long x)
628 {
629 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
630 }
631
632 static inline unsigned long read_cr3(void)
633 {
634 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
635 }
636
637 static inline void write_cr3(unsigned long x)
638 {
639 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
640 }
641
642 static inline unsigned long read_cr4(void)
643 {
644 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
645 }
646 static inline unsigned long read_cr4_safe(void)
647 {
648 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
649 }
650
651 static inline void write_cr4(unsigned long x)
652 {
653 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
654 }
655
656 #ifdef CONFIG_X86_64
657 static inline unsigned long read_cr8(void)
658 {
659 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
660 }
661
662 static inline void write_cr8(unsigned long x)
663 {
664 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
665 }
666 #endif
667
668 static inline void raw_safe_halt(void)
669 {
670 PVOP_VCALL0(pv_irq_ops.safe_halt);
671 }
672
673 static inline void halt(void)
674 {
675 PVOP_VCALL0(pv_irq_ops.safe_halt);
676 }
677
678 static inline void wbinvd(void)
679 {
680 PVOP_VCALL0(pv_cpu_ops.wbinvd);
681 }
682
683 #define get_kernel_rpl() (pv_info.kernel_rpl)
684
685 static inline u64 paravirt_read_msr(unsigned msr, int *err)
686 {
687 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
688 }
689 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
690 {
691 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
692 }
693
694 /* These should all do BUG_ON(_err), but our headers are too tangled. */
695 #define rdmsr(msr, val1, val2) \
696 do { \
697 int _err; \
698 u64 _l = paravirt_read_msr(msr, &_err); \
699 val1 = (u32)_l; \
700 val2 = _l >> 32; \
701 } while (0)
702
703 #define wrmsr(msr, val1, val2) \
704 do { \
705 paravirt_write_msr(msr, val1, val2); \
706 } while (0)
707
708 #define rdmsrl(msr, val) \
709 do { \
710 int _err; \
711 val = paravirt_read_msr(msr, &_err); \
712 } while (0)
713
714 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
715 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
716
717 /* rdmsr with exception handling */
718 #define rdmsr_safe(msr, a, b) \
719 ({ \
720 int _err; \
721 u64 _l = paravirt_read_msr(msr, &_err); \
722 (*a) = (u32)_l; \
723 (*b) = _l >> 32; \
724 _err; \
725 })
726
727 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
728 {
729 int err;
730
731 *p = paravirt_read_msr(msr, &err);
732 return err;
733 }
734
735 static inline u64 paravirt_read_tsc(void)
736 {
737 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
738 }
739
740 #define rdtscl(low) \
741 do { \
742 u64 _l = paravirt_read_tsc(); \
743 low = (int)_l; \
744 } while (0)
745
746 #define rdtscll(val) (val = paravirt_read_tsc())
747
748 static inline unsigned long long paravirt_sched_clock(void)
749 {
750 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
751 }
752 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
753
754 static inline unsigned long long paravirt_read_pmc(int counter)
755 {
756 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
757 }
758
759 #define rdpmc(counter, low, high) \
760 do { \
761 u64 _l = paravirt_read_pmc(counter); \
762 low = (u32)_l; \
763 high = _l >> 32; \
764 } while (0)
765
766 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
767 {
768 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
769 }
770
771 #define rdtscp(low, high, aux) \
772 do { \
773 int __aux; \
774 unsigned long __val = paravirt_rdtscp(&__aux); \
775 (low) = (u32)__val; \
776 (high) = (u32)(__val >> 32); \
777 (aux) = __aux; \
778 } while (0)
779
780 #define rdtscpll(val, aux) \
781 do { \
782 unsigned long __aux; \
783 val = paravirt_rdtscp(&__aux); \
784 (aux) = __aux; \
785 } while (0)
786
787 static inline void load_TR_desc(void)
788 {
789 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
790 }
791 static inline void load_gdt(const struct desc_ptr *dtr)
792 {
793 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
794 }
795 static inline void load_idt(const struct desc_ptr *dtr)
796 {
797 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
798 }
799 static inline void set_ldt(const void *addr, unsigned entries)
800 {
801 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
802 }
803 static inline void store_gdt(struct desc_ptr *dtr)
804 {
805 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
806 }
807 static inline void store_idt(struct desc_ptr *dtr)
808 {
809 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
810 }
811 static inline unsigned long paravirt_store_tr(void)
812 {
813 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
814 }
815 #define store_tr(tr) ((tr) = paravirt_store_tr())
816 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
817 {
818 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
819 }
820
821 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
822 const void *desc)
823 {
824 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
825 }
826
827 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
828 void *desc, int type)
829 {
830 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
831 }
832
833 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
834 {
835 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
836 }
837 static inline void set_iopl_mask(unsigned mask)
838 {
839 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
840 }
841
842 /* The paravirtualized I/O functions */
843 static inline void slow_down_io(void)
844 {
845 pv_cpu_ops.io_delay();
846 #ifdef REALLY_SLOW_IO
847 pv_cpu_ops.io_delay();
848 pv_cpu_ops.io_delay();
849 pv_cpu_ops.io_delay();
850 #endif
851 }
852
853 #ifdef CONFIG_X86_LOCAL_APIC
854 /*
855 * Basic functions accessing APICs.
856 */
857 static inline void apic_write(unsigned long reg, u32 v)
858 {
859 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
860 }
861
862 static inline void apic_write_atomic(unsigned long reg, u32 v)
863 {
864 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
865 }
866
867 static inline u32 apic_read(unsigned long reg)
868 {
869 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
870 }
871
872 static inline void setup_boot_clock(void)
873 {
874 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
875 }
876
877 static inline void setup_secondary_clock(void)
878 {
879 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
880 }
881 #endif
882
883 static inline void paravirt_post_allocator_init(void)
884 {
885 if (pv_init_ops.post_allocator_init)
886 (*pv_init_ops.post_allocator_init)();
887 }
888
889 static inline void paravirt_pagetable_setup_start(pgd_t *base)
890 {
891 (*pv_mmu_ops.pagetable_setup_start)(base);
892 }
893
894 static inline void paravirt_pagetable_setup_done(pgd_t *base)
895 {
896 (*pv_mmu_ops.pagetable_setup_done)(base);
897 }
898
899 #ifdef CONFIG_SMP
900 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
901 unsigned long start_esp)
902 {
903 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
904 phys_apicid, start_eip, start_esp);
905 }
906 #endif
907
908 static inline void paravirt_activate_mm(struct mm_struct *prev,
909 struct mm_struct *next)
910 {
911 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
912 }
913
914 static inline void arch_dup_mmap(struct mm_struct *oldmm,
915 struct mm_struct *mm)
916 {
917 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
918 }
919
920 static inline void arch_exit_mmap(struct mm_struct *mm)
921 {
922 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
923 }
924
925 static inline void __flush_tlb(void)
926 {
927 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
928 }
929 static inline void __flush_tlb_global(void)
930 {
931 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
932 }
933 static inline void __flush_tlb_single(unsigned long addr)
934 {
935 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
936 }
937
938 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
939 unsigned long va)
940 {
941 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
942 }
943
944 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
945 {
946 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
947 }
948
949 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
950 {
951 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
952 }
953
954 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
955 {
956 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
957 }
958 static inline void paravirt_release_pte(unsigned pfn)
959 {
960 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
961 }
962
963 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
964 {
965 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
966 }
967
968 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
969 unsigned start, unsigned count)
970 {
971 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
972 }
973 static inline void paravirt_release_pmd(unsigned pfn)
974 {
975 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
976 }
977
978 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
979 {
980 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
981 }
982 static inline void paravirt_release_pud(unsigned pfn)
983 {
984 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
985 }
986
987 #ifdef CONFIG_HIGHPTE
988 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
989 {
990 unsigned long ret;
991 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
992 return (void *)ret;
993 }
994 #endif
995
996 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
997 pte_t *ptep)
998 {
999 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1000 }
1001
1002 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1003 pte_t *ptep)
1004 {
1005 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1006 }
1007
1008 static inline pte_t __pte(pteval_t val)
1009 {
1010 pteval_t ret;
1011
1012 if (sizeof(pteval_t) > sizeof(long))
1013 ret = PVOP_CALL2(pteval_t,
1014 pv_mmu_ops.make_pte,
1015 val, (u64)val >> 32);
1016 else
1017 ret = PVOP_CALL1(pteval_t,
1018 pv_mmu_ops.make_pte,
1019 val);
1020
1021 return (pte_t) { .pte = ret };
1022 }
1023
1024 static inline pteval_t pte_val(pte_t pte)
1025 {
1026 pteval_t ret;
1027
1028 if (sizeof(pteval_t) > sizeof(long))
1029 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1030 pte.pte, (u64)pte.pte >> 32);
1031 else
1032 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1033 pte.pte);
1034
1035 return ret;
1036 }
1037
1038 static inline pteval_t pte_flags(pte_t pte)
1039 {
1040 pteval_t ret;
1041
1042 if (sizeof(pteval_t) > sizeof(long))
1043 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1044 pte.pte, (u64)pte.pte >> 32);
1045 else
1046 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1047 pte.pte);
1048
1049 return ret;
1050 }
1051
1052 static inline pgd_t __pgd(pgdval_t val)
1053 {
1054 pgdval_t ret;
1055
1056 if (sizeof(pgdval_t) > sizeof(long))
1057 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1058 val, (u64)val >> 32);
1059 else
1060 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1061 val);
1062
1063 return (pgd_t) { ret };
1064 }
1065
1066 static inline pgdval_t pgd_val(pgd_t pgd)
1067 {
1068 pgdval_t ret;
1069
1070 if (sizeof(pgdval_t) > sizeof(long))
1071 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1072 pgd.pgd, (u64)pgd.pgd >> 32);
1073 else
1074 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1075 pgd.pgd);
1076
1077 return ret;
1078 }
1079
1080 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1081 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1082 pte_t *ptep)
1083 {
1084 pteval_t ret;
1085
1086 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1087 mm, addr, ptep);
1088
1089 return (pte_t) { .pte = ret };
1090 }
1091
1092 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1093 pte_t *ptep, pte_t pte)
1094 {
1095 if (sizeof(pteval_t) > sizeof(long))
1096 /* 5 arg words */
1097 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1098 else
1099 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1100 mm, addr, ptep, pte.pte);
1101 }
1102
1103 static inline void set_pte(pte_t *ptep, pte_t pte)
1104 {
1105 if (sizeof(pteval_t) > sizeof(long))
1106 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1107 pte.pte, (u64)pte.pte >> 32);
1108 else
1109 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1110 pte.pte);
1111 }
1112
1113 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1114 pte_t *ptep, pte_t pte)
1115 {
1116 if (sizeof(pteval_t) > sizeof(long))
1117 /* 5 arg words */
1118 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1119 else
1120 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1121 }
1122
1123 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1124 {
1125 pmdval_t val = native_pmd_val(pmd);
1126
1127 if (sizeof(pmdval_t) > sizeof(long))
1128 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1129 else
1130 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1131 }
1132
1133 #if PAGETABLE_LEVELS >= 3
1134 static inline pmd_t __pmd(pmdval_t val)
1135 {
1136 pmdval_t ret;
1137
1138 if (sizeof(pmdval_t) > sizeof(long))
1139 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1140 val, (u64)val >> 32);
1141 else
1142 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1143 val);
1144
1145 return (pmd_t) { ret };
1146 }
1147
1148 static inline pmdval_t pmd_val(pmd_t pmd)
1149 {
1150 pmdval_t ret;
1151
1152 if (sizeof(pmdval_t) > sizeof(long))
1153 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1154 pmd.pmd, (u64)pmd.pmd >> 32);
1155 else
1156 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1157 pmd.pmd);
1158
1159 return ret;
1160 }
1161
1162 static inline void set_pud(pud_t *pudp, pud_t pud)
1163 {
1164 pudval_t val = native_pud_val(pud);
1165
1166 if (sizeof(pudval_t) > sizeof(long))
1167 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1168 val, (u64)val >> 32);
1169 else
1170 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1171 val);
1172 }
1173 #if PAGETABLE_LEVELS == 4
1174 static inline pud_t __pud(pudval_t val)
1175 {
1176 pudval_t ret;
1177
1178 if (sizeof(pudval_t) > sizeof(long))
1179 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1180 val, (u64)val >> 32);
1181 else
1182 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1183 val);
1184
1185 return (pud_t) { ret };
1186 }
1187
1188 static inline pudval_t pud_val(pud_t pud)
1189 {
1190 pudval_t ret;
1191
1192 if (sizeof(pudval_t) > sizeof(long))
1193 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1194 pud.pud, (u64)pud.pud >> 32);
1195 else
1196 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1197 pud.pud);
1198
1199 return ret;
1200 }
1201
1202 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1203 {
1204 pgdval_t val = native_pgd_val(pgd);
1205
1206 if (sizeof(pgdval_t) > sizeof(long))
1207 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1208 val, (u64)val >> 32);
1209 else
1210 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1211 val);
1212 }
1213
1214 static inline void pgd_clear(pgd_t *pgdp)
1215 {
1216 set_pgd(pgdp, __pgd(0));
1217 }
1218
1219 static inline void pud_clear(pud_t *pudp)
1220 {
1221 set_pud(pudp, __pud(0));
1222 }
1223
1224 #endif /* PAGETABLE_LEVELS == 4 */
1225
1226 #endif /* PAGETABLE_LEVELS >= 3 */
1227
1228 #ifdef CONFIG_X86_PAE
1229 /* Special-case pte-setting operations for PAE, which can't update a
1230 64-bit pte atomically */
1231 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1232 {
1233 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1234 pte.pte, pte.pte >> 32);
1235 }
1236
1237 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1238 pte_t *ptep, pte_t pte)
1239 {
1240 /* 5 arg words */
1241 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1242 }
1243
1244 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1245 pte_t *ptep)
1246 {
1247 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1248 }
1249
1250 static inline void pmd_clear(pmd_t *pmdp)
1251 {
1252 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1253 }
1254 #else /* !CONFIG_X86_PAE */
1255 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1256 {
1257 set_pte(ptep, pte);
1258 }
1259
1260 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1261 pte_t *ptep, pte_t pte)
1262 {
1263 set_pte(ptep, pte);
1264 }
1265
1266 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1267 pte_t *ptep)
1268 {
1269 set_pte_at(mm, addr, ptep, __pte(0));
1270 }
1271
1272 static inline void pmd_clear(pmd_t *pmdp)
1273 {
1274 set_pmd(pmdp, __pmd(0));
1275 }
1276 #endif /* CONFIG_X86_PAE */
1277
1278 /* Lazy mode for batching updates / context switch */
1279 enum paravirt_lazy_mode {
1280 PARAVIRT_LAZY_NONE,
1281 PARAVIRT_LAZY_MMU,
1282 PARAVIRT_LAZY_CPU,
1283 };
1284
1285 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1286 void paravirt_enter_lazy_cpu(void);
1287 void paravirt_leave_lazy_cpu(void);
1288 void paravirt_enter_lazy_mmu(void);
1289 void paravirt_leave_lazy_mmu(void);
1290 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1291
1292 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1293 static inline void arch_enter_lazy_cpu_mode(void)
1294 {
1295 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1296 }
1297
1298 static inline void arch_leave_lazy_cpu_mode(void)
1299 {
1300 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1301 }
1302
1303 static inline void arch_flush_lazy_cpu_mode(void)
1304 {
1305 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1306 arch_leave_lazy_cpu_mode();
1307 arch_enter_lazy_cpu_mode();
1308 }
1309 }
1310
1311
1312 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1313 static inline void arch_enter_lazy_mmu_mode(void)
1314 {
1315 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1316 }
1317
1318 static inline void arch_leave_lazy_mmu_mode(void)
1319 {
1320 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1321 }
1322
1323 static inline void arch_flush_lazy_mmu_mode(void)
1324 {
1325 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1326 arch_leave_lazy_mmu_mode();
1327 arch_enter_lazy_mmu_mode();
1328 }
1329 }
1330
1331 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1332 unsigned long phys, pgprot_t flags)
1333 {
1334 pv_mmu_ops.set_fixmap(idx, phys, flags);
1335 }
1336
1337 void _paravirt_nop(void);
1338 #define paravirt_nop ((void *)_paravirt_nop)
1339
1340 /* These all sit in the .parainstructions section to tell us what to patch. */
1341 struct paravirt_patch_site {
1342 u8 *instr; /* original instructions */
1343 u8 instrtype; /* type of this instruction */
1344 u8 len; /* length of original instruction */
1345 u16 clobbers; /* what registers you may clobber */
1346 };
1347
1348 extern struct paravirt_patch_site __parainstructions[],
1349 __parainstructions_end[];
1350
1351 #ifdef CONFIG_X86_32
1352 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1353 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1354 #define PV_FLAGS_ARG "0"
1355 #define PV_EXTRA_CLOBBERS
1356 #define PV_VEXTRA_CLOBBERS
1357 #else
1358 /* We save some registers, but all of them, that's too much. We clobber all
1359 * caller saved registers but the argument parameter */
1360 #define PV_SAVE_REGS "pushq %%rdi;"
1361 #define PV_RESTORE_REGS "popq %%rdi;"
1362 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1363 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1364 #define PV_FLAGS_ARG "D"
1365 #endif
1366
1367 static inline unsigned long __raw_local_save_flags(void)
1368 {
1369 unsigned long f;
1370
1371 asm volatile(paravirt_alt(PV_SAVE_REGS
1372 PARAVIRT_CALL
1373 PV_RESTORE_REGS)
1374 : "=a"(f)
1375 : paravirt_type(pv_irq_ops.save_fl),
1376 paravirt_clobber(CLBR_EAX)
1377 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1378 return f;
1379 }
1380
1381 static inline void raw_local_irq_restore(unsigned long f)
1382 {
1383 asm volatile(paravirt_alt(PV_SAVE_REGS
1384 PARAVIRT_CALL
1385 PV_RESTORE_REGS)
1386 : "=a"(f)
1387 : PV_FLAGS_ARG(f),
1388 paravirt_type(pv_irq_ops.restore_fl),
1389 paravirt_clobber(CLBR_EAX)
1390 : "memory", "cc" PV_EXTRA_CLOBBERS);
1391 }
1392
1393 static inline void raw_local_irq_disable(void)
1394 {
1395 asm volatile(paravirt_alt(PV_SAVE_REGS
1396 PARAVIRT_CALL
1397 PV_RESTORE_REGS)
1398 :
1399 : paravirt_type(pv_irq_ops.irq_disable),
1400 paravirt_clobber(CLBR_EAX)
1401 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1402 }
1403
1404 static inline void raw_local_irq_enable(void)
1405 {
1406 asm volatile(paravirt_alt(PV_SAVE_REGS
1407 PARAVIRT_CALL
1408 PV_RESTORE_REGS)
1409 :
1410 : paravirt_type(pv_irq_ops.irq_enable),
1411 paravirt_clobber(CLBR_EAX)
1412 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1413 }
1414
1415 static inline unsigned long __raw_local_irq_save(void)
1416 {
1417 unsigned long f;
1418
1419 f = __raw_local_save_flags();
1420 raw_local_irq_disable();
1421 return f;
1422 }
1423
1424 /* Make sure as little as possible of this mess escapes. */
1425 #undef PARAVIRT_CALL
1426 #undef __PVOP_CALL
1427 #undef __PVOP_VCALL
1428 #undef PVOP_VCALL0
1429 #undef PVOP_CALL0
1430 #undef PVOP_VCALL1
1431 #undef PVOP_CALL1
1432 #undef PVOP_VCALL2
1433 #undef PVOP_CALL2
1434 #undef PVOP_VCALL3
1435 #undef PVOP_CALL3
1436 #undef PVOP_VCALL4
1437 #undef PVOP_CALL4
1438
1439 #else /* __ASSEMBLY__ */
1440
1441 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1442 771:; \
1443 ops; \
1444 772:; \
1445 .pushsection .parainstructions,"a"; \
1446 .align algn; \
1447 word 771b; \
1448 .byte ptype; \
1449 .byte 772b-771b; \
1450 .short clobbers; \
1451 .popsection
1452
1453
1454 #ifdef CONFIG_X86_64
1455 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1456 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1457 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1458 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1459 #define PARA_INDIRECT(addr) *addr(%rip)
1460 #else
1461 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1462 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1463 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1464 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1465 #define PARA_INDIRECT(addr) *%cs:addr
1466 #endif
1467
1468 #define INTERRUPT_RETURN \
1469 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1470 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1471
1472 #define DISABLE_INTERRUPTS(clobbers) \
1473 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1474 PV_SAVE_REGS; \
1475 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1476 PV_RESTORE_REGS;) \
1477
1478 #define ENABLE_INTERRUPTS(clobbers) \
1479 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1480 PV_SAVE_REGS; \
1481 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1482 PV_RESTORE_REGS;)
1483
1484 #define ENABLE_INTERRUPTS_SYSEXIT \
1485 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1486 CLBR_NONE, \
1487 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1488
1489
1490 #ifdef CONFIG_X86_32
1491 #define GET_CR0_INTO_EAX \
1492 push %ecx; push %edx; \
1493 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1494 pop %edx; pop %ecx
1495 #else
1496 #define SWAPGS \
1497 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1498 PV_SAVE_REGS; \
1499 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1500 PV_RESTORE_REGS \
1501 )
1502
1503 #define GET_CR2_INTO_RCX \
1504 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1505 movq %rax, %rcx; \
1506 xorq %rax, %rax;
1507
1508 #define USERGS_SYSRET \
1509 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret), \
1510 CLBR_NONE, \
1511 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret))
1512 #endif
1513
1514 #endif /* __ASSEMBLY__ */
1515 #endif /* CONFIG_PARAVIRT */
1516 #endif /* __ASM_PARAVIRT_H */
Linux kernel - Deliverables
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