x86: pgtable: unify pte accessors
[deliverable/linux.git] / include / asm-x86 / pgtable_64.h
1 #ifndef _X86_64_PGTABLE_H
2 #define _X86_64_PGTABLE_H
3
4 #include <linux/const.h>
5 #ifndef __ASSEMBLY__
6
7 /*
8 * This file contains the functions and defines necessary to modify and use
9 * the x86-64 page table tree.
10 */
11 #include <asm/processor.h>
12 #include <linux/bitops.h>
13 #include <linux/threads.h>
14 #include <asm/pda.h>
15
16 extern pud_t level3_kernel_pgt[512];
17 extern pud_t level3_ident_pgt[512];
18 extern pmd_t level2_kernel_pgt[512];
19 extern pgd_t init_level4_pgt[];
20
21 #define swapper_pg_dir init_level4_pgt
22
23 extern void paging_init(void);
24 extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
25
26 /*
27 * ZERO_PAGE is a global shared page that is always zero: used
28 * for zero-mapped memory areas etc..
29 */
30 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
31 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
32
33 #endif /* !__ASSEMBLY__ */
34
35 /*
36 * PGDIR_SHIFT determines what a top-level page table entry can map
37 */
38 #define PGDIR_SHIFT 39
39 #define PTRS_PER_PGD 512
40
41 /*
42 * 3rd level page
43 */
44 #define PUD_SHIFT 30
45 #define PTRS_PER_PUD 512
46
47 /*
48 * PMD_SHIFT determines the size of the area a middle-level
49 * page table can map
50 */
51 #define PMD_SHIFT 21
52 #define PTRS_PER_PMD 512
53
54 /*
55 * entries per page directory level
56 */
57 #define PTRS_PER_PTE 512
58
59 #ifndef __ASSEMBLY__
60
61 #define pte_ERROR(e) \
62 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
63 #define pmd_ERROR(e) \
64 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
65 #define pud_ERROR(e) \
66 printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
67 #define pgd_ERROR(e) \
68 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
69
70 #define pgd_none(x) (!pgd_val(x))
71 #define pud_none(x) (!pud_val(x))
72
73 static inline void set_pte(pte_t *dst, pte_t val)
74 {
75 *dst = val;
76 }
77 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
78
79 static inline void set_pmd(pmd_t *dst, pmd_t val)
80 {
81 *dst = val;
82 }
83
84 static inline void set_pud(pud_t *dst, pud_t val)
85 {
86 *dst = val;
87 }
88
89 static inline void pud_clear (pud_t *pud)
90 {
91 set_pud(pud, __pud(0));
92 }
93
94 static inline void set_pgd(pgd_t *dst, pgd_t val)
95 {
96 *dst = val;
97 }
98
99 static inline void pgd_clear (pgd_t * pgd)
100 {
101 set_pgd(pgd, __pgd(0));
102 }
103
104 #define native_ptep_get_and_clear(xp) __pte(xchg(&(xp)->pte, 0))
105
106 struct mm_struct;
107
108 static inline pte_t native_ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
109 {
110 pte_t pte;
111 if (full) {
112 pte = *ptep;
113 *ptep = __pte(0);
114 } else {
115 pte = native_ptep_get_and_clear(ptep);
116 }
117 return pte;
118 }
119
120 #define pte_same(a, b) ((a).pte == (b).pte)
121
122 #define pte_pgprot(a) (__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))
123
124 #endif /* !__ASSEMBLY__ */
125
126 #define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
127 #define PMD_MASK (~(PMD_SIZE-1))
128 #define PUD_SIZE (_AC(1,UL) << PUD_SHIFT)
129 #define PUD_MASK (~(PUD_SIZE-1))
130 #define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
131 #define PGDIR_MASK (~(PGDIR_SIZE-1))
132
133
134 #define MAXMEM _AC(0x3fffffffffff, UL)
135 #define VMALLOC_START _AC(0xffffc20000000000, UL)
136 #define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
137 #define VMEMMAP_START _AC(0xffffe20000000000, UL)
138 #define MODULES_VADDR _AC(0xffffffff88000000, UL)
139 #define MODULES_END _AC(0xfffffffffff00000, UL)
140 #define MODULES_LEN (MODULES_END - MODULES_VADDR)
141
142 #ifndef __ASSEMBLY__
143
144 static inline unsigned long pgd_bad(pgd_t pgd)
145 {
146 return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
147 }
148
149 static inline unsigned long pud_bad(pud_t pud)
150 {
151 return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
152 }
153
154 static inline unsigned long pmd_bad(pmd_t pmd)
155 {
156 return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
157 }
158
159 #define pte_none(x) (!pte_val(x))
160 #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
161 #define native_pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
162
163 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this right? */
164 #define pte_page(x) pfn_to_page(pte_pfn(x))
165 #define pte_pfn(x) ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
166
167 /*
168 * Macro to mark a page protection value as "uncacheable".
169 */
170 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
171
172
173 /*
174 * Conversion functions: convert a page and protection to a page entry,
175 * and a page entry and page directory to the page they refer to.
176 */
177
178 /*
179 * Level 4 access.
180 */
181 #define pgd_page_vaddr(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
182 #define pgd_page(pgd) (pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT))
183 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
184 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
185 #define pgd_offset_k(address) (init_level4_pgt + pgd_index(address))
186 #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
187 #define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE })
188
189 /* PUD - Level3 access */
190 /* to find an entry in a page-table-directory. */
191 #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
192 #define pud_page(pud) (pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
193 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
194 #define pud_offset(pgd, address) ((pud_t *) pgd_page_vaddr(*(pgd)) + pud_index(address))
195 #define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
196
197 /* PMD - Level 2 access */
198 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
199 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
200
201 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
202 #define pmd_offset(dir, address) ((pmd_t *) pud_page_vaddr(*(dir)) + \
203 pmd_index(address))
204 #define pmd_none(x) (!pmd_val(x))
205 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
206 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
207 #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
208 #define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
209
210 #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
211 #define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | _PAGE_FILE })
212 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
213
214 /* PTE - Level 1 access. */
215
216 /* page, protection -> pte */
217 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
218
219 #define pte_index(address) \
220 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
221 #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
222 pte_index(address))
223
224 /* x86-64 always has all page tables mapped. */
225 #define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
226 #define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
227 #define pte_unmap(pte) /* NOP */
228 #define pte_unmap_nested(pte) /* NOP */
229
230 #define update_mmu_cache(vma,address,pte) do { } while (0)
231
232 /* Encode and de-code a swap entry */
233 #define __swp_type(x) (((x).val >> 1) & 0x3f)
234 #define __swp_offset(x) ((x).val >> 8)
235 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
236 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
237 #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
238
239 extern spinlock_t pgd_lock;
240 extern struct list_head pgd_list;
241
242 extern int kern_addr_valid(unsigned long addr);
243
244 pte_t *lookup_address(unsigned long addr);
245
246 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
247 remap_pfn_range(vma, vaddr, pfn, size, prot)
248
249 #define HAVE_ARCH_UNMAPPED_AREA
250 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
251
252 #define pgtable_cache_init() do { } while (0)
253 #define check_pgt_cache() do { } while (0)
254
255 #define PAGE_AGP PAGE_KERNEL_NOCACHE
256 #define HAVE_PAGE_AGP 1
257
258 /* fs/proc/kcore.c */
259 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
260 #define kc_offset_to_vaddr(o) \
261 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
262
263 #define __HAVE_ARCH_PTE_SAME
264 #endif /* !__ASSEMBLY__ */
265
266 #endif /* _X86_64_PGTABLE_H */
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