include/asm-x86_64/tlbflush.h

   1 #ifndef _X8664_TLBFLUSH_H
   2 #define _X8664_TLBFLUSH_H
   3
   4 #include <linux/config.h>
   5 #include <linux/mm.h>
   6 #include <asm/processor.h>
   7
   8 #define __flush_tlb()                                                   \
   9         do {                                                            \
  10                 unsigned long tmpreg;                                   \
  11                                                                         \
  12                 __asm__ __volatile__(                                   \
  13                         "movq %%cr3, %0;  # flush TLB \n"               \
  14                         "movq %0, %%cr3;              \n"               \
  15                         : "=r" (tmpreg)                                 \
  16                         :: "memory");                                   \
  17         } while (0)
  18
  19 /*
  20  * Global pages have to be flushed a bit differently. Not a real
  21  * performance problem because this does not happen often.
  22  */
  23 #define __flush_tlb_global()                                            \
  24         do {                                                            \
  25                 unsigned long tmpreg, cr4, cr4_orig;                    \
  26                                                                         \
  27                 __asm__ __volatile__(                                   \
  28                         "movq %%cr4, %2;  # turn off PGE     \n"        \
  29                         "movq %2, %1;                        \n"        \
  30                         "andq %3, %1;                        \n"        \
  31                         "movq %1, %%cr4;                     \n"        \
  32                         "movq %%cr3, %0;  # flush TLB        \n"        \
  33                         "movq %0, %%cr3;                     \n"        \
  34                         "movq %2, %%cr4;  # turn PGE back on \n"        \
  35                         : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) \
  36                         : "i" (~X86_CR4_PGE)                            \
  37                         : "memory");                                    \
  38         } while (0)
  39
  40 extern unsigned long pgkern_mask;
  41
  42 #define __flush_tlb_all() __flush_tlb_global()
  43
  44 #define __flush_tlb_one(addr) \
  45         __asm__ __volatile__("invlpg %0": :"m" (*(char *) addr))
  46
  47
  48 /*
  49  * TLB flushing:
  50  *
  51  *  - flush_tlb() flushes the current mm struct TLBs
  52  *  - flush_tlb_all() flushes all processes TLBs
  53  *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
  54  *  - flush_tlb_page(vma, vmaddr) flushes one page
  55  *  - flush_tlb_range(vma, start, end) flushes a range of pages
  56  *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
  57  *  - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
  58  *
  59  * ..but the x86_64 has somewhat limited tlb flushing capabilities,
  60  * and page-granular flushes are available only on i486 and up.
  61  */
  62
  63 #ifndef CONFIG_SMP
  64
  65 #define flush_tlb() __flush_tlb()
  66 #define flush_tlb_all() __flush_tlb_all()
  67 #define local_flush_tlb() __flush_tlb()
  68
  69 static inline void flush_tlb_mm(struct mm_struct *mm)
  70 {
  71         if (mm == current->active_mm)
  72                 __flush_tlb();
  73 }
  74
  75 static inline void flush_tlb_page(struct vm_area_struct *vma,
  76         unsigned long addr)
  77 {
  78         if (vma->vm_mm == current->active_mm)
  79                 __flush_tlb_one(addr);
  80 }
  81
  82 static inline void flush_tlb_range(struct vm_area_struct *vma,
  83         unsigned long start, unsigned long end)
  84 {
  85         if (vma->vm_mm == current->active_mm)
  86                 __flush_tlb();
  87 }
  88
  89 #else
  90
  91 #include <asm/smp.h>
  92
  93 #define local_flush_tlb() \
  94         __flush_tlb()
  95
  96 extern void flush_tlb_all(void);
  97 extern void flush_tlb_current_task(void);
  98 extern void flush_tlb_mm(struct mm_struct *);
  99 extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
 100
 101 #define flush_tlb()     flush_tlb_current_task()
 102
 103 static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end)
 104 {
 105         flush_tlb_mm(vma->vm_mm);
 106 }
 107
 108 #define TLBSTATE_OK     1
 109 #define TLBSTATE_LAZY   2
 110
 111 #endif
 112
 113 #define flush_tlb_kernel_range(start, end) flush_tlb_all()
 114
 115 static inline void flush_tlb_pgtables(struct mm_struct *mm,
 116                                       unsigned long start, unsigned long end)
 117 {
 118         /* x86_64 does not keep any page table caches in TLB */
 119 }
 120
 121 #endif /* _X8664_TLBFLUSH_H */