ARM: shmobile: r8a7791: Add MMP clock to device tree
[deliverable/linux.git] / include / dt-bindings / clock / r8a7791-clock.h
1 /*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11 #define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13 /* CPG */
14 #define R8A7791_CLK_MAIN 0
15 #define R8A7791_CLK_PLL0 1
16 #define R8A7791_CLK_PLL1 2
17 #define R8A7791_CLK_PLL3 3
18 #define R8A7791_CLK_LB 4
19 #define R8A7791_CLK_QSPI 5
20 #define R8A7791_CLK_SDH 6
21 #define R8A7791_CLK_SD0 7
22 #define R8A7791_CLK_Z 8
23
24 /* MSTP0 */
25 #define R8A7791_CLK_MSIOF0 0
26
27 /* MSTP1 */
28 #define R8A7791_CLK_VCP0 1
29 #define R8A7791_CLK_VPC0 3
30 #define R8A7791_CLK_JPU 6
31 #define R8A7791_CLK_SSP1 9
32 #define R8A7791_CLK_TMU1 11
33 #define R8A7791_CLK_3DG 12
34 #define R8A7791_CLK_2DDMAC 15
35 #define R8A7791_CLK_FDP1_1 18
36 #define R8A7791_CLK_FDP1_0 19
37 #define R8A7791_CLK_TMU3 21
38 #define R8A7791_CLK_TMU2 22
39 #define R8A7791_CLK_CMT0 24
40 #define R8A7791_CLK_TMU0 25
41 #define R8A7791_CLK_VSP1_DU1 27
42 #define R8A7791_CLK_VSP1_DU0 28
43 #define R8A7791_CLK_VSP1_S 31
44
45 /* MSTP2 */
46 #define R8A7791_CLK_SCIFA2 2
47 #define R8A7791_CLK_SCIFA1 3
48 #define R8A7791_CLK_SCIFA0 4
49 #define R8A7791_CLK_MSIOF2 5
50 #define R8A7791_CLK_SCIFB0 6
51 #define R8A7791_CLK_SCIFB1 7
52 #define R8A7791_CLK_MSIOF1 8
53 #define R8A7791_CLK_SCIFB2 16
54 #define R8A7791_CLK_SYS_DMAC1 18
55 #define R8A7791_CLK_SYS_DMAC0 19
56
57 /* MSTP3 */
58 #define R8A7791_CLK_TPU0 4
59 #define R8A7791_CLK_SDHI2 11
60 #define R8A7791_CLK_SDHI1 12
61 #define R8A7791_CLK_SDHI0 14
62 #define R8A7791_CLK_MMCIF0 15
63 #define R8A7791_CLK_IIC0 18
64 #define R8A7791_CLK_PCIEC 19
65 #define R8A7791_CLK_IIC1 23
66 #define R8A7791_CLK_SSUSB 28
67 #define R8A7791_CLK_CMT1 29
68 #define R8A7791_CLK_USBDMAC0 30
69 #define R8A7791_CLK_USBDMAC1 31
70
71 /* MSTP5 */
72 #define R8A7791_CLK_THERMAL 22
73 #define R8A7791_CLK_PWM 23
74
75 /* MSTP7 */
76 #define R8A7791_CLK_EHCI 3
77 #define R8A7791_CLK_HSUSB 4
78 #define R8A7791_CLK_HSCIF2 13
79 #define R8A7791_CLK_SCIF5 14
80 #define R8A7791_CLK_SCIF4 15
81 #define R8A7791_CLK_HSCIF1 16
82 #define R8A7791_CLK_HSCIF0 17
83 #define R8A7791_CLK_SCIF3 18
84 #define R8A7791_CLK_SCIF2 19
85 #define R8A7791_CLK_SCIF1 20
86 #define R8A7791_CLK_SCIF0 21
87 #define R8A7791_CLK_DU1 23
88 #define R8A7791_CLK_DU0 24
89 #define R8A7791_CLK_LVDS0 26
90
91 /* MSTP8 */
92 #define R8A7791_CLK_VIN2 9
93 #define R8A7791_CLK_VIN1 10
94 #define R8A7791_CLK_VIN0 11
95 #define R8A7791_CLK_ETHER 13
96 #define R8A7791_CLK_SATA1 14
97 #define R8A7791_CLK_SATA0 15
98
99 /* MSTP9 */
100 #define R8A7791_CLK_GPIO7 4
101 #define R8A7791_CLK_GPIO6 5
102 #define R8A7791_CLK_GPIO5 7
103 #define R8A7791_CLK_GPIO4 8
104 #define R8A7791_CLK_GPIO3 9
105 #define R8A7791_CLK_GPIO2 10
106 #define R8A7791_CLK_GPIO1 11
107 #define R8A7791_CLK_GPIO0 12
108 #define R8A7791_CLK_RCAN1 15
109 #define R8A7791_CLK_RCAN0 16
110 #define R8A7791_CLK_QSPI_MOD 17
111 #define R8A7791_CLK_I2C5 25
112 #define R8A7791_CLK_IICDVFS 26
113 #define R8A7791_CLK_I2C4 27
114 #define R8A7791_CLK_I2C3 28
115 #define R8A7791_CLK_I2C2 29
116 #define R8A7791_CLK_I2C1 30
117 #define R8A7791_CLK_I2C0 31
118
119 /* MSTP10 */
120 #define R8A7791_CLK_SSI_ALL 5
121 #define R8A7791_CLK_SSI9 6
122 #define R8A7791_CLK_SSI8 7
123 #define R8A7791_CLK_SSI7 8
124 #define R8A7791_CLK_SSI6 9
125 #define R8A7791_CLK_SSI5 10
126 #define R8A7791_CLK_SSI4 11
127 #define R8A7791_CLK_SSI3 12
128 #define R8A7791_CLK_SSI2 13
129 #define R8A7791_CLK_SSI1 14
130 #define R8A7791_CLK_SSI0 15
131 #define R8A7791_CLK_SCU_ALL 17
132 #define R8A7791_CLK_SCU_DVC1 18
133 #define R8A7791_CLK_SCU_DVC0 19
134 #define R8A7791_CLK_SCU_SRC9 22
135 #define R8A7791_CLK_SCU_SRC8 23
136 #define R8A7791_CLK_SCU_SRC7 24
137 #define R8A7791_CLK_SCU_SRC6 25
138 #define R8A7791_CLK_SCU_SRC5 26
139 #define R8A7791_CLK_SCU_SRC4 27
140 #define R8A7791_CLK_SCU_SRC3 28
141 #define R8A7791_CLK_SCU_SRC2 29
142 #define R8A7791_CLK_SCU_SRC1 30
143 #define R8A7791_CLK_SCU_SRC0 31
144
145 /* MSTP11 */
146 #define R8A7791_CLK_SCIFA3 6
147 #define R8A7791_CLK_SCIFA4 7
148 #define R8A7791_CLK_SCIFA5 8
149
150 #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
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