625933caa8c21a859fb57b5768489e696bd60740
[deliverable/binutils-gdb.git] / include / elf / ia64.h
1 /* IA-64 ELF support for BFD.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2008, 2009, 2010
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of BFD, the Binary File Descriptor library.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #ifndef _ELF_IA64_H
24 #define _ELF_IA64_H
25
26 /* Bits in the e_flags field of the Elf64_Ehdr: */
27
28 #define EF_IA_64_MASKOS 0x0000000f /* OS-specific flags. */
29 #define EF_IA_64_ARCH 0xff000000 /* Arch. version mask. */
30 #define EF_IA_64_ARCHVER_1 (1 << 24) /* Arch. version level 1 compat. */
31
32 /* ??? These four definitions are not part of the SVR4 ABI.
33 They were present in David's initial code drop, so it is probable
34 that they are used by HP/UX. */
35 #define EF_IA_64_TRAPNIL (1 << 0) /* Trap NIL pointer dereferences. */
36 #define EF_IA_64_EXT (1 << 2) /* Program uses arch. extensions. */
37 #define EF_IA_64_BE (1 << 3) /* PSR BE bit set (big-endian). */
38 #define EFA_IA_64_EAS2_3 0x23000000 /* IA64 EAS 2.3. */
39
40 #define EF_IA_64_ABI64 (1 << 4) /* 64-bit ABI. */
41 /* Not used yet. */
42 #define EF_IA_64_REDUCEDFP (1 << 5) /* Only FP6-FP11 used. */
43 #define EF_IA_64_CONS_GP (1 << 6) /* gp as program wide constant. */
44 #define EF_IA_64_NOFUNCDESC_CONS_GP (1 << 7) /* And no function descriptors. */
45 /* Not used yet. */
46 #define EF_IA_64_ABSOLUTE (1 << 8) /* Load at absolute addresses. */
47
48 #define ELF_STRING_ia64_archext ".IA_64.archext"
49 #define ELF_STRING_ia64_pltoff ".IA_64.pltoff"
50 #define ELF_STRING_ia64_unwind ".IA_64.unwind"
51 #define ELF_STRING_ia64_unwind_info ".IA_64.unwind_info"
52 #define ELF_STRING_ia64_unwind_once ".gnu.linkonce.ia64unw."
53 #define ELF_STRING_ia64_unwind_info_once ".gnu.linkonce.ia64unwi."
54 /* .IA_64.unwind_hdr is only used by HP-UX. */
55 #define ELF_STRING_ia64_unwind_hdr ".IA_64.unwind_hdr"
56
57 /* Bits in the sh_flags field of Elf64_Shdr: */
58
59 #define SHF_IA_64_SHORT 0x10000000 /* Section near gp. */
60 #define SHF_IA_64_NORECOV 0x20000000 /* Spec insns w/o recovery. */
61
62 #define SHF_IA_64_HP_TLS 0x01000000 /* HP specific TLS flag. */
63
64 #define SHF_IA_64_VMS_GLOBAL 0x0100000000ULL /* Global for clustering. */
65 #define SHF_IA_64_VMS_OVERLAID 0x0200000000ULL /* To be overlaid. */
66 #define SHF_IA_64_VMS_SHARED 0x0400000000ULL /* Shared btw processes. */
67 #define SHF_IA_64_VMS_VECTOR 0x0800000000ULL /* Priv change mode vect. */
68 #define SHF_IA_64_VMS_ALLOC_64BIT 0x1000000000ULL /* Allocate beyond 2GB. */
69 #define SHF_IA_64_VMS_PROTECTED 0x2000000000ULL /* Export from sharable. */
70
71 /* Possible values for sh_type in Elf64_Shdr: */
72
73 #define SHT_IA_64_EXT (SHT_LOPROC + 0) /* Extension bits. */
74 #define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* Unwind bits. */
75 #define SHT_IA_64_LOPSREG (SHT_LOPROC + 0x8000000)
76 /* ABI says (SHT_LOPROC + 0xfffffff) but I think it's a typo -- this makes sense. */
77 #define SHT_IA_64_HIPSREG (SHT_LOPROC + 0x8ffffff)
78 #define SHT_IA_64_PRIORITY_INIT (SHT_LOPROC + 0x9000000)
79
80 /* SHT_IA_64_HP_OPT_ANOT is only generated by HPUX compilers for its
81 optimization annotation section. GCC does not generate it but we
82 want readelf to know what they are. Do not use two capital Ns in
83 annotate or sed will turn it into 32 or 64 during the build. */
84 #define SHT_IA_64_HP_OPT_ANOT 0x60000004
85
86 /* OpenVMS section types. */
87 /* The section contains PC-to-source correlation information for use by the
88 VMS RTL's traceback facility. */
89 #define SHT_IA_64_VMS_TRACE 0x60000000
90 /* The section contains routine signature information for use by the
91 translated image executive. */
92 #define SHT_IA_64_VMS_TIE_SIGNATURES 0x60000001
93 /* The section contains dwarf-3 information. */
94 #define SHT_IA_64_VMS_DEBUG 0x60000002
95 /* The section contains the dwarf-3 string table. */
96 #define SHT_IA_64_VMS_DEBUG_STR 0x60000003
97 /* The section contains linkage information to perform consistency checking
98 accross object modules. */
99 #define SHT_IA_64_VMS_LINKAGES 0x60000004
100 /* The section allows the symbol vector in an image to be location through
101 the section table. */
102 #define SHT_IA_64_VMS_SYMBOL_VECTOR 0x60000005
103 /* The section contains inter-image fixups. */
104 #define SHT_IA_64_VMS_FIXUP 0x60000006
105 /* The section contains unmangled name info. */
106 #define SHT_IA_64_VMS_DISPLAY_NAME_INFO 0x60000007
107
108 /* Bits in the p_flags field of Elf64_Phdr: */
109
110 #define PF_IA_64_NORECOV 0x80000000
111
112 /* Possible values for p_type in Elf64_Phdr: */
113
114 #define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* Arch extension bits, */
115 #define PT_IA_64_UNWIND (PT_LOPROC + 1) /* IA64 unwind bits. */
116
117 /* HP-UX specific values for p_type in Elf64_Phdr.
118 These values are currently just used to make
119 readelf more usable on HP-UX. */
120
121 #define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12)
122 #define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13)
123 #define PT_IA_64_HP_STACK (PT_LOOS + 0x14)
124
125 /* Possible values for d_tag in Elf64_Dyn: */
126
127 #define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0)
128
129 /* VMS specific values for d_tag in Elf64_Dyn: */
130
131 #define DT_IA_64_VMS_SUBTYPE (DT_LOOS + 0)
132 #define DT_IA_64_VMS_IMGIOCNT (DT_LOOS + 2)
133 #define DT_IA_64_VMS_LNKFLAGS (DT_LOOS + 8)
134 #define DT_IA_64_VMS_VIR_MEM_BLK_SIZ (DT_LOOS + 10)
135 #define DT_IA_64_VMS_IDENT (DT_LOOS + 12)
136 #define DT_IA_64_VMS_NEEDED_IDENT (DT_LOOS + 16)
137 #define DT_IA_64_VMS_IMG_RELA_CNT (DT_LOOS + 18)
138 #define DT_IA_64_VMS_SEG_RELA_CNT (DT_LOOS + 20)
139 #define DT_IA_64_VMS_FIXUP_RELA_CNT (DT_LOOS + 22)
140 #define DT_IA_64_VMS_FIXUP_NEEDED (DT_LOOS + 24)
141 #define DT_IA_64_VMS_SYMVEC_CNT (DT_LOOS + 26)
142 #define DT_IA_64_VMS_XLATED (DT_LOOS + 30)
143 #define DT_IA_64_VMS_STACKSIZE (DT_LOOS + 32)
144 #define DT_IA_64_VMS_UNWINDSZ (DT_LOOS + 34)
145 #define DT_IA_64_VMS_UNWIND_CODSEG (DT_LOOS + 36)
146 #define DT_IA_64_VMS_UNWIND_INFOSEG (DT_LOOS + 38)
147 #define DT_IA_64_VMS_LINKTIME (DT_LOOS + 40)
148 #define DT_IA_64_VMS_SEG_NO (DT_LOOS + 42)
149 #define DT_IA_64_VMS_SYMVEC_OFFSET (DT_LOOS + 44)
150 #define DT_IA_64_VMS_SYMVEC_SEG (DT_LOOS + 46)
151 #define DT_IA_64_VMS_UNWIND_OFFSET (DT_LOOS + 48)
152 #define DT_IA_64_VMS_UNWIND_SEG (DT_LOOS + 50)
153 #define DT_IA_64_VMS_STRTAB_OFFSET (DT_LOOS + 52)
154 #define DT_IA_64_VMS_SYSVER_OFFSET (DT_LOOS + 54)
155 #define DT_IA_64_VMS_IMG_RELA_OFF (DT_LOOS + 56)
156 #define DT_IA_64_VMS_SEG_RELA_OFF (DT_LOOS + 58)
157 #define DT_IA_64_VMS_FIXUP_RELA_OFF (DT_LOOS + 60)
158 #define DT_IA_64_VMS_PLTGOT_OFFSET (DT_LOOS + 62)
159 #define DT_IA_64_VMS_PLTGOT_SEG (DT_LOOS + 64)
160 #define DT_IA_64_VMS_FPMODE (DT_LOOS + 66)
161
162 /* This section only used by HP-UX, The HP linker gives weak symbols
163 precedence over regular common symbols. We want common to override
164 weak. Using this common instead of SHN_COMMON does that. */
165 #define SHN_IA_64_ANSI_COMMON SHN_LORESERVE
166
167 /* This section is only used by OpenVMS. Symbol is defined in the symbol
168 vector (only possible for image files). */
169 #define SHN_IA_64_VMS_SYMVEC SHN_LOOS
170
171 /* IA64-specific relocation types: */
172
173 /* Relocs apply to specific instructions within a bundle. The least
174 significant 2 bits of the address indicate which instruction in the
175 bundle the reloc refers to (0=first slot, 1=second slow, 2=third
176 slot, 3=undefined) and the remaining bits give the address of the
177 bundle (16 byte aligned).
178
179 The top 5 bits of the reloc code specifies the expression type, the
180 low 3 bits the format of the data word being relocated. */
181
182 #include "elf/reloc-macros.h"
183
184 START_RELOC_NUMBERS (elf_ia64_reloc_type)
185 RELOC_NUMBER (R_IA64_NONE, 0x00) /* none */
186
187 RELOC_NUMBER (R_IA64_IMM14, 0x21) /* symbol + addend, add imm14 */
188 RELOC_NUMBER (R_IA64_IMM22, 0x22) /* symbol + addend, add imm22 */
189 RELOC_NUMBER (R_IA64_IMM64, 0x23) /* symbol + addend, mov imm64 */
190 RELOC_NUMBER (R_IA64_DIR32MSB, 0x24) /* symbol + addend, data4 MSB */
191 RELOC_NUMBER (R_IA64_DIR32LSB, 0x25) /* symbol + addend, data4 LSB */
192 RELOC_NUMBER (R_IA64_DIR64MSB, 0x26) /* symbol + addend, data8 MSB */
193 RELOC_NUMBER (R_IA64_DIR64LSB, 0x27) /* symbol + addend, data8 LSB */
194
195 RELOC_NUMBER (R_IA64_GPREL22, 0x2a) /* @gprel(sym+add), add imm22 */
196 RELOC_NUMBER (R_IA64_GPREL64I, 0x2b) /* @gprel(sym+add), mov imm64 */
197 RELOC_NUMBER (R_IA64_GPREL32MSB, 0x2c) /* @gprel(sym+add), data4 MSB */
198 RELOC_NUMBER (R_IA64_GPREL32LSB, 0x2d) /* @gprel(sym+add), data4 LSB */
199 RELOC_NUMBER (R_IA64_GPREL64MSB, 0x2e) /* @gprel(sym+add), data8 MSB */
200 RELOC_NUMBER (R_IA64_GPREL64LSB, 0x2f) /* @gprel(sym+add), data8 LSB */
201
202 RELOC_NUMBER (R_IA64_LTOFF22, 0x32) /* @ltoff(sym+add), add imm22 */
203 RELOC_NUMBER (R_IA64_LTOFF64I, 0x33) /* @ltoff(sym+add), mov imm64 */
204
205 RELOC_NUMBER (R_IA64_PLTOFF22, 0x3a) /* @pltoff(sym+add), add imm22 */
206 RELOC_NUMBER (R_IA64_PLTOFF64I, 0x3b) /* @pltoff(sym+add), mov imm64 */
207 RELOC_NUMBER (R_IA64_PLTOFF64MSB, 0x3e) /* @pltoff(sym+add), data8 MSB */
208 RELOC_NUMBER (R_IA64_PLTOFF64LSB, 0x3f) /* @pltoff(sym+add), data8 LSB */
209
210 RELOC_NUMBER (R_IA64_FPTR64I, 0x43) /* @fptr(sym+add), mov imm64 */
211 RELOC_NUMBER (R_IA64_FPTR32MSB, 0x44) /* @fptr(sym+add), data4 MSB */
212 RELOC_NUMBER (R_IA64_FPTR32LSB, 0x45) /* @fptr(sym+add), data4 LSB */
213 RELOC_NUMBER (R_IA64_FPTR64MSB, 0x46) /* @fptr(sym+add), data8 MSB */
214 RELOC_NUMBER (R_IA64_FPTR64LSB, 0x47) /* @fptr(sym+add), data8 LSB */
215
216 RELOC_NUMBER (R_IA64_PCREL60B, 0x48) /* @pcrel(sym+add), brl */
217 RELOC_NUMBER (R_IA64_PCREL21B, 0x49) /* @pcrel(sym+add), ptb, call */
218 RELOC_NUMBER (R_IA64_PCREL21M, 0x4a) /* @pcrel(sym+add), chk.s */
219 RELOC_NUMBER (R_IA64_PCREL21F, 0x4b) /* @pcrel(sym+add), fchkf */
220 RELOC_NUMBER (R_IA64_PCREL32MSB, 0x4c) /* @pcrel(sym+add), data4 MSB */
221 RELOC_NUMBER (R_IA64_PCREL32LSB, 0x4d) /* @pcrel(sym+add), data4 LSB */
222 RELOC_NUMBER (R_IA64_PCREL64MSB, 0x4e) /* @pcrel(sym+add), data8 MSB */
223 RELOC_NUMBER (R_IA64_PCREL64LSB, 0x4f) /* @pcrel(sym+add), data8 LSB */
224
225 RELOC_NUMBER (R_IA64_LTOFF_FPTR22, 0x52) /* @ltoff(@fptr(s+a)), imm22 */
226 RELOC_NUMBER (R_IA64_LTOFF_FPTR64I, 0x53) /* @ltoff(@fptr(s+a)), imm64 */
227 RELOC_NUMBER (R_IA64_LTOFF_FPTR32MSB, 0x54) /* @ltoff(@fptr(s+a)), 4 MSB */
228 RELOC_NUMBER (R_IA64_LTOFF_FPTR32LSB, 0x55) /* @ltoff(@fptr(s+a)), 4 LSB */
229 RELOC_NUMBER (R_IA64_LTOFF_FPTR64MSB, 0x56) /* @ltoff(@fptr(s+a)), 8 MSB */
230 RELOC_NUMBER (R_IA64_LTOFF_FPTR64LSB, 0x57) /* @ltoff(@fptr(s+a)), 8 LSB */
231
232 RELOC_NUMBER (R_IA64_SEGREL32MSB, 0x5c) /* @segrel(sym+add), data4 MSB */
233 RELOC_NUMBER (R_IA64_SEGREL32LSB, 0x5d) /* @segrel(sym+add), data4 LSB */
234 RELOC_NUMBER (R_IA64_SEGREL64MSB, 0x5e) /* @segrel(sym+add), data8 MSB */
235 RELOC_NUMBER (R_IA64_SEGREL64LSB, 0x5f) /* @segrel(sym+add), data8 LSB */
236
237 RELOC_NUMBER (R_IA64_SECREL32MSB, 0x64) /* @secrel(sym+add), data4 MSB */
238 RELOC_NUMBER (R_IA64_SECREL32LSB, 0x65) /* @secrel(sym+add), data4 LSB */
239 RELOC_NUMBER (R_IA64_SECREL64MSB, 0x66) /* @secrel(sym+add), data8 MSB */
240 RELOC_NUMBER (R_IA64_SECREL64LSB, 0x67) /* @secrel(sym+add), data8 LSB */
241
242 RELOC_NUMBER (R_IA64_REL32MSB, 0x6c) /* data 4 + REL */
243 RELOC_NUMBER (R_IA64_REL32LSB, 0x6d) /* data 4 + REL */
244 RELOC_NUMBER (R_IA64_REL64MSB, 0x6e) /* data 8 + REL */
245 RELOC_NUMBER (R_IA64_REL64LSB, 0x6f) /* data 8 + REL */
246
247 RELOC_NUMBER (R_IA64_LTV32MSB, 0x74) /* symbol + addend, data4 MSB */
248 RELOC_NUMBER (R_IA64_LTV32LSB, 0x75) /* symbol + addend, data4 LSB */
249 RELOC_NUMBER (R_IA64_LTV64MSB, 0x76) /* symbol + addend, data8 MSB */
250 RELOC_NUMBER (R_IA64_LTV64LSB, 0x77) /* symbol + addend, data8 LSB */
251
252 RELOC_NUMBER (R_IA64_PCREL21BI, 0x79) /* @pcrel(sym+add), ptb, call */
253 RELOC_NUMBER (R_IA64_PCREL22, 0x7a) /* @pcrel(sym+add), imm22 */
254 RELOC_NUMBER (R_IA64_PCREL64I, 0x7b) /* @pcrel(sym+add), imm64 */
255
256 RELOC_NUMBER (R_IA64_IPLTMSB, 0x80) /* dynamic reloc, imported PLT, MSB */
257 RELOC_NUMBER (R_IA64_IPLTLSB, 0x81) /* dynamic reloc, imported PLT, LSB */
258 RELOC_NUMBER (R_IA64_COPY, 0x84) /* dynamic reloc, data copy */
259 RELOC_NUMBER (R_IA64_LTOFF22X, 0x86) /* LTOFF22, relaxable. */
260 RELOC_NUMBER (R_IA64_LDXMOV, 0x87) /* Use of LTOFF22X. */
261
262 RELOC_NUMBER (R_IA64_TPREL14, 0x91) /* @tprel(sym+add), add imm14 */
263 RELOC_NUMBER (R_IA64_TPREL22, 0x92) /* @tprel(sym+add), add imm22 */
264 RELOC_NUMBER (R_IA64_TPREL64I, 0x93) /* @tprel(sym+add), add imm64 */
265 RELOC_NUMBER (R_IA64_TPREL64MSB, 0x96) /* @tprel(sym+add), data8 MSB */
266 RELOC_NUMBER (R_IA64_TPREL64LSB, 0x97) /* @tprel(sym+add), data8 LSB */
267
268 RELOC_NUMBER (R_IA64_LTOFF_TPREL22, 0x9a) /* @ltoff(@tprel(s+a)), add imm22 */
269
270 RELOC_NUMBER (R_IA64_DTPMOD64MSB, 0xa6) /* @dtpmod(sym+add), data8 MSB */
271 RELOC_NUMBER (R_IA64_DTPMOD64LSB, 0xa7) /* @dtpmod(sym+add), data8 LSB */
272 RELOC_NUMBER (R_IA64_LTOFF_DTPMOD22, 0xaa) /* @ltoff(@dtpmod(s+a)), imm22 */
273
274 RELOC_NUMBER (R_IA64_DTPREL14, 0xb1) /* @dtprel(sym+add), imm14 */
275 RELOC_NUMBER (R_IA64_DTPREL22, 0xb2) /* @dtprel(sym+add), imm22 */
276 RELOC_NUMBER (R_IA64_DTPREL64I, 0xb3) /* @dtprel(sym+add), imm64 */
277 RELOC_NUMBER (R_IA64_DTPREL32MSB, 0xb4) /* @dtprel(sym+add), data4 MSB */
278 RELOC_NUMBER (R_IA64_DTPREL32LSB, 0xb5) /* @dtprel(sym+add), data4 LSB */
279 RELOC_NUMBER (R_IA64_DTPREL64MSB, 0xb6) /* @dtprel(sym+add), data8 MSB */
280 RELOC_NUMBER (R_IA64_DTPREL64LSB, 0xb7) /* @dtprel(sym+add), data8 LSB */
281
282 RELOC_NUMBER (R_IA64_LTOFF_DTPREL22, 0xba) /* @ltoff(@dtprel(s+a)), imm22 */
283
284 FAKE_RELOC (R_IA64_MAX_RELOC_CODE, 0xba)
285 END_RELOC_NUMBERS (R_IA64_max)
286
287 #endif /* _ELF_IA64_H */
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