add more extern C
[deliverable/binutils-gdb.git] / include / elf / mips.h
1 /* MIPS ELF support for BFD.
2 Copyright (C) 1993-2016 Free Software Foundation, Inc.
3
4 By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
5 information in the System V Application Binary Interface, MIPS
6 Processor Supplement.
7
8 This file is part of BFD, the Binary File Descriptor library.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
23 MA 02110-1301, USA. */
24
25 /* This file holds definitions specific to the MIPS ELF ABI. Note
26 that most of this is not actually implemented by BFD. */
27
28 #ifndef _ELF_MIPS_H
29 #define _ELF_MIPS_H
30
31 #include "elf/reloc-macros.h"
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 /* Relocation types. */
38 START_RELOC_NUMBERS (elf_mips_reloc_type)
39 RELOC_NUMBER (R_MIPS_NONE, 0)
40 RELOC_NUMBER (R_MIPS_16, 1)
41 RELOC_NUMBER (R_MIPS_32, 2) /* In Elf 64: alias R_MIPS_ADD */
42 RELOC_NUMBER (R_MIPS_REL32, 3) /* In Elf 64: alias R_MIPS_REL */
43 RELOC_NUMBER (R_MIPS_26, 4)
44 RELOC_NUMBER (R_MIPS_HI16, 5)
45 RELOC_NUMBER (R_MIPS_LO16, 6)
46 RELOC_NUMBER (R_MIPS_GPREL16, 7) /* In Elf 64: alias R_MIPS_GPREL */
47 RELOC_NUMBER (R_MIPS_LITERAL, 8)
48 RELOC_NUMBER (R_MIPS_GOT16, 9) /* In Elf 64: alias R_MIPS_GOT */
49 RELOC_NUMBER (R_MIPS_PC16, 10)
50 RELOC_NUMBER (R_MIPS_CALL16, 11) /* In Elf 64: alias R_MIPS_CALL */
51 RELOC_NUMBER (R_MIPS_GPREL32, 12)
52 /* The remaining relocs are defined on Irix, although they are not
53 in the MIPS ELF ABI. */
54 RELOC_NUMBER (R_MIPS_UNUSED1, 13)
55 RELOC_NUMBER (R_MIPS_UNUSED2, 14)
56 RELOC_NUMBER (R_MIPS_UNUSED3, 15)
57 RELOC_NUMBER (R_MIPS_SHIFT5, 16)
58 RELOC_NUMBER (R_MIPS_SHIFT6, 17)
59 RELOC_NUMBER (R_MIPS_64, 18)
60 RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
61 RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
62 RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
63 RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
64 RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
65 RELOC_NUMBER (R_MIPS_SUB, 24)
66 RELOC_NUMBER (R_MIPS_INSERT_A, 25)
67 RELOC_NUMBER (R_MIPS_INSERT_B, 26)
68 RELOC_NUMBER (R_MIPS_DELETE, 27)
69 RELOC_NUMBER (R_MIPS_HIGHER, 28)
70 RELOC_NUMBER (R_MIPS_HIGHEST, 29)
71 RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
72 RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
73 RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
74 RELOC_NUMBER (R_MIPS_REL16, 33)
75 RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
76 RELOC_NUMBER (R_MIPS_PJUMP, 35)
77 RELOC_NUMBER (R_MIPS_RELGOT, 36)
78 RELOC_NUMBER (R_MIPS_JALR, 37)
79 /* TLS relocations. */
80 RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
81 RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
82 RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
83 RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
84 RELOC_NUMBER (R_MIPS_TLS_GD, 42)
85 RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
86 RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
87 RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
88 RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
89 RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
90 RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
91 RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
92 RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
93 RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
94 /* Space to grow */
95 RELOC_NUMBER (R_MIPS_PC21_S2, 60)
96 RELOC_NUMBER (R_MIPS_PC26_S2, 61)
97 RELOC_NUMBER (R_MIPS_PC18_S3, 62)
98 RELOC_NUMBER (R_MIPS_PC19_S2, 63)
99 RELOC_NUMBER (R_MIPS_PCHI16, 64)
100 RELOC_NUMBER (R_MIPS_PCLO16, 65)
101 FAKE_RELOC (R_MIPS_max, 66)
102 /* These relocs are used for the mips16. */
103 FAKE_RELOC (R_MIPS16_min, 100)
104 RELOC_NUMBER (R_MIPS16_26, 100)
105 RELOC_NUMBER (R_MIPS16_GPREL, 101)
106 RELOC_NUMBER (R_MIPS16_GOT16, 102)
107 RELOC_NUMBER (R_MIPS16_CALL16, 103)
108 RELOC_NUMBER (R_MIPS16_HI16, 104)
109 RELOC_NUMBER (R_MIPS16_LO16, 105)
110 RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
111 RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
112 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
113 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
114 RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
115 RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
116 RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
117 FAKE_RELOC (R_MIPS16_max, 113)
118 /* These relocations are specific to VxWorks. */
119 RELOC_NUMBER (R_MIPS_COPY, 126)
120 RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
121
122 /* These relocations are specific to microMIPS. */
123 FAKE_RELOC (R_MICROMIPS_min, 130)
124 RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
125 RELOC_NUMBER (R_MICROMIPS_HI16, 134)
126 RELOC_NUMBER (R_MICROMIPS_LO16, 135)
127 RELOC_NUMBER (R_MICROMIPS_GPREL16, 136) /* In Elf 64:
128 alias R_MICROMIPS_GPREL */
129 RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
130 RELOC_NUMBER (R_MICROMIPS_GOT16, 138) /* In Elf 64:
131 alias R_MICROMIPS_GOT */
132 RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
133 RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
134 RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
135 RELOC_NUMBER (R_MICROMIPS_CALL16, 142) /* In Elf 64:
136 alias R_MICROMIPS_CALL */
137 RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
138 RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
139 RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
140 RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
141 RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
142 RELOC_NUMBER (R_MICROMIPS_SUB, 150)
143 RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
144 RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
145 RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
146 RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
147 RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
148 RELOC_NUMBER (R_MICROMIPS_JALR, 156)
149 RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
150 /* TLS relocations. */
151 RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
152 RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
153 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
154 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
155 RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
156 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
157 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
158 /* microMIPS GP- and PC-relative relocations. */
159 RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
160 RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
161 FAKE_RELOC (R_MICROMIPS_max, 174)
162
163 /* This was a GNU extension used by embedded-PIC. It was co-opted by
164 mips-linux for exception-handling data. GCC stopped using it in
165 May, 2004, then started using it again for compact unwind tables. */
166 RELOC_NUMBER (R_MIPS_PC32, 248)
167 RELOC_NUMBER (R_MIPS_EH, 249)
168 /* FIXME: this relocation is used internally by gas. */
169 RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
170 /* These are GNU extensions to enable C++ vtable garbage collection. */
171 RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
172 RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
173 END_RELOC_NUMBERS (R_MIPS_maxext)
174
175 /* Processor specific flags for the ELF header e_flags field. */
176
177 /* At least one .noreorder directive appears in the source. */
178 #define EF_MIPS_NOREORDER 0x00000001
179
180 /* File contains position independent code. */
181 #define EF_MIPS_PIC 0x00000002
182
183 /* Code in file uses the standard calling sequence for calling
184 position independent code. */
185 #define EF_MIPS_CPIC 0x00000004
186
187 /* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */
188 #define EF_MIPS_XGOT 0x00000008
189
190 /* Code in file uses UCODE (obsolete) */
191 #define EF_MIPS_UCODE 0x00000010
192
193 /* Code in file uses new ABI (-n32 on Irix 6). */
194 #define EF_MIPS_ABI2 0x00000020
195
196 /* Process the .MIPS.options section first by ld */
197 #define EF_MIPS_OPTIONS_FIRST 0x00000080
198
199 /* Indicates code compiled for a 64-bit machine in 32-bit mode
200 (regs are 32-bits wide). */
201 #define EF_MIPS_32BITMODE 0x00000100
202
203 /* 32-bit machine but FP registers are 64 bit (-mfp64). */
204 #define EF_MIPS_FP64 0x00000200
205
206 /* Code in file uses the IEEE 754-2008 NaN encoding convention. */
207 #define EF_MIPS_NAN2008 0x00000400
208
209 /* Architectural Extensions used by this file */
210 #define EF_MIPS_ARCH_ASE 0x0f000000
211
212 /* Use MDMX multimedia extensions */
213 #define EF_MIPS_ARCH_ASE_MDMX 0x08000000
214
215 /* Use MIPS-16 ISA extensions */
216 #define EF_MIPS_ARCH_ASE_M16 0x04000000
217
218 /* Use MICROMIPS ISA extensions. */
219 #define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000
220
221 /* Four bit MIPS architecture field. */
222 #define EF_MIPS_ARCH 0xf0000000
223
224 /* -mips1 code. */
225 #define E_MIPS_ARCH_1 0x00000000
226
227 /* -mips2 code. */
228 #define E_MIPS_ARCH_2 0x10000000
229
230 /* -mips3 code. */
231 #define E_MIPS_ARCH_3 0x20000000
232
233 /* -mips4 code. */
234 #define E_MIPS_ARCH_4 0x30000000
235
236 /* -mips5 code. */
237 #define E_MIPS_ARCH_5 0x40000000
238
239 /* -mips32 code. */
240 #define E_MIPS_ARCH_32 0x50000000
241
242 /* -mips64 code. */
243 #define E_MIPS_ARCH_64 0x60000000
244
245 /* -mips32r2 code. */
246 #define E_MIPS_ARCH_32R2 0x70000000
247
248 /* -mips64r2 code. */
249 #define E_MIPS_ARCH_64R2 0x80000000
250
251 /* -mips32r6 code. */
252 #define E_MIPS_ARCH_32R6 0x90000000
253
254 /* -mips64r6 code. */
255 #define E_MIPS_ARCH_64R6 0xa0000000
256
257 /* The ABI of the file. Also see EF_MIPS_ABI2 above. */
258 #define EF_MIPS_ABI 0x0000F000
259
260 /* The original o32 abi. */
261 #define E_MIPS_ABI_O32 0x00001000
262
263 /* O32 extended to work on 64 bit architectures */
264 #define E_MIPS_ABI_O64 0x00002000
265
266 /* EABI in 32 bit mode */
267 #define E_MIPS_ABI_EABI32 0x00003000
268
269 /* EABI in 64 bit mode */
270 #define E_MIPS_ABI_EABI64 0x00004000
271
272
273 /* Machine variant if we know it. This field was invented at Cygnus,
274 but it is hoped that other vendors will adopt it. If some standard
275 is developed, this code should be changed to follow it. */
276
277 #define EF_MIPS_MACH 0x00FF0000
278
279 /* Cygnus is choosing values between 80 and 9F;
280 00 - 7F should be left for a future standard;
281 the rest are open. */
282
283 #define E_MIPS_MACH_3900 0x00810000
284 #define E_MIPS_MACH_4010 0x00820000
285 #define E_MIPS_MACH_4100 0x00830000
286 #define E_MIPS_MACH_4650 0x00850000
287 #define E_MIPS_MACH_4120 0x00870000
288 #define E_MIPS_MACH_4111 0x00880000
289 #define E_MIPS_MACH_SB1 0x008a0000
290 #define E_MIPS_MACH_OCTEON 0x008b0000
291 #define E_MIPS_MACH_XLR 0x008c0000
292 #define E_MIPS_MACH_OCTEON2 0x008d0000
293 #define E_MIPS_MACH_OCTEON3 0x008e0000
294 #define E_MIPS_MACH_5400 0x00910000
295 #define E_MIPS_MACH_5900 0x00920000
296 #define E_MIPS_MACH_5500 0x00980000
297 #define E_MIPS_MACH_9000 0x00990000
298 #define E_MIPS_MACH_LS2E 0x00A00000
299 #define E_MIPS_MACH_LS2F 0x00A10000
300 #define E_MIPS_MACH_LS3A 0x00A20000
301 \f
302 /* Processor specific section indices. These sections do not actually
303 exist. Symbols with a st_shndx field corresponding to one of these
304 values have a special meaning. */
305
306 /* Defined and allocated common symbol. Value is virtual address. If
307 relocated, alignment must be preserved. */
308 #define SHN_MIPS_ACOMMON SHN_LORESERVE
309
310 /* Defined and allocated text symbol. Value is virtual address.
311 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
312 #define SHN_MIPS_TEXT (SHN_LORESERVE + 1)
313
314 /* Defined and allocated data symbol. Value is virtual address.
315 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
316 #define SHN_MIPS_DATA (SHN_LORESERVE + 2)
317
318 /* Small common symbol. */
319 #define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3)
320
321 /* Small undefined symbol. */
322 #define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4)
323 \f
324 /* Processor specific section types. */
325
326 /* Section contains the set of dynamic shared objects used when
327 statically linking. */
328 #define SHT_MIPS_LIBLIST 0x70000000
329
330 /* I'm not sure what this is, but it's used on Irix 5. */
331 #define SHT_MIPS_MSYM 0x70000001
332
333 /* Section contains list of symbols whose definitions conflict with
334 symbols defined in shared objects. */
335 #define SHT_MIPS_CONFLICT 0x70000002
336
337 /* Section contains the global pointer table. */
338 #define SHT_MIPS_GPTAB 0x70000003
339
340 /* Section contains microcode information. The exact format is
341 unspecified. */
342 #define SHT_MIPS_UCODE 0x70000004
343
344 /* Section contains some sort of debugging information. The exact
345 format is unspecified. It's probably ECOFF symbols. */
346 #define SHT_MIPS_DEBUG 0x70000005
347
348 /* Section contains register usage information. */
349 #define SHT_MIPS_REGINFO 0x70000006
350
351 /* ??? */
352 #define SHT_MIPS_PACKAGE 0x70000007
353
354 /* ??? */
355 #define SHT_MIPS_PACKSYM 0x70000008
356
357 /* ??? */
358 #define SHT_MIPS_RELD 0x70000009
359
360 /* Section contains interface information. */
361 #define SHT_MIPS_IFACE 0x7000000b
362
363 /* Section contains description of contents of another section. */
364 #define SHT_MIPS_CONTENT 0x7000000c
365
366 /* Section contains miscellaneous options. */
367 #define SHT_MIPS_OPTIONS 0x7000000d
368
369 /* ??? */
370 #define SHT_MIPS_SHDR 0x70000010
371
372 /* ??? */
373 #define SHT_MIPS_FDESC 0x70000011
374
375 /* ??? */
376 #define SHT_MIPS_EXTSYM 0x70000012
377
378 /* ??? */
379 #define SHT_MIPS_DENSE 0x70000013
380
381 /* ??? */
382 #define SHT_MIPS_PDESC 0x70000014
383
384 /* ??? */
385 #define SHT_MIPS_LOCSYM 0x70000015
386
387 /* ??? */
388 #define SHT_MIPS_AUXSYM 0x70000016
389
390 /* ??? */
391 #define SHT_MIPS_OPTSYM 0x70000017
392
393 /* ??? */
394 #define SHT_MIPS_LOCSTR 0x70000018
395
396 /* ??? */
397 #define SHT_MIPS_LINE 0x70000019
398
399 /* ??? */
400 #define SHT_MIPS_RFDESC 0x7000001a
401
402 /* Delta C++: symbol table */
403 #define SHT_MIPS_DELTASYM 0x7000001b
404
405 /* Delta C++: instance table */
406 #define SHT_MIPS_DELTAINST 0x7000001c
407
408 /* Delta C++: class table */
409 #define SHT_MIPS_DELTACLASS 0x7000001d
410
411 /* DWARF debugging section. */
412 #define SHT_MIPS_DWARF 0x7000001e
413
414 /* Delta C++: declarations */
415 #define SHT_MIPS_DELTADECL 0x7000001f
416
417 /* List of libraries the binary depends on. Includes a time stamp, version
418 number. */
419 #define SHT_MIPS_SYMBOL_LIB 0x70000020
420
421 /* Events section. */
422 #define SHT_MIPS_EVENTS 0x70000021
423
424 /* ??? */
425 #define SHT_MIPS_TRANSLATE 0x70000022
426
427 /* Special pixie sections */
428 #define SHT_MIPS_PIXIE 0x70000023
429
430 /* Address translation table (for debug info) */
431 #define SHT_MIPS_XLATE 0x70000024
432
433 /* SGI internal address translation table (for debug info) */
434 #define SHT_MIPS_XLATE_DEBUG 0x70000025
435
436 /* Intermediate code */
437 #define SHT_MIPS_WHIRL 0x70000026
438
439 /* C++ exception handling region info */
440 #define SHT_MIPS_EH_REGION 0x70000027
441
442 /* Obsolete address translation table (for debug info) */
443 #define SHT_MIPS_XLATE_OLD 0x70000028
444
445 /* Runtime procedure descriptor table exception information (ucode) ??? */
446 #define SHT_MIPS_PDR_EXCEPTION 0x70000029
447
448 /* ABI related flags section. */
449 #define SHT_MIPS_ABIFLAGS 0x7000002a
450
451 /* A section of type SHT_MIPS_LIBLIST contains an array of the
452 following structure. The sh_link field is the section index of the
453 string table. The sh_info field is the number of entries in the
454 section. */
455 typedef struct
456 {
457 /* String table index for name of shared object. */
458 unsigned long l_name;
459 /* Time stamp. */
460 unsigned long l_time_stamp;
461 /* Checksum of symbol names and common sizes. */
462 unsigned long l_checksum;
463 /* String table index for version. */
464 unsigned long l_version;
465 /* Flags. */
466 unsigned long l_flags;
467 } Elf32_Lib;
468
469 /* The external version of Elf32_Lib. */
470 typedef struct
471 {
472 unsigned char l_name[4];
473 unsigned char l_time_stamp[4];
474 unsigned char l_checksum[4];
475 unsigned char l_version[4];
476 unsigned char l_flags[4];
477 } Elf32_External_Lib;
478
479 /* The l_flags field of an Elf32_Lib structure may contain the
480 following flags. */
481
482 /* Require an exact match at runtime. */
483 #define LL_EXACT_MATCH 0x00000001
484
485 /* Ignore version incompatibilities at runtime. */
486 #define LL_IGNORE_INT_VER 0x00000002
487
488 /* Require matching minor version number. */
489 #define LL_REQUIRE_MINOR 0x00000004
490
491 /* ??? */
492 #define LL_EXPORTS 0x00000008
493
494 /* Delay loading of this library until really needed. */
495 #define LL_DELAY_LOAD 0x00000010
496
497 /* ??? Delta C++ stuff ??? */
498 #define LL_DELTA 0x00000020
499
500
501 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
502 .dynsym section. Each element has the following type. */
503 typedef unsigned long Elf32_Conflict;
504 typedef unsigned char Elf32_External_Conflict[4];
505
506 typedef unsigned long Elf64_Conflict;
507 typedef unsigned char Elf64_External_Conflict[8];
508
509 /* A section of type SHT_MIPS_GPTAB contains information about how
510 much GP space would be required for different -G arguments. This
511 information is only used so that the linker can provide informative
512 suggestions as to the best -G value to use. The sh_info field is
513 the index of the section for which this information applies. The
514 contents of the section are an array of the following union. The
515 first element uses the gt_header field. The remaining elements use
516 the gt_entry field. */
517 typedef union
518 {
519 struct
520 {
521 /* -G value actually used for this object file. */
522 unsigned long gt_current_g_value;
523 /* Unused. */
524 unsigned long gt_unused;
525 } gt_header;
526 struct
527 {
528 /* If this -G argument has been used... */
529 unsigned long gt_g_value;
530 /* ...this many GP section bytes would be required. */
531 unsigned long gt_bytes;
532 } gt_entry;
533 } Elf32_gptab;
534
535 /* The external version of Elf32_gptab. */
536
537 typedef union
538 {
539 struct
540 {
541 unsigned char gt_current_g_value[4];
542 unsigned char gt_unused[4];
543 } gt_header;
544 struct
545 {
546 unsigned char gt_g_value[4];
547 unsigned char gt_bytes[4];
548 } gt_entry;
549 } Elf32_External_gptab;
550
551 /* A section of type SHT_MIPS_REGINFO contains the following
552 structure. */
553 typedef struct
554 {
555 /* Mask of general purpose registers used. */
556 unsigned long ri_gprmask;
557 /* Mask of co-processor registers used. */
558 unsigned long ri_cprmask[4];
559 /* GP register value for this object file. */
560 long ri_gp_value;
561 } Elf32_RegInfo;
562
563 /* The external version of the Elf_RegInfo structure. */
564 typedef struct
565 {
566 unsigned char ri_gprmask[4];
567 unsigned char ri_cprmask[4][4];
568 unsigned char ri_gp_value[4];
569 } Elf32_External_RegInfo;
570
571 /* MIPS ELF .reginfo swapping routines. */
572 extern void bfd_mips_elf32_swap_reginfo_in
573 (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
574 extern void bfd_mips_elf32_swap_reginfo_out
575 (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
576 \f
577 /* Processor specific section flags. */
578
579 /* This section must be in the global data area. */
580 #define SHF_MIPS_GPREL 0x10000000
581
582 /* This section should be merged. */
583 #define SHF_MIPS_MERGE 0x20000000
584
585 /* This section contains address data of size implied by section
586 element size. */
587 #define SHF_MIPS_ADDR 0x40000000
588
589 /* This section contains string data. */
590 #define SHF_MIPS_STRING 0x80000000
591
592 /* This section may not be stripped. */
593 #define SHF_MIPS_NOSTRIP 0x08000000
594
595 /* This section is local to threads. */
596 #define SHF_MIPS_LOCAL 0x04000000
597
598 /* Linker should generate implicit weak names for this section. */
599 #define SHF_MIPS_NAMES 0x02000000
600
601 /* Section contais text/data which may be replicated in other sections.
602 Linker should retain only one copy. */
603 #define SHF_MIPS_NODUPES 0x01000000
604 \f
605 /* Processor specific program header types. */
606
607 /* Register usage information. Identifies one .reginfo section. */
608 #define PT_MIPS_REGINFO 0x70000000
609
610 /* Runtime procedure table. */
611 #define PT_MIPS_RTPROC 0x70000001
612
613 /* .MIPS.options section. */
614 #define PT_MIPS_OPTIONS 0x70000002
615
616 /* Records ABI related flags. */
617 #define PT_MIPS_ABIFLAGS 0x70000003
618 \f
619 /* Processor specific dynamic array tags. */
620
621 /* 32 bit version number for runtime linker interface. */
622 #define DT_MIPS_RLD_VERSION 0x70000001
623
624 /* Time stamp. */
625 #define DT_MIPS_TIME_STAMP 0x70000002
626
627 /* Checksum of external strings and common sizes. */
628 #define DT_MIPS_ICHECKSUM 0x70000003
629
630 /* Index of version string in string table. */
631 #define DT_MIPS_IVERSION 0x70000004
632
633 /* 32 bits of flags. */
634 #define DT_MIPS_FLAGS 0x70000005
635
636 /* Base address of the segment. */
637 #define DT_MIPS_BASE_ADDRESS 0x70000006
638
639 /* ??? */
640 #define DT_MIPS_MSYM 0x70000007
641
642 /* Address of .conflict section. */
643 #define DT_MIPS_CONFLICT 0x70000008
644
645 /* Address of .liblist section. */
646 #define DT_MIPS_LIBLIST 0x70000009
647
648 /* Number of local global offset table entries. */
649 #define DT_MIPS_LOCAL_GOTNO 0x7000000a
650
651 /* Number of entries in the .conflict section. */
652 #define DT_MIPS_CONFLICTNO 0x7000000b
653
654 /* Number of entries in the .liblist section. */
655 #define DT_MIPS_LIBLISTNO 0x70000010
656
657 /* Number of entries in the .dynsym section. */
658 #define DT_MIPS_SYMTABNO 0x70000011
659
660 /* Index of first external dynamic symbol not referenced locally. */
661 #define DT_MIPS_UNREFEXTNO 0x70000012
662
663 /* Index of first dynamic symbol in global offset table. */
664 #define DT_MIPS_GOTSYM 0x70000013
665
666 /* Number of page table entries in global offset table. */
667 #define DT_MIPS_HIPAGENO 0x70000014
668
669 /* Address of run time loader map, used for debugging. */
670 #define DT_MIPS_RLD_MAP 0x70000016
671
672 /* Delta C++ class definition. */
673 #define DT_MIPS_DELTA_CLASS 0x70000017
674
675 /* Number of entries in DT_MIPS_DELTA_CLASS. */
676 #define DT_MIPS_DELTA_CLASS_NO 0x70000018
677
678 /* Delta C++ class instances. */
679 #define DT_MIPS_DELTA_INSTANCE 0x70000019
680
681 /* Number of entries in DT_MIPS_DELTA_INSTANCE. */
682 #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a
683
684 /* Delta relocations. */
685 #define DT_MIPS_DELTA_RELOC 0x7000001b
686
687 /* Number of entries in DT_MIPS_DELTA_RELOC. */
688 #define DT_MIPS_DELTA_RELOC_NO 0x7000001c
689
690 /* Delta symbols that Delta relocations refer to. */
691 #define DT_MIPS_DELTA_SYM 0x7000001d
692
693 /* Number of entries in DT_MIPS_DELTA_SYM. */
694 #define DT_MIPS_DELTA_SYM_NO 0x7000001e
695
696 /* Delta symbols that hold class declarations. */
697 #define DT_MIPS_DELTA_CLASSSYM 0x70000020
698
699 /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */
700 #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021
701
702 /* Flags indicating information about C++ flavor. */
703 #define DT_MIPS_CXX_FLAGS 0x70000022
704
705 /* Pixie information (???). */
706 #define DT_MIPS_PIXIE_INIT 0x70000023
707
708 /* Address of .MIPS.symlib */
709 #define DT_MIPS_SYMBOL_LIB 0x70000024
710
711 /* The GOT index of the first PTE for a segment */
712 #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
713
714 /* The GOT index of the first PTE for a local symbol */
715 #define DT_MIPS_LOCAL_GOTIDX 0x70000026
716
717 /* The GOT index of the first PTE for a hidden symbol */
718 #define DT_MIPS_HIDDEN_GOTIDX 0x70000027
719
720 /* The GOT index of the first PTE for a protected symbol */
721 #define DT_MIPS_PROTECTED_GOTIDX 0x70000028
722
723 /* Address of `.MIPS.options'. */
724 #define DT_MIPS_OPTIONS 0x70000029
725
726 /* Address of `.interface'. */
727 #define DT_MIPS_INTERFACE 0x7000002a
728
729 /* ??? */
730 #define DT_MIPS_DYNSTR_ALIGN 0x7000002b
731
732 /* Size of the .interface section. */
733 #define DT_MIPS_INTERFACE_SIZE 0x7000002c
734
735 /* Size of rld_text_resolve function stored in the GOT. */
736 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d
737
738 /* Default suffix of DSO to be added by rld on dlopen() calls. */
739 #define DT_MIPS_PERF_SUFFIX 0x7000002e
740
741 /* Size of compact relocation section (O32). */
742 #define DT_MIPS_COMPACT_SIZE 0x7000002f
743
744 /* GP value for auxiliary GOTs. */
745 #define DT_MIPS_GP_VALUE 0x70000030
746
747 /* Address of auxiliary .dynamic. */
748 #define DT_MIPS_AUX_DYNAMIC 0x70000031
749
750 /* Address of the base of the PLTGOT. */
751 #define DT_MIPS_PLTGOT 0x70000032
752
753 /* Points to the base of a writable PLT. */
754 #define DT_MIPS_RWPLT 0x70000034
755
756 /* Relative offset of run time loader map, used for debugging. */
757 #define DT_MIPS_RLD_MAP_REL 0x70000035
758 \f
759 /* Flags which may appear in a DT_MIPS_FLAGS entry. */
760
761 /* No flags. */
762 #define RHF_NONE 0x00000000
763
764 /* Uses shortcut pointers. */
765 #define RHF_QUICKSTART 0x00000001
766
767 /* Hash size is not a power of two. */
768 #define RHF_NOTPOT 0x00000002
769
770 /* Ignore LD_LIBRARY_PATH. */
771 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
772
773 /* DSO address may not be relocated. */
774 #define RHF_NO_MOVE 0x00000008
775
776 /* SGI specific features. */
777 #define RHF_SGI_ONLY 0x00000010
778
779 /* Guarantee that .init will finish executing before any non-init
780 code in DSO is called. */
781 #define RHF_GUARANTEE_INIT 0x00000020
782
783 /* Contains Delta C++ code. */
784 #define RHF_DELTA_C_PLUS_PLUS 0x00000040
785
786 /* Guarantee that .init will start executing before any non-init
787 code in DSO is called. */
788 #define RHF_GUARANTEE_START_INIT 0x00000080
789
790 /* Generated by pixie. */
791 #define RHF_PIXIE 0x00000100
792
793 /* Delay-load DSO by default. */
794 #define RHF_DEFAULT_DELAY_LOAD 0x00000200
795
796 /* Object may be requickstarted */
797 #define RHF_REQUICKSTART 0x00000400
798
799 /* Object has been requickstarted */
800 #define RHF_REQUICKSTARTED 0x00000800
801
802 /* Generated by cord. */
803 #define RHF_CORD 0x00001000
804
805 /* Object contains no unresolved undef symbols. */
806 #define RHF_NO_UNRES_UNDEF 0x00002000
807
808 /* Symbol table is in a safe order. */
809 #define RHF_RLD_ORDER_SAFE 0x00004000
810 \f
811 /* Special values for the st_other field in the symbol table. These
812 are used in an Irix 5 dynamic symbol table. */
813
814 #define STO_DEFAULT STV_DEFAULT
815 #define STO_INTERNAL STV_INTERNAL
816 #define STO_HIDDEN STV_HIDDEN
817 #define STO_PROTECTED STV_PROTECTED
818
819 /* Two topmost bits denote the MIPS ISA for .text symbols:
820 + 00 -- standard MIPS code,
821 + 10 -- microMIPS code,
822 + 11 -- MIPS16 code; requires the following two bits to be set too.
823 Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below
824 for details. */
825 #define STO_MIPS_ISA (3 << 6)
826
827 /* The mask spanning the rest of MIPS psABI flags. At most one is expected
828 to be set except for STO_MIPS16. */
829 #define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
830
831 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
832 relocs. There are therefore two types of nonzero SHN_UNDEF functions:
833 PLT entries and traditional MIPS lazy binding stubs. We mark the former
834 with STO_MIPS_PLT to distinguish them from the latter. */
835 #define STO_MIPS_PLT 0x8
836 #define ELF_ST_IS_MIPS_PLT(other) \
837 ((ELF_ST_IS_MIPS16 (other) \
838 ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \
839 : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
840 #define ELF_ST_SET_MIPS_PLT(other) \
841 ((ELF_ST_IS_MIPS16 (other) \
842 ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \
843 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
844
845 /* This value is used to mark PIC functions in an object that mixes
846 PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
847 although MIPS16 symbols are never considered to be MIPS_PIC. */
848 #define STO_MIPS_PIC 0x20
849 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
850 #define ELF_ST_SET_MIPS_PIC(other) \
851 ((ELF_ST_IS_MIPS16 (other) \
852 ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \
853 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
854
855 /* This value is used for a mips16 .text symbol. */
856 #define STO_MIPS16 0xf0
857 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
858 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
859
860 /* This value is used for a microMIPS .text symbol. To distinguish from
861 STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
862 mask is STO_MIPS_ISA. */
863 #define STO_MICROMIPS (2 << 6)
864 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
865 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
866
867 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
868 has been indicated for a .text symbol. */
869 #define ELF_ST_IS_COMPRESSED(other) \
870 (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
871
872 /* This bit is used on Irix to indicate a symbol whose definition
873 is optional - if, at final link time, it cannot be found, no
874 error message should be produced. */
875 #define STO_OPTIONAL (1 << 2)
876 /* A macro to examine the STO_OPTIONAL bit. */
877 #define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL)
878 \f
879 /* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
880 relocation entry specifies up to three actual relocations, all at
881 the same address. The first relocation which required a symbol
882 uses the symbol in the r_sym field. The second relocation which
883 requires a symbol uses the symbol in the r_ssym field. If all
884 three relocations require a symbol, the third one uses a zero
885 value. */
886
887 /* An entry in a 64 bit SHT_REL section. */
888
889 typedef struct
890 {
891 /* Address of relocation. */
892 unsigned char r_offset[8];
893 /* Symbol index. */
894 unsigned char r_sym[4];
895 /* Special symbol. */
896 unsigned char r_ssym[1];
897 /* Third relocation. */
898 unsigned char r_type3[1];
899 /* Second relocation. */
900 unsigned char r_type2[1];
901 /* First relocation. */
902 unsigned char r_type[1];
903 } Elf64_Mips_External_Rel;
904
905 typedef struct
906 {
907 /* Address of relocation. */
908 bfd_vma r_offset;
909 /* Symbol index. */
910 unsigned long r_sym;
911 /* Special symbol. */
912 unsigned char r_ssym;
913 /* Third relocation. */
914 unsigned char r_type3;
915 /* Second relocation. */
916 unsigned char r_type2;
917 /* First relocation. */
918 unsigned char r_type;
919 } Elf64_Mips_Internal_Rel;
920
921 /* An entry in a 64 bit SHT_RELA section. */
922
923 typedef struct
924 {
925 /* Address of relocation. */
926 unsigned char r_offset[8];
927 /* Symbol index. */
928 unsigned char r_sym[4];
929 /* Special symbol. */
930 unsigned char r_ssym[1];
931 /* Third relocation. */
932 unsigned char r_type3[1];
933 /* Second relocation. */
934 unsigned char r_type2[1];
935 /* First relocation. */
936 unsigned char r_type[1];
937 /* Addend. */
938 unsigned char r_addend[8];
939 } Elf64_Mips_External_Rela;
940
941 typedef struct
942 {
943 /* Address of relocation. */
944 bfd_vma r_offset;
945 /* Symbol index. */
946 unsigned long r_sym;
947 /* Special symbol. */
948 unsigned char r_ssym;
949 /* Third relocation. */
950 unsigned char r_type3;
951 /* Second relocation. */
952 unsigned char r_type2;
953 /* First relocation. */
954 unsigned char r_type;
955 /* Addend. */
956 bfd_signed_vma r_addend;
957 } Elf64_Mips_Internal_Rela;
958
959 /* MIPS ELF 64 relocation info access macros. */
960 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
961 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
962 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
963 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
964
965 /* Values found in the r_ssym field of a relocation entry. */
966
967 /* No relocation. */
968 #define RSS_UNDEF 0
969
970 /* Value of GP. */
971 #define RSS_GP 1
972
973 /* Value of GP in object being relocated. */
974 #define RSS_GP0 2
975
976 /* Address of location being relocated. */
977 #define RSS_LOC 3
978 \f
979 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
980 which starts with this header. */
981
982 typedef struct
983 {
984 /* Type of option. */
985 unsigned char kind[1];
986 /* Size of option descriptor, including header. */
987 unsigned char size[1];
988 /* Section index of affected section, or 0 for global option. */
989 unsigned char section[2];
990 /* Information specific to this kind of option. */
991 unsigned char info[4];
992 } Elf_External_Options;
993
994 typedef struct
995 {
996 /* Type of option. */
997 unsigned char kind;
998 /* Size of option descriptor, including header. */
999 unsigned char size;
1000 /* Section index of affected section, or 0 for global option. */
1001 unsigned short section;
1002 /* Information specific to this kind of option. */
1003 unsigned long info;
1004 } Elf_Internal_Options;
1005
1006 /* MIPS ELF option header swapping routines. */
1007 extern void bfd_mips_elf_swap_options_in
1008 (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1009 extern void bfd_mips_elf_swap_options_out
1010 (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1011
1012 /* Values which may appear in the kind field of an Elf_Options
1013 structure. */
1014
1015 /* Undefined. */
1016 #define ODK_NULL 0
1017
1018 /* Register usage and GP value. */
1019 #define ODK_REGINFO 1
1020
1021 /* Exception processing information. */
1022 #define ODK_EXCEPTIONS 2
1023
1024 /* Section padding information. */
1025 #define ODK_PAD 3
1026
1027 /* Hardware workarounds performed. */
1028 #define ODK_HWPATCH 4
1029
1030 /* Fill value used by the linker. */
1031 #define ODK_FILL 5
1032
1033 /* Reserved space for desktop tools. */
1034 #define ODK_TAGS 6
1035
1036 /* Hardware workarounds, AND bits when merging. */
1037 #define ODK_HWAND 7
1038
1039 /* Hardware workarounds, OR bits when merging. */
1040 #define ODK_HWOR 8
1041
1042 /* GP group to use for text/data sections. */
1043 #define ODK_GP_GROUP 9
1044
1045 /* ID information. */
1046 #define ODK_IDENT 10
1047
1048 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1049 structure. In the 64 bit ABI, it is the following structure. The
1050 info field of the options header is not used. */
1051
1052 typedef struct
1053 {
1054 /* Mask of general purpose registers used. */
1055 unsigned char ri_gprmask[4];
1056 /* Padding. */
1057 unsigned char ri_pad[4];
1058 /* Mask of co-processor registers used. */
1059 unsigned char ri_cprmask[4][4];
1060 /* GP register value for this object file. */
1061 unsigned char ri_gp_value[8];
1062 } Elf64_External_RegInfo;
1063
1064 typedef struct
1065 {
1066 /* Mask of general purpose registers used. */
1067 unsigned long ri_gprmask;
1068 /* Padding. */
1069 unsigned long ri_pad;
1070 /* Mask of co-processor registers used. */
1071 unsigned long ri_cprmask[4];
1072 /* GP register value for this object file. */
1073 bfd_vma ri_gp_value;
1074 } Elf64_Internal_RegInfo;
1075
1076 /* ABI Flags structure version 0. */
1077
1078 typedef struct
1079 {
1080 /* Version of flags structure. */
1081 unsigned char version[2];
1082 /* The level of the ISA: 1-5, 32, 64. */
1083 unsigned char isa_level[1];
1084 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
1085 unsigned char isa_rev[1];
1086 /* The size of general purpose registers. */
1087 unsigned char gpr_size[1];
1088 /* The size of co-processor 1 registers. */
1089 unsigned char cpr1_size[1];
1090 /* The size of co-processor 2 registers. */
1091 unsigned char cpr2_size[1];
1092 /* The floating-point ABI. */
1093 unsigned char fp_abi[1];
1094 /* Processor-specific extension. */
1095 unsigned char isa_ext[4];
1096 /* Mask of ASEs used. */
1097 unsigned char ases[4];
1098 /* Mask of general flags. */
1099 unsigned char flags1[4];
1100 unsigned char flags2[4];
1101 } Elf_External_ABIFlags_v0;
1102
1103 typedef struct
1104 {
1105 /* Version of flags structure. */
1106 unsigned short version;
1107 /* The level of the ISA: 1-5, 32, 64. */
1108 unsigned char isa_level;
1109 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
1110 unsigned char isa_rev;
1111 /* The size of general purpose registers. */
1112 unsigned char gpr_size;
1113 /* The size of co-processor 1 registers. */
1114 unsigned char cpr1_size;
1115 /* The size of co-processor 2 registers. */
1116 unsigned char cpr2_size;
1117 /* The floating-point ABI. */
1118 unsigned char fp_abi;
1119 /* Processor-specific extension. */
1120 unsigned long isa_ext;
1121 /* Mask of ASEs used. */
1122 unsigned long ases;
1123 /* Mask of general flags. */
1124 unsigned long flags1;
1125 unsigned long flags2;
1126 } Elf_Internal_ABIFlags_v0;
1127
1128 typedef struct
1129 {
1130 /* The hash value computed from the name of the corresponding
1131 dynamic symbol. */
1132 unsigned char ms_hash_value[4];
1133 /* Contains both the dynamic relocation index and the symbol flags
1134 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1135 to access the individual values. The dynamic relocation index
1136 identifies the first entry in the .rel.dyn section that
1137 references the dynamic symbol corresponding to this msym entry.
1138 If the index is 0, no dynamic relocations are associated with the
1139 symbol. The symbol flags field is reserved for future use. */
1140 unsigned char ms_info[4];
1141 } Elf32_External_Msym;
1142
1143 typedef struct
1144 {
1145 /* The hash value computed from the name of the corresponding
1146 dynamic symbol. */
1147 unsigned long ms_hash_value;
1148 /* Contains both the dynamic relocation index and the symbol flags
1149 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1150 to access the individual values. The dynamic relocation index
1151 identifies the first entry in the .rel.dyn section that
1152 references the dynamic symbol corresponding to this msym entry.
1153 If the index is 0, no dynamic relocations are associated with the
1154 symbol. The symbol flags field is reserved for future use. */
1155 unsigned long ms_info;
1156 } Elf32_Internal_Msym;
1157
1158 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1159 #define ELF32_MS_FLAGS(i) (i) & 0xff)
1160 #define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff))
1161
1162 /* MIPS ELF reginfo swapping routines. */
1163 extern void bfd_mips_elf64_swap_reginfo_in
1164 (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1165 extern void bfd_mips_elf64_swap_reginfo_out
1166 (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1167
1168 /* MIPS ELF flags swapping routines. */
1169 extern void bfd_mips_elf_swap_abiflags_v0_in
1170 (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1171 extern void bfd_mips_elf_swap_abiflags_v0_out
1172 (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1173
1174 /* Masks for the info work of an ODK_EXCEPTIONS descriptor. */
1175 #define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */
1176 #define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */
1177 #define OEX_PAGE0 0x10000 /* Page zero must be mapped. */
1178 #define OEX_SMM 0x20000 /* Force sequential memory mode. */
1179 #define OEX_FPDBUG 0x40000 /* Force precise floating-point
1180 exceptions (debug mode). */
1181 #define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */
1182
1183 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */
1184 #define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */
1185 #define OEX_FPU_DIV0 0x08 /* Division by zero exception. */
1186 #define OEX_FPU_OFLO 0x04 /* Overflow exception. */
1187 #define OEX_FPU_UFLO 0x02 /* Underflow exception. */
1188 #define OEX_FPU_INEX 0x01 /* Inexact exception. */
1189
1190 /* Masks for the info word of an ODK_PAD descriptor. */
1191 #define OPAD_PREFIX 0x01
1192 #define OPAD_POSTFIX 0x02
1193 #define OPAD_SYMBOL 0x04
1194
1195 /* Masks for the info word of an ODK_HWPATCH descriptor. */
1196 #define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */
1197 #define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */
1198 #define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */
1199 #define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug
1200 (clean == 1). */
1201 #define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned
1202 load patch. */
1203
1204 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */
1205 #define OGP_GROUP 0x0000ffff /* GP group number. */
1206 #define OGP_SELF 0xffff0000 /* Self-contained GP groups. */
1207
1208 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */
1209 #define OHWA0_R4KEOP_CHECKED 0x00000001
1210 #define OHWA0_R4KEOP_CLEAN 0x00000002
1211
1212 /* Values for the xxx_size bytes of an ABI flags structure. */
1213
1214 #define AFL_REG_NONE 0x00 /* No registers. */
1215 #define AFL_REG_32 0x01 /* 32-bit registers. */
1216 #define AFL_REG_64 0x02 /* 64-bit registers. */
1217 #define AFL_REG_128 0x03 /* 128-bit registers. */
1218
1219 /* Masks for the ases word of an ABI flags structure. */
1220
1221 #define AFL_ASE_DSP 0x00000001 /* DSP ASE. */
1222 #define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */
1223 #define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */
1224 #define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */
1225 #define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */
1226 #define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
1227 #define AFL_ASE_MT 0x00000040 /* MT ASE. */
1228 #define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */
1229 #define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */
1230 #define AFL_ASE_MSA 0x00000200 /* MSA ASE. */
1231 #define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
1232 #define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
1233 #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
1234 #define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */
1235 #define AFL_ASE_MASK 0x00003fff /* All ASEs. */
1236
1237 /* Values for the isa_ext word of an ABI flags structure. */
1238
1239 #define AFL_EXT_XLR 1 /* RMI Xlr instruction. */
1240 #define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */
1241 #define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */
1242 #define AFL_EXT_LOONGSON_3A 4 /* Loongson 3A. */
1243 #define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */
1244 #define AFL_EXT_5900 6 /* MIPS R5900 instruction. */
1245 #define AFL_EXT_4650 7 /* MIPS R4650 instruction. */
1246 #define AFL_EXT_4010 8 /* LSI R4010 instruction. */
1247 #define AFL_EXT_4100 9 /* NEC VR4100 instruction. */
1248 #define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */
1249 #define AFL_EXT_10000 11 /* MIPS R10000 instruction. */
1250 #define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
1251 #define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */
1252 #define AFL_EXT_4120 14 /* NEC VR4120 instruction. */
1253 #define AFL_EXT_5400 15 /* NEC VR5400 instruction. */
1254 #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */
1255 #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */
1256 #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */
1257 #define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */
1258
1259 /* Masks for the flags1 word of an ABI flags structure. */
1260 #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */
1261
1262 extern unsigned int bfd_mips_isa_ext (bfd *);
1263 \f
1264
1265 /* Object attribute tags. */
1266 enum
1267 {
1268 /* 0-3 are generic. */
1269
1270 /* Floating-point ABI used by this object file. */
1271 Tag_GNU_MIPS_ABI_FP = 4,
1272
1273 /* MSA ABI used by this object file. */
1274 Tag_GNU_MIPS_ABI_MSA = 8,
1275 };
1276
1277 /* Object attribute values. */
1278 enum
1279 {
1280 /* Values defined for Tag_GNU_MIPS_ABI_FP. */
1281
1282 /* Not tagged or not using any ABIs affected by the differences. */
1283 Val_GNU_MIPS_ABI_FP_ANY = 0,
1284
1285 /* Using hard-float -mdouble-float. */
1286 Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1287
1288 /* Using hard-float -msingle-float. */
1289 Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1290
1291 /* Using soft-float. */
1292 Val_GNU_MIPS_ABI_FP_SOFT = 3,
1293
1294 /* Using -mips32r2 -mfp64. */
1295 Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1296
1297 /* Using -mfpxx */
1298 Val_GNU_MIPS_ABI_FP_XX = 5,
1299
1300 /* Using -mips32r2 -mfp64. */
1301 Val_GNU_MIPS_ABI_FP_64 = 6,
1302
1303 /* Using -mips32r2 -mfp64 -mno-odd-spreg. */
1304 Val_GNU_MIPS_ABI_FP_64A = 7,
1305
1306 /* This is reserved for backward-compatibility with an earlier
1307 implementation of the MIPS NaN2008 functionality. */
1308 Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
1309
1310 /* Values defined for Tag_GNU_MIPS_ABI_MSA. */
1311
1312 /* Not tagged or not using any ABIs affected by the differences. */
1313 Val_GNU_MIPS_ABI_MSA_ANY = 0,
1314
1315 /* Using 128-bit MSA. */
1316 Val_GNU_MIPS_ABI_MSA_128 = 1,
1317 };
1318
1319 #ifdef __cplusplus
1320 }
1321 #endif
1322
1323 #endif /* _ELF_MIPS_H */
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