include/kvm/arm_vgic.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17  */
  18
  19 #ifndef __ASM_ARM_KVM_VGIC_H
  20 #define __ASM_ARM_KVM_VGIC_H
  21
  22 #include <linux/kernel.h>
  23 #include <linux/kvm.h>
  24 #include <linux/irqreturn.h>
  25 #include <linux/spinlock.h>
  26 #include <linux/types.h>
  27 #include <linux/irqchip/arm-gic.h>
  28
  29 #define VGIC_NR_IRQS            256
  30 #define VGIC_NR_SGIS            16
  31 #define VGIC_NR_PPIS            16
  32 #define VGIC_NR_PRIVATE_IRQS    (VGIC_NR_SGIS + VGIC_NR_PPIS)
  33 #define VGIC_NR_SHARED_IRQS     (VGIC_NR_IRQS - VGIC_NR_PRIVATE_IRQS)
  34 #define VGIC_MAX_CPUS           KVM_MAX_VCPUS
  35 #define VGIC_MAX_LRS            (1 << 6)
  36
  37 /* Sanity checks... */
  38 #if (VGIC_MAX_CPUS > 8)
  39 #error  Invalid number of CPU interfaces
  40 #endif
  41
  42 #if (VGIC_NR_IRQS & 31)
  43 #error "VGIC_NR_IRQS must be a multiple of 32"
  44 #endif
  45
  46 #if (VGIC_NR_IRQS > 1024)
  47 #error "VGIC_NR_IRQS must be <= 1024"
  48 #endif
  49
  50 /*
  51  * The GIC distributor registers describing interrupts have two parts:
  52  * - 32 per-CPU interrupts (SGI + PPI)
  53  * - a bunch of shared interrupts (SPI)
  54  */
  55 struct vgic_bitmap {
  56         union {
  57                 u32 reg[VGIC_NR_PRIVATE_IRQS / 32];
  58                 DECLARE_BITMAP(reg_ul, VGIC_NR_PRIVATE_IRQS);
  59         } percpu[VGIC_MAX_CPUS];
  60         union {
  61                 u32 reg[VGIC_NR_SHARED_IRQS / 32];
  62                 DECLARE_BITMAP(reg_ul, VGIC_NR_SHARED_IRQS);
  63         } shared;
  64 };
  65
  66 struct vgic_bytemap {
  67         u32 percpu[VGIC_MAX_CPUS][VGIC_NR_PRIVATE_IRQS / 4];
  68         u32 shared[VGIC_NR_SHARED_IRQS  / 4];
  69 };
  70
  71 struct kvm_vcpu;
  72
  73 #define LR_STATE_PENDING        (1 << 0)
  74 #define LR_STATE_ACTIVE         (1 << 1)
  75 #define LR_STATE_MASK           (3 << 0)
  76 #define LR_EOI_INT              (1 << 2)
  77
  78 struct vgic_lr {
  79         u16     irq;
  80         u8      source;
  81         u8      state;
  82 };
  83
  84 struct vgic_vmcr {
  85         u32     ctlr;
  86         u32     abpr;
  87         u32     bpr;
  88         u32     pmr;
  89 };
  90
  91 struct vgic_ops {
  92         struct vgic_lr  (*get_lr)(const struct kvm_vcpu *, int);
  93         void    (*set_lr)(struct kvm_vcpu *, int, struct vgic_lr);
  94         void    (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr);
  95         u64     (*get_elrsr)(const struct kvm_vcpu *vcpu);
  96         u64     (*get_eisr)(const struct kvm_vcpu *vcpu);
  97         u32     (*get_interrupt_status)(const struct kvm_vcpu *vcpu);
  98         void    (*enable_underflow)(struct kvm_vcpu *vcpu);
  99         void    (*disable_underflow)(struct kvm_vcpu *vcpu);
 100         void    (*get_vmcr)(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
 101         void    (*set_vmcr)(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
 102         void    (*enable)(struct kvm_vcpu *vcpu);
 103 };
 104
 105 struct vgic_params {
 106         /* Physical address of vgic virtual cpu interface */
 107         phys_addr_t     vcpu_base;
 108         /* Number of list registers */
 109         u32             nr_lr;
 110         /* Interrupt number */
 111         unsigned int    maint_irq;
 112         /* Virtual control interface base address */
 113         void __iomem    *vctrl_base;
 114 };
 115
 116 struct vgic_dist {
 117 #ifdef CONFIG_KVM_ARM_VGIC
 118         spinlock_t              lock;
 119         bool                    ready;
 120
 121         /* Virtual control interface mapping */
 122         void __iomem            *vctrl_base;
 123
 124         /* Distributor and vcpu interface mapping in the guest */
 125         phys_addr_t             vgic_dist_base;
 126         phys_addr_t             vgic_cpu_base;
 127
 128         /* Distributor enabled */
 129         u32                     enabled;
 130
 131         /* Interrupt enabled (one bit per IRQ) */
 132         struct vgic_bitmap      irq_enabled;
 133
 134         /* Interrupt 'pin' level */
 135         struct vgic_bitmap      irq_state;
 136
 137         /* Level-triggered interrupt in progress */
 138         struct vgic_bitmap      irq_active;
 139
 140         /* Interrupt priority. Not used yet. */
 141         struct vgic_bytemap     irq_priority;
 142
 143         /* Level/edge triggered */
 144         struct vgic_bitmap      irq_cfg;
 145
 146         /* Source CPU per SGI and target CPU */
 147         u8                      irq_sgi_sources[VGIC_MAX_CPUS][VGIC_NR_SGIS];
 148
 149         /* Target CPU for each IRQ */
 150         u8                      irq_spi_cpu[VGIC_NR_SHARED_IRQS];
 151         struct vgic_bitmap      irq_spi_target[VGIC_MAX_CPUS];
 152
 153         /* Bitmap indicating which CPU has something pending */
 154         unsigned long           irq_pending_on_cpu;
 155 #endif
 156 };
 157
 158 struct vgic_v2_cpu_if {
 159         u32             vgic_hcr;
 160         u32             vgic_vmcr;
 161         u32             vgic_misr;      /* Saved only */
 162         u32             vgic_eisr[2];   /* Saved only */
 163         u32             vgic_elrsr[2];  /* Saved only */
 164         u32             vgic_apr;
 165         u32             vgic_lr[VGIC_MAX_LRS];
 166 };
 167
 168 struct vgic_cpu {
 169 #ifdef CONFIG_KVM_ARM_VGIC
 170         /* per IRQ to LR mapping */
 171         u8              vgic_irq_lr_map[VGIC_NR_IRQS];
 172
 173         /* Pending interrupts on this VCPU */
 174         DECLARE_BITMAP( pending_percpu, VGIC_NR_PRIVATE_IRQS);
 175         DECLARE_BITMAP( pending_shared, VGIC_NR_SHARED_IRQS);
 176
 177         /* Bitmap of used/free list registers */
 178         DECLARE_BITMAP( lr_used, VGIC_MAX_LRS);
 179
 180         /* Number of list registers on this CPU */
 181         int             nr_lr;
 182
 183         /* CPU vif control registers for world switch */
 184         union {
 185                 struct vgic_v2_cpu_if   vgic_v2;
 186         };
 187 #endif
 188 };
 189
 190 #define LR_EMPTY        0xff
 191
 192 #define INT_STATUS_EOI          (1 << 0)
 193 #define INT_STATUS_UNDERFLOW    (1 << 1)
 194
 195 struct kvm;
 196 struct kvm_vcpu;
 197 struct kvm_run;
 198 struct kvm_exit_mmio;
 199
 200 #ifdef CONFIG_KVM_ARM_VGIC
 201 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
 202 int kvm_vgic_hyp_init(void);
 203 int kvm_vgic_init(struct kvm *kvm);
 204 int kvm_vgic_create(struct kvm *kvm);
 205 int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu);
 206 void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
 207 void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
 208 int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num,
 209                         bool level);
 210 int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
 211 bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
 212                       struct kvm_exit_mmio *mmio);
 213
 214 #define irqchip_in_kernel(k)    (!!((k)->arch.vgic.vctrl_base))
 215 #define vgic_initialized(k)     ((k)->arch.vgic.ready)
 216
 217 #else
 218 static inline int kvm_vgic_hyp_init(void)
 219 {
 220         return 0;
 221 }
 222
 223 static inline int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr)
 224 {
 225         return 0;
 226 }
 227
 228 static inline int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
 229 {
 230         return -ENXIO;
 231 }
 232
 233 static inline int kvm_vgic_init(struct kvm *kvm)
 234 {
 235         return 0;
 236 }
 237
 238 static inline int kvm_vgic_create(struct kvm *kvm)
 239 {
 240         return 0;
 241 }
 242
 243 static inline int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
 244 {
 245         return 0;
 246 }
 247
 248 static inline void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) {}
 249 static inline void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) {}
 250
 251 static inline int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid,
 252                                       unsigned int irq_num, bool level)
 253 {
 254         return 0;
 255 }
 256
 257 static inline int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
 258 {
 259         return 0;
 260 }
 261
 262 static inline bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
 263                                     struct kvm_exit_mmio *mmio)
 264 {
 265         return false;
 266 }
 267
 268 static inline int irqchip_in_kernel(struct kvm *kvm)
 269 {
 270         return 0;
 271 }
 272
 273 static inline bool vgic_initialized(struct kvm *kvm)
 274 {
 275         return true;
 276 }
 277 #endif
 278
 279 #endif