iommu/vt-d: Unify the way to process DMAR device scope array
[deliverable/linux.git] / include / linux / dmar.h
1 /*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
19 */
20
21 #ifndef __DMAR_H__
22 #define __DMAR_H__
23
24 #include <linux/acpi.h>
25 #include <linux/types.h>
26 #include <linux/msi.h>
27 #include <linux/irqreturn.h>
28 #include <linux/rwsem.h>
29 #include <linux/rcupdate.h>
30
31 struct acpi_dmar_header;
32
33 /* DMAR Flags */
34 #define DMAR_INTR_REMAP 0x1
35 #define DMAR_X2APIC_OPT_OUT 0x2
36
37 struct intel_iommu;
38
39 #ifdef CONFIG_DMAR_TABLE
40 extern struct acpi_table_header *dmar_tbl;
41 struct dmar_drhd_unit {
42 struct list_head list; /* list of drhd units */
43 struct acpi_dmar_header *hdr; /* ACPI header */
44 u64 reg_base_addr; /* register base address*/
45 struct pci_dev __rcu **devices;/* target device array */
46 int devices_cnt; /* target device count */
47 u16 segment; /* PCI domain */
48 u8 ignored:1; /* ignore drhd */
49 u8 include_all:1;
50 struct intel_iommu *iommu;
51 };
52
53 struct dmar_pci_notify_info {
54 struct pci_dev *dev;
55 unsigned long event;
56 int bus;
57 u16 seg;
58 u16 level;
59 struct acpi_dmar_pci_path path[];
60 } __attribute__((packed));
61
62 extern struct rw_semaphore dmar_global_lock;
63 extern struct list_head dmar_drhd_units;
64
65 #define for_each_drhd_unit(drhd) \
66 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
67
68 #define for_each_active_drhd_unit(drhd) \
69 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
70 if (drhd->ignored) {} else
71
72 #define for_each_active_iommu(i, drhd) \
73 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
74 if (i=drhd->iommu, drhd->ignored) {} else
75
76 #define for_each_iommu(i, drhd) \
77 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
78 if (i=drhd->iommu, 0) {} else
79
80 static inline bool dmar_rcu_check(void)
81 {
82 return rwsem_is_locked(&dmar_global_lock) ||
83 system_state == SYSTEM_BOOTING;
84 }
85
86 #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
87
88 #define for_each_dev_scope(a, c, p, d) \
89 for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)]) : \
90 NULL, (p) < (c)); (p)++)
91
92 #define for_each_active_dev_scope(a, c, p, d) \
93 for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else
94
95 extern int dmar_table_init(void);
96 extern int dmar_dev_scope_init(void);
97 extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
98 struct pci_dev ***devices, u16 segment);
99 extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
100 extern void dmar_free_dev_scope(struct pci_dev __rcu ***devices, int *cnt);
101 extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
102 void *start, void*end, u16 segment,
103 struct pci_dev __rcu **devices,
104 int devices_cnt);
105 extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
106 u16 segment, struct pci_dev __rcu **devices,
107 int count);
108 /* Intel IOMMU detection */
109 extern int detect_intel_iommu(void);
110 extern int enable_drhd_fault_handling(void);
111 #else
112 struct dmar_pci_notify_info;
113 static inline int detect_intel_iommu(void)
114 {
115 return -ENODEV;
116 }
117
118 static inline int dmar_table_init(void)
119 {
120 return -ENODEV;
121 }
122 static inline int enable_drhd_fault_handling(void)
123 {
124 return -1;
125 }
126 #endif /* !CONFIG_DMAR_TABLE */
127
128 struct irte {
129 union {
130 struct {
131 __u64 present : 1,
132 fpd : 1,
133 dst_mode : 1,
134 redir_hint : 1,
135 trigger_mode : 1,
136 dlvry_mode : 3,
137 avail : 4,
138 __reserved_1 : 4,
139 vector : 8,
140 __reserved_2 : 8,
141 dest_id : 32;
142 };
143 __u64 low;
144 };
145
146 union {
147 struct {
148 __u64 sid : 16,
149 sq : 2,
150 svt : 2,
151 __reserved_3 : 44;
152 };
153 __u64 high;
154 };
155 };
156
157 enum {
158 IRQ_REMAP_XAPIC_MODE,
159 IRQ_REMAP_X2APIC_MODE,
160 };
161
162 /* Can't use the common MSI interrupt functions
163 * since DMAR is not a pci device
164 */
165 struct irq_data;
166 extern void dmar_msi_unmask(struct irq_data *data);
167 extern void dmar_msi_mask(struct irq_data *data);
168 extern void dmar_msi_read(int irq, struct msi_msg *msg);
169 extern void dmar_msi_write(int irq, struct msi_msg *msg);
170 extern int dmar_set_interrupt(struct intel_iommu *iommu);
171 extern irqreturn_t dmar_fault(int irq, void *dev_id);
172 extern int arch_setup_dmar_msi(unsigned int irq);
173
174 #ifdef CONFIG_INTEL_IOMMU
175 extern int iommu_detected, no_iommu;
176 extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
177 extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
178 extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
179 extern int intel_iommu_init(void);
180 #else /* !CONFIG_INTEL_IOMMU: */
181 static inline int intel_iommu_init(void) { return -ENODEV; }
182 static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
183 {
184 return 0;
185 }
186 static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
187 {
188 return 0;
189 }
190 static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
191 {
192 return 0;
193 }
194 #endif /* CONFIG_INTEL_IOMMU */
195
196 #endif /* __DMAR_H__ */
This page took 0.036503 seconds and 5 git commands to generate.