Merge branches 'topic/asoc', 'topic/misc-fixes', 'topic/ps3-csbits' and 'topic/stagin...
[deliverable/linux.git] / include / linux / dmar.h
1 /*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
19 */
20
21 #ifndef __DMAR_H__
22 #define __DMAR_H__
23
24 #include <linux/acpi.h>
25 #include <linux/types.h>
26 #include <linux/msi.h>
27
28 #if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
29 struct intel_iommu;
30
31 struct dmar_drhd_unit {
32 struct list_head list; /* list of drhd units */
33 struct acpi_dmar_header *hdr; /* ACPI header */
34 u64 reg_base_addr; /* register base address*/
35 struct pci_dev **devices; /* target device array */
36 int devices_cnt; /* target device count */
37 u8 ignored:1; /* ignore drhd */
38 u8 include_all:1;
39 struct intel_iommu *iommu;
40 };
41
42 extern struct list_head dmar_drhd_units;
43
44 #define for_each_drhd_unit(drhd) \
45 list_for_each_entry(drhd, &dmar_drhd_units, list)
46
47 extern int dmar_table_init(void);
48 extern int early_dmar_detect(void);
49 extern int dmar_dev_scope_init(void);
50
51 /* Intel IOMMU detection */
52 extern void detect_intel_iommu(void);
53
54
55 extern int parse_ioapics_under_ir(void);
56 extern int alloc_iommu(struct dmar_drhd_unit *);
57 #else
58 static inline void detect_intel_iommu(void)
59 {
60 return;
61 }
62
63 static inline int dmar_table_init(void)
64 {
65 return -ENODEV;
66 }
67 #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
68
69 #ifdef CONFIG_INTR_REMAP
70 extern int intr_remapping_enabled;
71 extern int enable_intr_remapping(int);
72
73 struct irte {
74 union {
75 struct {
76 __u64 present : 1,
77 fpd : 1,
78 dst_mode : 1,
79 redir_hint : 1,
80 trigger_mode : 1,
81 dlvry_mode : 3,
82 avail : 4,
83 __reserved_1 : 4,
84 vector : 8,
85 __reserved_2 : 8,
86 dest_id : 32;
87 };
88 __u64 low;
89 };
90
91 union {
92 struct {
93 __u64 sid : 16,
94 sq : 2,
95 svt : 2,
96 __reserved_3 : 44;
97 };
98 __u64 high;
99 };
100 };
101 extern int get_irte(int irq, struct irte *entry);
102 extern int modify_irte(int irq, struct irte *irte_modified);
103 extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
104 extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
105 u16 sub_handle);
106 extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
107 extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index);
108 extern int flush_irte(int irq);
109 extern int free_irte(int irq);
110
111 extern int irq_remapped(int irq);
112 extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
113 extern struct intel_iommu *map_ioapic_to_ir(int apic);
114 #else
115 #define irq_remapped(irq) (0)
116 #define enable_intr_remapping(mode) (-1)
117 #define intr_remapping_enabled (0)
118 #endif
119
120 #ifdef CONFIG_DMAR
121 extern const char *dmar_get_fault_reason(u8 fault_reason);
122
123 /* Can't use the common MSI interrupt functions
124 * since DMAR is not a pci device
125 */
126 extern void dmar_msi_unmask(unsigned int irq);
127 extern void dmar_msi_mask(unsigned int irq);
128 extern void dmar_msi_read(int irq, struct msi_msg *msg);
129 extern void dmar_msi_write(int irq, struct msi_msg *msg);
130 extern int dmar_set_interrupt(struct intel_iommu *iommu);
131 extern int arch_setup_dmar_msi(unsigned int irq);
132
133 extern int iommu_detected, no_iommu;
134 extern struct list_head dmar_rmrr_units;
135 struct dmar_rmrr_unit {
136 struct list_head list; /* list of rmrr units */
137 struct acpi_dmar_header *hdr; /* ACPI header */
138 u64 base_address; /* reserved base address*/
139 u64 end_address; /* reserved end address */
140 struct pci_dev **devices; /* target devices */
141 int devices_cnt; /* target device count */
142 };
143
144 #define for_each_rmrr_units(rmrr) \
145 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
146 /* Intel DMAR initialization functions */
147 extern int intel_iommu_init(void);
148 extern int dmar_disabled;
149 #else
150 static inline int intel_iommu_init(void)
151 {
152 #ifdef CONFIG_INTR_REMAP
153 return dmar_dev_scope_init();
154 #else
155 return -ENODEV;
156 #endif
157 }
158 #endif /* !CONFIG_DMAR */
159 #endif /* __DMAR_H__ */
This page took 0.047324 seconds and 6 git commands to generate.